diff --git a/PCB/pn532_ant/pn532_ant.kicad_pcb b/PCB/pn532_ant/pn532_ant.kicad_pcb
new file mode 100644
index 0000000..b2a08f7
--- /dev/null
+++ b/PCB/pn532_ant/pn532_ant.kicad_pcb
@@ -0,0 +1,149 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "A4")
+  (layers
+    (0 "F.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
+    (42 "Eco1.User" user "User.Eco1")
+    (43 "Eco2.User" user "User.Eco2")
+    (44 "Edge.Cuts" user)
+    (45 "Margin" user)
+    (46 "B.CrtYd" user "B.Courtyard")
+    (47 "F.CrtYd" user "F.Courtyard")
+    (48 "B.Fab" user)
+    (49 "F.Fab" user)
+    (50 "User.1" user)
+    (51 "User.2" user)
+    (52 "User.3" user)
+    (53 "User.4" user)
+    (54 "User.5" user)
+    (55 "User.6" user)
+    (56 "User.7" user)
+    (57 "User.8" user)
+    (58 "User.9" user)
+  )
+
+  (setup
+    (pad_to_mask_clearance 0)
+    (grid_origin 155.25 87.5)
+    (pcbplotparams
+      (layerselection 0x00010fc_ffffffff)
+      (disableapertmacros false)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (svguseinch false)
+      (svgprecision 6)
+      (excludeedgelayer true)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (dxfpolygonmode true)
+      (dxfimperialunits true)
+      (dxfusepcbnewfont true)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (sketchpadsonfab false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory "../../../Production/PCB/pn532_ant/")
+    )
+  )
+
+  (net 0 "")
+  (net 1 "Net-(J1-Pad1)")
+
+  (footprint "pn532_ant:3PINS" (layer "F.Cu")
+    (tedit 0) (tstamp ee09069b-c8ba-486e-aae8-2214bc6725b5)
+    (at 155.25 87.5)
+    (property "Sheetfile" "pn532_ant.kicad_sch")
+    (property "Sheetname" "")
+    (path "/3040ac1b-e98b-4c8c-af52-d5cbf9fbe1c8")
+    (attr smd)
+    (fp_text reference "J1" (at 0 -5.5 unlocked) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 7d0290fe-9c1d-47ec-a24d-3694d4116656)
+    )
+    (fp_text value "Conn_01x03_Female" (at 0 5 unlocked) (layer "F.Fab") hide
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp e4b2291d-dce1-4369-8d72-324e7db39f77)
+    )
+    (fp_rect (start -1.5 -4) (end 1.5 4) (layer "F.SilkS") (width 0.12) (fill none) (tstamp 1ac9bda3-0876-4cd7-a01c-fb979cef0a06))
+    (pad "1" thru_hole oval (at 0 -2.5) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad1)") (pinfunction "Pin_1") (pintype "passive") (tstamp 93252455-e909-4999-be5f-13cab6471e7a))
+    (pad "2" thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad1)") (pinfunction "Pin_2") (pintype "passive") (tstamp 82778be8-f4a2-4dfd-87f9-985b7d60c81d))
+    (pad "3" thru_hole oval (at 0 2.5) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+      (net 1 "Net-(J1-Pad1)") (pinfunction "Pin_3") (pintype "passive") (tstamp e5ec34a4-e59e-4e43-b239-306ac2948794))
+  )
+
+  (gr_arc (start 120.5 100) (mid 120.146447 99.853553) (end 120 99.5) (layer "Edge.Cuts") (width 0.1) (tstamp 08b3f863-51f7-4b72-ae50-646bb4d7c378))
+  (gr_arc (start 159.5 75) (mid 159.853553 75.146447) (end 160 75.5) (layer "Edge.Cuts") (width 0.1) (tstamp 4157f767-60df-4a8d-8a96-7745dfdf5edd))
+  (gr_line (start 120.5 75) (end 159.5 75) (layer "Edge.Cuts") (width 0.1) (tstamp 83f50e31-b709-45d0-a6bc-1f809b9407a8))
+  (gr_line (start 159.5 100) (end 120.5 100) (layer "Edge.Cuts") (width 0.1) (tstamp b23a252a-a1ea-4d83-b44f-f59d6f08797e))
+  (gr_line (start 120 99.5) (end 120 75.5) (layer "Edge.Cuts") (width 0.1) (tstamp c8408dee-d7fd-47c6-b4c7-d1083fd8084f))
+  (gr_arc (start 120 75.5) (mid 120.146447 75.146447) (end 120.5 75) (layer "Edge.Cuts") (width 0.1) (tstamp eb64c0e9-949d-48b0-af0a-5b22184db0bc))
+  (gr_arc (start 160 99.5) (mid 159.853553 99.853553) (end 159.5 100) (layer "Edge.Cuts") (width 0.1) (tstamp ef426305-e695-4fef-983a-8525e17e27ae))
+  (gr_line (start 160 75.5) (end 160 99.5) (layer "Edge.Cuts") (width 0.1) (tstamp f0b1f863-d6ae-4b5e-863c-e1350146a656))
+  (gr_text "AIME" (at 140 87.5) (layer "F.SilkS") (tstamp 86404f6a-0eca-47a7-a2d6-07bca72fceb1)
+    (effects (font (size 2 2.2) (thickness 0.3)))
+  )
+
+  (segment (start 120.75 87.5) (end 120.75 75.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 0f8deb42-cfd9-4e43-832d-87951c77804c))
+  (segment (start 122.75 77.75) (end 157.25 77.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 16c333f5-cafd-431e-b0df-e44abc8ea188))
+  (segment (start 120.75 75.75) (end 159.25 75.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 22c62264-c93e-4f8f-a742-da66650f1362))
+  (segment (start 121.75 88.5) (end 120.75 87.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp 268dc7a5-3505-4036-a633-2617908b9690))
+  (segment (start 156.25 96.25) (end 123.75 96.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp 3ee078e7-cf6c-41f8-a0c2-2cd45b049937))
+  (segment (start 122.75 86.5) (end 122.75 77.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 40c3052f-0396-4a46-b3fa-6b4c6a16de33))
+  (segment (start 122.75 88) (end 121.75 87) (width 0.5) (layer "F.Cu") (net 1) (tstamp 4101620a-2a79-4e6e-8e1d-bf829450c9b1))
+  (segment (start 121.75 98.25) (end 121.75 88.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp 414f8c88-1dea-4c5d-a0f2-1523208105cf))
+  (segment (start 158.25 98.25) (end 121.75 98.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp 5c46ec86-af8a-44fb-be1c-3d4635fa3f0e))
+  (segment (start 120.75 99.25) (end 120.75 89) (width 0.5) (layer "F.Cu") (net 1) (tstamp 60200238-7998-4322-b4c4-690435197a22))
+  (segment (start 121.75 87) (end 121.75 76.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp 66763d53-2466-4eb1-9d6b-4cf1b656dba8))
+  (segment (start 122.75 97.25) (end 122.75 88) (width 0.5) (layer "F.Cu") (net 1) (tstamp 725c6367-bdd6-4c92-93f9-f3d499bc1906))
+  (segment (start 157.25 97.25) (end 122.75 97.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp 868220b1-e743-4ad6-a3d3-5e9a239b09b1))
+  (segment (start 123.75 87.5) (end 122.75 86.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp 9403107e-d81b-4d6c-b2f3-00a7aa561ef6))
+  (segment (start 156.25 91) (end 156.25 96.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp a9a8bbb4-a238-4d65-a50a-9efdc37f8ebb))
+  (segment (start 158.25 76.75) (end 158.25 98.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp b40c051d-70e2-498d-8009-54690fa3ad5c))
+  (segment (start 159.25 75.75) (end 159.25 99.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp b6b1e47d-5f64-4ab8-a790-d69183999a6e))
+  (segment (start 157.25 77.75) (end 157.25 97.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp ba577c94-1736-463b-ae74-0ca3c4232445))
+  (segment (start 123.75 78.75) (end 123.75 86) (width 0.5) (layer "F.Cu") (net 1) (tstamp bca7f3f6-6f6f-41fc-82d5-8c2c6329b9da))
+  (segment (start 123.75 96.25) (end 123.75 87.5) (width 0.5) (layer "F.Cu") (net 1) (tstamp c63a9f28-14ca-4dc6-a054-8728d9680017))
+  (segment (start 155.25 90) (end 156.25 91) (width 0.5) (layer "F.Cu") (net 1) (tstamp c7c917dc-d0c5-40bd-97c0-684e30b453db))
+  (segment (start 159.25 99.25) (end 120.75 99.25) (width 0.5) (layer "F.Cu") (net 1) (tstamp d1183f62-4b08-4941-ba74-f21af9058c45))
+  (segment (start 156.25 78.75) (end 123.75 78.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp db682c5e-aa23-42af-afb6-fe603960abfa))
+  (segment (start 155.25 85) (end 156.25 84) (width 0.5) (layer "F.Cu") (net 1) (tstamp e5dbb9cf-f385-4a4a-bfb0-24904d7522c6))
+  (segment (start 121.75 76.75) (end 158.25 76.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp ef11e11f-f526-4880-ace0-45d0276eda67))
+  (segment (start 156.25 84) (end 156.25 78.75) (width 0.5) (layer "F.Cu") (net 1) (tstamp fe77ed92-f039-40f3-82ee-9539cbc5f9dc))
+  (via (at 120.75 89) (size 0.9) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp bdda5352-2bc7-425d-bdc2-b2b4c22af0b5))
+  (via (at 158.25 87.5) (size 0.9) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp c63ff0fe-b32f-46a9-9f52-eef0a0aae639))
+  (via (at 123.75 86) (size 0.9) (drill 0.5) (layers "F.Cu" "B.Cu") (net 1) (tstamp cc6fad1b-a126-400c-8170-a297449c02d2))
+  (segment (start 158.25 87.5) (end 155.25 87.5) (width 0.8) (layer "B.Cu") (net 1) (tstamp aeb14c37-20e3-43d0-aa59-c2d15d2febb5))
+  (segment (start 120.75 89) (end 123.75 86) (width 0.5) (layer "B.Cu") (net 1) (tstamp b7603758-2e25-4b7e-aab5-078c96a3b0c5))
+
+)
diff --git a/PCB/pn532_ant/pn532_ant.kicad_prl b/PCB/pn532_ant/pn532_ant.kicad_prl
new file mode 100644
index 0000000..396eb5e
--- /dev/null
+++ b/PCB/pn532_ant/pn532_ant.kicad_prl
@@ -0,0 +1,75 @@
+{
+  "board": {
+    "active_layer": 37,
+    "active_layer_preset": "All Copper Layers",
+    "auto_track_width": true,
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "ratsnest_display_mode": 0,
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": true,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      8,
+      9,
+      10,
+      11,
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+      27,
+      28,
+      29,
+      30,
+      32,
+      33,
+      34,
+      35,
+      36
+    ],
+    "visible_layers": "fffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "meta": {
+    "filename": "pn532_ant.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}
diff --git a/PCB/pn532_ant/pn532_ant.kicad_pro b/PCB/pn532_ant/pn532_ant.kicad_pro
new file mode 100644
index 0000000..8a9a41e
--- /dev/null
+++ b/PCB/pn532_ant/pn532_ant.kicad_pro
@@ -0,0 +1,420 @@
+{
+  "board": {
+    "design_settings": {
+      "defaults": {
+        "board_outline_line_width": 0.09999999999999999,
+        "copper_line_width": 0.19999999999999998,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.049999999999999996,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.09999999999999999,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 1.0,
+          "height": 1.7,
+          "width": 1.7
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.508
+        }
+      },
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "copper_edge_clearance": "error",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint_type_mismatch": "error",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zone_has_empty_net": "error",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_copper_edge_clearance": 0.0,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.19999999999999998,
+        "min_microvia_drill": 0.09999999999999999,
+        "min_silk_clearance": 0.0,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.19999999999999998,
+        "min_via_annular_width": 0.049999999999999996,
+        "min_via_diameter": 0.39999999999999997,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "use_height_for_length_calcs": true
+      },
+      "track_widths": [],
+      "via_dimensions": [],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "layer_presets": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
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+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_label_syntax": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "pn532_ant.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12.0,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.25,
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6.0
+      }
+    ],
+    "meta": {
+      "version": 2
+    },
+    "net_colors": null
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "drawing": {
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_external_command": "spice \"%I\"",
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "3356817f-7cc4-43ea-be21-74d4ae2f3bc9",
+      ""
+    ]
+  ],
+  "text_variables": {}
+}
diff --git a/PCB/pn532_ant/pn532_ant.kicad_sch b/PCB/pn532_ant/pn532_ant.kicad_sch
new file mode 100644
index 0000000..244fcd6
--- /dev/null
+++ b/PCB/pn532_ant/pn532_ant.kicad_sch
@@ -0,0 +1,125 @@
+(kicad_sch (version 20211123) (generator eeschema)
+
+  (uuid 3356817f-7cc4-43ea-be21-74d4ae2f3bc9)
+
+  (paper "A4")
+
+  (lib_symbols
+    (symbol "Connector:Conn_01x03_Female" (pin_names (offset 1.016) hide) (in_bom yes) (on_board yes)
+      (property "Reference" "J" (id 0) (at 0 5.08 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Value" "Conn_01x03_Female" (id 1) (at 0 -5.08 0)
+        (effects (font (size 1.27 1.27)))
+      )
+      (property "Footprint" "" (id 2) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "Datasheet" "~" (id 3) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_keywords" "connector" (id 4) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_description" "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)" (id 5) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (property "ki_fp_filters" "Connector*:*_1x??_*" (id 6) (at 0 0 0)
+        (effects (font (size 1.27 1.27)) hide)
+      )
+      (symbol "Conn_01x03_Female_1_1"
+        (arc (start 0 -2.032) (mid -0.508 -2.54) (end 0 -3.048)
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (polyline
+          (pts
+            (xy -1.27 -2.54)
+            (xy -0.508 -2.54)
+          )
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (polyline
+          (pts
+            (xy -1.27 0)
+            (xy -0.508 0)
+          )
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (polyline
+          (pts
+            (xy -1.27 2.54)
+            (xy -0.508 2.54)
+          )
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (arc (start 0 0.508) (mid -0.508 0) (end 0 -0.508)
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (arc (start 0 3.048) (mid -0.508 2.54) (end 0 2.032)
+          (stroke (width 0.1524) (type default) (color 0 0 0 0))
+          (fill (type none))
+        )
+        (pin passive line (at -5.08 2.54 0) (length 3.81)
+          (name "Pin_1" (effects (font (size 1.27 1.27))))
+          (number "1" (effects (font (size 1.27 1.27))))
+        )
+        (pin passive line (at -5.08 0 0) (length 3.81)
+          (name "Pin_2" (effects (font (size 1.27 1.27))))
+          (number "2" (effects (font (size 1.27 1.27))))
+        )
+        (pin passive line (at -5.08 -2.54 0) (length 3.81)
+          (name "Pin_3" (effects (font (size 1.27 1.27))))
+          (number "3" (effects (font (size 1.27 1.27))))
+        )
+      )
+    )
+  )
+
+  (junction (at 121.92 69.85) (diameter 0) (color 0 0 0 0)
+    (uuid 17ea6907-d556-4c19-b64d-2403c596097e)
+  )
+
+  (wire (pts (xy 121.92 69.85) (xy 121.92 72.39))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 646f6b8b-a5f8-411e-bdca-4e66f416017a)
+  )
+  (wire (pts (xy 121.92 67.31) (xy 121.92 69.85))
+    (stroke (width 0) (type default) (color 0 0 0 0))
+    (uuid 73b76b42-d4a9-4547-8cac-2a52a96d7299)
+  )
+
+  (symbol (lib_id "Connector:Conn_01x03_Female") (at 127 69.85 0) (unit 1)
+    (in_bom yes) (on_board yes) (fields_autoplaced)
+    (uuid 3040ac1b-e98b-4c8c-af52-d5cbf9fbe1c8)
+    (property "Reference" "J1" (id 0) (at 128.27 68.5799 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Value" "Conn_01x03_Female" (id 1) (at 128.27 71.1199 0)
+      (effects (font (size 1.27 1.27)) (justify left))
+    )
+    (property "Footprint" "pn532_ant:3PINS" (id 2) (at 127 69.85 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "Datasheet" "~" (id 3) (at 127 69.85 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (pin "1" (uuid 8d42853f-ba48-43c0-8f09-6901896f6863))
+    (pin "2" (uuid f60715ce-ecb7-4762-bdd2-03c3c704e21a))
+    (pin "3" (uuid 1ae47f3e-6b7b-40f8-8657-71ccd433b341))
+  )
+
+  (sheet_instances
+    (path "/" (page "1"))
+  )
+
+  (symbol_instances
+    (path "/3040ac1b-e98b-4c8c-af52-d5cbf9fbe1c8"
+      (reference "J1") (unit 1) (value "Conn_01x03_Female") (footprint "pn532_ant:3PINS")
+    )
+  )
+)
diff --git a/PCB/pn532_ant/pn532_ant.pretty/3PINS.kicad_mod b/PCB/pn532_ant/pn532_ant.pretty/3PINS.kicad_mod
new file mode 100644
index 0000000..c542d36
--- /dev/null
+++ b/PCB/pn532_ant/pn532_ant.pretty/3PINS.kicad_mod
@@ -0,0 +1,17 @@
+(footprint "3PINS" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 0)
+  (attr smd)
+  (fp_text reference "REF**" (at 0 -5.5 unlocked) (layer "F.SilkS")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 5dcb51aa-11a7-495a-a7cd-ad29bdd5c872)
+  )
+  (fp_text value "3PINS" (at 0 5 unlocked) (layer "F.Fab") hide
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 99415deb-ab7a-47cb-8ca8-26b282d0612c)
+  )
+  (fp_rect (start -1.5 -4) (end 1.5 4) (layer "F.SilkS") (width 0.12) (fill none) (tstamp 5c01989c-765a-4b92-b821-1b38dcb3e4d5))
+  (pad "1" thru_hole oval (at 0 -2.5) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp edde7848-bbad-4244-afc6-f450e911c64e))
+  (pad "2" thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp b4f9338f-0d34-4308-822b-c58424bf2c7f))
+  (pad "3" thru_hole oval (at 0 2.5) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (tstamp 1ab618e4-710b-4777-9625-a84cc5405a7d))
+)
diff --git a/Production/PCB/pn532_ant_v1.0.zip b/Production/PCB/pn532_ant_v1.0.zip
new file mode 100644
index 0000000..21ce038
Binary files /dev/null and b/Production/PCB/pn532_ant_v1.0.zip differ