EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# LAN8720A
#
DEF LAN8720A IC 0 40 Y Y 1 F N
F0 "IC" -700 900 50 H V L CNN
F1 "LAN8720A" -700 -900 50 H V L CNN
F2 "agg:QFN-24-EP-MICROCHIP" -700 -1000 50 H I L CNN
F3 "http://ww1.microchip.com/downloads/en/DeviceDoc/8720a.pdf" -700 -1100 50 H I L CNN
F4 "2292577" -700 -1200 50 H I L CNN "Farnell"
DRAW
S -700 850 700 -850 0 1 0 f
X XTAL2 4 -800 800 100 R 50 50 0 0 B
X XTAL1/CLKIN 5 -800 700 100 R 50 50 0 0 I
X ~INT~/REFCLKO 14 -800 500 100 R 50 50 0 0 B
X ~RST~ 15 -800 400 100 R 50 50 0 0 I
X MDIO 12 -800 200 100 R 50 50 0 0 B
X MDC 13 -800 100 100 R 50 50 0 0 B
X TXD0 17 -800 -100 100 R 50 50 0 0 I
X TXD1 18 -800 -200 100 R 50 50 0 0 I
X TXEN 16 -800 -300 100 R 50 50 0 0 I
X RXD0/MODE0 8 -800 -400 100 R 50 50 0 0 B
X RXD1/MODE1 7 -800 -500 100 R 50 50 0 0 B
X RXER/PHYAD0 10 -800 -600 100 R 50 50 0 0 B
X CRS_DV/MODE2 11 -800 -700 100 R 50 50 0 0 B
X TX+ 21 800 800 100 L 50 50 0 0 B
X TX- 20 800 700 100 L 50 50 0 0 B
X RX+ 23 800 600 100 L 50 50 0 0 B
X RX- 22 800 500 100 L 50 50 0 0 B
X LED1/REGOFF 3 800 300 100 L 50 50 0 0 B
X LED2/~INTSEL~ 2 800 200 100 L 50 50 0 0 B
X RBIAS 24 800 0 100 L 50 50 0 0 P
X VDD1A 19 800 -200 100 L 50 50 0 0 W
X VDD2A 1 800 -300 100 L 50 50 0 0 W
X VDDCR 6 800 -400 100 L 50 50 0 0 P
X VDDIO 9 800 -500 100 L 50 50 0 0 W
X VSS EP 800 -600 100 L 50 50 0 0 W
ENDDRAW
ENDDEF
#
#End Library