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.. | ||
749010012a.yaml | ||
bga-64-05p-st.yaml | ||
bga-144-08p-st.yaml | ||
bga-216-08p-st.yaml | ||
blackpill.yaml | ||
chipfet-1206-8.yaml | ||
dfn-6-ep-bgm.yaml | ||
dfn-6-ep-onsemi.yaml | ||
dfn-8-ep-ad.yaml | ||
dfn-8-ep-microchip.yaml | ||
dfn-8-ep-ti.yaml | ||
dfn-10-ep-lt.yaml | ||
dfn-10-ep-max.yaml | ||
dfn-10-sl18860dc.yaml | ||
dfn-12-ep-lt-dd.yaml | ||
dfn-12-ep-lt-df.yaml | ||
dfn-16-ep-ltc-de.yaml | ||
dl1636.yaml | ||
dq1225.yaml | ||
dub0008a.yaml | ||
fa267x.yaml | ||
ga3459-bl.yaml | ||
htqfp-64.yaml | ||
htssop-14.yaml | ||
hvqfn24-nxp.yaml | ||
lab01.yaml | ||
lattice-bg121.yaml | ||
lattice-bg256.yaml | ||
lattice-bg381.yaml | ||
lattice-sg48.yaml | ||
lfcsp-16-ad.yaml | ||
lga-16l-st.yaml | ||
lpcc-16-hmc5883l.yaml | ||
lqfp-32.yaml | ||
lqfp-48.yaml | ||
lqfp-64.yaml | ||
lqfp-100.yaml | ||
lqfp-144.yaml | ||
ltm8078.yaml | ||
max-m8q.yaml | ||
ms5611.yaml | ||
msop-8-ep-ad.yaml | ||
msop-8.yaml | ||
msop-10-ep-ti.yaml | ||
msop-10.yaml | ||
nuf8401mn.yaml | ||
qfn-16-ep-nxp.yaml | ||
qfn-16-ep-skyworks.yaml | ||
qfn-16-ep-ti.yaml | ||
qfn-20-ep-max.yaml | ||
qfn-20-ep-si3402-b.yaml | ||
qfn-20-ep-si.yaml | ||
qfn-24-ep-max.yaml | ||
qfn-24-ep-micrel.yaml | ||
qfn-24-ep-microchip.yaml | ||
qfn-24-ep-si.yaml | ||
qfn-24-mpu9250.yaml | ||
qfn-32-bgt24mtr.yaml | ||
qfn-32-ep-st.yaml | ||
qfn-32-ep-ti.yaml | ||
qfn-36-ep-microchip-sqfn.yaml | ||
qfn-40-ep-ltc-uj.yaml | ||
qfn-40-ep-ublox.yaml | ||
qfn-48-ep-st.yaml | ||
qfn-64-ep-ltc-up.yaml | ||
README.md | ||
rfm69.yaml | ||
sc-70-5.yaml | ||
sc-70-6.yaml | ||
sg5032cxn.yaml | ||
sg7050cxn.yaml | ||
soic-8-ep.yaml | ||
soic-8.yaml | ||
soic-14.yaml | ||
soic-16-w.yaml | ||
soic-16.yaml | ||
soic-24-w.yaml | ||
sot-23-5.yaml | ||
sot-23-6.yaml | ||
sot-23.yaml | ||
sot-323.yaml | ||
sot-666.yaml | ||
ssop-20.yaml | ||
tdfn-8.yaml | ||
to-269aa.yaml | ||
tslp7-4.yaml | ||
tssop-14.yaml | ||
tssop-16.yaml | ||
tssop-20-ep.yaml | ||
tssop-20.yaml | ||
tssop-24.yaml | ||
tssop-28.yaml | ||
ufdfn-8.yaml | ||
uqfn-10l.yaml | ||
us8-3.1mm.yaml | ||
vaa024.yaml | ||
vo618a-smd-4-7.yaml | ||
wson-8-ep-6x5.yaml | ||
wson-10-ep-ti-2x3.yaml | ||
xo-50x32.yaml | ||
xtal-25x20.yaml |
Names in the following format: FAMILY-PINS[-MOD][-EP][-SPECIAL]
MOD might be "W" for wide.
SPECIAL might refer to a manufacturer's specific modified footprint.
Examples: SOIC-8, SOIC-16-W, QFN48-EP
Unless otherwise noted, all pad dimensions are as per IPC-7351B nominal, while fab layer annotatons are as per IPC-7351B package maximums.
Keys (QFN/QFP/DFN/DFP)
rows
: either 2 or 4, for dual or quad packages.pins
: total number of pinspins_first_row
: optional when rows is 4, number of pins in row containing pin 1, for rectangular chips. Must also giverow_pitch
as a tuple. Defaults to pins/rows i.e. a square chip. Not applicable to 2-row chips.row_pitch
: spacing between centres of rows of pins, or tuple of [horizontal pitch, vertical pitch] only ifpins_first_row
is given, where horizontal pitch is pin 1 to its opposite pin.pad_shape
: (width, height) of a pad for a pin.ep_shape
: (width, height) of an exposed pad underneath the chip. Leave out this parameter to skip the exposed pad.ep_mask_shape
: (width, height, w_gap, h_gap) of mask apertures on EP. Multiple apertures will be created to fill. Leave out this parameter to cover the EP in mask aperture.ep_paste_shape
: (width, height, w_gap, h_gap) of paste apertures on EP. Multiple apertures will be created to fill. Leave out this parameter to cover the EP in paste aperture.ep_vias
: (drill, size, gap) of via hits to put in the EP. Leave out this parameter to not place any vias.pin_shape
: (width, height) of the chip package pins (for Fab layer). Use negative widths for internal pins (e.g., QFNs).
Keys (BGA only)
rows
: number of rows (identified by letters)cols
: number of columns (identified by numbers)pad_shape
: diameter of a pad for a pin.mask_shape
: diameter of solder mask opening for a pin.pin_shape
: diameter of the chip package pins (for Fab layer).letters
: Optional string of sequential letters to use naming rows, defaults to standard ABCDEFGHJKLMNPRTUVWY.
Keys (Common)
name
: Name to generate footprint underdescription
: Footprint descriptionskip_pins
: optional, list of pin numbers to skip (leaving remaining pins in sequential order). Generates packages like SOT-23-3. Each list entry may be an exact pin to skip (eg 12 or B6) or a range of numbers or letters or both (eg 5-8 or B3-5 or A-C6 or A-C3-5)pin_pitch
: spacing between centres of adjacent pins.chip_shape
: (width, height) of the actual chip package (for Fab layer).silk
: "internal" or "external" or None. Default is "internal" unlessep_shape
is given in or on BGAs in which case default is "external".model
: dictionary containingpath
string to 3d model, and optionaloffset
,scale
, androtate
lists of [x, y, z] values.
All lengths are in millimetres.