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482 lines
16 KiB
C
482 lines
16 KiB
C
/**************************************************************************//**
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* @file FMC.h
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* @version V3.0
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* $Revision: 10 $
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* $Date: 15/07/02 11:21a $
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* @brief NUC123 Series Flash Memory Controller Driver Header File
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef __FMC_H__
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#define __FMC_H__
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#include "NUC123.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/** @addtogroup Standard_Driver Standard Driver
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@{
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*/
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/** @addtogroup FMC_Driver FMC Driver
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@{
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*/
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/** @addtogroup FMC_EXPORTED_CONSTANTS FMC Exported Constants
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@{
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*/
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/*---------------------------------------------------------------------------------------------------------*/
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/* Define Base Address */
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/*---------------------------------------------------------------------------------------------------------*/
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#define FMC_APROM_BASE 0x00000000UL /*!< APROM Base Address */
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#define FMC_LDROM_BASE 0x00100000UL /*!< LDROM Base Address */
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#define FMC_CONFIG_BASE 0x00300000UL /*!< CONFIG Base Address */
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#define FMC_FLASH_PAGE_SIZE 0x200 /*!< Flash Page Size (512 Bytes) */
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#define FMC_LDROM_SIZE 0x1000 /*!< LDROM Size (4K Bytes) */
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/*---------------------------------------------------------------------------------------------------------*/
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/* ISPCON constant definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define FMC_ISPCON_BS_LDROM 0x2 /*!< ISPCON setting to select to boot from LDROM */
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#define FMC_ISPCON_BS_APROM 0x0 /*!< ISPCON setting to select to boot from APROM */
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/*---------------------------------------------------------------------------------------------------------*/
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/* ISPCMD constant definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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#define FMC_ISPCMD_READ 0x00 /*!< ISP Command: Read Flash */
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#define FMC_ISPCMD_PROGRAM 0x21 /*!< ISP Command: Program Flash */
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#define FMC_ISPCMD_PAGE_ERASE 0x22 /*!< ISP Command: Page Erase Flash */
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#define FMC_ISPCMD_VECMAP 0x2e /*!< ISP Command: Set VECMAP */
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#define FMC_ISPCMD_READ_UID 0x04 /*!< ISP Command: Read Unique ID */
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#define FMC_ISPCMD_READ_CID 0x0B /*!< ISP Command: Read Company ID */
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#define FMC_ISPCMD_READ_DID 0x0C /*!< ISP Command: Read Device ID */
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/*@}*/ /* end of group FMC_EXPORTED_CONSTANTS */
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/** @addtogroup FMC_EXPORTED_FUNCTIONS FMC Exported Functions
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@{
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*/
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/*---------------------------------------------------------------------------------------------------------*/
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/* FMC Macro Definitions */
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/*---------------------------------------------------------------------------------------------------------*/
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/**
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* @brief Enable ISP Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will set ISPEN bit of ISPCON control register to enable ISP function.
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*
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*/
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#define FMC_ENABLE_ISP() (FMC->ISPCON |= FMC_ISPCON_ISPEN_Msk)
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/**
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* @brief Disable ISP Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will clear ISPEN bit of ISPCON control register to disable ISP function.
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*
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*/
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#define FMC_DISABLE_ISP() (FMC->ISPCON &= ~FMC_ISPCON_ISPEN_Msk)
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/**
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* @brief Enable LDROM Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will set LDUEN bit of ISPCON control register to enable LDROM update function.
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* User needs to set LDUEN bit before they can update LDROM.
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*
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*/
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#define FMC_ENABLE_LD_UPDATE() (FMC->ISPCON |= FMC_ISPCON_LDUEN_Msk)
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/**
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* @brief Disable LDROM Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will set ISPEN bit of ISPCON control register to disable LDROM update function.
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*
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*/
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#define FMC_DISABLE_LD_UPDATE() (FMC->ISPCON &= ~FMC_ISPCON_LDUEN_Msk) /*!< Disable LDROM Update Function */
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/**
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* @brief Enable User Configuration Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will set CFGUEN bit of ISPCON control register to enable User Configuration update function.
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* User needs to set CFGUEN bit before they can update User Configuration area.
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*
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*/
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#define FMC_ENABLE_CFG_UPDATE() (FMC->ISPCON |= FMC_ISPCON_CFGUEN_Msk)
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/**
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* @brief Disable User Configuration Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will clear CFGUEN bit of ISPCON control register to disable User Configuration update function.
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*
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*/
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#define FMC_DISABLE_CFG_UPDATE() (FMC->ISPCON &= ~FMC_ISPCON_CFGUEN_Msk) /*!< Disable CONFIG Update Function */
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/**
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* @brief Enable APROM Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will set APUEN bit of ISPCON control register to enable APROM update function.
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* User needs to set APUEN bit before they can update APROM in APROM boot mode.
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*
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*/
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#define FMC_ENABLE_AP_UPDATE() (FMC->ISPCON |= FMC_ISPCON_APUEN_Msk)
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/**
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* @brief Disable APROM Update Function
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*
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* @param None
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*
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* @return None
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*
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* @details This function will clear APUEN bit of ISPCON control register to disable APROM update function.
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*
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*/
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#define FMC_DISABLE_AP_UPDATE() (FMC->ISPCON &= ~FMC_ISPCON_APUEN_Msk) /*!< Disable APROM Update Function */
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/**
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* @brief Get ISP fail flag
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*
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* @param None
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*
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* @retval 0 Previous ISP command execution result is successful
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* @retval 1 Previous ISP command execution result is fail
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*
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* @details ISPFF flag of ISPCON is used to indicate ISP command success or fail.
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* This function will return the ISPFF flag to identify ISP command OK or fail.
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*
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*/
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#define FMC_GET_FAIL_FLAG() ((FMC->ISPCON & FMC_ISPCON_ISPFF_Msk) ? 1 : 0)
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/**
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* @brief Select booting from APROM
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*
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* @param None
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*
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* @return None
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*
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* @details If MCU is working without IAP, user need to set BS bit of ISPCON and reset CPU to execute the code of LDROM/APROM.
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* This function is used to set BS bit of ISPCON to boot to APROM.
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*
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* @note To valid new BS bit setting, user also need to trigger CPU reset or System Reset Request after setting BS bit.
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*
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*/
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#define FMC_SET_APROM_BOOT() (FMC->ISPCON &= ~FMC_ISPCON_BS_Msk)
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/**
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* @brief Select booting from APROM
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*
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* @param None
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*
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* @return None
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*
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* @details If MCU is working without IAP, user need to set/clear BS bit of ISPCON and reset CPU to execute the code of APROM/LDROM.
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* This function is used to clear BS bit of ISPCON to boot to LDROM.
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*
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* @note To valid new BS bit setting, user also need to trigger CPU reset or System Reset Request after clear BS bit.
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*
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*/
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#define FMC_SET_LDROM_BOOT() (FMC->ISPCON |= FMC_ISPCON_BS_Msk)
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/*---------------------------------------------------------------------------------------------------------*/
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/* inline functions */
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/*---------------------------------------------------------------------------------------------------------*/
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/**
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* @brief Program 32-bit data into specified address of flash
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*
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* @param[in] u32addr Flash address include APROM, LDROM, Data Flash, and CONFIG
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* @param[in] u32data 32-bit Data to program
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*
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* @return None
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*
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* @details To program word data into Flash include APROM, LDROM, Data Flash, and CONFIG.
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* The corresponding functions in CONFIG are listed in FMC section of Technical Reference Manual.
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*
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*/
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static __INLINE void FMC_Write(uint32_t u32addr, uint32_t u32data)
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{
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FMC->ISPCMD = FMC_ISPCMD_PROGRAM; /* Set ISP Command Code */
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FMC->ISPADR = u32addr; /* Set Target ROM Address. The address must be word alignment. */
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FMC->ISPDAT = u32data; /* Set Data to Program */
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FMC->ISPTRG = 0x1; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG); /* Waiting for ISP Done */
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}
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/**
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* @brief Read 32-bit Data from specified address of flash
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*
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* @param[in] u32addr Flash address include APROM, LDROM, Data Flash, and CONFIG
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*
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* @return The data of specified address
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*
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* @details To read word data from Flash include APROM, LDROM, Data Flash, and CONFIG.
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*
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*/
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static __INLINE uint32_t FMC_Read(uint32_t u32addr)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ; /* Set ISP Command Code */
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FMC->ISPADR = u32addr; /* Set Target ROM Address. The address must be word alignment. */
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FMC->ISPTRG = 0x1; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG); /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief Flash page erase
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*
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* @param[in] u32addr Flash address including APROM, LDROM, Data Flash, and CONFIG
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*
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* @details To do flash page erase. The target address could be APROM, LDROM, Data Flash, or CONFIG.
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* The page size is 512 bytes.
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*
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* @retval 0 Success
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* @retval -1 Erase failed
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*
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*/
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static __INLINE int32_t FMC_Erase(uint32_t u32addr)
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{
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FMC->ISPCMD = FMC_ISPCMD_PAGE_ERASE; /* Set ISP Command Code */
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FMC->ISPADR = u32addr; /* Set Target ROM Address. The address must be page alignment. */
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FMC->ISPTRG = 0x1; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG); /* Waiting for ISP Done */
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/* Check ISPFF flag to know whether erase OK or fail. */
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if(FMC->ISPCON & FMC_ISPCON_ISPFF_Msk)
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{
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FMC->ISPCON |= FMC_ISPCON_ISPFF_Msk;
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return -1;
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}
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return 0;
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}
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/**
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* @brief Read Unique ID
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*
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* @param[in] u8index UID index. 0 = UID[31:0], 1 = UID[63:32], 2 = UID[95:64]
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*
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* @return The 32-bit unique ID data of specified UID index.
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*
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* @details To read out 96-bit Unique ID.
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*
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*/
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static __INLINE uint32_t FMC_ReadUID(uint8_t u8index)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ_UID; /* Set ISP Command Code */
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FMC->ISPADR = (u8index << 2); /* Set UID Address. It must be word alignment. */
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FMC->ISPTRG = 0x1; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG); /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief Read company ID
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*
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* @param None
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*
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* @return The company ID (32-bit)
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*
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* @details The company ID of Nuvoton is fixed to be 0xDA
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*
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*/
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static __INLINE uint32_t FMC_ReadCID(void)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ_CID; /* Set ISP Command Code */
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FMC->ISPADR = 0x0; /* Must keep 0x0 when read CID */
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FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk) ; /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief Read device ID
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*
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* @param None
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*
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* @return The device ID (32-bit)
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*
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* @details This function is used to read device ID.
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*
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*/
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static __INLINE uint32_t FMC_ReadDID(void)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ_DID; /* Set ISP Command Code */
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FMC->ISPADR = 0; /* Must keep 0x0 when read DID */
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FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk); /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief Read product ID
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*
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* @param None
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*
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* @return The product ID (32-bit)
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*
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* @details This function is used to read product ID.
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*
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*/
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static __INLINE uint32_t FMC_ReadPID(void)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ_DID; /* Set ISP Command Code */
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FMC->ISPADR = 0x04; /* Must keep 0x4 when read PID */
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FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk); /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief To read UCID
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*
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* @param[in] u32Index Index of the UCID to read. u32Index must be 0, 1, 2, or 3.
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*
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* @return The UCID of specified index
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*
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* @details This function is used to read unique chip ID (UCID).
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*
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*/
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static __INLINE uint32_t FMC_ReadUCID(uint32_t u32Index)
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{
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FMC->ISPCMD = FMC_ISPCMD_READ_UID; /* Set ISP Command Code */
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FMC->ISPADR = (0x04 * u32Index) + 0x10; /* The UCID is at offset 0x10 with word alignment. */
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FMC->ISPTRG = FMC_ISPTRG_ISPGO_Msk; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG & FMC_ISPTRG_ISPGO_Msk); /* Waiting for ISP Done */
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return FMC->ISPDAT;
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}
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/**
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* @brief Set vector mapping address
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*
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* @param[in] u32PageAddr The page address to remap to address 0x0. The address must be page alignment.
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*
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* @return None
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*
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* @details This function is used to set VECMAP to map specified page to vector page (0x0).
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*
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* @note
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* VECMAP only valid when new IAP function is enabled. (CBS = 10'b or 00'b)
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*
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*/
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static __INLINE void FMC_SetVectorPageAddr(uint32_t u32PageAddr)
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{
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FMC->ISPCMD = FMC_ISPCMD_VECMAP; /* Set ISP Command Code */
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FMC->ISPADR = u32PageAddr; /* The address of specified page which will be map to address 0x0. It must be page alignment. */
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FMC->ISPTRG = 0x1; /* Trigger to start ISP procedure */
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__ISB(); /* To make sure ISP/CPU be Synchronized */
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while(FMC->ISPTRG); /* Waiting for ISP Done */
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}
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/**
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* @brief Get current vector mapping address.
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*
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* @param None
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*
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* @return The current vector mapping address.
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*
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* @details To get VECMAP value which is the page address for remapping to vector page (0x0).
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*
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* @note
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* VECMAP only valid when new IAP function is enabled. (CBS = 10'b or 00'b)
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*
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*/
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static __INLINE uint32_t FMC_GetVECMAP(void)
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{
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return (FMC->ISPSTA & FMC_ISPSTA_VECMAP_Msk);
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}
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extern void FMC_Open(void);
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extern void FMC_Close(void);
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extern void FMC_EnableAPUpdate(void);
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extern void FMC_DisableAPUpdate(void);
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extern void FMC_EnableConfigUpdate(void);
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extern void FMC_DisableConfigUpdate(void);
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extern void FMC_EnableLDUpdate(void);
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extern void FMC_DisableLDUpdate(void);
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extern int32_t FMC_ReadConfig(uint32_t *u32Config, uint32_t u32Count);
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extern int32_t FMC_WriteConfig(uint32_t *u32Config, uint32_t u32Count);
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extern void FMC_SetBootSource(int32_t i32BootSrc);
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extern int32_t FMC_GetBootSource(void);
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extern uint32_t FMC_ReadDataFlashBaseAddr(void);
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/*@}*/ /* end of group FMC_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group FMC_Driver */
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/*@}*/ /* end of group Standard_Driver */
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#ifdef __cplusplus
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}
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#endif
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#endif
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