diff --git a/src/common/ide.cpp b/src/common/ide.cpp index e1703de..b3dd991 100644 --- a/src/common/ide.cpp +++ b/src/common/ide.cpp @@ -3,7 +3,7 @@ #include #include "common/ide.hpp" #include "common/util.hpp" -#include "ps1/registers.h" +#include "ps1/registers573.h" #include "ps1/system.h" /* diff --git a/src/common/ide.hpp b/src/common/ide.hpp index 671bd83..00fb71a 100644 --- a/src/common/ide.hpp +++ b/src/common/ide.hpp @@ -3,7 +3,7 @@ #include #include -#include "ps1/registers.h" +#include "ps1/registers573.h" namespace ide { diff --git a/src/common/io.cpp b/src/common/io.cpp index 91f7a03..4c724f6 100644 --- a/src/common/io.cpp +++ b/src/common/io.cpp @@ -3,6 +3,7 @@ #include #include "common/io.hpp" #include "ps1/registers.h" +#include "ps1/registers573.h" #include "ps1/system.h" namespace io { diff --git a/src/common/io.hpp b/src/common/io.hpp index 6195e54..802d738 100644 --- a/src/common/io.hpp +++ b/src/common/io.hpp @@ -4,6 +4,7 @@ #include #include #include "ps1/registers.h" +#include "ps1/registers573.h" namespace io { diff --git a/src/common/rom.cpp b/src/common/rom.cpp index e33392e..d55f753 100644 --- a/src/common/rom.cpp +++ b/src/common/rom.cpp @@ -5,6 +5,7 @@ #include "common/rom.hpp" #include "common/util.hpp" #include "ps1/registers.h" +#include "ps1/registers573.h" namespace rom { diff --git a/src/common/spu.cpp b/src/common/spu.cpp index a3afd03..ade1717 100644 --- a/src/common/spu.cpp +++ b/src/common/spu.cpp @@ -65,12 +65,23 @@ void init(void) { } int getFreeChannel(void) { +#if 0 + // The status flag gets set when a channel stops or loops for the first + // time rather than when it actually goes silent (so it will be set early + // for e.g. short looping samples with a long release envelope, or samples + // looping indefinitely). uint32_t flags = SPU_FLAG_STATUS1 | (SPU_FLAG_STATUS2 << 16); for (int ch = 0; flags; ch++, flags >>= 1) { if (flags & 1) return ch; } +#else + for (int ch = 23; ch >= 0; ch--) { + if (!SPU_CH_ADSR_VOL(ch)) + return ch; + } +#endif return -1; } diff --git a/src/libc/malloc.c b/src/libc/malloc.c index f19b543..373dea9 100644 --- a/src/libc/malloc.c +++ b/src/libc/malloc.c @@ -150,8 +150,8 @@ void *realloc(void *ptr, size_t size) { if (!ptr) return malloc(size); - size_t _size = _align(size + sizeof(Block), 8); - Block *prev = (Block *) ((uintptr_t) ptr - sizeof(Block)); + size_t _size = _align(size + sizeof(Block), 8); + Block *prev = (Block *) ((uintptr_t) ptr - sizeof(Block)); // New memory block shorter? if (prev->size >= _size) { @@ -183,7 +183,7 @@ void *realloc(void *ptr, size_t size) { } // No luck. - void *new = malloc(_size); + void *new = malloc(size); if (!new) return 0; diff --git a/src/ps1/registers.h b/src/ps1/registers.h index 751d099..2ede3a3 100644 --- a/src/ps1/registers.h +++ b/src/ps1/registers.h @@ -248,64 +248,71 @@ typedef enum { /* CD-ROM drive */ typedef enum { - CDROM_STAT_BANK_BITMASK = 3 << 0, - CDROM_STAT_BANK_0 = 0 << 0, - CDROM_STAT_BANK_1 = 1 << 0, - CDROM_STAT_BANK_2 = 2 << 0, - CDROM_STAT_BANK_3 = 3 << 0, - CDROM_STAT_ADPCM_BUSY = 1 << 2, - CDROM_STAT_PARAM_EMPTY = 1 << 3, - CDROM_STAT_PARAM_FULL = 1 << 4, - CDROM_STAT_RESP_EMPTY = 1 << 5, - CDROM_STAT_DATA_EMPTY = 1 << 6, - CDROM_STAT_BUSY = 1 << 7 -} CDROMStatusFlag; + CDROM_HSTS_RA_BITMASK = 3 << 0, + CDROM_HSTS_ADPBUSY = 1 << 2, + CDROM_HSTS_PRMEMPT = 1 << 3, + CDROM_HSTS_PRMWRDY = 1 << 4, + CDROM_HSTS_RSLRRDY = 1 << 5, + CDROM_HSTS_DRQSTS = 1 << 6, + CDROM_HSTS_BUSYSTS = 1 << 7 +} CDROMHSTSFlag; typedef enum { - CDROM_REQ_START_IRQ_ENABLE = 1 << 5, - CDROM_REQ_BUFFER_WRITE = 1 << 6, - CDROM_REQ_BUFFER_READ = 1 << 7 -} CDROMRequestFlag; + CDROM_HINT_INT0 = 1 << 0, + CDROM_HINT_INT1 = 1 << 1, + CDROM_HINT_INT2 = 1 << 2, + CDROM_HINT_BFEMPT = 1 << 3, + CDROM_HINT_BFWRDY = 1 << 4 +} CDROMHINTFlag; typedef enum { - CDROM_IRQ_NONE = 0, - CDROM_IRQ_DATA = 1, - CDROM_IRQ_COMPLETE = 2, - CDROM_IRQ_ACKNOWLEDGE = 3, - CDROM_IRQ_DATA_END = 4, - CDROM_IRQ_ERROR = 5 -} CDROMIRQType; + CDROM_HCHPCTL_SMEN = 1 << 5, + CDROM_HCHPCTL_BFWR = 1 << 6, + CDROM_HCHPCTL_BFRD = 1 << 7 +} CDROMHCHPCTLFlag; typedef enum { - CDROM_CMDSTAT_ERROR = 1 << 0, - CDROM_CMDSTAT_SPINDLE_ON = 1 << 1, - CDROM_CMDSTAT_SEEK_ERROR = 1 << 2, - CDROM_CMDSTAT_ID_ERROR = 1 << 3, - CDROM_CMDSTAT_LID_OPEN = 1 << 4, - CDROM_CMDSTAT_READING = 1 << 5, - CDROM_CMDSTAT_SEEKING = 1 << 6, - CDROM_CMDSTAT_PLAYING = 1 << 7 -} CDROMCommandStatusFlag; + CDROM_HCLRCTL_CLRINT0 = 1 << 0, + CDROM_HCLRCTL_CLRINT1 = 1 << 1, + CDROM_HCLRCTL_CLRINT2 = 1 << 2, + CDROM_HCLRCTL_CLRBFEMPT = 1 << 3, + CDROM_HCLRCTL_CLRBFWRDY = 1 << 4, + CDROM_HCLRCTL_SMADPCLR = 1 << 5, + CDROM_HCLRCTL_CLRPRM = 1 << 6, + CDROM_HCLRCTL_CHPRST = 1 << 7 +} CDROMHCLRCTLFlag; typedef enum { - CDROM_MODE_CDDA = 1 << 0, - CDROM_MODE_AUTO_PAUSE = 1 << 1, - CDROM_MODE_CDDA_REPORT = 1 << 2, - CDROM_MODE_XA_FILTER = 1 << 3, - CDROM_MODE_IGNORE_LOC = 1 << 4, - CDROM_MODE_SIZE_2048 = 0 << 5, - CDROM_MODE_SIZE_2340 = 1 << 5, - CDROM_MODE_XA_ADPCM = 1 << 6, - CDROM_MODE_SPEED_1X = 0 << 7, - CDROM_MODE_SPEED_2X = 1 << 7 -} CDROMModeFlag; + CDROM_CI_SM = 1 << 0, + CDROM_CI_FS = 1 << 2, + CDROM_CI_BITLNGTH = 1 << 4, + CDROM_CI_EMPHASIS = 1 << 6 +} CDROMCIFlag; -#define CDROM_STAT _MMIO8(IO_BASE | 0x800) -#define CDROM_CMD _MMIO8(IO_BASE | 0x801) -#define CDROM_DATA _MMIO8(IO_BASE | 0x802) -#define CDROM_IRQ _MMIO8(IO_BASE | 0x803) +typedef enum { + CDROM_ADPCTL_ADPMUTE = 1 << 0, + CDROM_ADPCTL_CHNGATV = 1 << 5 +} CDROMADPCTLFlag; -#define CDROM_REG(N) _MMIO8((IO_BASE | 0x800) + (N)) +#define CDROM_HSTS _MMIO8(IO_BASE | 0x800) // All banks +#define CDROM_RESULT _MMIO8(IO_BASE | 0x801) // All banks +#define CDROM_RDDATA _MMIO8(IO_BASE | 0x802) // All banks +#define CDROM_HINTMSK_R _MMIO8(IO_BASE | 0x803) // Bank 0 +#define CDROM_HINTSTS _MMIO8(IO_BASE | 0x803) // Bank 1 + +#define CDROM_ADDRESS _MMIO8(IO_BASE | 0x800) // All banks +#define CDROM_COMMAND _MMIO8(IO_BASE | 0x801) // Bank 0 +#define CDROM_PARAMETER _MMIO8(IO_BASE | 0x802) // Bank 0 +#define CDROM_HCHPCTL _MMIO8(IO_BASE | 0x803) // Bank 0 +#define CDROM_WRDATA _MMIO8(IO_BASE | 0x801) // Bank 1 +#define CDROM_HINTMSK_W _MMIO8(IO_BASE | 0x802) // Bank 1 +#define CDROM_HCLRCTL _MMIO8(IO_BASE | 0x803) // Bank 1 +#define CDROM_CI _MMIO8(IO_BASE | 0x801) // Bank 2 +#define CDROM_ATV0 _MMIO8(IO_BASE | 0x802) // Bank 2 +#define CDROM_ATV1 _MMIO8(IO_BASE | 0x803) // Bank 2 +#define CDROM_ATV2 _MMIO8(IO_BASE | 0x801) // Bank 3 +#define CDROM_ATV3 _MMIO8(IO_BASE | 0x802) // Bank 3 +#define CDROM_ADPCTL _MMIO8(IO_BASE | 0x803) // Bank 3 /* GPU */ @@ -387,13 +394,14 @@ typedef enum { SPU_CTRL_ENABLE = 1 << 15 } SPUControlFlag; -#define SPU_CH_VOL_L(N) _MMIO16((IO_BASE | 0xc00) + (16 * (N))) -#define SPU_CH_VOL_R(N) _MMIO16((IO_BASE | 0xc02) + (16 * (N))) -#define SPU_CH_FREQ(N) _MMIO16((IO_BASE | 0xc04) + (16 * (N))) -#define SPU_CH_ADDR(N) _MMIO16((IO_BASE | 0xc06) + (16 * (N))) -#define SPU_CH_ADSR1(N) _MMIO16((IO_BASE | 0xc08) + (16 * (N))) -#define SPU_CH_ADSR2(N) _MMIO16((IO_BASE | 0xc0a) + (16 * (N))) -#define SPU_CH_LOOP(N) _MMIO16((IO_BASE | 0xc0e) + (16 * (N))) +#define SPU_CH_VOL_L(N) _MMIO16((IO_BASE | 0xc00) + (16 * (N))) +#define SPU_CH_VOL_R(N) _MMIO16((IO_BASE | 0xc02) + (16 * (N))) +#define SPU_CH_FREQ(N) _MMIO16((IO_BASE | 0xc04) + (16 * (N))) +#define SPU_CH_ADDR(N) _MMIO16((IO_BASE | 0xc06) + (16 * (N))) +#define SPU_CH_ADSR1(N) _MMIO16((IO_BASE | 0xc08) + (16 * (N))) +#define SPU_CH_ADSR2(N) _MMIO16((IO_BASE | 0xc0a) + (16 * (N))) +#define SPU_CH_ADSR_VOL(N) _MMIO16((IO_BASE | 0xc0c) + (16 * (N))) +#define SPU_CH_LOOP_ADDR(N) _MMIO16((IO_BASE | 0xc0e) + (16 * (N))) #define SPU_MASTER_VOL_L _MMIO16(IO_BASE | 0xd80) #define SPU_MASTER_VOL_R _MMIO16(IO_BASE | 0xd82) @@ -427,131 +435,35 @@ typedef enum { #define SPU_VOL_STAT_L _MMIO16(IO_BASE | 0xdb8) #define SPU_VOL_STAT_R _MMIO16(IO_BASE | 0xdba) -#define SPU_REVERB_BASE _ADDR16(IO_BASE | 0xdc0) - -/* System 573 base hardware */ - -typedef enum { - SYS573_MISC_OUT_ADC_MOSI = 1 << 0, - SYS573_MISC_OUT_ADC_CS = 1 << 1, - SYS573_MISC_OUT_ADC_SCK = 1 << 2, - SYS573_MISC_OUT_COIN_COUNT1 = 1 << 3, - SYS573_MISC_OUT_COIN_COUNT2 = 1 << 4, - SYS573_MISC_OUT_AMP_ENABLE = 1 << 5, - SYS573_MISC_OUT_CDDA_ENABLE = 1 << 6, - SYS573_MISC_OUT_SPU_ENABLE = 1 << 7, - SYS573_MISC_OUT_JVS_STAT = 1 << 8 -} Sys573MiscOutputFlag; - -typedef enum { - SYS573_MISC_IN_ADC_MISO = 1 << 0, - SYS573_MISC_IN_ADC_SARS = 1 << 1, - SYS573_MISC_IN_CART_SDA = 1 << 2, - SYS573_MISC_IN_JVS_SENSE = 1 << 3, - SYS573_MISC_IN_JVS_AVAIL = 1 << 4, - SYS573_MISC_IN_JVS_UNK = 1 << 5, - SYS573_MISC_IN_CART_ISIG = 1 << 6, - SYS573_MISC_IN_CART_DSIG = 1 << 7, - SYS573_MISC_IN_COIN1 = 1 << 8, - SYS573_MISC_IN_COIN2 = 1 << 9, - SYS573_MISC_IN_PCMCIA_CD1 = 1 << 10, - SYS573_MISC_IN_PCMCIA_CD2 = 1 << 11, - SYS573_MISC_IN_SERVICE = 1 << 12 -} Sys573MiscInputFlag; - -typedef enum { - SYS573_BANK_FLASH = 0, - SYS573_BANK_PCMCIA1 = 16, - SYS573_BANK_PCMCIA2 = 32 -} Sys573Bank; - -#define SYS573_MISC_OUT _MMIO16(DEV0_BASE | 0x400000) -#define SYS573_DIP_CART _MMIO16(DEV0_BASE | 0x400004) -#define SYS573_MISC_IN _MMIO16(DEV0_BASE | 0x400006) -#define SYS573_JAMMA_MAIN _MMIO16(DEV0_BASE | 0x400008) -#define SYS573_JVS_RX_DATA _MMIO16(DEV0_BASE | 0x40000a) -#define SYS573_JAMMA_EXT1 _MMIO16(DEV0_BASE | 0x40000c) -#define SYS573_JAMMA_EXT2 _MMIO16(DEV0_BASE | 0x40000e) -#define SYS573_BANK_CTRL _MMIO16(DEV0_BASE | 0x500000) -#define SYS573_JVS_RESET _MMIO16(DEV0_BASE | 0x520000) -#define SYS573_IDE_RESET _MMIO16(DEV0_BASE | 0x560000) -#define SYS573_WATCHDOG _MMIO16(DEV0_BASE | 0x5c0000) -#define SYS573_EXT_OUT _MMIO16(DEV0_BASE | 0x600000) -#define SYS573_JVS_TX_DATA _MMIO16(DEV0_BASE | 0x680000) -#define SYS573_CART_OUT _MMIO16(DEV0_BASE | 0x6a0000) - -#define SYS573_FLASH_BASE _ADDR16(DEV0_BASE | 0x000000) -#define SYS573_IDE_CS0_BASE _ADDR16(DEV0_BASE | 0x480000) -#define SYS573_IDE_CS1_BASE _ADDR16(DEV0_BASE | 0x4c0000) -#define SYS573_RTC_BASE _ADDR16(DEV0_BASE | 0x620000) -#define SYS573_IO_BASE _ADDR16(DEV0_BASE | 0x640000) - -/* System 573 RTC */ - -typedef enum { - SYS573_RTC_CTRL_CAL_BITMASK = 31 << 0, - SYS573_RTC_CTRL_CAL_POSITIVE = 0 << 5, - SYS573_RTC_CTRL_CAL_NEGATIVE = 1 << 5, - SYS573_RTC_CTRL_READ = 1 << 6, - SYS573_RTC_CTRL_WRITE = 1 << 7 -} Sys573RTCControlFlag; - -typedef enum { - SYS573_RTC_SECOND_UNITS_BITMASK = 15 << 0, - SYS573_RTC_SECOND_TENS_BITMASK = 7 << 4, - SYS573_RTC_SECOND_STOP = 1 << 7 -} Sys573RTCSecondFlag; - -typedef enum { - SYS573_RTC_DAY_UNITS_BITMASK = 15 << 0, - SYS573_RTC_DAY_TENS_BITMASK = 3 << 4, - SYS573_RTC_DAY_LOW_BATTERY = 1 << 6, - SYS573_RTC_DAY_BATTERY_MONITOR = 1 << 7 -} Sys573RTCDayFlag; - -#define SYS573_RTC_CTRL _MMIO16(DEV0_BASE | 0x623ff0) -#define SYS573_RTC_SECOND _MMIO16(DEV0_BASE | 0x623ff2) -#define SYS573_RTC_MINUTE _MMIO16(DEV0_BASE | 0x623ff4) -#define SYS573_RTC_HOUR _MMIO16(DEV0_BASE | 0x623ff6) -#define SYS573_RTC_WEEKDAY _MMIO16(DEV0_BASE | 0x623ff8) -#define SYS573_RTC_DAY _MMIO16(DEV0_BASE | 0x623ffa) -#define SYS573_RTC_MONTH _MMIO16(DEV0_BASE | 0x623ffc) -#define SYS573_RTC_YEAR _MMIO16(DEV0_BASE | 0x623ffe) - -/* System 573 analog I/O board */ - -#define SYS573A_LIGHTS_A _MMIO16(DEV0_BASE | 0x640080) -#define SYS573A_LIGHTS_B _MMIO16(DEV0_BASE | 0x640088) -#define SYS573A_LIGHTS_C _MMIO16(DEV0_BASE | 0x640090) -#define SYS573A_LIGHTS_D _MMIO16(DEV0_BASE | 0x640098) - -/* System 573 digital I/O board */ - -typedef enum { - SYS573D_CPLD_STAT_INIT = 1 << 12, - SYS573D_CPLD_STAT_DONE = 1 << 13, - SYS573D_CPLD_STAT_LDC = 1 << 14, - SYS573D_CPLD_STAT_HDC = 1 << 15 -} Sys573DCPLDStatusFlag; - -typedef enum { - SYS573D_CPLD_CTRL_UNK1 = 1 << 12, - SYS573D_CPLD_CTRL_UNK2 = 1 << 13, - SYS573D_CPLD_CTRL_UNK3 = 1 << 14, - SYS573D_CPLD_CTRL_UNK4 = 1 << 15 -} Sys573DCPLDControlFlag; - -#define SYS573D_FPGA_LIGHTS_A1 _MMIO16(DEV0_BASE | 0x6400e0) -#define SYS573D_FPGA_LIGHTS_A0 _MMIO16(DEV0_BASE | 0x6400e2) -#define SYS573D_FPGA_LIGHTS_B1 _MMIO16(DEV0_BASE | 0x6400e4) -#define SYS573D_FPGA_LIGHTS_D0 _MMIO16(DEV0_BASE | 0x6400e6) -#define SYS573D_FPGA_INIT _MMIO16(DEV0_BASE | 0x6400e8) -#define SYS573D_FPGA_DS2401 _MMIO16(DEV0_BASE | 0x6400ee) - -#define SYS573D_CPLD_UNK_RESET _MMIO16(DEV0_BASE | 0x6400f4) -#define SYS573D_CPLD_STAT _MMIO16(DEV0_BASE | 0x6400f6) -#define SYS573D_CPLD_CTRL _MMIO16(DEV0_BASE | 0x6400f6) -#define SYS573D_CPLD_BITSTREAM _MMIO16(DEV0_BASE | 0x6400f8) -#define SYS573D_CPLD_LIGHTS_C0 _MMIO16(DEV0_BASE | 0x6400fa) -#define SYS573D_CPLD_LIGHTS_C1 _MMIO16(DEV0_BASE | 0x6400fc) -#define SYS573D_CPLD_LIGHTS_B0 _MMIO16(DEV0_BASE | 0x6400fe) +#define SPU_REVERB_DAPF1 _MMIO16(IO_BASE | 0xdc0) +#define SPU_REVERB_DAPF2 _MMIO16(IO_BASE | 0xdc2) +#define SPU_REVERB_VIIR _MMIO16(IO_BASE | 0xdc4) +#define SPU_REVERB_VCOMB1 _MMIO16(IO_BASE | 0xdc6) +#define SPU_REVERB_VCOMB2 _MMIO16(IO_BASE | 0xdc8) +#define SPU_REVERB_VCOMB3 _MMIO16(IO_BASE | 0xdca) +#define SPU_REVERB_VCOMB4 _MMIO16(IO_BASE | 0xdcc) +#define SPU_REVERB_VWALL _MMIO16(IO_BASE | 0xdce) +#define SPU_REVERB_VAPF1 _MMIO16(IO_BASE | 0xdd0) +#define SPU_REVERB_VAPF2 _MMIO16(IO_BASE | 0xdd2) +#define SPU_REVERB_MLSAME _MMIO16(IO_BASE | 0xdd4) +#define SPU_REVERB_MRSAME _MMIO16(IO_BASE | 0xdd6) +#define SPU_REVERB_MLCOMB1 _MMIO16(IO_BASE | 0xdd8) +#define SPU_REVERB_MRCOMB1 _MMIO16(IO_BASE | 0xdda) +#define SPU_REVERB_MLCOMB2 _MMIO16(IO_BASE | 0xddc) +#define SPU_REVERB_MRCOMB2 _MMIO16(IO_BASE | 0xdde) +#define SPU_REVERB_DLSAME _MMIO16(IO_BASE | 0xde0) +#define SPU_REVERB_DRSAME _MMIO16(IO_BASE | 0xde2) +#define SPU_REVERB_MLDIFF _MMIO16(IO_BASE | 0xde4) +#define SPU_REVERB_MRDIFF _MMIO16(IO_BASE | 0xde6) +#define SPU_REVERB_MLCOMB3 _MMIO16(IO_BASE | 0xde8) +#define SPU_REVERB_MRCOMB3 _MMIO16(IO_BASE | 0xdea) +#define SPU_REVERB_MLCOMB4 _MMIO16(IO_BASE | 0xdec) +#define SPU_REVERB_MRCOMB4 _MMIO16(IO_BASE | 0xdee) +#define SPU_REVERB_DLDIFF _MMIO16(IO_BASE | 0xdf0) +#define SPU_REVERB_DRDIFF _MMIO16(IO_BASE | 0xdf2) +#define SPU_REVERB_MLAPF1 _MMIO16(IO_BASE | 0xdf4) +#define SPU_REVERB_MRAPF1 _MMIO16(IO_BASE | 0xdf6) +#define SPU_REVERB_MLAPF2 _MMIO16(IO_BASE | 0xdf8) +#define SPU_REVERB_MRAPF2 _MMIO16(IO_BASE | 0xdfa) +#define SPU_REVERB_VLIN _MMIO16(IO_BASE | 0xdfc) +#define SPU_REVERB_VRIN _MMIO16(IO_BASE | 0xdfe) diff --git a/src/ps1/registers573.h b/src/ps1/registers573.h new file mode 100644 index 0000000..e927eeb --- /dev/null +++ b/src/ps1/registers573.h @@ -0,0 +1,146 @@ +/* + * ps1-bare-metal - (C) 2023 spicyjpeg + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH + * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, + * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM + * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR + * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + */ + +#pragma once + +#include "ps1/registers.h" + +/* System 573 base hardware */ + +typedef enum { + SYS573_MISC_OUT_ADC_MOSI = 1 << 0, + SYS573_MISC_OUT_ADC_CS = 1 << 1, + SYS573_MISC_OUT_ADC_SCK = 1 << 2, + SYS573_MISC_OUT_COIN_COUNT1 = 1 << 3, + SYS573_MISC_OUT_COIN_COUNT2 = 1 << 4, + SYS573_MISC_OUT_AMP_ENABLE = 1 << 5, + SYS573_MISC_OUT_CDDA_ENABLE = 1 << 6, + SYS573_MISC_OUT_SPU_ENABLE = 1 << 7, + SYS573_MISC_OUT_JVS_STAT = 1 << 8 +} Sys573MiscOutputFlag; + +typedef enum { + SYS573_MISC_IN_ADC_MISO = 1 << 0, + SYS573_MISC_IN_ADC_SARS = 1 << 1, + SYS573_MISC_IN_CART_SDA = 1 << 2, + SYS573_MISC_IN_JVS_SENSE = 1 << 3, + SYS573_MISC_IN_JVS_AVAIL = 1 << 4, + SYS573_MISC_IN_JVS_UNK = 1 << 5, + SYS573_MISC_IN_CART_ISIG = 1 << 6, + SYS573_MISC_IN_CART_DSIG = 1 << 7, + SYS573_MISC_IN_COIN1 = 1 << 8, + SYS573_MISC_IN_COIN2 = 1 << 9, + SYS573_MISC_IN_PCMCIA_CD1 = 1 << 10, + SYS573_MISC_IN_PCMCIA_CD2 = 1 << 11, + SYS573_MISC_IN_SERVICE = 1 << 12 +} Sys573MiscInputFlag; + +typedef enum { + SYS573_BANK_FLASH = 0, + SYS573_BANK_PCMCIA1 = 16, + SYS573_BANK_PCMCIA2 = 32 +} Sys573Bank; + +#define SYS573_MISC_OUT _MMIO16(DEV0_BASE | 0x400000) +#define SYS573_DIP_CART _MMIO16(DEV0_BASE | 0x400004) +#define SYS573_MISC_IN _MMIO16(DEV0_BASE | 0x400006) +#define SYS573_JAMMA_MAIN _MMIO16(DEV0_BASE | 0x400008) +#define SYS573_JVS_RX_DATA _MMIO16(DEV0_BASE | 0x40000a) +#define SYS573_JAMMA_EXT1 _MMIO16(DEV0_BASE | 0x40000c) +#define SYS573_JAMMA_EXT2 _MMIO16(DEV0_BASE | 0x40000e) +#define SYS573_BANK_CTRL _MMIO16(DEV0_BASE | 0x500000) +#define SYS573_JVS_RESET _MMIO16(DEV0_BASE | 0x520000) +#define SYS573_IDE_RESET _MMIO16(DEV0_BASE | 0x560000) +#define SYS573_WATCHDOG _MMIO16(DEV0_BASE | 0x5c0000) +#define SYS573_EXT_OUT _MMIO16(DEV0_BASE | 0x600000) +#define SYS573_JVS_TX_DATA _MMIO16(DEV0_BASE | 0x680000) +#define SYS573_CART_OUT _MMIO16(DEV0_BASE | 0x6a0000) + +#define SYS573_FLASH_BASE _ADDR16(DEV0_BASE | 0x000000) +#define SYS573_IDE_CS0_BASE _ADDR16(DEV0_BASE | 0x480000) +#define SYS573_IDE_CS1_BASE _ADDR16(DEV0_BASE | 0x4c0000) +#define SYS573_RTC_BASE _ADDR16(DEV0_BASE | 0x620000) +#define SYS573_IO_BASE _ADDR16(DEV0_BASE | 0x640000) + +/* System 573 RTC */ + +typedef enum { + SYS573_RTC_CTRL_CAL_BITMASK = 31 << 0, + SYS573_RTC_CTRL_CAL_POSITIVE = 0 << 5, + SYS573_RTC_CTRL_CAL_NEGATIVE = 1 << 5, + SYS573_RTC_CTRL_READ = 1 << 6, + SYS573_RTC_CTRL_WRITE = 1 << 7 +} Sys573RTCControlFlag; + +typedef enum { + SYS573_RTC_SECOND_UNITS_BITMASK = 15 << 0, + SYS573_RTC_SECOND_TENS_BITMASK = 7 << 4, + SYS573_RTC_SECOND_STOP = 1 << 7 +} Sys573RTCSecondFlag; + +typedef enum { + SYS573_RTC_DAY_UNITS_BITMASK = 15 << 0, + SYS573_RTC_DAY_TENS_BITMASK = 3 << 4, + SYS573_RTC_DAY_LOW_BATTERY = 1 << 6, + SYS573_RTC_DAY_BATTERY_MONITOR = 1 << 7 +} Sys573RTCDayFlag; + +#define SYS573_RTC_CTRL _MMIO16(DEV0_BASE | 0x623ff0) +#define SYS573_RTC_SECOND _MMIO16(DEV0_BASE | 0x623ff2) +#define SYS573_RTC_MINUTE _MMIO16(DEV0_BASE | 0x623ff4) +#define SYS573_RTC_HOUR _MMIO16(DEV0_BASE | 0x623ff6) +#define SYS573_RTC_WEEKDAY _MMIO16(DEV0_BASE | 0x623ff8) +#define SYS573_RTC_DAY _MMIO16(DEV0_BASE | 0x623ffa) +#define SYS573_RTC_MONTH _MMIO16(DEV0_BASE | 0x623ffc) +#define SYS573_RTC_YEAR _MMIO16(DEV0_BASE | 0x623ffe) + +/* System 573 analog I/O board */ + +#define SYS573A_LIGHTS_A _MMIO16(DEV0_BASE | 0x640080) +#define SYS573A_LIGHTS_B _MMIO16(DEV0_BASE | 0x640088) +#define SYS573A_LIGHTS_C _MMIO16(DEV0_BASE | 0x640090) +#define SYS573A_LIGHTS_D _MMIO16(DEV0_BASE | 0x640098) + +/* System 573 digital I/O board */ + +typedef enum { + SYS573D_CPLD_STAT_INIT = 1 << 12, + SYS573D_CPLD_STAT_DONE = 1 << 13, + SYS573D_CPLD_STAT_LDC = 1 << 14, + SYS573D_CPLD_STAT_HDC = 1 << 15 +} Sys573DCPLDStatusFlag; + +typedef enum { + SYS573D_CPLD_CTRL_UNK1 = 1 << 12, + SYS573D_CPLD_CTRL_UNK2 = 1 << 13, + SYS573D_CPLD_CTRL_UNK3 = 1 << 14, + SYS573D_CPLD_CTRL_UNK4 = 1 << 15 +} Sys573DCPLDControlFlag; + +#define SYS573D_FPGA_LIGHTS_A1 _MMIO16(DEV0_BASE | 0x6400e0) +#define SYS573D_FPGA_LIGHTS_A0 _MMIO16(DEV0_BASE | 0x6400e2) +#define SYS573D_FPGA_LIGHTS_B1 _MMIO16(DEV0_BASE | 0x6400e4) +#define SYS573D_FPGA_LIGHTS_D0 _MMIO16(DEV0_BASE | 0x6400e6) +#define SYS573D_FPGA_INIT _MMIO16(DEV0_BASE | 0x6400e8) +#define SYS573D_FPGA_DS2401 _MMIO16(DEV0_BASE | 0x6400ee) + +#define SYS573D_CPLD_UNK_RESET _MMIO16(DEV0_BASE | 0x6400f4) +#define SYS573D_CPLD_STAT _MMIO16(DEV0_BASE | 0x6400f6) +#define SYS573D_CPLD_CTRL _MMIO16(DEV0_BASE | 0x6400f6) +#define SYS573D_CPLD_BITSTREAM _MMIO16(DEV0_BASE | 0x6400f8) +#define SYS573D_CPLD_LIGHTS_C0 _MMIO16(DEV0_BASE | 0x6400fa) +#define SYS573D_CPLD_LIGHTS_C1 _MMIO16(DEV0_BASE | 0x6400fc) +#define SYS573D_CPLD_LIGHTS_B0 _MMIO16(DEV0_BASE | 0x6400fe) diff --git a/tools/convertExecutable.py b/tools/convertExecutable.py index 2303577..028e6f3 100755 --- a/tools/convertExecutable.py +++ b/tools/convertExecutable.py @@ -16,7 +16,7 @@ from argparse import ArgumentParser, FileType, Namespace from dataclasses import dataclass from enum import IntEnum, IntFlag from struct import Struct -from typing import BinaryIO, ByteString, Generator +from typing import BinaryIO, Generator ## Utilities