2018-05-04 19:47:05 +02:00
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/**
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* Fusée pad control code
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* ~ktemkin
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*/
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#ifndef __FUSEE_PADCTL_H__
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#define __FUSEE_PADCTL_H__
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#include "utils.h"
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/**
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* Registers in the Misc Pad control region
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*/
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2018-05-20 22:57:25 +02:00
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struct tegra_padctl {
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2018-05-04 19:47:05 +02:00
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/* TODO: support registers before? */
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uint32_t sdmmc1_control;
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uint32_t sdmmc3_control;
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uint32_t sdmmc2_control;
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uint32_t sdmmc4_control;
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/* TODO: support registers after? */
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uint8_t _todo[656];
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uint32_t vgpio_gpio_mux_sel;
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};
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/**
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* Masks for Pad Control registers
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*/
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enum tegra_padctl_masks {
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/* SDMMC1 */
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PADCTL_SDMMC1_DEEP_LOOPBACK = (1 << 0),
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/* SDMMC3 */
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PADCTL_SDMMC3_DEEP_LOOPBACK = (1 << 0),
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/* SDMMC2 */
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PADCTL_SDMMC2_ENABLE_DATA_IN = (0xFF << 8),
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PADCTL_SDMMC2_ENABLE_CLK_IN = (0x3 << 4),
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PADCTL_SDMMC2_DEEP_LOOPBACK = (1 << 0),
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/* SDMMC4 */
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PADCTL_SDMMC4_ENABLE_DATA_IN = (0xFF << 8),
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PADCTL_SDMMC4_ENABLE_CLK_IN = (0x3 << 4),
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PADCTL_SDMMC4_DEEP_LOOPBACK = (1 << 0),
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/* VGPIO/GPIO */
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PADCTL_SDMMC1_CD_SOURCE = (1 << 0),
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PADCTL_SDMMC1_WP_SOURCE = (1 << 1),
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PADCTL_SDMMC3_CD_SOURCE = (1 << 2),
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PADCTL_SDMMC3_WP_SOURCE = (1 << 3),
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};
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/**
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* Utility function that grabs the Tegra PADCTL registers.
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*/
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static inline struct tegra_padctl *padctl_get_regs(void)
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{
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return (struct tegra_padctl *)0x700008d4;
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}
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#endif
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