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Fix and/bic inversions in finalize_powerdown
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@ -258,7 +258,7 @@ finalize_powerdown:
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/* Same as above, for EL3. */
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mrs x0, sctlr_el3
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and x0, x0, #(1 << 2)
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bic x0, x0, #(1 << 2)
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msr sctlr_el3, x0
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isb
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@ -274,7 +274,7 @@ finalize_powerdown:
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/* Disable receiving instruction cache/tbl maintenance operations. */
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mrs x0, cpuectlr_el1
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and x0, x0, #(1 << 6)
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bic x0, x0, #(1 << 6)
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msr cpuectlr_el1, x0
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/* Prepare GICC */
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