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exo: add extension smc to write to user address
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@ -155,3 +155,69 @@ uint32_t ams_iram_copy(smc_args_t *args) {
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return 0;
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}
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uint32_t ams_write_address(smc_args_t *args) {
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/* Implements a write to a DRAM page. */
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/* This operation can be used to write to read-only pages. */
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/* args->X[1] = DRAM address (translated by kernel), must be size-bytes aligned. */
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/* args->X[2] = Value. */
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/* args->X[3] = size (must be 1, 2, 4, or 8). */
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const uintptr_t dram_address = (uintptr_t)args->X[1];
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const uintptr_t dram_page_offset = (dram_address & 0xFFFULL);
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const size_t size = (size_t)(args->X[3]);
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/* Validate addresses. */
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if (!ams_is_user_addr_valid(dram_address)) {
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return 2;
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}
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/* Validate size. */
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switch (size) {
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case 1:
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case 2:
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case 4:
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case 8:
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if ((size + dram_page_offset) > 0x1000) {
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return 2;
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}
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break;
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default:
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return 2;
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}
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/* Validate alignment. */
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if (dram_page_offset % size) {
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return 2;
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}
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/* Map pages. */
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ams_map_userpage(dram_address);
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/* Write data. */
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uintptr_t dram_ptr = (uintptr_t)(AMS_USER_PAGE_SECURE_MONITOR_ADDR + dram_page_offset);
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switch (size) {
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case 1:
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*((volatile uint8_t *)dram_ptr) = (uint8_t)(args->X[2]);
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break;
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case 2:
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*((volatile uint16_t *)dram_ptr) = (uint16_t)(args->X[2]);
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break;
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case 4:
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*((volatile uint32_t *)dram_ptr) = (uint32_t)(args->X[2]);
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break;
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case 8:
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*((volatile uint64_t *)dram_ptr) = args->X[2];
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break;
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default:
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generic_panic();
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}
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/* Flush! */
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flush_dcache_range((void *)dram_ptr, (void *)(dram_ptr + size));
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/* Unmap pages. */
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ams_unmap_userpage();
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return 0;
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}
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@ -20,6 +20,7 @@
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#include "smc_api.h"
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uint32_t ams_iram_copy(smc_args_t *args);
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uint32_t ams_write_address(smc_args_t *args);
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void ams_map_irampage(uintptr_t iram_address);
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void ams_unmap_irampage(void);
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@ -77,6 +77,7 @@ uint32_t smc_read_write_register(smc_args_t *args);
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/* Atmosphere SMC prototypes */
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uint32_t smc_ams_iram_copy(smc_args_t *args);
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uint32_t smc_ams_write_address(smc_args_t *args);
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/* TODO: Provide a way to set this. It's 0 on non-recovery boot anyway... */
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static uint32_t g_smc_blacklist_mask = 0;
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@ -133,6 +134,7 @@ static smc_table_entry_t g_smc_ams_table[] = {
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{0, 4, NULL},
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{0xF0000201, 0, smc_ams_iram_copy},
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{0xF0000002, 0, smc_read_write_register},
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{0xF0000203, 0, smc_ams_write_address},
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};
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#define SMC_AMS_HANDLERS (sizeof(g_smc_ams_table) / sizeof(g_smc_ams_table[0]))
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@ -718,3 +720,7 @@ uint32_t smc_panic(smc_args_t *args) {
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uint32_t smc_ams_iram_copy(smc_args_t *args) {
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return smc_wrapper_sync(args, ams_iram_copy);
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}
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uint32_t smc_ams_write_address(smc_args_t *args) {
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return smc_wrapper_sync(args, ams_write_address);
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}
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