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https://github.com/Atmosphere-NX/Atmosphere.git
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thermosphere: cleanup again
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@ -1,213 +0,0 @@
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/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "exceptions.h"
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#include "hvc.h"
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#include "traps.h"
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#include "sysreg_traps.h"
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#include "smc.h"
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#include "core_ctx.h"
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#include "single_step.h"
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#include "data_abort.h"
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#include "spinlock.h"
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#include "debug_manager.h"
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#include "timer.h"
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#include "memory_map.h"
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#include "fpu.h"
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bool spsrEvaluateConditionCode(u64 spsr, u32 conditionCode)
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{
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if (conditionCode == 14) {
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// AL
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return true;
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} else if (conditionCode == 15) {
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// Invalid encoding
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return false;
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}
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// NZCV
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bool n = (spsr & BIT(31)) != 0;
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bool z = (spsr & BIT(30)) != 0;
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bool c = (spsr & BIT(29)) != 0;
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bool v = (spsr & BIT(28)) != 0;
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bool tableHalf[] = {
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// EQ, CS, MI, VS, HI, GE, GT
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z, c, n, v, c && !z, n == v, !z && n == v,
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};
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return (conditionCode & 1) == 0 ? tableHalf[conditionCode / 2] : !tableHalf[conditionCode / 2];
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}
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void dumpStackFrame(const ExceptionStackFrame *frame, bool sameEl)
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{
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#ifndef NDEBUG
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uintptr_t stackTop = memoryMapGetStackTop(currentCoreCtx->coreId);
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for (u32 i = 0; i < 30; i += 2) {
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DEBUG("x%u\t\t%016llx\t\tx%u\t\t%016llx\n", i, frame->x[i], i + 1, frame->x[i + 1]);
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}
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DEBUG("x30\t\t%016llx\n\n", frame->x[30]);
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DEBUG("elr_el2\t\t%016llx\n", frame->elr_el2);
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DEBUG("spsr_el2\t%016llx\n", frame->spsr_el2);
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DEBUG("far_el2\t\t%016llx\n", frame->far_el2);
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if (sameEl) {
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DEBUG("sp_el2\t\t%016llx\n", frame->sp_el2);
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} else {
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DEBUG("sp_el0\t\t%016llx\n", frame->sp_el0);
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}
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DEBUG("sp_el1\t\t%016llx\n", frame->sp_el1);
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DEBUG("cntpct_el0\t%016llx\n", frame->cntpct_el0);
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if (frame == currentCoreCtx->guestFrame) {
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DEBUG("cntp_ctl_el0\t%016llx\n", frame->cntp_ctl_el0);
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DEBUG("cntv_ctl_el0\t%016llx\n", frame->cntv_ctl_el0);
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} else if ((frame->sp_el2 & ~0xFFFul) + 0x1000 == stackTop) {
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// Try to dump the stack (comment if this crashes)
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u64 *sp = (u64 *)frame->sp_el2;
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u64 *spEnd = sp + 0x20;
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u64 *spMax = (u64 *)((frame->sp_el2 + 0xFFF) & ~0xFFFul);
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DEBUG("Stack trace:\n");
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while (sp < spEnd && sp < spMax) {
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DEBUG("\t%016lx\n", *sp++);
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}
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} else {
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DEBUG("Stack overflow/double fault detected!\n");
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}
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#else
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(void)frame;
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(void)sameEl;
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#endif
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}
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static void advanceItState(ExceptionStackFrame *frame)
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{
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// Just in case EL0 is executing A32 (& not sure if fully supported)
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if (!spsrIsThumb(frame->spsr_el2) || spsrGetT32ItFlags(frame->spsr_el2) == 0) {
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return;
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}
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u32 it = spsrGetT32ItFlags(frame->spsr_el2);
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// Last instruction of the block => wipe, otherwise advance
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spsrSetT32ItFlags(&frame->spsr_el2, (it & 7) == 0 ? 0 : (it & 0xE0) | ((it << 1) & 0x1F));
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}
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void skipFaultingInstruction(ExceptionStackFrame *frame, u32 size)
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{
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advanceItState(frame);
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frame->elr_el2 += size;
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}
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void exceptionEnterInterruptibleHypervisorCode(void)
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{
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// We don't want the guest to spam us with its timer interrupts. Disable the timers.
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SET_SYSREG(cntp_ctl_el0, 0);
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SET_SYSREG(cntv_ctl_el0, 0);
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}
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// Called on exception entry (avoids overflowing a vector section)
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void exceptionEntryPostprocess(ExceptionStackFrame *frame, bool isLowerEl)
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{
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if (frame == currentCoreCtx->guestFrame) {
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frame->cntp_ctl_el0 = GET_SYSREG(cntp_ctl_el0);
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frame->cntv_ctl_el0 = GET_SYSREG(cntv_ctl_el0);
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}
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}
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// Called on exception return (avoids overflowing a vector section)
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void exceptionReturnPreprocess(ExceptionStackFrame *frame)
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{
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if (frame == currentCoreCtx->guestFrame) {
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if (currentCoreCtx->wasPaused) {
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// Were we paused & are we about to return to the guest?
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exceptionEnterInterruptibleHypervisorCode();
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while (!debugManagerHandlePause());
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fpuCleanInvalidateRegisterCache();
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}
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// Update virtual counter
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u64 ticksNow = timerGetSystemTick();
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currentCoreCtx->totalTimeInHypervisor += ticksNow - frame->cntpct_el0;
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SET_SYSREG(cntvoff_el2, currentCoreCtx->totalTimeInHypervisor);
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if (frame == currentCoreCtx->guestFrame) {
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// Restore interrupt mask
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SET_SYSREG(cntp_ctl_el0, frame->cntp_ctl_el0);
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SET_SYSREG(cntv_ctl_el0, frame->cntv_ctl_el0);
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}
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}
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}
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void handleLowerElSyncException(ExceptionStackFrame *frame)
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{
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ExceptionSyndromeRegister esr = frame->esr_el2;
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switch (esr.ec) {
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case Exception_CP15RTTrap:
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handleMcrMrcCP15Trap(frame, esr);
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break;
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case Exception_CP15RRTTrap:
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handleMcrrMrrcCP15Trap(frame, esr);
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break;
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case Exception_CP14RTTrap:
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case Exception_CP14DTTrap:
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case Exception_CP14RRTTrap:
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// A32 stub: Skip instruction, read 0 if necessary (there are debug regs at EL0)
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handleA32CP14Trap(frame, esr);
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break;
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case Exception_HypervisorCallA64:
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handleHypercall(frame, esr);
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break;
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case Exception_MonitorCallA64:
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handleSmcTrap(frame, esr);
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break;
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case Exception_SystemRegisterTrap:
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handleMsrMrsTrap(frame, esr);
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break;
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case Exception_DataAbortLowerEl:
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// Basically, stage2 translation faults
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handleLowerElDataAbortException(frame, esr);
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break;
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case Exception_SoftwareStepLowerEl:
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handleSingleStep(frame, esr);
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break;
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case Exception_BreakpointLowerEl:
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case Exception_WatchpointLowerEl:
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case Exception_SoftwareBreakpointA64:
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case Exception_SoftwareBreakpointA32:
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debugManagerReportEvent(DBGEVENT_EXCEPTION);
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break;
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default:
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DEBUG("Lower EL sync exception, EC = 0x%02llx IL=%llu ISS=0x%06llx\n", (u64)esr.ec, esr.il, esr.iss);
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dumpStackFrame(frame, false);
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break;
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}
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}
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void handleSameElSyncException(ExceptionStackFrame *frame)
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{
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ExceptionSyndromeRegister esr = frame->esr_el2;
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(void)esr;
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DEBUG("Same EL sync exception on core %x, EC = 0x%02llx IL=%llu ISS=0x%06llx\n", currentCoreCtx->coreId, (u64)esr.ec, esr.il, esr.iss);
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dumpStackFrame(frame, true);
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}
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void handleUnknownException(u32 offset)
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{
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DEBUG("Unknown exception on core %x! (offset 0x%03lx)\n", offset, currentCoreCtx->coreId);
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}
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