diff --git a/fusee/Makefile b/fusee/Makefile deleted file mode 100644 index 7a8542b38..000000000 --- a/fusee/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -SUBFOLDERS := fusee-primary fusee-secondary - -TOPTARGETS := all clean - -$(TOPTARGETS): $(SUBFOLDERS) - -$(SUBFOLDERS): - $(MAKE) -C $@ $(MAKECMDGOALS) - -.PHONY: $(TOPTARGETS) $(SUBFOLDERS) diff --git a/fusee/common/display/cfb_console.c b/fusee/common/display/cfb_console.c deleted file mode 100644 index 9d2e95b7c..000000000 --- a/fusee/common/display/cfb_console.c +++ /dev/null @@ -1,1619 +0,0 @@ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * cfb_console.c - * - * Color Framebuffer Console driver for 8/15/16/24/32 bits per pixel. - * - * At the moment only the 8x16 font is tested and the font fore- and - * background color is limited to black/white/gray colors. The Linux - * logo can be placed in the upper left corner and additional board - * information strings (that normaly goes to serial port) can be drawed. - * - * The console driver can use the standard PC keyboard interface (i8042) - * for character input. Character output goes to a memory mapped video - * framebuffer with little or big-endian organisation. - * With environment setting 'console=serial' the console i/o can be - * forced to serial port. - - The driver uses graphic specific defines/parameters/functions: - - VIDEO_FB_LITTLE_ENDIAN - framebuffer organisation default: big endian - VIDEO_HW_RECTFILL - graphic driver supports hardware rectangle fill - VIDEO_HW_BITBLT - graphic driver supports hardware bit blt - - Console Parameters are set by config: - - CONFIG_VIDEO_VISIBLE_COLS - x resolution - CONFIG_VIDEO_VISIBLE_ROWS - y resolution - CONFIG_VIDEO_PIXEL_SIZE - storage size in byte per pixel - CONFIG_VIDEO_DATA_FORMAT - graphical data format GDF - - CONFIG_CONSOLE_CURSOR - on/off drawing cursor is done with delay - loop in VIDEO_TSTC_FCT (i8042) - CONFIG_SYS_CONSOLE_BLINK_COUNT - value for delay loop - blink rate - CONFIG_CONSOLE_TIME - display time/date in upper right corner, - needs CONFIG_CMD_DATE and CONFIG_CONSOLE_CURSOR - CONFIG_VIDEO_LOGO - display Linux Logo in upper left corner - CONFIG_VIDEO_BMP_LOGO - use bmp_logo instead of linux_logo - CONFIG_CONSOLE_EXTRA_INFO - display additional board information strings - that normaly goes to serial port. This define - requires a board specific function: - video_drawstring (VIDEO_INFO_X, - VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, - info); - that fills a info buffer at i=row. - s.a: board/eltec/bab7xx. -CONFIG_VGA_AS_SINGLE_DEVICE - If set the framebuffer device will be initialised - as an output only device. The Keyboard driver - will not be set-up. This may be used, if you - have none or more than one Keyboard devices - (USB Keyboard, AT Keyboard). - -CONFIG_VIDEO_SW_CURSOR: - Draws a cursor after the last character. No - blinking is provided. Uses the macros CURSOR_SET - and CURSOR_OFF. -CONFIG_VIDEO_HW_CURSOR: - Uses the hardware cursor capability of the - graphic chip. Uses the macro CURSOR_SET. - ATTENTION: If booting an OS, the display driver - must disable the hardware register of the graphic - chip. Otherwise a blinking field is displayed -*/ - -#include "video_fb.h" -#include - - -#if defined(CONFIG_VIDEO_FONT_SMALL) -#include "video_font_small.h" -#else -#include "video_font_large.h" -#endif - -#if defined(CONFIG_CMD_DATE) -#include -#endif - -#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN) -#include -#include - -#ifdef CONFIG_SPLASH_SCREEN_ALIGN -#define BMP_ALIGN_CENTER 0x7FFF -#endif - -#endif - -/*****************************************************************************/ -/* Cursor definition: */ -/* CONFIG_CONSOLE_CURSOR: Uses a timer function (see drivers/input/i8042.c) */ -/* to let the cursor blink. Uses the macros */ -/* CURSOR_OFF and CURSOR_ON. */ -/* CONFIG_VIDEO_SW_CURSOR: Draws a cursor after the last character. No */ -/* blinking is provided. Uses the macros CURSOR_SET */ -/* and CURSOR_OFF. */ -/* CONFIG_VIDEO_HW_CURSOR: Uses the hardware cursor capability of the */ -/* graphic chip. Uses the macro CURSOR_SET. */ -/* ATTENTION: If booting an OS, the display driver */ -/* must disable the hardware register of the graphic */ -/* chip. Otherwise a blinking field is displayed */ -/*****************************************************************************/ -#if !defined(CONFIG_CONSOLE_CURSOR) && \ - !defined(CONFIG_VIDEO_SW_CURSOR) && \ - !defined(CONFIG_VIDEO_HW_CURSOR) -/* no Cursor defined */ -#define CURSOR_ON -#define CURSOR_OFF -#define CURSOR_SET -#endif - -#ifdef CONFIG_CONSOLE_CURSOR -#ifdef CURSOR_ON -#error only one of CONFIG_CONSOLE_CURSOR,CONFIG_VIDEO_SW_CURSOR,CONFIG_VIDEO_HW_CURSOR can be defined -#endif -void console_cursor (int state); -#define CURSOR_ON console_cursor(1) -#define CURSOR_OFF console_cursor(0) -#define CURSOR_SET -#else -#ifdef CONFIG_CONSOLE_TIME -#error CONFIG_CONSOLE_CURSOR must be defined for CONFIG_CONSOLE_TIME -#endif -#endif /* CONFIG_CONSOLE_CURSOR */ - -#ifdef CONFIG_VIDEO_SW_CURSOR -#ifdef CURSOR_ON -#error only one of CONFIG_CONSOLE_CURSOR,CONFIG_VIDEO_SW_CURSOR,CONFIG_VIDEO_HW_CURSOR can be defined -#endif -#define CURSOR_ON -#define CURSOR_OFF video_putchar(console_col * VIDEO_FONT_WIDTH,\ - console_row * VIDEO_FONT_HEIGHT, ' ') -#define CURSOR_SET video_set_cursor() -#endif /* CONFIG_VIDEO_SW_CURSOR */ - - -#ifdef CONFIG_VIDEO_HW_CURSOR -#ifdef CURSOR_ON -#error only one of CONFIG_CONSOLE_CURSOR,CONFIG_VIDEO_SW_CURSOR,CONFIG_VIDEO_HW_CURSOR can be defined -#endif -#define CURSOR_ON -#define CURSOR_OFF -#define CURSOR_SET video_set_hw_cursor(console_col * VIDEO_FONT_WIDTH, \ - (console_row * VIDEO_FONT_HEIGHT) + video_logo_height) -#endif /* CONFIG_VIDEO_HW_CURSOR */ - -#ifdef CONFIG_VIDEO_LOGO -#ifdef CONFIG_VIDEO_BMP_LOGO -#include -#define VIDEO_LOGO_WIDTH BMP_LOGO_WIDTH -#define VIDEO_LOGO_HEIGHT BMP_LOGO_HEIGHT -#define VIDEO_LOGO_LUT_OFFSET BMP_LOGO_OFFSET -#define VIDEO_LOGO_COLORS BMP_LOGO_COLORS - -#else /* CONFIG_VIDEO_BMP_LOGO */ -#define LINUX_LOGO_WIDTH 80 -#define LINUX_LOGO_HEIGHT 80 -#define LINUX_LOGO_COLORS 214 -#define LINUX_LOGO_LUT_OFFSET 0x20 -#define __initdata -#include -#define VIDEO_LOGO_WIDTH LINUX_LOGO_WIDTH -#define VIDEO_LOGO_HEIGHT LINUX_LOGO_HEIGHT -#define VIDEO_LOGO_LUT_OFFSET LINUX_LOGO_LUT_OFFSET -#define VIDEO_LOGO_COLORS LINUX_LOGO_COLORS -#endif /* CONFIG_VIDEO_BMP_LOGO */ -#define VIDEO_INFO_X (VIDEO_LOGO_WIDTH) -#define VIDEO_INFO_Y (VIDEO_FONT_HEIGHT/2) -#else /* CONFIG_VIDEO_LOGO */ -#define VIDEO_LOGO_WIDTH 0 -#define VIDEO_LOGO_HEIGHT 0 -#endif /* CONFIG_VIDEO_LOGO */ - -#ifdef CONFIG_VIDEO_COLS -#define VIDEO_COLS CONFIG_VIDEO_COLS -#else -#define VIDEO_COLS CONFIG_VIDEO_VISIBLE_COLS -#endif - -#define VIDEO_ROWS CONFIG_VIDEO_VISIBLE_ROWS -#define VIDEO_SIZE (VIDEO_ROWS*VIDEO_COLS*CONFIG_VIDEO_PIXEL_SIZE) -#define VIDEO_PIX_BLOCKS (VIDEO_SIZE >> 2) -#define VIDEO_LINE_LEN (VIDEO_COLS*CONFIG_VIDEO_PIXEL_SIZE) -#define VIDEO_BURST_LEN (VIDEO_COLS/8) - -#ifdef CONFIG_VIDEO_LOGO -#define CONSOLE_ROWS ((VIDEO_ROWS - video_logo_height) / VIDEO_FONT_HEIGHT) -#else -#define CONSOLE_ROWS (VIDEO_ROWS / VIDEO_FONT_HEIGHT) -#endif - -#define CONSOLE_COLS (VIDEO_COLS / VIDEO_FONT_WIDTH) -#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * VIDEO_LINE_LEN) -#define CONSOLE_ROW_FIRST (video_console_address) -#define CONSOLE_ROW_SECOND (video_console_address + CONSOLE_ROW_SIZE) -#define CONSOLE_ROW_LAST (video_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE) -#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS) -#define CONSOLE_SCROLL_SIZE (CONSOLE_SIZE - CONSOLE_ROW_SIZE) - -/* Macros */ -#ifdef VIDEO_FB_LITTLE_ENDIAN -#define SWAP16(x) ((((x) & 0x00ff) << 8) | ( (x) >> 8)) -#define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\ - (((x) & 0x00ff0000) >> 8) | (((x) & 0xff000000) >> 24) ) -#define SHORTSWAP32(x) ((((x) & 0x000000ff) << 8) | (((x) & 0x0000ff00) >> 8)|\ - (((x) & 0x00ff0000) << 8) | (((x) & 0xff000000) >> 8) ) -#else -#define SWAP16(x) (x) -#define SWAP32(x) (x) -#if defined(VIDEO_FB_16BPP_WORD_SWAP) -#define SHORTSWAP32(x) ( ((x) >> 16) | ((x) << 16) ) -#else -#define SHORTSWAP32(x) (x) -#endif -#endif - -#if defined(DEBUG) || defined(DEBUG_CFB_CONSOLE) -#define PRINTD(x) printf(x) -#else -#define PRINTD(x) -#endif - - -#ifdef CONFIG_CONSOLE_EXTRA_INFO -extern void video_get_info_str ( /* setup a board string: type, speed, etc. */ - int line_number, /* location to place info string beside logo */ - char *info /* buffer for info string */ - ); - -#endif - -#define ALIGN_UP(addr, align) (((addr) + (align) - 1) & (~((align) - 1))) -#define WIDTH_BYTES (ALIGN_UP(VIDEO_FONT_WIDTH, 8) / 8) - -static void *video_fb_address; /* frame buffer address */ -static void *video_console_address; /* console buffer start address */ - -static int video_logo_height = VIDEO_LOGO_HEIGHT; - -static int console_col = 0; /* cursor col */ -static int console_row = 0; /* cursor row */ - -static uint32_t eorx, fgx, bgx; /* color pats */ - -static const int video_font_draw_table8[] = { - 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, - 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, - 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, - 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff }; - -static const int video_font_draw_table15[] = { - 0x00000000, 0x00007fff, 0x7fff0000, 0x7fff7fff }; - -static const int video_font_draw_table16[] = { - 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff }; - -static const int video_font_draw_table24[16][3] = { - { 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x0000ffff, 0xff000000 }, - { 0x00000000, 0x0000ffff, 0xffffffff }, - { 0x000000ff, 0xffff0000, 0x00000000 }, - { 0x000000ff, 0xffff0000, 0x00ffffff }, - { 0x000000ff, 0xffffffff, 0xff000000 }, - { 0x000000ff, 0xffffffff, 0xffffffff }, - { 0xffffff00, 0x00000000, 0x00000000 }, - { 0xffffff00, 0x00000000, 0x00ffffff }, - { 0xffffff00, 0x0000ffff, 0xff000000 }, - { 0xffffff00, 0x0000ffff, 0xffffffff }, - { 0xffffffff, 0xffff0000, 0x00000000 }, - { 0xffffffff, 0xffff0000, 0x00ffffff }, - { 0xffffffff, 0xffffffff, 0xff000000 }, - { 0xffffffff, 0xffffffff, 0xffffffff } }; - -static const int video_font_draw_table32[16][4] = { - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x00000000, 0x00ffffff, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff }, - { 0x00000000, 0x00ffffff, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000 }, - { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00ffffff }, - { 0x00ffffff, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000 }, - { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00ffffff }, - { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000 }, - { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00ffffff }, - { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00000000 }, - { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff } }; - - -/******************************************************************************/ - -static void video_drawchars (int xx, int yy, unsigned char *s, int count) -{ - uint8_t *cdat, *dest, *dest0; - int rows, offset, c, cols, tbits; - - offset = yy * VIDEO_LINE_LEN + xx * CONFIG_VIDEO_PIXEL_SIZE; - dest0 = video_fb_address + offset; - - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - case GDF__8BIT_332RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * (VIDEO_FONT_HEIGHT * WIDTH_BYTES); - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; - dest += VIDEO_LINE_LEN) { - cols = 0; - tbits = VIDEO_FONT_WIDTH; - while (tbits > 0) { - uint8_t bits = *cdat++; - - ((uint32_t *) dest)[cols + 0] = (video_font_draw_table8[bits >> 4] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 1] = (video_font_draw_table8[bits & 15] & eorx) ^ bgx; - cols += 8; - tbits -= 8; - } - } - dest0 += VIDEO_FONT_WIDTH * CONFIG_VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_15BIT_555RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * (VIDEO_FONT_HEIGHT * WIDTH_BYTES); - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; - dest += VIDEO_LINE_LEN) { - cols = 0; - tbits = VIDEO_FONT_WIDTH; - while (tbits > 0) { - uint8_t bits = *cdat++; - - ((uint32_t *) dest)[cols + 0] = SHORTSWAP32 ((video_font_draw_table15 [bits >> 6] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 1] = SHORTSWAP32 ((video_font_draw_table15 [bits >> 4 & 3] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 2] = SHORTSWAP32 ((video_font_draw_table15 [bits >> 2 & 3] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 3] = SHORTSWAP32 ((video_font_draw_table15 [bits & 3] & eorx) ^ bgx); - cols += 8; - tbits -= 8; - } - } - dest0 += VIDEO_FONT_WIDTH * CONFIG_VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_16BIT_565RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * (VIDEO_FONT_HEIGHT * WIDTH_BYTES); - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; - dest += VIDEO_LINE_LEN) { - cols = 0; - tbits = VIDEO_FONT_WIDTH; - while (tbits > 0) { - uint8_t bits = *cdat++; - - ((uint32_t *) dest)[cols + 0] = SHORTSWAP32 ((video_font_draw_table16 [bits >> 6] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 1] = SHORTSWAP32 ((video_font_draw_table16 [bits >> 4 & 3] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 2] = SHORTSWAP32 ((video_font_draw_table16 [bits >> 2 & 3] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 3] = SHORTSWAP32 ((video_font_draw_table16 [bits & 3] & eorx) ^ bgx); - cols += 8; - tbits -= 8; - } - } - dest0 += VIDEO_FONT_WIDTH * CONFIG_VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_32BIT_X888RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * (VIDEO_FONT_HEIGHT * WIDTH_BYTES); - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; - dest += VIDEO_LINE_LEN) { - cols = 0; - tbits = VIDEO_FONT_WIDTH; - while (tbits > 0) { - uint8_t bits = *cdat++; - - ((uint32_t *) dest)[cols + 0] = SWAP32 ((video_font_draw_table32 [bits >> 4][0] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 1] = SWAP32 ((video_font_draw_table32 [bits >> 4][1] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 2] = SWAP32 ((video_font_draw_table32 [bits >> 4][2] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 3] = SWAP32 ((video_font_draw_table32 [bits >> 4][3] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 4] = SWAP32 ((video_font_draw_table32 [bits & 15][0] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 5] = SWAP32 ((video_font_draw_table32 [bits & 15][1] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 6] = SWAP32 ((video_font_draw_table32 [bits & 15][2] & eorx) ^ bgx); - ((uint32_t *) dest)[cols + 7] = SWAP32 ((video_font_draw_table32 [bits & 15][3] & eorx) ^ bgx); - cols += 8; - tbits -= 8; - } - } - dest0 += VIDEO_FONT_WIDTH * CONFIG_VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_24BIT_888RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * (VIDEO_FONT_HEIGHT * WIDTH_BYTES); - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; - dest += VIDEO_LINE_LEN) { - cols = 0; - tbits = VIDEO_FONT_WIDTH; - while (tbits > 0) { - uint8_t bits = *cdat++; - - ((uint32_t *) dest)[cols + 0] = (video_font_draw_table24[bits >> 4][0] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 1] = (video_font_draw_table24[bits >> 4][1] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 2] = (video_font_draw_table24[bits >> 4][2] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 3] = (video_font_draw_table24[bits & 15][0] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 4] = (video_font_draw_table24[bits & 15][1] & eorx) ^ bgx; - ((uint32_t *) dest)[cols + 5] = (video_font_draw_table24[bits & 15][2] & eorx) ^ bgx; - cols += 8; - tbits -= 8; - } - } - dest0 += VIDEO_FONT_WIDTH * CONFIG_VIDEO_PIXEL_SIZE; - s++; - } - break; - } -} - -/*****************************************************************************/ - -static inline void video_drawstring (int xx, int yy, unsigned char *s) -{ - video_drawchars (xx, yy, s, strlen ((char *)s)); -} - -/*****************************************************************************/ - -static void video_putchar (int xx, int yy, unsigned char c) -{ - video_drawchars (xx, yy + video_logo_height, &c, 1); -} - -/*****************************************************************************/ -#if defined(CONFIG_CONSOLE_CURSOR) || defined(CONFIG_VIDEO_SW_CURSOR) -static void video_set_cursor (void) -{ - /* swap drawing colors */ - eorx = fgx; - fgx = bgx; - bgx = eorx; - eorx = fgx ^ bgx; - /* draw cursor */ - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, - ' '); - /* restore drawing colors */ - eorx = fgx; - fgx = bgx; - bgx = eorx; - eorx = fgx ^ bgx; -} -#endif -/*****************************************************************************/ -#ifdef CONFIG_CONSOLE_CURSOR -void console_cursor (int state) -{ - static int last_state = 0; - -#ifdef CONFIG_CONSOLE_TIME - struct rtc_time tm; - char info[16]; - - /* time update only if cursor is on (faster scroll) */ - if (state) { - rtc_get (&tm); - - sprintf (info, " %02d:%02d:%02d ", tm.tm_hour, tm.tm_min, - tm.tm_sec); - video_drawstring (CONFIG_VIDEO_VISIBLE_COLS - 10 * VIDEO_FONT_WIDTH, - VIDEO_INFO_Y, (uchar *)info); - - sprintf (info, "%02d.%02d.%04d", tm.tm_mday, tm.tm_mon, - tm.tm_year); - video_drawstring (CONFIG_VIDEO_VISIBLE_COLS - 10 * VIDEO_FONT_WIDTH, - VIDEO_INFO_Y + 1 * VIDEO_FONT_HEIGHT, (uchar *)info); - } -#endif - - if (state && (last_state != state)) { - video_set_cursor (); - } - - if (!state && (last_state != state)) { - /* clear cursor */ - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, - ' '); - } - - last_state = state; -} -#endif - -/*****************************************************************************/ - -#ifndef VIDEO_HW_RECTFILL -static void memsetl (int *p, int c, int v) -{ - while (c--) - *(p++) = v; -} -#endif - -/*****************************************************************************/ - - -static void console_scrollup (void) -{ - /* copy up rows ignoring the first one */ - -#ifdef VIDEO_HW_BITBLT - video_hw_bitblt (CONFIG_VIDEO_PIXEL_SIZE, /* bytes per pixel */ - 0, /* source pos x */ - video_logo_height + VIDEO_FONT_HEIGHT, /* source pos y */ - 0, /* dest pos x */ - video_logo_height, /* dest pos y */ - CONFIG_VIDEO_VISIBLE_COLS, /* frame width */ - CONFIG_VIDEO_VISIBLE_ROWS - video_logo_height - VIDEO_FONT_HEIGHT /* frame height */ - ); -#else - memmove(CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, - CONSOLE_SCROLL_SIZE); -#endif - - /* clear the last one */ -#ifdef VIDEO_HW_RECTFILL - video_hw_rectfill (CONFIG_VIDEO_PIXEL_SIZE, /* bytes per pixel */ - 0, /* dest pos x */ - CONFIG_VIDEO_VISIBLE_ROWS - VIDEO_FONT_HEIGHT, /* dest pos y */ - CONFIG_VIDEO_VISIBLE_COLS, /* frame width */ - VIDEO_FONT_HEIGHT, /* frame height */ - CONSOLE_BG_COL /* fill color */ - ); -#else - memsetl (CONSOLE_ROW_LAST, CONSOLE_ROW_SIZE >> 2, CONSOLE_BG_COL); -#endif -} - -/*****************************************************************************/ - -static void console_back (void) -{ - CURSOR_OFF; - console_col--; - - if (console_col < 0) { - console_col = CONSOLE_COLS - 1; - console_row--; - if (console_row < 0) - console_row = 0; - } - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, - ' '); -} - -/*****************************************************************************/ - -static void console_newline (void) -{ - /* Check if last character in the line was just drawn. If so, cursor was - overwriten and need not to be cleared. Cursor clearing without this - check causes overwriting the 1st character of the line if line lenght - is >= CONSOLE_COLS - */ - if (console_col < CONSOLE_COLS) - CURSOR_OFF; - console_row++; - console_col = 0; - - /* Check if we need to scroll the terminal */ - if (console_row >= CONSOLE_ROWS) { - /* Scroll everything up */ - console_scrollup (); - - /* Decrement row number */ - console_row--; - } -} - -static void console_cr (void) -{ - CURSOR_OFF; - console_col = 0; -} - -/*****************************************************************************/ - -void video_putc (const char c) -{ - static int nl = 1; - - switch (c) { - case 13: /* back to first column */ - console_cr (); - break; - - case '\n': /* next line */ - if (console_col || (!console_col && nl)) - console_newline (); - nl = 1; - break; - - case 9: /* tab 8 */ - CURSOR_OFF; - console_col |= 0x0008; - console_col &= ~0x0007; - - if (console_col >= CONSOLE_COLS) - console_newline (); - break; - - case 8: /* backspace */ - console_back (); - break; - - default: /* draw the char */ - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, - c); - console_col++; - - /* check for newline */ - if (console_col >= CONSOLE_COLS) { - console_newline (); - nl = 0; - } - } - CURSOR_SET; -} - - -/*****************************************************************************/ - -void video_puts (const char *s) -{ - int count = strlen (s); - - while (count--) - video_putc (*s++); -} - -/*****************************************************************************/ - -/* - * Do not enforce drivers (or board code) to provide empty - * video_set_lut() if they do not support 8 bpp format. - * Implement weak default function instead. - */ -void __video_set_lut (unsigned int index, unsigned char r, - unsigned char g, unsigned char b) -{ -} -void video_set_lut (unsigned int, unsigned char, unsigned char, unsigned char) - __attribute__((weak, alias("__video_set_lut"))); - -#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN) - -#define FILL_8BIT_332RGB(r,g,b) { \ - *fb = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6); \ - fb ++; \ -} - -#define FILL_15BIT_555RGB(r,g,b) { \ - *(unsigned short *)fb = SWAP16((unsigned short)(((r>>3)<<10) | ((g>>3)<<5) | (b>>3))); \ - fb += 2; \ -} - -#define FILL_16BIT_565RGB(r,g,b) { \ - *(unsigned short *)fb = SWAP16((unsigned short)((((r)>>3)<<11) | (((g)>>2)<<5) | ((b)>>3))); \ - fb += 2; \ -} - -#define FILL_32BIT_X888RGB(r,g,b) { \ - *(unsigned long *)fb = SWAP32((unsigned long)(((r<<16) | (g<<8) | b))); \ - fb += 4; \ -} - -#ifdef VIDEO_FB_LITTLE_ENDIAN -#define FILL_24BIT_888RGB(r,g,b) { \ - fb[0] = b; \ - fb[1] = g; \ - fb[2] = r; \ - fb += 3; \ -} -#else -#define FILL_24BIT_888RGB(r,g,b) { \ - fb[0] = r; \ - fb[1] = g; \ - fb[2] = b; \ - fb += 3; \ -} -#endif - -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) -static void inline fill_555rgb_pswap(uchar *fb, int x, - uint8_t r, uint8_t g, uint8_t b) -{ - ushort *dst = (ushort *)fb; - ushort color = (ushort)(((r >> 3) << 10) | - ((g >> 3) << 5) | - (b >> 3)); - if (x & 1) - *(--dst) = color; - else - *(++dst) = color; -} -#endif - -/* - * RLE8 bitmap support - */ - -#ifdef CONFIG_VIDEO_BMP_RLE8 -/* Pre-calculated color table entry */ -struct palette { - union { - unsigned short w; /* word */ - unsigned int dw; /* double word */ - } ce; /* color entry */ -}; - -/* - * Helper to draw encoded/unencoded run. - */ -static void draw_bitmap (uchar **fb, uchar *bm, struct palette *p, - int cnt, int enc) -{ - ulong addr = (ulong)*fb; - int *off; - int enc_off = 1; - int i; - - /* - * Setup offset of the color index in the bitmap. - * Color index of encoded run is at offset 1. - */ - off = enc ? &enc_off : &i; - - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - for (i = 0; i < cnt; i++) - *(unsigned char *)addr++ = bm[*off]; - break; - case GDF_15BIT_555RGB: - case GDF_16BIT_565RGB: - /* differences handled while pre-calculating palette */ - for (i = 0; i < cnt; i++) { - *(unsigned short *)addr = p[bm[*off]].ce.w; - addr += 2; - } - break; - case GDF_32BIT_X888RGB: - for (i = 0; i < cnt; i++) { - *(unsigned long *)addr = p[bm[*off]].ce.dw; - addr += 4; - } - break; - } - *fb = (uchar *)addr; /* return modified address */ -} - -static int display_rle8_bitmap (bmp_image_t *img, int xoff, int yoff, - int width, int height) -{ - unsigned char *bm; - unsigned char *fbp; - unsigned int cnt, runlen; - int decode = 1; - int x, y, bpp, i, ncolors; - struct palette p[256]; - bmp_color_table_entry_t cte; - int green_shift, red_off; - - x = 0; - y = __le32_to_cpu(img->header.height) - 1; - ncolors = __le32_to_cpu(img->header.colors_used); - bpp = CONFIG_VIDEO_PIXEL_SIZE; - fbp = (unsigned char *)((unsigned int)video_fb_address + - (((y + yoff) * VIDEO_COLS) + xoff) * bpp); - - bm = (uchar *)img + __le32_to_cpu(img->header.data_offset); - - /* pre-calculate and setup palette */ - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - video_set_lut (i, cte.red, cte.green, cte.blue); - } - break; - case GDF_15BIT_555RGB: - case GDF_16BIT_565RGB: - if (CONFIG_VIDEO_DATA_FORMAT == GDF_15BIT_555RGB) { - green_shift = 3; - red_off = 10; - } else { - green_shift = 2; - red_off = 11; - } - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - p[i].ce.w = SWAP16((unsigned short) - (((cte.red >> 3) << red_off) | - ((cte.green >> green_shift) << 5) | - cte.blue >> 3)); - } - break; - case GDF_32BIT_X888RGB: - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - p[i].ce.dw = SWAP32((cte.red << 16) | (cte.green << 8) | - cte.blue); - } - break; - default: - printf("RLE Bitmap unsupported in video mode 0x%x\n", - CONFIG_VIDEO_DATA_FORMAT); - return -1; - } - - while (decode) { - switch (bm[0]) { - case 0: - switch (bm[1]) { - case 0: - /* scan line end marker */ - bm += 2; - x = 0; - y--; - fbp = (unsigned char *) - ((unsigned int)video_fb_address + - (((y + yoff) * VIDEO_COLS) + - xoff) * bpp); - continue; - case 1: - /* end of bitmap data marker */ - decode = 0; - break; - case 2: - /* run offset marker */ - x += bm[2]; - y -= bm[3]; - fbp = (unsigned char *) - ((unsigned int)video_fb_address + - (((y + yoff) * VIDEO_COLS) + - x + xoff) * bpp); - bm += 4; - break; - default: - /* unencoded run */ - cnt = bm[1]; - runlen = cnt; - bm += 2; - if (y < height) { - if (x >= width) { - x += runlen; - goto next_run; - } - if (x + runlen > width) - cnt = width - x; - - draw_bitmap (&fbp, bm, p, cnt, 0); - x += runlen; - } -next_run: - bm += runlen; - if (runlen & 1) - bm++; /* 0 padding if length is odd */ - } - break; - default: - /* encoded run */ - if (y < height) { /* only draw into visible area */ - cnt = bm[0]; - runlen = cnt; - if (x >= width) { - x += runlen; - bm += 2; - continue; - } - if (x + runlen > width) - cnt = width - x; - - draw_bitmap (&fbp, bm, p, cnt, 1); - x += runlen; - } - bm += 2; - break; - } - } - return 0; -} -#endif - -/* - * Display the BMP file located at address bmp_image. - */ -int video_display_bitmap (ulong bmp_image, int x, int y) -{ - unsigned xcount, ycount; - unsigned *fb; - bmp_image_t *bmp = (bmp_image_t *) bmp_image; - uchar *bmap; - unsigned padded_line; - unsigned long width, height, bpp; - unsigned colors; - unsigned long compression; - bmp_color_table_entry_t cte; -#ifdef CONFIG_VIDEO_BMP_GZIP - unsigned char *dst = NULL; - ulong len; -#endif - - WATCHDOG_RESET (); - - if (!((bmp->header.signature[0] == 'B') && - (bmp->header.signature[1] == 'M'))) { - -#ifdef CONFIG_VIDEO_BMP_GZIP - /* - * Could be a gzipped bmp image, try to decrompress... - */ - len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; - dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE); - if (dst == NULL) { - printf("Error: malloc in gunzip failed!\n"); - return(1); - } - if (gunzip(dst, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE, (uchar *)bmp_image, &len) != 0) { - printf ("Error: no valid bmp or bmp.gz image at %lx\n", bmp_image); - free(dst); - return 1; - } - if (len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) { - printf("Image could be truncated (increase CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n"); - } - - /* - * Set addr to decompressed image - */ - bmp = (bmp_image_t *)dst; - - if (!((bmp->header.signature[0] == 'B') && - (bmp->header.signature[1] == 'M'))) { - printf ("Error: no valid bmp.gz image at %lx\n", bmp_image); - free(dst); - return 1; - } -#else - printf ("Error: no valid bmp image at %lx\n", bmp_image); - return 1; -#endif /* CONFIG_VIDEO_BMP_GZIP */ - } - - width = le32_to_cpu (bmp->header.width); - height = le32_to_cpu (bmp->header.height); - bpp = le16_to_cpu (bmp->header.bit_count); - colors = le32_to_cpu (bmp->header.colors_used); - compression = le32_to_cpu (bmp->header.compression); - - debug ("Display-bmp: %d x %d with %d colors\n", - width, height, colors); - - if (compression != BMP_BI_RGB -#ifdef CONFIG_VIDEO_BMP_RLE8 - && compression != BMP_BI_RLE8 -#endif - ) { - printf ("Error: compression type %ld not supported\n", - compression); -#ifdef CONFIG_VIDEO_BMP_GZIP - if (dst) - free(dst); -#endif - return 1; - } - - padded_line = (((width * bpp + 7) / 8) + 3) & ~0x3; - -#ifdef CONFIG_SPLASH_SCREEN_ALIGN - if (x == BMP_ALIGN_CENTER) - x = max(0, (CONFIG_VIDEO_VISIBLE_COLS - width) / 2); - else if (x < 0) - x = max(0, CONFIG_VIDEO_VISIBLE_COLS - width + x + 1); - - if (y == BMP_ALIGN_CENTER) - y = max(0, (CONFIG_VIDEO_VISIBLE_ROWS - height) / 2); - else if (y < 0) - y = max(0, CONFIG_VIDEO_VISIBLE_ROWS - height + y + 1); -#endif /* CONFIG_SPLASH_SCREEN_ALIGN */ - - if ((x + width) > CONFIG_VIDEO_VISIBLE_COLS) - width = CONFIG_VIDEO_VISIBLE_COLS - x; - if ((y + height) > CONFIG_VIDEO_VISIBLE_ROWS) - height = CONFIG_VIDEO_VISIBLE_ROWS - y; - - bmap = (uchar *) bmp + le32_to_cpu (bmp->header.data_offset); - fb = (uchar *) (video_fb_address + - ((y + height - 1) * VIDEO_COLS * CONFIG_VIDEO_PIXEL_SIZE) + - x * CONFIG_VIDEO_PIXEL_SIZE); - -#ifdef CONFIG_VIDEO_BMP_RLE8 - if (compression == BMP_BI_RLE8) { - return display_rle8_bitmap(bmp, - x, y, width, height); - } -#endif - - /* We handle only 4, 8, or 24 bpp bitmaps */ - switch (le16_to_cpu (bmp->header.bit_count)) { - case 4: - padded_line -= width / 2; - ycount = height; - - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET (); - /* - * Don't assume that 'width' is an - * even number - */ - for (xcount = 0; xcount < width; xcount++) { - uchar idx; - - if (xcount & 1) { - idx = *bmap & 0xF; - bmap++; - } else - idx = *bmap >> 4; - cte = bmp->color_table[idx]; - FILL_32BIT_X888RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * - CONFIG_VIDEO_PIXEL_SIZE; - } - break; - default: - puts("4bpp bitmap unsupported with current " - "video mode\n"); - break; - } - break; - - case 8: - padded_line -= width; - if (CONFIG_VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) { - /* Copy colormap */ - for (xcount = 0; xcount < colors; ++xcount) { - cte = bmp->color_table[xcount]; - video_set_lut (xcount, cte.red, cte.green, cte.blue); - } - } - ycount = height; - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - *fb++ = *bmap++; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF__8BIT_332RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_8BIT_332RGB (cte.red, cte.green, cte.blue); - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_15BIT_555RGB: - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap (fb, xpos++, cte.red, - cte.green, cte.blue); - fb += 2; -#else - FILL_15BIT_555RGB (cte.red, cte.green, cte.blue); -#endif - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_16BIT_565RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_16BIT_565RGB (cte.red, cte.green, cte.blue); - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_32BIT_X888RGB (cte.red, cte.green, cte.blue); - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_24BIT_888RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_24BIT_888RGB (cte.red, cte.green, cte.blue); - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - } - break; - case 24: - padded_line -= 3 * width; - ycount = height; - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_332RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - FILL_8BIT_332RGB (bmap[2], bmap[1], bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_15BIT_555RGB: - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap (fb, xpos++, bmap[2], - bmap[1], bmap[0]); - fb += 2; -#else - FILL_15BIT_555RGB (bmap[2], bmap[1], bmap[0]); -#endif - bmap += 3; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_16BIT_565RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - FILL_16BIT_565RGB (bmap[2], bmap[1], bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - FILL_32BIT_X888RGB (bmap[2], bmap[1], bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - case GDF_24BIT_888RGB: - while (ycount--) { - WATCHDOG_RESET (); - xcount = width; - while (xcount--) { - FILL_24BIT_888RGB (bmap[2], bmap[1], bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= (CONFIG_VIDEO_VISIBLE_COLS + width) * CONFIG_VIDEO_PIXEL_SIZE; - } - break; - default: - printf ("Error: 24 bits/pixel bitmap incompatible with current video mode\n"); - break; - } - break; - default: - printf ("Error: %d bit/pixel bitmaps not supported by U-Boot\n", - le16_to_cpu (bmp->header.bit_count)); - break; - } - -#ifdef CONFIG_VIDEO_BMP_GZIP - if (dst) { - free(dst); - } -#endif - - return (0); -} -#endif - -/*****************************************************************************/ - -#ifdef CONFIG_VIDEO_LOGO -void logo_plot (void *screen, int width, int x, int y) -{ - - int xcount, i; - int skip = (width - VIDEO_LOGO_WIDTH) * CONFIG_VIDEO_PIXEL_SIZE; - int ycount = video_logo_height; - unsigned char r, g, b, *logo_red, *logo_blue, *logo_green; - unsigned char *source; - unsigned char *dest = (unsigned char *)screen + - ((y * width * CONFIG_VIDEO_PIXEL_SIZE) + - x * CONFIG_VIDEO_PIXEL_SIZE); - -#ifdef CONFIG_VIDEO_BMP_LOGO - source = bmp_logo_bitmap; - - /* Allocate temporary space for computing colormap */ - logo_red = malloc (BMP_LOGO_COLORS); - logo_green = malloc (BMP_LOGO_COLORS); - logo_blue = malloc (BMP_LOGO_COLORS); - /* Compute color map */ - for (i = 0; i < VIDEO_LOGO_COLORS; i++) { - logo_red[i] = (bmp_logo_palette[i] & 0x0f00) >> 4; - logo_green[i] = (bmp_logo_palette[i] & 0x00f0); - logo_blue[i] = (bmp_logo_palette[i] & 0x000f) << 4; - } -#else - source = linux_logo; - logo_red = linux_logo_red; - logo_green = linux_logo_green; - logo_blue = linux_logo_blue; -#endif - - if (CONFIG_VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) { - for (i = 0; i < VIDEO_LOGO_COLORS; i++) { - video_set_lut (i + VIDEO_LOGO_LUT_OFFSET, - logo_red[i], logo_green[i], logo_blue[i]); - } - } - - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - xcount = VIDEO_LOGO_WIDTH; - while (xcount--) { - r = logo_red[*source - VIDEO_LOGO_LUT_OFFSET]; - g = logo_green[*source - VIDEO_LOGO_LUT_OFFSET]; - b = logo_blue[*source - VIDEO_LOGO_LUT_OFFSET]; - - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - *dest = *source; - break; - case GDF__8BIT_332RGB: - *dest = ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6); - break; - case GDF_15BIT_555RGB: -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap (dest, xpos++, r, g, b); -#else - *(unsigned short *) dest = - SWAP16 ((unsigned short) (((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3))); -#endif - break; - case GDF_16BIT_565RGB: - *(unsigned short *) dest = - SWAP16 ((unsigned short) (((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3))); - break; - case GDF_32BIT_X888RGB: - *(unsigned long *) dest = - SWAP32 ((unsigned long) ((r << 16) | (g << 8) | b)); - break; - case GDF_24BIT_888RGB: -#ifdef VIDEO_FB_LITTLE_ENDIAN - dest[0] = b; - dest[1] = g; - dest[2] = r; -#else - dest[0] = r; - dest[1] = g; - dest[2] = b; -#endif - break; - } - source++; - dest += CONFIG_VIDEO_PIXEL_SIZE; - } - dest += skip; - } -#ifdef CONFIG_VIDEO_BMP_LOGO - free (logo_red); - free (logo_green); - free (logo_blue); -#endif -} - -/*****************************************************************************/ - -static void *video_logo (void) -{ - char info[128]; - extern char version_string; - int space, len, y_off = 0; - -#ifdef CONFIG_SPLASH_SCREEN - char *s; - ulong addr; - - if ((s = getenv ("splashimage")) != NULL) { - int x = 0, y = 0; - - addr = simple_strtoul (s, NULL, 16); -#ifdef CONFIG_SPLASH_SCREEN_ALIGN - if ((s = getenv ("splashpos")) != NULL) { - if (s[0] == 'm') - x = BMP_ALIGN_CENTER; - else - x = simple_strtol (s, NULL, 0); - - if ((s = strchr (s + 1, ',')) != NULL) { - if (s[1] == 'm') - y = BMP_ALIGN_CENTER; - else - y = simple_strtol (s + 1, NULL, 0); - } - } -#endif /* CONFIG_SPLASH_SCREEN_ALIGN */ - - if (video_display_bitmap (addr, x, y) == 0) { - video_logo_height = 0; - return ((void *) (video_fb_address)); - } - } -#endif /* CONFIG_SPLASH_SCREEN */ - - logo_plot (video_fb_address, VIDEO_COLS, 0, 0); - - sprintf (info, " %s", &version_string); - - space = (VIDEO_LINE_LEN / 2 - VIDEO_INFO_X) / VIDEO_FONT_WIDTH; - len = strlen(info); - - if (len > space) { - video_drawchars (VIDEO_INFO_X, VIDEO_INFO_Y, - (uchar *)info, space); - video_drawchars (VIDEO_INFO_X + VIDEO_FONT_WIDTH, - VIDEO_INFO_Y + VIDEO_FONT_HEIGHT, - (uchar *)info + space, len - space); - y_off = 1; - } else - video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y, (uchar *)info); - -#ifdef CONFIG_CONSOLE_EXTRA_INFO - { - int i, n = ((video_logo_height - VIDEO_FONT_HEIGHT) / VIDEO_FONT_HEIGHT); - - for (i = 1; i < n; i++) { - video_get_info_str (i, info); - if (!*info) - continue; - - len = strlen(info); - if (len > space) { - video_drawchars (VIDEO_INFO_X, - VIDEO_INFO_Y + - (i + y_off) * VIDEO_FONT_HEIGHT, - (uchar *)info, space); - y_off++; - video_drawchars (VIDEO_INFO_X + VIDEO_FONT_WIDTH, - VIDEO_INFO_Y + - (i + y_off) * VIDEO_FONT_HEIGHT, - (uchar *)info + space, - len - space); - } else { - video_drawstring (VIDEO_INFO_X, - VIDEO_INFO_Y + - (i + y_off) * VIDEO_FONT_HEIGHT, - (uchar *)info); - } - } - } -#endif - - return (video_fb_address + video_logo_height * VIDEO_LINE_LEN); -} -#endif - - -/*****************************************************************************/ - -int video_resume(void *videobase, int row, int col) { - unsigned char color8; - - video_fb_address = videobase; -#ifdef CONFIG_VIDEO_HW_CURSOR - video_init_hw_cursor (VIDEO_FONT_WIDTH, VIDEO_FONT_HEIGHT); -#endif - - /* Init drawing pats */ - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - video_set_lut (0x01, CONSOLE_FG_COL, CONSOLE_FG_COL, CONSOLE_FG_COL); - video_set_lut (0x00, CONSOLE_BG_COL, CONSOLE_BG_COL, CONSOLE_BG_COL); - fgx = 0x01010101; - bgx = 0x00000000; - break; - case GDF__8BIT_332RGB: - color8 = ((CONSOLE_FG_COL & 0xe0) | - ((CONSOLE_FG_COL >> 3) & 0x1c) | CONSOLE_FG_COL >> 6); - fgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | color8; - color8 = ((CONSOLE_BG_COL & 0xe0) | - ((CONSOLE_BG_COL >> 3) & 0x1c) | CONSOLE_BG_COL >> 6); - bgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | color8; - break; - case GDF_15BIT_555RGB: - fgx = (((CONSOLE_FG_COL >> 3) << 26) | - ((CONSOLE_FG_COL >> 3) << 21) | ((CONSOLE_FG_COL >> 3) << 16) | - ((CONSOLE_FG_COL >> 3) << 10) | ((CONSOLE_FG_COL >> 3) << 5) | - (CONSOLE_FG_COL >> 3)); - bgx = (((CONSOLE_BG_COL >> 3) << 26) | - ((CONSOLE_BG_COL >> 3) << 21) | ((CONSOLE_BG_COL >> 3) << 16) | - ((CONSOLE_BG_COL >> 3) << 10) | ((CONSOLE_BG_COL >> 3) << 5) | - (CONSOLE_BG_COL >> 3)); - break; - case GDF_16BIT_565RGB: - fgx = (((CONSOLE_FG_COL >> 3) << 27) | - ((CONSOLE_FG_COL >> 2) << 21) | ((CONSOLE_FG_COL >> 3) << 16) | - ((CONSOLE_FG_COL >> 3) << 11) | ((CONSOLE_FG_COL >> 2) << 5) | - (CONSOLE_FG_COL >> 3)); - bgx = (((CONSOLE_BG_COL >> 3) << 27) | - ((CONSOLE_BG_COL >> 2) << 21) | ((CONSOLE_BG_COL >> 3) << 16) | - ((CONSOLE_BG_COL >> 3) << 11) | ((CONSOLE_BG_COL >> 2) << 5) | - (CONSOLE_BG_COL >> 3)); - break; - case GDF_32BIT_X888RGB: - fgx = (CONSOLE_FG_COL << 16) | (CONSOLE_FG_COL << 8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL << 16) | (CONSOLE_BG_COL << 8) | CONSOLE_BG_COL; - break; - case GDF_24BIT_888RGB: - fgx = (CONSOLE_FG_COL << 24) | (CONSOLE_FG_COL << 16) | - (CONSOLE_FG_COL << 8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL << 24) | (CONSOLE_BG_COL << 16) | - (CONSOLE_BG_COL << 8) | CONSOLE_BG_COL; - break; - } - eorx = fgx ^ bgx; - -#ifdef CONFIG_VIDEO_LOGO - /* Plot the logo and get start point of console */ - PRINTD ("Video: Drawing the logo ...\n"); - video_console_address = video_logo (); -#else - video_console_address = video_fb_address; -#endif - - /* Initialize the console */ - console_col = col; - console_row = row; - - return 0; -} - -int video_get_col(void) { - return console_col; -} - -int video_get_row(void) { - return console_row; -} - -int video_init (void *videobase) -{ - unsigned char color8; - - video_fb_address = videobase; -#ifdef CONFIG_VIDEO_HW_CURSOR - video_init_hw_cursor (VIDEO_FONT_WIDTH, VIDEO_FONT_HEIGHT); -#endif - - /* Init drawing pats */ - switch (CONFIG_VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - video_set_lut (0x01, CONSOLE_FG_COL, CONSOLE_FG_COL, CONSOLE_FG_COL); - video_set_lut (0x00, CONSOLE_BG_COL, CONSOLE_BG_COL, CONSOLE_BG_COL); - fgx = 0x01010101; - bgx = 0x00000000; - break; - case GDF__8BIT_332RGB: - color8 = ((CONSOLE_FG_COL & 0xe0) | - ((CONSOLE_FG_COL >> 3) & 0x1c) | CONSOLE_FG_COL >> 6); - fgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | color8; - color8 = ((CONSOLE_BG_COL & 0xe0) | - ((CONSOLE_BG_COL >> 3) & 0x1c) | CONSOLE_BG_COL >> 6); - bgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | color8; - break; - case GDF_15BIT_555RGB: - fgx = (((CONSOLE_FG_COL >> 3) << 26) | - ((CONSOLE_FG_COL >> 3) << 21) | ((CONSOLE_FG_COL >> 3) << 16) | - ((CONSOLE_FG_COL >> 3) << 10) | ((CONSOLE_FG_COL >> 3) << 5) | - (CONSOLE_FG_COL >> 3)); - bgx = (((CONSOLE_BG_COL >> 3) << 26) | - ((CONSOLE_BG_COL >> 3) << 21) | ((CONSOLE_BG_COL >> 3) << 16) | - ((CONSOLE_BG_COL >> 3) << 10) | ((CONSOLE_BG_COL >> 3) << 5) | - (CONSOLE_BG_COL >> 3)); - break; - case GDF_16BIT_565RGB: - fgx = (((CONSOLE_FG_COL >> 3) << 27) | - ((CONSOLE_FG_COL >> 2) << 21) | ((CONSOLE_FG_COL >> 3) << 16) | - ((CONSOLE_FG_COL >> 3) << 11) | ((CONSOLE_FG_COL >> 2) << 5) | - (CONSOLE_FG_COL >> 3)); - bgx = (((CONSOLE_BG_COL >> 3) << 27) | - ((CONSOLE_BG_COL >> 2) << 21) | ((CONSOLE_BG_COL >> 3) << 16) | - ((CONSOLE_BG_COL >> 3) << 11) | ((CONSOLE_BG_COL >> 2) << 5) | - (CONSOLE_BG_COL >> 3)); - break; - case GDF_32BIT_X888RGB: - fgx = (CONSOLE_FG_COL << 16) | (CONSOLE_FG_COL << 8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL << 16) | (CONSOLE_BG_COL << 8) | CONSOLE_BG_COL; - break; - case GDF_24BIT_888RGB: - fgx = (CONSOLE_FG_COL << 24) | (CONSOLE_FG_COL << 16) | - (CONSOLE_FG_COL << 8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL << 24) | (CONSOLE_BG_COL << 16) | - (CONSOLE_BG_COL << 8) | CONSOLE_BG_COL; - break; - } - eorx = fgx ^ bgx; - -#ifdef CONFIG_VIDEO_LOGO - /* Plot the logo and get start point of console */ - PRINTD ("Video: Drawing the logo ...\n"); - video_console_address = video_logo (); -#else - video_console_address = video_fb_address; -#endif - - /* Initialize the console */ - console_col = 0; - console_row = 0; - - memsetl(CONSOLE_ROW_FIRST, VIDEO_COLS * VIDEO_ROWS, - CONSOLE_BG_COL); - - return 0; -} diff --git a/fusee/common/display/video_fb.h b/fusee/common/display/video_fb.h deleted file mode 100644 index 43a7ef60d..000000000 --- a/fusee/common/display/video_fb.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 1997-2002 ELTEC Elektronik AG - * Frank Gottschling - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _VIDEO_FB_H_ -#define _VIDEO_FB_H_ - -#define CONSOLE_BG_COL 0x00 -#define CONSOLE_FG_COL 0xa0 - -/* Try using the small font */ -#define CONFIG_VIDEO_FONT_SMALL - -/* - * Graphic Data Format (GDF) bits for VIDEO_DATA_FORMAT - */ -#define GDF__8BIT_INDEX 0 -#define GDF_15BIT_555RGB 1 -#define GDF_16BIT_565RGB 2 -#define GDF_32BIT_X888RGB 3 -#define GDF_24BIT_888RGB 4 -#define GDF__8BIT_332RGB 5 - -#define CONFIG_VIDEO_FB_LITTLE_ENDIAN -#define CONFIG_VIDEO_VISIBLE_COLS 720 -#define CONFIG_VIDEO_VISIBLE_ROWS 1280 -#define CONFIG_VIDEO_COLS 768 -#define CONFIG_VIDEO_PIXEL_SIZE 4 -#define CONFIG_VIDEO_DATA_FORMAT GDF_32BIT_X888RGB /* BGR actually, but w/e */ - -int video_get_col(void); -int video_get_row(void); - -int video_init(void *fb); -int video_resume(void *fb, int row, int col); -void video_putc(char c); -void video_puts(const char *s); - -#endif /*_VIDEO_FB_H_ */ diff --git a/fusee/common/display/video_font_large.h b/fusee/common/display/video_font_large.h deleted file mode 100644 index 7bb504ed5..000000000 --- a/fusee/common/display/video_font_large.h +++ /dev/null @@ -1,6181 +0,0 @@ -/* - * (C) Copyright 2014 - * Andrey Warkentin - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _VIDEO_FONT_LARGE_ -#define _VIDEO_FONT_LARGE_ - -#define FONTDATAMAX 11264 - -#define VIDEO_FONT_CHARS 256 -#define VIDEO_FONT_WIDTH 12 -#define VIDEO_FONT_HEIGHT 22 -#define VIDEO_FONT_SIZE (VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT) - -static unsigned char video_fontdata[FONTDATAMAX] = { - - /* 0 0x00 '^@' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 1 0x01 '^A' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x30, 0x60, /* 001100000110 */ - 0x65, 0x30, /* 011001010011 */ - 0x6d, 0xb0, /* 011011011011 */ - 0x60, 0x30, /* 011000000011 */ - 0x62, 0x30, /* 011000100011 */ - 0x62, 0x30, /* 011000100011 */ - 0x60, 0x30, /* 011000000011 */ - 0x6f, 0xb0, /* 011011111011 */ - 0x67, 0x30, /* 011001110011 */ - 0x30, 0x60, /* 001100000110 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 2 0x02 '^B' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x7a, 0xf0, /* 011110101111 */ - 0x72, 0x70, /* 011100100111 */ - 0x7f, 0xf0, /* 011111111111 */ - 0x7d, 0xf0, /* 011111011111 */ - 0x7d, 0xf0, /* 011111011111 */ - 0x7f, 0xf0, /* 011111111111 */ - 0x70, 0x70, /* 011100000111 */ - 0x78, 0xf0, /* 011110001111 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 3 0x03 '^C' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 4 0x04 '^D' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x02, 0x00, /* 000000100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x0f, 0x80, /* 000011111000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x07, 0x00, /* 000001110000 */ - 0x02, 0x00, /* 000000100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 5 0x05 '^E' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x02, 0x00, /* 000000100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x07, 0x00, /* 000001110000 */ - 0x02, 0x00, /* 000000100000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x1a, 0xc0, /* 000110101100 */ - 0x02, 0x00, /* 000000100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 6 0x06 '^F' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x36, 0xc0, /* 001101101100 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 7 0x07 '^G' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 8 0x08 '^H' */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xf9, 0xf0, /* 111110011111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xe0, 0x70, /* 111000000111 */ - 0xe0, 0x70, /* 111000000111 */ - 0xc0, 0x30, /* 110000000011 */ - 0xc0, 0x30, /* 110000000011 */ - 0xe0, 0x70, /* 111000000111 */ - 0xe0, 0x70, /* 111000000111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf9, 0xf0, /* 111110011111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - - /* 9 0x09 '^I' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 10 0x0a '^J' */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xf9, 0xf0, /* 111110011111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xe6, 0x70, /* 111001100111 */ - 0xe6, 0x70, /* 111001100111 */ - 0xcf, 0x30, /* 110011110011 */ - 0xcf, 0x30, /* 110011110011 */ - 0xe6, 0x70, /* 111001100111 */ - 0xe6, 0x70, /* 111001100111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf0, 0xf0, /* 111100001111 */ - 0xf9, 0xf0, /* 111110011111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - - /* 11 0x0b '^K' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x01, 0xe0, /* 000000011110 */ - 0x03, 0x60, /* 000000110110 */ - 0x06, 0x60, /* 000001100110 */ - 0x1e, 0x00, /* 000111100000 */ - 0x33, 0x00, /* 001100110000 */ - 0x33, 0x00, /* 001100110000 */ - 0x61, 0x80, /* 011000011000 */ - 0x61, 0x80, /* 011000011000 */ - 0x33, 0x00, /* 001100110000 */ - 0x33, 0x00, /* 001100110000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 12 0x0c '^L' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 13 0x0d '^M' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x0c, 0x60, /* 000011000110 */ - 0x0c, 0x60, /* 000011000110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x3c, 0x00, /* 001111000000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 14 0x0e '^N' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x19, 0xe0, /* 000110011110 */ - 0x1b, 0xe0, /* 000110111110 */ - 0x1b, 0xc0, /* 000110111100 */ - 0x79, 0x80, /* 011110011000 */ - 0xf8, 0x00, /* 111110000000 */ - 0xf0, 0x00, /* 111100000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 15 0x0f '^O' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x0d, 0x80, /* 000011011000 */ - 0x6d, 0xb0, /* 011011011011 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x6d, 0xb0, /* 011011011011 */ - 0x0d, 0x80, /* 000011011000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 16 0x10 '^P' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x20, /* 000000000010 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0xe0, /* 000000001110 */ - 0x01, 0xe0, /* 000000011110 */ - 0x03, 0xe0, /* 000000111110 */ - 0x07, 0xe0, /* 000001111110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x07, 0xe0, /* 000001111110 */ - 0x03, 0xe0, /* 000000111110 */ - 0x01, 0xe0, /* 000000011110 */ - 0x00, 0xe0, /* 000000001110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x20, /* 000000000010 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 17 0x11 '^Q' */ - 0x00, 0x00, /* 000000000000 */ - 0x40, 0x00, /* 010000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x7e, 0x00, /* 011111100000 */ - 0x7f, 0x00, /* 011111110000 */ - 0x7f, 0x80, /* 011111111000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x7f, 0x80, /* 011111111000 */ - 0x7f, 0x00, /* 011111110000 */ - 0x7e, 0x00, /* 011111100000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x40, 0x00, /* 010000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 18 0x12 '^R' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 19 0x13 '^S' */ - 0x00, 0x00, /* 000000000000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 20 0x14 '^T' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xf0, /* 000111111111 */ - 0x3c, 0xc0, /* 001111001100 */ - 0x7c, 0xc0, /* 011111001100 */ - 0x7c, 0xc0, /* 011111001100 */ - 0x7c, 0xc0, /* 011111001100 */ - 0x3c, 0xc0, /* 001111001100 */ - 0x1c, 0xc0, /* 000111001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x1c, 0xe0, /* 000111001110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 21 0x15 '^U' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0x80, /* 000000011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 22 0x16 '^V' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 23 0x17 '^W' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 24 0x18 '^X' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 25 0x19 '^Y' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 26 0x1a '^Z' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x08, 0x00, /* 000010000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x38, 0x00, /* 001110000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0xff, 0xe0, /* 111111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x38, 0x00, /* 001110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x08, 0x00, /* 000010000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 27 0x1b '^[' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0x00, /* 000000010000 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xf0, /* 011111111111 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x01, 0xc0, /* 000000011100 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0x00, /* 000000010000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 28 0x1c '^\' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 29 0x1d '^]' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x09, 0x00, /* 000010010000 */ - 0x19, 0x80, /* 000110011000 */ - 0x39, 0xc0, /* 001110011100 */ - 0x7f, 0xe0, /* 011111111110 */ - 0xff, 0xf0, /* 111111111111 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x39, 0xc0, /* 001110011100 */ - 0x19, 0x80, /* 000110011000 */ - 0x09, 0x00, /* 000010010000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 30 0x1e '^^' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 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0x0e, 0x00, /* 000011100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 32 0x20 ' ' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 33 0x21 '!' */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 34 0x22 '"' */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 35 0x23 '#' */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x30, /* 000000110011 */ - 0x03, 0x30, /* 000000110011 */ - 0x03, 0x30, /* 000000110011 */ - 0x06, 0x60, /* 000001100110 */ - 0x1f, 0xf0, /* 000111111111 */ - 0x1f, 0xf0, /* 000111111111 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x33, 0x00, /* 001100110000 */ - 0x66, 0x00, /* 011001100000 */ - 0x66, 0x00, /* 011001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 36 0x24 '$' */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x66, 0xe0, /* 011001101110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x00, /* 011001100000 */ - 0x3e, 0x00, /* 001111100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x07, 0xc0, /* 000001111100 */ - 0x06, 0x60, /* 000001100110 */ - 0x06, 0x60, /* 000001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 37 0x25 '%' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x38, 0xc0, /* 001110001100 */ - 0x4c, 0xc0, /* 010011001100 */ - 0x45, 0x80, /* 010001011000 */ - 0x65, 0x80, /* 011001011000 */ - 0x3b, 0x00, /* 001110110000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0d, 0xc0, /* 000011011100 */ - 0x1a, 0x60, /* 000110100110 */ - 0x1a, 0x20, /* 000110100010 */ - 0x33, 0x20, /* 001100110010 */ - 0x31, 0xc0, /* 001100011100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 38 0x26 '&' */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x0f, 0x80, /* 000011111000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x3e, 0x00, /* 001111100000 */ - 0x77, 0x00, /* 011101110000 */ - 0x63, 0x60, /* 011000110110 */ - 0x61, 0xe0, /* 011000011110 */ - 0x61, 0xc0, /* 011000011100 */ - 0x61, 0x80, /* 011000011000 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 39 0x27 ''' */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 40 0x28 '(' */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x00, /* 000000110000 */ - 0x01, 0x80, /* 000000011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 41 0x29 ')' */ - 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0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 46 0x2e '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 47 0x2f '/' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x60, 0x00, /* 011000000000 */ - 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0x10, 0x00, /* 000100000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x20, 0x00, /* 001000000000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x31, 0xc0, /* 001100011100 */ - 0x00, 0xe0, /* 000000001110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x40, 0x60, /* 010000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 54 0x36 '6' */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x67, 0x80, /* 011001111000 */ - 0x6f, 0xc0, /* 011011111100 */ - 0x70, 0xe0, /* 011100001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 55 0x37 '7' */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x60, 0x40, /* 011000000100 */ - 0x00, 0x40, /* 000000000100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0x80, /* 000000001000 */ - 0x00, 0x80, /* 000000001000 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0x00, /* 000000010000 */ - 0x01, 0x00, /* 000000010000 */ - 0x03, 0x00, /* 000000110000 */ - 0x02, 0x00, /* 000000100000 */ - 0x02, 0x00, /* 000000100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 56 0x38 '8' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x11, 0x80, /* 000100011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x11, 0x80, /* 000100011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x18, 0x80, /* 000110001000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 57 0x39 '9' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0xe0, /* 011100001110 */ - 0x3f, 0x60, /* 001111110110 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x01, 0x80, /* 000000011000 */ - 0x07, 0x00, /* 000001110000 */ - 0x3c, 0x00, /* 001111000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 58 0x3a ':' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 59 0x3b ';' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 60 0x3c '<' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x60, /* 000000000110 */ - 0x01, 0xc0, /* 000000011100 */ - 0x07, 0x00, /* 000001110000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x07, 0x00, /* 000001110000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 61 0x3d '=' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 62 0x3e '>' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x38, 0x00, /* 001110000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x03, 0x80, /* 000000111000 */ - 0x00, 0xe0, /* 000000001110 */ - 0x00, 0xe0, /* 000000001110 */ - 0x03, 0x80, /* 000000111000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x38, 0x00, /* 001110000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 63 0x3f '?' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x39, 0xc0, /* 001110011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 64 0x40 '@' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x30, 0x60, /* 001100000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x67, 0x20, /* 011001110010 */ - 0x6f, 0xa0, /* 011011111010 */ - 0x6c, 0xa0, /* 011011001010 */ - 0x6c, 0xa0, /* 011011001010 */ - 0x67, 0xe0, /* 011001111110 */ - 0x60, 0x00, /* 011000000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 65 0x41 'A' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x09, 0x00, /* 000010010000 */ - 0x11, 0x80, /* 000100011000 */ - 0x11, 0x80, /* 000100011000 */ - 0x10, 0x80, /* 000100001000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x20, 0x40, /* 001000000100 */ - 0x40, 0x60, /* 010000000110 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0xf0, /* 111000001111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 66 0x42 'B' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0x00, /* 111111110000 */ - 0x60, 0x80, /* 011000001000 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x61, 0x80, /* 011000011000 */ - 0x7f, 0x80, /* 011111111000 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0xc0, /* 011000001100 */ - 0xff, 0x80, /* 111111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 67 0x43 'C' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xc0, /* 000011111100 */ - 0x10, 0x60, /* 000100000110 */ - 0x20, 0x20, /* 001000000010 */ - 0x20, 0x00, /* 001000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x20, 0x00, /* 001000000000 */ - 0x30, 0x20, /* 001100000010 */ - 0x18, 0x40, /* 000110000100 */ - 0x0f, 0x80, /* 000011111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 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0x30, 0x80, /* 001100001000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x30, 0x80, /* 001100001000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x20, /* 001100000010 */ - 0x30, 0x20, /* 001100000010 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 70 0x46 'F' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x30, 0x40, /* 001100000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x80, /* 001100001000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x30, 0x80, /* 001100001000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 71 0x47 'G' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xc0, /* 000011111100 */ - 0x10, 0x60, /* 000100000110 */ - 0x20, 0x20, /* 001000000010 */ - 0x20, 0x00, /* 001000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x61, 0xf0, /* 011000011111 */ - 0x60, 0x60, /* 011000000110 */ - 0x20, 0x60, /* 001000000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x18, 0x60, /* 000110000110 */ - 0x0f, 0x80, /* 000011111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 72 0x48 'H' */ - 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0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x38, 0x00, /* 001110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 75 0x4b 'K' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0xe0, /* 111100001110 */ - 0x61, 0x80, /* 011000011000 */ - 0x63, 0x00, /* 011000110000 */ - 0x66, 0x00, /* 011001100000 */ - 0x6c, 0x00, /* 011011000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x6e, 0x00, /* 011011100000 */ - 0x67, 0x00, /* 011001110000 */ - 0x63, 0x80, /* 011000111000 */ - 0x61, 0xc0, /* 011000011100 */ - 0x60, 0xe0, /* 011000001110 */ - 0xf0, 0x70, /* 111100000111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 76 0x4c 'L' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x20, /* 001100000010 */ - 0x30, 0x20, /* 001100000010 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 77 0x4d 'M' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xe0, 0x70, /* 111000000111 */ - 0x60, 0xe0, /* 011000001110 */ - 0x70, 0xe0, /* 011100001110 */ - 0x70, 0xe0, /* 011100001110 */ - 0x70, 0xe0, /* 011100001110 */ - 0x59, 0x60, /* 010110010110 */ - 0x59, 0x60, /* 010110010110 */ - 0x59, 0x60, /* 010110010110 */ - 0x4d, 0x60, /* 010011010110 */ - 0x4e, 0x60, /* 010011100110 */ - 0x4e, 0x60, /* 010011100110 */ - 0x44, 0x60, /* 010001000110 */ - 0x44, 0x60, /* 010001000110 */ - 0xe4, 0xf0, /* 111001001111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 78 0x4e 'N' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xc0, 0x70, /* 110000000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x70, 0x20, /* 011100000010 */ - 0x78, 0x20, /* 011110000010 */ - 0x58, 0x20, /* 010110000010 */ - 0x4c, 0x20, /* 010011000010 */ - 0x46, 0x20, /* 010001100010 */ - 0x47, 0x20, /* 010001110010 */ - 0x43, 0x20, /* 010000110010 */ - 0x41, 0xa0, /* 010000011010 */ - 0x40, 0xe0, /* 010000001110 */ - 0x40, 0xe0, /* 010000001110 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0x30, /* 111000000011 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 79 0x4f 'O' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x20, 0x60, /* 001000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x20, 0x40, /* 001000000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 80 0x50 'P' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0x80, /* 011111111000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x37, 0x80, /* 001101111000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 81 0x51 'Q' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x20, 0x60, /* 001000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0x40, /* 001100000100 */ - 0x38, 0x40, /* 001110000100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x23, 0x90, /* 001000111001 */ - 0x01, 0xe0, /* 000000011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 82 0x52 'R' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0x00, /* 111111110000 */ - 0x61, 0x80, /* 011000011000 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0x80, /* 011000001000 */ - 0x7f, 0x00, /* 011111110000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x6e, 0x00, /* 011011100000 */ - 0x67, 0x00, /* 011001110000 */ - 0x63, 0x80, /* 011000111000 */ - 0x61, 0xc0, /* 011000011100 */ - 0x60, 0xe0, /* 011000001110 */ - 0xf0, 0x70, /* 111100000111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 83 0x53 'S' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x30, 0x60, /* 001100000110 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x70, 0x00, /* 011100000000 */ - 0x3c, 0x00, /* 001111000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x07, 0x80, /* 000001111000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x00, 0xe0, /* 000000001110 */ - 0x40, 0x60, /* 010000000110 */ - 0x40, 0x60, /* 010000000110 */ - 0x60, 0xc0, /* 011000001100 */ - 0x7f, 0x80, /* 011111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 84 0x54 'T' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x46, 0x20, /* 010001100010 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 85 0x55 'U' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0x70, /* 111100000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x70, 0x40, /* 011100000100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 86 0x56 'V' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xe0, 0xe0, /* 111000001110 */ - 0x60, 0x40, /* 011000000100 */ - 0x30, 0x80, /* 001100001000 */ - 0x30, 0x80, /* 001100001000 */ - 0x30, 0x80, /* 001100001000 */ - 0x19, 0x00, /* 000110010000 */ - 0x19, 0x00, /* 000110010000 */ - 0x19, 0x00, /* 000110010000 */ - 0x0a, 0x00, /* 000010100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 87 0x57 'W' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xfe, 0xf0, /* 111111101111 */ - 0x66, 0x20, /* 011001100010 */ - 0x66, 0x20, /* 011001100010 */ - 0x66, 0x20, /* 011001100010 */ - 0x76, 0x20, /* 011101100010 */ - 0x77, 0x40, /* 011101110100 */ - 0x33, 0x40, /* 001100110100 */ - 0x37, 0x40, /* 001101110100 */ - 0x3b, 0xc0, /* 001110111100 */ - 0x3b, 0x80, /* 001110111000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 88 0x58 'X' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0x70, /* 111100000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x30, 0x40, /* 001100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x11, 0x80, /* 000100011000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0xf0, /* 111000001111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 89 0x59 'Y' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0x70, /* 111100000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 90 0x5a 'Z' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x20, 0xc0, /* 001000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x01, 0x80, /* 000000011000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x20, /* 000110000010 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 91 0x5b '[' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 92 0x5c '\' */ - 0x00, 0x00, /* 000000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x18, 0x00, /* 000110000000 */ - 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0x07, 0x80, /* 000001111000 */ - 0x03, 0x00, /* 000000110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 97 0x61 'a' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x10, 0xc0, /* 000100001100 */ - 0x03, 0xc0, /* 000000111100 */ - 0x1c, 0xc0, /* 000111001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0xe0, /* 000111101110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 98 0x62 'b' */ - 0x00, 0x00, /* 000000000000 */ - 0x20, 0x00, /* 001000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0xe0, 0x00, /* 111000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x67, 0x80, /* 011001111000 */ - 0x6f, 0xc0, /* 011011111100 */ - 0x70, 0xe0, /* 011100001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x60, /* 011100000110 */ - 0x78, 0xc0, /* 011110001100 */ - 0x4f, 0x80, /* 010011111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 99 0x63 'c' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x31, 0xc0, /* 001100011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x70, 0x40, /* 011100000100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 100 0x64 'd' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0xe0, /* 000000001110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x0f, 0x60, /* 000011110110 */ - 0x31, 0xe0, /* 001100011110 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0xe0, /* 011100001110 */ - 0x39, 0x60, /* 001110010110 */ - 0x1e, 0x70, /* 000111100111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 101 0x65 'e' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x18, 0x60, /* 000110000110 */ - 0x0f, 0x80, /* 000011111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 102 0x66 'f' */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x80, /* 000000111000 */ - 0x04, 0xc0, /* 000001001100 */ - 0x04, 0xc0, /* 000001001100 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 103 0x67 'g' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0x20, /* 000111110010 */ - 0x31, 0xe0, /* 001100011110 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x31, 0x80, /* 001100011000 */ - 0x3f, 0x00, /* 001111110000 */ - 0x60, 0x00, /* 011000000000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x20, 0x60, /* 001000000110 */ - 0x40, 0x20, /* 010000000010 */ - 0x40, 0x20, /* 010000000010 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 104 0x68 'h' */ - 0x00, 0x00, /* 000000000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x37, 0x80, /* 001101111000 */ - 0x39, 0xc0, /* 001110011100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x79, 0xe0, /* 011110011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 105 0x69 'i' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 106 0x6a 'j' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0xc0, /* 000000111100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 107 0x6b 'k' */ - 0x00, 0x00, /* 000000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0xe0, 0x00, /* 111000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x61, 0xc0, /* 011000011100 */ - 0x63, 0x00, /* 011000110000 */ - 0x66, 0x00, /* 011001100000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x7c, 0x00, /* 011111000000 */ - 0x6e, 0x00, /* 011011100000 */ - 0x67, 0x00, /* 011001110000 */ - 0x63, 0x80, /* 011000111000 */ - 0xf1, 0xe0, /* 111100011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 108 0x6c 'l' */ - 0x00, 0x00, /* 000000000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 109 0x6d 'm' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xdd, 0xc0, /* 110111011100 */ - 0x6e, 0xe0, /* 011011101110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0xef, 0x70, /* 111011110111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 110 0x6e 'n' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x27, 0x80, /* 001001111000 */ - 0x79, 0xc0, /* 011110011100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x79, 0xe0, /* 011110011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 111 0x6f 'o' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 112 0x70 'p' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xef, 0x80, /* 111011111000 */ - 0x71, 0xc0, /* 011100011100 */ - 0x60, 0xe0, /* 011000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x40, /* 011000000100 */ - 0x70, 0x80, /* 011100001000 */ - 0x7f, 0x00, /* 011111110000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0xf0, 0x00, /* 111100000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 113 0x71 'q' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x20, /* 000011110010 */ - 0x11, 0xe0, /* 000100011110 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x60, /* 011100000110 */ - 0x38, 0xe0, /* 001110001110 */ - 0x1f, 0xe0, /* 000111111110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0x60, /* 000000000110 */ - 0x00, 0xf0, /* 000000001111 */ - 0x00, 0x00, /* 000000000000 */ - - /* 114 0x72 'r' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x73, 0x80, /* 011100111000 */ - 0x34, 0xc0, /* 001101001100 */ - 0x38, 0xc0, /* 001110001100 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 115 0x73 's' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0x40, /* 001100000100 */ - 0x38, 0x00, /* 001110000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x07, 0x80, /* 000001111000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x3f, 0x80, /* 001111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 116 0x74 't' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x7f, 0xc0, /* 011111111100 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x20, /* 000011000010 */ - 0x0e, 0x40, /* 000011100100 */ - 0x07, 0x80, /* 000001111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 117 0x75 'u' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x79, 0xe0, /* 011110011110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 118 0x76 'v' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0x70, /* 111100000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x30, 0x40, /* 001100000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 119 0x77 'w' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0x70, /* 111111110111 */ - 0x66, 0x20, /* 011001100010 */ - 0x66, 0x20, /* 011001100010 */ - 0x66, 0x20, /* 011001100010 */ - 0x37, 0x40, /* 001101110100 */ - 0x3b, 0x40, /* 001110110100 */ - 0x3b, 0x40, /* 001110110100 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 120 0x78 'x' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf8, 0xf0, /* 111110001111 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1d, 0x00, /* 000111010000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0b, 0x80, /* 000010111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0xf1, 0xf0, /* 111100011111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 121 0x79 'y' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0xf0, /* 111100001111 */ - 0x60, 0x20, /* 011000000010 */ - 0x30, 0x40, /* 001100000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x08, 0x00, /* 000010000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 122 0x7a 'z' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x60, 0xe0, /* 011000001110 */ - 0x41, 0xc0, /* 010000011100 */ - 0x03, 0x80, /* 000000111000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x38, 0x20, /* 001110000010 */ - 0x70, 0x60, /* 011100000110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 123 0x7b '{' */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x80, /* 000000111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x38, 0x00, /* 001110000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x80, /* 000000111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 124 0x7c '|' */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 125 0x7d '}' */ - 0x00, 0x00, /* 000000000000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x00, /* 000000110000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 126 0x7e '~' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1c, 0x20, /* 000111000010 */ - 0x3e, 0x60, /* 001111100110 */ - 0x67, 0xc0, /* 011001111100 */ - 0x43, 0x80, /* 010000111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 127 0x7f '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - - /* 128 0x80 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xc0, /* 000011111100 */ - 0x10, 0x60, /* 000100000110 */ - 0x20, 0x20, /* 001000000010 */ - 0x20, 0x00, /* 001000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x20, 0x00, /* 001000000000 */ - 0x30, 0x20, /* 001100000010 */ - 0x18, 0x40, /* 000110000100 */ - 0x0f, 0x80, /* 000011111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x00, /* 000000110000 */ - 0x01, 0x80, /* 000000011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 129 0x81 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x79, 0xe0, /* 011110011110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 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0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 140 0x8c '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x1b, 0x00, /* 000110110000 */ - 0x31, 0x80, /* 001100011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 141 0x8d '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 142 0x8e '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x04, 0x00, /* 000001000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x11, 0x80, /* 000100011000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0xf0, /* 111000001111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 143 0x8f '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x04, 0x00, /* 000001000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x11, 0x80, /* 000100011000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0xf0, /* 111000001111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 144 0x90 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x08, 0x00, /* 000010000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x30, 0x20, /* 001100000010 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x80, /* 001100001000 */ - 0x3f, 0x80, /* 001111111000 */ - 0x30, 0x80, /* 001100001000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x20, /* 001100000010 */ - 0x30, 0x20, /* 001100000010 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 145 0x91 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x66, 0x30, /* 011001100011 */ - 0x46, 0x30, /* 010001100011 */ - 0x06, 0x30, /* 000001100011 */ - 0x3f, 0xf0, /* 001111111111 */ - 0x66, 0x00, /* 011001100000 */ - 0xc6, 0x00, /* 110001100000 */ - 0xc6, 0x00, /* 110001100000 */ - 0xe7, 0x30, /* 111001110011 */ - 0x7d, 0xe0, /* 011111011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 146 0x92 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0xf0, /* 000000111111 */ - 0x07, 0x10, /* 000001110001 */ - 0x07, 0x10, /* 000001110001 */ - 0x0b, 0x00, /* 000010110000 */ - 0x0b, 0x00, /* 000010110000 */ - 0x0b, 0x20, /* 000010110010 */ - 0x13, 0xe0, /* 000100111110 */ - 0x13, 0x20, /* 000100110010 */ - 0x3f, 0x00, /* 001111110000 */ - 0x23, 0x00, /* 001000110000 */ - 0x23, 0x00, /* 001000110000 */ - 0x43, 0x10, /* 010000110001 */ - 0x43, 0x10, /* 010000110001 */ - 0xe7, 0xf0, /* 111001111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 147 0x93 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x02, 0x00, /* 000000100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 148 0x94 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 149 0x95 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x00, /* 000000110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 150 0x96 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x02, 0x00, /* 000000100000 */ - 0x07, 0x00, /* 000001110000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x18, 0xc0, /* 000110001100 */ - 0x00, 0x00, /* 000000000000 */ - 0x79, 0xe0, /* 011110011110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 151 0x97 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x79, 0xe0, /* 011110011110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 152 0x98 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xf0, 0xf0, /* 111100001111 */ - 0x60, 0x20, /* 011000000010 */ - 0x30, 0x40, /* 001100000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x18, 0x80, /* 000110001000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x0d, 0x00, /* 000011010000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x04, 0x00, /* 000001000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x08, 0x00, /* 000010000000 */ - 0x78, 0x00, /* 011110000000 */ - 0x70, 0x00, /* 011100000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 153 0x99 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xc0, /* 001000001100 */ - 0x20, 0x60, /* 001000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x20, 0x40, /* 001000000100 */ - 0x30, 0x40, /* 001100000100 */ - 0x18, 0x80, /* 000110001000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 154 0x9a '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0xe0, 0x30, /* 111000000011 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x60, 0x20, /* 011000000010 */ - 0x70, 0x40, /* 011100000100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 155 0x9b '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x36, 0xc0, /* 001101101100 */ - 0x26, 0xc0, /* 001001101100 */ - 0x66, 0x00, /* 011001100000 */ - 0x66, 0x00, /* 011001100000 */ - 0x66, 0x00, /* 011001100000 */ - 0x66, 0x00, /* 011001100000 */ - 0x76, 0x40, /* 011101100100 */ - 0x36, 0xc0, /* 001101101100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 156 0x9c '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x1c, 0xc0, /* 000111001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x7e, 0x00, /* 011111100000 */ - 0x7e, 0x00, /* 011111100000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x3e, 0x20, /* 001111100010 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x61, 0xc0, /* 011000011100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 157 0x9d '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 158 0x9e '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0x80, /* 011111111000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x60, /* 001100000110 */ - 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- /* 161 0xa1 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 162 0xa2 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x80, /* 000011111000 */ - 0x11, 0xc0, /* 000100011100 */ - 0x20, 0xe0, /* 001000001110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x70, 0x40, /* 011100000100 */ - 0x38, 0x80, /* 001110001000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 163 0xa3 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0x80, /* 000000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x79, 0xe0, /* 011110011110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1e, 0x60, /* 000111100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 164 0xa4 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x1c, 0x40, /* 000111000100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x23, 0x80, /* 001000111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x27, 0x80, /* 001001111000 */ - 0x79, 0xc0, /* 011110011100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x79, 0xe0, /* 011110011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 165 0xa5 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x1c, 0x40, /* 000111000100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x23, 0x80, /* 001000111000 */ - 0xc0, 0x70, /* 110000000111 */ - 0x60, 0x20, /* 011000000010 */ - 0x70, 0x20, /* 011100000010 */ - 0x78, 0x20, /* 011110000010 */ - 0x5c, 0x20, /* 010111000010 */ - 0x4e, 0x20, /* 010011100010 */ - 0x47, 0x20, /* 010001110010 */ - 0x43, 0xa0, /* 010000111010 */ - 0x41, 0xe0, /* 010000011110 */ - 0x40, 0xe0, /* 010000001110 */ - 0x40, 0x60, /* 010000000110 */ - 0xe0, 0x30, /* 111000000011 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 166 0xa6 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x31, 0x80, /* 001100011000 */ - 0x01, 0x80, /* 000000011000 */ - 0x07, 0x80, /* 000001111000 */ - 0x19, 0x80, /* 000110011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x31, 0x80, /* 001100011000 */ - 0x33, 0x80, /* 001100111000 */ - 0x1d, 0xc0, /* 000111011100 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 167 0xa7 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0x00, /* 000001110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x10, 0xc0, /* 000100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0x80, /* 001100001000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 168 0xa8 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x00, /* 000000110000 */ - 0x03, 0x00, /* 000000110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x03, 0x00, /* 000000110000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x40, /* 001100000100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 169 0xa9 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 170 0xaa '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0xc0, /* 000000001100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 171 0xab '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x10, 0x40, /* 000100000100 */ - 0x10, 0x80, /* 000100001000 */ - 0x11, 0x00, /* 000100010000 */ - 0x3a, 0x00, /* 001110100000 */ - 0x05, 0xc0, /* 000001011100 */ - 0x0a, 0x20, /* 000010100010 */ - 0x10, 0x20, /* 000100000010 */ - 0x20, 0xc0, /* 001000001100 */ - 0x41, 0x00, /* 010000010000 */ - 0x02, 0x00, /* 000000100000 */ - 0x03, 0xe0, /* 000000111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 172 0xac '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x10, 0x00, /* 000100000000 */ - 0x10, 0x40, /* 000100000100 */ - 0x10, 0x80, /* 000100001000 */ - 0x11, 0x00, /* 000100010000 */ - 0x3a, 0x40, /* 001110100100 */ - 0x04, 0xc0, /* 000001001100 */ - 0x09, 0x40, /* 000010010100 */ - 0x12, 0x40, /* 000100100100 */ - 0x24, 0x40, /* 001001000100 */ - 0x47, 0xe0, /* 010001111110 */ - 0x00, 0x40, /* 000000000100 */ - 0x00, 0x40, /* 000000000100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 173 0xad '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 174 0xae '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x06, 0x60, /* 000001100110 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x33, 0x00, /* 001100110000 */ - 0x66, 0x00, /* 011001100000 */ - 0x33, 0x00, /* 001100110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x06, 0x60, /* 000001100110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 175 0xaf '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x66, 0x00, /* 011001100000 */ - 0x33, 0x00, /* 001100110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x06, 0x60, /* 000001100110 */ - 0x0c, 0xc0, /* 000011001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x33, 0x00, /* 001100110000 */ - 0x66, 0x00, /* 011001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 176 0xb0 '.' */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - 0x61, 0x80, /* 011000011000 */ - 0x20, 0x80, /* 001000001000 */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - 0x61, 0x80, /* 011000011000 */ - 0x20, 0x80, /* 001000001000 */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - 0x61, 0x80, /* 011000011000 */ - 0x20, 0x80, /* 001000001000 */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - 0x61, 0x80, /* 011000011000 */ - 0x20, 0x80, /* 001000001000 */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - 0x61, 0x80, /* 011000011000 */ - 0x20, 0x80, /* 001000001000 */ - 0x0c, 0x30, /* 000011000011 */ - 0x08, 0x20, /* 000010000010 */ - - /* 177 0xb1 '.' */ - 0x77, 0x70, /* 011101110111 */ - 0x22, 0x20, /* 001000100010 */ - 0x88, 0x80, /* 100010001000 */ - 0xdd, 0xd0, /* 110111011101 */ - 0x88, 0x80, /* 100010001000 */ - 0x22, 0x20, /* 001000100010 */ - 0x77, 0x70, /* 011101110111 */ - 0x22, 0x20, /* 001000100010 */ - 0x88, 0x80, /* 100010001000 */ - 0xdd, 0xd0, /* 110111011101 */ - 0x88, 0x80, /* 100010001000 */ - 0x22, 0x20, /* 001000100010 */ - 0x77, 0x70, /* 011101110111 */ - 0x22, 0x20, /* 001000100010 */ - 0x88, 0x80, /* 100010001000 */ - 0xdd, 0xd0, /* 110111011101 */ - 0x88, 0x80, /* 100010001000 */ - 0x22, 0x20, /* 001000100010 */ - 0x77, 0x70, /* 011101110111 */ - 0x22, 0x20, /* 001000100010 */ - 0x88, 0x80, /* 100010001000 */ - 0xdd, 0xd0, /* 110111011101 */ - - /* 178 0xb2 '.' */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - 0x9e, 0x70, /* 100111100111 */ - 0xdf, 0x70, /* 110111110111 */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - 0x9e, 0x70, /* 100111100111 */ - 0xdf, 0x70, /* 110111110111 */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - 0x9e, 0x70, /* 100111100111 */ - 0xdf, 0x70, /* 110111110111 */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - 0x9e, 0x70, /* 100111100111 */ - 0xdf, 0x70, /* 110111110111 */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - 0x9e, 0x70, /* 100111100111 */ - 0xdf, 0x70, /* 110111110111 */ - 0xf3, 0xc0, /* 111100111100 */ - 0xf7, 0xd0, /* 111101111101 */ - - /* 179 0xb3 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 180 0xb4 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 181 0xb5 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 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0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 184 0xb8 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 185 0xb9 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0x01, 0x80, /* 000000011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 186 0xba '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 187 0xbb '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0x80, /* 111111111000 */ - 0xff, 0x80, /* 111111111000 */ - 0x01, 0x80, /* 000000011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 188 0xbc '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0xfd, 0x80, /* 111111011000 */ - 0x01, 0x80, /* 000000011000 */ - 0xff, 0x80, /* 111111111000 */ - 0xff, 0x80, /* 111111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 189 0xbd '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xff, 0x80, /* 111111111000 */ - 0xff, 0x80, /* 111111111000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 190 0xbe '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 191 0xbf '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 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0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 194 0xc2 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 195 0xc3 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 196 0xc4 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 197 0xc5 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 198 0xc6 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 199 0xc7 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 200 0xc8 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 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0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0d, 0xf0, /* 000011011111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 205 0xcd '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 206 0xce '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xfd, 0xf0, /* 111111011111 */ - 0xfd, 0xf0, /* 111111011111 */ - 0x00, 0x00, /* 000000000000 */ - 0xfd, 0xf0, /* 111111011111 */ - 0xfd, 0xf0, /* 111111011111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 207 0xcf '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 208 0xd0 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 209 0xd1 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 210 0xd2 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 211 0xd3 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0f, 0xf0, /* 000011111111 */ - 0x0f, 0xf0, /* 000011111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 212 0xd4 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 213 0xd5 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 214 0xd6 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0xf0, /* 000011111111 */ - 0x0f, 0xf0, /* 000011111111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 215 0xd7 '.' */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - 0x0d, 0x80, /* 000011011000 */ - - /* 216 0xd8 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x06, 0x00, /* 000001100000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 217 0xd9 '.' */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0xfe, 0x00, /* 111111100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 218 0xda '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0xf0, /* 000001111111 */ - 0x07, 0xf0, /* 000001111111 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - - /* 219 0xdb '.' */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - - /* 220 0xdc '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - - /* 221 0xdd '.' */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - 0xfc, 0x00, /* 111111000000 */ - - /* 222 0xde '.' */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - 0x03, 0xf0, /* 000000111111 */ - - /* 223 0xdf '.' */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0xff, 0xf0, /* 111111111111 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 224 0xe0 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x60, /* 000011110110 */ - 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0x77, 0x00, /* 011101110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 226 0xe2 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x3f, 0xe0, /* 001111111110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 227 0xe3 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 228 0xe4 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0x60, /* 001100000110 */ - 0x30, 0x00, /* 001100000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x60, /* 001100000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 229 0xe5 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0xe0, /* 000001111110 */ - 0x0f, 0xe0, /* 000011111110 */ - 0x13, 0x80, /* 000100111000 */ - 0x21, 0xc0, /* 001000011100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x60, 0xc0, /* 011000001100 */ - 0x70, 0x80, /* 011100001000 */ - 0x39, 0x00, /* 001110010000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 230 0xe6 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x39, 0xc0, /* 001110011100 */ - 0x36, 0xe0, /* 001101101110 */ - 0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x60, 0x00, /* 011000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 231 0xe7 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x19, 0x80, /* 000110011000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x66, 0x60, /* 011001100110 */ - 0x66, 0x60, /* 011001100110 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 232 0xe8 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 233 0xe9 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x7f, 0xe0, /* 011111111110 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x1f, 0x80, /* 000111111000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 234 0xea '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1f, 0x00, /* 000111110000 */ - 0x31, 0x80, /* 001100011000 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x60, 0x60, /* 011000000110 */ - 0x60, 0x60, /* 011000000110 */ - 0x30, 0xc0, /* 001100001100 */ - 0x30, 0xc0, /* 001100001100 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0xd9, 0xb0, /* 110110011011 */ - 0x79, 0xe0, /* 011110011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 235 0xeb '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0x80, /* 000001111000 */ - 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0x30, 0x00, /* 001100000000 */ - 0x30, 0x00, /* 001100000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 238 0xee '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x1f, 0xc0, /* 000111111100 */ - 0x18, 0x00, /* 000110000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x03, 0x00, /* 000000110000 */ - 0x01, 0xc0, /* 000000011100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 239 0xef '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 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0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x38, 0x00, /* 001110000000 */ - 0x6c, 0x00, /* 011011000000 */ - 0x06, 0x30, /* 000001100011 */ - 0x03, 0x60, /* 000000110110 */ - 0x39, 0xc0, /* 001110011100 */ - 0x6c, 0x00, /* 011011000000 */ - 0x06, 0x30, /* 000001100011 */ - 0x03, 0x60, /* 000000110110 */ - 0x01, 0xc0, /* 000000011100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 248 0xf8 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x19, 0x80, /* 000110011000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 249 0xf9 '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x3e, 0x00, /* 001111100000 */ - 0x3e, 0x00, /* 001111100000 */ - 0x3e, 0x00, /* 001111100000 */ - 0x1c, 0x00, /* 000111000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 250 0xfa '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x3c, 0x00, /* 001111000000 */ - 0x3c, 0x00, /* 001111000000 */ - 0x18, 0x00, /* 000110000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 251 0xfb '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x07, 0xe0, /* 000001111110 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x06, 0x00, /* 000001100000 */ - 0xc6, 0x00, /* 110001100000 */ - 0x66, 0x00, /* 011001100000 */ - 0x36, 0x00, /* 001101100000 */ - 0x1e, 0x00, /* 000111100000 */ - 0x0e, 0x00, /* 000011100000 */ - 0x06, 0x00, /* 000001100000 */ - 0x02, 0x00, /* 000000100000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 252 0xfc '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x13, 0x80, /* 000100111000 */ - 0x3d, 0xc0, /* 001111011100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x18, 0xc0, /* 000110001100 */ - 0x3d, 0xe0, /* 001111011110 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 253 0xfd '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x0f, 0x00, /* 000011110000 */ - 0x1f, 0x80, /* 000111111000 */ - 0x31, 0x80, /* 001100011000 */ - 0x21, 0x80, /* 001000011000 */ - 0x03, 0x00, /* 000000110000 */ - 0x06, 0x00, /* 000001100000 */ - 0x0c, 0x00, /* 000011000000 */ - 0x18, 0x40, /* 000110000100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 254 0xfe '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x3f, 0xc0, /* 001111111100 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - - /* 255 0xff '.' */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ - 0x00, 0x00, /* 000000000000 */ -}; - -#endif /* _VIDEO_FONT_LARGE_ */ diff --git a/fusee/common/display/video_font_small.h b/fusee/common/display/video_font_small.h deleted file mode 100644 index 2c658fe8e..000000000 --- a/fusee/common/display/video_font_small.h +++ /dev/null @@ -1,4630 +0,0 @@ -/* - * (C) Copyright 2000 - * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it - * - * SPDX-License-Identifier: GPL-2.0+ - * - * This file contains an 8x16 bitmap font for code page 437. - */ - -#ifndef _VIDEO_FONT_DATA_ -#define _VIDEO_FONT_DATA_ - -#define VIDEO_FONT_CHARS 256 -#define VIDEO_FONT_WIDTH 8 -#define VIDEO_FONT_HEIGHT 16 -#define VIDEO_FONT_SIZE (VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT) - -static unsigned char video_fontdata[VIDEO_FONT_SIZE] = { - - /* 0 0x00 '^@' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 1 0x01 '^A' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x81, /* 10000001 */ - 0xa5, /* 10100101 */ - 0x81, /* 10000001 */ - 0x81, /* 10000001 */ - 0xbd, /* 10111101 */ - 0x99, /* 10011001 */ - 0x81, /* 10000001 */ - 0x81, /* 10000001 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 2 0x02 '^B' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0xff, /* 11111111 */ - 0xdb, /* 11011011 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xc3, /* 11000011 */ - 0xe7, /* 11100111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 3 0x03 '^C' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x6c, /* 01101100 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0x7c, /* 01111100 */ - 0x38, /* 00111000 */ - 0x10, /* 00010000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 4 0x04 '^D' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x7c, /* 01111100 */ - 0xfe, /* 11111110 */ - 0x7c, /* 01111100 */ - 0x38, /* 00111000 */ - 0x10, /* 00010000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 5 0x05 '^E' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0xe7, /* 11100111 */ - 0xe7, /* 11100111 */ - 0xe7, /* 11100111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 6 0x06 '^F' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x7e, /* 01111110 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 7 0x07 '^G' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 8 0x08 '^H' */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xe7, /* 11100111 */ - 0xc3, /* 11000011 */ - 0xc3, /* 11000011 */ - 0xe7, /* 11100111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - - /* 9 0x09 '^I' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0x42, /* 01000010 */ - 0x42, /* 01000010 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 10 0x0a '^J' */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xc3, /* 11000011 */ - 0x99, /* 10011001 */ - 0xbd, /* 10111101 */ - 0xbd, /* 10111101 */ - 0x99, /* 10011001 */ - 0xc3, /* 11000011 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - - /* 11 0x0b '^K' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1e, /* 00011110 */ - 0x0e, /* 00001110 */ - 0x1a, /* 00011010 */ - 0x32, /* 00110010 */ - 0x78, /* 01111000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 12 0x0c '^L' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 13 0x0d '^M' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3f, /* 00111111 */ - 0x33, /* 00110011 */ - 0x3f, /* 00111111 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x70, /* 01110000 */ - 0xf0, /* 11110000 */ - 0xe0, /* 11100000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 14 0x0e '^N' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7f, /* 01111111 */ - 0x63, /* 01100011 */ - 0x7f, /* 01111111 */ - 0x63, /* 01100011 */ - 0x63, /* 01100011 */ - 0x63, /* 01100011 */ - 0x63, /* 01100011 */ - 0x67, /* 01100111 */ - 0xe7, /* 11100111 */ - 0xe6, /* 11100110 */ - 0xc0, /* 11000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 15 0x0f '^O' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xdb, /* 11011011 */ - 0x3c, /* 00111100 */ - 0xe7, /* 11100111 */ - 0x3c, /* 00111100 */ - 0xdb, /* 11011011 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 16 0x10 '^P' */ - 0x00, /* 00000000 */ - 0x80, /* 10000000 */ - 0xc0, /* 11000000 */ - 0xe0, /* 11100000 */ - 0xf0, /* 11110000 */ - 0xf8, /* 11111000 */ - 0xfe, /* 11111110 */ - 0xf8, /* 11111000 */ - 0xf0, /* 11110000 */ - 0xe0, /* 11100000 */ - 0xc0, /* 11000000 */ - 0x80, /* 10000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 17 0x11 '^Q' */ - 0x00, /* 00000000 */ - 0x02, /* 00000010 */ - 0x06, /* 00000110 */ - 0x0e, /* 00001110 */ - 0x1e, /* 00011110 */ - 0x3e, /* 00111110 */ - 0xfe, /* 11111110 */ - 0x3e, /* 00111110 */ - 0x1e, /* 00011110 */ - 0x0e, /* 00001110 */ - 0x06, /* 00000110 */ - 0x02, /* 00000010 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 18 0x12 '^R' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 19 0x13 '^S' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 20 0x14 '^T' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7f, /* 01111111 */ - 0xdb, /* 11011011 */ - 0xdb, /* 11011011 */ - 0xdb, /* 11011011 */ - 0x7b, /* 01111011 */ - 0x1b, /* 00011011 */ - 0x1b, /* 00011011 */ - 0x1b, /* 00011011 */ - 0x1b, /* 00011011 */ - 0x1b, /* 00011011 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 21 0x15 '^U' */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0x60, /* 01100000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x0c, /* 00001100 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 22 0x16 '^V' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 23 0x17 '^W' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 24 0x18 '^X' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 25 0x19 '^Y' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 26 0x1a '^Z' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0xfe, /* 11111110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 27 0x1b '^[' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xfe, /* 11111110 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 28 0x1c '^\' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 29 0x1d '^]' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x28, /* 00101000 */ - 0x6c, /* 01101100 */ - 0xfe, /* 11111110 */ - 0x6c, /* 01101100 */ - 0x28, /* 00101000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 30 0x1e '^^' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x38, /* 00111000 */ - 0x7c, /* 01111100 */ - 0x7c, /* 01111100 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 31 0x1f '^_' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0x7c, /* 01111100 */ - 0x7c, /* 01111100 */ - 0x38, /* 00111000 */ - 0x38, /* 00111000 */ - 0x10, /* 00010000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 32 0x20 ' ' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 33 0x21 '!' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 34 0x22 '"' */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x24, /* 00100100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 35 0x23 '#' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0xfe, /* 11111110 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0xfe, /* 11111110 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 36 0x24 '$' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc2, /* 11000010 */ - 0xc0, /* 11000000 */ - 0x7c, /* 01111100 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x86, /* 10000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 37 0x25 '%' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc2, /* 11000010 */ - 0xc6, /* 11000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc6, /* 11000110 */ - 0x86, /* 10000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 38 0x26 '&' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 39 0x27 ''' */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 40 0x28 '(' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 41 0x29 ')' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 42 0x2a '*' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0xff, /* 11111111 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 43 0x2b '+' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 44 0x2c ',' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 45 0x2d '-' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 46 0x2e '.' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 47 0x2f '/' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x02, /* 00000010 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0x80, /* 10000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 48 0x30 '0' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 49 0x31 '1' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x38, /* 00111000 */ - 0x78, /* 01111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 50 0x32 '2' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 51 0x33 '3' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x3c, /* 00111100 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 52 0x34 '4' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x0c, /* 00001100 */ - 0x1c, /* 00011100 */ - 0x3c, /* 00111100 */ - 0x6c, /* 01101100 */ - 0xcc, /* 11001100 */ - 0xfe, /* 11111110 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x1e, /* 00011110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 53 0x35 '5' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xfc, /* 11111100 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 54 0x36 '6' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xfc, /* 11111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 55 0x37 '7' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 56 0x38 '8' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 57 0x39 '9' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7e, /* 01111110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 58 0x3a ':' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 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0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 62 0x3e '>' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 63 0x3f '?' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 64 0x40 '@' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xde, /* 11011110 */ - 0xde, /* 11011110 */ - 0xde, /* 11011110 */ - 0xdc, /* 11011100 */ - 0xc0, /* 11000000 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 65 0x41 'A' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 66 0x42 'B' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfc, /* 11111100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0xfc, /* 11111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 67 0x43 'C' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0xc2, /* 11000010 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc2, /* 11000010 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 68 0x44 'D' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xf8, /* 11111000 */ - 0x6c, /* 01101100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x6c, /* 01101100 */ - 0xf8, /* 11111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 69 0x45 'E' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x66, /* 01100110 */ - 0x62, /* 01100010 */ - 0x68, /* 01101000 */ - 0x78, /* 01111000 */ - 0x68, /* 01101000 */ - 0x60, /* 01100000 */ - 0x62, /* 01100010 */ - 0x66, /* 01100110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 70 0x46 'F' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x66, /* 01100110 */ - 0x62, /* 01100010 */ - 0x68, /* 01101000 */ - 0x78, /* 01111000 */ - 0x68, /* 01101000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xf0, /* 11110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 71 0x47 'G' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0xc2, /* 11000010 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xde, /* 11011110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x66, /* 01100110 */ - 0x3a, /* 00111010 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 72 0x48 'H' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 73 0x49 'I' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 74 0x4a 'J' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1e, /* 00011110 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 75 0x4b 'K' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xe6, /* 11100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x6c, /* 01101100 */ - 0x78, /* 01111000 */ - 0x78, /* 01111000 */ - 0x6c, /* 01101100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0xe6, /* 11100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 76 0x4c 'L' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xf0, /* 11110000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x62, /* 01100010 */ - 0x66, /* 01100110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 77 0x4d 'M' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xee, /* 11101110 */ - 0xfe, /* 11111110 */ - 0xfe, /* 11111110 */ - 0xd6, /* 11010110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 78 0x4e 'N' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xe6, /* 11100110 */ - 0xf6, /* 11110110 */ - 0xfe, /* 11111110 */ - 0xde, /* 11011110 */ - 0xce, /* 11001110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 79 0x4f 'O' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 80 0x50 'P' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfc, /* 11111100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xf0, /* 11110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 81 0x51 'Q' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xd6, /* 11010110 */ - 0xde, /* 11011110 */ - 0x7c, /* 01111100 */ - 0x0c, /* 00001100 */ - 0x0e, /* 00001110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 82 0x52 'R' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfc, /* 11111100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x6c, /* 01101100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0xe6, /* 11100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 83 0x53 'S' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x60, /* 01100000 */ - 0x38, /* 00111000 */ - 0x0c, /* 00001100 */ - 0x06, /* 00000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 84 0x54 'T' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x5a, /* 01011010 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 85 0x55 'U' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 86 0x56 'V' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x10, /* 00010000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 87 0x57 'W' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xfe, /* 11111110 */ - 0xee, /* 11101110 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 88 0x58 'X' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x7c, /* 01111100 */ - 0x38, /* 00111000 */ - 0x38, /* 00111000 */ - 0x7c, /* 01111100 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 89 0x59 'Y' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 90 0x5a 'Z' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0x86, /* 10000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc2, /* 11000010 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 91 0x5b '[' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 92 0x5c '\' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x80, /* 10000000 */ - 0xc0, /* 11000000 */ - 0xe0, /* 11100000 */ - 0x70, /* 01110000 */ - 0x38, /* 00111000 */ - 0x1c, /* 00011100 */ - 0x0e, /* 00001110 */ - 0x06, /* 00000110 */ - 0x02, /* 00000010 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 93 0x5d ']' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 94 0x5e '^' */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 95 0x5f '_' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 96 0x60 '`' */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 97 0x61 'a' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 98 0x62 'b' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xe0, /* 11100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x78, /* 01111000 */ - 0x6c, /* 01101100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 99 0x63 'c' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 100 0x64 'd' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1c, /* 00011100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x3c, /* 00111100 */ - 0x6c, /* 01101100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 101 0x65 'e' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 102 0x66 'f' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1c, /* 00011100 */ - 0x36, /* 00110110 */ - 0x32, /* 00110010 */ - 0x30, /* 00110000 */ - 0x78, /* 01111000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 103 0x67 'g' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x7c, /* 01111100 */ - 0x0c, /* 00001100 */ - 0xcc, /* 11001100 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - - /* 104 0x68 'h' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xe0, /* 11100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x6c, /* 01101100 */ - 0x76, /* 01110110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0xe6, /* 11100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 105 0x69 'i' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 106 0x6a 'j' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x00, /* 00000000 */ - 0x0e, /* 00001110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - - /* 107 0x6b 'k' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xe0, /* 11100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x66, /* 01100110 */ - 0x6c, /* 01101100 */ - 0x78, /* 01111000 */ - 0x78, /* 01111000 */ - 0x6c, /* 01101100 */ - 0x66, /* 01100110 */ - 0xe6, /* 11100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 108 0x6c 'l' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 109 0x6d 'm' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xec, /* 11101100 */ - 0xfe, /* 11111110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 110 0x6e 'n' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xdc, /* 11011100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 111 0x6f 'o' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 112 0x70 'p' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xdc, /* 11011100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xf0, /* 11110000 */ - 0x00, /* 00000000 */ - - /* 113 0x71 'q' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x7c, /* 01111100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x1e, /* 00011110 */ - 0x00, /* 00000000 */ - - /* 114 0x72 'r' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xdc, /* 11011100 */ - 0x76, /* 01110110 */ - 0x66, /* 01100110 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xf0, /* 11110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 115 0x73 's' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0x60, /* 01100000 */ - 0x38, /* 00111000 */ - 0x0c, /* 00001100 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 116 0x74 't' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0xfc, /* 11111100 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x36, /* 00110110 */ - 0x1c, /* 00011100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 117 0x75 'u' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 118 0x76 'v' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 119 0x77 'w' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xd6, /* 11010110 */ - 0xfe, /* 11111110 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 120 0x78 'x' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x38, /* 00111000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 121 0x79 'y' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7e, /* 01111110 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0xf8, /* 11111000 */ - 0x00, /* 00000000 */ - - /* 122 0x7a 'z' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xcc, /* 11001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 123 0x7b '{' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x0e, /* 00001110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x70, /* 01110000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x0e, /* 00001110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 124 0x7c '|' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 125 0x7d '}' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x70, /* 01110000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x0e, /* 00001110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 126 0x7e '~' */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 127 0x7f '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 128 0x80 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0xc2, /* 11000010 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc2, /* 11000010 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 129 0x81 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 130 0x82 '' */ - 0x00, /* 00000000 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 131 0x83 '' */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 132 0x84 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 133 0x85 '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 134 0x86 '' */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 135 0x87 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x18, /* 00011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 136 0x88 '' */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 137 0x89 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 138 0x8a '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 139 0x8b '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 140 0x8c '' */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 141 0x8d '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 142 0x8e '' */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 143 0x8f '' */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x10, /* 00010000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 144 0x90 '' */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x66, /* 01100110 */ - 0x62, /* 01100010 */ - 0x68, /* 01101000 */ - 0x78, /* 01111000 */ - 0x68, /* 01101000 */ - 0x62, /* 01100010 */ - 0x66, /* 01100110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 145 0x91 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xec, /* 11101100 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x7e, /* 01111110 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0x6e, /* 01101110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 146 0x92 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3e, /* 00111110 */ - 0x6c, /* 01101100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xfe, /* 11111110 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xce, /* 11001110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 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0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 150 0x96 '' */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x78, /* 01111000 */ - 0xcc, /* 11001100 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 151 0x97 '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 152 0x98 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7e, /* 01111110 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x78, /* 01111000 */ - 0x00, /* 00000000 */ - - /* 153 0x99 '' */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 154 0x9a '' */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 155 0x9b '' */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 156 0x9c '' */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x64, /* 01100100 */ - 0x60, /* 01100000 */ - 0xf0, /* 11110000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xe6, /* 11100110 */ - 0xfc, /* 11111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 157 0x9d '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 158 0x9e '' */ - 0x00, /* 00000000 */ - 0xf8, /* 11111000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xf8, /* 11111000 */ - 0xc4, /* 11000100 */ - 0xcc, /* 11001100 */ - 0xde, /* 11011110 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 159 0x9f '' */ - 0x00, /* 00000000 */ - 0x0e, /* 00001110 */ - 0x1b, /* 00011011 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xd8, /* 11011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 160 0xa0 '' */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0x0c, /* 00001100 */ - 0x7c, /* 01111100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 161 0xa1 '' */ - 0x00, /* 00000000 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 162 0xa2 '' */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 163 0xa3 '' */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x00, /* 00000000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 164 0xa4 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x00, /* 00000000 */ - 0xdc, /* 11011100 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 165 0xa5 '' */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x00, /* 00000000 */ - 0xc6, /* 11000110 */ - 0xe6, /* 11100110 */ - 0xf6, /* 11110110 */ - 0xfe, /* 11111110 */ - 0xde, /* 11011110 */ - 0xce, /* 11001110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 166 0xa6 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x3e, /* 00111110 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 167 0xa7 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 168 0xa8 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 169 0xa9 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 170 0xaa '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 171 0xab '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0xe0, /* 11100000 */ - 0x62, /* 01100010 */ - 0x66, /* 01100110 */ - 0x6c, /* 01101100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xdc, /* 11011100 */ - 0x86, /* 10000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x3e, /* 00111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 172 0xac '' */ - 0x00, /* 00000000 */ - 0x60, /* 01100000 */ - 0xe0, /* 11100000 */ - 0x62, /* 01100010 */ - 0x66, /* 01100110 */ - 0x6c, /* 01101100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x66, /* 01100110 */ - 0xce, /* 11001110 */ - 0x9a, /* 10011010 */ - 0x3f, /* 00111111 */ - 0x06, /* 00000110 */ - 0x06, /* 00000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 173 0xad '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0x3c, /* 00111100 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 174 0xae '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x36, /* 00110110 */ - 0x6c, /* 01101100 */ - 0xd8, /* 11011000 */ - 0x6c, /* 01101100 */ - 0x36, /* 00110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 175 0xaf '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xd8, /* 11011000 */ - 0x6c, /* 01101100 */ - 0x36, /* 00110110 */ - 0x6c, /* 01101100 */ - 0xd8, /* 11011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 176 0xb0 '' */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - 0x11, /* 00010001 */ - 0x44, /* 01000100 */ - - /* 177 0xb1 '' */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - 0x55, /* 01010101 */ - 0xaa, /* 10101010 */ - - /* 178 0xb2 '' */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - 0xdd, /* 11011101 */ - 0x77, /* 01110111 */ - - /* 179 0xb3 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 180 0xb4 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 181 0xb5 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 182 0xb6 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xf6, /* 11110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 183 0xb7 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 184 0xb8 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 185 0xb9 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xf6, /* 11110110 */ - 0x06, /* 00000110 */ - 0xf6, /* 11110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 186 0xba '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 187 0xbb '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x06, /* 00000110 */ - 0xf6, /* 11110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 188 0xbc '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xf6, /* 11110110 */ - 0x06, /* 00000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 189 0xbd '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 190 0xbe '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 191 0xbf '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xf8, /* 11111000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 192 0xc0 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 193 0xc1 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 194 0xc2 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 195 0xc3 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 196 0xc4 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 197 0xc5 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xff, /* 11111111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 198 0xc6 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 199 0xc7 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x37, /* 00110111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 200 0xc8 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x37, /* 00110111 */ - 0x30, /* 00110000 */ - 0x3f, /* 00111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 201 0xc9 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3f, /* 00111111 */ - 0x30, /* 00110000 */ - 0x37, /* 00110111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 202 0xca '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xf7, /* 11110111 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 203 0xcb '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0xf7, /* 11110111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 204 0xcc '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x37, /* 00110111 */ - 0x30, /* 00110000 */ - 0x37, /* 00110111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 205 0xcd '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 206 0xce '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xf7, /* 11110111 */ - 0x00, /* 00000000 */ - 0xf7, /* 11110111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 207 0xcf '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 208 0xd0 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 209 0xd1 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 210 0xd2 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 211 0xd3 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x3f, /* 00111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 212 0xd4 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 213 0xd5 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 214 0xd6 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x3f, /* 00111111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 215 0xd7 '' */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0xff, /* 11111111 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - - /* 216 0xd8 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xff, /* 11111111 */ - 0x18, /* 00011000 */ - 0xff, /* 11111111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 217 0xd9 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xf8, /* 11111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 218 0xda '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1f, /* 00011111 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 219 0xdb '' */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - - /* 220 0xdc '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - - /* 221 0xdd '' */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - 0xf0, /* 11110000 */ - - /* 222 0xde '' */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - 0x0f, /* 00001111 */ - - /* 223 0xdf '' */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0xff, /* 11111111 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 224 0xe0 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xdc, /* 11011100 */ - 0x76, /* 01110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 225 0xe1 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x78, /* 01111000 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xcc, /* 11001100 */ - 0xd8, /* 11011000 */ - 0xcc, /* 11001100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xcc, /* 11001100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 226 0xe2 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 227 0xe3 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 228 0xe4 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0xc6, /* 11000110 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 229 0xe5 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 230 0xe6 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x7c, /* 01111100 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0x00, /* 00000000 */ - - /* 231 0xe7 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 232 0xe8 '' */ - 0x00, /* 00000000 */ - 0x40, /* 01000000*/ - 0xe0, /* 01110000 */ - 0x1c, /* 00011100 */ - 0x06, /* 00000110 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 233 0xe9 '' */ - 0x00, /* 00000000 */ - 0x02, /* 00000010*/ - 0x0e, /* 00001110 */ - 0x78, /* 00111000 */ - 0xc0, /* 01100000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xfe, /* 11111110 */ - 0xc0, /* 11000000 */ - 0xc0, /* 11000000 */ - 0xc6, /* 11000110 */ - 0x7c, /* 01111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 234 0xea '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0xee, /* 11101110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 235 0xeb '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1e, /* 00011110 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x3e, /* 00111110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x66, /* 01100110 */ - 0x3c, /* 00111100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 236 0xec '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0xdb, /* 11011011 */ - 0xdb, /* 11011011 */ - 0xdb, /* 11011011 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 237 0xed '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x03, /* 00000011 */ - 0x06, /* 00000110 */ - 0x7e, /* 01111110 */ - 0xdb, /* 11011011 */ - 0xdb, /* 11011011 */ - 0xf3, /* 11110011 */ - 0x7e, /* 01111110 */ - 0x60, /* 01100000 */ - 0xc0, /* 11000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 238 0xee '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x1c, /* 00011100 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x7c, /* 01111100 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x1c, /* 00011100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 239 0xef '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7c, /* 01111100 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0xc6, /* 11000110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 240 0xf0 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0xfe, /* 11111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 241 0xf1 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x7e, /* 01111110 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 242 0xf2 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x06, /* 00000110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 243 0xf3 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x30, /* 00110000 */ - 0x60, /* 01100000 */ - 0x30, /* 00110000 */ - 0x18, /* 00011000 */ - 0x0c, /* 00001100 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 244 0xf4 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x0e, /* 00001110 */ - 0x1b, /* 00011011 */ - 0x1b, /* 00011011 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - - /* 245 0xf5 '' */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0xd8, /* 11011000 */ - 0x70, /* 01110000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 246 0xf6 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 247 0xf7 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x00, /* 00000000 */ - 0x76, /* 01110110 */ - 0xdc, /* 11011100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 248 0xf8 '' */ - 0x00, /* 00000000 */ - 0x38, /* 00111000 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x38, /* 00111000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 249 0xf9 '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 250 0xfa '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x18, /* 00011000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 251 0xfb '' */ - 0x00, /* 00000000 */ - 0x0f, /* 00001111 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0x0c, /* 00001100 */ - 0xec, /* 11101100 */ - 0x6c, /* 01101100 */ - 0x6c, /* 01101100 */ - 0x3c, /* 00111100 */ - 0x1c, /* 00011100 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 252 0xfc '' */ - 0x00, /* 00000000 */ - 0x6c, /* 01101100 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x36, /* 00110110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 253 0xfd '' */ - 0x00, /* 00000000 */ - 0x3c, /* 00111100 */ - 0x66, /* 01100110 */ - 0x0c, /* 00001100 */ - 0x18, /* 00011000 */ - 0x32, /* 00110010 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 254 0xfe '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x7e, /* 01111110 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - - /* 255 0xff '' */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - 0x00, /* 00000000 */ - -}; - -#endif diff --git a/fusee/common/fatfs/00history.txt b/fusee/common/fatfs/00history.txt deleted file mode 100644 index 74ff3e0b3..000000000 --- a/fusee/common/fatfs/00history.txt +++ /dev/null @@ -1,340 +0,0 @@ ----------------------------------------------------------------------------- - Revision history of FatFs module ----------------------------------------------------------------------------- - -R0.00 (February 26, 2006) - - Prototype. - - - -R0.01 (April 29, 2006) - - The first release. - - - -R0.02 (June 01, 2006) - - Added FAT12 support. - Removed unbuffered mode. - Fixed a problem on small (<32M) partition. - - - -R0.02a (June 10, 2006) - - Added a configuration option (_FS_MINIMUM). - - - -R0.03 (September 22, 2006) - - Added f_rename(). - Changed option _FS_MINIMUM to _FS_MINIMIZE. - - - -R0.03a (December 11, 2006) - - Improved cluster scan algorithm to write files fast. - Fixed f_mkdir() creates incorrect directory on FAT32. - - - -R0.04 (February 04, 2007) - - Added f_mkfs(). - Supported multiple drive system. - Changed some interfaces for multiple drive system. - Changed f_mountdrv() to f_mount(). - - - -R0.04a (April 01, 2007) - - Supported multiple partitions on a physical drive. - Added a capability of extending file size to f_lseek(). - Added minimization level 3. - Fixed an endian sensitive code in f_mkfs(). - - - -R0.04b (May 05, 2007) - - Added a configuration option _USE_NTFLAG. - Added FSINFO support. - Fixed DBCS name can result FR_INVALID_NAME. - Fixed short seek (<= csize) collapses the file object. - - - -R0.05 (August 25, 2007) - - Changed arguments of f_read(), f_write() and f_mkfs(). - Fixed f_mkfs() on FAT32 creates incorrect FSINFO. - Fixed f_mkdir() on FAT32 creates incorrect directory. - - - -R0.05a (February 03, 2008) - - Added f_truncate() and f_utime(). - Fixed off by one error at FAT sub-type determination. - Fixed btr in f_read() can be mistruncated. - Fixed cached sector is not flushed when create and close without write. - - - -R0.06 (April 01, 2008) - - Added fputc(), fputs(), fprintf() and fgets(). - Improved performance of f_lseek() on moving to the same or following cluster. - - - -R0.07 (April 01, 2009) - - Merged Tiny-FatFs as a configuration option. (_FS_TINY) - Added long file name feature. (_USE_LFN) - Added multiple code page feature. (_CODE_PAGE) - Added re-entrancy for multitask operation. (_FS_REENTRANT) - Added auto cluster size selection to f_mkfs(). - Added rewind option to f_readdir(). - Changed result code of critical errors. - Renamed string functions to avoid name collision. - - - -R0.07a (April 14, 2009) - - Septemberarated out OS dependent code on reentrant cfg. - Added multiple sector size feature. - - - -R0.07c (June 21, 2009) - - Fixed f_unlink() can return FR_OK on error. - Fixed wrong cache control in f_lseek(). - Added relative path feature. - Added f_chdir() and f_chdrive(). - Added proper case conversion to extended character. - - - -R0.07e (November 03, 2009) - - Septemberarated out configuration options from ff.h to ffconf.h. - Fixed f_unlink() fails to remove a sub-directory on _FS_RPATH. - Fixed name matching error on the 13 character boundary. - Added a configuration option, _LFN_UNICODE. - Changed f_readdir() to return the SFN with always upper case on non-LFN cfg. - - - -R0.08 (May 15, 2010) - - Added a memory configuration option. (_USE_LFN = 3) - Added file lock feature. (_FS_SHARE) - Added fast seek feature. (_USE_FASTSEEK) - Changed some types on the API, XCHAR->TCHAR. - Changed .fname in the FILINFO structure on Unicode cfg. - String functions support UTF-8 encoding files on Unicode cfg. - - - -R0.08a (August 16, 2010) - - Added f_getcwd(). (_FS_RPATH = 2) - Added sector erase feature. (_USE_ERASE) - Moved file lock semaphore table from fs object to the bss. - Fixed f_mkfs() creates wrong FAT32 volume. - - - -R0.08b (January 15, 2011) - - Fast seek feature is also applied to f_read() and f_write(). - f_lseek() reports required table size on creating CLMP. - Extended format syntax of f_printf(). - Ignores duplicated directory separators in given path name. - - - -R0.09 (September 06, 2011) - - f_mkfs() supports multiple partition to complete the multiple partition feature. - Added f_fdisk(). - - - -R0.09a (August 27, 2012) - - Changed f_open() and f_opendir() reject null object pointer to avoid crash. - Changed option name _FS_SHARE to _FS_LOCK. - Fixed assertion failure due to OS/2 EA on FAT12/16 volume. - - - -R0.09b (January 24, 2013) - - Added f_setlabel() and f_getlabel(). - - - -R0.10 (October 02, 2013) - - Added selection of character encoding on the file. (_STRF_ENCODE) - Added f_closedir(). - Added forced full FAT scan for f_getfree(). (_FS_NOFSINFO) - Added forced mount feature with changes of f_mount(). - Improved behavior of volume auto detection. - Improved write throughput of f_puts() and f_printf(). - Changed argument of f_chdrive(), f_mkfs(), disk_read() and disk_write(). - Fixed f_write() can be truncated when the file size is close to 4GB. - Fixed f_open(), f_mkdir() and f_setlabel() can return incorrect value on error. - - - -R0.10a (January 15, 2014) - - Added arbitrary strings as drive number in the path name. (_STR_VOLUME_ID) - Added a configuration option of minimum sector size. (_MIN_SS) - 2nd argument of f_rename() can have a drive number and it will be ignored. - Fixed f_mount() with forced mount fails when drive number is >= 1. (appeared at R0.10) - Fixed f_close() invalidates the file object without volume lock. - Fixed f_closedir() returns but the volume lock is left acquired. (appeared at R0.10) - Fixed creation of an entry with LFN fails on too many SFN collisions. (appeared at R0.07) - - - -R0.10b (May 19, 2014) - - Fixed a hard error in the disk I/O layer can collapse the directory entry. - Fixed LFN entry is not deleted when delete/rename an object with lossy converted SFN. (appeared at R0.07) - - - -R0.10c (November 09, 2014) - - Added a configuration option for the platforms without RTC. (_FS_NORTC) - Changed option name _USE_ERASE to _USE_TRIM. - Fixed volume label created by Mac OS X cannot be retrieved with f_getlabel(). (appeared at R0.09b) - Fixed a potential problem of FAT access that can appear on disk error. - Fixed null pointer dereference on attempting to delete the root direcotry. (appeared at R0.08) - - - -R0.11 (February 09, 2015) - - Added f_findfirst(), f_findnext() and f_findclose(). (_USE_FIND) - Fixed f_unlink() does not remove cluster chain of the file. (appeared at R0.10c) - Fixed _FS_NORTC option does not work properly. (appeared at R0.10c) - - - -R0.11a (September 05, 2015) - - Fixed wrong media change can lead a deadlock at thread-safe configuration. - Added code page 771, 860, 861, 863, 864, 865 and 869. (_CODE_PAGE) - Removed some code pages actually not exist on the standard systems. (_CODE_PAGE) - Fixed errors in the case conversion teble of code page 437 and 850 (ff.c). - Fixed errors in the case conversion teble of Unicode (cc*.c). - - - -R0.12 (April 12, 2016) - - Added support for exFAT file system. (_FS_EXFAT) - Added f_expand(). (_USE_EXPAND) - Changed some members in FINFO structure and behavior of f_readdir(). - Added an option _USE_CHMOD. - Removed an option _WORD_ACCESS. - Fixed errors in the case conversion table of Unicode (cc*.c). - - - -R0.12a (July 10, 2016) - - Added support for creating exFAT volume with some changes of f_mkfs(). - Added a file open method FA_OPEN_APPEND. An f_lseek() following f_open() is no longer needed. - f_forward() is available regardless of _FS_TINY. - Fixed f_mkfs() creates wrong volume. (appeared at R0.12) - Fixed wrong memory read in create_name(). (appeared at R0.12) - Fixed compilation fails at some configurations, _USE_FASTSEEK and _USE_FORWARD. - - - -R0.12b (September 04, 2016) - - Made f_rename() be able to rename objects with the same name but case. - Fixed an error in the case conversion teble of code page 866. (ff.c) - Fixed writing data is truncated at the file offset 4GiB on the exFAT volume. (appeared at R0.12) - Fixed creating a file in the root directory of exFAT volume can fail. (appeared at R0.12) - Fixed f_mkfs() creating exFAT volume with too small cluster size can collapse unallocated memory. (appeared at R0.12) - Fixed wrong object name can be returned when read directory at Unicode cfg. (appeared at R0.12) - Fixed large file allocation/removing on the exFAT volume collapses allocation bitmap. (appeared at R0.12) - Fixed some internal errors in f_expand() and f_lseek(). (appeared at R0.12) - - - -R0.12c (March 04, 2017) - - Improved write throughput at the fragmented file on the exFAT volume. - Made memory usage for exFAT be able to be reduced as decreasing _MAX_LFN. - Fixed successive f_getfree() can return wrong count on the FAT12/16 volume. (appeared at R0.12) - Fixed configuration option _VOLUMES cannot be set 10. (appeared at R0.10c) - - - -R0.13 (May 21, 2017) - - Changed heading character of configuration keywords "_" to "FF_". - Removed ASCII-only configuration, FF_CODE_PAGE = 1. Use FF_CODE_PAGE = 437 instead. - Added f_setcp(), run-time code page configuration. (FF_CODE_PAGE = 0) - Improved cluster allocation time on stretch a deep buried cluster chain. - Improved processing time of f_mkdir() with large cluster size by using FF_USE_LFN = 3. - Improved NoFatChain flag of the fragmented file to be set after it is truncated and got contiguous. - Fixed archive attribute is left not set when a file on the exFAT volume is renamed. (appeared at R0.12) - Fixed exFAT FAT entry can be collapsed when write or lseek operation to the existing file is done. (appeared at R0.12c) - Fixed creating a file can fail when a new cluster allocation to the exFAT directory occures. (appeared at R0.12c) - - - -R0.13a (October 14, 2017) - - Added support for UTF-8 encoding on the API. (FF_LFN_UNICODE = 2) - Added options for file name output buffer. (FF_LFN_BUF, FF_SFN_BUF). - Added dynamic memory allocation option for working buffer of f_mkfs() and f_fdisk(). - Fixed f_fdisk() and f_mkfs() create the partition table with wrong CHS parameters. (appeared at R0.09) - Fixed f_unlink() can cause lost clusters at fragmented file on the exFAT volume. (appeared at R0.12c) - Fixed f_setlabel() rejects some valid characters for exFAT volume. (appeared at R0.12) - - - -R0.13b (April 07, 2018) - - Added support for UTF-32 encoding on the API. (FF_LFN_UNICODE = 3) - Added support for Unix style volume ID. (FF_STR_VOLUME_ID = 2) - Fixed accesing any object on the exFAT root directory beyond the cluster boundary can fail. (appeared at R0.12c) - Fixed f_setlabel() does not reject some invalid characters. (appeared at R0.09b) - - - -R0.13c (October 14, 2018) - Supported stdint.h for C99 and later. (integer.h was included in ff.h) - Fixed reading a directory gets infinite loop when the last directory entry is not empty. (appeared at R0.12) - Fixed creating a sub-directory in the fragmented sub-directory on the exFAT volume collapses FAT chain of the parent directory. (appeared at R0.12) - Fixed f_getcwd() cause output buffer overrun when the buffer has a valid drive number. (appeared at R0.13b) - - - -R0.14 (October 14, 2019) - Added support for 64-bit LBA and GUID partition table (FF_LBA64 = 1) - Changed some API functions, f_mkfs() and f_fdisk(). - Fixed f_open() function cannot find the file with file name in length of FF_MAX_LFN characters. - Fixed f_readdir() function cannot retrieve long file names in length of FF_MAX_LFN - 1 characters. - Fixed f_readdir() function returns file names with wrong case conversion. (appeared at R0.12) - Fixed f_mkfs() function can fail to create exFAT volume in the second partition. (appeared at R0.12) - diff --git a/fusee/common/fatfs/00readme.txt b/fusee/common/fatfs/00readme.txt deleted file mode 100644 index f39a89a75..000000000 --- a/fusee/common/fatfs/00readme.txt +++ /dev/null @@ -1,21 +0,0 @@ -FatFs Module Source Files R0.14 - - -FILES - - 00readme.txt This file. - 00history.txt Revision history. - ff.c FatFs module. - ffconf.h Configuration file of FatFs module. - ff.h Common include file for FatFs and application module. - diskio.h Common include file for FatFs and disk I/O module. - diskio.c An example of glue function to attach existing disk I/O module to FatFs. - ffunicode.c Optional Unicode utility functions. - ffsystem.c An example of optional O/S related functions. - - - Low level disk I/O module is not included in this archive because the FatFs - module is only a generic file system layer and it does not depend on any specific - storage device. You need to provide a low level disk I/O module written to - control the storage device that attached to the target system. - diff --git a/fusee/common/fatfs/diskio.c b/fusee/common/fatfs/diskio.c deleted file mode 100644 index 2bc445637..000000000 --- a/fusee/common/fatfs/diskio.c +++ /dev/null @@ -1,164 +0,0 @@ -/*-----------------------------------------------------------------------*/ -/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2019 */ -/*-----------------------------------------------------------------------*/ -/* If a working storage control module is available, it should be */ -/* attached to the FatFs via a glue function rather than modifying it. */ -/* This is an example of glue functions to attach various exsisting */ -/* storage control modules to the FatFs module with a defined API. */ -/*-----------------------------------------------------------------------*/ - -#include -#include -#include "ff.h" /* Obtains integer types */ -#include "diskio.h" /* Declarations of disk functions */ -#include "ffconf.h" - -#if defined(FUSEE_STAGE1_SRC) -#include "../../../fusee/fusee-primary/fusee-primary-main/src/fs_utils.h" -#elif defined(FUSEE_STAGE2_SRC) -#include "../../../fusee/fusee-secondary/src/device_partition.h" -#endif - -#ifdef FUSEE_STAGE2_SRC -/* fs_dev.c */ -extern device_partition_t *g_volume_to_devparts[FF_VOLUMES]; -#endif - - -/*-----------------------------------------------------------------------*/ -/* Get Drive Status */ -/*-----------------------------------------------------------------------*/ - -DSTATUS disk_status ( - BYTE pdrv /* Physical drive nmuber to identify the drive */ -) -{ - #ifdef FUSEE_STAGE2_SRC - device_partition_t *devpart = g_volume_to_devparts[pdrv]; - if (devpart) - return devpart->initialized ? RES_OK : STA_NOINIT; - else - return STA_NODISK; - #else - return RES_OK; - #endif -} - - - -/*-----------------------------------------------------------------------*/ -/* Inidialize a Drive */ -/*-----------------------------------------------------------------------*/ - -DSTATUS disk_initialize ( - BYTE pdrv /* Physical drive nmuber to identify the drive */ -) -{ - #ifdef FUSEE_STAGE2_SRC - /* We aren't using FF_MULTI_PARTITION, so pdrv = volume id. */ - device_partition_t *devpart = g_volume_to_devparts[pdrv]; - if (!devpart) - return STA_NODISK; - else if (devpart->initializer) - return devpart->initializer(devpart) ? STA_NOINIT : RES_OK; - else - return RES_OK; - #else - return RES_OK; - #endif -} - - - -/*-----------------------------------------------------------------------*/ -/* Read Sector(s) */ -/*-----------------------------------------------------------------------*/ - -DRESULT disk_read ( - BYTE pdrv, /* Physical drive nmuber to identify the drive */ - BYTE *buff, /* Data buffer to store read data */ - LBA_t sector, /* Start sector in LBA */ - UINT count /* Number of sectors to read */ -) -{ - #ifdef FUSEE_STAGE2_SRC - /* We aren't using FF_MULTI_PARTITION, so pdrv = volume id. */ - device_partition_t *devpart = g_volume_to_devparts[pdrv]; - if (!devpart) - return RES_PARERR; - else if (devpart->reader) - return device_partition_read_data(devpart, buff, sector, count) ? RES_ERROR : RES_OK; - else - return RES_ERROR; - #else - switch (pdrv) { - case 0: - return sdmmc_device_read(&g_sd_device, sector, count, (void *)buff) ? RES_OK : RES_ERROR; - default: - return RES_PARERR; - } - #endif -} - - - -/*-----------------------------------------------------------------------*/ -/* Write Sector(s) */ -/*-----------------------------------------------------------------------*/ - -#if FF_FS_READONLY == 0 - -DRESULT disk_write ( - BYTE pdrv, /* Physical drive nmuber to identify the drive */ - const BYTE *buff, /* Data to be written */ - LBA_t sector, /* Start sector in LBA */ - UINT count /* Number of sectors to write */ -) -{ - #ifdef FUSEE_STAGE2_SRC - /* We aren't using FF_MULTI_PARTITION, so pdrv = volume id. */ - device_partition_t *devpart = g_volume_to_devparts[pdrv]; - if (!devpart) - return RES_PARERR; - else if (devpart->writer) - return device_partition_write_data(devpart, buff, sector, count) ? RES_ERROR : RES_OK; - else - return RES_ERROR; - #else - switch (pdrv) { - case 0: - return sdmmc_device_write(&g_sd_device, sector, count, (void *)buff) ? RES_OK : RES_ERROR; - default: - return RES_PARERR; - } - #endif -} - -#endif - - -/*-----------------------------------------------------------------------*/ -/* Miscellaneous Functions */ -/*-----------------------------------------------------------------------*/ - -DRESULT disk_ioctl ( - BYTE pdrv, /* Physical drive nmuber (0..) */ - BYTE cmd, /* Control code */ - void *buff /* Buffer to send/receive control data */ -) -{ - #ifdef FUSEE_STAGE2_SRC - /* We aren't using FF_MULTI_PARTITION, so pdrv = volume id. */ - device_partition_t *devpart = g_volume_to_devparts[pdrv]; - switch (cmd) { - case GET_SECTOR_SIZE: - *(WORD *)buff = devpart ? (WORD)devpart->sector_size : 512; - return RES_OK; - default: - return RES_OK; - } - #else - return RES_OK; - #endif -} - diff --git a/fusee/common/fatfs/diskio.h b/fusee/common/fatfs/diskio.h deleted file mode 100644 index 71b76706a..000000000 --- a/fusee/common/fatfs/diskio.h +++ /dev/null @@ -1,77 +0,0 @@ -/*-----------------------------------------------------------------------/ -/ Low level disk interface modlue include file (C)ChaN, 2019 / -/-----------------------------------------------------------------------*/ - -#ifndef _DISKIO_DEFINED -#define _DISKIO_DEFINED - -#ifdef __cplusplus -extern "C" { -#endif - -/* Status of Disk Functions */ -typedef BYTE DSTATUS; - -/* Results of Disk Functions */ -typedef enum { - RES_OK = 0, /* 0: Successful */ - RES_ERROR, /* 1: R/W Error */ - RES_WRPRT, /* 2: Write Protected */ - RES_NOTRDY, /* 3: Not Ready */ - RES_PARERR /* 4: Invalid Parameter */ -} DRESULT; - - -/*---------------------------------------*/ -/* Prototypes for disk control functions */ - - -DSTATUS disk_initialize (BYTE pdrv); -DSTATUS disk_status (BYTE pdrv); -DRESULT disk_read (BYTE pdrv, BYTE* buff, LBA_t sector, UINT count); -DRESULT disk_write (BYTE pdrv, const BYTE* buff, LBA_t sector, UINT count); -DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff); - - -/* Disk Status Bits (DSTATUS) */ - -#define STA_NOINIT 0x01 /* Drive not initialized */ -#define STA_NODISK 0x02 /* No medium in the drive */ -#define STA_PROTECT 0x04 /* Write protected */ - - -/* Command code for disk_ioctrl fucntion */ - -/* Generic command (Used by FatFs) */ -#define CTRL_SYNC 0 /* Complete pending write process (needed at FF_FS_READONLY == 0) */ -#define GET_SECTOR_COUNT 1 /* Get media size (needed at FF_USE_MKFS == 1) */ -#define GET_SECTOR_SIZE 2 /* Get sector size (needed at FF_MAX_SS != FF_MIN_SS) */ -#define GET_BLOCK_SIZE 3 /* Get erase block size (needed at FF_USE_MKFS == 1) */ -#define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at FF_USE_TRIM == 1) */ - -/* Generic command (Not used by FatFs) */ -#define CTRL_POWER 5 /* Get/Set power status */ -#define CTRL_LOCK 6 /* Lock/Unlock media removal */ -#define CTRL_EJECT 7 /* Eject media */ -#define CTRL_FORMAT 8 /* Create physical format on the media */ - -/* MMC/SDC specific ioctl command */ -#define MMC_GET_TYPE 10 /* Get card type */ -#define MMC_GET_CSD 11 /* Get CSD */ -#define MMC_GET_CID 12 /* Get CID */ -#define MMC_GET_OCR 13 /* Get OCR */ -#define MMC_GET_SDSTAT 14 /* Get SD status */ -#define ISDIO_READ 55 /* Read data form SD iSDIO register */ -#define ISDIO_WRITE 56 /* Write data to SD iSDIO register */ -#define ISDIO_MRITE 57 /* Masked write data to SD iSDIO register */ - -/* ATA/CF specific ioctl command */ -#define ATA_GET_REV 20 /* Get F/W revision */ -#define ATA_GET_MODEL 21 /* Get model name */ -#define ATA_GET_SN 22 /* Get serial number */ - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/fusee/common/fatfs/ff.c b/fusee/common/fatfs/ff.c deleted file mode 100644 index d28e66279..000000000 --- a/fusee/common/fatfs/ff.c +++ /dev/null @@ -1,6864 +0,0 @@ -/*----------------------------------------------------------------------------/ -/ FatFs - Generic FAT Filesystem Module R0.14 / -/-----------------------------------------------------------------------------/ -/ -/ Copyright (C) 2019, ChaN, all right reserved. -/ -/ FatFs module is an open source software. Redistribution and use of FatFs in -/ source and binary forms, with or without modification, are permitted provided -/ that the following condition is met: -/ -/ 1. Redistributions of source code must retain the above copyright notice, -/ this condition and the following disclaimer. -/ -/ This software is provided by the copyright holder and contributors "AS IS" -/ and any warranties related to this software are DISCLAIMED. -/ The copyright owner or contributors be NOT LIABLE for any damages caused -/ by use of this software. -/ -/----------------------------------------------------------------------------*/ -#pragma GCC diagnostic ignored "-Wunused-function" -#pragma GCC diagnostic ignored "-Wunused-variable" -#pragma GCC diagnostic ignored "-Wincompatible-pointer-types" - -#include "ff.h" /* Declarations of FatFs API */ -#include "diskio.h" /* Declarations of device I/O functions */ - - -/*-------------------------------------------------------------------------- - - Module Private Definitions - ----------------------------------------------------------------------------*/ - -#if FF_DEFINED != 86606 /* Revision ID */ -#error Wrong include file (ff.h). -#endif - - -/* Limits and boundaries */ -#define MAX_DIR 0x200000 /* Max size of FAT directory */ -#define MAX_DIR_EX 0x10000000 /* Max size of exFAT directory */ -#define MAX_FAT12 0xFF5 /* Max FAT12 clusters (differs from specs, but right for real DOS/Windows behavior) */ -#define MAX_FAT16 0xFFF5 /* Max FAT16 clusters (differs from specs, but right for real DOS/Windows behavior) */ -#define MAX_FAT32 0x0FFFFFF5 /* Max FAT32 clusters (not specified, practical limit) */ -#define MAX_EXFAT 0x7FFFFFFD /* Max exFAT clusters (differs from specs, implementation limit) */ - - -/* Character code support macros */ -#define IsUpper(c) ((c) >= 'A' && (c) <= 'Z') -#define IsLower(c) ((c) >= 'a' && (c) <= 'z') -#define IsDigit(c) ((c) >= '0' && (c) <= '9') -#define IsSurrogate(c) ((c) >= 0xD800 && (c) <= 0xDFFF) -#define IsSurrogateH(c) ((c) >= 0xD800 && (c) <= 0xDBFF) -#define IsSurrogateL(c) ((c) >= 0xDC00 && (c) <= 0xDFFF) - - -/* Additional file access control and file status flags for internal use */ -#define FA_SEEKEND 0x20 /* Seek to end of the file on file open */ -#define FA_MODIFIED 0x40 /* File has been modified */ -#define FA_DIRTY 0x80 /* FIL.buf[] needs to be written-back */ - - -/* Additional file attribute bits for internal use */ -#define AM_VOL 0x08 /* Volume label */ -#define AM_LFN 0x0F /* LFN entry */ -#define AM_MASK 0x3F /* Mask of defined bits */ - - -/* Name status flags in fn[11] */ -#define NSFLAG 11 /* Index of the name status byte */ -#define NS_LOSS 0x01 /* Out of 8.3 format */ -#define NS_LFN 0x02 /* Force to create LFN entry */ -#define NS_LAST 0x04 /* Last segment */ -#define NS_BODY 0x08 /* Lower case flag (body) */ -#define NS_EXT 0x10 /* Lower case flag (ext) */ -#define NS_DOT 0x20 /* Dot entry */ -#define NS_NOLFN 0x40 /* Do not find LFN */ -#define NS_NONAME 0x80 /* Not followed */ - - -/* exFAT directory entry types */ -#define ET_BITMAP 0x81 /* Allocation bitmap */ -#define ET_UPCASE 0x82 /* Up-case table */ -#define ET_VLABEL 0x83 /* Volume label */ -#define ET_FILEDIR 0x85 /* File and directory */ -#define ET_STREAM 0xC0 /* Stream extension */ -#define ET_FILENAME 0xC1 /* Name extension */ - - -/* FatFs refers the FAT structure as simple byte array instead of structure member -/ because the C structure is not binary compatible between different platforms */ - -#define BS_JmpBoot 0 /* x86 jump instruction (3-byte) */ -#define BS_OEMName 3 /* OEM name (8-byte) */ -#define BPB_BytsPerSec 11 /* Sector size [byte] (WORD) */ -#define BPB_SecPerClus 13 /* Cluster size [sector] (BYTE) */ -#define BPB_RsvdSecCnt 14 /* Size of reserved area [sector] (WORD) */ -#define BPB_NumFATs 16 /* Number of FATs (BYTE) */ -#define BPB_RootEntCnt 17 /* Size of root directory area for FAT [entry] (WORD) */ -#define BPB_TotSec16 19 /* Volume size (16-bit) [sector] (WORD) */ -#define BPB_Media 21 /* Media descriptor byte (BYTE) */ -#define BPB_FATSz16 22 /* FAT size (16-bit) [sector] (WORD) */ -#define BPB_SecPerTrk 24 /* Number of sectors per track for int13h [sector] (WORD) */ -#define BPB_NumHeads 26 /* Number of heads for int13h (WORD) */ -#define BPB_HiddSec 28 /* Volume offset from top of the drive (DWORD) */ -#define BPB_TotSec32 32 /* Volume size (32-bit) [sector] (DWORD) */ -#define BS_DrvNum 36 /* Physical drive number for int13h (BYTE) */ -#define BS_NTres 37 /* WindowsNT error flag (BYTE) */ -#define BS_BootSig 38 /* Extended boot signature (BYTE) */ -#define BS_VolID 39 /* Volume serial number (DWORD) */ -#define BS_VolLab 43 /* Volume label string (8-byte) */ -#define BS_FilSysType 54 /* Filesystem type string (8-byte) */ -#define BS_BootCode 62 /* Boot code (448-byte) */ -#define BS_55AA 510 /* Signature word (WORD) */ - -#define BPB_FATSz32 36 /* FAT32: FAT size [sector] (DWORD) */ -#define BPB_ExtFlags32 40 /* FAT32: Extended flags (WORD) */ -#define BPB_FSVer32 42 /* FAT32: Filesystem version (WORD) */ -#define BPB_RootClus32 44 /* FAT32: Root directory cluster (DWORD) */ -#define BPB_FSInfo32 48 /* FAT32: Offset of FSINFO sector (WORD) */ -#define BPB_BkBootSec32 50 /* FAT32: Offset of backup boot sector (WORD) */ -#define BS_DrvNum32 64 /* FAT32: Physical drive number for int13h (BYTE) */ -#define BS_NTres32 65 /* FAT32: Error flag (BYTE) */ -#define BS_BootSig32 66 /* FAT32: Extended boot signature (BYTE) */ -#define BS_VolID32 67 /* FAT32: Volume serial number (DWORD) */ -#define BS_VolLab32 71 /* FAT32: Volume label string (8-byte) */ -#define BS_FilSysType32 82 /* FAT32: Filesystem type string (8-byte) */ -#define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */ - -#define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */ -#define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */ -#define BPB_TotSecEx 72 /* exFAT: Volume size [sector] (QWORD) */ -#define BPB_FatOfsEx 80 /* exFAT: FAT offset from top of the volume [sector] (DWORD) */ -#define BPB_FatSzEx 84 /* exFAT: FAT size [sector] (DWORD) */ -#define BPB_DataOfsEx 88 /* exFAT: Data offset from top of the volume [sector] (DWORD) */ -#define BPB_NumClusEx 92 /* exFAT: Number of clusters (DWORD) */ -#define BPB_RootClusEx 96 /* exFAT: Root directory start cluster (DWORD) */ -#define BPB_VolIDEx 100 /* exFAT: Volume serial number (DWORD) */ -#define BPB_FSVerEx 104 /* exFAT: Filesystem version (WORD) */ -#define BPB_VolFlagEx 106 /* exFAT: Volume flags (WORD) */ -#define BPB_BytsPerSecEx 108 /* exFAT: Log2 of sector size in unit of byte (BYTE) */ -#define BPB_SecPerClusEx 109 /* exFAT: Log2 of cluster size in unit of sector (BYTE) */ -#define BPB_NumFATsEx 110 /* exFAT: Number of FATs (BYTE) */ -#define BPB_DrvNumEx 111 /* exFAT: Physical drive number for int13h (BYTE) */ -#define BPB_PercInUseEx 112 /* exFAT: Percent in use (BYTE) */ -#define BPB_RsvdEx 113 /* exFAT: Reserved (7-byte) */ -#define BS_BootCodeEx 120 /* exFAT: Boot code (390-byte) */ - -#define DIR_Name 0 /* Short file name (11-byte) */ -#define DIR_Attr 11 /* Attribute (BYTE) */ -#define DIR_NTres 12 /* Lower case flag (BYTE) */ -#define DIR_CrtTime10 13 /* Created time sub-second (BYTE) */ -#define DIR_CrtTime 14 /* Created time (DWORD) */ -#define DIR_LstAccDate 18 /* Last accessed date (WORD) */ -#define DIR_FstClusHI 20 /* Higher 16-bit of first cluster (WORD) */ -#define DIR_ModTime 22 /* Modified time (DWORD) */ -#define DIR_FstClusLO 26 /* Lower 16-bit of first cluster (WORD) */ -#define DIR_FileSize 28 /* File size (DWORD) */ -#define LDIR_Ord 0 /* LFN: LFN order and LLE flag (BYTE) */ -#define LDIR_Attr 11 /* LFN: LFN attribute (BYTE) */ -#define LDIR_Type 12 /* LFN: Entry type (BYTE) */ -#define LDIR_Chksum 13 /* LFN: Checksum of the SFN (BYTE) */ -#define LDIR_FstClusLO 26 /* LFN: MBZ field (WORD) */ -#define XDIR_Type 0 /* exFAT: Type of exFAT directory entry (BYTE) */ -#define XDIR_NumLabel 1 /* exFAT: Number of volume label characters (BYTE) */ -#define XDIR_Label 2 /* exFAT: Volume label (11-WORD) */ -#define XDIR_CaseSum 4 /* exFAT: Sum of case conversion table (DWORD) */ -#define XDIR_NumSec 1 /* exFAT: Number of secondary entries (BYTE) */ -#define XDIR_SetSum 2 /* exFAT: Sum of the set of directory entries (WORD) */ -#define XDIR_Attr 4 /* exFAT: File attribute (WORD) */ -#define XDIR_CrtTime 8 /* exFAT: Created time (DWORD) */ -#define XDIR_ModTime 12 /* exFAT: Modified time (DWORD) */ -#define XDIR_AccTime 16 /* exFAT: Last accessed time (DWORD) */ -#define XDIR_CrtTime10 20 /* exFAT: Created time subsecond (BYTE) */ -#define XDIR_ModTime10 21 /* exFAT: Modified time subsecond (BYTE) */ -#define XDIR_CrtTZ 22 /* exFAT: Created timezone (BYTE) */ -#define XDIR_ModTZ 23 /* exFAT: Modified timezone (BYTE) */ -#define XDIR_AccTZ 24 /* exFAT: Last accessed timezone (BYTE) */ -#define XDIR_GenFlags 33 /* exFAT: General secondary flags (BYTE) */ -#define XDIR_NumName 35 /* exFAT: Number of file name characters (BYTE) */ -#define XDIR_NameHash 36 /* exFAT: Hash of file name (WORD) */ -#define XDIR_ValidFileSize 40 /* exFAT: Valid file size (QWORD) */ -#define XDIR_FstClus 52 /* exFAT: First cluster of the file data (DWORD) */ -#define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */ - -#define SZDIRE 32 /* Size of a directory entry */ -#define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */ -#define RDDEM 0x05 /* Replacement of the character collides with DDEM */ -#define LLEF 0x40 /* Last long entry flag in LDIR_Ord */ - -#define FSI_LeadSig 0 /* FAT32 FSI: Leading signature (DWORD) */ -#define FSI_StrucSig 484 /* FAT32 FSI: Structure signature (DWORD) */ -#define FSI_Free_Count 488 /* FAT32 FSI: Number of free clusters (DWORD) */ -#define FSI_Nxt_Free 492 /* FAT32 FSI: Last allocated cluster (DWORD) */ - -#define MBR_Table 446 /* MBR: Offset of partition table in the MBR */ -#define SZ_PTE 16 /* MBR: Size of a partition table entry */ -#define PTE_Boot 0 /* MBR PTE: Boot indicator */ -#define PTE_StHead 1 /* MBR PTE: Start head */ -#define PTE_StSec 2 /* MBR PTE: Start sector */ -#define PTE_StCyl 3 /* MBR PTE: Start cylinder */ -#define PTE_System 4 /* MBR PTE: System ID */ -#define PTE_EdHead 5 /* MBR PTE: End head */ -#define PTE_EdSec 6 /* MBR PTE: End sector */ -#define PTE_EdCyl 7 /* MBR PTE: End cylinder */ -#define PTE_StLba 8 /* MBR PTE: Start in LBA */ -#define PTE_SizLba 12 /* MBR PTE: Size in LBA */ - -#define GPTH_Sign 0 /* GPT: Header signature (8-byte) */ -#define GPTH_Rev 8 /* GPT: Revision (DWORD) */ -#define GPTH_Size 12 /* GPT: Header size (DWORD) */ -#define GPTH_Bcc 16 /* GPT: Header BCC (DWORD) */ -#define GPTH_CurLba 24 /* GPT: Main header LBA (QWORD) */ -#define GPTH_BakLba 32 /* GPT: Backup header LBA (QWORD) */ -#define GPTH_FstLba 40 /* GPT: First LBA for partitions (QWORD) */ -#define GPTH_LstLba 48 /* GPT: Last LBA for partitions (QWORD) */ -#define GPTH_DskGuid 56 /* GPT: Disk GUID (16-byte) */ -#define GPTH_PtOfs 72 /* GPT: Partation table LBA (QWORD) */ -#define GPTH_PtNum 80 /* GPT: Number of table entries (DWORD) */ -#define GPTH_PteSize 84 /* GPT: Size of table entry (DWORD) */ -#define GPTH_PtBcc 88 /* GPT: Partation table BCC (DWORD) */ -#define SZ_GPTE 128 /* GPT: Size of partition table entry */ -#define GPTE_PtGuid 0 /* GPT PTE: Partition type GUID (16-byte) */ -#define GPTE_UpGuid 16 /* GPT PTE: Partition unique GUID (16-byte) */ -#define GPTE_FstLba 32 /* GPT PTE: First LBA (QWORD) */ -#define GPTE_LstLba 40 /* GPT PTE: Last LBA inclusive (QWORD) */ -#define GPTE_Flags 48 /* GPT PTE: Flags (QWORD) */ -#define GPTE_Name 56 /* GPT PTE: Name */ - - -/* Post process on fatal error in the file operations */ -#define ABORT(fs, res) { fp->err = (BYTE)(res); LEAVE_FF(fs, res); } - - -/* Re-entrancy related */ -#if FF_FS_REENTRANT -#if FF_USE_LFN == 1 -#error Static LFN work area cannot be used at thread-safe configuration -#endif -#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } -#else -#define LEAVE_FF(fs, res) return res -#endif - - -/* Definitions of logical drive - physical location conversion */ -#if FF_MULTI_PARTITION -#define LD2PD(vol) VolToPart[vol].pd /* Get physical drive number */ -#define LD2PT(vol) VolToPart[vol].pt /* Get partition index */ -#else -#define LD2PD(vol) (BYTE)(vol) /* Each logical drive is associated with the same physical drive number */ -#define LD2PT(vol) 0 /* Find first valid partition or in SFD */ -#endif - - -/* Definitions of sector size */ -#if (FF_MAX_SS < FF_MIN_SS) || (FF_MAX_SS != 512 && FF_MAX_SS != 1024 && FF_MAX_SS != 2048 && FF_MAX_SS != 4096) || (FF_MIN_SS != 512 && FF_MIN_SS != 1024 && FF_MIN_SS != 2048 && FF_MIN_SS != 4096) -#error Wrong sector size configuration -#endif -#if FF_MAX_SS == FF_MIN_SS -#define SS(fs) ((UINT)FF_MAX_SS) /* Fixed sector size */ -#else -#define SS(fs) ((fs)->ssize) /* Variable sector size */ -#endif - - -/* Timestamp */ -#if FF_FS_NORTC == 1 -#if FF_NORTC_YEAR < 1980 || FF_NORTC_YEAR > 2107 || FF_NORTC_MON < 1 || FF_NORTC_MON > 12 || FF_NORTC_MDAY < 1 || FF_NORTC_MDAY > 31 -#error Invalid FF_FS_NORTC settings -#endif -#define GET_FATTIME() ((DWORD)(FF_NORTC_YEAR - 1980) << 25 | (DWORD)FF_NORTC_MON << 21 | (DWORD)FF_NORTC_MDAY << 16) -#else -#define GET_FATTIME() get_fattime() -#endif - - -/* File lock controls */ -#if FF_FS_LOCK != 0 -#if FF_FS_READONLY -#error FF_FS_LOCK must be 0 at read-only configuration -#endif -typedef struct { - FATFS *fs; /* Object ID 1, volume (NULL:blank entry) */ - DWORD clu; /* Object ID 2, containing directory (0:root) */ - DWORD ofs; /* Object ID 3, offset in the directory */ - WORD ctr; /* Object open counter, 0:none, 0x01..0xFF:read mode open count, 0x100:write mode */ -} FILESEM; -#endif - - -/* SBCS up-case tables (\x80-\xFF) */ -#define TBL_CT437 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ - 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT720 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT737 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \ - 0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xEF,0xF5,0xF0,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT771 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDC,0xDE,0xDE, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFE,0xFF} -#define TBL_CT775 {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F, \ - 0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ - 0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT850 {0x43,0x55,0x45,0x41,0x41,0x41,0x41,0x43,0x45,0x45,0x45,0x49,0x49,0x49,0x41,0x41, \ - 0x45,0x92,0x92,0x4F,0x4F,0x4F,0x55,0x55,0x59,0x4F,0x55,0x4F,0x9C,0x4F,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0x41,0x41,0x41,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0x41,0x41,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD1,0xD1,0x45,0x45,0x45,0x49,0x49,0x49,0x49,0xD9,0xDA,0xDB,0xDC,0xDD,0x49,0xDF, \ - 0x4F,0xE1,0x4F,0x4F,0x4F,0x4F,0xE6,0xE8,0xE8,0x55,0x55,0x55,0x59,0x59,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT852 {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \ - 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF} -#define TBL_CT855 {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F, \ - 0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \ - 0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \ - 0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF, \ - 0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT857 {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x49,0x8E,0x8F, \ - 0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \ - 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0x49,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT860 {0x80,0x9A,0x90,0x8F,0x8E,0x91,0x86,0x80,0x89,0x89,0x92,0x8B,0x8C,0x98,0x8E,0x8F, \ - 0x90,0x91,0x92,0x8C,0x99,0xA9,0x96,0x9D,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x86,0x8B,0x9F,0x96,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT861 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x8B,0x8B,0x8D,0x8E,0x8F, \ - 0x90,0x92,0x92,0x4F,0x99,0x8D,0x55,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ - 0xA4,0xA5,0xA6,0xA7,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT862 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT863 {0x43,0x55,0x45,0x41,0x41,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x41,0x8F, \ - 0x45,0x45,0x45,0x4F,0x45,0x49,0x55,0x55,0x98,0x4F,0x55,0x9B,0x9C,0x55,0x55,0x9F, \ - 0xA0,0xA1,0x4F,0x55,0xA4,0xA5,0xA6,0xA7,0x49,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT864 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ - 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT865 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ - 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ - 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT866 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ - 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} -#define TBL_CT869 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ - 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x86,0x9C,0x8D,0x8F,0x90, \ - 0x91,0x90,0x92,0x95,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ - 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ - 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ - 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \ - 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \ - 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF} - - -/* DBCS code range |----- 1st byte -----| |----------- 2nd byte -----------| */ -/* <------> <------> <------> <------> <------> */ -#define TBL_DC932 {0x81, 0x9F, 0xE0, 0xFC, 0x40, 0x7E, 0x80, 0xFC, 0x00, 0x00} -#define TBL_DC936 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0x80, 0xFE, 0x00, 0x00} -#define TBL_DC949 {0x81, 0xFE, 0x00, 0x00, 0x41, 0x5A, 0x61, 0x7A, 0x81, 0xFE} -#define TBL_DC950 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0xA1, 0xFE, 0x00, 0x00} - - -/* Macros for table definitions */ -#define MERGE_2STR(a, b) a ## b -#define MKCVTBL(hd, cp) MERGE_2STR(hd, cp) - - - - -/*-------------------------------------------------------------------------- - - Module Private Work Area - ----------------------------------------------------------------------------*/ -/* Remark: Variables defined here without initial value shall be guaranteed -/ zero/null at start-up. If not, the linker option or start-up routine is -/ not compliance with C standard. */ - -/*--------------------------------*/ -/* File/Volume controls */ -/*--------------------------------*/ - -#if FF_VOLUMES < 1 || FF_VOLUMES > 10 -#error Wrong FF_VOLUMES setting -#endif -static FATFS* FatFs[FF_VOLUMES]; /* Pointer to the filesystem objects (logical drives) */ -static WORD Fsid; /* Filesystem mount ID */ - -#if FF_FS_RPATH != 0 -static BYTE CurrVol; /* Current drive */ -#endif - -#if FF_FS_LOCK != 0 -static FILESEM Files[FF_FS_LOCK]; /* Open object lock semaphores */ -#endif - -#if FF_STR_VOLUME_ID -#ifdef FF_VOLUME_STRS -static const char* const VolumeStr[FF_VOLUMES] = {FF_VOLUME_STRS}; /* Pre-defined volume ID */ -#endif -#endif - -#if FF_LBA64 -#if FF_MIN_GPT > 0x100000000 -#error Wrong FF_MIN_GPT setting -#endif -static const BYTE GUID_MS_Basic[16] = {0xA2,0xA0,0xD0,0xEB,0xE5,0xB9,0x33,0x44,0x87,0xC0,0x68,0xB6,0xB7,0x26,0x99,0xC7}; -#endif - - - -/*--------------------------------*/ -/* LFN/Directory working buffer */ -/*--------------------------------*/ - -#if FF_USE_LFN == 0 /* Non-LFN configuration */ -#if FF_FS_EXFAT -#error LFN must be enabled when enable exFAT -#endif -#define DEF_NAMBUF -#define INIT_NAMBUF(fs) -#define FREE_NAMBUF() -#define LEAVE_MKFS(res) return res - -#else /* LFN configurations */ -#if FF_MAX_LFN < 12 || FF_MAX_LFN > 255 -#error Wrong setting of FF_MAX_LFN -#endif -#if FF_LFN_BUF < FF_SFN_BUF || FF_SFN_BUF < 12 -#error Wrong setting of FF_LFN_BUF or FF_SFN_BUF -#endif -#if FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3 -#error Wrong setting of FF_LFN_UNICODE -#endif -static const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* FAT: Offset of LFN characters in the directory entry */ -#define MAXDIRB(nc) ((nc + 44U) / 15 * SZDIRE) /* exFAT: Size of directory entry block scratchpad buffer needed for the name length */ - -#if FF_USE_LFN == 1 /* LFN enabled with static working buffer */ -#if FF_FS_EXFAT -static BYTE DirBuf[MAXDIRB(FF_MAX_LFN)]; /* Directory entry block scratchpad buffer */ -#endif -static WCHAR LfnBuf[FF_MAX_LFN + 1]; /* LFN working buffer */ -#define DEF_NAMBUF -#define INIT_NAMBUF(fs) -#define FREE_NAMBUF() -#define LEAVE_MKFS(res) return res - -#elif FF_USE_LFN == 2 /* LFN enabled with dynamic working buffer on the stack */ -#if FF_FS_EXFAT -#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; BYTE dbuf[MAXDIRB(FF_MAX_LFN)]; /* LFN working buffer and directory entry block scratchpad buffer */ -#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; (fs)->dirbuf = dbuf; } -#define FREE_NAMBUF() -#else -#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; /* LFN working buffer */ -#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; } -#define FREE_NAMBUF() -#endif -#define LEAVE_MKFS(res) return res - -#elif FF_USE_LFN == 3 /* LFN enabled with dynamic working buffer on the heap */ -#if FF_FS_EXFAT -#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer and directory entry block scratchpad buffer */ -#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2 + MAXDIRB(FF_MAX_LFN)); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; (fs)->dirbuf = (BYTE*)(lfn+FF_MAX_LFN+1); } -#define FREE_NAMBUF() ff_memfree(lfn) -#else -#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer */ -#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; } -#define FREE_NAMBUF() ff_memfree(lfn) -#endif -#define LEAVE_MKFS(res) { if (!work) ff_memfree(buf); return res; } -#define MAX_MALLOC 0x8000 /* Must be >=FF_MAX_SS */ - -#else -#error Wrong setting of FF_USE_LFN - -#endif /* FF_USE_LFN == 1 */ -#endif /* FF_USE_LFN == 0 */ - - - -/*--------------------------------*/ -/* Code conversion tables */ -/*--------------------------------*/ - -#if FF_CODE_PAGE == 0 /* Run-time code page configuration */ -#define CODEPAGE CodePage -static WORD CodePage; /* Current code page */ -static const BYTE *ExCvt, *DbcTbl; /* Pointer to current SBCS up-case table and DBCS code range table below */ - -static const BYTE Ct437[] = TBL_CT437; -static const BYTE Ct720[] = TBL_CT720; -static const BYTE Ct737[] = TBL_CT737; -static const BYTE Ct771[] = TBL_CT771; -static const BYTE Ct775[] = TBL_CT775; -static const BYTE Ct850[] = TBL_CT850; -static const BYTE Ct852[] = TBL_CT852; -static const BYTE Ct855[] = TBL_CT855; -static const BYTE Ct857[] = TBL_CT857; -static const BYTE Ct860[] = TBL_CT860; -static const BYTE Ct861[] = TBL_CT861; -static const BYTE Ct862[] = TBL_CT862; -static const BYTE Ct863[] = TBL_CT863; -static const BYTE Ct864[] = TBL_CT864; -static const BYTE Ct865[] = TBL_CT865; -static const BYTE Ct866[] = TBL_CT866; -static const BYTE Ct869[] = TBL_CT869; -static const BYTE Dc932[] = TBL_DC932; -static const BYTE Dc936[] = TBL_DC936; -static const BYTE Dc949[] = TBL_DC949; -static const BYTE Dc950[] = TBL_DC950; - -#elif FF_CODE_PAGE < 900 /* Static code page configuration (SBCS) */ -#define CODEPAGE FF_CODE_PAGE -static const BYTE ExCvt[] = MKCVTBL(TBL_CT, FF_CODE_PAGE); - -#else /* Static code page configuration (DBCS) */ -#define CODEPAGE FF_CODE_PAGE -static const BYTE DbcTbl[] = MKCVTBL(TBL_DC, FF_CODE_PAGE); - -#endif - - - - -/*-------------------------------------------------------------------------- - - Module Private Functions - ----------------------------------------------------------------------------*/ - - -/*-----------------------------------------------------------------------*/ -/* Load/Store multi-byte word in the FAT structure */ -/*-----------------------------------------------------------------------*/ - -static WORD ld_word (const BYTE* ptr) /* Load a 2-byte little-endian word */ -{ - WORD rv; - - rv = ptr[1]; - rv = rv << 8 | ptr[0]; - return rv; -} - -static DWORD ld_dword (const BYTE* ptr) /* Load a 4-byte little-endian word */ -{ - DWORD rv; - - rv = ptr[3]; - rv = rv << 8 | ptr[2]; - rv = rv << 8 | ptr[1]; - rv = rv << 8 | ptr[0]; - return rv; -} - -#if FF_FS_EXFAT -static QWORD ld_qword (const BYTE* ptr) /* Load an 8-byte little-endian word */ -{ - QWORD rv; - - rv = ptr[7]; - rv = rv << 8 | ptr[6]; - rv = rv << 8 | ptr[5]; - rv = rv << 8 | ptr[4]; - rv = rv << 8 | ptr[3]; - rv = rv << 8 | ptr[2]; - rv = rv << 8 | ptr[1]; - rv = rv << 8 | ptr[0]; - return rv; -} -#endif - -#if !FF_FS_READONLY -static void st_word (BYTE* ptr, WORD val) /* Store a 2-byte word in little-endian */ -{ - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; -} - -static void st_dword (BYTE* ptr, DWORD val) /* Store a 4-byte word in little-endian */ -{ - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; -} - -#if FF_FS_EXFAT -static void st_qword (BYTE* ptr, QWORD val) /* Store an 8-byte word in little-endian */ -{ - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; val >>= 8; - *ptr++ = (BYTE)val; -} -#endif -#endif /* !FF_FS_READONLY */ - - - -/*-----------------------------------------------------------------------*/ -/* String functions */ -/*-----------------------------------------------------------------------*/ - -/* Copy memory to memory */ -static void mem_cpy (void* dst, const void* src, UINT cnt) -{ - BYTE *d = (BYTE*)dst; - const BYTE *s = (const BYTE*)src; - - if (cnt != 0) { - do { - *d++ = *s++; - } while (--cnt); - } -} - - -/* Fill memory block */ -static void mem_set (void* dst, int val, UINT cnt) -{ - BYTE *d = (BYTE*)dst; - - do { - *d++ = (BYTE)val; - } while (--cnt); -} - - -/* Compare memory block */ -static int mem_cmp (const void* dst, const void* src, UINT cnt) /* ZR:same, NZ:different */ -{ - const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src; - int r = 0; - - do { - r = *d++ - *s++; - } while (--cnt && r == 0); - - return r; -} - - -/* Check if chr is contained in the string */ -static int chk_chr (const char* str, int chr) /* NZ:contained, ZR:not contained */ -{ - while (*str && *str != chr) str++; - return *str; -} - - -/* Test if the byte is DBC 1st byte */ -static int dbc_1st (BYTE c) -{ -#if FF_CODE_PAGE == 0 /* Variable code page */ - if (DbcTbl && c >= DbcTbl[0]) { - if (c <= DbcTbl[1]) return 1; /* 1st byte range 1 */ - if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1; /* 1st byte range 2 */ - } -#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */ - if (c >= DbcTbl[0]) { - if (c <= DbcTbl[1]) return 1; - if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1; - } -#else /* SBCS fixed code page */ - if (c != 0) return 0; /* Always false */ -#endif - return 0; -} - - -/* Test if the byte is DBC 2nd byte */ -static int dbc_2nd (BYTE c) -{ -#if FF_CODE_PAGE == 0 /* Variable code page */ - if (DbcTbl && c >= DbcTbl[4]) { - if (c <= DbcTbl[5]) return 1; /* 2nd byte range 1 */ - if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1; /* 2nd byte range 2 */ - if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1; /* 2nd byte range 3 */ - } -#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */ - if (c >= DbcTbl[4]) { - if (c <= DbcTbl[5]) return 1; - if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1; - if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1; - } -#else /* SBCS fixed code page */ - if (c != 0) return 0; /* Always false */ -#endif - return 0; -} - - -#if FF_USE_LFN - -/* Get a Unicode code point from the TCHAR string in defined API encodeing */ -static DWORD tchar2uni ( /* Returns a character in UTF-16 encoding (>=0x10000 on surrogate pair, 0xFFFFFFFF on decode error) */ - const TCHAR** str /* Pointer to pointer to TCHAR string in configured encoding */ -) -{ - DWORD uc; - const TCHAR *p = *str; - -#if FF_LFN_UNICODE == 1 /* UTF-16 input */ - WCHAR wc; - - uc = *p++; /* Get a unit */ - if (IsSurrogate(uc)) { /* Surrogate? */ - wc = *p++; /* Get low surrogate */ - if (!IsSurrogateH(uc) || !IsSurrogateL(wc)) return 0xFFFFFFFF; /* Wrong surrogate? */ - uc = uc << 16 | wc; - } - -#elif FF_LFN_UNICODE == 2 /* UTF-8 input */ - BYTE b; - int nf; - - uc = (BYTE)*p++; /* Get an encoding unit */ - if (uc & 0x80) { /* Multiple byte code? */ - if ((uc & 0xE0) == 0xC0) { /* 2-byte sequence? */ - uc &= 0x1F; nf = 1; - } else { - if ((uc & 0xF0) == 0xE0) { /* 3-byte sequence? */ - uc &= 0x0F; nf = 2; - } else { - if ((uc & 0xF8) == 0xF0) { /* 4-byte sequence? */ - uc &= 0x07; nf = 3; - } else { /* Wrong sequence */ - return 0xFFFFFFFF; - } - } - } - do { /* Get trailing bytes */ - b = (BYTE)*p++; - if ((b & 0xC0) != 0x80) return 0xFFFFFFFF; /* Wrong sequence? */ - uc = uc << 6 | (b & 0x3F); - } while (--nf != 0); - if (uc < 0x80 || IsSurrogate(uc) || uc >= 0x110000) return 0xFFFFFFFF; /* Wrong code? */ - if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */ - } - -#elif FF_LFN_UNICODE == 3 /* UTF-32 input */ - uc = (TCHAR)*p++; /* Get a unit */ - if (uc >= 0x110000 || IsSurrogate(uc)) return 0xFFFFFFFF; /* Wrong code? */ - if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */ - -#else /* ANSI/OEM input */ - BYTE b; - WCHAR wc; - - wc = (BYTE)*p++; /* Get a byte */ - if (dbc_1st((BYTE)wc)) { /* Is it a DBC 1st byte? */ - b = (BYTE)*p++; /* Get 2nd byte */ - if (!dbc_2nd(b)) return 0xFFFFFFFF; /* Invalid code? */ - wc = (wc << 8) + b; /* Make a DBC */ - } - if (wc != 0) { - wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM ==> Unicode */ - if (wc == 0) return 0xFFFFFFFF; /* Invalid code? */ - } - uc = wc; - -#endif - *str = p; /* Next read pointer */ - return uc; -} - - -/* Output a TCHAR string in defined API encoding */ -static BYTE put_utf ( /* Returns number of encoding units written (0:buffer overflow or wrong encoding) */ - DWORD chr, /* UTF-16 encoded character (Surrogate pair if >=0x10000) */ - TCHAR* buf, /* Output buffer */ - UINT szb /* Size of the buffer */ -) -{ -#if FF_LFN_UNICODE == 1 /* UTF-16 output */ - WCHAR hs, wc; - - hs = (WCHAR)(chr >> 16); - wc = (WCHAR)chr; - if (hs == 0) { /* Single encoding unit? */ - if (szb < 1 || IsSurrogate(wc)) return 0; /* Buffer overflow or wrong code? */ - *buf = wc; - return 1; - } - if (szb < 2 || !IsSurrogateH(hs) || !IsSurrogateL(wc)) return 0; /* Buffer overflow or wrong surrogate? */ - *buf++ = hs; - *buf++ = wc; - return 2; - -#elif FF_LFN_UNICODE == 2 /* UTF-8 output */ - DWORD hc; - - if (chr < 0x80) { /* Single byte code? */ - if (szb < 1) return 0; /* Buffer overflow? */ - *buf = (TCHAR)chr; - return 1; - } - if (chr < 0x800) { /* 2-byte sequence? */ - if (szb < 2) return 0; /* Buffer overflow? */ - *buf++ = (TCHAR)(0xC0 | (chr >> 6 & 0x1F)); - *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); - return 2; - } - if (chr < 0x10000) { /* 3-byte sequence? */ - if (szb < 3 || IsSurrogate(chr)) return 0; /* Buffer overflow or wrong code? */ - *buf++ = (TCHAR)(0xE0 | (chr >> 12 & 0x0F)); - *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F)); - *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); - return 3; - } - /* 4-byte sequence */ - if (szb < 4) return 0; /* Buffer overflow? */ - hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */ - chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */ - if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */ - chr = (hc | chr) + 0x10000; - *buf++ = (TCHAR)(0xF0 | (chr >> 18 & 0x07)); - *buf++ = (TCHAR)(0x80 | (chr >> 12 & 0x3F)); - *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F)); - *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); - return 4; - -#elif FF_LFN_UNICODE == 3 /* UTF-32 output */ - DWORD hc; - - if (szb < 1) return 0; /* Buffer overflow? */ - if (chr >= 0x10000) { /* Out of BMP? */ - hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */ - chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */ - if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */ - chr = (hc | chr) + 0x10000; - } - *buf++ = (TCHAR)chr; - return 1; - -#else /* ANSI/OEM output */ - WCHAR wc; - - wc = ff_uni2oem(chr, CODEPAGE); - if (wc >= 0x100) { /* Is this a DBC? */ - if (szb < 2) return 0; - *buf++ = (char)(wc >> 8); /* Store DBC 1st byte */ - *buf++ = (TCHAR)wc; /* Store DBC 2nd byte */ - return 2; - } - if (wc == 0 || szb < 1) return 0; /* Invalid char or buffer overflow? */ - *buf++ = (TCHAR)wc; /* Store the character */ - return 1; -#endif -} -#endif /* FF_USE_LFN */ - - -#if FF_FS_REENTRANT -/*-----------------------------------------------------------------------*/ -/* Request/Release grant to access the volume */ -/*-----------------------------------------------------------------------*/ -static int lock_fs ( /* 1:Ok, 0:timeout */ - FATFS* fs /* Filesystem object */ -) -{ - return ff_req_grant(fs->sobj); -} - - -static void unlock_fs ( - FATFS* fs, /* Filesystem object */ - FRESULT res /* Result code to be returned */ -) -{ - if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) { - ff_rel_grant(fs->sobj); - } -} - -#endif - - - -#if FF_FS_LOCK != 0 -/*-----------------------------------------------------------------------*/ -/* File lock control functions */ -/*-----------------------------------------------------------------------*/ - -static FRESULT chk_lock ( /* Check if the file can be accessed */ - DIR* dp, /* Directory object pointing the file to be checked */ - int acc /* Desired access type (0:Read mode open, 1:Write mode open, 2:Delete or rename) */ -) -{ - UINT i, be; - - /* Search open object table for the object */ - be = 0; - for (i = 0; i < FF_FS_LOCK; i++) { - if (Files[i].fs) { /* Existing entry */ - if (Files[i].fs == dp->obj.fs && /* Check if the object matches with an open object */ - Files[i].clu == dp->obj.sclust && - Files[i].ofs == dp->dptr) break; - } else { /* Blank entry */ - be = 1; - } - } - if (i == FF_FS_LOCK) { /* The object has not been opened */ - return (!be && acc != 2) ? FR_TOO_MANY_OPEN_FILES : FR_OK; /* Is there a blank entry for new object? */ - } - - /* The object was opened. Reject any open against writing file and all write mode open */ - return (acc != 0 || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK; -} - - -static int enq_lock (void) /* Check if an entry is available for a new object */ -{ - UINT i; - - for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ; - return (i == FF_FS_LOCK) ? 0 : 1; -} - - -static UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */ - DIR* dp, /* Directory object pointing the file to register or increment */ - int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */ -) -{ - UINT i; - - - for (i = 0; i < FF_FS_LOCK; i++) { /* Find the object */ - if (Files[i].fs == dp->obj.fs - && Files[i].clu == dp->obj.sclust - && Files[i].ofs == dp->dptr) break; - } - - if (i == FF_FS_LOCK) { /* Not opened. Register it as new. */ - for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ; - if (i == FF_FS_LOCK) return 0; /* No free entry to register (int err) */ - Files[i].fs = dp->obj.fs; - Files[i].clu = dp->obj.sclust; - Files[i].ofs = dp->dptr; - Files[i].ctr = 0; - } - - if (acc >= 1 && Files[i].ctr) return 0; /* Access violation (int err) */ - - Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */ - - return i + 1; /* Index number origin from 1 */ -} - - -static FRESULT dec_lock ( /* Decrement object open counter */ - UINT i /* Semaphore index (1..) */ -) -{ - WORD n; - FRESULT res; - - - if (--i < FF_FS_LOCK) { /* Index number origin from 0 */ - n = Files[i].ctr; - if (n == 0x100) n = 0; /* If write mode open, delete the entry */ - if (n > 0) n--; /* Decrement read mode open count */ - Files[i].ctr = n; - if (n == 0) Files[i].fs = 0; /* Delete the entry if open count gets zero */ - res = FR_OK; - } else { - res = FR_INT_ERR; /* Invalid index nunber */ - } - return res; -} - - -static void clear_lock ( /* Clear lock entries of the volume */ - FATFS *fs -) -{ - UINT i; - - for (i = 0; i < FF_FS_LOCK; i++) { - if (Files[i].fs == fs) Files[i].fs = 0; - } -} - -#endif /* FF_FS_LOCK != 0 */ - - - -/*-----------------------------------------------------------------------*/ -/* Move/Flush disk access window in the filesystem object */ -/*-----------------------------------------------------------------------*/ -#if !FF_FS_READONLY -static FRESULT sync_window ( /* Returns FR_OK or FR_DISK_ERR */ - FATFS* fs /* Filesystem object */ -) -{ - FRESULT res = FR_OK; - - - if (fs->wflag) { /* Is the disk access window dirty? */ - if (disk_write(fs->pdrv, fs->win, fs->winsect, 1) == RES_OK) { /* Write it back into the volume */ - fs->wflag = 0; /* Clear window dirty flag */ - if (fs->winsect - fs->fatbase < fs->fsize) { /* Is it in the 1st FAT? */ - if (fs->n_fats == 2) disk_write(fs->pdrv, fs->win, fs->winsect + fs->fsize, 1); /* Reflect it to 2nd FAT if needed */ - } - } else { - res = FR_DISK_ERR; - } - } - return res; -} -#endif - - -static FRESULT move_window ( /* Returns FR_OK or FR_DISK_ERR */ - FATFS* fs, /* Filesystem object */ - LBA_t sect /* Sector LBA to make appearance in the fs->win[] */ -) -{ - FRESULT res = FR_OK; - - - if (sect != fs->winsect) { /* Window offset changed? */ -#if !FF_FS_READONLY - res = sync_window(fs); /* Flush the window */ -#endif - if (res == FR_OK) { /* Fill sector window with new data */ - if (disk_read(fs->pdrv, fs->win, sect, 1) != RES_OK) { - sect = (LBA_t)0 - 1; /* Invalidate window if read data is not valid */ - res = FR_DISK_ERR; - } - fs->winsect = sect; - } - } - return res; -} - - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Synchronize filesystem and data on the storage */ -/*-----------------------------------------------------------------------*/ - -static FRESULT sync_fs ( /* Returns FR_OK or FR_DISK_ERR */ - FATFS* fs /* Filesystem object */ -) -{ - FRESULT res; - - - res = sync_window(fs); - if (res == FR_OK) { - if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) { /* FAT32: Update FSInfo sector if needed */ - /* Create FSInfo structure */ - mem_set(fs->win, 0, sizeof fs->win); - st_word(fs->win + BS_55AA, 0xAA55); - st_dword(fs->win + FSI_LeadSig, 0x41615252); - st_dword(fs->win + FSI_StrucSig, 0x61417272); - st_dword(fs->win + FSI_Free_Count, fs->free_clst); - st_dword(fs->win + FSI_Nxt_Free, fs->last_clst); - /* Write it into the FSInfo sector */ - fs->winsect = fs->volbase + 1; - disk_write(fs->pdrv, fs->win, fs->winsect, 1); - fs->fsi_flag = 0; - } - /* Make sure that no pending write process in the lower layer */ - if (disk_ioctl(fs->pdrv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR; - } - - return res; -} - -#endif - - - -/*-----------------------------------------------------------------------*/ -/* Get physical sector number from cluster number */ -/*-----------------------------------------------------------------------*/ - -static LBA_t clst2sect ( /* !=0:Sector number, 0:Failed (invalid cluster#) */ - FATFS* fs, /* Filesystem object */ - DWORD clst /* Cluster# to be converted */ -) -{ - clst -= 2; /* Cluster number is origin from 2 */ - if (clst >= fs->n_fatent - 2) return 0; /* Is it invalid cluster number? */ - return fs->database + (LBA_t)fs->csize * clst; /* Start sector number of the cluster */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* FAT access - Read value of a FAT entry */ -/*-----------------------------------------------------------------------*/ - -static DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */ - FFOBJID* obj, /* Corresponding object */ - DWORD clst /* Cluster number to get the value */ -) -{ - UINT wc, bc; - DWORD val; - FATFS *fs = obj->fs; - - - if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */ - val = 1; /* Internal error */ - - } else { - val = 0xFFFFFFFF; /* Default value falls on disk error */ - - switch (fs->fs_type) { - case FS_FAT12 : - bc = (UINT)clst; bc += bc / 2; - if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break; - wc = fs->win[bc++ % SS(fs)]; /* Get 1st byte of the entry */ - if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break; - wc |= fs->win[bc % SS(fs)] << 8; /* Merge 2nd byte of the entry */ - val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF); /* Adjust bit position */ - break; - - case FS_FAT16 : - if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break; - val = ld_word(fs->win + clst * 2 % SS(fs)); /* Simple WORD array */ - break; - - case FS_FAT32 : - if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break; - val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; /* Simple DWORD array but mask out upper 4 bits */ - break; -#if FF_FS_EXFAT - case FS_EXFAT : - if ((obj->objsize != 0 && obj->sclust != 0) || obj->stat == 0) { /* Object except root dir must have valid data length */ - DWORD cofs = clst - obj->sclust; /* Offset from start cluster */ - DWORD clen = (DWORD)((LBA_t)((obj->objsize - 1) / SS(fs)) / fs->csize); /* Number of clusters - 1 */ - - if (obj->stat == 2 && cofs <= clen) { /* Is it a contiguous chain? */ - val = (cofs == clen) ? 0x7FFFFFFF : clst + 1; /* No data on the FAT, generate the value */ - break; - } - if (obj->stat == 3 && cofs < obj->n_cont) { /* Is it in the 1st fragment? */ - val = clst + 1; /* Generate the value */ - break; - } - if (obj->stat != 2) { /* Get value from FAT if FAT chain is valid */ - if (obj->n_frag != 0) { /* Is it on the growing edge? */ - val = 0x7FFFFFFF; /* Generate EOC */ - } else { - if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break; - val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x7FFFFFFF; - } - break; - } - } - /* go to default */ -#endif - default: - val = 1; /* Internal error */ - } - } - - return val; -} - - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* FAT access - Change value of a FAT entry */ -/*-----------------------------------------------------------------------*/ - -static FRESULT put_fat ( /* FR_OK(0):succeeded, !=0:error */ - FATFS* fs, /* Corresponding filesystem object */ - DWORD clst, /* FAT index number (cluster number) to be changed */ - DWORD val /* New value to be set to the entry */ -) -{ - UINT bc; - BYTE *p; - FRESULT res = FR_INT_ERR; - - - if (clst >= 2 && clst < fs->n_fatent) { /* Check if in valid range */ - switch (fs->fs_type) { - case FS_FAT12 : - bc = (UINT)clst; bc += bc / 2; /* bc: byte offset of the entry */ - res = move_window(fs, fs->fatbase + (bc / SS(fs))); - if (res != FR_OK) break; - p = fs->win + bc++ % SS(fs); - *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; /* Update 1st byte */ - fs->wflag = 1; - res = move_window(fs, fs->fatbase + (bc / SS(fs))); - if (res != FR_OK) break; - p = fs->win + bc % SS(fs); - *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); /* Update 2nd byte */ - fs->wflag = 1; - break; - - case FS_FAT16 : - res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))); - if (res != FR_OK) break; - st_word(fs->win + clst * 2 % SS(fs), (WORD)val); /* Simple WORD array */ - fs->wflag = 1; - break; - - case FS_FAT32 : -#if FF_FS_EXFAT - case FS_EXFAT : -#endif - res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))); - if (res != FR_OK) break; - if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { - val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000); - } - st_dword(fs->win + clst * 4 % SS(fs), val); - fs->wflag = 1; - break; - } - } - return res; -} - -#endif /* !FF_FS_READONLY */ - - - - -#if FF_FS_EXFAT && !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* exFAT: Accessing FAT and Allocation Bitmap */ -/*-----------------------------------------------------------------------*/ - -/*--------------------------------------*/ -/* Find a contiguous free cluster block */ -/*--------------------------------------*/ - -static DWORD find_bitmap ( /* 0:Not found, 2..:Cluster block found, 0xFFFFFFFF:Disk error */ - FATFS* fs, /* Filesystem object */ - DWORD clst, /* Cluster number to scan from */ - DWORD ncl /* Number of contiguous clusters to find (1..) */ -) -{ - BYTE bm, bv; - UINT i; - DWORD val, scl, ctr; - - - clst -= 2; /* The first bit in the bitmap corresponds to cluster #2 */ - if (clst >= fs->n_fatent - 2) clst = 0; - scl = val = clst; ctr = 0; - for (;;) { - if (move_window(fs, fs->bitbase + val / 8 / SS(fs)) != FR_OK) return 0xFFFFFFFF; - i = val / 8 % SS(fs); bm = 1 << (val % 8); - do { - do { - bv = fs->win[i] & bm; bm <<= 1; /* Get bit value */ - if (++val >= fs->n_fatent - 2) { /* Next cluster (with wrap-around) */ - val = 0; bm = 0; i = SS(fs); - } - if (bv == 0) { /* Is it a free cluster? */ - if (++ctr == ncl) return scl + 2; /* Check if run length is sufficient for required */ - } else { - scl = val; ctr = 0; /* Encountered a cluster in-use, restart to scan */ - } - if (val == clst) return 0; /* All cluster scanned? */ - } while (bm != 0); - bm = 1; - } while (++i < SS(fs)); - } -} - - -/*----------------------------------------*/ -/* Set/Clear a block of allocation bitmap */ -/*----------------------------------------*/ - -static FRESULT change_bitmap ( - FATFS* fs, /* Filesystem object */ - DWORD clst, /* Cluster number to change from */ - DWORD ncl, /* Number of clusters to be changed */ - int bv /* bit value to be set (0 or 1) */ -) -{ - BYTE bm; - UINT i; - LBA_t sect; - - - clst -= 2; /* The first bit corresponds to cluster #2 */ - sect = fs->bitbase + clst / 8 / SS(fs); /* Sector address */ - i = clst / 8 % SS(fs); /* Byte offset in the sector */ - bm = 1 << (clst % 8); /* Bit mask in the byte */ - for (;;) { - if (move_window(fs, sect++) != FR_OK) return FR_DISK_ERR; - do { - do { - if (bv == (int)((fs->win[i] & bm) != 0)) return FR_INT_ERR; /* Is the bit expected value? */ - fs->win[i] ^= bm; /* Flip the bit */ - fs->wflag = 1; - if (--ncl == 0) return FR_OK; /* All bits processed? */ - } while (bm <<= 1); /* Next bit */ - bm = 1; - } while (++i < SS(fs)); /* Next byte */ - i = 0; - } -} - - -/*---------------------------------------------*/ -/* Fill the first fragment of the FAT chain */ -/*---------------------------------------------*/ - -static FRESULT fill_first_frag ( - FFOBJID* obj /* Pointer to the corresponding object */ -) -{ - FRESULT res; - DWORD cl, n; - - - if (obj->stat == 3) { /* Has the object been changed 'fragmented' in this session? */ - for (cl = obj->sclust, n = obj->n_cont; n; cl++, n--) { /* Create cluster chain on the FAT */ - res = put_fat(obj->fs, cl, cl + 1); - if (res != FR_OK) return res; - } - obj->stat = 0; /* Change status 'FAT chain is valid' */ - } - return FR_OK; -} - - -/*---------------------------------------------*/ -/* Fill the last fragment of the FAT chain */ -/*---------------------------------------------*/ - -static FRESULT fill_last_frag ( - FFOBJID* obj, /* Pointer to the corresponding object */ - DWORD lcl, /* Last cluster of the fragment */ - DWORD term /* Value to set the last FAT entry */ -) -{ - FRESULT res; - - - while (obj->n_frag > 0) { /* Create the chain of last fragment */ - res = put_fat(obj->fs, lcl - obj->n_frag + 1, (obj->n_frag > 1) ? lcl - obj->n_frag + 2 : term); - if (res != FR_OK) return res; - obj->n_frag--; - } - return FR_OK; -} - -#endif /* FF_FS_EXFAT && !FF_FS_READONLY */ - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* FAT handling - Remove a cluster chain */ -/*-----------------------------------------------------------------------*/ - -static FRESULT remove_chain ( /* FR_OK(0):succeeded, !=0:error */ - FFOBJID* obj, /* Corresponding object */ - DWORD clst, /* Cluster to remove a chain from */ - DWORD pclst /* Previous cluster of clst (0 if entire chain) */ -) -{ - FRESULT res = FR_OK; - DWORD nxt; - FATFS *fs = obj->fs; -#if FF_FS_EXFAT || FF_USE_TRIM - DWORD scl = clst, ecl = clst; -#endif -#if FF_USE_TRIM - LBA_t rt[2]; -#endif - - if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Check if in valid range */ - - /* Mark the previous cluster 'EOC' on the FAT if it exists */ - if (pclst != 0 && (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) { - res = put_fat(fs, pclst, 0xFFFFFFFF); - if (res != FR_OK) return res; - } - - /* Remove the chain */ - do { - nxt = get_fat(obj, clst); /* Get cluster status */ - if (nxt == 0) break; /* Empty cluster? */ - if (nxt == 1) return FR_INT_ERR; /* Internal error? */ - if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error? */ - if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { - res = put_fat(fs, clst, 0); /* Mark the cluster 'free' on the FAT */ - if (res != FR_OK) return res; - } - if (fs->free_clst < fs->n_fatent - 2) { /* Update FSINFO */ - fs->free_clst++; - fs->fsi_flag |= 1; - } -#if FF_FS_EXFAT || FF_USE_TRIM - if (ecl + 1 == nxt) { /* Is next cluster contiguous? */ - ecl = nxt; - } else { /* End of contiguous cluster block */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - res = change_bitmap(fs, scl, ecl - scl + 1, 0); /* Mark the cluster block 'free' on the bitmap */ - if (res != FR_OK) return res; - } -#endif -#if FF_USE_TRIM - rt[0] = clst2sect(fs, scl); /* Start of data area to be freed */ - rt[1] = clst2sect(fs, ecl) + fs->csize - 1; /* End of data area to be freed */ - disk_ioctl(fs->pdrv, CTRL_TRIM, rt); /* Inform storage device that the data in the block may be erased */ -#endif - scl = ecl = nxt; - } -#endif - clst = nxt; /* Next cluster */ - } while (clst < fs->n_fatent); /* Repeat while not the last link */ - -#if FF_FS_EXFAT - /* Some post processes for chain status */ - if (fs->fs_type == FS_EXFAT) { - if (pclst == 0) { /* Has the entire chain been removed? */ - obj->stat = 0; /* Change the chain status 'initial' */ - } else { - if (obj->stat == 0) { /* Is it a fragmented chain from the beginning of this session? */ - clst = obj->sclust; /* Follow the chain to check if it gets contiguous */ - while (clst != pclst) { - nxt = get_fat(obj, clst); - if (nxt < 2) return FR_INT_ERR; - if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; - if (nxt != clst + 1) break; /* Not contiguous? */ - clst++; - } - if (clst == pclst) { /* Has the chain got contiguous again? */ - obj->stat = 2; /* Change the chain status 'contiguous' */ - } - } else { - if (obj->stat == 3 && pclst >= obj->sclust && pclst <= obj->sclust + obj->n_cont) { /* Was the chain fragmented in this session and got contiguous again? */ - obj->stat = 2; /* Change the chain status 'contiguous' */ - } - } - } - } -#endif - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* FAT handling - Stretch a chain or Create a new chain */ -/*-----------------------------------------------------------------------*/ - -static DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ - FFOBJID* obj, /* Corresponding object */ - DWORD clst /* Cluster# to stretch, 0:Create a new chain */ -) -{ - DWORD cs, ncl, scl; - FRESULT res; - FATFS *fs = obj->fs; - - - if (clst == 0) { /* Create a new chain */ - scl = fs->last_clst; /* Suggested cluster to start to find */ - if (scl == 0 || scl >= fs->n_fatent) scl = 1; - } - else { /* Stretch a chain */ - cs = get_fat(obj, clst); /* Check the cluster status */ - if (cs < 2) return 1; /* Test for insanity */ - if (cs == 0xFFFFFFFF) return cs; /* Test for disk error */ - if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */ - scl = clst; /* Cluster to start to find */ - } - if (fs->free_clst == 0) return 0; /* No free cluster */ - -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - ncl = find_bitmap(fs, scl, 1); /* Find a free cluster */ - if (ncl == 0 || ncl == 0xFFFFFFFF) return ncl; /* No free cluster or hard error? */ - res = change_bitmap(fs, ncl, 1, 1); /* Mark the cluster 'in use' */ - if (res == FR_INT_ERR) return 1; - if (res == FR_DISK_ERR) return 0xFFFFFFFF; - if (clst == 0) { /* Is it a new chain? */ - obj->stat = 2; /* Set status 'contiguous' */ - } else { /* It is a stretched chain */ - if (obj->stat == 2 && ncl != scl + 1) { /* Is the chain got fragmented? */ - obj->n_cont = scl - obj->sclust; /* Set size of the contiguous part */ - obj->stat = 3; /* Change status 'just fragmented' */ - } - } - if (obj->stat != 2) { /* Is the file non-contiguous? */ - if (ncl == clst + 1) { /* Is the cluster next to previous one? */ - obj->n_frag = obj->n_frag ? obj->n_frag + 1 : 2; /* Increment size of last framgent */ - } else { /* New fragment */ - if (obj->n_frag == 0) obj->n_frag = 1; - res = fill_last_frag(obj, clst, ncl); /* Fill last fragment on the FAT and link it to new one */ - if (res == FR_OK) obj->n_frag = 1; - } - } - } else -#endif - { /* On the FAT/FAT32 volume */ - ncl = 0; - if (scl == clst) { /* Stretching an existing chain? */ - ncl = scl + 1; /* Test if next cluster is free */ - if (ncl >= fs->n_fatent) ncl = 2; - cs = get_fat(obj, ncl); /* Get next cluster status */ - if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */ - if (cs != 0) { /* Not free? */ - cs = fs->last_clst; /* Start at suggested cluster if it is valid */ - if (cs >= 2 && cs < fs->n_fatent) scl = cs; - ncl = 0; - } - } - if (ncl == 0) { /* The new cluster cannot be contiguous and find another fragment */ - ncl = scl; /* Start cluster */ - for (;;) { - ncl++; /* Next cluster */ - if (ncl >= fs->n_fatent) { /* Check wrap-around */ - ncl = 2; - if (ncl > scl) return 0; /* No free cluster found? */ - } - cs = get_fat(obj, ncl); /* Get the cluster status */ - if (cs == 0) break; /* Found a free cluster? */ - if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */ - if (ncl == scl) return 0; /* No free cluster found? */ - } - } - res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */ - if (res == FR_OK && clst != 0) { - res = put_fat(fs, clst, ncl); /* Link it from the previous one if needed */ - } - } - - if (res == FR_OK) { /* Update FSINFO if function succeeded. */ - fs->last_clst = ncl; - if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--; - fs->fsi_flag |= 1; - } else { - ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; /* Failed. Generate error status */ - } - - return ncl; /* Return new cluster number or error status */ -} - -#endif /* !FF_FS_READONLY */ - - - - -#if FF_USE_FASTSEEK -/*-----------------------------------------------------------------------*/ -/* FAT handling - Convert offset into cluster with link map table */ -/*-----------------------------------------------------------------------*/ - -static DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */ - FIL* fp, /* Pointer to the file object */ - FSIZE_t ofs /* File offset to be converted to cluster# */ -) -{ - DWORD cl, ncl, *tbl; - FATFS *fs = fp->obj.fs; - - - tbl = fp->cltbl + 1; /* Top of CLMT */ - cl = (DWORD)(ofs / SS(fs) / fs->csize); /* Cluster order from top of the file */ - for (;;) { - ncl = *tbl++; /* Number of cluters in the fragment */ - if (ncl == 0) return 0; /* End of table? (error) */ - if (cl < ncl) break; /* In this fragment? */ - cl -= ncl; tbl++; /* Next fragment */ - } - return cl + *tbl; /* Return the cluster number */ -} - -#endif /* FF_USE_FASTSEEK */ - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Fill a cluster with zeros */ -/*-----------------------------------------------------------------------*/ - -#if !FF_FS_READONLY -static FRESULT dir_clear ( /* Returns FR_OK or FR_DISK_ERR */ - FATFS *fs, /* Filesystem object */ - DWORD clst /* Directory table to clear */ -) -{ - LBA_t sect; - UINT n, szb; - BYTE *ibuf; - - - if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */ - sect = clst2sect(fs, clst); /* Top of the cluster */ - fs->winsect = sect; /* Set window to top of the cluster */ - mem_set(fs->win, 0, sizeof fs->win); /* Clear window buffer */ -#if FF_USE_LFN == 3 /* Quick table clear by using multi-secter write */ - /* Allocate a temporary buffer */ - for (szb = ((DWORD)fs->csize * SS(fs) >= MAX_MALLOC) ? MAX_MALLOC : fs->csize * SS(fs), ibuf = 0; szb > SS(fs) && (ibuf = ff_memalloc(szb)) == 0; szb /= 2) ; - if (szb > SS(fs)) { /* Buffer allocated? */ - mem_set(ibuf, 0, szb); - szb /= SS(fs); /* Bytes -> Sectors */ - for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */ - ff_memfree(ibuf); - } else -#endif - { - ibuf = fs->win; szb = 1; /* Use window buffer (many single-sector writes may take a time) */ - for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */ - } - return (n == fs->csize) ? FR_OK : FR_DISK_ERR; -} -#endif /* !FF_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Set directory index */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_sdi ( /* FR_OK(0):succeeded, !=0:error */ - DIR* dp, /* Pointer to directory object */ - DWORD ofs /* Offset of directory table */ -) -{ - DWORD csz, clst; - FATFS *fs = dp->obj.fs; - - - if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) { /* Check range of offset and alignment */ - return FR_INT_ERR; - } - dp->dptr = ofs; /* Set current offset */ - clst = dp->obj.sclust; /* Table start cluster (0:root) */ - if (clst == 0 && fs->fs_type >= FS_FAT32) { /* Replace cluster# 0 with root cluster# */ - clst = (DWORD)fs->dirbase; - if (FF_FS_EXFAT) dp->obj.stat = 0; /* exFAT: Root dir has an FAT chain */ - } - - if (clst == 0) { /* Static table (root-directory on the FAT volume) */ - if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ - dp->sect = fs->dirbase; - - } else { /* Dynamic table (sub-directory or root-directory on the FAT32/exFAT volume) */ - csz = (DWORD)fs->csize * SS(fs); /* Bytes per cluster */ - while (ofs >= csz) { /* Follow cluster chain */ - clst = get_fat(&dp->obj, clst); /* Get next cluster */ - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ - if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Reached to end of table or internal error */ - ofs -= csz; - } - dp->sect = clst2sect(fs, clst); - } - dp->clust = clst; /* Current cluster# */ - if (dp->sect == 0) return FR_INT_ERR; - dp->sect += ofs / SS(fs); /* Sector# of the directory entry */ - dp->dir = fs->win + (ofs % SS(fs)); /* Pointer to the entry in the win[] */ - - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Move directory table index next */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_next ( /* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */ - DIR* dp, /* Pointer to the directory object */ - int stretch /* 0: Do not stretch table, 1: Stretch table if needed */ -) -{ - DWORD ofs, clst; - FATFS *fs = dp->obj.fs; - - - ofs = dp->dptr + SZDIRE; /* Next entry */ - if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) dp->sect = 0; /* Disable it if the offset reached the max value */ - if (dp->sect == 0) return FR_NO_FILE; /* Report EOT if it has been disabled */ - - if (ofs % SS(fs) == 0) { /* Sector changed? */ - dp->sect++; /* Next sector */ - - if (dp->clust == 0) { /* Static table */ - if (ofs / SZDIRE >= fs->n_rootdir) { /* Report EOT if it reached end of static table */ - dp->sect = 0; return FR_NO_FILE; - } - } - else { /* Dynamic table */ - if ((ofs / SS(fs) & (fs->csize - 1)) == 0) { /* Cluster changed? */ - clst = get_fat(&dp->obj, dp->clust); /* Get next cluster */ - if (clst <= 1) return FR_INT_ERR; /* Internal error */ - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ - if (clst >= fs->n_fatent) { /* It reached end of dynamic table */ -#if !FF_FS_READONLY - if (!stretch) { /* If no stretch, report EOT */ - dp->sect = 0; return FR_NO_FILE; - } - clst = create_chain(&dp->obj, dp->clust); /* Allocate a cluster */ - if (clst == 0) return FR_DENIED; /* No free cluster */ - if (clst == 1) return FR_INT_ERR; /* Internal error */ - if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ - if (dir_clear(fs, clst) != FR_OK) return FR_DISK_ERR; /* Clean up the stretched table */ - if (FF_FS_EXFAT) dp->obj.stat |= 4; /* exFAT: The directory has been stretched */ -#else - if (!stretch) dp->sect = 0; /* (this line is to suppress compiler warning) */ - dp->sect = 0; return FR_NO_FILE; /* Report EOT */ -#endif - } - dp->clust = clst; /* Initialize data for new cluster */ - dp->sect = clst2sect(fs, clst); - } - } - } - dp->dptr = ofs; /* Current entry */ - dp->dir = fs->win + ofs % SS(fs); /* Pointer to the entry in the win[] */ - - return FR_OK; -} - - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Directory handling - Reserve a block of directory entries */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_alloc ( /* FR_OK(0):succeeded, !=0:error */ - DIR* dp, /* Pointer to the directory object */ - UINT nent /* Number of contiguous entries to allocate */ -) -{ - FRESULT res; - UINT n; - FATFS *fs = dp->obj.fs; - - - res = dir_sdi(dp, 0); - if (res == FR_OK) { - n = 0; - do { - res = move_window(fs, dp->sect); - if (res != FR_OK) break; -#if FF_FS_EXFAT - if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) { -#else - if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) { -#endif - if (++n == nent) break; /* A block of contiguous free entries is found */ - } else { - n = 0; /* Not a blank entry. Restart to search */ - } - res = dir_next(dp, 1); - } while (res == FR_OK); /* Next entry with table stretch enabled */ - } - - if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */ - return res; -} - -#endif /* !FF_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* FAT: Directory handling - Load/Store start cluster number */ -/*-----------------------------------------------------------------------*/ - -static DWORD ld_clust ( /* Returns the top cluster value of the SFN entry */ - FATFS* fs, /* Pointer to the fs object */ - const BYTE* dir /* Pointer to the key entry */ -) -{ - DWORD cl; - - cl = ld_word(dir + DIR_FstClusLO); - if (fs->fs_type == FS_FAT32) { - cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16; - } - - return cl; -} - - -#if !FF_FS_READONLY -static void st_clust ( - FATFS* fs, /* Pointer to the fs object */ - BYTE* dir, /* Pointer to the key entry */ - DWORD cl /* Value to be set */ -) -{ - st_word(dir + DIR_FstClusLO, (WORD)cl); - if (fs->fs_type == FS_FAT32) { - st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16)); - } -} -#endif - - - -#if FF_USE_LFN -/*--------------------------------------------------------*/ -/* FAT-LFN: Compare a part of file name with an LFN entry */ -/*--------------------------------------------------------*/ - -static int cmp_lfn ( /* 1:matched, 0:not matched */ - const WCHAR* lfnbuf, /* Pointer to the LFN working buffer to be compared */ - BYTE* dir /* Pointer to the directory entry containing the part of LFN */ -) -{ - UINT i, s; - WCHAR wc, uc; - - - if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO */ - - i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */ - - for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ - uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */ - if (wc != 0) { - if (i >= FF_MAX_LFN + 1 || ff_wtoupper(uc) != ff_wtoupper(lfnbuf[i++])) { /* Compare it */ - return 0; /* Not matched */ - } - wc = uc; - } else { - if (uc != 0xFFFF) return 0; /* Check filler */ - } - } - - if ((dir[LDIR_Ord] & LLEF) && wc && lfnbuf[i]) return 0; /* Last segment matched but different length */ - - return 1; /* The part of LFN matched */ -} - - -#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT -/*-----------------------------------------------------*/ -/* FAT-LFN: Pick a part of file name from an LFN entry */ -/*-----------------------------------------------------*/ - -static int pick_lfn ( /* 1:succeeded, 0:buffer overflow or invalid LFN entry */ - WCHAR* lfnbuf, /* Pointer to the LFN working buffer */ - BYTE* dir /* Pointer to the LFN entry */ -) -{ - UINT i, s; - WCHAR wc, uc; - - - if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO is 0 */ - - i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */ - - for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ - uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */ - if (wc != 0) { - if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */ - lfnbuf[i++] = wc = uc; /* Store it */ - } else { - if (uc != 0xFFFF) return 0; /* Check filler */ - } - } - - if (dir[LDIR_Ord] & LLEF && wc != 0) { /* Put terminator if it is the last LFN part and not terminated */ - if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */ - lfnbuf[i] = 0; - } - - return 1; /* The part of LFN is valid */ -} -#endif - - -#if !FF_FS_READONLY -/*-----------------------------------------*/ -/* FAT-LFN: Create an entry of LFN entries */ -/*-----------------------------------------*/ - -static void put_lfn ( - const WCHAR* lfn, /* Pointer to the LFN */ - BYTE* dir, /* Pointer to the LFN entry to be created */ - BYTE ord, /* LFN order (1-20) */ - BYTE sum /* Checksum of the corresponding SFN */ -) -{ - UINT i, s; - WCHAR wc; - - - dir[LDIR_Chksum] = sum; /* Set checksum */ - dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ - dir[LDIR_Type] = 0; - st_word(dir + LDIR_FstClusLO, 0); - - i = (ord - 1) * 13; /* Get offset in the LFN working buffer */ - s = wc = 0; - do { - if (wc != 0xFFFF) wc = lfn[i++]; /* Get an effective character */ - st_word(dir + LfnOfs[s], wc); /* Put it */ - if (wc == 0) wc = 0xFFFF; /* Padding characters for following items */ - } while (++s < 13); - if (wc == 0xFFFF || !lfn[i]) ord |= LLEF; /* Last LFN part is the start of LFN sequence */ - dir[LDIR_Ord] = ord; /* Set the LFN order */ -} - -#endif /* !FF_FS_READONLY */ -#endif /* FF_USE_LFN */ - - - -#if FF_USE_LFN && !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* FAT-LFN: Create a Numbered SFN */ -/*-----------------------------------------------------------------------*/ - -static void gen_numname ( - BYTE* dst, /* Pointer to the buffer to store numbered SFN */ - const BYTE* src, /* Pointer to SFN */ - const WCHAR* lfn, /* Pointer to LFN */ - UINT seq /* Sequence number */ -) -{ - BYTE ns[8], c; - UINT i, j; - WCHAR wc; - DWORD sreg; - - - mem_cpy(dst, src, 11); - - if (seq > 5) { /* In case of many collisions, generate a hash number instead of sequential number */ - sreg = seq; - while (*lfn) { /* Create a CRC as hash value */ - wc = *lfn++; - for (i = 0; i < 16; i++) { - sreg = (sreg << 1) + (wc & 1); - wc >>= 1; - if (sreg & 0x10000) sreg ^= 0x11021; - } - } - seq = (UINT)sreg; - } - - /* itoa (hexdecimal) */ - i = 7; - do { - c = (BYTE)((seq % 16) + '0'); - if (c > '9') c += 7; - ns[i--] = c; - seq /= 16; - } while (seq); - ns[i] = '~'; - - /* Append the number to the SFN body */ - for (j = 0; j < i && dst[j] != ' '; j++) { - if (dbc_1st(dst[j])) { - if (j == i - 1) break; - j++; - } - } - do { - dst[j++] = (i < 8) ? ns[i++] : ' '; - } while (j < 8); -} -#endif /* FF_USE_LFN && !FF_FS_READONLY */ - - - -#if FF_USE_LFN -/*-----------------------------------------------------------------------*/ -/* FAT-LFN: Calculate checksum of an SFN entry */ -/*-----------------------------------------------------------------------*/ - -static BYTE sum_sfn ( - const BYTE* dir /* Pointer to the SFN entry */ -) -{ - BYTE sum = 0; - UINT n = 11; - - do { - sum = (sum >> 1) + (sum << 7) + *dir++; - } while (--n); - return sum; -} - -#endif /* FF_USE_LFN */ - - - -#if FF_FS_EXFAT -/*-----------------------------------------------------------------------*/ -/* exFAT: Checksum */ -/*-----------------------------------------------------------------------*/ - -static WORD xdir_sum ( /* Get checksum of the directoly entry block */ - const BYTE* dir /* Directory entry block to be calculated */ -) -{ - UINT i, szblk; - WORD sum; - - - szblk = (dir[XDIR_NumSec] + 1) * SZDIRE; /* Number of bytes of the entry block */ - for (i = sum = 0; i < szblk; i++) { - if (i == XDIR_SetSum) { /* Skip 2-byte sum field */ - i++; - } else { - sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + dir[i]; - } - } - return sum; -} - - - -static WORD xname_sum ( /* Get check sum (to be used as hash) of the file name */ - const WCHAR* name /* File name to be calculated */ -) -{ - WCHAR chr; - WORD sum = 0; - - - while ((chr = *name++) != 0) { - chr = (WCHAR)ff_wtoupper(chr); /* File name needs to be up-case converted */ - sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr & 0xFF); - sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr >> 8); - } - return sum; -} - - -#if !FF_FS_READONLY && FF_USE_MKFS -static DWORD xsum32 ( /* Returns 32-bit checksum */ - BYTE dat, /* Byte to be calculated (byte-by-byte processing) */ - DWORD sum /* Previous sum value */ -) -{ - sum = ((sum & 1) ? 0x80000000 : 0) + (sum >> 1) + dat; - return sum; -} -#endif - - -#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 -/*------------------------------------------------------*/ -/* exFAT: Get object information from a directory block */ -/*------------------------------------------------------*/ - -static void get_xfileinfo ( - BYTE* dirb, /* Pointer to the direcotry entry block 85+C0+C1s */ - FILINFO* fno /* Buffer to store the extracted file information */ -) -{ - WCHAR wc, hs; - UINT di, si, nc; - - /* Get file name from the entry block */ - si = SZDIRE * 2; /* 1st C1 entry */ - nc = 0; hs = 0; di = 0; - while (nc < dirb[XDIR_NumName]) { - if (si >= MAXDIRB(FF_MAX_LFN)) { di = 0; break; } /* Truncated directory block? */ - if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */ - wc = ld_word(dirb + si); si += 2; nc++; /* Get a character */ - if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */ - hs = wc; continue; /* Get low surrogate */ - } - wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in API encoding */ - if (wc == 0) { di = 0; break; } /* Buffer overflow or wrong encoding? */ - di += wc; - hs = 0; - } - if (hs != 0) di = 0; /* Broken surrogate pair? */ - if (di == 0) fno->fname[di++] = '?'; /* Inaccessible object name? */ - fno->fname[di] = 0; /* Terminate the name */ - fno->altname[0] = 0; /* exFAT does not support SFN */ - - fno->fattrib = dirb[XDIR_Attr]; /* Attribute */ - fno->fsize = (fno->fattrib & AM_DIR) ? 0 : ld_qword(dirb + XDIR_FileSize); /* Size */ - fno->ftime = ld_word(dirb + XDIR_ModTime + 0); /* Time */ - fno->fdate = ld_word(dirb + XDIR_ModTime + 2); /* Date */ -} - -#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */ - - -/*-----------------------------------*/ -/* exFAT: Get a directry entry block */ -/*-----------------------------------*/ - -static FRESULT load_xdir ( /* FR_INT_ERR: invalid entry block */ - DIR* dp /* Reading direcotry object pointing top of the entry block to load */ -) -{ - FRESULT res; - UINT i, sz_ent; - BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the on-memory direcotry entry block 85+C0+C1s */ - - - /* Load file-directory entry */ - res = move_window(dp->obj.fs, dp->sect); - if (res != FR_OK) return res; - if (dp->dir[XDIR_Type] != ET_FILEDIR) return FR_INT_ERR; /* Invalid order */ - mem_cpy(dirb + 0 * SZDIRE, dp->dir, SZDIRE); - sz_ent = (dirb[XDIR_NumSec] + 1) * SZDIRE; - if (sz_ent < 3 * SZDIRE || sz_ent > 19 * SZDIRE) return FR_INT_ERR; - - /* Load stream-extension entry */ - res = dir_next(dp, 0); - if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */ - if (res != FR_OK) return res; - res = move_window(dp->obj.fs, dp->sect); - if (res != FR_OK) return res; - if (dp->dir[XDIR_Type] != ET_STREAM) return FR_INT_ERR; /* Invalid order */ - mem_cpy(dirb + 1 * SZDIRE, dp->dir, SZDIRE); - if (MAXDIRB(dirb[XDIR_NumName]) > sz_ent) return FR_INT_ERR; - - /* Load file-name entries */ - i = 2 * SZDIRE; /* Name offset to load */ - do { - res = dir_next(dp, 0); - if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */ - if (res != FR_OK) return res; - res = move_window(dp->obj.fs, dp->sect); - if (res != FR_OK) return res; - if (dp->dir[XDIR_Type] != ET_FILENAME) return FR_INT_ERR; /* Invalid order */ - if (i < MAXDIRB(FF_MAX_LFN)) mem_cpy(dirb + i, dp->dir, SZDIRE); - } while ((i += SZDIRE) < sz_ent); - - /* Sanity check (do it for only accessible object) */ - if (i <= MAXDIRB(FF_MAX_LFN)) { - if (xdir_sum(dirb) != ld_word(dirb + XDIR_SetSum)) return FR_INT_ERR; - } - return FR_OK; -} - - -/*------------------------------------------------------------------*/ -/* exFAT: Initialize object allocation info with loaded entry block */ -/*------------------------------------------------------------------*/ - -static void init_alloc_info ( - FATFS* fs, /* Filesystem object */ - FFOBJID* obj /* Object allocation information to be initialized */ -) -{ - obj->sclust = ld_dword(fs->dirbuf + XDIR_FstClus); /* Start cluster */ - obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize); /* Size */ - obj->stat = fs->dirbuf[XDIR_GenFlags] & 2; /* Allocation status */ - obj->n_frag = 0; /* No last fragment info */ -} - - - -#if !FF_FS_READONLY || FF_FS_RPATH != 0 -/*------------------------------------------------*/ -/* exFAT: Load the object's directory entry block */ -/*------------------------------------------------*/ - -static FRESULT load_obj_xdir ( - DIR* dp, /* Blank directory object to be used to access containing direcotry */ - const FFOBJID* obj /* Object with its containing directory information */ -) -{ - FRESULT res; - - /* Open object containing directory */ - dp->obj.fs = obj->fs; - dp->obj.sclust = obj->c_scl; - dp->obj.stat = (BYTE)obj->c_size; - dp->obj.objsize = obj->c_size & 0xFFFFFF00; - dp->obj.n_frag = 0; - dp->blk_ofs = obj->c_ofs; - - res = dir_sdi(dp, dp->blk_ofs); /* Goto object's entry block */ - if (res == FR_OK) { - res = load_xdir(dp); /* Load the object's entry block */ - } - return res; -} -#endif - - -#if !FF_FS_READONLY -/*----------------------------------------*/ -/* exFAT: Store the directory entry block */ -/*----------------------------------------*/ - -static FRESULT store_xdir ( - DIR* dp /* Pointer to the direcotry object */ -) -{ - FRESULT res; - UINT nent; - BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the direcotry entry block 85+C0+C1s */ - - /* Create set sum */ - st_word(dirb + XDIR_SetSum, xdir_sum(dirb)); - nent = dirb[XDIR_NumSec] + 1; - - /* Store the direcotry entry block to the directory */ - res = dir_sdi(dp, dp->blk_ofs); - while (res == FR_OK) { - res = move_window(dp->obj.fs, dp->sect); - if (res != FR_OK) break; - mem_cpy(dp->dir, dirb, SZDIRE); - dp->obj.fs->wflag = 1; - if (--nent == 0) break; - dirb += SZDIRE; - res = dir_next(dp, 0); - } - return (res == FR_OK || res == FR_DISK_ERR) ? res : FR_INT_ERR; -} - - - -/*-------------------------------------------*/ -/* exFAT: Create a new directory enrty block */ -/*-------------------------------------------*/ - -static void create_xdir ( - BYTE* dirb, /* Pointer to the direcotry entry block buffer */ - const WCHAR* lfn /* Pointer to the object name */ -) -{ - UINT i; - BYTE nc1, nlen; - WCHAR wc; - - - /* Create file-directory and stream-extension entry */ - mem_set(dirb, 0, 2 * SZDIRE); - dirb[0 * SZDIRE + XDIR_Type] = ET_FILEDIR; - dirb[1 * SZDIRE + XDIR_Type] = ET_STREAM; - - /* Create file-name entries */ - i = SZDIRE * 2; /* Top of file_name entries */ - nlen = nc1 = 0; wc = 1; - do { - dirb[i++] = ET_FILENAME; dirb[i++] = 0; - do { /* Fill name field */ - if (wc != 0 && (wc = lfn[nlen]) != 0) nlen++; /* Get a character if exist */ - st_word(dirb + i, wc); /* Store it */ - i += 2; - } while (i % SZDIRE != 0); - nc1++; - } while (lfn[nlen]); /* Fill next entry if any char follows */ - - dirb[XDIR_NumName] = nlen; /* Set name length */ - dirb[XDIR_NumSec] = 1 + nc1; /* Set secondary count (C0 + C1s) */ - st_word(dirb + XDIR_NameHash, xname_sum(lfn)); /* Set name hash */ -} - -#endif /* !FF_FS_READONLY */ -#endif /* FF_FS_EXFAT */ - - - -#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT -/*-----------------------------------------------------------------------*/ -/* Read an object from the directory */ -/*-----------------------------------------------------------------------*/ - -#define DIR_READ_FILE(dp) dir_read(dp, 0) -#define DIR_READ_LABEL(dp) dir_read(dp, 1) - -static FRESULT dir_read ( - DIR* dp, /* Pointer to the directory object */ - int vol /* Filtered by 0:file/directory or 1:volume label */ -) -{ - FRESULT res = FR_NO_FILE; - FATFS *fs = dp->obj.fs; - BYTE attr, b; -#if FF_USE_LFN - BYTE ord = 0xFF, sum = 0xFF; -#endif - - while (dp->sect) { - res = move_window(fs, dp->sect); - if (res != FR_OK) break; - b = dp->dir[DIR_Name]; /* Test for the entry type */ - if (b == 0) { - res = FR_NO_FILE; break; /* Reached to end of the directory */ - } -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - if (FF_USE_LABEL && vol) { - if (b == ET_VLABEL) break; /* Volume label entry? */ - } else { - if (b == ET_FILEDIR) { /* Start of the file entry block? */ - dp->blk_ofs = dp->dptr; /* Get location of the block */ - res = load_xdir(dp); /* Load the entry block */ - if (res == FR_OK) { - dp->obj.attr = fs->dirbuf[XDIR_Attr] & AM_MASK; /* Get attribute */ - } - break; - } - } - } else -#endif - { /* On the FAT/FAT32 volume */ - dp->obj.attr = attr = dp->dir[DIR_Attr] & AM_MASK; /* Get attribute */ -#if FF_USE_LFN /* LFN configuration */ - if (b == DDEM || b == '.' || (int)((attr & ~AM_ARC) == AM_VOL) != vol) { /* An entry without valid data */ - ord = 0xFF; - } else { - if (attr == AM_LFN) { /* An LFN entry is found */ - if (b & LLEF) { /* Is it start of an LFN sequence? */ - sum = dp->dir[LDIR_Chksum]; - b &= (BYTE)~LLEF; ord = b; - dp->blk_ofs = dp->dptr; - } - /* Check LFN validity and capture it */ - ord = (b == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF; - } else { /* An SFN entry is found */ - if (ord != 0 || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */ - dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */ - } - break; - } - } -#else /* Non LFN configuration */ - if (b != DDEM && b != '.' && attr != AM_LFN && (int)((attr & ~AM_ARC) == AM_VOL) == vol) { /* Is it a valid entry? */ - break; - } -#endif - } - res = dir_next(dp, 0); /* Next entry */ - if (res != FR_OK) break; - } - - if (res != FR_OK) dp->sect = 0; /* Terminate the read operation on error or EOT */ - return res; -} - -#endif /* FF_FS_MINIMIZE <= 1 || FF_USE_LABEL || FF_FS_RPATH >= 2 */ - - - -/*-----------------------------------------------------------------------*/ -/* Directory handling - Find an object in the directory */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_find ( /* FR_OK(0):succeeded, !=0:error */ - DIR* dp /* Pointer to the directory object with the file name */ -) -{ - FRESULT res; - FATFS *fs = dp->obj.fs; - BYTE c; -#if FF_USE_LFN - BYTE a, ord, sum; -#endif - - res = dir_sdi(dp, 0); /* Rewind directory object */ - if (res != FR_OK) return res; -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - BYTE nc; - UINT di, ni; - WORD hash = xname_sum(fs->lfnbuf); /* Hash value of the name to find */ - - while ((res = DIR_READ_FILE(dp)) == FR_OK) { /* Read an item */ -#if FF_MAX_LFN < 255 - if (fs->dirbuf[XDIR_NumName] > FF_MAX_LFN) continue; /* Skip comparison if inaccessible object name */ -#endif - if (ld_word(fs->dirbuf + XDIR_NameHash) != hash) continue; /* Skip comparison if hash mismatched */ - for (nc = fs->dirbuf[XDIR_NumName], di = SZDIRE * 2, ni = 0; nc; nc--, di += 2, ni++) { /* Compare the name */ - if ((di % SZDIRE) == 0) di += 2; - if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break; - } - if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */ - } - return res; - } -#endif - /* On the FAT/FAT32 volume */ -#if FF_USE_LFN - ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ -#endif - do { - res = move_window(fs, dp->sect); - if (res != FR_OK) break; - c = dp->dir[DIR_Name]; - if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ -#if FF_USE_LFN /* LFN configuration */ - dp->obj.attr = a = dp->dir[DIR_Attr] & AM_MASK; - if (c == DDEM || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ - ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ - } else { - if (a == AM_LFN) { /* An LFN entry is found */ - if (!(dp->fn[NSFLAG] & NS_NOLFN)) { - if (c & LLEF) { /* Is it start of LFN sequence? */ - sum = dp->dir[LDIR_Chksum]; - c &= (BYTE)~LLEF; ord = c; /* LFN start order */ - dp->blk_ofs = dp->dptr; /* Start offset of LFN */ - } - /* Check validity of the LFN entry and compare it with given name */ - ord = (c == ord && sum == dp->dir[LDIR_Chksum] && cmp_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF; - } - } else { /* An SFN entry is found */ - if (ord == 0 && sum == sum_sfn(dp->dir)) break; /* LFN matched? */ - if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */ - ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ - } - } -#else /* Non LFN configuration */ - dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK; - if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */ -#endif - res = dir_next(dp, 0); /* Next entry */ - } while (res == FR_OK); - - return res; -} - - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Register an object to the directory */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_register ( /* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */ - DIR* dp /* Target directory with object name to be created */ -) -{ - FRESULT res; - FATFS *fs = dp->obj.fs; -#if FF_USE_LFN /* LFN configuration */ - UINT n, nlen, nent; - BYTE sn[12], sum; - - - if (dp->fn[NSFLAG] & (NS_DOT | NS_NONAME)) return FR_INVALID_NAME; /* Check name validity */ - for (nlen = 0; fs->lfnbuf[nlen]; nlen++) ; /* Get lfn length */ - -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - nent = (nlen + 14) / 15 + 2; /* Number of entries to allocate (85+C0+C1s) */ - res = dir_alloc(dp, nent); /* Allocate directory entries */ - if (res != FR_OK) return res; - dp->blk_ofs = dp->dptr - SZDIRE * (nent - 1); /* Set the allocated entry block offset */ - - if (dp->obj.stat & 4) { /* Has the directory been stretched by new allocation? */ - dp->obj.stat &= ~4; - res = fill_first_frag(&dp->obj); /* Fill the first fragment on the FAT if needed */ - if (res != FR_OK) return res; - res = fill_last_frag(&dp->obj, dp->clust, 0xFFFFFFFF); /* Fill the last fragment on the FAT if needed */ - if (res != FR_OK) return res; - if (dp->obj.sclust != 0) { /* Is it a sub-directory? */ - DIR dj; - - res = load_obj_xdir(&dj, &dp->obj); /* Load the object status */ - if (res != FR_OK) return res; - dp->obj.objsize += (DWORD)fs->csize * SS(fs); /* Increase the directory size by cluster size */ - st_qword(fs->dirbuf + XDIR_FileSize, dp->obj.objsize); - st_qword(fs->dirbuf + XDIR_ValidFileSize, dp->obj.objsize); - fs->dirbuf[XDIR_GenFlags] = dp->obj.stat | 1; /* Update the allocation status */ - res = store_xdir(&dj); /* Store the object status */ - if (res != FR_OK) return res; - } - } - - create_xdir(fs->dirbuf, fs->lfnbuf); /* Create on-memory directory block to be written later */ - return FR_OK; - } -#endif - /* On the FAT/FAT32 volume */ - mem_cpy(sn, dp->fn, 12); - if (sn[NSFLAG] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */ - dp->fn[NSFLAG] = NS_NOLFN; /* Find only SFN */ - for (n = 1; n < 100; n++) { - gen_numname(dp->fn, sn, fs->lfnbuf, n); /* Generate a numbered name */ - res = dir_find(dp); /* Check if the name collides with existing SFN */ - if (res != FR_OK) break; - } - if (n == 100) return FR_DENIED; /* Abort if too many collisions */ - if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ - dp->fn[NSFLAG] = sn[NSFLAG]; - } - - /* Create an SFN with/without LFNs. */ - nent = (sn[NSFLAG] & NS_LFN) ? (nlen + 12) / 13 + 1 : 1; /* Number of entries to allocate */ - res = dir_alloc(dp, nent); /* Allocate entries */ - if (res == FR_OK && --nent) { /* Set LFN entry if needed */ - res = dir_sdi(dp, dp->dptr - nent * SZDIRE); - if (res == FR_OK) { - sum = sum_sfn(dp->fn); /* Checksum value of the SFN tied to the LFN */ - do { /* Store LFN entries in bottom first */ - res = move_window(fs, dp->sect); - if (res != FR_OK) break; - put_lfn(fs->lfnbuf, dp->dir, (BYTE)nent, sum); - fs->wflag = 1; - res = dir_next(dp, 0); /* Next entry */ - } while (res == FR_OK && --nent); - } - } - -#else /* Non LFN configuration */ - res = dir_alloc(dp, 1); /* Allocate an entry for SFN */ - -#endif - - /* Set SFN entry */ - if (res == FR_OK) { - res = move_window(fs, dp->sect); - if (res == FR_OK) { - mem_set(dp->dir, 0, SZDIRE); /* Clean the entry */ - mem_cpy(dp->dir + DIR_Name, dp->fn, 11); /* Put SFN */ -#if FF_USE_LFN - dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */ -#endif - fs->wflag = 1; - } - } - - return res; -} - -#endif /* !FF_FS_READONLY */ - - - -#if !FF_FS_READONLY && FF_FS_MINIMIZE == 0 -/*-----------------------------------------------------------------------*/ -/* Remove an object from the directory */ -/*-----------------------------------------------------------------------*/ - -static FRESULT dir_remove ( /* FR_OK:Succeeded, FR_DISK_ERR:A disk error */ - DIR* dp /* Directory object pointing the entry to be removed */ -) -{ - FRESULT res; - FATFS *fs = dp->obj.fs; -#if FF_USE_LFN /* LFN configuration */ - DWORD last = dp->dptr; - - res = (dp->blk_ofs == 0xFFFFFFFF) ? FR_OK : dir_sdi(dp, dp->blk_ofs); /* Goto top of the entry block if LFN is exist */ - if (res == FR_OK) { - do { - res = move_window(fs, dp->sect); - if (res != FR_OK) break; - if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - dp->dir[XDIR_Type] &= 0x7F; /* Clear the entry InUse flag. */ - } else { /* On the FAT/FAT32 volume */ - dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'. */ - } - fs->wflag = 1; - if (dp->dptr >= last) break; /* If reached last entry then all entries of the object has been deleted. */ - res = dir_next(dp, 0); /* Next entry */ - } while (res == FR_OK); - if (res == FR_NO_FILE) res = FR_INT_ERR; - } -#else /* Non LFN configuration */ - - res = move_window(fs, dp->sect); - if (res == FR_OK) { - dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'.*/ - fs->wflag = 1; - } -#endif - - return res; -} - -#endif /* !FF_FS_READONLY && FF_FS_MINIMIZE == 0 */ - - - -#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 -/*-----------------------------------------------------------------------*/ -/* Get file information from directory entry */ -/*-----------------------------------------------------------------------*/ - -static void get_fileinfo ( - DIR* dp, /* Pointer to the directory object */ - FILINFO* fno /* Pointer to the file information to be filled */ -) -{ - UINT si, di; -#if FF_USE_LFN - BYTE lcf; - WCHAR wc, hs; - FATFS *fs = dp->obj.fs; -#else - TCHAR c; -#endif - - - fno->fname[0] = 0; /* Invaidate file info */ - if (dp->sect == 0) return; /* Exit if read pointer has reached end of directory */ - -#if FF_USE_LFN /* LFN configuration */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - get_xfileinfo(fs->dirbuf, fno); - return; - } else -#endif - { /* On the FAT/FAT32 volume */ - if (dp->blk_ofs != 0xFFFFFFFF) { /* Get LFN if available */ - si = di = hs = 0; - while (fs->lfnbuf[si] != 0) { - wc = fs->lfnbuf[si++]; /* Get an LFN character (UTF-16) */ - if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */ - hs = wc; continue; /* Get low surrogate */ - } - wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in UTF-16 or UTF-8 encoding */ - if (wc == 0) { di = 0; break; } /* Invalid char or buffer overflow? */ - di += wc; - hs = 0; - } - if (hs != 0) di = 0; /* Broken surrogate pair? */ - fno->fname[di] = 0; /* Terminate the LFN (null string means LFN is invalid) */ - } - } - - si = di = 0; - while (si < 11) { /* Get SFN from SFN entry */ - wc = dp->dir[si++]; /* Get a char */ - if (wc == ' ') continue; /* Skip padding spaces */ - if (wc == RDDEM) wc = DDEM; /* Restore replaced DDEM character */ - if (si == 9 && di < FF_SFN_BUF) fno->altname[di++] = '.'; /* Insert a . if extension is exist */ -#if FF_LFN_UNICODE >= 1 /* Unicode output */ - if (dbc_1st((BYTE)wc) && si != 8 && si != 11 && dbc_2nd(dp->dir[si])) { /* Make a DBC if needed */ - wc = wc << 8 | dp->dir[si++]; - } - wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM -> Unicode */ - if (wc == 0) { di = 0; break; } /* Wrong char in the current code page? */ - wc = put_utf(wc, &fno->altname[di], FF_SFN_BUF - di); /* Store it in Unicode */ - if (wc == 0) { di = 0; break; } /* Buffer overflow? */ - di += wc; -#else /* ANSI/OEM output */ - fno->altname[di++] = (TCHAR)wc; /* Store it without any conversion */ -#endif - } - fno->altname[di] = 0; /* Terminate the SFN (null string means SFN is invalid) */ - - if (fno->fname[0] == 0) { /* If LFN is invalid, altname[] needs to be copied to fname[] */ - if (di == 0) { /* If LFN and SFN both are invalid, this object is inaccesible */ - fno->fname[di++] = '?'; - } else { - for (si = di = 0, lcf = NS_BODY; fno->altname[si]; si++, di++) { /* Copy altname[] to fname[] with case information */ - wc = (WCHAR)fno->altname[si]; - if (wc == '.') lcf = NS_EXT; - if (IsUpper(wc) && (dp->dir[DIR_NTres] & lcf)) wc += 0x20; - fno->fname[di] = (TCHAR)wc; - } - } - fno->fname[di] = 0; /* Terminate the LFN */ - if (!dp->dir[DIR_NTres]) fno->altname[0] = 0; /* Altname is not needed if neither LFN nor case info is exist. */ - } - -#else /* Non-LFN configuration */ - si = di = 0; - while (si < 11) { /* Copy name body and extension */ - c = (TCHAR)dp->dir[si++]; - if (c == ' ') continue; /* Skip padding spaces */ - if (c == RDDEM) c = DDEM; /* Restore replaced DDEM character */ - if (si == 9) fno->fname[di++] = '.';/* Insert a . if extension is exist */ - fno->fname[di++] = c; - } - fno->fname[di] = 0; -#endif - - fno->fattrib = dp->dir[DIR_Attr]; /* Attribute */ - fno->fsize = ld_dword(dp->dir + DIR_FileSize); /* Size */ - fno->ftime = ld_word(dp->dir + DIR_ModTime + 0); /* Time */ - fno->fdate = ld_word(dp->dir + DIR_ModTime + 2); /* Date */ -} - -#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */ - - - -#if FF_USE_FIND && FF_FS_MINIMIZE <= 1 -/*-----------------------------------------------------------------------*/ -/* Pattern matching */ -/*-----------------------------------------------------------------------*/ - -static DWORD get_achar ( /* Get a character and advances ptr */ - const TCHAR** ptr /* Pointer to pointer to the ANSI/OEM or Unicode string */ -) -{ - DWORD chr; - - -#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode input */ - chr = tchar2uni(ptr); - if (chr == 0xFFFFFFFF) chr = 0; /* Wrong UTF encoding is recognized as end of the string */ - chr = ff_wtoupper(chr); - -#else /* ANSI/OEM input */ - chr = (BYTE)*(*ptr)++; /* Get a byte */ - if (IsLower(chr)) chr -= 0x20; /* To upper ASCII char */ -#if FF_CODE_PAGE == 0 - if (ExCvt && chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */ -#elif FF_CODE_PAGE < 900 - if (chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */ -#endif -#if FF_CODE_PAGE == 0 || FF_CODE_PAGE >= 900 - if (dbc_1st((BYTE)chr)) { /* Get DBC 2nd byte if needed */ - chr = dbc_2nd((BYTE)**ptr) ? chr << 8 | (BYTE)*(*ptr)++ : 0; - } -#endif - -#endif - return chr; -} - - -static int pattern_matching ( /* 0:not matched, 1:matched */ - const TCHAR* pat, /* Matching pattern */ - const TCHAR* nam, /* String to be tested */ - int skip, /* Number of pre-skip chars (number of ?s) */ - int inf /* Infinite search (* specified) */ -) -{ - const TCHAR *pp, *np; - DWORD pc, nc; - int nm, nx; - - - while (skip--) { /* Pre-skip name chars */ - if (!get_achar(&nam)) return 0; /* Branch mismatched if less name chars */ - } - if (*pat == 0 && inf) return 1; /* (short circuit) */ - - do { - pp = pat; np = nam; /* Top of pattern and name to match */ - for (;;) { - if (*pp == '?' || *pp == '*') { /* Wildcard? */ - nm = nx = 0; - do { /* Analyze the wildcard block */ - if (*pp++ == '?') nm++; else nx = 1; - } while (*pp == '?' || *pp == '*'); - if (pattern_matching(pp, np, nm, nx)) return 1; /* Test new branch (recurs upto number of wildcard blocks in the pattern) */ - nc = *np; break; /* Branch mismatched */ - } - pc = get_achar(&pp); /* Get a pattern char */ - nc = get_achar(&np); /* Get a name char */ - if (pc != nc) break; /* Branch mismatched? */ - if (pc == 0) return 1; /* Branch matched? (matched at end of both strings) */ - } - get_achar(&nam); /* nam++ */ - } while (inf && nc); /* Retry until end of name if infinite search is specified */ - - return 0; -} - -#endif /* FF_USE_FIND && FF_FS_MINIMIZE <= 1 */ - - - -/*-----------------------------------------------------------------------*/ -/* Pick a top segment and create the object name in directory form */ -/*-----------------------------------------------------------------------*/ - -static FRESULT create_name ( /* FR_OK: successful, FR_INVALID_NAME: could not create */ - DIR* dp, /* Pointer to the directory object */ - const TCHAR** path /* Pointer to pointer to the segment in the path string */ -) -{ -#if FF_USE_LFN /* LFN configuration */ - BYTE b, cf; - WCHAR wc, *lfn; - DWORD uc; - UINT i, ni, si, di; - const TCHAR *p; - - - /* Create LFN into LFN working buffer */ - p = *path; lfn = dp->obj.fs->lfnbuf; di = 0; - for (;;) { - uc = tchar2uni(&p); /* Get a character */ - if (uc == 0xFFFFFFFF) return FR_INVALID_NAME; /* Invalid code or UTF decode error */ - if (uc >= 0x10000) lfn[di++] = (WCHAR)(uc >> 16); /* Store high surrogate if needed */ - wc = (WCHAR)uc; - if (wc < ' ' || wc == '/' || wc == '\\') break; /* Break if end of the path or a separator is found */ - if (wc < 0x80 && chk_chr("\"*:<>\?|\x7F", wc)) return FR_INVALID_NAME; /* Reject illegal characters for LFN */ - if (di >= FF_MAX_LFN) return FR_INVALID_NAME; /* Reject too long name */ - lfn[di++] = wc; /* Store the Unicode character */ - } - if (wc < ' ') { /* End of path? */ - cf = NS_LAST; /* Set last segment flag */ - } else { - cf = 0; /* Next segment follows */ - while (*p == '/' || *p == '\\') p++; /* Skip duplicated separators if exist */ - } - *path = p; /* Return pointer to the next segment */ - -#if FF_FS_RPATH != 0 - if ((di == 1 && lfn[di - 1] == '.') || - (di == 2 && lfn[di - 1] == '.' && lfn[di - 2] == '.')) { /* Is this segment a dot name? */ - lfn[di] = 0; - for (i = 0; i < 11; i++) { /* Create dot name for SFN entry */ - dp->fn[i] = (i < di) ? '.' : ' '; - } - dp->fn[i] = cf | NS_DOT; /* This is a dot entry */ - return FR_OK; - } -#endif - while (di) { /* Snip off trailing spaces and dots if exist */ - wc = lfn[di - 1]; - if (wc != ' ' && wc != '.') break; - di--; - } - lfn[di] = 0; /* LFN is created into the working buffer */ - if (di == 0) return FR_INVALID_NAME; /* Reject null name */ - - /* Create SFN in directory form */ - for (si = 0; lfn[si] == ' '; si++) ; /* Remove leading spaces */ - if (si > 0 || lfn[si] == '.') cf |= NS_LOSS | NS_LFN; /* Is there any leading space or dot? */ - while (di > 0 && lfn[di - 1] != '.') di--; /* Find last dot (di<=si: no extension) */ - - mem_set(dp->fn, ' ', 11); - i = b = 0; ni = 8; - for (;;) { - wc = lfn[si++]; /* Get an LFN character */ - if (wc == 0) break; /* Break on end of the LFN */ - if (wc == ' ' || (wc == '.' && si != di)) { /* Remove embedded spaces and dots */ - cf |= NS_LOSS | NS_LFN; - continue; - } - - if (i >= ni || si == di) { /* End of field? */ - if (ni == 11) { /* Name extension overflow? */ - cf |= NS_LOSS | NS_LFN; - break; - } - if (si != di) cf |= NS_LOSS | NS_LFN; /* Name body overflow? */ - if (si > di) break; /* No name extension? */ - si = di; i = 8; ni = 11; b <<= 2; /* Enter name extension */ - continue; - } - - if (wc >= 0x80) { /* Is this a non-ASCII character? */ - cf |= NS_LFN; /* LFN entry needs to be created */ -#if FF_CODE_PAGE == 0 - if (ExCvt) { /* At SBCS */ - wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */ - if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */ - } else { /* At DBCS */ - wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */ - } -#elif FF_CODE_PAGE < 900 /* SBCS cfg */ - wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */ - if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */ -#else /* DBCS cfg */ - wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */ -#endif - } - - if (wc >= 0x100) { /* Is this a DBC? */ - if (i >= ni - 1) { /* Field overflow? */ - cf |= NS_LOSS | NS_LFN; - i = ni; continue; /* Next field */ - } - dp->fn[i++] = (BYTE)(wc >> 8); /* Put 1st byte */ - } else { /* SBC */ - if (wc == 0 || chk_chr("+,;=[]", wc)) { /* Replace illegal characters for SFN if needed */ - wc = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */ - } else { - if (IsUpper(wc)) { /* ASCII upper case? */ - b |= 2; - } - if (IsLower(wc)) { /* ASCII lower case? */ - b |= 1; wc -= 0x20; - } - } - } - dp->fn[i++] = (BYTE)wc; - } - - if (dp->fn[0] == DDEM) dp->fn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */ - - if (ni == 8) b <<= 2; /* Shift capital flags if no extension */ - if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) cf |= NS_LFN; /* LFN entry needs to be created if composite capitals */ - if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended character, NT flags are created */ - if (b & 0x01) cf |= NS_EXT; /* NT flag (Extension has small capital letters only) */ - if (b & 0x04) cf |= NS_BODY; /* NT flag (Body has small capital letters only) */ - } - - dp->fn[NSFLAG] = cf; /* SFN is created into dp->fn[] */ - - return FR_OK; - - -#else /* FF_USE_LFN : Non-LFN configuration */ - BYTE c, d, *sfn; - UINT ni, si, i; - const char *p; - - /* Create file name in directory form */ - p = *path; sfn = dp->fn; - mem_set(sfn, ' ', 11); - si = i = 0; ni = 8; -#if FF_FS_RPATH != 0 - if (p[si] == '.') { /* Is this a dot entry? */ - for (;;) { - c = (BYTE)p[si++]; - if (c != '.' || si >= 3) break; - sfn[i++] = c; - } - if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME; - *path = p + si; /* Return pointer to the next segment */ - sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of the path */ - return FR_OK; - } -#endif - for (;;) { - c = (BYTE)p[si++]; /* Get a byte */ - if (c <= ' ') break; /* Break if end of the path name */ - if (c == '/' || c == '\\') { /* Break if a separator is found */ - while (p[si] == '/' || p[si] == '\\') si++; /* Skip duplicated separator if exist */ - break; - } - if (c == '.' || i >= ni) { /* End of body or field overflow? */ - if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Field overflow or invalid dot? */ - i = 8; ni = 11; /* Enter file extension field */ - continue; - } -#if FF_CODE_PAGE == 0 - if (ExCvt && c >= 0x80) { /* Is SBC extended character? */ - c = ExCvt[c & 0x7F]; /* To upper SBC extended character */ - } -#elif FF_CODE_PAGE < 900 - if (c >= 0x80) { /* Is SBC extended character? */ - c = ExCvt[c & 0x7F]; /* To upper SBC extended character */ - } -#endif - if (dbc_1st(c)) { /* Check if it is a DBC 1st byte */ - d = (BYTE)p[si++]; /* Get 2nd byte */ - if (!dbc_2nd(d) || i >= ni - 1) return FR_INVALID_NAME; /* Reject invalid DBC */ - sfn[i++] = c; - sfn[i++] = d; - } else { /* SBC */ - if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) return FR_INVALID_NAME; /* Reject illegal chrs for SFN */ - if (IsLower(c)) c -= 0x20; /* To upper */ - sfn[i++] = c; - } - } - *path = p + si; /* Return pointer to the next segment */ - if (i == 0) return FR_INVALID_NAME; /* Reject nul string */ - - if (sfn[0] == DDEM) sfn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */ - sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */ - - return FR_OK; -#endif /* FF_USE_LFN */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* Follow a file path */ -/*-----------------------------------------------------------------------*/ - -static FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ - DIR* dp, /* Directory object to return last directory and found object */ - const TCHAR* path /* Full-path string to find a file or directory */ -) -{ - FRESULT res; - BYTE ns; - FATFS *fs = dp->obj.fs; - - -#if FF_FS_RPATH != 0 - if (*path != '/' && *path != '\\') { /* Without heading separator */ - dp->obj.sclust = fs->cdir; /* Start from current directory */ - } else -#endif - { /* With heading separator */ - while (*path == '/' || *path == '\\') path++; /* Strip heading separator */ - dp->obj.sclust = 0; /* Start from root directory */ - } -#if FF_FS_EXFAT - dp->obj.n_frag = 0; /* Invalidate last fragment counter of the object */ -#if FF_FS_RPATH != 0 - if (fs->fs_type == FS_EXFAT && dp->obj.sclust) { /* exFAT: Retrieve the sub-directory's status */ - DIR dj; - - dp->obj.c_scl = fs->cdc_scl; - dp->obj.c_size = fs->cdc_size; - dp->obj.c_ofs = fs->cdc_ofs; - res = load_obj_xdir(&dj, &dp->obj); - if (res != FR_OK) return res; - dp->obj.objsize = ld_dword(fs->dirbuf + XDIR_FileSize); - dp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2; - } -#endif -#endif - - if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */ - dp->fn[NSFLAG] = NS_NONAME; - res = dir_sdi(dp, 0); - - } else { /* Follow path */ - for (;;) { - res = create_name(dp, &path); /* Get a segment name of the path */ - if (res != FR_OK) break; - res = dir_find(dp); /* Find an object with the segment name */ - ns = dp->fn[NSFLAG]; - if (res != FR_OK) { /* Failed to find the object */ - if (res == FR_NO_FILE) { /* Object is not found */ - if (FF_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, stay there */ - if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */ - dp->fn[NSFLAG] = NS_NONAME; - res = FR_OK; - } else { /* Could not find the object */ - if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */ - } - } - break; - } - if (ns & NS_LAST) break; /* Last segment matched. Function completed. */ - /* Get into the sub-directory */ - if (!(dp->obj.attr & AM_DIR)) { /* It is not a sub-directory and cannot follow */ - res = FR_NO_PATH; break; - } -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* Save containing directory information for next dir */ - dp->obj.c_scl = dp->obj.sclust; - dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat; - dp->obj.c_ofs = dp->blk_ofs; - init_alloc_info(fs, &dp->obj); /* Open next directory */ - } else -#endif - { - dp->obj.sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs)); /* Open next directory */ - } - } - } - - return res; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Get logical drive number from path name */ -/*-----------------------------------------------------------------------*/ - -static int get_ldnumber ( /* Returns logical drive number (-1:invalid drive number or null pointer) */ - const TCHAR** path /* Pointer to pointer to the path name */ -) -{ - const TCHAR *tp, *tt; - TCHAR tc; - int i, vol = -1; -#if FF_STR_VOLUME_ID /* Find string volume ID */ - const char *sp; - char c; -#endif - - tt = tp = *path; - if (!tp) return vol; /* Invalid path name? */ - do tc = *tt++; while ((UINT)tc >= (FF_USE_LFN ? ' ' : '!') && tc != ':'); /* Find a colon in the path */ - - if (tc == ':') { /* DOS/Windows style volume ID? */ - i = FF_VOLUMES; - if (IsDigit(*tp) && tp + 2 == tt) { /* Is there a numeric volume ID + colon? */ - i = (int)*tp - '0'; /* Get the LD number */ - } -#if FF_STR_VOLUME_ID == 1 /* Arbitrary string is enabled */ - else { - i = 0; - do { - sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */ - do { /* Compare the volume ID with path name */ - c = *sp++; tc = *tp++; - if (IsLower(c)) c -= 0x20; - if (IsLower(tc)) tc -= 0x20; - } while (c && (TCHAR)c == tc); - } while ((c || tp != tt) && ++i < FF_VOLUMES); /* Repeat for each id until pattern match */ - } -#endif - if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */ - vol = i; /* Drive number */ - *path = tt; /* Snip the drive prefix off */ - } - return vol; - } -#if FF_STR_VOLUME_ID == 2 /* Unix style volume ID is enabled */ - if (*tp == '/') { - i = 0; - do { - sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */ - do { /* Compare the volume ID with path name */ - c = *sp++; tc = *(++tp); - if (IsLower(c)) c -= 0x20; - if (IsLower(tc)) tc -= 0x20; - } while (c && (TCHAR)c == tc); - } while ((c || (tc != '/' && (UINT)tc >= (FF_USE_LFN ? ' ' : '!'))) && ++i < FF_VOLUMES); /* Repeat for each ID until pattern match */ - if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */ - vol = i; /* Drive number */ - *path = tp; /* Snip the drive prefix off */ - return vol; - } - } -#endif - /* No drive prefix is found */ -#if FF_FS_RPATH != 0 - vol = CurrVol; /* Default drive is current drive */ -#else - vol = 0; /* Default drive is 0 */ -#endif - return vol; /* Return the default drive */ -} - - - - -/*-----------------------------------------------------------------------*/ -/* GPT support functions */ -/*-----------------------------------------------------------------------*/ - -#if FF_LBA64 - -/* Calculate CRC32 in byte-by-byte */ - -static DWORD crc32 ( /* Returns next CRC value */ - DWORD crc, /* Current CRC value */ - BYTE d /* A byte to be processed */ -) -{ - BYTE b; - - - for (b = 1; b; b <<= 1) { - crc ^= (d & b) ? 1 : 0; - crc = (crc & 1) ? crc >> 1 ^ 0xEDB88320 : crc >> 1; - } - return crc; -} - - -/* Check validity of GPT header */ - -static int test_gpt_header ( /* 0:Invalid, 1:Valid */ - const BYTE* gpth /* Pointer to the GPT header */ -) -{ - UINT i; - DWORD bcc; - - - if (mem_cmp(gpth + GPTH_Sign, "EFI PART" "\0\0\1\0" "\x5C\0\0", 16)) return 0; /* Check sign, version (1.0) and length (92) */ - for (i = 0, bcc = 0xFFFFFFFF; i < 92; i++) { /* Check header BCC */ - bcc = crc32(bcc, i - GPTH_Bcc < 4 ? 0 : gpth[i]); - } - if (~bcc != ld_dword(gpth + GPTH_Bcc)) return 0; - if (ld_dword(gpth + GPTH_PteSize) != SZ_GPTE) return 0; /* Table entry size (must be SZ_GPTE bytes) */ - if (ld_dword(gpth + GPTH_PtNum) > 128) return 0; /* Table size (must be 128 entries or less) */ - - return 1; -} - -#if !FF_FS_READONLY && FF_USE_MKFS - -/* Generate random value */ -static DWORD make_rand ( - DWORD seed, /* Seed value */ - BYTE* buff, /* Output buffer */ - UINT n /* Data length */ -) -{ - UINT r; - - - if (seed == 0) seed = 1; - do { - for (r = 0; r < 8; r++) seed = seed & 1 ? seed >> 1 ^ 0xA3000000 : seed >> 1; /* Shift 8 bits the 32-bit LFSR */ - *buff++ = (BYTE)seed; - } while (--n); - return seed; -} - -#endif -#endif - - - -/*-----------------------------------------------------------------------*/ -/* Load a sector and check if it is an FAT VBR */ -/*-----------------------------------------------------------------------*/ - -/* Check what the sector is */ - -static UINT check_fs ( /* 0:FAT VBR, 1:exFAT VBR, 2:Not FAT and valid BS, 3:Not FAT and invalid BS, 4:Disk error */ - FATFS* fs, /* Filesystem object */ - LBA_t sect /* Sector to load and check if it is an FAT-VBR or not */ -) -{ - WORD w, sign; - BYTE b; - - - fs->wflag = 0; fs->winsect = (LBA_t)0 - 1; /* Invaidate window */ - if (move_window(fs, sect) != FR_OK) return 4; /* Load the boot sector */ - sign = ld_word(fs->win + BS_55AA); -#if FF_FS_EXFAT - if (sign == 0xAA55 && !mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11)) return 1; /* It is an exFAT VBR */ -#endif - b = fs->win[BS_JmpBoot]; - if (b == 0xEB || b == 0xE9 || b == 0xE8) { /* Valid JumpBoot code? (short jump, near jump or near call) */ - if (sign == 0xAA55 && !mem_cmp(fs->win + BS_FilSysType32, "FAT32 ", 8)) return 0; /* It is an FAT32 VBR */ - /* FAT volumes formatted with early MS-DOS lack boot signature and FAT string, so that we need to identify the FAT VBR without them. */ - w = ld_word(fs->win + BPB_BytsPerSec); - if ((w & (w - 1)) == 0 && w >= FF_MIN_SS && w <= FF_MAX_SS) { /* Properness of sector size */ - b = fs->win[BPB_SecPerClus]; - if (b != 0 && (b & (b - 1)) == 0 /* Properness of cluster size */ - && (fs->win[BPB_NumFATs] == 1 || fs->win[BPB_NumFATs] == 2) /* Properness of number of FATs */ - && ld_word(fs->win + BPB_RootEntCnt) != 0 /* Properness of root entry count */ - && ld_word(fs->win + BPB_FATSz16) != 0) { /* Properness of FAT size */ - return 0; /* Sector can be presumed an FAT VBR */ - } - } - } - return sign == 0xAA55 ? 2 : 3; /* Not an FAT VBR (valid or invalid BS) */ -} - - -/* Find an FAT volume */ -/* (It supports only generic partitioning rules, MBR, GPT and SFD) */ - -static UINT find_volume ( /* Returns BS status found in the hosting drive */ - FATFS* fs, /* Filesystem object */ - UINT part /* Partition to fined = 0:auto, 1..:forced */ -) -{ - UINT fmt, i; - DWORD mbr_pt[4]; - - - fmt = check_fs(fs, 0); /* Load sector 0 and check if it is an FAT VBR as SFD */ - if (fmt != 2 && (fmt >= 3 || part == 0)) return fmt; /* Returns if it is a FAT VBR as auto scan, not a BS or disk error */ - - /* Sector 0 is not an FAT VBR or forced partition number wants a partition */ - -#if FF_LBA64 - if (fs->win[MBR_Table + PTE_System] == 0xEE) { /* GPT protective MBR? */ - DWORD n_ent, v_ent, ofs; - QWORD pt_lba; - - if (move_window(fs, 1) != FR_OK) return 4; /* Load GPT header sector (next to MBR) */ - if (!test_gpt_header(fs->win)) return 3; /* Check if GPT header is valid */ - n_ent = ld_dword(fs->win + GPTH_PtNum); /* Number of entries */ - pt_lba = ld_qword(fs->win + GPTH_PtOfs); /* Table location */ - for (v_ent = i = 0; i < n_ent; i++) { /* Find FAT partition */ - if (move_window(fs, pt_lba + i * SZ_GPTE / SS(fs)) != FR_OK) return 4; /* PT sector */ - ofs = i * SZ_GPTE % SS(fs); /* Offset in the sector */ - if (!mem_cmp(fs->win + ofs + GPTE_PtGuid, GUID_MS_Basic, 16)) { /* MS basic data partition? */ - v_ent++; - fmt = check_fs(fs, ld_qword(fs->win + ofs + GPTE_FstLba)); /* Load VBR and check status */ - if (part == 0 && fmt <= 1) return fmt; /* Auto search (valid FAT volume found first) */ - if (part != 0 && v_ent == part) return fmt; /* Forced partition order (regardless of it is valid or not) */ - } - } - return 3; /* Not found */ - } -#endif - if (FF_MULTI_PARTITION && part > 4) return 3; /* MBR has 4 partitions max */ - for (i = 0; i < 4; i++) { /* Load partition offset in the MBR */ - mbr_pt[i] = ld_dword(fs->win + MBR_Table + i * SZ_PTE + PTE_StLba); - } - i = part ? part - 1 : 0; /* Table index to find first */ - do { /* Find an FAT volume */ - fmt = mbr_pt[i] ? check_fs(fs, mbr_pt[i]) : 3; /* Check if the partition is FAT */ - } while (part == 0 && fmt >= 2 && ++i < 4); - return fmt; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Determine logical drive number and mount the volume if needed */ -/*-----------------------------------------------------------------------*/ - -static FRESULT mount_volume ( /* FR_OK(0): successful, !=0: an error occurred */ - const TCHAR** path, /* Pointer to pointer to the path name (drive number) */ - FATFS** rfs, /* Pointer to pointer to the found filesystem object */ - BYTE mode /* !=0: Check write protection for write access */ -) -{ - int vol; - DSTATUS stat; - LBA_t bsect; - DWORD tsect, sysect, fasize, nclst, szbfat; - WORD nrsv; - FATFS *fs; - UINT fmt; - - - /* Get logical drive number */ - *rfs = 0; - vol = get_ldnumber(path); - if (vol < 0) return FR_INVALID_DRIVE; - - /* Check if the filesystem object is valid or not */ - fs = FatFs[vol]; /* Get pointer to the filesystem object */ - if (!fs) return FR_NOT_ENABLED; /* Is the filesystem object available? */ -#if FF_FS_REENTRANT - if (!lock_fs(fs)) return FR_TIMEOUT; /* Lock the volume */ -#endif - *rfs = fs; /* Return pointer to the filesystem object */ - - mode &= (BYTE)~FA_READ; /* Desired access mode, write access or not */ - if (fs->fs_type != 0) { /* If the volume has been mounted */ - stat = disk_status(fs->pdrv); - if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */ - if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */ - return FR_WRITE_PROTECTED; - } - return FR_OK; /* The filesystem object is already valid */ - } - } - - /* The filesystem object is not valid. */ - /* Following code attempts to mount the volume. (find a FAT volume, analyze the BPB and initialize the filesystem object) */ - - fs->fs_type = 0; /* Clear the filesystem object */ - fs->pdrv = LD2PD(vol); /* Volume hosting physical drive */ - stat = disk_initialize(fs->pdrv); /* Initialize the physical drive */ - if (stat & STA_NOINIT) { /* Check if the initialization succeeded */ - return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */ - } - if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */ - return FR_WRITE_PROTECTED; - } -#if FF_MAX_SS != FF_MIN_SS /* Get sector size (multiple sector size cfg only) */ - if (disk_ioctl(fs->pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR; - if (SS(fs) > FF_MAX_SS || SS(fs) < FF_MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR; -#endif - - /* Find an FAT volume on the drive */ - fmt = find_volume(fs, LD2PT(vol)); - if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */ - if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */ - bsect = fs->winsect; /* Volume location */ - - /* An FAT volume is found (bsect). Following code initializes the filesystem object */ - -#if FF_FS_EXFAT - if (fmt == 1) { - QWORD maxlba; - DWORD so, cv, bcl, i; - - for (i = BPB_ZeroedEx; i < BPB_ZeroedEx + 53 && fs->win[i] == 0; i++) ; /* Check zero filler */ - if (i < BPB_ZeroedEx + 53) return FR_NO_FILESYSTEM; - - if (ld_word(fs->win + BPB_FSVerEx) != 0x100) return FR_NO_FILESYSTEM; /* Check exFAT version (must be version 1.0) */ - - if (1 << fs->win[BPB_BytsPerSecEx] != SS(fs)) { /* (BPB_BytsPerSecEx must be equal to the physical sector size) */ - return FR_NO_FILESYSTEM; - } - - maxlba = ld_qword(fs->win + BPB_TotSecEx) + bsect; /* Last LBA + 1 of the volume */ - if (!FF_LBA64 && maxlba >= 0x100000000) return FR_NO_FILESYSTEM; /* (It cannot be handled in 32-bit LBA) */ - - fs->fsize = ld_dword(fs->win + BPB_FatSzEx); /* Number of sectors per FAT */ - - fs->n_fats = fs->win[BPB_NumFATsEx]; /* Number of FATs */ - if (fs->n_fats != 1) return FR_NO_FILESYSTEM; /* (Supports only 1 FAT) */ - - fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */ - if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */ - - nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */ - if (nclst > MAX_EXFAT) return FR_NO_FILESYSTEM; /* (Too many clusters) */ - fs->n_fatent = nclst + 2; - - /* Boundaries and Limits */ - fs->volbase = bsect; - fs->database = bsect + ld_dword(fs->win + BPB_DataOfsEx); - fs->fatbase = bsect + ld_dword(fs->win + BPB_FatOfsEx); - if (maxlba < (QWORD)fs->database + nclst * fs->csize) return FR_NO_FILESYSTEM; /* (Volume size must not be smaller than the size requiered) */ - fs->dirbase = ld_dword(fs->win + BPB_RootClusEx); - - /* Get bitmap location and check if it is contiguous (implementation assumption) */ - so = i = 0; - for (;;) { /* Find the bitmap entry in the root directory (in only first cluster) */ - if (i == 0) { - if (so >= fs->csize) return FR_NO_FILESYSTEM; /* Not found? */ - if (move_window(fs, clst2sect(fs, (DWORD)fs->dirbase) + so) != FR_OK) return FR_DISK_ERR; - so++; - } - if (fs->win[i] == ET_BITMAP) break; /* Is it a bitmap entry? */ - i = (i + SZDIRE) % SS(fs); /* Next entry */ - } - bcl = ld_dword(fs->win + i + 20); /* Bitmap cluster */ - if (bcl < 2 || bcl >= fs->n_fatent) return FR_NO_FILESYSTEM; - fs->bitbase = fs->database + fs->csize * (bcl - 2); /* Bitmap sector */ - for (;;) { /* Check if bitmap is contiguous */ - if (move_window(fs, fs->fatbase + bcl / (SS(fs) / 4)) != FR_OK) return FR_DISK_ERR; - cv = ld_dword(fs->win + bcl % (SS(fs) / 4) * 4); - if (cv == 0xFFFFFFFF) break; /* Last link? */ - if (cv != ++bcl) return FR_NO_FILESYSTEM; /* Fragmented? */ - } - -#if !FF_FS_READONLY - fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */ -#endif - fmt = FS_EXFAT; /* FAT sub-type */ - } else -#endif /* FF_FS_EXFAT */ - { - if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */ - - fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */ - if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32); - fs->fsize = fasize; - - fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */ - if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */ - fasize *= fs->n_fats; /* Number of sectors for FAT area */ - - fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */ - if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */ - - fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */ - if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */ - - tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */ - if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32); - - nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */ - if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */ - - /* Determine the FAT sub type */ - sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */ - if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ - nclst = (tsect - sysect) / fs->csize; /* Number of clusters */ - if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ - fmt = 0; - if (nclst <= MAX_FAT32) fmt = FS_FAT32; - if (nclst <= MAX_FAT16) fmt = FS_FAT16; - if (nclst <= MAX_FAT12) fmt = FS_FAT12; - if (fmt == 0) return FR_NO_FILESYSTEM; - - /* Boundaries and Limits */ - fs->n_fatent = nclst + 2; /* Number of FAT entries */ - fs->volbase = bsect; /* Volume start sector */ - fs->fatbase = bsect + nrsv; /* FAT start sector */ - fs->database = bsect + sysect; /* Data start sector */ - if (fmt == FS_FAT32) { - if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */ - if (fs->n_rootdir != 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */ - fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */ - szbfat = fs->n_fatent * 4; /* (Needed FAT size) */ - } else { - if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */ - fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */ - szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */ - fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1); - } - if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */ - -#if !FF_FS_READONLY - /* Get FSInfo if available */ - fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */ - fs->fsi_flag = 0x80; -#if (FF_FS_NOFSINFO & 3) != 3 - if (fmt == FS_FAT32 /* Allow to update FSInfo only if BPB_FSInfo32 == 1 */ - && ld_word(fs->win + BPB_FSInfo32) == 1 - && move_window(fs, bsect + 1) == FR_OK) - { - fs->fsi_flag = 0; - if (ld_word(fs->win + BS_55AA) == 0xAA55 /* Load FSInfo data if available */ - && ld_dword(fs->win + FSI_LeadSig) == 0x41615252 - && ld_dword(fs->win + FSI_StrucSig) == 0x61417272) - { -#if (FF_FS_NOFSINFO & 1) == 0 - fs->free_clst = ld_dword(fs->win + FSI_Free_Count); -#endif -#if (FF_FS_NOFSINFO & 2) == 0 - fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free); -#endif - } - } -#endif /* (FF_FS_NOFSINFO & 3) != 3 */ -#endif /* !FF_FS_READONLY */ - } - - fs->fs_type = (BYTE)fmt;/* FAT sub-type */ - fs->id = ++Fsid; /* Volume mount ID */ -#if FF_USE_LFN == 1 - fs->lfnbuf = LfnBuf; /* Static LFN working buffer */ -#if FF_FS_EXFAT - fs->dirbuf = DirBuf; /* Static directory block scratchpad buuffer */ -#endif -#endif -#if FF_FS_RPATH != 0 - fs->cdir = 0; /* Initialize current directory */ -#endif -#if FF_FS_LOCK != 0 /* Clear file lock semaphores */ - clear_lock(fs); -#endif - return FR_OK; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Check if the file/directory object is valid or not */ -/*-----------------------------------------------------------------------*/ - -static FRESULT validate ( /* Returns FR_OK or FR_INVALID_OBJECT */ - FFOBJID* obj, /* Pointer to the FFOBJID, the 1st member in the FIL/DIR object, to check validity */ - FATFS** rfs /* Pointer to pointer to the owner filesystem object to return */ -) -{ - FRESULT res = FR_INVALID_OBJECT; - - - if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) { /* Test if the object is valid */ -#if FF_FS_REENTRANT - if (lock_fs(obj->fs)) { /* Obtain the filesystem object */ - if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */ - res = FR_OK; - } else { - unlock_fs(obj->fs, FR_OK); - } - } else { - res = FR_TIMEOUT; - } -#else - if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */ - res = FR_OK; - } -#endif - } - *rfs = (res == FR_OK) ? obj->fs : 0; /* Corresponding filesystem object */ - return res; -} - - - - -/*--------------------------------------------------------------------------- - - Public Functions (FatFs API) - -----------------------------------------------------------------------------*/ - - - -/*-----------------------------------------------------------------------*/ -/* Mount/Unmount a Logical Drive */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_mount ( - FATFS* fs, /* Pointer to the filesystem object (NULL:unmount)*/ - const TCHAR* path, /* Logical drive number to be mounted/unmounted */ - BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */ -) -{ - FATFS *cfs; - int vol; - FRESULT res; - const TCHAR *rp = path; - - - /* Get logical drive number */ - vol = get_ldnumber(&rp); - if (vol < 0) return FR_INVALID_DRIVE; - cfs = FatFs[vol]; /* Pointer to fs object */ - - if (cfs) { -#if FF_FS_LOCK != 0 - clear_lock(cfs); -#endif -#if FF_FS_REENTRANT /* Discard sync object of the current volume */ - if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR; -#endif - cfs->fs_type = 0; /* Clear old fs object */ - } - - if (fs) { - fs->fs_type = 0; /* Clear new fs object */ -#if FF_FS_REENTRANT /* Create sync object for the new volume */ - if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR; -#endif - } - FatFs[vol] = fs; /* Register new fs object */ - - if (opt == 0) return FR_OK; /* Do not mount now, it will be mounted later */ - - res = mount_volume(&path, &fs, 0); /* Force mounted the volume */ - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Open or Create a File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_open ( - FIL* fp, /* Pointer to the blank file object */ - const TCHAR* path, /* Pointer to the file name */ - BYTE mode /* Access mode and file open mode flags */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; -#if !FF_FS_READONLY - DWORD cl, bcs, clst; - LBA_t sc; - FSIZE_t ofs; -#endif - DEF_NAMBUF - - - if (!fp) return FR_INVALID_OBJECT; - - /* Get logical drive number */ - mode &= FF_FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND; - res = mount_volume(&path, &fs, mode); - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the file path */ -#if !FF_FS_READONLY /* Read/Write configuration */ - if (res == FR_OK) { - if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */ - res = FR_INVALID_NAME; - } -#if FF_FS_LOCK != 0 - else { - res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Check if the file can be used */ - } -#endif - } - /* Create or Open a file */ - if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { - if (res != FR_OK) { /* No file, create new */ - if (res == FR_NO_FILE) { /* There is no file to open, create a new entry */ -#if FF_FS_LOCK != 0 - res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES; -#else - res = dir_register(&dj); -#endif - } - mode |= FA_CREATE_ALWAYS; /* File is created */ - } - else { /* Any object with the same name is already existing */ - if (dj.obj.attr & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */ - res = FR_DENIED; - } else { - if (mode & FA_CREATE_NEW) res = FR_EXIST; /* Cannot create as new file */ - } - } - if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate the file if overwrite mode */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - /* Get current allocation info */ - fp->obj.fs = fs; - init_alloc_info(fs, &fp->obj); - /* Set directory entry block initial state */ - mem_set(fs->dirbuf + 2, 0, 30); /* Clear 85 entry except for NumSec */ - mem_set(fs->dirbuf + 38, 0, 26); /* Clear C0 entry except for NumName and NameHash */ - fs->dirbuf[XDIR_Attr] = AM_ARC; - st_dword(fs->dirbuf + XDIR_CrtTime, GET_FATTIME()); - fs->dirbuf[XDIR_GenFlags] = 1; - res = store_xdir(&dj); - if (res == FR_OK && fp->obj.sclust != 0) { /* Remove the cluster chain if exist */ - res = remove_chain(&fp->obj, fp->obj.sclust, 0); - fs->last_clst = fp->obj.sclust - 1; /* Reuse the cluster hole */ - } - } else -#endif - { - /* Set directory entry initial state */ - cl = ld_clust(fs, dj.dir); /* Get current cluster chain */ - st_dword(dj.dir + DIR_CrtTime, GET_FATTIME()); /* Set created time */ - dj.dir[DIR_Attr] = AM_ARC; /* Reset attribute */ - st_clust(fs, dj.dir, 0); /* Reset file allocation info */ - st_dword(dj.dir + DIR_FileSize, 0); - fs->wflag = 1; - if (cl != 0) { /* Remove the cluster chain if exist */ - sc = fs->winsect; - res = remove_chain(&dj.obj, cl, 0); - if (res == FR_OK) { - res = move_window(fs, sc); - fs->last_clst = cl - 1; /* Reuse the cluster hole */ - } - } - } - } - } - else { /* Open an existing file */ - if (res == FR_OK) { /* Is the object exsiting? */ - if (dj.obj.attr & AM_DIR) { /* File open against a directory */ - res = FR_NO_FILE; - } else { - if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* Write mode open against R/O file */ - res = FR_DENIED; - } - } - } - } - if (res == FR_OK) { - if (mode & FA_CREATE_ALWAYS) mode |= FA_MODIFIED; /* Set file change flag if created or overwritten */ - fp->dir_sect = fs->winsect; /* Pointer to the directory entry */ - fp->dir_ptr = dj.dir; -#if FF_FS_LOCK != 0 - fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Lock the file for this session */ - if (fp->obj.lockid == 0) res = FR_INT_ERR; -#endif - } -#else /* R/O configuration */ - if (res == FR_OK) { - if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it origin directory itself? */ - res = FR_INVALID_NAME; - } else { - if (dj.obj.attr & AM_DIR) { /* Is it a directory? */ - res = FR_NO_FILE; - } - } - } -#endif - - if (res == FR_OK) { -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - fp->obj.c_scl = dj.obj.sclust; /* Get containing directory info */ - fp->obj.c_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat; - fp->obj.c_ofs = dj.blk_ofs; - init_alloc_info(fs, &fp->obj); - } else -#endif - { - fp->obj.sclust = ld_clust(fs, dj.dir); /* Get object allocation info */ - fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); - } -#if FF_USE_FASTSEEK - fp->cltbl = 0; /* Disable fast seek mode */ -#endif - fp->obj.fs = fs; /* Validate the file object */ - fp->obj.id = fs->id; - fp->flag = mode; /* Set file access mode */ - fp->err = 0; /* Clear error flag */ - fp->sect = 0; /* Invalidate current data sector */ - fp->fptr = 0; /* Set file pointer top of the file */ -#if !FF_FS_READONLY -#if !FF_FS_TINY - mem_set(fp->buf, 0, sizeof fp->buf); /* Clear sector buffer */ -#endif - if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) { /* Seek to end of file if FA_OPEN_APPEND is specified */ - fp->fptr = fp->obj.objsize; /* Offset to seek */ - bcs = (DWORD)fs->csize * SS(fs); /* Cluster size in byte */ - clst = fp->obj.sclust; /* Follow the cluster chain */ - for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) { - clst = get_fat(&fp->obj, clst); - if (clst <= 1) res = FR_INT_ERR; - if (clst == 0xFFFFFFFF) res = FR_DISK_ERR; - } - fp->clust = clst; - if (res == FR_OK && ofs % SS(fs)) { /* Fill sector buffer if not on the sector boundary */ - sc = clst2sect(fs, clst); - if (sc == 0) { - res = FR_INT_ERR; - } else { - fp->sect = sc + (DWORD)(ofs / SS(fs)); -#if !FF_FS_TINY - if (disk_read(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR; -#endif - } - } - } -#endif - } - - FREE_NAMBUF(); - } - - if (res != FR_OK) fp->obj.fs = 0; /* Invalidate file object on error */ - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Read File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_read ( - FIL* fp, /* Pointer to the file object */ - void* buff, /* Pointer to data buffer */ - UINT btr, /* Number of bytes to read */ - UINT* br /* Pointer to number of bytes read */ -) -{ - FRESULT res; - FATFS *fs; - DWORD clst; - LBA_t sect; - FSIZE_t remain; - UINT rcnt, cc, csect; - BYTE *rbuff = (BYTE*)buff; - - - *br = 0; /* Clear read byte counter */ - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ - if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - remain = fp->obj.objsize - fp->fptr; - if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ - - for ( ; btr; /* Repeat until btr bytes read */ - btr -= rcnt, *br += rcnt, rbuff += rcnt, fp->fptr += rcnt) { - if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ - csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ - if (csect == 0) { /* On the cluster boundary? */ - if (fp->fptr == 0) { /* On the top of the file? */ - clst = fp->obj.sclust; /* Follow cluster chain from the origin */ - } else { /* Middle or end of the file */ -#if FF_USE_FASTSEEK - if (fp->cltbl) { - clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ - } else -#endif - { - clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */ - } - } - if (clst < 2) ABORT(fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - } - sect = clst2sect(fs, fp->clust); /* Get current sector */ - if (sect == 0) ABORT(fs, FR_INT_ERR); - sect += csect; - cc = btr / SS(fs); /* When remaining bytes >= sector size, */ - if (cc > 0) { /* Read maximum contiguous sectors directly */ - if (csect + cc > fs->csize) { /* Clip at cluster boundary */ - cc = fs->csize - csect; - } - if (disk_read(fs->pdrv, rbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR); -#if !FF_FS_READONLY && FF_FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */ -#if FF_FS_TINY - if (fs->wflag && fs->winsect - sect < cc) { - mem_cpy(rbuff + ((fs->winsect - sect) * SS(fs)), fs->win, SS(fs)); - } -#else - if ((fp->flag & FA_DIRTY) && fp->sect - sect < cc) { - mem_cpy(rbuff + ((fp->sect - sect) * SS(fs)), fp->buf, SS(fs)); - } -#endif -#endif - rcnt = SS(fs) * cc; /* Number of bytes transferred */ - continue; - } -#if !FF_FS_TINY - if (fp->sect != sect) { /* Load data sector if not in cache */ -#if !FF_FS_READONLY - if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */ - } -#endif - fp->sect = sect; - } - rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ - if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */ -#if FF_FS_TINY - if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */ - mem_cpy(rbuff, fs->win + fp->fptr % SS(fs), rcnt); /* Extract partial sector */ -#else - mem_cpy(rbuff, fp->buf + fp->fptr % SS(fs), rcnt); /* Extract partial sector */ -#endif - } - - LEAVE_FF(fs, FR_OK); -} - - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Write File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_write ( - FIL* fp, /* Pointer to the file object */ - const void* buff, /* Pointer to the data to be written */ - UINT btw, /* Number of bytes to write */ - UINT* bw /* Pointer to number of bytes written */ -) -{ - FRESULT res; - FATFS *fs; - DWORD clst; - LBA_t sect; - UINT wcnt, cc, csect; - const BYTE *wbuff = (const BYTE*)buff; - - - *bw = 0; /* Clear write byte counter */ - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ - if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - - /* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */ - if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) { - btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr); - } - - for ( ; btw; /* Repeat until all data written */ - btw -= wcnt, *bw += wcnt, wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize) { - if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ - csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */ - if (csect == 0) { /* On the cluster boundary? */ - if (fp->fptr == 0) { /* On the top of the file? */ - clst = fp->obj.sclust; /* Follow from the origin */ - if (clst == 0) { /* If no cluster is allocated, */ - clst = create_chain(&fp->obj, 0); /* create a new cluster chain */ - } - } else { /* On the middle or end of the file */ -#if FF_USE_FASTSEEK - if (fp->cltbl) { - clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ - } else -#endif - { - clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */ - } - } - if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ - if (clst == 1) ABORT(fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */ - } -#if FF_FS_TINY - if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */ -#else - if (fp->flag & FA_DIRTY) { /* Write-back sector cache */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - sect = clst2sect(fs, fp->clust); /* Get current sector */ - if (sect == 0) ABORT(fs, FR_INT_ERR); - sect += csect; - cc = btw / SS(fs); /* When remaining bytes >= sector size, */ - if (cc > 0) { /* Write maximum contiguous sectors directly */ - if (csect + cc > fs->csize) { /* Clip at cluster boundary */ - cc = fs->csize - csect; - } - if (disk_write(fs->pdrv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR); -#if FF_FS_MINIMIZE <= 2 -#if FF_FS_TINY - if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ - mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs)); - fs->wflag = 0; - } -#else - if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ - mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif -#endif - wcnt = SS(fs) * cc; /* Number of bytes transferred */ - continue; - } -#if FF_FS_TINY - if (fp->fptr >= fp->obj.objsize) { /* Avoid silly cache filling on the growing edge */ - if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); - fs->winsect = sect; - } -#else - if (fp->sect != sect && /* Fill sector cache with file data */ - fp->fptr < fp->obj.objsize && - disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) { - ABORT(fs, FR_DISK_ERR); - } -#endif - fp->sect = sect; - } - wcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ - if (wcnt > btw) wcnt = btw; /* Clip it by btw if needed */ -#if FF_FS_TINY - if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */ - mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */ - fs->wflag = 1; -#else - mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */ - fp->flag |= FA_DIRTY; -#endif - } - - fp->flag |= FA_MODIFIED; /* Set file change flag */ - - LEAVE_FF(fs, FR_OK); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Synchronize the File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_sync ( - FIL* fp /* Pointer to the file object */ -) -{ - FRESULT res; - FATFS *fs; - DWORD tm; - BYTE *dir; - - - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res == FR_OK) { - if (fp->flag & FA_MODIFIED) { /* Is there any change to the file? */ -#if !FF_FS_TINY - if (fp->flag & FA_DIRTY) { /* Write-back cached data if needed */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - /* Update the directory entry */ - tm = GET_FATTIME(); /* Modified time */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - res = fill_first_frag(&fp->obj); /* Fill first fragment on the FAT if needed */ - if (res == FR_OK) { - res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */ - } - if (res == FR_OK) { - DIR dj; - DEF_NAMBUF - - INIT_NAMBUF(fs); - res = load_obj_xdir(&dj, &fp->obj); /* Load directory entry block */ - if (res == FR_OK) { - fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */ - fs->dirbuf[XDIR_GenFlags] = fp->obj.stat | 1; /* Update file allocation information */ - st_dword(fs->dirbuf + XDIR_FstClus, fp->obj.sclust); /* Update start cluster */ - st_qword(fs->dirbuf + XDIR_FileSize, fp->obj.objsize); /* Update file size */ - st_qword(fs->dirbuf + XDIR_ValidFileSize, fp->obj.objsize); /* (FatFs does not support Valid File Size feature) */ - st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Update modified time */ - fs->dirbuf[XDIR_ModTime10] = 0; - st_dword(fs->dirbuf + XDIR_AccTime, 0); - res = store_xdir(&dj); /* Restore it to the directory */ - if (res == FR_OK) { - res = sync_fs(fs); - fp->flag &= (BYTE)~FA_MODIFIED; - } - } - FREE_NAMBUF(); - } - } else -#endif - { - res = move_window(fs, fp->dir_sect); - if (res == FR_OK) { - dir = fp->dir_ptr; - dir[DIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */ - st_clust(fp->obj.fs, dir, fp->obj.sclust); /* Update file allocation information */ - st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize); /* Update file size */ - st_dword(dir + DIR_ModTime, tm); /* Update modified time */ - st_word(dir + DIR_LstAccDate, 0); - fs->wflag = 1; - res = sync_fs(fs); /* Restore it to the directory */ - fp->flag &= (BYTE)~FA_MODIFIED; - } - } - } - } - - LEAVE_FF(fs, res); -} - -#endif /* !FF_FS_READONLY */ - - - - -/*-----------------------------------------------------------------------*/ -/* Close File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_close ( - FIL* fp /* Pointer to the file object to be closed */ -) -{ - FRESULT res; - FATFS *fs; - -#if !FF_FS_READONLY - res = f_sync(fp); /* Flush cached data */ - if (res == FR_OK) -#endif - { - res = validate(&fp->obj, &fs); /* Lock volume */ - if (res == FR_OK) { -#if FF_FS_LOCK != 0 - res = dec_lock(fp->obj.lockid); /* Decrement file open counter */ - if (res == FR_OK) fp->obj.fs = 0; /* Invalidate file object */ -#else - fp->obj.fs = 0; /* Invalidate file object */ -#endif -#if FF_FS_REENTRANT - unlock_fs(fs, FR_OK); /* Unlock volume */ -#endif - } - } - return res; -} - - - - -#if FF_FS_RPATH >= 1 -/*-----------------------------------------------------------------------*/ -/* Change Current Directory or Current Drive, Get Current Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_chdrive ( - const TCHAR* path /* Drive number to set */ -) -{ - int vol; - - - /* Get logical drive number */ - vol = get_ldnumber(&path); - if (vol < 0) return FR_INVALID_DRIVE; - CurrVol = (BYTE)vol; /* Set it as current volume */ - - return FR_OK; -} - - - -FRESULT f_chdir ( - const TCHAR* path /* Pointer to the directory path */ -) -{ -#if FF_STR_VOLUME_ID == 2 - UINT i; -#endif - FRESULT res; - DIR dj; - FATFS *fs; - DEF_NAMBUF - - - /* Get logical drive */ - res = mount_volume(&path, &fs, 0); - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the path */ - if (res == FR_OK) { /* Follow completed */ - if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it the start directory itself? */ - fs->cdir = dj.obj.sclust; -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - fs->cdc_scl = dj.obj.c_scl; - fs->cdc_size = dj.obj.c_size; - fs->cdc_ofs = dj.obj.c_ofs; - } -#endif - } else { - if (dj.obj.attr & AM_DIR) { /* It is a sub-directory */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - fs->cdir = ld_dword(fs->dirbuf + XDIR_FstClus); /* Sub-directory cluster */ - fs->cdc_scl = dj.obj.sclust; /* Save containing directory information */ - fs->cdc_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat; - fs->cdc_ofs = dj.blk_ofs; - } else -#endif - { - fs->cdir = ld_clust(fs, dj.dir); /* Sub-directory cluster */ - } - } else { - res = FR_NO_PATH; /* Reached but a file */ - } - } - } - FREE_NAMBUF(); - if (res == FR_NO_FILE) res = FR_NO_PATH; -#if FF_STR_VOLUME_ID == 2 /* Also current drive is changed at Unix style volume ID */ - if (res == FR_OK) { - for (i = FF_VOLUMES - 1; i && fs != FatFs[i]; i--) ; /* Set current drive */ - CurrVol = (BYTE)i; - } -#endif - } - - LEAVE_FF(fs, res); -} - - -#if FF_FS_RPATH >= 2 -FRESULT f_getcwd ( - TCHAR* buff, /* Pointer to the directory path */ - UINT len /* Size of buff in unit of TCHAR */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; - UINT i, n; - DWORD ccl; - TCHAR *tp = buff; -#if FF_VOLUMES >= 2 - UINT vl; -#if FF_STR_VOLUME_ID - const char *vp; -#endif -#endif - FILINFO fno; - DEF_NAMBUF - - - /* Get logical drive */ - buff[0] = 0; /* Set null string to get current volume */ - res = mount_volume((const TCHAR**)&buff, &fs, 0); /* Get current volume */ - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - - /* Follow parent directories and create the path */ - i = len; /* Bottom of buffer (directory stack base) */ - if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* (Cannot do getcwd on exFAT and returns root path) */ - dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */ - while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */ - res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */ - if (res != FR_OK) break; - res = move_window(fs, dj.sect); - if (res != FR_OK) break; - dj.obj.sclust = ld_clust(fs, dj.dir); /* Goto parent directory */ - res = dir_sdi(&dj, 0); - if (res != FR_OK) break; - do { /* Find the entry links to the child directory */ - res = DIR_READ_FILE(&dj); - if (res != FR_OK) break; - if (ccl == ld_clust(fs, dj.dir)) break; /* Found the entry */ - res = dir_next(&dj, 0); - } while (res == FR_OK); - if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */ - if (res != FR_OK) break; - get_fileinfo(&dj, &fno); /* Get the directory name and push it to the buffer */ - for (n = 0; fno.fname[n]; n++) ; /* Name length */ - if (i < n + 1) { /* Insufficient space to store the path name? */ - res = FR_NOT_ENOUGH_CORE; break; - } - while (n) buff[--i] = fno.fname[--n]; /* Stack the name */ - buff[--i] = '/'; - } - } - if (res == FR_OK) { - if (i == len) buff[--i] = '/'; /* Is it the root-directory? */ -#if FF_VOLUMES >= 2 /* Put drive prefix */ - vl = 0; -#if FF_STR_VOLUME_ID >= 1 /* String volume ID */ - for (n = 0, vp = (const char*)VolumeStr[CurrVol]; vp[n]; n++) ; - if (i >= n + 2) { - if (FF_STR_VOLUME_ID == 2) *tp++ = (TCHAR)'/'; - for (vl = 0; vl < n; *tp++ = (TCHAR)vp[vl], vl++) ; - if (FF_STR_VOLUME_ID == 1) *tp++ = (TCHAR)':'; - vl++; - } -#else /* Numeric volume ID */ - if (i >= 3) { - *tp++ = (TCHAR)'0' + CurrVol; - *tp++ = (TCHAR)':'; - vl = 2; - } -#endif - if (vl == 0) res = FR_NOT_ENOUGH_CORE; -#endif - /* Add current directory path */ - if (res == FR_OK) { - do *tp++ = buff[i++]; while (i < len); /* Copy stacked path string */ - } - } - FREE_NAMBUF(); - } - - *tp = 0; - LEAVE_FF(fs, res); -} - -#endif /* FF_FS_RPATH >= 2 */ -#endif /* FF_FS_RPATH >= 1 */ - - - -#if FF_FS_MINIMIZE <= 2 -/*-----------------------------------------------------------------------*/ -/* Seek File Read/Write Pointer */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_lseek ( - FIL* fp, /* Pointer to the file object */ - FSIZE_t ofs /* File pointer from top of file */ -) -{ - FRESULT res; - FATFS *fs; - DWORD clst, bcs; - LBA_t nsect; - FSIZE_t ifptr; -#if FF_USE_FASTSEEK - DWORD cl, pcl, ncl, tcl, tlen, ulen, *tbl; - LBA_t dsc; -#endif - - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res == FR_OK) res = (FRESULT)fp->err; -#if FF_FS_EXFAT && !FF_FS_READONLY - if (res == FR_OK && fs->fs_type == FS_EXFAT) { - res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */ - } -#endif - if (res != FR_OK) LEAVE_FF(fs, res); - -#if FF_USE_FASTSEEK - if (fp->cltbl) { /* Fast seek */ - if (ofs == CREATE_LINKMAP) { /* Create CLMT */ - tbl = fp->cltbl; - tlen = *tbl++; ulen = 2; /* Given table size and required table size */ - cl = fp->obj.sclust; /* Origin of the chain */ - if (cl != 0) { - do { - /* Get a fragment */ - tcl = cl; ncl = 0; ulen += 2; /* Top, length and used items */ - do { - pcl = cl; ncl++; - cl = get_fat(&fp->obj, cl); - if (cl <= 1) ABORT(fs, FR_INT_ERR); - if (cl == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - } while (cl == pcl + 1); - if (ulen <= tlen) { /* Store the length and top of the fragment */ - *tbl++ = ncl; *tbl++ = tcl; - } - } while (cl < fs->n_fatent); /* Repeat until end of chain */ - } - *fp->cltbl = ulen; /* Number of items used */ - if (ulen <= tlen) { - *tbl = 0; /* Terminate table */ - } else { - res = FR_NOT_ENOUGH_CORE; /* Given table size is smaller than required */ - } - } else { /* Fast seek */ - if (ofs > fp->obj.objsize) ofs = fp->obj.objsize; /* Clip offset at the file size */ - fp->fptr = ofs; /* Set file pointer */ - if (ofs > 0) { - fp->clust = clmt_clust(fp, ofs - 1); - dsc = clst2sect(fs, fp->clust); - if (dsc == 0) ABORT(fs, FR_INT_ERR); - dsc += (DWORD)((ofs - 1) / SS(fs)) & (fs->csize - 1); - if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ -#if !FF_FS_TINY -#if !FF_FS_READONLY - if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - if (disk_read(fs->pdrv, fp->buf, dsc, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Load current sector */ -#endif - fp->sect = dsc; - } - } - } - } else -#endif - - /* Normal Seek */ - { -#if FF_FS_EXFAT - if (fs->fs_type != FS_EXFAT && ofs >= 0x100000000) ofs = 0xFFFFFFFF; /* Clip at 4 GiB - 1 if at FATxx */ -#endif - if (ofs > fp->obj.objsize && (FF_FS_READONLY || !(fp->flag & FA_WRITE))) { /* In read-only mode, clip offset with the file size */ - ofs = fp->obj.objsize; - } - ifptr = fp->fptr; - fp->fptr = nsect = 0; - if (ofs > 0) { - bcs = (DWORD)fs->csize * SS(fs); /* Cluster size (byte) */ - if (ifptr > 0 && - (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ - fp->fptr = (ifptr - 1) & ~(FSIZE_t)(bcs - 1); /* start from the current cluster */ - ofs -= fp->fptr; - clst = fp->clust; - } else { /* When seek to back cluster, */ - clst = fp->obj.sclust; /* start from the first cluster */ -#if !FF_FS_READONLY - if (clst == 0) { /* If no cluster chain, create a new chain */ - clst = create_chain(&fp->obj, 0); - if (clst == 1) ABORT(fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - fp->obj.sclust = clst; - } -#endif - fp->clust = clst; - } - if (clst != 0) { - while (ofs > bcs) { /* Cluster following loop */ - ofs -= bcs; fp->fptr += bcs; -#if !FF_FS_READONLY - if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ - if (FF_FS_EXFAT && fp->fptr > fp->obj.objsize) { /* No FAT chain object needs correct objsize to generate FAT value */ - fp->obj.objsize = fp->fptr; - fp->flag |= FA_MODIFIED; - } - clst = create_chain(&fp->obj, clst); /* Follow chain with forceed stretch */ - if (clst == 0) { /* Clip file size in case of disk full */ - ofs = 0; break; - } - } else -#endif - { - clst = get_fat(&fp->obj, clst); /* Follow cluster chain if not in write mode */ - } - if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - if (clst <= 1 || clst >= fs->n_fatent) ABORT(fs, FR_INT_ERR); - fp->clust = clst; - } - fp->fptr += ofs; - if (ofs % SS(fs)) { - nsect = clst2sect(fs, clst); /* Current sector */ - if (nsect == 0) ABORT(fs, FR_INT_ERR); - nsect += (DWORD)(ofs / SS(fs)); - } - } - } - if (!FF_FS_READONLY && fp->fptr > fp->obj.objsize) { /* Set file change flag if the file size is extended */ - fp->obj.objsize = fp->fptr; - fp->flag |= FA_MODIFIED; - } - if (fp->fptr % SS(fs) && nsect != fp->sect) { /* Fill sector cache if needed */ -#if !FF_FS_TINY -#if !FF_FS_READONLY - if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - if (disk_read(fs->pdrv, fp->buf, nsect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */ -#endif - fp->sect = nsect; - } - } - - LEAVE_FF(fs, res); -} - - - -#if FF_FS_MINIMIZE <= 1 -/*-----------------------------------------------------------------------*/ -/* Create a Directory Object */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_opendir ( - DIR* dp, /* Pointer to directory object to create */ - const TCHAR* path /* Pointer to the directory path */ -) -{ - FRESULT res; - FATFS *fs; - DEF_NAMBUF - - - if (!dp) return FR_INVALID_OBJECT; - - /* Get logical drive */ - res = mount_volume(&path, &fs, 0); - if (res == FR_OK) { - dp->obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(dp, path); /* Follow the path to the directory */ - if (res == FR_OK) { /* Follow completed */ - if (!(dp->fn[NSFLAG] & NS_NONAME)) { /* It is not the origin directory itself */ - if (dp->obj.attr & AM_DIR) { /* This object is a sub-directory */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - dp->obj.c_scl = dp->obj.sclust; /* Get containing directory inforamation */ - dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat; - dp->obj.c_ofs = dp->blk_ofs; - init_alloc_info(fs, &dp->obj); /* Get object allocation info */ - } else -#endif - { - dp->obj.sclust = ld_clust(fs, dp->dir); /* Get object allocation info */ - } - } else { /* This object is a file */ - res = FR_NO_PATH; - } - } - if (res == FR_OK) { - dp->obj.id = fs->id; - res = dir_sdi(dp, 0); /* Rewind directory */ -#if FF_FS_LOCK != 0 - if (res == FR_OK) { - if (dp->obj.sclust != 0) { - dp->obj.lockid = inc_lock(dp, 0); /* Lock the sub directory */ - if (!dp->obj.lockid) res = FR_TOO_MANY_OPEN_FILES; - } else { - dp->obj.lockid = 0; /* Root directory need not to be locked */ - } - } -#endif - } - } - FREE_NAMBUF(); - if (res == FR_NO_FILE) res = FR_NO_PATH; - } - if (res != FR_OK) dp->obj.fs = 0; /* Invalidate the directory object if function faild */ - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Close Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_closedir ( - DIR *dp /* Pointer to the directory object to be closed */ -) -{ - FRESULT res; - FATFS *fs; - - - res = validate(&dp->obj, &fs); /* Check validity of the file object */ - if (res == FR_OK) { -#if FF_FS_LOCK != 0 - if (dp->obj.lockid) res = dec_lock(dp->obj.lockid); /* Decrement sub-directory open counter */ - if (res == FR_OK) dp->obj.fs = 0; /* Invalidate directory object */ -#else - dp->obj.fs = 0; /* Invalidate directory object */ -#endif -#if FF_FS_REENTRANT - unlock_fs(fs, FR_OK); /* Unlock volume */ -#endif - } - return res; -} - - - - -/*-----------------------------------------------------------------------*/ -/* Read Directory Entries in Sequence */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_readdir ( - DIR* dp, /* Pointer to the open directory object */ - FILINFO* fno /* Pointer to file information to return */ -) -{ - FRESULT res; - FATFS *fs; - DEF_NAMBUF - - - res = validate(&dp->obj, &fs); /* Check validity of the directory object */ - if (res == FR_OK) { - if (!fno) { - res = dir_sdi(dp, 0); /* Rewind the directory object */ - } else { - INIT_NAMBUF(fs); - res = DIR_READ_FILE(dp); /* Read an item */ - if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory */ - if (res == FR_OK) { /* A valid entry is found */ - get_fileinfo(dp, fno); /* Get the object information */ - res = dir_next(dp, 0); /* Increment index for next */ - if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */ - } - FREE_NAMBUF(); - } - } - LEAVE_FF(fs, res); -} - - - -#if FF_USE_FIND -/*-----------------------------------------------------------------------*/ -/* Find Next File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_findnext ( - DIR* dp, /* Pointer to the open directory object */ - FILINFO* fno /* Pointer to the file information structure */ -) -{ - FRESULT res; - - - for (;;) { - res = f_readdir(dp, fno); /* Get a directory item */ - if (res != FR_OK || !fno || !fno->fname[0]) break; /* Terminate if any error or end of directory */ - if (pattern_matching(dp->pat, fno->fname, 0, 0)) break; /* Test for the file name */ -#if FF_USE_LFN && FF_USE_FIND == 2 - if (pattern_matching(dp->pat, fno->altname, 0, 0)) break; /* Test for alternative name if exist */ -#endif - } - return res; -} - - - -/*-----------------------------------------------------------------------*/ -/* Find First File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_findfirst ( - DIR* dp, /* Pointer to the blank directory object */ - FILINFO* fno, /* Pointer to the file information structure */ - const TCHAR* path, /* Pointer to the directory to open */ - const TCHAR* pattern /* Pointer to the matching pattern */ -) -{ - FRESULT res; - - - dp->pat = pattern; /* Save pointer to pattern string */ - res = f_opendir(dp, path); /* Open the target directory */ - if (res == FR_OK) { - res = f_findnext(dp, fno); /* Find the first item */ - } - return res; -} - -#endif /* FF_USE_FIND */ - - - -#if FF_FS_MINIMIZE == 0 -/*-----------------------------------------------------------------------*/ -/* Get File Status */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_stat ( - const TCHAR* path, /* Pointer to the file path */ - FILINFO* fno /* Pointer to file information to return */ -) -{ - FRESULT res; - DIR dj; - DEF_NAMBUF - - - /* Get logical drive */ - res = mount_volume(&path, &dj.obj.fs, 0); - if (res == FR_OK) { - INIT_NAMBUF(dj.obj.fs); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK) { /* Follow completed */ - if (dj.fn[NSFLAG] & NS_NONAME) { /* It is origin directory */ - res = FR_INVALID_NAME; - } else { /* Found an object */ - if (fno) get_fileinfo(&dj, fno); - } - } - FREE_NAMBUF(); - } - - LEAVE_FF(dj.obj.fs, res); -} - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Get Number of Free Clusters */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_getfree ( - const TCHAR* path, /* Logical drive number */ - DWORD* nclst, /* Pointer to a variable to return number of free clusters */ - FATFS** fatfs /* Pointer to return pointer to corresponding filesystem object */ -) -{ - FRESULT res; - FATFS *fs; - DWORD nfree, clst, stat; - LBA_t sect; - UINT i; - FFOBJID obj; - - - /* Get logical drive */ - res = mount_volume(&path, &fs, 0); - if (res == FR_OK) { - *fatfs = fs; /* Return ptr to the fs object */ - /* If free_clst is valid, return it without full FAT scan */ - if (fs->free_clst <= fs->n_fatent - 2) { - *nclst = fs->free_clst; - } else { - /* Scan FAT to obtain number of free clusters */ - nfree = 0; - if (fs->fs_type == FS_FAT12) { /* FAT12: Scan bit field FAT entries */ - clst = 2; obj.fs = fs; - do { - stat = get_fat(&obj, clst); - if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } - if (stat == 1) { res = FR_INT_ERR; break; } - if (stat == 0) nfree++; - } while (++clst < fs->n_fatent); - } else { -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* exFAT: Scan allocation bitmap */ - BYTE bm; - UINT b; - - clst = fs->n_fatent - 2; /* Number of clusters */ - sect = fs->bitbase; /* Bitmap sector */ - i = 0; /* Offset in the sector */ - do { /* Counts numbuer of bits with zero in the bitmap */ - if (i == 0) { - res = move_window(fs, sect++); - if (res != FR_OK) break; - } - for (b = 8, bm = fs->win[i]; b && clst; b--, clst--) { - if (!(bm & 1)) nfree++; - bm >>= 1; - } - i = (i + 1) % SS(fs); - } while (clst); - } else -#endif - { /* FAT16/32: Scan WORD/DWORD FAT entries */ - clst = fs->n_fatent; /* Number of entries */ - sect = fs->fatbase; /* Top of the FAT */ - i = 0; /* Offset in the sector */ - do { /* Counts numbuer of entries with zero in the FAT */ - if (i == 0) { - res = move_window(fs, sect++); - if (res != FR_OK) break; - } - if (fs->fs_type == FS_FAT16) { - if (ld_word(fs->win + i) == 0) nfree++; - i += 2; - } else { - if ((ld_dword(fs->win + i) & 0x0FFFFFFF) == 0) nfree++; - i += 4; - } - i %= SS(fs); - } while (--clst); - } - } - *nclst = nfree; /* Return the free clusters */ - fs->free_clst = nfree; /* Now free_clst is valid */ - fs->fsi_flag |= 1; /* FAT32: FSInfo is to be updated */ - } - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Truncate File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_truncate ( - FIL* fp /* Pointer to the file object */ -) -{ - FRESULT res; - FATFS *fs; - DWORD ncl; - - - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); - if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - - if (fp->fptr < fp->obj.objsize) { /* Process when fptr is not on the eof */ - if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ - res = remove_chain(&fp->obj, fp->obj.sclust, 0); - fp->obj.sclust = 0; - } else { /* When truncate a part of the file, remove remaining clusters */ - ncl = get_fat(&fp->obj, fp->clust); - res = FR_OK; - if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; - if (ncl == 1) res = FR_INT_ERR; - if (res == FR_OK && ncl < fs->n_fatent) { - res = remove_chain(&fp->obj, ncl, fp->clust); - } - } - fp->obj.objsize = fp->fptr; /* Set file size to current read/write point */ - fp->flag |= FA_MODIFIED; -#if !FF_FS_TINY - if (res == FR_OK && (fp->flag & FA_DIRTY)) { - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) { - res = FR_DISK_ERR; - } else { - fp->flag &= (BYTE)~FA_DIRTY; - } - } -#endif - if (res != FR_OK) ABORT(fs, res); - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Delete a File/Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_unlink ( - const TCHAR* path /* Pointer to the file or directory path */ -) -{ - FRESULT res; - DIR dj, sdj; - DWORD dclst = 0; - FATFS *fs; -#if FF_FS_EXFAT - FFOBJID obj; -#endif - DEF_NAMBUF - - - /* Get logical drive */ - res = mount_volume(&path, &fs, FA_WRITE); - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the file path */ - if (FF_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT)) { - res = FR_INVALID_NAME; /* Cannot remove dot entry */ - } -#if FF_FS_LOCK != 0 - if (res == FR_OK) res = chk_lock(&dj, 2); /* Check if it is an open object */ -#endif - if (res == FR_OK) { /* The object is accessible */ - if (dj.fn[NSFLAG] & NS_NONAME) { - res = FR_INVALID_NAME; /* Cannot remove the origin directory */ - } else { - if (dj.obj.attr & AM_RDO) { - res = FR_DENIED; /* Cannot remove R/O object */ - } - } - if (res == FR_OK) { -#if FF_FS_EXFAT - obj.fs = fs; - if (fs->fs_type == FS_EXFAT) { - init_alloc_info(fs, &obj); - dclst = obj.sclust; - } else -#endif - { - dclst = ld_clust(fs, dj.dir); - } - if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */ -#if FF_FS_RPATH != 0 - if (dclst == fs->cdir) { /* Is it the current directory? */ - res = FR_DENIED; - } else -#endif - { - sdj.obj.fs = fs; /* Open the sub-directory */ - sdj.obj.sclust = dclst; -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - sdj.obj.objsize = obj.objsize; - sdj.obj.stat = obj.stat; - } -#endif - res = dir_sdi(&sdj, 0); - if (res == FR_OK) { - res = DIR_READ_FILE(&sdj); /* Test if the directory is empty */ - if (res == FR_OK) res = FR_DENIED; /* Not empty? */ - if (res == FR_NO_FILE) res = FR_OK; /* Empty? */ - } - } - } - } - if (res == FR_OK) { - res = dir_remove(&dj); /* Remove the directory entry */ - if (res == FR_OK && dclst != 0) { /* Remove the cluster chain if exist */ -#if FF_FS_EXFAT - res = remove_chain(&obj, dclst, 0); -#else - res = remove_chain(&dj.obj, dclst, 0); -#endif - } - if (res == FR_OK) res = sync_fs(fs); - } - } - FREE_NAMBUF(); - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Create a Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_mkdir ( - const TCHAR* path /* Pointer to the directory path */ -) -{ - FRESULT res; - DIR dj; - FFOBJID sobj; - FATFS *fs; - DWORD dcl, pcl, tm; - DEF_NAMBUF - - - res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK) res = FR_EXIST; /* Name collision? */ - if (FF_FS_RPATH && res == FR_NO_FILE && (dj.fn[NSFLAG] & NS_DOT)) { /* Invalid name? */ - res = FR_INVALID_NAME; - } - if (res == FR_NO_FILE) { /* It is clear to create a new directory */ - sobj.fs = fs; /* New object id to create a new chain */ - dcl = create_chain(&sobj, 0); /* Allocate a cluster for the new directory */ - res = FR_OK; - if (dcl == 0) res = FR_DENIED; /* No space to allocate a new cluster? */ - if (dcl == 1) res = FR_INT_ERR; /* Any insanity? */ - if (dcl == 0xFFFFFFFF) res = FR_DISK_ERR; /* Disk error? */ - tm = GET_FATTIME(); - if (res == FR_OK) { - res = dir_clear(fs, dcl); /* Clean up the new table */ - if (res == FR_OK) { - if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* Create dot entries (FAT only) */ - mem_set(fs->win + DIR_Name, ' ', 11); /* Create "." entry */ - fs->win[DIR_Name] = '.'; - fs->win[DIR_Attr] = AM_DIR; - st_dword(fs->win + DIR_ModTime, tm); - st_clust(fs, fs->win, dcl); - mem_cpy(fs->win + SZDIRE, fs->win, SZDIRE); /* Create ".." entry */ - fs->win[SZDIRE + 1] = '.'; pcl = dj.obj.sclust; - st_clust(fs, fs->win + SZDIRE, pcl); - fs->wflag = 1; - } - res = dir_register(&dj); /* Register the object to the parent directoy */ - } - } - if (res == FR_OK) { -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* Initialize directory entry block */ - st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Created time */ - st_dword(fs->dirbuf + XDIR_FstClus, dcl); /* Table start cluster */ - st_dword(fs->dirbuf + XDIR_FileSize, (DWORD)fs->csize * SS(fs)); /* Directory size needs to be valid */ - st_dword(fs->dirbuf + XDIR_ValidFileSize, (DWORD)fs->csize * SS(fs)); - fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag */ - fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */ - res = store_xdir(&dj); - } else -#endif - { - st_dword(dj.dir + DIR_ModTime, tm); /* Created time */ - st_clust(fs, dj.dir, dcl); /* Table start cluster */ - dj.dir[DIR_Attr] = AM_DIR; /* Attribute */ - fs->wflag = 1; - } - if (res == FR_OK) { - res = sync_fs(fs); - } - } else { - remove_chain(&sobj, dcl, 0); /* Could not register, remove the allocated cluster */ - } - } - FREE_NAMBUF(); - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Rename a File/Directory */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_rename ( - const TCHAR* path_old, /* Pointer to the object name to be renamed */ - const TCHAR* path_new /* Pointer to the new name */ -) -{ - FRESULT res; - DIR djo, djn; - FATFS *fs; - BYTE buf[FF_FS_EXFAT ? SZDIRE * 2 : SZDIRE], *dir; - LBA_t sect; - DEF_NAMBUF - - - get_ldnumber(&path_new); /* Snip the drive number of new name off */ - res = mount_volume(&path_old, &fs, FA_WRITE); /* Get logical drive of the old object */ - if (res == FR_OK) { - djo.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&djo, path_old); /* Check old object */ - if (res == FR_OK && (djo.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check validity of name */ -#if FF_FS_LOCK != 0 - if (res == FR_OK) { - res = chk_lock(&djo, 2); - } -#endif - if (res == FR_OK) { /* Object to be renamed is found */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* At exFAT volume */ - BYTE nf, nn; - WORD nh; - - mem_cpy(buf, fs->dirbuf, SZDIRE * 2); /* Save 85+C0 entry of old object */ - mem_cpy(&djn, &djo, sizeof djo); - res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */ - if (res == FR_OK) { /* Is new name already in use by any other object? */ - res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST; - } - if (res == FR_NO_FILE) { /* It is a valid path and no name collision */ - res = dir_register(&djn); /* Register the new entry */ - if (res == FR_OK) { - nf = fs->dirbuf[XDIR_NumSec]; nn = fs->dirbuf[XDIR_NumName]; - nh = ld_word(fs->dirbuf + XDIR_NameHash); - mem_cpy(fs->dirbuf, buf, SZDIRE * 2); /* Restore 85+C0 entry */ - fs->dirbuf[XDIR_NumSec] = nf; fs->dirbuf[XDIR_NumName] = nn; - st_word(fs->dirbuf + XDIR_NameHash, nh); - if (!(fs->dirbuf[XDIR_Attr] & AM_DIR)) fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */ -/* Start of critical section where an interruption can cause a cross-link */ - res = store_xdir(&djn); - } - } - } else -#endif - { /* At FAT/FAT32 volume */ - mem_cpy(buf, djo.dir, SZDIRE); /* Save directory entry of the object */ - mem_cpy(&djn, &djo, sizeof (DIR)); /* Duplicate the directory object */ - res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */ - if (res == FR_OK) { /* Is new name already in use by any other object? */ - res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST; - } - if (res == FR_NO_FILE) { /* It is a valid path and no name collision */ - res = dir_register(&djn); /* Register the new entry */ - if (res == FR_OK) { - dir = djn.dir; /* Copy directory entry of the object except name */ - mem_cpy(dir + 13, buf + 13, SZDIRE - 13); - dir[DIR_Attr] = buf[DIR_Attr]; - if (!(dir[DIR_Attr] & AM_DIR)) dir[DIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */ - fs->wflag = 1; - if ((dir[DIR_Attr] & AM_DIR) && djo.obj.sclust != djn.obj.sclust) { /* Update .. entry in the sub-directory if needed */ - sect = clst2sect(fs, ld_clust(fs, dir)); - if (sect == 0) { - res = FR_INT_ERR; - } else { -/* Start of critical section where an interruption can cause a cross-link */ - res = move_window(fs, sect); - dir = fs->win + SZDIRE * 1; /* Ptr to .. entry */ - if (res == FR_OK && dir[1] == '.') { - st_clust(fs, dir, djn.obj.sclust); - fs->wflag = 1; - } - } - } - } - } - } - if (res == FR_OK) { - res = dir_remove(&djo); /* Remove old entry */ - if (res == FR_OK) { - res = sync_fs(fs); - } - } -/* End of the critical section */ - } - FREE_NAMBUF(); - } - - LEAVE_FF(fs, res); -} - -#endif /* !FF_FS_READONLY */ -#endif /* FF_FS_MINIMIZE == 0 */ -#endif /* FF_FS_MINIMIZE <= 1 */ -#endif /* FF_FS_MINIMIZE <= 2 */ - - - -#if FF_USE_CHMOD && !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Change Attribute */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_chmod ( - const TCHAR* path, /* Pointer to the file path */ - BYTE attr, /* Attribute bits */ - BYTE mask /* Attribute mask to change */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; - DEF_NAMBUF - - - res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */ - if (res == FR_OK) { - mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - fs->dirbuf[XDIR_Attr] = (attr & mask) | (fs->dirbuf[XDIR_Attr] & (BYTE)~mask); /* Apply attribute change */ - res = store_xdir(&dj); - } else -#endif - { - dj.dir[DIR_Attr] = (attr & mask) | (dj.dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */ - fs->wflag = 1; - } - if (res == FR_OK) { - res = sync_fs(fs); - } - } - FREE_NAMBUF(); - } - - LEAVE_FF(fs, res); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Change Timestamp */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_utime ( - const TCHAR* path, /* Pointer to the file/directory name */ - const FILINFO* fno /* Pointer to the timestamp to be set */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; - DEF_NAMBUF - - - res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ - if (res == FR_OK) { - dj.obj.fs = fs; - INIT_NAMBUF(fs); - res = follow_path(&dj, path); /* Follow the file path */ - if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */ - if (res == FR_OK) { -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - st_dword(fs->dirbuf + XDIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime); - res = store_xdir(&dj); - } else -#endif - { - st_dword(dj.dir + DIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime); - fs->wflag = 1; - } - if (res == FR_OK) { - res = sync_fs(fs); - } - } - FREE_NAMBUF(); - } - - LEAVE_FF(fs, res); -} - -#endif /* FF_USE_CHMOD && !FF_FS_READONLY */ - - - -#if FF_USE_LABEL -/*-----------------------------------------------------------------------*/ -/* Get Volume Label */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_getlabel ( - const TCHAR* path, /* Logical drive number */ - TCHAR* label, /* Buffer to store the volume label */ - DWORD* vsn /* Variable to store the volume serial number */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; - UINT si, di; - WCHAR wc; - - /* Get logical drive */ - res = mount_volume(&path, &fs, 0); - - /* Get volume label */ - if (res == FR_OK && label) { - dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */ - res = dir_sdi(&dj, 0); - if (res == FR_OK) { - res = DIR_READ_LABEL(&dj); /* Find a volume label entry */ - if (res == FR_OK) { -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - WCHAR hs; - - for (si = di = hs = 0; si < dj.dir[XDIR_NumLabel]; si++) { /* Extract volume label from 83 entry */ - wc = ld_word(dj.dir + XDIR_Label + si * 2); - if (hs == 0 && IsSurrogate(wc)) { /* Is the code a surrogate? */ - hs = wc; continue; - } - wc = put_utf((DWORD)hs << 16 | wc, &label[di], 4); - if (wc == 0) { di = 0; break; } - di += wc; - hs = 0; - } - if (hs != 0) di = 0; /* Broken surrogate pair? */ - label[di] = 0; - } else -#endif - { - si = di = 0; /* Extract volume label from AM_VOL entry */ - while (si < 11) { - wc = dj.dir[si++]; -#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode output */ - if (dbc_1st((BYTE)wc) && si < 11) wc = wc << 8 | dj.dir[si++]; /* Is it a DBC? */ - wc = ff_oem2uni(wc, CODEPAGE); /* Convert it into Unicode */ - if (wc != 0) wc = put_utf(wc, &label[di], 4); /* Put it in Unicode */ - if (wc == 0) { di = 0; break; } - di += wc; -#else /* ANSI/OEM output */ - label[di++] = (TCHAR)wc; -#endif - } - do { /* Truncate trailing spaces */ - label[di] = 0; - if (di == 0) break; - } while (label[--di] == ' '); - } - } - } - if (res == FR_NO_FILE) { /* No label entry and return nul string */ - label[0] = 0; - res = FR_OK; - } - } - - /* Get volume serial number */ - if (res == FR_OK && vsn) { - res = move_window(fs, fs->volbase); - if (res == FR_OK) { - switch (fs->fs_type) { - case FS_EXFAT: - di = BPB_VolIDEx; break; - - case FS_FAT32: - di = BS_VolID32; break; - - default: - di = BS_VolID; - } - *vsn = ld_dword(fs->win + di); - } - } - - LEAVE_FF(fs, res); -} - - - -#if !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Set Volume Label */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_setlabel ( - const TCHAR* label /* Volume label to set with heading logical drive number */ -) -{ - FRESULT res; - DIR dj; - FATFS *fs; - BYTE dirvn[22]; - UINT di; - WCHAR wc; - static const char badchr[] = "+.,;=[]/\\\"*:<>\?|\x7F"; /* [0..] for FAT, [7..] for exFAT */ -#if FF_USE_LFN - DWORD dc; -#endif - - /* Get logical drive */ - res = mount_volume(&label, &fs, FA_WRITE); - if (res != FR_OK) LEAVE_FF(fs, res); - -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ - mem_set(dirvn, 0, 22); - di = 0; - while ((UINT)*label >= ' ') { /* Create volume label */ - dc = tchar2uni(&label); /* Get a Unicode character */ - if (dc >= 0x10000) { - if (dc == 0xFFFFFFFF || di >= 10) { /* Wrong surrogate or buffer overflow */ - dc = 0; - } else { - st_word(dirvn + di * 2, (WCHAR)(dc >> 16)); di++; - } - } - if (dc == 0 || chk_chr(badchr + 7, (int)dc) || di >= 11) { /* Check validity of the volume label */ - LEAVE_FF(fs, FR_INVALID_NAME); - } - st_word(dirvn + di * 2, (WCHAR)dc); di++; - } - } else -#endif - { /* On the FAT/FAT32 volume */ - mem_set(dirvn, ' ', 11); - di = 0; - while ((UINT)*label >= ' ') { /* Create volume label */ -#if FF_USE_LFN - dc = tchar2uni(&label); - wc = (dc < 0x10000) ? ff_uni2oem(ff_wtoupper(dc), CODEPAGE) : 0; -#else /* ANSI/OEM input */ - wc = (BYTE)*label++; - if (dbc_1st((BYTE)wc)) wc = dbc_2nd((BYTE)*label) ? wc << 8 | (BYTE)*label++ : 0; - if (IsLower(wc)) wc -= 0x20; /* To upper ASCII characters */ -#if FF_CODE_PAGE == 0 - if (ExCvt && wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */ -#elif FF_CODE_PAGE < 900 - if (wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */ -#endif -#endif - if (wc == 0 || chk_chr(badchr + 0, (int)wc) || di >= (UINT)((wc >= 0x100) ? 10 : 11)) { /* Reject invalid characters for volume label */ - LEAVE_FF(fs, FR_INVALID_NAME); - } - if (wc >= 0x100) dirvn[di++] = (BYTE)(wc >> 8); - dirvn[di++] = (BYTE)wc; - } - if (dirvn[0] == DDEM) LEAVE_FF(fs, FR_INVALID_NAME); /* Reject illegal name (heading DDEM) */ - while (di && dirvn[di - 1] == ' ') di--; /* Snip trailing spaces */ - } - - /* Set volume label */ - dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */ - res = dir_sdi(&dj, 0); - if (res == FR_OK) { - res = DIR_READ_LABEL(&dj); /* Get volume label entry */ - if (res == FR_OK) { - if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { - dj.dir[XDIR_NumLabel] = (BYTE)di; /* Change the volume label */ - mem_cpy(dj.dir + XDIR_Label, dirvn, 22); - } else { - if (di != 0) { - mem_cpy(dj.dir, dirvn, 11); /* Change the volume label */ - } else { - dj.dir[DIR_Name] = DDEM; /* Remove the volume label */ - } - } - fs->wflag = 1; - res = sync_fs(fs); - } else { /* No volume label entry or an error */ - if (res == FR_NO_FILE) { - res = FR_OK; - if (di != 0) { /* Create a volume label entry */ - res = dir_alloc(&dj, 1); /* Allocate an entry */ - if (res == FR_OK) { - mem_set(dj.dir, 0, SZDIRE); /* Clean the entry */ - if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { - dj.dir[XDIR_Type] = ET_VLABEL; /* Create volume label entry */ - dj.dir[XDIR_NumLabel] = (BYTE)di; - mem_cpy(dj.dir + XDIR_Label, dirvn, 22); - } else { - dj.dir[DIR_Attr] = AM_VOL; /* Create volume label entry */ - mem_cpy(dj.dir, dirvn, 11); - } - fs->wflag = 1; - res = sync_fs(fs); - } - } - } - } - } - - LEAVE_FF(fs, res); -} - -#endif /* !FF_FS_READONLY */ -#endif /* FF_USE_LABEL */ - - - -#if FF_USE_EXPAND && !FF_FS_READONLY -/*-----------------------------------------------------------------------*/ -/* Allocate a Contiguous Blocks to the File */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_expand ( - FIL* fp, /* Pointer to the file object */ - FSIZE_t fsz, /* File size to be expanded to */ - BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */ -) -{ - FRESULT res; - FATFS *fs; - DWORD n, clst, stcl, scl, ncl, tcl, lclst; - - - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); - if (fsz == 0 || fp->obj.objsize != 0 || !(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); -#if FF_FS_EXFAT - if (fs->fs_type != FS_EXFAT && fsz >= 0x100000000) LEAVE_FF(fs, FR_DENIED); /* Check if in size limit */ -#endif - n = (DWORD)fs->csize * SS(fs); /* Cluster size */ - tcl = (DWORD)(fsz / n) + ((fsz & (n - 1)) ? 1 : 0); /* Number of clusters required */ - stcl = fs->last_clst; lclst = 0; - if (stcl < 2 || stcl >= fs->n_fatent) stcl = 2; - -#if FF_FS_EXFAT - if (fs->fs_type == FS_EXFAT) { - scl = find_bitmap(fs, stcl, tcl); /* Find a contiguous cluster block */ - if (scl == 0) res = FR_DENIED; /* No contiguous cluster block was found */ - if (scl == 0xFFFFFFFF) res = FR_DISK_ERR; - if (res == FR_OK) { /* A contiguous free area is found */ - if (opt) { /* Allocate it now */ - res = change_bitmap(fs, scl, tcl, 1); /* Mark the cluster block 'in use' */ - lclst = scl + tcl - 1; - } else { /* Set it as suggested point for next allocation */ - lclst = scl - 1; - } - } - } else -#endif - { - scl = clst = stcl; ncl = 0; - for (;;) { /* Find a contiguous cluster block */ - n = get_fat(&fp->obj, clst); - if (++clst >= fs->n_fatent) clst = 2; - if (n == 1) { res = FR_INT_ERR; break; } - if (n == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } - if (n == 0) { /* Is it a free cluster? */ - if (++ncl == tcl) break; /* Break if a contiguous cluster block is found */ - } else { - scl = clst; ncl = 0; /* Not a free cluster */ - } - if (clst == stcl) { res = FR_DENIED; break; } /* No contiguous cluster? */ - } - if (res == FR_OK) { /* A contiguous free area is found */ - if (opt) { /* Allocate it now */ - for (clst = scl, n = tcl; n; clst++, n--) { /* Create a cluster chain on the FAT */ - res = put_fat(fs, clst, (n == 1) ? 0xFFFFFFFF : clst + 1); - if (res != FR_OK) break; - lclst = clst; - } - } else { /* Set it as suggested point for next allocation */ - lclst = scl - 1; - } - } - } - - if (res == FR_OK) { - fs->last_clst = lclst; /* Set suggested start cluster to start next */ - if (opt) { /* Is it allocated now? */ - fp->obj.sclust = scl; /* Update object allocation information */ - fp->obj.objsize = fsz; - if (FF_FS_EXFAT) fp->obj.stat = 2; /* Set status 'contiguous chain' */ - fp->flag |= FA_MODIFIED; - if (fs->free_clst <= fs->n_fatent - 2) { /* Update FSINFO */ - fs->free_clst -= tcl; - fs->fsi_flag |= 1; - } - } - } - - LEAVE_FF(fs, res); -} - -#endif /* FF_USE_EXPAND && !FF_FS_READONLY */ - - - -#if FF_USE_FORWARD -/*-----------------------------------------------------------------------*/ -/* Forward Data to the Stream Directly */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_forward ( - FIL* fp, /* Pointer to the file object */ - UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */ - UINT btf, /* Number of bytes to forward */ - UINT* bf /* Pointer to number of bytes forwarded */ -) -{ - FRESULT res; - FATFS *fs; - DWORD clst; - LBA_t sect; - FSIZE_t remain; - UINT rcnt, csect; - BYTE *dbuf; - - - *bf = 0; /* Clear transfer byte counter */ - res = validate(&fp->obj, &fs); /* Check validity of the file object */ - if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); - if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ - - remain = fp->obj.objsize - fp->fptr; - if (btf > remain) btf = (UINT)remain; /* Truncate btf by remaining bytes */ - - for ( ; btf && (*func)(0, 0); /* Repeat until all data transferred or stream goes busy */ - fp->fptr += rcnt, *bf += rcnt, btf -= rcnt) { - csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ - if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ - if (csect == 0) { /* On the cluster boundary? */ - clst = (fp->fptr == 0) ? /* On the top of the file? */ - fp->obj.sclust : get_fat(&fp->obj, fp->clust); - if (clst <= 1) ABORT(fs, FR_INT_ERR); - if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); - fp->clust = clst; /* Update current cluster */ - } - } - sect = clst2sect(fs, fp->clust); /* Get current data sector */ - if (sect == 0) ABORT(fs, FR_INT_ERR); - sect += csect; -#if FF_FS_TINY - if (move_window(fs, sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window to the file data */ - dbuf = fs->win; -#else - if (fp->sect != sect) { /* Fill sector cache with file data */ -#if !FF_FS_READONLY - if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ - if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - fp->flag &= (BYTE)~FA_DIRTY; - } -#endif - if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); - } - dbuf = fp->buf; -#endif - fp->sect = sect; - rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ - if (rcnt > btf) rcnt = btf; /* Clip it by btr if needed */ - rcnt = (*func)(dbuf + ((UINT)fp->fptr % SS(fs)), rcnt); /* Forward the file data */ - if (rcnt == 0) ABORT(fs, FR_INT_ERR); - } - - LEAVE_FF(fs, FR_OK); -} -#endif /* FF_USE_FORWARD */ - - - -#if !FF_FS_READONLY && FF_USE_MKFS -/*-----------------------------------------------------------------------*/ -/* Create an FAT/exFAT volume */ -/*-----------------------------------------------------------------------*/ - -#define N_SEC_TRACK 63 /* Sectors per track for determination of drive CHS */ -#define GPT_ALIGN 0x100000 /* Alignment of partitions in GPT [byte] (>=128KB) */ -#define GPT_ITEMS 128 /* Number of GPT table size (>=128, sector aligned) */ - - -/* Create partitions on the physical drive */ - -static FRESULT create_partition ( - BYTE drv, /* Physical drive number */ - const LBA_t plst[], /* Partition list */ - UINT sys, /* System ID (for only MBR, temp setting) and bit8:GPT */ - BYTE* buf /* Working buffer for a sector */ -) -{ - UINT i, cy; - LBA_t sz_drv; - DWORD sz_drv32, s_lba32, n_lba32; - BYTE *pte, hd, n_hd, sc, n_sc; - - /* Get drive size */ - if (disk_ioctl(drv, GET_SECTOR_COUNT, &sz_drv) != RES_OK) return FR_DISK_ERR; - -#if FF_LBA64 - if (sz_drv >= FF_MIN_GPT) { /* Create partitions in GPT */ - WORD ss; - UINT sz_pt, pi, si, ofs; - DWORD bcc, rnd, align; - QWORD s_lba64, n_lba64, sz_pool, s_bpt; - static const BYTE gpt_mbr[16] = {0x00, 0x00, 0x02, 0x00, 0xEE, 0xFE, 0xFF, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF}; - -#if FF_MAX_SS != FF_MIN_SS - if (disk_ioctl(drv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR; /* Get sector size */ - if (ss > FF_MAX_SS || ss < FF_MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR; -#else - ss = FF_MAX_SS; -#endif - rnd = GET_FATTIME(); /* Random seed */ - align = GPT_ALIGN / ss; /* Partition alignment [sector] */ - sz_pt = GPT_ITEMS * SZ_GPTE / ss; /* Size of PT [sector] */ - s_bpt = sz_drv - sz_pt - 1; /* Backup PT start sector */ - s_lba64 = 2 + sz_pt; /* First allocatable sector */ - sz_pool = s_bpt - s_lba64; /* Size of allocatable area */ - bcc = 0xFFFFFFFF; n_lba64 = 1; - pi = si = 0; /* partition table index, size table index */ - do { - if (pi * SZ_GPTE % ss == 0) mem_set(buf, 0, ss); /* Clean the buffer if needed */ - if (n_lba64 != 0) { /* Is the size table not termintated? */ - s_lba64 = (s_lba64 + align - 1) & ((QWORD)0 - align); /* Align partition start */ - n_lba64 = plst[si++]; /* Get a partition size */ - if (n_lba64 <= 100) { /* Is the size in percentage? */ - n_lba64 = sz_pool * n_lba64 / 100; - n_lba64 = (n_lba64 + align - 1) & ((QWORD)0 - align); /* Align partition end (only if in percentage) */ - } - if (s_lba64 + n_lba64 > s_bpt) { /* Clip at end of the pool */ - n_lba64 = (s_lba64 < s_bpt) ? s_bpt - s_lba64 : 0; - } - } - if (n_lba64 != 0) { /* Add a partition? */ - ofs = pi * SZ_GPTE % ss; - mem_cpy(buf + ofs + GPTE_PtGuid, GUID_MS_Basic, 16); /* Partition GUID (Microsoft Basic Data) */ - rnd = make_rand(rnd, buf + ofs + GPTE_UpGuid, 16); /* Unique partition GUID */ - st_qword(buf + ofs + GPTE_FstLba, s_lba64); /* Partition start LBA */ - st_qword(buf + ofs + GPTE_LstLba, s_lba64 + n_lba64 - 1); /* Partition end LBA */ - s_lba64 += n_lba64; /* Next partition LBA */ - } - if ((pi + 1) * SZ_GPTE % ss == 0) { /* Write the buffer if it is filled up */ - for (i = 0; i < ss; bcc = crc32(bcc, buf[i++])) ; /* Calculate table check sum */ - if (disk_write(drv, buf, 2 + pi * SZ_GPTE / ss, 1) != RES_OK) return FR_DISK_ERR; /* Primary table */ - if (disk_write(drv, buf, s_bpt + pi * SZ_GPTE / ss, 1) != RES_OK) return FR_DISK_ERR; /* Secondary table */ - } - } while (++pi < GPT_ITEMS); - - /* Create primary GPT header */ - mem_set(buf, 0, ss); - mem_cpy(buf + GPTH_Sign, "EFI PART" "\0\0\1\0" "\x5C\0\0", 16); /* Signature, version (1.0) and size (92) */ - st_dword(buf + GPTH_PtBcc, ~bcc); /* Table check sum */ - st_qword(buf + GPTH_CurLba, 1); /* LBA of this header */ - st_qword(buf + GPTH_BakLba, sz_drv - 1); /* LBA of another header */ - st_qword(buf + GPTH_FstLba, 2 + sz_pt); /* LBA of first allocatable sector */ - st_qword(buf + GPTH_LstLba, s_bpt - 1); /* LBA of last allocatable sector */ - st_dword(buf + GPTH_PteSize, SZ_GPTE); /* Size of a table entry */ - st_dword(buf + GPTH_PtNum, GPT_ITEMS); /* Number of table entries */ - st_dword(buf + GPTH_PtOfs, 2); /* LBA of this table */ - rnd = make_rand(rnd, buf + GPTH_DskGuid, 16); /* Disk GUID */ - for (i = 0, bcc= 0xFFFFFFFF; i < 92; bcc = crc32(bcc, buf[i++])) ; /* Calculate header check sum */ - st_dword(buf + GPTH_Bcc, ~bcc); /* Header check sum */ - if (disk_write(drv, buf, 1, 1) != RES_OK) return FR_DISK_ERR; - - /* Create secondary GPT header */ - st_qword(buf + GPTH_CurLba, sz_drv - 1); /* LBA of this header */ - st_qword(buf + GPTH_BakLba, 1); /* LBA of another header */ - st_qword(buf + GPTH_PtOfs, s_bpt); /* LBA of this table */ - st_dword(buf + GPTH_Bcc, 0); - for (i = 0, bcc= 0xFFFFFFFF; i < 92; bcc = crc32(bcc, buf[i++])) ; /* Calculate header check sum */ - st_dword(buf + GPTH_Bcc, ~bcc); /* Header check sum */ - if (disk_write(drv, buf, sz_drv - 1, 1) != RES_OK) return FR_DISK_ERR; - - /* Create protective MBR */ - mem_set(buf, 0, ss); - mem_cpy(buf + MBR_Table, gpt_mbr, 16); /* Create a GPT partition */ - st_word(buf + BS_55AA, 0xAA55); - if (disk_write(drv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; - - } else -#endif - { /* Create partitions in MBR */ - sz_drv32 = (DWORD)sz_drv; - n_sc = N_SEC_TRACK; /* Determine drive CHS without any consideration of the drive geometry */ - for (n_hd = 8; n_hd != 0 && sz_drv32 / n_hd / n_sc > 1024; n_hd *= 2) ; - if (n_hd == 0) n_hd = 255; /* Number of heads needs to be <256 */ - - mem_set(buf, 0, FF_MAX_SS); /* Clear MBR */ - pte = buf + MBR_Table; /* Partition table in the MBR */ - for (i = 0, s_lba32 = n_sc; i < 4 && s_lba32 != 0 && s_lba32 < sz_drv32; i++, s_lba32 += n_lba32) { - n_lba32 = (DWORD)plst[i]; /* Get partition size */ - if (n_lba32 <= 100) n_lba32 = (n_lba32 == 100) ? sz_drv32 : sz_drv32 / 100 * n_lba32; /* Size in percentage? */ - if (s_lba32 + n_lba32 > sz_drv32 || s_lba32 + n_lba32 < s_lba32) n_lba32 = sz_drv32 - s_lba32; /* Clip at drive size */ - if (n_lba32 == 0) break; /* End of table or no sector to allocate? */ - - st_dword(pte + PTE_StLba, s_lba32); /* Start LBA */ - st_dword(pte + PTE_SizLba, n_lba32); /* Number of sectors */ - pte[PTE_System] = (BYTE)sys; /* System type */ - - cy = (UINT)(s_lba32 / n_sc / n_hd); /* Start cylinder */ - hd = (BYTE)(s_lba32 / n_sc % n_hd); /* Start head */ - sc = (BYTE)(s_lba32 % n_sc + 1); /* Start sector */ - pte[PTE_StHead] = hd; - pte[PTE_StSec] = (BYTE)((cy >> 2 & 0xC0) | sc); - pte[PTE_StCyl] = (BYTE)cy; - - cy = (UINT)((s_lba32 + n_lba32 - 1) / n_sc / n_hd); /* End cylinder */ - hd = (BYTE)((s_lba32 + n_lba32 - 1) / n_sc % n_hd); /* End head */ - sc = (BYTE)((s_lba32 + n_lba32 - 1) % n_sc + 1); /* End sector */ - pte[PTE_EdHead] = hd; - pte[PTE_EdSec] = (BYTE)((cy >> 2 & 0xC0) | sc); - pte[PTE_EdCyl] = (BYTE)cy; - - pte += SZ_PTE; /* Next entry */ - } - - st_word(buf + BS_55AA, 0xAA55); /* MBR signature */ - if (disk_write(drv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; /* Write it to the MBR */ - } - - return FR_OK; -} - - - -FRESULT f_mkfs ( - const TCHAR* path, /* Logical drive number */ - const MKFS_PARM* opt, /* Format options */ - void* work, /* Pointer to working buffer (null: use heap memory) */ - UINT len /* Size of working buffer [byte] */ -) -{ - static const WORD cst[] = {1, 4, 16, 64, 256, 512, 0}; /* Cluster size boundary for FAT volume (4Ks unit) */ - static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (128Ks unit) */ - static const MKFS_PARM defopt = {FM_ANY, 0, 0, 0, 0}; /* Default parameter */ - BYTE fsopt, fsty, sys, *buf, *pte, pdrv, ipart; - WORD ss; /* Sector size */ - DWORD sz_buf, sz_blk, n_clst, pau, nsect, n; - LBA_t sz_vol, b_vol, b_fat, b_data; /* Size of volume, Base LBA of volume, fat, data */ - LBA_t sect, lba[2]; - DWORD sz_rsv, sz_fat, sz_dir, sz_au; /* Size of reserved, fat, dir, data, cluster */ - UINT n_fat, n_root, i; /* Index, Number of FATs and Number of roor dir entries */ - int vol; - DSTATUS ds; - FRESULT fr; - - - /* Check mounted drive and clear work area */ - vol = get_ldnumber(&path); /* Get target logical drive */ - if (vol < 0) return FR_INVALID_DRIVE; - if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the fs object if mounted */ - pdrv = LD2PD(vol); /* Physical drive */ - ipart = LD2PT(vol); /* Partition (0:create as new, 1..:get from partition table) */ - if (!opt) opt = &defopt; /* Use default parameter if it is not given */ - - /* Get physical drive status (sz_drv, sz_blk, ss) */ - ds = disk_initialize(pdrv); - if (ds & STA_NOINIT) return FR_NOT_READY; - if (ds & STA_PROTECT) return FR_WRITE_PROTECTED; - sz_blk = opt->align; - if (sz_blk == 0 && disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK) sz_blk = 1; - if (sz_blk == 0 || sz_blk > 0x8000 || (sz_blk & (sz_blk - 1))) sz_blk = 1; -#if FF_MAX_SS != FF_MIN_SS - if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR; - if (ss > FF_MAX_SS || ss < FF_MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR; -#else - ss = FF_MAX_SS; -#endif - /* Options for FAT sub-type and FAT parameters */ - fsopt = opt->fmt & (FM_ANY | FM_SFD); - n_fat = (opt->n_fat >= 1 && opt->n_fat <= 2) ? opt->n_fat : 1; - n_root = (opt->n_root >= 1 && opt->n_root <= 32768 && (opt->n_root % (ss / SZDIRE)) == 0) ? opt->n_root : 512; - sz_au = (opt->au_size <= 0x1000000 && (opt->au_size & (opt->au_size - 1)) == 0) ? opt->au_size : 0; - sz_au /= ss; /* Byte --> Sector */ - - /* Get working buffer */ - sz_buf = len / ss; /* Size of working buffer [sector] */ - if (sz_buf == 0) return FR_NOT_ENOUGH_CORE; - buf = (BYTE*)work; /* Working buffer */ -#if FF_USE_LFN == 3 - if (!buf) buf = ff_memalloc(sz_buf * ss); /* Use heap memory for working buffer */ -#endif - if (!buf) return FR_NOT_ENOUGH_CORE; - - /* Determine where the volume to be located (b_vol, sz_vol) */ - b_vol = sz_vol = 0; - if (FF_MULTI_PARTITION && ipart != 0) { /* Is the volume associated with any specific partition? */ - /* Get partition location from the existing partition table */ - if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load MBR */ - if (ld_word(buf + BS_55AA) != 0xAA55) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if MBR is valid */ -#if FF_LBA64 - if (buf[MBR_Table + PTE_System] == 0xEE) { /* GPT protective MBR? */ - DWORD n_ent, ofs; - QWORD pt_lba; - - /* Get the partition location from GPT */ - if (disk_read(pdrv, buf, 1, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load GPT header sector (next to MBR) */ - if (!test_gpt_header(buf)) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if GPT header is valid */ - n_ent = ld_dword(buf + GPTH_PtNum); /* Number of entries */ - pt_lba = ld_qword(buf + GPTH_PtOfs); /* Table start sector */ - ofs = i = 0; - while (n_ent) { /* Find MS Basic partition with order of ipart */ - if (ofs == 0 && disk_read(pdrv, buf, pt_lba++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Get PT sector */ - if (!mem_cmp(buf + ofs + GPTE_PtGuid, GUID_MS_Basic, 16) && ++i == ipart) { /* MS basic data partition? */ - b_vol = ld_qword(buf + ofs + GPTE_FstLba); - sz_vol = ld_qword(buf + ofs + GPTE_LstLba) - b_vol + 1; - break; - } - n_ent--; ofs = (ofs + SZ_GPTE) % ss; /* Next entry */ - } - if (n_ent == 0) LEAVE_MKFS(FR_MKFS_ABORTED); /* Partition not found */ - fsopt |= 0x80; /* Partitioning is in GPT */ - } else -#endif - { /* Get the partition location from MBR partition table */ - pte = buf + (MBR_Table + (ipart - 1) * SZ_PTE); - if (ipart > 4 || pte[PTE_System] == 0) LEAVE_MKFS(FR_MKFS_ABORTED); /* No partition? */ - b_vol = ld_dword(pte + PTE_StLba); /* Get volume start sector */ - sz_vol = ld_dword(pte + PTE_SizLba); /* Get volume size */ - } - } else { /* The volume is associated with a physical drive */ - if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_vol) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - if (!(fsopt & FM_SFD)) { /* To be partitioned? */ - /* Create a single-partition on the drive in this function */ -#if FF_LBA64 - if (sz_vol >= FF_MIN_GPT) { /* Which partition type to create, MBR or GPT? */ - fsopt |= 0x80; /* Partitioning is in GPT */ - b_vol = GPT_ALIGN / ss; sz_vol -= b_vol + GPT_ITEMS * SZ_GPTE / ss + 1; /* Estimated partition offset and size */ - } else -#endif - { /* Partitioning is in MBR */ - if (sz_vol > N_SEC_TRACK) { - b_vol = N_SEC_TRACK; sz_vol -= b_vol; /* Estimated partition offset and size */ - } - } - } - } - if (sz_vol < 128) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if volume size is >=128s */ - - /* Now start to create a FAT volume at b_vol and sz_vol */ - - do { /* Pre-determine the FAT type */ - if (FF_FS_EXFAT && (fsopt & FM_EXFAT)) { /* exFAT possible? */ - if ((fsopt & FM_ANY) == FM_EXFAT || sz_vol >= 0x4000000 || sz_au > 128) { /* exFAT only, vol >= 64MS or sz_au > 128S ? */ - fsty = FS_EXFAT; break; - } - } -#if FF_LBA64 - if (sz_vol >= 0x100000000) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too large volume for FAT/FAT32 */ -#endif - if (sz_au > 128) sz_au = 128; /* Invalid AU for FAT/FAT32? */ - if (fsopt & FM_FAT32) { /* FAT32 possible? */ - if (!(fsopt & FM_FAT)) { /* no-FAT? */ - fsty = FS_FAT32; break; - } - } - if (!(fsopt & FM_FAT)) LEAVE_MKFS(FR_INVALID_PARAMETER); /* no-FAT? */ - fsty = FS_FAT16; - } while (0); - -#if FF_FS_EXFAT - if (fsty == FS_EXFAT) { /* Create an exFAT volume */ - DWORD szb_bit, szb_case, sum, nb, cl, tbl[3]; - WCHAR ch, si; - UINT j, st; - BYTE b; - - if (sz_vol < 0x1000) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume for exFAT? */ -#if FF_USE_TRIM - lba[0] = b_vol; lba[1] = b_vol + sz_vol - 1; /* Inform storage device that the volume area may be erased */ - disk_ioctl(pdrv, CTRL_TRIM, lba); -#endif - /* Determine FAT location, data location and number of clusters */ - if (sz_au == 0) { /* AU auto-selection */ - sz_au = 8; - if (sz_vol >= 0x80000) sz_au = 64; /* >= 512Ks */ - if (sz_vol >= 0x4000000) sz_au = 256; /* >= 64Ms */ - } - b_fat = b_vol + 32; /* FAT start at offset 32 */ - sz_fat = (DWORD)((sz_vol / sz_au + 2) * 4 + ss - 1) / ss; /* Number of FAT sectors */ - b_data = (b_fat + sz_fat + sz_blk - 1) & ~((LBA_t)sz_blk - 1); /* Align data area to the erase block boundary */ - if (b_data - b_vol >= sz_vol / 2) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */ - n_clst = (DWORD)(sz_vol - (b_data - b_vol)) / sz_au; /* Number of clusters */ - if (n_clst <16) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too few clusters? */ - if (n_clst > MAX_EXFAT) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters? */ - - szb_bit = (n_clst + 7) / 8; /* Size of allocation bitmap */ - tbl[0] = (szb_bit + sz_au * ss - 1) / (sz_au * ss); /* Number of allocation bitmap clusters */ - - /* Create a compressed up-case table */ - sect = b_data + sz_au * tbl[0]; /* Table start sector */ - sum = 0; /* Table checksum to be stored in the 82 entry */ - st = 0; si = 0; i = 0; j = 0; szb_case = 0; - do { - switch (st) { - case 0: - ch = (WCHAR)ff_wtoupper(si); /* Get an up-case char */ - if (ch != si) { - si++; break; /* Store the up-case char if exist */ - } - for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get run length of no-case block */ - if (j >= 128) { - ch = 0xFFFF; st = 2; break; /* Compress the no-case block if run is >= 128 */ - } - st = 1; /* Do not compress short run */ - /* go to next case */ - case 1: - ch = si++; /* Fill the short run */ - if (--j == 0) st = 0; - break; - - default: - ch = (WCHAR)j; si += (WCHAR)j; /* Number of chars to skip */ - st = 0; - } - sum = xsum32(buf[i + 0] = (BYTE)ch, sum); /* Put it into the write buffer */ - sum = xsum32(buf[i + 1] = (BYTE)(ch >> 8), sum); - i += 2; szb_case += 2; - if (si == 0 || i == sz_buf * ss) { /* Write buffered data when buffer full or end of process */ - n = (i + ss - 1) / ss; - if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - sect += n; i = 0; - } - } while (si); - tbl[1] = (szb_case + sz_au * ss - 1) / (sz_au * ss); /* Number of up-case table clusters */ - tbl[2] = 1; /* Number of root dir clusters */ - - /* Initialize the allocation bitmap */ - sect = b_data; nsect = (szb_bit + ss - 1) / ss; /* Start of bitmap and number of sectors */ - nb = tbl[0] + tbl[1] + tbl[2]; /* Number of clusters in-use by system */ - do { - mem_set(buf, 0, sz_buf * ss); - for (i = 0; nb >= 8 && i < sz_buf * ss; buf[i++] = 0xFF, nb -= 8) ; - for (b = 1; nb != 0 && i < sz_buf * ss; buf[i] |= b, b <<= 1, nb--) ; - n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ - if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - sect += n; nsect -= n; - } while (nsect); - - /* Initialize the FAT */ - sect = b_fat; nsect = sz_fat; /* Start of FAT and number of FAT sectors */ - j = nb = cl = 0; - do { - mem_set(buf, 0, sz_buf * ss); i = 0; /* Clear work area and reset write index */ - if (cl == 0) { /* Set FAT [0] and FAT[1] */ - st_dword(buf + i, 0xFFFFFFF8); i += 4; cl++; - st_dword(buf + i, 0xFFFFFFFF); i += 4; cl++; - } - do { /* Create chains of bitmap, up-case and root dir */ - while (nb != 0 && i < sz_buf * ss) { /* Create a chain */ - st_dword(buf + i, (nb > 1) ? cl + 1 : 0xFFFFFFFF); - i += 4; cl++; nb--; - } - if (nb == 0 && j < 3) nb = tbl[j++]; /* Next chain */ - } while (nb != 0 && i < sz_buf * ss); - n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ - if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - sect += n; nsect -= n; - } while (nsect); - - /* Initialize the root directory */ - mem_set(buf, 0, sz_buf * ss); - buf[SZDIRE * 0 + 0] = ET_VLABEL; /* Volume label entry (no label) */ - buf[SZDIRE * 1 + 0] = ET_BITMAP; /* Bitmap entry */ - st_dword(buf + SZDIRE * 1 + 20, 2); /* cluster */ - st_dword(buf + SZDIRE * 1 + 24, szb_bit); /* size */ - buf[SZDIRE * 2 + 0] = ET_UPCASE; /* Up-case table entry */ - st_dword(buf + SZDIRE * 2 + 4, sum); /* sum */ - st_dword(buf + SZDIRE * 2 + 20, 2 + tbl[0]); /* cluster */ - st_dword(buf + SZDIRE * 2 + 24, szb_case); /* size */ - sect = b_data + sz_au * (tbl[0] + tbl[1]); nsect = sz_au; /* Start of the root directory and number of sectors */ - do { /* Fill root directory sectors */ - n = (nsect > sz_buf) ? sz_buf : nsect; - if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - mem_set(buf, 0, ss); - sect += n; nsect -= n; - } while (nsect); - - /* Create two set of the exFAT VBR blocks */ - sect = b_vol; - for (n = 0; n < 2; n++) { - /* Main record (+0) */ - mem_set(buf, 0, ss); - mem_cpy(buf + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11); /* Boot jump code (x86), OEM name */ - st_qword(buf + BPB_VolOfsEx, b_vol); /* Volume offset in the physical drive [sector] */ - st_qword(buf + BPB_TotSecEx, sz_vol); /* Volume size [sector] */ - st_dword(buf + BPB_FatOfsEx, (DWORD)(b_fat - b_vol)); /* FAT offset [sector] */ - st_dword(buf + BPB_FatSzEx, sz_fat); /* FAT size [sector] */ - st_dword(buf + BPB_DataOfsEx, (DWORD)(b_data - b_vol)); /* Data offset [sector] */ - st_dword(buf + BPB_NumClusEx, n_clst); /* Number of clusters */ - st_dword(buf + BPB_RootClusEx, 2 + tbl[0] + tbl[1]); /* Root dir cluster # */ - st_dword(buf + BPB_VolIDEx, GET_FATTIME()); /* VSN */ - st_word(buf + BPB_FSVerEx, 0x100); /* Filesystem version (1.00) */ - for (buf[BPB_BytsPerSecEx] = 0, i = ss; i >>= 1; buf[BPB_BytsPerSecEx]++) ; /* Log2 of sector size [byte] */ - for (buf[BPB_SecPerClusEx] = 0, i = sz_au; i >>= 1; buf[BPB_SecPerClusEx]++) ; /* Log2 of cluster size [sector] */ - buf[BPB_NumFATsEx] = 1; /* Number of FATs */ - buf[BPB_DrvNumEx] = 0x80; /* Drive number (for int13) */ - st_word(buf + BS_BootCodeEx, 0xFEEB); /* Boot code (x86) */ - st_word(buf + BS_55AA, 0xAA55); /* Signature (placed here regardless of sector size) */ - for (i = sum = 0; i < ss; i++) { /* VBR checksum */ - if (i != BPB_VolFlagEx && i != BPB_VolFlagEx + 1 && i != BPB_PercInUseEx) sum = xsum32(buf[i], sum); - } - if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - /* Extended bootstrap record (+1..+8) */ - mem_set(buf, 0, ss); - st_word(buf + ss - 2, 0xAA55); /* Signature (placed at end of sector) */ - for (j = 1; j < 9; j++) { - for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ - if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - } - /* OEM/Reserved record (+9..+10) */ - mem_set(buf, 0, ss); - for ( ; j < 11; j++) { - for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ - if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - } - /* Sum record (+11) */ - for (i = 0; i < ss; i += 4) st_dword(buf + i, sum); /* Fill with checksum value */ - if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - } - - } else -#endif /* FF_FS_EXFAT */ - { /* Create an FAT/FAT32 volume */ - do { - pau = sz_au; - /* Pre-determine number of clusters and FAT sub-type */ - if (fsty == FS_FAT32) { /* FAT32 volume */ - if (pau == 0) { /* AU auto-selection */ - n = (DWORD)sz_vol / 0x20000; /* Volume size in unit of 128KS */ - for (i = 0, pau = 1; cst32[i] && cst32[i] <= n; i++, pau <<= 1) ; /* Get from table */ - } - n_clst = (DWORD)sz_vol / pau; /* Number of clusters */ - sz_fat = (n_clst * 4 + 8 + ss - 1) / ss; /* FAT size [sector] */ - sz_rsv = 32; /* Number of reserved sectors */ - sz_dir = 0; /* No static directory */ - if (n_clst <= MAX_FAT16 || n_clst > MAX_FAT32) LEAVE_MKFS(FR_MKFS_ABORTED); - } else { /* FAT volume */ - if (pau == 0) { /* au auto-selection */ - n = (DWORD)sz_vol / 0x1000; /* Volume size in unit of 4KS */ - for (i = 0, pau = 1; cst[i] && cst[i] <= n; i++, pau <<= 1) ; /* Get from table */ - } - n_clst = (DWORD)sz_vol / pau; - if (n_clst > MAX_FAT12) { - n = n_clst * 2 + 4; /* FAT size [byte] */ - } else { - fsty = FS_FAT12; - n = (n_clst * 3 + 1) / 2 + 3; /* FAT size [byte] */ - } - sz_fat = (n + ss - 1) / ss; /* FAT size [sector] */ - sz_rsv = 1; /* Number of reserved sectors */ - sz_dir = (DWORD)n_root * SZDIRE / ss; /* Root dir size [sector] */ - } - b_fat = b_vol + sz_rsv; /* FAT base */ - b_data = b_fat + sz_fat * n_fat + sz_dir; /* Data base */ - - /* Align data area to erase block boundary (for flash memory media) */ - n = (DWORD)(((b_data + sz_blk - 1) & ~(sz_blk - 1)) - b_data); /* Sectors to next nearest from current data base */ - if (fsty == FS_FAT32) { /* FAT32: Move FAT */ - sz_rsv += n; b_fat += n; - } else { /* FAT: Expand FAT */ - if (n % n_fat) { /* Adjust fractional error if needed */ - n--; sz_rsv++; b_fat++; - } - sz_fat += n / n_fat; - } - - /* Determine number of clusters and final check of validity of the FAT sub-type */ - if (sz_vol < b_data + pau * 16 - b_vol) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */ - n_clst = ((DWORD)sz_vol - sz_rsv - sz_fat * n_fat - sz_dir) / pau; - if (fsty == FS_FAT32) { - if (n_clst <= MAX_FAT16) { /* Too few clusters for FAT32? */ - if (sz_au == 0 && (sz_au = pau / 2) != 0) continue; /* Adjust cluster size and retry */ - LEAVE_MKFS(FR_MKFS_ABORTED); - } - } - if (fsty == FS_FAT16) { - if (n_clst > MAX_FAT16) { /* Too many clusters for FAT16 */ - if (sz_au == 0 && (pau * 2) <= 64) { - sz_au = pau * 2; continue; /* Adjust cluster size and retry */ - } - if ((fsopt & FM_FAT32)) { - fsty = FS_FAT32; continue; /* Switch type to FAT32 and retry */ - } - if (sz_au == 0 && (sz_au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */ - LEAVE_MKFS(FR_MKFS_ABORTED); - } - if (n_clst <= MAX_FAT12) { /* Too few clusters for FAT16 */ - if (sz_au == 0 && (sz_au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */ - LEAVE_MKFS(FR_MKFS_ABORTED); - } - } - if (fsty == FS_FAT12 && n_clst > MAX_FAT12) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters for FAT12 */ - - /* Ok, it is the valid cluster configuration */ - break; - } while (1); - -#if FF_USE_TRIM - lba[0] = b_vol; lba[1] = b_vol + sz_vol - 1; /* Inform storage device that the volume area may be erased */ - disk_ioctl(pdrv, CTRL_TRIM, lba); -#endif - /* Create FAT VBR */ - mem_set(buf, 0, ss); - mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code (x86), OEM name */ - st_word(buf + BPB_BytsPerSec, ss); /* Sector size [byte] */ - buf[BPB_SecPerClus] = (BYTE)pau; /* Cluster size [sector] */ - st_word(buf + BPB_RsvdSecCnt, (WORD)sz_rsv); /* Size of reserved area */ - buf[BPB_NumFATs] = (BYTE)n_fat; /* Number of FATs */ - st_word(buf + BPB_RootEntCnt, (WORD)((fsty == FS_FAT32) ? 0 : n_root)); /* Number of root directory entries */ - if (sz_vol < 0x10000) { - st_word(buf + BPB_TotSec16, (WORD)sz_vol); /* Volume size in 16-bit LBA */ - } else { - st_dword(buf + BPB_TotSec32, (DWORD)sz_vol); /* Volume size in 32-bit LBA */ - } - buf[BPB_Media] = 0xF8; /* Media descriptor byte */ - st_word(buf + BPB_SecPerTrk, 63); /* Number of sectors per track (for int13) */ - st_word(buf + BPB_NumHeads, 255); /* Number of heads (for int13) */ - st_dword(buf + BPB_HiddSec, (DWORD)b_vol); /* Volume offset in the physical drive [sector] */ - if (fsty == FS_FAT32) { - st_dword(buf + BS_VolID32, GET_FATTIME()); /* VSN */ - st_dword(buf + BPB_FATSz32, sz_fat); /* FAT size [sector] */ - st_dword(buf + BPB_RootClus32, 2); /* Root directory cluster # (2) */ - st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */ - st_word(buf + BPB_BkBootSec32, 6); /* Offset of backup VBR (VBR + 6) */ - buf[BS_DrvNum32] = 0x80; /* Drive number (for int13) */ - buf[BS_BootSig32] = 0x29; /* Extended boot signature */ - mem_cpy(buf + BS_VolLab32, "NO NAME " "FAT32 ", 19); /* Volume label, FAT signature */ - } else { - st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */ - st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ - buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */ - buf[BS_BootSig] = 0x29; /* Extended boot signature */ - mem_cpy(buf + BS_VolLab, "NO NAME " "FAT ", 19); /* Volume label, FAT signature */ - } - st_word(buf + BS_55AA, 0xAA55); /* Signature (offset is fixed here regardless of sector size) */ - if (disk_write(pdrv, buf, b_vol, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it to the VBR sector */ - - /* Create FSINFO record if needed */ - if (fsty == FS_FAT32) { - disk_write(pdrv, buf, b_vol + 6, 1); /* Write backup VBR (VBR + 6) */ - mem_set(buf, 0, ss); - st_dword(buf + FSI_LeadSig, 0x41615252); - st_dword(buf + FSI_StrucSig, 0x61417272); - st_dword(buf + FSI_Free_Count, n_clst - 1); /* Number of free clusters */ - st_dword(buf + FSI_Nxt_Free, 2); /* Last allocated cluster# */ - st_word(buf + BS_55AA, 0xAA55); - disk_write(pdrv, buf, b_vol + 7, 1); /* Write backup FSINFO (VBR + 7) */ - disk_write(pdrv, buf, b_vol + 1, 1); /* Write original FSINFO (VBR + 1) */ - } - - /* Initialize FAT area */ - mem_set(buf, 0, sz_buf * ss); - sect = b_fat; /* FAT start sector */ - for (i = 0; i < n_fat; i++) { /* Initialize FATs each */ - if (fsty == FS_FAT32) { - st_dword(buf + 0, 0xFFFFFFF8); /* FAT[0] */ - st_dword(buf + 4, 0xFFFFFFFF); /* FAT[1] */ - st_dword(buf + 8, 0x0FFFFFFF); /* FAT[2] (root directory) */ - } else { - st_dword(buf + 0, (fsty == FS_FAT12) ? 0xFFFFF8 : 0xFFFFFFF8); /* FAT[0] and FAT[1] */ - } - nsect = sz_fat; /* Number of FAT sectors */ - do { /* Fill FAT sectors */ - n = (nsect > sz_buf) ? sz_buf : nsect; - if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - mem_set(buf, 0, ss); /* Rest of FAT all are cleared */ - sect += n; nsect -= n; - } while (nsect); - } - - /* Initialize root directory (fill with zero) */ - nsect = (fsty == FS_FAT32) ? pau : sz_dir; /* Number of root directory sectors */ - do { - n = (nsect > sz_buf) ? sz_buf : nsect; - if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - sect += n; nsect -= n; - } while (nsect); - } - - /* A FAT volume has been created here */ - - /* Determine system ID in the MBR partition table */ - if (FF_FS_EXFAT && fsty == FS_EXFAT) { - sys = 0x07; /* exFAT */ - } else { - if (fsty == FS_FAT32) { - sys = 0x0C; /* FAT32X */ - } else { - if (sz_vol >= 0x10000) { - sys = 0x06; /* FAT12/16 (large) */ - } else { - sys = (fsty == FS_FAT16) ? 0x04 : 0x01; /* FAT16 : FAT12 */ - } - } - } - - /* Update partition information */ - if (FF_MULTI_PARTITION && ipart != 0) { /* Volume is in the existing partition */ - if (!FF_LBA64 || !(fsopt & 0x80)) { - /* Update system ID in the partition table */ - if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Read the MBR */ - buf[MBR_Table + (ipart - 1) * SZ_PTE + PTE_System] = sys; /* Set system ID */ - if (disk_write(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it back to the MBR */ - } - } else { /* Volume as a new single partition */ - if (!(fsopt & FM_SFD)) { /* Create partition table if not in SFD */ - lba[0] = sz_vol, lba[1] = 0; - fr = create_partition(pdrv, lba, sys, buf); - if (fr != FR_OK) LEAVE_MKFS(fr); - } - } - - if (disk_ioctl(pdrv, CTRL_SYNC, 0) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); - - LEAVE_MKFS(FR_OK); -} - - - - -#if FF_MULTI_PARTITION -/*-----------------------------------------------------------------------*/ -/* Create Partition Table on the Physical Drive */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_fdisk ( - BYTE pdrv, /* Physical drive number */ - const LBA_t ptbl[], /* Pointer to the size table for each partitions */ - void* work /* Pointer to the working buffer (null: use heap memory) */ -) -{ - BYTE *buf = (BYTE*)work; - DSTATUS stat; - - - stat = disk_initialize(pdrv); - if (stat & STA_NOINIT) return FR_NOT_READY; - if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; -#if FF_USE_LFN == 3 - if (!buf) buf = ff_memalloc(FF_MAX_SS); /* Use heap memory for working buffer */ -#endif - if (!buf) return FR_NOT_ENOUGH_CORE; - - LEAVE_MKFS(create_partition(pdrv, ptbl, 0x07, buf)); -} - -#endif /* FF_MULTI_PARTITION */ -#endif /* !FF_FS_READONLY && FF_USE_MKFS */ - - - - -#if FF_USE_STRFUNC -#if FF_USE_LFN && FF_LFN_UNICODE && (FF_STRF_ENCODE < 0 || FF_STRF_ENCODE > 3) -#error Wrong FF_STRF_ENCODE setting -#endif -/*-----------------------------------------------------------------------*/ -/* Get a String from the File */ -/*-----------------------------------------------------------------------*/ - -TCHAR* f_gets ( - TCHAR* buff, /* Pointer to the buffer to store read string */ - int len, /* Size of string buffer (items) */ - FIL* fp /* Pointer to the file object */ -) -{ - int nc = 0; - TCHAR *p = buff; - BYTE s[4]; - UINT rc; - DWORD dc; -#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE <= 2 - WCHAR wc; -#endif -#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE == 3 - UINT ct; -#endif - -#if FF_USE_LFN && FF_LFN_UNICODE /* With code conversion (Unicode API) */ - /* Make a room for the character and terminator */ - if (FF_LFN_UNICODE == 1) len -= (FF_STRF_ENCODE == 0) ? 1 : 2; - if (FF_LFN_UNICODE == 2) len -= (FF_STRF_ENCODE == 0) ? 3 : 4; - if (FF_LFN_UNICODE == 3) len -= 1; - while (nc < len) { -#if FF_STRF_ENCODE == 0 /* Read a character in ANSI/OEM */ - f_read(fp, s, 1, &rc); /* Get a code unit */ - if (rc != 1) break; /* EOF? */ - wc = s[0]; - if (dbc_1st((BYTE)wc)) { /* DBC 1st byte? */ - f_read(fp, s, 1, &rc); /* Get DBC 2nd byte */ - if (rc != 1 || !dbc_2nd(s[0])) continue; /* Wrong code? */ - wc = wc << 8 | s[0]; - } - dc = ff_oem2uni(wc, CODEPAGE); /* OEM --> */ - if (dc == 0) continue; -#elif FF_STRF_ENCODE == 1 || FF_STRF_ENCODE == 2 /* Read a character in UTF-16LE/BE */ - f_read(fp, s, 2, &rc); /* Get a code unit */ - if (rc != 2) break; /* EOF? */ - dc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1]; - if (IsSurrogateL(dc)) continue; /* Broken surrogate pair? */ - if (IsSurrogateH(dc)) { /* High surrogate? */ - f_read(fp, s, 2, &rc); /* Get low surrogate */ - if (rc != 2) break; /* EOF? */ - wc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1]; - if (!IsSurrogateL(wc)) continue; /* Broken surrogate pair? */ - dc = ((dc & 0x3FF) + 0x40) << 10 | (wc & 0x3FF); /* Merge surrogate pair */ - } -#else /* Read a character in UTF-8 */ - f_read(fp, s, 1, &rc); /* Get a code unit */ - if (rc != 1) break; /* EOF? */ - dc = s[0]; - if (dc >= 0x80) { /* Multi-byte sequence? */ - ct = 0; - if ((dc & 0xE0) == 0xC0) { dc &= 0x1F; ct = 1; } /* 2-byte sequence? */ - if ((dc & 0xF0) == 0xE0) { dc &= 0x0F; ct = 2; } /* 3-byte sequence? */ - if ((dc & 0xF8) == 0xF0) { dc &= 0x07; ct = 3; } /* 4-byte sequence? */ - if (ct == 0) continue; - f_read(fp, s, ct, &rc); /* Get trailing bytes */ - if (rc != ct) break; - rc = 0; - do { /* Merge the byte sequence */ - if ((s[rc] & 0xC0) != 0x80) break; - dc = dc << 6 | (s[rc] & 0x3F); - } while (++rc < ct); - if (rc != ct || dc < 0x80 || IsSurrogate(dc) || dc >= 0x110000) continue; /* Wrong encoding? */ - } -#endif - /* A code point is avaialble in dc to be output */ - - if (FF_USE_STRFUNC == 2 && dc == '\r') continue; /* Strip \r off if needed */ -#if FF_LFN_UNICODE == 1 || FF_LFN_UNICODE == 3 /* Output it in UTF-16/32 encoding */ - if (FF_LFN_UNICODE == 1 && dc >= 0x10000) { /* Out of BMP at UTF-16? */ - *p++ = (TCHAR)(0xD800 | ((dc >> 10) - 0x40)); nc++; /* Make and output high surrogate */ - dc = 0xDC00 | (dc & 0x3FF); /* Make low surrogate */ - } - *p++ = (TCHAR)dc; nc++; - if (dc == '\n') break; /* End of line? */ -#elif FF_LFN_UNICODE == 2 /* Output it in UTF-8 encoding */ - if (dc < 0x80) { /* Single byte? */ - *p++ = (TCHAR)dc; - nc++; - if (dc == '\n') break; /* End of line? */ - } else { - if (dc < 0x800) { /* 2-byte sequence? */ - *p++ = (TCHAR)(0xC0 | (dc >> 6 & 0x1F)); - *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); - nc += 2; - } else { - if (dc < 0x10000) { /* 3-byte sequence? */ - *p++ = (TCHAR)(0xE0 | (dc >> 12 & 0x0F)); - *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F)); - *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); - nc += 3; - } else { /* 4-byte sequence? */ - *p++ = (TCHAR)(0xF0 | (dc >> 18 & 0x07)); - *p++ = (TCHAR)(0x80 | (dc >> 12 & 0x3F)); - *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F)); - *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); - nc += 4; - } - } - } -#endif - } - -#else /* Byte-by-byte read without any conversion (ANSI/OEM API) */ - len -= 1; /* Make a room for the terminator */ - while (nc < len) { - f_read(fp, s, 1, &rc); /* Get a byte */ - if (rc != 1) break; /* EOF? */ - dc = s[0]; - if (FF_USE_STRFUNC == 2 && dc == '\r') continue; - *p++ = (TCHAR)dc; nc++; - if (dc == '\n') break; - } -#endif - - *p = 0; /* Terminate the string */ - return nc ? buff : 0; /* When no data read due to EOF or error, return with error. */ -} - - - - -#if !FF_FS_READONLY -#include -/*-----------------------------------------------------------------------*/ -/* Put a Character to the File (sub-functions) */ -/*-----------------------------------------------------------------------*/ - -/* Putchar output buffer and work area */ - -typedef struct { - FIL *fp; /* Ptr to the writing file */ - int idx, nchr; /* Write index of buf[] (-1:error), number of encoding units written */ -#if FF_USE_LFN && FF_LFN_UNICODE == 1 - WCHAR hs; -#elif FF_USE_LFN && FF_LFN_UNICODE == 2 - BYTE bs[4]; - UINT wi, ct; -#endif - BYTE buf[64]; /* Write buffer */ -} putbuff; - - -/* Buffered write with code conversion */ - -static void putc_bfd (putbuff* pb, TCHAR c) -{ - UINT n; - int i, nc; -#if FF_USE_LFN && FF_LFN_UNICODE - WCHAR hs, wc; -#if FF_LFN_UNICODE == 2 - DWORD dc; - TCHAR *tp; -#endif -#endif - - if (FF_USE_STRFUNC == 2 && c == '\n') { /* LF -> CRLF conversion */ - putc_bfd(pb, '\r'); - } - - i = pb->idx; /* Write index of pb->buf[] */ - if (i < 0) return; - nc = pb->nchr; /* Write unit counter */ - -#if FF_USE_LFN && FF_LFN_UNICODE -#if FF_LFN_UNICODE == 1 /* UTF-16 input */ - if (IsSurrogateH(c)) { /* High surrogate? */ - pb->hs = c; return; /* Save it for next */ - } - hs = pb->hs; pb->hs = 0; - if (hs != 0) { /* There is a leading high surrogate */ - if (!IsSurrogateL(c)) hs = 0; /* Discard high surrogate if not a surrogate pair */ - } else { - if (IsSurrogateL(c)) return; /* Discard stray low surrogate */ - } - wc = c; -#elif FF_LFN_UNICODE == 2 /* UTF-8 input */ - for (;;) { - if (pb->ct == 0) { /* Out of multi-byte sequence? */ - pb->bs[pb->wi = 0] = (BYTE)c; /* Save 1st byte */ - if ((BYTE)c < 0x80) break; /* Single byte? */ - if (((BYTE)c & 0xE0) == 0xC0) pb->ct = 1; /* 2-byte sequence? */ - if (((BYTE)c & 0xF0) == 0xE0) pb->ct = 2; /* 3-byte sequence? */ - if (((BYTE)c & 0xF1) == 0xF0) pb->ct = 3; /* 4-byte sequence? */ - return; - } else { /* In the multi-byte sequence */ - if (((BYTE)c & 0xC0) != 0x80) { /* Broken sequence? */ - pb->ct = 0; continue; - } - pb->bs[++pb->wi] = (BYTE)c; /* Save the trailing byte */ - if (--pb->ct == 0) break; /* End of multi-byte sequence? */ - return; - } - } - tp = (TCHAR*)pb->bs; - dc = tchar2uni(&tp); /* UTF-8 ==> UTF-16 */ - if (dc == 0xFFFFFFFF) return; /* Wrong code? */ - wc = (WCHAR)dc; - hs = (WCHAR)(dc >> 16); -#elif FF_LFN_UNICODE == 3 /* UTF-32 input */ - if (IsSurrogate(c) || c >= 0x110000) return; /* Discard invalid code */ - if (c >= 0x10000) { /* Out of BMP? */ - hs = (WCHAR)(0xD800 | ((c >> 10) - 0x40)); /* Make high surrogate */ - wc = 0xDC00 | (c & 0x3FF); /* Make low surrogate */ - } else { - hs = 0; - wc = (WCHAR)c; - } -#endif - /* A code point in UTF-16 is available in hs and wc */ - -#if FF_STRF_ENCODE == 1 /* Write a code point in UTF-16LE */ - if (hs != 0) { /* Surrogate pair? */ - st_word(&pb->buf[i], hs); - i += 2; - nc++; - } - st_word(&pb->buf[i], wc); - i += 2; -#elif FF_STRF_ENCODE == 2 /* Write a code point in UTF-16BE */ - if (hs != 0) { /* Surrogate pair? */ - pb->buf[i++] = (BYTE)(hs >> 8); - pb->buf[i++] = (BYTE)hs; - nc++; - } - pb->buf[i++] = (BYTE)(wc >> 8); - pb->buf[i++] = (BYTE)wc; -#elif FF_STRF_ENCODE == 3 /* Write a code point in UTF-8 */ - if (hs != 0) { /* 4-byte sequence? */ - nc += 3; - hs = (hs & 0x3FF) + 0x40; - pb->buf[i++] = (BYTE)(0xF0 | hs >> 8); - pb->buf[i++] = (BYTE)(0x80 | (hs >> 2 & 0x3F)); - pb->buf[i++] = (BYTE)(0x80 | (hs & 3) << 4 | (wc >> 6 & 0x0F)); - pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F)); - } else { - if (wc < 0x80) { /* Single byte? */ - pb->buf[i++] = (BYTE)wc; - } else { - if (wc < 0x800) { /* 2-byte sequence? */ - nc += 1; - pb->buf[i++] = (BYTE)(0xC0 | wc >> 6); - } else { /* 3-byte sequence */ - nc += 2; - pb->buf[i++] = (BYTE)(0xE0 | wc >> 12); - pb->buf[i++] = (BYTE)(0x80 | (wc >> 6 & 0x3F)); - } - pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F)); - } - } -#else /* Write a code point in ANSI/OEM */ - if (hs != 0) return; - wc = ff_uni2oem(wc, CODEPAGE); /* UTF-16 ==> ANSI/OEM */ - if (wc == 0) return; - if (wc >= 0x100) { - pb->buf[i++] = (BYTE)(wc >> 8); nc++; - } - pb->buf[i++] = (BYTE)wc; -#endif - -#else /* ANSI/OEM input (without re-encoding) */ - pb->buf[i++] = (BYTE)c; -#endif - - if (i >= (int)(sizeof pb->buf) - 4) { /* Write buffered characters to the file */ - f_write(pb->fp, pb->buf, (UINT)i, &n); - i = (n == (UINT)i) ? 0 : -1; - } - pb->idx = i; - pb->nchr = nc + 1; -} - - -/* Flush remaining characters in the buffer */ - -static int putc_flush (putbuff* pb) -{ - UINT nw; - - if ( pb->idx >= 0 /* Flush buffered characters to the file */ - && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK - && (UINT)pb->idx == nw) return pb->nchr; - return EOF; -} - - -/* Initialize write buffer */ - -static void putc_init (putbuff* pb, FIL* fp) -{ - mem_set(pb, 0, sizeof (putbuff)); - pb->fp = fp; -} - - - -int f_putc ( - TCHAR c, /* A character to be output */ - FIL* fp /* Pointer to the file object */ -) -{ - putbuff pb; - - - putc_init(&pb, fp); - putc_bfd(&pb, c); /* Put the character */ - return putc_flush(&pb); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Put a String to the File */ -/*-----------------------------------------------------------------------*/ - -int f_puts ( - const TCHAR* str, /* Pointer to the string to be output */ - FIL* fp /* Pointer to the file object */ -) -{ - putbuff pb; - - - putc_init(&pb, fp); - while (*str) putc_bfd(&pb, *str++); /* Put the string */ - return putc_flush(&pb); -} - - - - -/*-----------------------------------------------------------------------*/ -/* Put a Formatted String to the File */ -/*-----------------------------------------------------------------------*/ - -int f_printf ( - FIL* fp, /* Pointer to the file object */ - const TCHAR* fmt, /* Pointer to the format string */ - ... /* Optional arguments... */ -) -{ - va_list arp; - putbuff pb; - BYTE f, r; - UINT i, j, w; - DWORD v; - TCHAR c, d, str[32], *p; - - - putc_init(&pb, fp); - - va_start(arp, fmt); - - for (;;) { - c = *fmt++; - if (c == 0) break; /* End of string */ - if (c != '%') { /* Non escape character */ - putc_bfd(&pb, c); - continue; - } - w = f = 0; - c = *fmt++; - if (c == '0') { /* Flag: '0' padding */ - f = 1; c = *fmt++; - } else { - if (c == '-') { /* Flag: left justified */ - f = 2; c = *fmt++; - } - } - if (c == '*') { /* Minimum width by argument */ - w = va_arg(arp, int); - c = *fmt++; - } else { - while (IsDigit(c)) { /* Minimum width */ - w = w * 10 + c - '0'; - c = *fmt++; - } - } - if (c == 'l' || c == 'L') { /* Type prefix: Size is long int */ - f |= 4; c = *fmt++; - } - if (c == 0) break; - d = c; - if (IsLower(d)) d -= 0x20; - switch (d) { /* Atgument type is... */ - case 'S' : /* String */ - p = va_arg(arp, TCHAR*); - for (j = 0; p[j]; j++) ; - if (!(f & 2)) { /* Right padded */ - while (j++ < w) putc_bfd(&pb, ' ') ; - } - while (*p) putc_bfd(&pb, *p++) ; /* String body */ - while (j++ < w) putc_bfd(&pb, ' ') ; /* Left padded */ - continue; - - case 'C' : /* Character */ - putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue; - - case 'B' : /* Unsigned binary */ - r = 2; break; - - case 'O' : /* Unsigned octal */ - r = 8; break; - - case 'D' : /* Signed decimal */ - case 'U' : /* Unsigned decimal */ - r = 10; break; - - case 'X' : /* Unsigned hexdecimal */ - r = 16; break; - - default: /* Unknown type (pass-through) */ - putc_bfd(&pb, c); continue; - } - - /* Get an argument and put it in numeral */ - v = (f & 4) ? (DWORD)va_arg(arp, long) : ((d == 'D') ? (DWORD)(long)va_arg(arp, int) : (DWORD)va_arg(arp, unsigned int)); - if (d == 'D' && (v & 0x80000000)) { - v = 0 - v; - f |= 8; - } - i = 0; - do { - d = (TCHAR)(v % r); v /= r; - if (d > 9) d += (c == 'x') ? 0x27 : 0x07; - str[i++] = d + '0'; - } while (v && i < sizeof str / sizeof *str); - if (f & 8) str[i++] = '-'; - j = i; d = (f & 1) ? '0' : ' '; - if (!(f & 2)) { - while (j++ < w) putc_bfd(&pb, d); /* Right pad */ - } - do { - putc_bfd(&pb, str[--i]); /* Number body */ - } while (i); - while (j++ < w) putc_bfd(&pb, d); /* Left pad */ - } - - va_end(arp); - - return putc_flush(&pb); -} - -#endif /* !FF_FS_READONLY */ -#endif /* FF_USE_STRFUNC */ - - - -#if FF_CODE_PAGE == 0 -/*-----------------------------------------------------------------------*/ -/* Set Active Codepage for the Path Name */ -/*-----------------------------------------------------------------------*/ - -FRESULT f_setcp ( - WORD cp /* Value to be set as active code page */ -) -{ - static const WORD validcp[] = { 437, 720, 737, 771, 775, 850, 852, 857, 860, 861, 862, 863, 864, 865, 866, 869, 932, 936, 949, 950, 0}; - static const BYTE* const tables[] = {Ct437, Ct720, Ct737, Ct771, Ct775, Ct850, Ct852, Ct857, Ct860, Ct861, Ct862, Ct863, Ct864, Ct865, Ct866, Ct869, Dc932, Dc936, Dc949, Dc950, 0}; - UINT i; - - - for (i = 0; validcp[i] != 0 && validcp[i] != cp; i++) ; /* Find the code page */ - if (validcp[i] != cp) return FR_INVALID_PARAMETER; /* Not found? */ - - CodePage = cp; - if (cp >= 900) { /* DBCS */ - ExCvt = 0; - DbcTbl = tables[i]; - } else { /* SBCS */ - ExCvt = tables[i]; - DbcTbl = 0; - } - return FR_OK; -} -#endif /* FF_CODE_PAGE == 0 */ - diff --git a/fusee/common/fatfs/ff.h b/fusee/common/fatfs/ff.h deleted file mode 100644 index af989e0ab..000000000 --- a/fusee/common/fatfs/ff.h +++ /dev/null @@ -1,426 +0,0 @@ -/*----------------------------------------------------------------------------/ -/ FatFs - Generic FAT Filesystem module R0.14 / -/-----------------------------------------------------------------------------/ -/ -/ Copyright (C) 2019, ChaN, all right reserved. -/ -/ FatFs module is an open source software. Redistribution and use of FatFs in -/ source and binary forms, with or without modification, are permitted provided -/ that the following condition is met: - -/ 1. Redistributions of source code must retain the above copyright notice, -/ this condition and the following disclaimer. -/ -/ This software is provided by the copyright holder and contributors "AS IS" -/ and any warranties related to this software are DISCLAIMED. -/ The copyright owner or contributors be NOT LIABLE for any damages caused -/ by use of this software. -/ -/----------------------------------------------------------------------------*/ - - -#ifndef FF_DEFINED -#define FF_DEFINED 86606 /* Revision ID */ - -#ifdef __cplusplus -extern "C" { -#endif - -#include "ffconf.h" /* FatFs configuration options */ - -#if FF_DEFINED != FFCONF_DEF -#error Wrong configuration file (ffconf.h). -#endif - - -/* Integer types used for FatFs API */ - -#if defined(_WIN32) /* Main development platform */ -#define FF_INTDEF 2 -#include -typedef unsigned __int64 QWORD; -#elif (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || defined(__cplusplus) /* C99 or later */ -#define FF_INTDEF 2 -#include -typedef unsigned int UINT; /* int must be 16-bit or 32-bit */ -typedef unsigned char BYTE; /* char must be 8-bit */ -typedef uint16_t WORD; /* 16-bit unsigned integer */ -typedef uint32_t DWORD; /* 32-bit unsigned integer */ -typedef uint64_t QWORD; /* 64-bit unsigned integer */ -typedef WORD WCHAR; /* UTF-16 character type */ -#else /* Earlier than C99 */ -#define FF_INTDEF 1 -typedef unsigned int UINT; /* int must be 16-bit or 32-bit */ -typedef unsigned char BYTE; /* char must be 8-bit */ -typedef unsigned short WORD; /* 16-bit unsigned integer */ -typedef unsigned long DWORD; /* 32-bit unsigned integer */ -typedef WORD WCHAR; /* UTF-16 character type */ -#endif - - -/* Definitions of volume management */ - -#if FF_MULTI_PARTITION /* Multiple partition configuration */ -typedef struct { - BYTE pd; /* Physical drive number */ - BYTE pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */ -} PARTITION; -extern PARTITION VolToPart[]; /* Volume - Partition mapping table */ -#endif - -#if FF_STR_VOLUME_ID -#ifndef FF_VOLUME_STRS -extern const char* VolumeStr[FF_VOLUMES]; /* User defied volume ID */ -#endif -#endif - - - -/* Type of path name strings on FatFs API */ - -#ifndef _INC_TCHAR -#define _INC_TCHAR - -#if FF_USE_LFN && FF_LFN_UNICODE == 1 /* Unicode in UTF-16 encoding */ -typedef WCHAR TCHAR; -#define _T(x) L ## x -#define _TEXT(x) L ## x -#elif FF_USE_LFN && FF_LFN_UNICODE == 2 /* Unicode in UTF-8 encoding */ -typedef char TCHAR; -#define _T(x) u8 ## x -#define _TEXT(x) u8 ## x -#elif FF_USE_LFN && FF_LFN_UNICODE == 3 /* Unicode in UTF-32 encoding */ -typedef DWORD TCHAR; -#define _T(x) U ## x -#define _TEXT(x) U ## x -#elif FF_USE_LFN && (FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3) -#error Wrong FF_LFN_UNICODE setting -#else /* ANSI/OEM code in SBCS/DBCS */ -typedef char TCHAR; -#define _T(x) x -#define _TEXT(x) x -#endif - -#endif - - - -/* Type of file size and LBA variables */ - -#if FF_FS_EXFAT -#if FF_INTDEF != 2 -#error exFAT feature wants C99 or later -#endif -typedef QWORD FSIZE_t; -#if FF_LBA64 -typedef QWORD LBA_t; -#else -typedef DWORD LBA_t; -#endif -#else -#if FF_LBA64 -#error exFAT needs to be enabled when enable 64-bit LBA -#endif -typedef DWORD FSIZE_t; -typedef DWORD LBA_t; -#endif - - - -/* Filesystem object structure (FATFS) */ - -typedef struct { - BYTE fs_type; /* Filesystem type (0:not mounted) */ - BYTE pdrv; /* Associated physical drive */ - BYTE n_fats; /* Number of FATs (1 or 2) */ - BYTE wflag; /* win[] flag (b0:dirty) */ - BYTE fsi_flag; /* FSINFO flags (b7:disabled, b0:dirty) */ - WORD id; /* Volume mount ID */ - WORD n_rootdir; /* Number of root directory entries (FAT12/16) */ - WORD csize; /* Cluster size [sectors] */ -#if FF_MAX_SS != FF_MIN_SS - WORD ssize; /* Sector size (512, 1024, 2048 or 4096) */ -#endif -#if FF_USE_LFN - WCHAR* lfnbuf; /* LFN working buffer */ -#endif -#if FF_FS_EXFAT - BYTE* dirbuf; /* Directory entry block scratchpad buffer for exFAT */ -#endif -#if FF_FS_REENTRANT - FF_SYNC_t sobj; /* Identifier of sync object */ -#endif -#if !FF_FS_READONLY - DWORD last_clst; /* Last allocated cluster */ - DWORD free_clst; /* Number of free clusters */ -#endif -#if FF_FS_RPATH - DWORD cdir; /* Current directory start cluster (0:root) */ -#if FF_FS_EXFAT - DWORD cdc_scl; /* Containing directory start cluster (invalid when cdir is 0) */ - DWORD cdc_size; /* b31-b8:Size of containing directory, b7-b0: Chain status */ - DWORD cdc_ofs; /* Offset in the containing directory (invalid when cdir is 0) */ -#endif -#endif - DWORD n_fatent; /* Number of FAT entries (number of clusters + 2) */ - DWORD fsize; /* Size of an FAT [sectors] */ - LBA_t volbase; /* Volume base sector */ - LBA_t fatbase; /* FAT base sector */ - LBA_t dirbase; /* Root directory base sector/cluster */ - LBA_t database; /* Data base sector */ -#if FF_FS_EXFAT - LBA_t bitbase; /* Allocation bitmap base sector */ -#endif - LBA_t winsect; /* Current sector appearing in the win[] */ - BYTE win[FF_MAX_SS]; /* Disk access window for Directory, FAT (and file data at tiny cfg) */ -} FATFS; - - - -/* Object ID and allocation information (FFOBJID) */ - -typedef struct { - FATFS* fs; /* Pointer to the hosting volume of this object */ - WORD id; /* Hosting volume mount ID */ - BYTE attr; /* Object attribute */ - BYTE stat; /* Object chain status (b1-0: =0:not contiguous, =2:contiguous, =3:fragmented in this session, b2:sub-directory stretched) */ - DWORD sclust; /* Object data start cluster (0:no cluster or root directory) */ - FSIZE_t objsize; /* Object size (valid when sclust != 0) */ -#if FF_FS_EXFAT - DWORD n_cont; /* Size of first fragment - 1 (valid when stat == 3) */ - DWORD n_frag; /* Size of last fragment needs to be written to FAT (valid when not zero) */ - DWORD c_scl; /* Containing directory start cluster (valid when sclust != 0) */ - DWORD c_size; /* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */ - DWORD c_ofs; /* Offset in the containing directory (valid when file object and sclust != 0) */ -#endif -#if FF_FS_LOCK - UINT lockid; /* File lock ID origin from 1 (index of file semaphore table Files[]) */ -#endif -} FFOBJID; - - - -/* File object structure (FIL) */ - -typedef struct { - FFOBJID obj; /* Object identifier (must be the 1st member to detect invalid object pointer) */ - BYTE flag; /* File status flags */ - BYTE err; /* Abort flag (error code) */ - FSIZE_t fptr; /* File read/write pointer (Zeroed on file open) */ - DWORD clust; /* Current cluster of fpter (invalid when fptr is 0) */ - LBA_t sect; /* Sector number appearing in buf[] (0:invalid) */ -#if !FF_FS_READONLY - LBA_t dir_sect; /* Sector number containing the directory entry (not used at exFAT) */ - BYTE* dir_ptr; /* Pointer to the directory entry in the win[] (not used at exFAT) */ -#endif -#if FF_USE_FASTSEEK - DWORD* cltbl; /* Pointer to the cluster link map table (nulled on open, set by application) */ -#endif -#if !FF_FS_TINY - BYTE buf[FF_MAX_SS]; /* File private data read/write window */ -#endif -} FIL; - - - -/* Directory object structure (DIR) */ - -typedef struct { - FFOBJID obj; /* Object identifier */ - DWORD dptr; /* Current read/write offset */ - DWORD clust; /* Current cluster */ - LBA_t sect; /* Current sector (0:Read operation has terminated) */ - BYTE* dir; /* Pointer to the directory item in the win[] */ - BYTE fn[12]; /* SFN (in/out) {body[8],ext[3],status[1]} */ -#if FF_USE_LFN - DWORD blk_ofs; /* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */ -#endif -#if FF_USE_FIND - const TCHAR* pat; /* Pointer to the name matching pattern */ -#endif -} DIR; - - - -/* File information structure (FILINFO) */ - -typedef struct { - FSIZE_t fsize; /* File size */ - WORD fdate; /* Modified date */ - WORD ftime; /* Modified time */ - BYTE fattrib; /* File attribute */ -#if FF_USE_LFN - TCHAR altname[FF_SFN_BUF + 1];/* Altenative file name */ - TCHAR fname[FF_LFN_BUF + 1]; /* Primary file name */ -#else - TCHAR fname[12 + 1]; /* File name */ -#endif -} FILINFO; - - - -/* Format parameter structure (MKFS_PARM) */ - -typedef struct { - BYTE fmt; /* Format option (FM_FAT, FM_FAT32, FM_EXFAT and FM_SFD) */ - BYTE n_fat; /* Number of FATs */ - UINT align; /* Data area alignment (sector) */ - UINT n_root; /* Number of root directory entries */ - DWORD au_size; /* Cluster size (byte) */ -} MKFS_PARM; - - - -/* File function return code (FRESULT) */ - -typedef enum { - FR_OK = 0, /* (0) Succeeded */ - FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */ - FR_INT_ERR, /* (2) Assertion failed */ - FR_NOT_READY, /* (3) The physical drive cannot work */ - FR_NO_FILE, /* (4) Could not find the file */ - FR_NO_PATH, /* (5) Could not find the path */ - FR_INVALID_NAME, /* (6) The path name format is invalid */ - FR_DENIED, /* (7) Access denied due to prohibited access or directory full */ - FR_EXIST, /* (8) Access denied due to prohibited access */ - FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */ - FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */ - FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */ - FR_NOT_ENABLED, /* (12) The volume has no work area */ - FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */ - FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any problem */ - FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */ - FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */ - FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */ - FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > FF_FS_LOCK */ - FR_INVALID_PARAMETER /* (19) Given parameter is invalid */ -} FRESULT; - - - -/*--------------------------------------------------------------*/ -/* FatFs module application interface */ - -FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode); /* Open or create a file */ -FRESULT f_close (FIL* fp); /* Close an open file object */ -FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br); /* Read data from the file */ -FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw); /* Write data to the file */ -FRESULT f_lseek (FIL* fp, FSIZE_t ofs); /* Move file pointer of the file object */ -FRESULT f_truncate (FIL* fp); /* Truncate the file */ -FRESULT f_sync (FIL* fp); /* Flush cached data of the writing file */ -FRESULT f_opendir (DIR* dp, const TCHAR* path); /* Open a directory */ -FRESULT f_closedir (DIR* dp); /* Close an open directory */ -FRESULT f_readdir (DIR* dp, FILINFO* fno); /* Read a directory item */ -FRESULT f_findfirst (DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern); /* Find first file */ -FRESULT f_findnext (DIR* dp, FILINFO* fno); /* Find next file */ -FRESULT f_mkdir (const TCHAR* path); /* Create a sub directory */ -FRESULT f_unlink (const TCHAR* path); /* Delete an existing file or directory */ -FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new); /* Rename/Move a file or directory */ -FRESULT f_stat (const TCHAR* path, FILINFO* fno); /* Get file status */ -FRESULT f_chmod (const TCHAR* path, BYTE attr, BYTE mask); /* Change attribute of a file/dir */ -FRESULT f_utime (const TCHAR* path, const FILINFO* fno); /* Change timestamp of a file/dir */ -FRESULT f_chdir (const TCHAR* path); /* Change current directory */ -FRESULT f_chdrive (const TCHAR* path); /* Change current drive */ -FRESULT f_getcwd (TCHAR* buff, UINT len); /* Get current directory */ -FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs); /* Get number of free clusters on the drive */ -FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn); /* Get volume label */ -FRESULT f_setlabel (const TCHAR* label); /* Set volume label */ -FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf); /* Forward data to the stream */ -FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt); /* Allocate a contiguous block to the file */ -FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */ -FRESULT f_mkfs (const TCHAR* path, const MKFS_PARM* opt, void* work, UINT len); /* Create a FAT volume */ -FRESULT f_fdisk (BYTE pdrv, const LBA_t ptbl[], void* work); /* Divide a physical drive into some partitions */ -FRESULT f_setcp (WORD cp); /* Set current code page */ -int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */ -int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */ -int f_printf (FIL* fp, const TCHAR* str, ...); /* Put a formatted string to the file */ -TCHAR* f_gets (TCHAR* buff, int len, FIL* fp); /* Get a string from the file */ - -#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize)) -#define f_error(fp) ((fp)->err) -#define f_tell(fp) ((fp)->fptr) -#define f_size(fp) ((fp)->obj.objsize) -#define f_rewind(fp) f_lseek((fp), 0) -#define f_rewinddir(dp) f_readdir((dp), 0) -#define f_rmdir(path) f_unlink(path) -#define f_unmount(path) f_mount(0, path, 0) - -#ifndef EOF -#define EOF (-1) -#endif - - - - -/*--------------------------------------------------------------*/ -/* Additional user defined functions */ - -/* RTC function */ -#if !FF_FS_READONLY && !FF_FS_NORTC -DWORD get_fattime (void); -#endif - -/* LFN support functions */ -#if FF_USE_LFN >= 1 /* Code conversion (defined in unicode.c) */ -WCHAR ff_oem2uni (WCHAR oem, WORD cp); /* OEM code to Unicode conversion */ -WCHAR ff_uni2oem (DWORD uni, WORD cp); /* Unicode to OEM code conversion */ -DWORD ff_wtoupper (DWORD uni); /* Unicode upper-case conversion */ -#endif -#if FF_USE_LFN == 3 /* Dynamic memory allocation */ -void* ff_memalloc (UINT msize); /* Allocate memory block */ -void ff_memfree (void* mblock); /* Free memory block */ -#endif - -/* Sync functions */ -#if FF_FS_REENTRANT -int ff_cre_syncobj (BYTE vol, FF_SYNC_t* sobj); /* Create a sync object */ -int ff_req_grant (FF_SYNC_t sobj); /* Lock sync object */ -void ff_rel_grant (FF_SYNC_t sobj); /* Unlock sync object */ -int ff_del_syncobj (FF_SYNC_t sobj); /* Delete a sync object */ -#endif - - - - -/*--------------------------------------------------------------*/ -/* Flags and offset address */ - - -/* File access mode and open method flags (3rd argument of f_open) */ -#define FA_READ 0x01 -#define FA_WRITE 0x02 -#define FA_OPEN_EXISTING 0x00 -#define FA_CREATE_NEW 0x04 -#define FA_CREATE_ALWAYS 0x08 -#define FA_OPEN_ALWAYS 0x10 -#define FA_OPEN_APPEND 0x30 - -/* Fast seek controls (2nd argument of f_lseek) */ -#define CREATE_LINKMAP ((FSIZE_t)0 - 1) - -/* Format options (2nd argument of f_mkfs) */ -#define FM_FAT 0x01 -#define FM_FAT32 0x02 -#define FM_EXFAT 0x04 -#define FM_ANY 0x07 -#define FM_SFD 0x08 - -/* Filesystem type (FATFS.fs_type) */ -#define FS_FAT12 1 -#define FS_FAT16 2 -#define FS_FAT32 3 -#define FS_EXFAT 4 - -/* File attribute bits for directory entry (FILINFO.fattrib) */ -#define AM_RDO 0x01 /* Read only */ -#define AM_HID 0x02 /* Hidden */ -#define AM_SYS 0x04 /* System */ -#define AM_DIR 0x10 /* Directory */ -#define AM_ARC 0x20 /* Archive */ - - -#ifdef __cplusplus -} -#endif - -#endif /* FF_DEFINED */ diff --git a/fusee/common/fatfs/ffconf.h b/fusee/common/fatfs/ffconf.h deleted file mode 100644 index 4ce2a8d8d..000000000 --- a/fusee/common/fatfs/ffconf.h +++ /dev/null @@ -1,319 +0,0 @@ -/*---------------------------------------------------------------------------/ -/ FatFs Functional Configurations -/---------------------------------------------------------------------------*/ - -#define FFCONF_DEF 86606 /* Revision ID */ - -/*---------------------------------------------------------------------------/ -/ Function Configurations -/---------------------------------------------------------------------------*/ - -#define FF_FS_READONLY 0 -/* This option switches read-only configuration. (0:Read/Write or 1:Read-only) -/ Read-only configuration removes writing API functions, f_write(), f_sync(), -/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree() -/ and optional writing functions as well. */ - - -#define FF_FS_MINIMIZE 0 -/* This option defines minimization level to remove some basic API functions. -/ -/ 0: Basic functions are fully enabled. -/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename() -/ are removed. -/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1. -/ 3: f_lseek() function is removed in addition to 2. */ - - -#define FF_USE_STRFUNC 2 -/* This option switches string functions, f_gets(), f_putc(), f_puts() and f_printf(). -/ -/ 0: Disable string functions. -/ 1: Enable without LF-CRLF conversion. -/ 2: Enable with LF-CRLF conversion. */ - - -#define FF_USE_FIND 0 -/* This option switches filtered directory read functions, f_findfirst() and -/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */ - - -#define FF_USE_MKFS 0 -/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */ - - -#define FF_USE_FASTSEEK 0 -/* This option switches fast seek function. (0:Disable or 1:Enable) */ - - -#define FF_USE_EXPAND 0 -/* This option switches f_expand function. (0:Disable or 1:Enable) */ - - -#ifdef FUSEE_STAGE2_SRC -#define FF_USE_CHMOD 1 -#else -#define FF_USE_CHMOD 0 -#endif -/* This option switches attribute manipulation functions, f_chmod() and f_utime(). -/ (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */ - - -#define FF_USE_LABEL 0 -/* This option switches volume label functions, f_getlabel() and f_setlabel(). -/ (0:Disable or 1:Enable) */ - - -#define FF_USE_FORWARD 0 -/* This option switches f_forward() function. (0:Disable or 1:Enable) */ - - -/*---------------------------------------------------------------------------/ -/ Locale and Namespace Configurations -/---------------------------------------------------------------------------*/ - -#define FF_CODE_PAGE 850 -/* This option specifies the OEM code page to be used on the target system. -/ Incorrect code page setting can cause a file open failure. -/ -/ 437 - U.S. -/ 720 - Arabic -/ 737 - Greek -/ 771 - KBL -/ 775 - Baltic -/ 850 - Latin 1 -/ 852 - Latin 2 -/ 855 - Cyrillic -/ 857 - Turkish -/ 860 - Portuguese -/ 861 - Icelandic -/ 862 - Hebrew -/ 863 - Canadian French -/ 864 - Arabic -/ 865 - Nordic -/ 866 - Russian -/ 869 - Greek 2 -/ 932 - Japanese (DBCS) -/ 936 - Simplified Chinese (DBCS) -/ 949 - Korean (DBCS) -/ 950 - Traditional Chinese (DBCS) -/ 0 - Include all code pages above and configured by f_setcp() -*/ - - -#define FF_USE_LFN 1 -#define FF_MAX_LFN 255 -/* The FF_USE_LFN switches the support for LFN (long file name). -/ -/ 0: Disable LFN. FF_MAX_LFN has no effect. -/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe. -/ 2: Enable LFN with dynamic working buffer on the STACK. -/ 3: Enable LFN with dynamic working buffer on the HEAP. -/ -/ To enable the LFN, ffunicode.c needs to be added to the project. The LFN function -/ requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and -/ additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled. -/ The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can -/ be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN -/ specification. -/ When use stack for the working buffer, take care on stack overflow. When use heap -/ memory for the working buffer, memory management functions, ff_memalloc() and -/ ff_memfree() exemplified in ffsystem.c, need to be added to the project. */ - - -#define FF_LFN_UNICODE 2 -/* This option switches the character encoding on the API when LFN is enabled. -/ -/ 0: ANSI/OEM in current CP (TCHAR = char) -/ 1: Unicode in UTF-16 (TCHAR = WCHAR) -/ 2: Unicode in UTF-8 (TCHAR = char) -/ 3: Unicode in UTF-32 (TCHAR = DWORD) -/ -/ Also behavior of string I/O functions will be affected by this option. -/ When LFN is not enabled, this option has no effect. */ - - -#define FF_LFN_BUF 255 -#define FF_SFN_BUF 12 -/* This set of options defines size of file name members in the FILINFO structure -/ which is used to read out directory items. These values should be suffcient for -/ the file names to read. The maximum possible length of the read file name depends -/ on character encoding. When LFN is not enabled, these options have no effect. */ - - -#define FF_STRF_ENCODE 3 -/* When FF_LFN_UNICODE >= 1 with LFN enabled, string I/O functions, f_gets(), -/ f_putc(), f_puts and f_printf() convert the character encoding in it. -/ This option selects assumption of character encoding ON THE FILE to be -/ read/written via those functions. -/ -/ 0: ANSI/OEM in current CP -/ 1: Unicode in UTF-16LE -/ 2: Unicode in UTF-16BE -/ 3: Unicode in UTF-8 -*/ - - -#ifdef FUSEE_STAGE2_SRC -#define FF_FS_RPATH 2 -#else -#define FF_FS_RPATH 0 -#endif -/* This option configures support for relative path. -/ -/ 0: Disable relative path and remove related functions. -/ 1: Enable relative path. f_chdir() and f_chdrive() are available. -/ 2: f_getcwd() function is available in addition to 1. -*/ - - -/*---------------------------------------------------------------------------/ -/ Drive/Volume Configurations -/---------------------------------------------------------------------------*/ - -#ifdef FUSEE_STAGE2_SRC -#define FF_VOLUMES 10 -#else -#define FF_VOLUMES 1 -#endif -/* Number of volumes (logical drives) to be used. (1-10) */ - - -#ifdef FUSEE_STAGE2_SRC -#define FF_STR_VOLUME_ID 1 -//#define FF_VOLUME_STRS "sdmc" -#else -#define FF_STR_VOLUME_ID 0 -#define FF_VOLUME_STRS "sdmc" -#endif -/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings. -/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive -/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each -/ logical drives. Number of items must not be less than FF_VOLUMES. Valid -/ characters for the volume ID strings are A-Z, a-z and 0-9, however, they are -/ compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is -/ not defined, a user defined volume string table needs to be defined as: -/ -/ const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",... -*/ - - -#define FF_MULTI_PARTITION 0 -/* This option switches support for multiple volumes on the physical drive. -/ By default (0), each logical drive number is bound to the same physical drive -/ number and only an FAT volume found on the physical drive will be mounted. -/ When this function is enabled (1), each logical drive number can be bound to -/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk() -/ funciton will be available. */ - - -#define FF_MIN_SS 512 -#ifdef FUSEE_STAGE2_SRC -#define FF_MAX_SS 4096 -#else -#define FF_MAX_SS 512 -#endif -/* This set of options configures the range of sector size to be supported. (512, -/ 1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and -/ harddisk. But a larger value may be required for on-board flash memory and some -/ type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured -/ for variable sector size mode and disk_ioctl() function needs to implement -/ GET_SECTOR_SIZE command. */ - - -#define FF_LBA64 0 -/* This option switches support for 64-bit LBA. (0:Disable or 1:Enable) -/ To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */ - - -#define FF_MIN_GPT 0x100000000 -/* Minimum number of sectors to switch GPT format to create partition in f_mkfs and -/ f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */ - - -#define FF_USE_TRIM 0 -/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable) -/ To enable Trim function, also CTRL_TRIM command should be implemented to the -/ disk_ioctl() function. */ - - - -/*---------------------------------------------------------------------------/ -/ System Configurations -/---------------------------------------------------------------------------*/ - -#define FF_FS_TINY 0 -/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny) -/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes. -/ Instead of private sector buffer eliminated from the file object, common sector -/ buffer in the filesystem object (FATFS) is used for the file data transfer. */ - - -#define FF_FS_EXFAT 1 -/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable) -/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1) -/ Note that enabling exFAT discards ANSI C (C89) compatibility. */ - - -#define FF_FS_NORTC 1 -#define FF_NORTC_MON 1 -#define FF_NORTC_MDAY 1 -#define FF_NORTC_YEAR 2019 -/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have -/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable -/ the timestamp function. Every object modified by FatFs will have a fixed timestamp -/ defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time. -/ To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be -/ added to the project to read current time form real-time clock. FF_NORTC_MON, -/ FF_NORTC_MDAY and FF_NORTC_YEAR have no effect. -/ These options have no effect in read-only configuration (FF_FS_READONLY = 1). */ - - -#define FF_FS_NOFSINFO 0 -/* If you need to know correct free space on the FAT32 volume, set bit 0 of this -/ option, and f_getfree() function at first time after volume mount will force -/ a full FAT scan. Bit 1 controls the use of last allocated cluster number. -/ -/ bit0=0: Use free cluster count in the FSINFO if available. -/ bit0=1: Do not trust free cluster count in the FSINFO. -/ bit1=0: Use last allocated cluster number in the FSINFO if available. -/ bit1=1: Do not trust last allocated cluster number in the FSINFO. -*/ - - -#define FF_FS_LOCK 0 -/* The option FF_FS_LOCK switches file lock function to control duplicated file open -/ and illegal operation to open objects. This option must be 0 when FF_FS_READONLY -/ is 1. -/ -/ 0: Disable file lock function. To avoid volume corruption, application program -/ should avoid illegal open, remove and rename to the open objects. -/ >0: Enable file lock function. The value defines how many files/sub-directories -/ can be opened simultaneously under file lock control. Note that the file -/ lock control is independent of re-entrancy. */ - - -/* #include // O/S definitions */ -#define FF_FS_REENTRANT 0 -#define FF_FS_TIMEOUT 1000 -#define FF_SYNC_t HANDLE -/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs -/ module itself. Note that regardless of this option, file access to different -/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs() -/ and f_fdisk() function, are always not re-entrant. Only file/directory access -/ to the same volume is under control of this function. -/ -/ 0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect. -/ 1: Enable re-entrancy. Also user provided synchronization handlers, -/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj() -/ function, must be added to the project. Samples are available in -/ option/syscall.c. -/ -/ The FF_FS_TIMEOUT defines timeout period in unit of time tick. -/ The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*, -/ SemaphoreHandle_t and etc. A header file for O/S definitions needs to be -/ included somewhere in the scope of ff.h. */ - - - -/*--- End of configuration options ---*/ diff --git a/fusee/common/fatfs/ffsystem.c b/fusee/common/fatfs/ffsystem.c deleted file mode 100644 index ceac8b905..000000000 --- a/fusee/common/fatfs/ffsystem.c +++ /dev/null @@ -1,170 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Sample Code of OS Dependent Functions for FatFs */ -/* (C)ChaN, 2018 */ -/*------------------------------------------------------------------------*/ - - -#include "ff.h" - - -#if FF_USE_LFN == 3 /* Dynamic memory allocation */ - -/*------------------------------------------------------------------------*/ -/* Allocate a memory block */ -/*------------------------------------------------------------------------*/ - -void* ff_memalloc ( /* Returns pointer to the allocated memory block (null if not enough core) */ - UINT msize /* Number of bytes to allocate */ -) -{ - return malloc(msize); /* Allocate a new memory block with POSIX API */ -} - - -/*------------------------------------------------------------------------*/ -/* Free a memory block */ -/*------------------------------------------------------------------------*/ - -void ff_memfree ( - void* mblock /* Pointer to the memory block to free (nothing to do if null) */ -) -{ - free(mblock); /* Free the memory block with POSIX API */ -} - -#endif - - - -#if FF_FS_REENTRANT /* Mutal exclusion */ - -/*------------------------------------------------------------------------*/ -/* Create a Synchronization Object */ -/*------------------------------------------------------------------------*/ -/* This function is called in f_mount() function to create a new -/ synchronization object for the volume, such as semaphore and mutex. -/ When a 0 is returned, the f_mount() function fails with FR_INT_ERR. -*/ - -//const osMutexDef_t Mutex[FF_VOLUMES]; /* Table of CMSIS-RTOS mutex */ - - -int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */ - BYTE vol, /* Corresponding volume (logical drive number) */ - FF_SYNC_t* sobj /* Pointer to return the created sync object */ -) -{ - /* Win32 */ - *sobj = CreateMutex(NULL, FALSE, NULL); - return (int)(*sobj != INVALID_HANDLE_VALUE); - - /* uITRON */ -// T_CSEM csem = {TA_TPRI,1,1}; -// *sobj = acre_sem(&csem); -// return (int)(*sobj > 0); - - /* uC/OS-II */ -// OS_ERR err; -// *sobj = OSMutexCreate(0, &err); -// return (int)(err == OS_NO_ERR); - - /* FreeRTOS */ -// *sobj = xSemaphoreCreateMutex(); -// return (int)(*sobj != NULL); - - /* CMSIS-RTOS */ -// *sobj = osMutexCreate(&Mutex[vol]); -// return (int)(*sobj != NULL); -} - - -/*------------------------------------------------------------------------*/ -/* Delete a Synchronization Object */ -/*------------------------------------------------------------------------*/ -/* This function is called in f_mount() function to delete a synchronization -/ object that created with ff_cre_syncobj() function. When a 0 is returned, -/ the f_mount() function fails with FR_INT_ERR. -*/ - -int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to an error */ - FF_SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ -) -{ - /* Win32 */ - return (int)CloseHandle(sobj); - - /* uITRON */ -// return (int)(del_sem(sobj) == E_OK); - - /* uC/OS-II */ -// OS_ERR err; -// OSMutexDel(sobj, OS_DEL_ALWAYS, &err); -// return (int)(err == OS_NO_ERR); - - /* FreeRTOS */ -// vSemaphoreDelete(sobj); -// return 1; - - /* CMSIS-RTOS */ -// return (int)(osMutexDelete(sobj) == osOK); -} - - -/*------------------------------------------------------------------------*/ -/* Request Grant to Access the Volume */ -/*------------------------------------------------------------------------*/ -/* This function is called on entering file functions to lock the volume. -/ When a 0 is returned, the file function fails with FR_TIMEOUT. -*/ - -int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */ - FF_SYNC_t sobj /* Sync object to wait */ -) -{ - /* Win32 */ - return (int)(WaitForSingleObject(sobj, FF_FS_TIMEOUT) == WAIT_OBJECT_0); - - /* uITRON */ -// return (int)(wai_sem(sobj) == E_OK); - - /* uC/OS-II */ -// OS_ERR err; -// OSMutexPend(sobj, FF_FS_TIMEOUT, &err)); -// return (int)(err == OS_NO_ERR); - - /* FreeRTOS */ -// return (int)(xSemaphoreTake(sobj, FF_FS_TIMEOUT) == pdTRUE); - - /* CMSIS-RTOS */ -// return (int)(osMutexWait(sobj, FF_FS_TIMEOUT) == osOK); -} - - -/*------------------------------------------------------------------------*/ -/* Release Grant to Access the Volume */ -/*------------------------------------------------------------------------*/ -/* This function is called on leaving file functions to unlock the volume. -*/ - -void ff_rel_grant ( - FF_SYNC_t sobj /* Sync object to be signaled */ -) -{ - /* Win32 */ - ReleaseMutex(sobj); - - /* uITRON */ -// sig_sem(sobj); - - /* uC/OS-II */ -// OSMutexPost(sobj); - - /* FreeRTOS */ -// xSemaphoreGive(sobj); - - /* CMSIS-RTOS */ -// osMutexRelease(sobj); -} - -#endif - diff --git a/fusee/common/fatfs/ffunicode.c b/fusee/common/fatfs/ffunicode.c deleted file mode 100644 index db75b4026..000000000 --- a/fusee/common/fatfs/ffunicode.c +++ /dev/null @@ -1,15593 +0,0 @@ -/*------------------------------------------------------------------------*/ -/* Unicode handling functions for FatFs R0.13+ */ -/*------------------------------------------------------------------------*/ -/* This module will occupy a huge memory in the .const section when the / -/ FatFs is configured for LFN with DBCS. If the system has any Unicode / -/ utilitiy for the code conversion, this module should be modified to use / -/ that function to avoid silly memory consumption. / -/-------------------------------------------------------------------------*/ -/* -/ Copyright (C) 2014, ChaN, all right reserved. -/ -/ FatFs module is an open source software. Redistribution and use of FatFs in -/ source and binary forms, with or without modification, are permitted provided -/ that the following condition is met: -/ -/ 1. Redistributions of source code must retain the above copyright notice, -/ this condition and the following disclaimer. -/ -/ This software is provided by the copyright holder and contributors "AS IS" -/ and any warranties related to this software are DISCLAIMED. -/ The copyright owner or contributors be NOT LIABLE for any damages caused -/ by use of this software. -*/ - - -#include "ff.h" - -#if FF_USE_LFN /* This module will be blanked if non-LFN configuration */ - -#define MERGE2(a, b) a ## b -#define CVTBL(tbl, cp) MERGE2(tbl, cp) - - -/*------------------------------------------------------------------------*/ -/* Code Conversion Tables */ -/*------------------------------------------------------------------------*/ - -#if FF_CODE_PAGE == 932 || FF_CODE_PAGE == 0 /* Japanese */ -static const WCHAR uni2oem932[] = { /* Unicode --> Shift_JIS pairs */ - 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, - 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, - 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0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, 0xFFE0, 0x8191, - 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 -}; - -static const WCHAR oem2uni932[] = { /* Shift_JIS --> Unicode pairs */ - 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, - 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, - 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, - 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, - 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, - 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, - 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0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, - 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, - 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, - 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, - 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, - 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, - 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, - 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, - 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, - 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, - 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, - 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, - 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, - 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, - 0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1, 0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4, - 0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9, 0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD, - 0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1, 0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5, - 0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9, 0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED, - 0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1, 0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA, - 0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD, - 0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846, 0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847, - 0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1, 0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5, - 0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9, 0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1, - 0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5, 0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9, - 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0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF, 0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3, - 0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7, 0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3, - 0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 0xA2B7, 0x248F, 0xA2B8, 0x2490, 0xA2B9, 0x2491, 0xA2BA, 0x2492, 0xA2BB, - 0x2493, 0xA2BC, 0x2494, 0xA2BD, 0x2495, 0xA2BE, 0x2496, 0xA2BF, 0x2497, 0xA2C0, 0x2498, 0xA2C1, 0x2499, 0xA2C2, 0x249A, 0xA2C3, - 0x249B, 0xA2C4, 0x2500, 0xA9A4, 0x2501, 0xA9A5, 0x2502, 0xA9A6, 0x2503, 0xA9A7, 0x2504, 0xA9A8, 0x2505, 0xA9A9, 0x2506, 0xA9AA, - 0x2507, 0xA9AB, 0x2508, 0xA9AC, 0x2509, 0xA9AD, 0x250A, 0xA9AE, 0x250B, 0xA9AF, 0x250C, 0xA9B0, 0x250D, 0xA9B1, 0x250E, 0xA9B2, - 0x250F, 0xA9B3, 0x2510, 0xA9B4, 0x2511, 0xA9B5, 0x2512, 0xA9B6, 0x2513, 0xA9B7, 0x2514, 0xA9B8, 0x2515, 0xA9B9, 0x2516, 0xA9BA, - 0x2517, 0xA9BB, 0x2518, 0xA9BC, 0x2519, 0xA9BD, 0x251A, 0xA9BE, 0x251B, 0xA9BF, 0x251C, 0xA9C0, 0x251D, 0xA9C1, 0x251E, 0xA9C2, - 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0x9EBB, 0xC2E9, 0x9EBC, 0xFC4E, 0x9EBD, 0xF7E1, 0x9EBE, 0xF7E2, 0x9EBF, 0xFC4F, 0x9EC0, 0xFC50, 0x9EC1, 0xFC51, 0x9EC2, 0xFC52, - 0x9EC3, 0xFC53, 0x9EC4, 0xBBC6, 0x9EC5, 0xFC54, 0x9EC6, 0xFC55, 0x9EC7, 0xFC56, 0x9EC8, 0xFC57, 0x9EC9, 0xD9E4, 0x9ECA, 0xFC58, - 0x9ECB, 0xFC59, 0x9ECC, 0xFC5A, 0x9ECD, 0xCAF2, 0x9ECE, 0xC0E8, 0x9ECF, 0xF0A4, 0x9ED0, 0xFC5B, 0x9ED1, 0xBADA, 0x9ED2, 0xFC5C, - 0x9ED3, 0xFC5D, 0x9ED4, 0xC7AD, 0x9ED5, 0xFC5E, 0x9ED6, 0xFC5F, 0x9ED7, 0xFC60, 0x9ED8, 0xC4AC, 0x9ED9, 0xFC61, 0x9EDA, 0xFC62, - 0x9EDB, 0xF7EC, 0x9EDC, 0xF7ED, 0x9EDD, 0xF7EE, 0x9EDE, 0xFC63, 0x9EDF, 0xF7F0, 0x9EE0, 0xF7EF, 0x9EE1, 0xFC64, 0x9EE2, 0xF7F1, - 0x9EE3, 0xFC65, 0x9EE4, 0xFC66, 0x9EE5, 0xF7F4, 0x9EE6, 0xFC67, 0x9EE7, 0xF7F3, 0x9EE8, 0xFC68, 0x9EE9, 0xF7F2, 0x9EEA, 0xF7F5, - 0x9EEB, 0xFC69, 0x9EEC, 0xFC6A, 0x9EED, 0xFC6B, 0x9EEE, 0xFC6C, 0x9EEF, 0xF7F6, 0x9EF0, 0xFC6D, 0x9EF1, 0xFC6E, 0x9EF2, 0xFC6F, - 0x9EF3, 0xFC70, 0x9EF4, 0xFC71, 0x9EF5, 0xFC72, 0x9EF6, 0xFC73, 0x9EF7, 0xFC74, 0x9EF8, 0xFC75, 0x9EF9, 0xEDE9, 0x9EFA, 0xFC76, - 0x9EFB, 0xEDEA, 0x9EFC, 0xEDEB, 0x9EFD, 0xFC77, 0x9EFE, 0xF6BC, 0x9EFF, 0xFC78, 0x9F00, 0xFC79, 0x9F01, 0xFC7A, 0x9F02, 0xFC7B, - 0x9F03, 0xFC7C, 0x9F04, 0xFC7D, 0x9F05, 0xFC7E, 0x9F06, 0xFC80, 0x9F07, 0xFC81, 0x9F08, 0xFC82, 0x9F09, 0xFC83, 0x9F0A, 0xFC84, - 0x9F0B, 0xF6BD, 0x9F0C, 0xFC85, 0x9F0D, 0xF6BE, 0x9F0E, 0xB6A6, 0x9F0F, 0xFC86, 0x9F10, 0xD8BE, 0x9F11, 0xFC87, 0x9F12, 0xFC88, - 0x9F13, 0xB9C4, 0x9F14, 0xFC89, 0x9F15, 0xFC8A, 0x9F16, 0xFC8B, 0x9F17, 0xD8BB, 0x9F18, 0xFC8C, 0x9F19, 0xDCB1, 0x9F1A, 0xFC8D, - 0x9F1B, 0xFC8E, 0x9F1C, 0xFC8F, 0x9F1D, 0xFC90, 0x9F1E, 0xFC91, 0x9F1F, 0xFC92, 0x9F20, 0xCAF3, 0x9F21, 0xFC93, 0x9F22, 0xF7F7, - 0x9F23, 0xFC94, 0x9F24, 0xFC95, 0x9F25, 0xFC96, 0x9F26, 0xFC97, 0x9F27, 0xFC98, 0x9F28, 0xFC99, 0x9F29, 0xFC9A, 0x9F2A, 0xFC9B, - 0x9F2B, 0xFC9C, 0x9F2C, 0xF7F8, 0x9F2D, 0xFC9D, 0x9F2E, 0xFC9E, 0x9F2F, 0xF7F9, 0x9F30, 0xFC9F, 0x9F31, 0xFCA0, 0x9F32, 0xFD40, - 0x9F33, 0xFD41, 0x9F34, 0xFD42, 0x9F35, 0xFD43, 0x9F36, 0xFD44, 0x9F37, 0xF7FB, 0x9F38, 0xFD45, 0x9F39, 0xF7FA, 0x9F3A, 0xFD46, - 0x9F3B, 0xB1C7, 0x9F3C, 0xFD47, 0x9F3D, 0xF7FC, 0x9F3E, 0xF7FD, 0x9F3F, 0xFD48, 0x9F40, 0xFD49, 0x9F41, 0xFD4A, 0x9F42, 0xFD4B, - 0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E, 0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52, - 0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56, 0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58, - 0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C, 0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60, - 0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64, 0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68, - 0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C, 0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70, - 0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74, 0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78, - 0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C, 0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81, - 0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85, 0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87, - 0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6, 0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA, - 0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89, 0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D, - 0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91, 0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8, - 0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96, 0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98, - 0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C, 0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0, - 0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43, 0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47, - 0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B, 0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F, - 0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5, 0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1, - 0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF, 0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5, - 0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB, 0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B, - 0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F, 0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973, - 0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977, 0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B, - 0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980, 0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984, - 0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988, 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7, - 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, - 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, - 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, - 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, - 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, - 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, - 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, - 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, - 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, - 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, - 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, - 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, - 0, 0 -}; - -static const WCHAR oem2uni936[] = { /* GBK --> Unicode pairs */ - 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, - 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, - 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, - 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, - 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, - 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0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, - 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, - 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, - 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, - 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, - 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, - 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, - 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, - 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, - 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, - 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, - 0, 0 -}; - -static const WCHAR oem2uni949[] = { /* Korean --> Unicode pairs */ - 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, - 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, - 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, - 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, - 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, - 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, - 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, - 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, - 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, - 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, - 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, - 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, - 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, - 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, - 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, - 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, - 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, - 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, - 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, - 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, - 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, - 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, - 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, - 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, - 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, - 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, - 0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F, 0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43, - 0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B, 0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F, - 0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55, 0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A, - 0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E, 0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64, - 0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68, 0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E, - 0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77, 0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E, - 0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85, 0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B, - 0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91, 0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95, - 0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99, 0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F, - 0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3, 0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8, - 0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC, 0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0, - 0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4, 0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9, - 0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD, 0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3, - 0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9, 0x82D7, 0xADCA, 0x82D8, 0xADCB, 0x82D9, 0xADCC, 0x82DA, 0xADCD, - 0x82DB, 0xADCE, 0x82DC, 0xADCF, 0x82DD, 0xADD2, 0x82DE, 0xADD4, 0x82DF, 0xADD5, 0x82E0, 0xADD6, 0x82E1, 0xADD7, 0x82E2, 0xADD8, - 0x82E3, 0xADD9, 0x82E4, 0xADDA, 0x82E5, 0xADDB, 0x82E6, 0xADDD, 0x82E7, 0xADDE, 0x82E8, 0xADDF, 0x82E9, 0xADE1, 0x82EA, 0xADE2, - 0x82EB, 0xADE3, 0x82EC, 0xADE5, 0x82ED, 0xADE6, 0x82EE, 0xADE7, 0x82EF, 0xADE8, 0x82F0, 0xADE9, 0x82F1, 0xADEA, 0x82F2, 0xADEB, - 0x82F3, 0xADEC, 0x82F4, 0xADED, 0x82F5, 0xADEE, 0x82F6, 0xADEF, 0x82F7, 0xADF0, 0x82F8, 0xADF1, 0x82F9, 0xADF2, 0x82FA, 0xADF3, - 0x82FB, 0xADF4, 0x82FC, 0xADF5, 0x82FD, 0xADF6, 0x82FE, 0xADF7, 0x8341, 0xADFA, 0x8342, 0xADFB, 0x8343, 0xADFD, 0x8344, 0xADFE, - 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0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, - 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, - 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, - 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, - 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, - 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, - 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, - 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, - 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, - 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, - 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, - 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, - 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, - 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, - 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, - 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, - 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, - 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, - 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, - 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, - 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, - 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, - 0, 0 -}; -#endif - -#if FF_CODE_PAGE == 950 || FF_CODE_PAGE == 0 /* Traditional Chinese */ -static const WCHAR uni2oem950[] = { /* Unicode --> Big5 pairs */ - 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, - 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, - 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, - 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, - 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, - 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, - 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, - 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, - 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, - 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, - 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, - 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, - 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, - 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, - 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, - 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, 0x2524, 0xA274, 0x252C, 0xA273, 0x2534, 0xA272, 0x253C, 0xA271, - 0x2550, 0xA2A4, 0x2550, 0xF9F9, 0x2551, 0xF9F8, 0x2552, 0xF9E6, 0x2553, 0xF9EF, 0x2554, 0xF9DD, 0x2555, 0xF9E8, 0x2556, 0xF9F1, - 0x2557, 0xF9DF, 0x2558, 0xF9EC, 0x2559, 0xF9F5, 0x255A, 0xF9E3, 0x255B, 0xF9EE, 0x255C, 0xF9F7, 0x255D, 0xF9E5, 0x255E, 0xA2A5, - 0x255E, 0xF9E9, 0x255F, 0xF9F2, 0x2560, 0xF9E0, 0x2561, 0xA2A7, 0x2561, 0xF9EB, 0x2562, 0xF9F4, 0x2563, 0xF9E2, 0x2564, 0xF9E7, - 0x2565, 0xF9F0, 0x2566, 0xF9DE, 0x2567, 0xF9ED, 0x2568, 0xF9F6, 0x2569, 0xF9E4, 0x256A, 0xA2A6, 0x256A, 0xF9EA, 0x256B, 0xF9F3, - 0x256C, 0xF9E1, 0x256D, 0xA27E, 0x256D, 0xF9FA, 0x256E, 0xA2A1, 0x256E, 0xF9FB, 0x256F, 0xA2A3, 0x256F, 0xF9FD, 0x2570, 0xA2A2, - 0x2570, 0xF9FC, 0x2571, 0xA2AC, 0x2572, 0xA2AD, 0x2573, 0xA2AE, 0x2574, 0xA15A, 0x2581, 0xA262, 0x2582, 0xA263, 0x2583, 0xA264, - 0x2584, 0xA265, 0x2585, 0xA266, 0x2586, 0xA267, 0x2587, 0xA268, 0x2588, 0xA269, 0x2589, 0xA270, 0x258A, 0xA26F, 0x258B, 0xA26E, - 0x258C, 0xA26D, 0x258D, 0xA26C, 0x258E, 0xA26B, 0x258F, 0xA26A, 0x2593, 0xF9FE, 0x2594, 0xA276, 0x2595, 0xA279, 0x25A0, 0xA1BD, - 0x25A1, 0xA1BC, 0x25B2, 0xA1B6, 0x25B3, 0xA1B5, 0x25BC, 0xA1BF, 0x25BD, 0xA1BE, 0x25C6, 0xA1BB, 0x25C7, 0xA1BA, 0x25CB, 0xA1B3, - 0x25CE, 0xA1B7, 0x25CF, 0xA1B4, 0x25E2, 0xA2A8, 0x25E3, 0xA2A9, 0x25E4, 0xA2AB, 0x25E5, 0xA2AA, 0x2605, 0xA1B9, 0x2606, 0xA1B8, - 0x2640, 0xA1F0, 0x2642, 0xA1F1, 0x3000, 0xA140, 0x3001, 0xA142, 0x3002, 0xA143, 0x3003, 0xA1B2, 0x3008, 0xA171, 0x3009, 0xA172, - 0x300A, 0xA16D, 0x300B, 0xA16E, 0x300C, 0xA175, 0x300D, 0xA176, 0x300E, 0xA179, 0x300F, 0xA17A, 0x3010, 0xA169, 0x3011, 0xA16A, - 0x3012, 0xA245, 0x3014, 0xA165, 0x3015, 0xA166, 0x301D, 0xA1A9, 0x301E, 0xA1AA, 0x3021, 0xA2C3, 0x3022, 0xA2C4, 0x3023, 0xA2C5, - 0x3024, 0xA2C6, 0x3025, 0xA2C7, 0x3026, 0xA2C8, 0x3027, 0xA2C9, 0x3028, 0xA2CA, 0x3029, 0xA2CB, 0x3105, 0xA374, 0x3106, 0xA375, - 0x3107, 0xA376, 0x3108, 0xA377, 0x3109, 0xA378, 0x310A, 0xA379, 0x310B, 0xA37A, 0x310C, 0xA37B, 0x310D, 0xA37C, 0x310E, 0xA37D, - 0x310F, 0xA37E, 0x3110, 0xA3A1, 0x3111, 0xA3A2, 0x3112, 0xA3A3, 0x3113, 0xA3A4, 0x3114, 0xA3A5, 0x3115, 0xA3A6, 0x3116, 0xA3A7, - 0x3117, 0xA3A8, 0x3118, 0xA3A9, 0x3119, 0xA3AA, 0x311A, 0xA3AB, 0x311B, 0xA3AC, 0x311C, 0xA3AD, 0x311D, 0xA3AE, 0x311E, 0xA3AF, - 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0x9EA0, 0xF8E8, 0x9EA1, 0xF963, 0x9EA4, 0xF9D2, 0x9EA5, 0xB3C1, 0x9EA7, 0xE4E5, 0x9EA9, 0xBEA2, 0x9EAD, 0xECB3, 0x9EAE, 0xECB2, - 0x9EB0, 0xEFAD, 0x9EB4, 0xC454, 0x9EB5, 0xC4D1, 0x9EB6, 0xF7C7, 0x9EB7, 0xF9CB, 0x9EBB, 0xB3C2, 0x9EBC, 0xBBF2, 0x9EBE, 0xBEA3, - 0x9EC0, 0xF3F4, 0x9EC2, 0xF874, 0x9EC3, 0xB6C0, 0x9EC8, 0xEFAE, 0x9ECC, 0xC664, 0x9ECD, 0xB6C1, 0x9ECE, 0xBEA4, 0x9ECF, 0xC248, - 0x9ED0, 0xF875, 0x9ED1, 0xB6C2, 0x9ED3, 0xE8F1, 0x9ED4, 0xC072, 0x9ED5, 0xECB4, 0x9ED6, 0xECB5, 0x9ED8, 0xC071, 0x9EDA, 0xEFAF, - 0x9EDB, 0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249, 0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4, - 0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB, 0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8, - 0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964, 0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6, - 0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1, 0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652, - 0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2, 0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D, - 0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0, 0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB, - 0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, - 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, - 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, - 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, - 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, - 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, - 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, - 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, - 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, - 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, - 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, - 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, - 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, - 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, - 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, - 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, - 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, - 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, - 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, - 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, - 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, - 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, - 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, - 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, - 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, - 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, - 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, - 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, - 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 -}; - -static const WCHAR oem2uni950[] = { /* Big5 --> Unicode pairs */ - 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, - 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, - 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, - 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, - 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, - 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, - 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, - 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, - 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, - 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, - 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, - 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, - 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, - 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, - 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, - 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, - 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, - 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0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D, 0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13, - 0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060, 0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5, - 0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A, 0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643, - 0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B, 0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F, - 0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD, 0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469, - 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, - 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, - 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, - 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, - 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, - 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, - 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, - 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, - 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, - 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, - 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, - 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, - 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, - 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, - 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, - 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, - 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, - 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, - 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, - 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, - 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, - 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, - 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, - 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, - 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, - 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 -}; -#endif - -#if FF_CODE_PAGE == 437 || FF_CODE_PAGE == 0 -static const WCHAR uc437[] = { /* CP437(U.S.) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 720 || FF_CODE_PAGE == 0 -static const WCHAR uc720[] = { /* CP720(Arabic) to Unicode conversion table */ - 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, - 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, - 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, - 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0x0650, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 737 || FF_CODE_PAGE == 0 -static const WCHAR uc737[] = { /* CP737(Greek) to Unicode conversion table */ - 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, - 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, - 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, - 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 771 || FF_CODE_PAGE == 0 -static const WCHAR uc771[] = { /* CP771(KBL) to Unicode conversion table */ - 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, - 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, - 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x0104, 0x0105, 0x010C, 0x010D, - 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, - 0x0118, 0x0119, 0x0116, 0x0117, 0x012E, 0x012F, 0x0160, 0x0161, 0x0172, 0x0173, 0x016A, 0x016B, 0x017D, 0x017E, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 775 || FF_CODE_PAGE == 0 -static const WCHAR uc775[] = { /* CP775(Baltic) to Unicode conversion table */ - 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, - 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, - 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, - 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 850 || FF_CODE_PAGE == 0 -static const WCHAR uc850[] = { /* CP850(Latin 1) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, - 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 852 || FF_CODE_PAGE == 0 -static const WCHAR uc852[] = { /* CP852(Latin 2) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, - 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, - 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 855 || FF_CODE_PAGE == 0 -static const WCHAR uc855[] = { /* CP855(Cyrillic) to Unicode conversion table */ - 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, - 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, - 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, - 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, - 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 857 || FF_CODE_PAGE == 0 -static const WCHAR uc857[] = { /* CP857(Turkish) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, - 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, - 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, - 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 860 || FF_CODE_PAGE == 0 -static const WCHAR uc860[] = { /* CP860(Portuguese) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E3, 0x00E0, 0x00C1, 0x00E7, 0x00EA, 0x00CA, 0x00E8, 0x00CD, 0x00D4, 0x00EC, 0x00C3, 0x00C2, - 0x00C9, 0x00C0, 0x00C8, 0x00F4, 0x00F5, 0x00F2, 0x00DA, 0x00F9, 0x00CC, 0x00D5, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x20A7, 0x00D3, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00D2, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 861 || FF_CODE_PAGE == 0 -static const WCHAR uc861[] = { /* CP861(Icelandic) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00D0, 0x00F0, 0x00DE, 0x00C4, 0x00C5, - 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00FE, 0x00FB, 0x00DD, 0x00FD, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00C1, 0x00CD, 0x00D3, 0x00DA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 862 || FF_CODE_PAGE == 0 -static const WCHAR uc862[] = { /* CP862(Hebrew) to Unicode conversion table */ - 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, - 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 863 || FF_CODE_PAGE == 0 -static const WCHAR uc863[] = { /* CP863(Canadian French) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00C2, 0x00E0, 0x00B6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x2017, 0x00C0, - 0x00C9, 0x00C8, 0x00CA, 0x00F4, 0x00CB, 0x00CF, 0x00FB, 0x00F9, 0x00A4, 0x00D4, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x00DB, 0x0192, - 0x00A6, 0x00B4, 0x00F3, 0x00FA, 0x00A8, 0x00BB, 0x00B3, 0x00AF, 0x00CE, 0x3210, 0x00AC, 0x00BD, 0x00BC, 0x00BE, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2219, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 864 || FF_CODE_PAGE == 0 -static const WCHAR uc864[] = { /* CP864(Arabic) to Unicode conversion table */ - 0x00B0, 0x00B7, 0x2219, 0x221A, 0x2592, 0x2500, 0x2502, 0x253C, 0x2524, 0x252C, 0x251C, 0x2534, 0x2510, 0x250C, 0x2514, 0x2518, - 0x03B2, 0x221E, 0x03C6, 0x00B1, 0x00BD, 0x00BC, 0x2248, 0x00AB, 0x00BB, 0xFEF7, 0xFEF8, 0x0000, 0x0000, 0xFEFB, 0xFEFC, 0x0000, - 0x00A0, 0x00AD, 0xFE82, 0x00A3, 0x00A4, 0xFE84, 0x0000, 0x20AC, 0xFE8E, 0xFE8F, 0xFE95, 0xFE99, 0x060C, 0xFE9D, 0xFEA1, 0xFEA5, - 0x0660, 0x0661, 0x0662, 0x0663, 0x0664, 0x0665, 0x0666, 0x0667, 0x0668, 0x0669, 0xFED1, 0x061B, 0xFEB1, 0xFEB5, 0xFEB9, 0x061F, - 0x00A2, 0xFE80, 0xFE81, 0xFE83, 0xFE85, 0xFECA, 0xFE8B, 0xFE8D, 0xFE91, 0xFE93, 0xFE97, 0xFE9B, 0xFE9F, 0xFEA3, 0xFEA7, 0xFEA9, - 0xFEAB, 0xFEAD, 0xFEAF, 0xFEB3, 0xFEB7, 0xFEBB, 0xFEBF, 0xFEC1, 0xFEC5, 0xFECB, 0xFECF, 0x00A6, 0x00AC, 0x00F7, 0x00D7, 0xFEC9, - 0x0640, 0xFED3, 0xFED7, 0xFEDB, 0xFEDF, 0xFEE3, 0xFEE7, 0xFEEB, 0xFEED, 0xFEEF, 0xFEF3, 0xFEBD, 0xFECC, 0xFECE, 0xFECD, 0xFEE1, - 0xFE7D, 0x0651, 0xFEE5, 0xFEE9, 0xFEEC, 0xFEF0, 0xFEF2, 0xFED0, 0xFED5, 0xFEF5, 0xFEF6, 0xFEDD, 0xFED9, 0xFEF1, 0x25A0, 0x0000 -}; -#endif -#if FF_CODE_PAGE == 865 || FF_CODE_PAGE == 0 -static const WCHAR uc865[] = { /* CP865(Nordic) to Unicode conversion table */ - 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, - 0x00C5, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192, - 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00A4, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, - 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 866 || FF_CODE_PAGE == 0 -static const WCHAR uc866[] = { /* CP866(Russian) to Unicode conversion table */ - 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, - 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, - 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, - 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, - 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, - 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 -}; -#endif -#if FF_CODE_PAGE == 869 || FF_CODE_PAGE == 0 -static const WCHAR uc869[] = { /* CP869(Greek 2) to Unicode conversion table */ - 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x0386, 0x00B7, 0x00B7, 0x00AC, 0x00A6, 0x2018, 0x2019, 0x0388, 0x2015, 0x0389, - 0x038A, 0x03AA, 0x038C, 0x00B7, 0x00B7, 0x038E, 0x03AB, 0x00A9, 0x038F, 0x00B2, 0x00B3, 0x03AC, 0x00A3, 0x03AD, 0x03AE, 0x03AF, - 0x03CA, 0x0390, 0x03CC, 0x03CD, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x00BD, 0x0398, 0x0399, 0x00AB, 0x00BB, - 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x039A, 0x039B, 0x039C, 0x039D, 0x2563, 0x2551, 0x2557, 0x255D, 0x039E, 0x039F, 0x2510, - 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0A30, 0x03A1, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x03A3, - 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x2518, 0x250C, 0x2588, 0x2584, 0x03B4, 0x03B5, 0x2580, - 0x03B6, 0x03B7, 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x0384, - 0x00AD, 0x00B1, 0x03C5, 0x03C6, 0x03C7, 0x00A7, 0x03C8, 0x0385, 0x00B0, 0x00A8, 0x03C9, 0x03CB, 0x03B0, 0x03CE, 0x25A0, 0x00A0 -}; -#endif - - - - -/*------------------------------------------------------------------------*/ -/* OEM <==> Unicode conversions for static code page configuration */ -/* SBCS fixed code page */ -/*------------------------------------------------------------------------*/ - -#if FF_CODE_PAGE != 0 && FF_CODE_PAGE < 900 -WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ - DWORD uni, /* UTF-16 encoded character to be converted */ - WORD cp /* Code page for the conversion */ -) -{ - WCHAR c = 0; - const WCHAR *p = CVTBL(uc, FF_CODE_PAGE); - - - if (uni < 0x80) { /* ASCII? */ - c = (WCHAR)uni; - - } else { /* Non-ASCII */ - if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */ - for (c = 0; c < 0x80 && uni != p[c]; c++) ; - c = (c + 0x80) & 0xFF; - } - } - - return c; -} - -WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ - WCHAR oem, /* OEM code to be converted */ - WORD cp /* Code page for the conversion */ -) -{ - WCHAR c = 0; - const WCHAR *p = CVTBL(uc, FF_CODE_PAGE); - - - if (oem < 0x80) { /* ASCII? */ - c = oem; - - } else { /* Extended char */ - if (cp == FF_CODE_PAGE) { /* Is it a valid code page? */ - if (oem < 0x100) c = p[oem - 0x80]; - } - } - - return c; -} - -#endif - - - -/*------------------------------------------------------------------------*/ -/* OEM <==> Unicode conversions for static code page configuration */ -/* DBCS fixed code page */ -/*------------------------------------------------------------------------*/ - -#if FF_CODE_PAGE >= 900 -WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ - DWORD uni, /* UTF-16 encoded character to be converted */ - WORD cp /* Code page for the conversion */ -) -{ - const WCHAR *p; - WCHAR c = 0, uc; - UINT i = 0, n, li, hi; - - - if (uni < 0x80) { /* ASCII? */ - c = (WCHAR)uni; - - } else { /* Non-ASCII */ - if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */ - uc = (WCHAR)uni; - p = CVTBL(uni2oem, FF_CODE_PAGE); - hi = sizeof CVTBL(uni2oem, FF_CODE_PAGE) / 4 - 1; - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (uc == p[i * 2]) break; - if (uc > p[i * 2]) { - li = i; - } else { - hi = i; - } - } - if (n != 0) c = p[i * 2 + 1]; - } - } - - return c; -} - - -WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ - WCHAR oem, /* OEM code to be converted */ - WORD cp /* Code page for the conversion */ -) -{ - const WCHAR *p; - WCHAR c = 0; - UINT i = 0, n, li, hi; - - - if (oem < 0x80) { /* ASCII? */ - c = oem; - - } else { /* Extended char */ - if (cp == FF_CODE_PAGE) { /* Is it valid code page? */ - p = CVTBL(oem2uni, FF_CODE_PAGE); - hi = sizeof CVTBL(oem2uni, FF_CODE_PAGE) / 4 - 1; - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (oem == p[i * 2]) break; - if (oem > p[i * 2]) { - li = i; - } else { - hi = i; - } - } - if (n != 0) c = p[i * 2 + 1]; - } - } - - return c; -} -#endif - - - -/*------------------------------------------------------------------------*/ -/* OEM <==> Unicode conversions for dynamic code page configuration */ -/*------------------------------------------------------------------------*/ - -#if FF_CODE_PAGE == 0 - -static const WORD cp_code[] = { 437, 720, 737, 771, 775, 850, 852, 855, 857, 860, 861, 862, 863, 864, 865, 866, 869, 0}; -static const WCHAR* const cp_table[] = {uc437, uc720, uc737, uc771, uc775, uc850, uc852, uc855, uc857, uc860, uc861, uc862, uc863, uc864, uc865, uc866, uc869, 0}; - - -WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ - DWORD uni, /* UTF-16 encoded character to be converted */ - WORD cp /* Code page for the conversion */ -) -{ - const WCHAR *p; - WCHAR c = 0, uc; - UINT i, n, li, hi; - - - if (uni < 0x80) { /* ASCII? */ - c = (WCHAR)uni; - - } else { /* Non-ASCII */ - if (uni < 0x10000) { /* Is it in BMP? */ - uc = (WCHAR)uni; - p = 0; - if (cp < 900) { /* SBCS */ - for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get conversion table */ - p = cp_table[i]; - if (p) { /* Is it valid code page ? */ - for (c = 0; c < 0x80 && uc != p[c]; c++) ; /* Find OEM code in the table */ - c = (c + 0x80) & 0xFF; - } - } else { /* DBCS */ - switch (cp) { /* Get conversion table */ - case 932 : p = uni2oem932; hi = sizeof uni2oem932 / 4 - 1; break; - case 936 : p = uni2oem936; hi = sizeof uni2oem936 / 4 - 1; break; - case 949 : p = uni2oem949; hi = sizeof uni2oem949 / 4 - 1; break; - case 950 : p = uni2oem950; hi = sizeof uni2oem950 / 4 - 1; break; - } - if (p) { /* Is it valid code page? */ - li = 0; - for (n = 16; n; n--) { /* Find OEM code */ - i = li + (hi - li) / 2; - if (uc == p[i * 2]) break; - if (uc > p[i * 2]) { - li = i; - } else { - hi = i; - } - } - if (n != 0) c = p[i * 2 + 1]; - } - } - } - } - - return c; -} - - -WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ - WCHAR oem, /* OEM code to be converted (DBC if >=0x100) */ - WORD cp /* Code page for the conversion */ -) -{ - const WCHAR *p; - WCHAR c = 0; - UINT i, n, li, hi; - - - if (oem < 0x80) { /* ASCII? */ - c = oem; - - } else { /* Extended char */ - p = 0; - if (cp < 900) { /* SBCS */ - for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get table */ - p = cp_table[i]; - if (p) { /* Is it a valid CP ? */ - if (oem < 0x100) c = p[oem - 0x80]; - } - } else { /* DBCS */ - switch (cp) { - case 932 : p = oem2uni932; hi = sizeof oem2uni932 / 4 - 1; break; - case 936 : p = oem2uni936; hi = sizeof oem2uni936 / 4 - 1; break; - case 949 : p = oem2uni949; hi = sizeof oem2uni949 / 4 - 1; break; - case 950 : p = oem2uni950; hi = sizeof oem2uni950 / 4 - 1; break; - } - if (p) { - li = 0; - for (n = 16; n; n--) { - i = li + (hi - li) / 2; - if (oem == p[i * 2]) break; - if (oem > p[i * 2]) { - li = i; - } else { - hi = i; - } - } - if (n != 0) c = p[i * 2 + 1]; - } - } - } - - return c; -} -#endif - - - -/*------------------------------------------------------------------------*/ -/* Unicode up-case conversion */ -/*------------------------------------------------------------------------*/ - -DWORD ff_wtoupper ( /* Returns up-converted code point */ - DWORD uni /* Unicode code point to be up-converted */ -) -{ - const WORD *p; - WORD uc, bc, nc, cmd; - static const WORD cvt1[] = { /* Compressed up conversion table for U+0000 - U+0FFF */ - /* Basic Latin */ - 0x0061,0x031A, - /* Latin-1 Supplement */ - 0x00E0,0x0317, - 0x00F8,0x0307, - 0x00FF,0x0001,0x0178, - /* Latin Extended-A */ - 0x0100,0x0130, - 0x0132,0x0106, - 0x0139,0x0110, - 0x014A,0x012E, - 0x0179,0x0106, - /* Latin Extended-B */ - 0x0180,0x004D,0x0243,0x0181,0x0182,0x0182,0x0184,0x0184,0x0186,0x0187,0x0187,0x0189,0x018A,0x018B,0x018B,0x018D,0x018E,0x018F,0x0190,0x0191,0x0191,0x0193,0x0194,0x01F6,0x0196,0x0197,0x0198,0x0198,0x023D,0x019B,0x019C,0x019D,0x0220,0x019F,0x01A0,0x01A0,0x01A2,0x01A2,0x01A4,0x01A4,0x01A6,0x01A7,0x01A7,0x01A9,0x01AA,0x01AB,0x01AC,0x01AC,0x01AE,0x01AF,0x01AF,0x01B1,0x01B2,0x01B3,0x01B3,0x01B5,0x01B5,0x01B7,0x01B8,0x01B8,0x01BA,0x01BB,0x01BC,0x01BC,0x01BE,0x01F7,0x01C0,0x01C1,0x01C2,0x01C3,0x01C4,0x01C5,0x01C4,0x01C7,0x01C8,0x01C7,0x01CA,0x01CB,0x01CA, - 0x01CD,0x0110, - 0x01DD,0x0001,0x018E, - 0x01DE,0x0112, - 0x01F3,0x0003,0x01F1,0x01F4,0x01F4, - 0x01F8,0x0128, - 0x0222,0x0112, - 0x023A,0x0009,0x2C65,0x023B,0x023B,0x023D,0x2C66,0x023F,0x0240,0x0241,0x0241, - 0x0246,0x010A, - /* IPA Extensions */ - 0x0253,0x0040,0x0181,0x0186,0x0255,0x0189,0x018A,0x0258,0x018F,0x025A,0x0190,0x025C,0x025D,0x025E,0x025F,0x0193,0x0261,0x0262,0x0194,0x0264,0x0265,0x0266,0x0267,0x0197,0x0196,0x026A,0x2C62,0x026C,0x026D,0x026E,0x019C,0x0270,0x0271,0x019D,0x0273,0x0274,0x019F,0x0276,0x0277,0x0278,0x0279,0x027A,0x027B,0x027C,0x2C64,0x027E,0x027F,0x01A6,0x0281,0x0282,0x01A9,0x0284,0x0285,0x0286,0x0287,0x01AE,0x0244,0x01B1,0x01B2,0x0245,0x028D,0x028E,0x028F,0x0290,0x0291,0x01B7, - /* Greek, Coptic */ - 0x037B,0x0003,0x03FD,0x03FE,0x03FF, - 0x03AC,0x0004,0x0386,0x0388,0x0389,0x038A, - 0x03B1,0x0311, - 0x03C2,0x0002,0x03A3,0x03A3, - 0x03C4,0x0308, - 0x03CC,0x0003,0x038C,0x038E,0x038F, - 0x03D8,0x0118, - 0x03F2,0x000A,0x03F9,0x03F3,0x03F4,0x03F5,0x03F6,0x03F7,0x03F7,0x03F9,0x03FA,0x03FA, - /* Cyrillic */ - 0x0430,0x0320, - 0x0450,0x0710, - 0x0460,0x0122, - 0x048A,0x0136, - 0x04C1,0x010E, - 0x04CF,0x0001,0x04C0, - 0x04D0,0x0144, - /* Armenian */ - 0x0561,0x0426, - - 0x0000 /* EOT */ - }; - static const WORD cvt2[] = { /* Compressed up conversion table for U+1000 - U+FFFF */ - /* Phonetic Extensions */ - 0x1D7D,0x0001,0x2C63, - /* Latin Extended Additional */ - 0x1E00,0x0196, - 0x1EA0,0x015A, - /* Greek Extended */ - 0x1F00,0x0608, - 0x1F10,0x0606, - 0x1F20,0x0608, - 0x1F30,0x0608, - 0x1F40,0x0606, - 0x1F51,0x0007,0x1F59,0x1F52,0x1F5B,0x1F54,0x1F5D,0x1F56,0x1F5F, - 0x1F60,0x0608, - 0x1F70,0x000E,0x1FBA,0x1FBB,0x1FC8,0x1FC9,0x1FCA,0x1FCB,0x1FDA,0x1FDB,0x1FF8,0x1FF9,0x1FEA,0x1FEB,0x1FFA,0x1FFB, - 0x1F80,0x0608, - 0x1F90,0x0608, - 0x1FA0,0x0608, - 0x1FB0,0x0004,0x1FB8,0x1FB9,0x1FB2,0x1FBC, - 0x1FCC,0x0001,0x1FC3, - 0x1FD0,0x0602, - 0x1FE0,0x0602, - 0x1FE5,0x0001,0x1FEC, - 0x1FF3,0x0001,0x1FFC, - /* Letterlike Symbols */ - 0x214E,0x0001,0x2132, - /* Number forms */ - 0x2170,0x0210, - 0x2184,0x0001,0x2183, - /* Enclosed Alphanumerics */ - 0x24D0,0x051A, - 0x2C30,0x042F, - /* Latin Extended-C */ - 0x2C60,0x0102, - 0x2C67,0x0106, 0x2C75,0x0102, - /* Coptic */ - 0x2C80,0x0164, - /* Georgian Supplement */ - 0x2D00,0x0826, - /* Full-width */ - 0xFF41,0x031A, - - 0x0000 /* EOT */ - }; - - - if (uni < 0x10000) { /* Is it in BMP? */ - uc = (WORD)uni; - p = uc < 0x1000 ? cvt1 : cvt2; - for (;;) { - bc = *p++; /* Get the block base */ - if (bc == 0 || uc < bc) break; /* Not matched? */ - nc = *p++; cmd = nc >> 8; nc &= 0xFF; /* Get processing command and block size */ - if (uc < bc + nc) { /* In the block? */ - switch (cmd) { - case 0: uc = p[uc - bc]; break; /* Table conversion */ - case 1: uc -= (uc - bc) & 1; break; /* Case pairs */ - case 2: uc -= 16; break; /* Shift -16 */ - case 3: uc -= 32; break; /* Shift -32 */ - case 4: uc -= 48; break; /* Shift -48 */ - case 5: uc -= 26; break; /* Shift -26 */ - case 6: uc += 8; break; /* Shift +8 */ - case 7: uc -= 80; break; /* Shift -80 */ - case 8: uc -= 0x1C60; break; /* Shift -0x1C60 */ - } - break; - } - if (cmd == 0) p += nc; /* Skip table if needed */ - } - uni = uc; - } - - return uni; -} - - -#endif /* #if FF_USE_LFN */ diff --git a/fusee/common/ini.c b/fusee/common/ini.c deleted file mode 100644 index ccf4640d2..000000000 --- a/fusee/common/ini.c +++ /dev/null @@ -1,272 +0,0 @@ -/* inih -- simple .INI file parser - -inih is released under the New BSD license (see LICENSE.txt). Go to the project -home page for more info: - -https://github.com/benhoyt/inih - -*/ - -#if defined(_MSC_VER) && !defined(_CRT_SECURE_NO_WARNINGS) -#define _CRT_SECURE_NO_WARNINGS -#endif - -#include -#include -#include - -#include "ini.h" - -#if !INI_USE_STACK -#include -#endif - -#define MAX_SECTION 50 -#define MAX_NAME 50 - -/* Used by ini_parse_string() to keep track of string parsing state. */ -typedef struct { - const char* ptr; - size_t num_left; -} ini_parse_string_ctx; - -/* Strip whitespace chars off end of given string, in place. Return s. */ -static char* rstrip(char* s) -{ - char* p = s + strlen(s); - while (p > s && isspace((unsigned char)(*--p))) - *p = '\0'; - return s; -} - -/* Return pointer to first non-whitespace char in given string. */ -static char* lskip(const char* s) -{ - while (*s && isspace((unsigned char)(*s))) - s++; - return (char*)s; -} - -/* Return pointer to first char (of chars) or inline comment in given string, - or pointer to null at end of string if neither found. Inline comment must - be prefixed by a whitespace character to register as a comment. */ -static char* find_chars_or_comment(const char* s, const char* chars) -{ -#if INI_ALLOW_INLINE_COMMENTS - int was_space = 0; - while (*s && (!chars || !strchr(chars, *s)) && - !(was_space && strchr(INI_INLINE_COMMENT_PREFIXES, *s))) { - was_space = isspace((unsigned char)(*s)); - s++; - } -#else - while (*s && (!chars || !strchr(chars, *s))) { - s++; - } -#endif - return (char*)s; -} - -/* Version of strncpy that ensures dest (size bytes) is null-terminated. */ -static char* strncpy0(char* dest, const char* src, size_t size) -{ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wstringop-truncation" - strncpy(dest, src, size - 1); -#pragma GCC diagnostic pop - dest[size - 1] = '\0'; - return dest; -} - -/* See documentation in header file. */ -int ini_parse_stream(ini_reader reader, void* stream, ini_handler handler, - void* user) -{ - /* Uses a fair bit of stack (use heap instead if you need to) */ -#if INI_USE_STACK - char line[INI_MAX_LINE]; - int max_line = INI_MAX_LINE; -#else - char* line; - int max_line = INI_INITIAL_ALLOC; -#endif -#if INI_ALLOW_REALLOC - char* new_line; - int offset; -#endif - char section[MAX_SECTION] = ""; - char prev_name[MAX_NAME] = ""; - - char* start; - char* end; - char* name; - char* value; - int lineno = 0; - int error = 0; - -#if !INI_USE_STACK - line = (char*)malloc(INI_INITIAL_ALLOC); - if (!line) { - return -2; - } -#endif - -#if INI_HANDLER_LINENO -#define HANDLER(u, s, n, v) handler(u, s, n, v, lineno) -#else -#define HANDLER(u, s, n, v) handler(u, s, n, v) -#endif - - /* Scan through stream line by line */ - while (reader(line, max_line, stream) != NULL) { -#if INI_ALLOW_REALLOC - offset = strlen(line); - while (offset == max_line - 1 && line[offset - 1] != '\n') { - max_line *= 2; - if (max_line > INI_MAX_LINE) - max_line = INI_MAX_LINE; - new_line = realloc(line, max_line); - if (!new_line) { - free(line); - return -2; - } - line = new_line; - if (reader(line + offset, max_line - offset, stream) == NULL) - break; - if (max_line >= INI_MAX_LINE) - break; - offset += strlen(line + offset); - } -#endif - - lineno++; - - start = line; -#if INI_ALLOW_BOM - if (lineno == 1 && (unsigned char)start[0] == 0xEF && - (unsigned char)start[1] == 0xBB && - (unsigned char)start[2] == 0xBF) { - start += 3; - } -#endif - start = lskip(rstrip(start)); - - if (strchr(INI_START_COMMENT_PREFIXES, *start)) { - /* Start-of-line comment */ - } -#if INI_ALLOW_MULTILINE - else if (*prev_name && *start && start > line) { - /* Non-blank line with leading whitespace, treat as continuation - of previous name's value (as per Python configparser). */ - if (!HANDLER(user, section, prev_name, start) && !error) - error = lineno; - } -#endif - else if (*start == '[') { - /* A "[section]" line */ - end = find_chars_or_comment(start + 1, "]"); - if (*end == ']') { - *end = '\0'; - strncpy0(section, start + 1, sizeof(section)); - *prev_name = '\0'; - } - else if (!error) { - /* No ']' found on section line */ - error = lineno; - } - } - else if (*start) { - /* Not a comment, must be a name[=:]value pair */ - end = find_chars_or_comment(start, "=:"); - if (*end == '=' || *end == ':') { - *end = '\0'; - name = rstrip(start); - value = end + 1; -#if INI_ALLOW_INLINE_COMMENTS - end = find_chars_or_comment(value, NULL); - if (*end) - *end = '\0'; -#endif - value = lskip(value); - rstrip(value); - - /* Valid name[=:]value pair found, call handler */ - strncpy0(prev_name, name, sizeof(prev_name)); - if (!HANDLER(user, section, name, value) && !error) - error = lineno; - } - else if (!error) { - /* No '=' or ':' found on name[=:]value line */ - error = lineno; - } - } - -#if INI_STOP_ON_FIRST_ERROR - if (error) - break; -#endif - } - -#if !INI_USE_STACK - free(line); -#endif - - return error; -} - -/* See documentation in header file. */ -int ini_parse_file(FILE* file, ini_handler handler, void* user) -{ - return ini_parse_stream((ini_reader)fgets, file, handler, user); -} - -/* See documentation in header file. */ -int ini_parse(const char* filename, ini_handler handler, void* user) -{ - FILE* file; - int error; - - file = fopen(filename, "r"); - if (!file) - return -1; - error = ini_parse_file(file, handler, user); - fclose(file); - return error; -} - -/* An ini_reader function to read the next line from a string buffer. This - is the fgets() equivalent used by ini_parse_string(). */ -static char* ini_reader_string(char* str, int num, void* stream) { - ini_parse_string_ctx* ctx = (ini_parse_string_ctx*)stream; - const char* ctx_ptr = ctx->ptr; - size_t ctx_num_left = ctx->num_left; - char* strp = str; - char c; - - if (ctx_num_left == 0 || num < 2) - return NULL; - - while (num > 1 && ctx_num_left != 0) { - c = *ctx_ptr++; - ctx_num_left--; - *strp++ = c; - if (c == '\n') - break; - num--; - } - - *strp = '\0'; - ctx->ptr = ctx_ptr; - ctx->num_left = ctx_num_left; - return str; -} - -/* See documentation in header file. */ -int ini_parse_string(const char* string, ini_handler handler, void* user) { - ini_parse_string_ctx ctx; - - ctx.ptr = string; - ctx.num_left = strlen(string); - return ini_parse_stream((ini_reader)ini_reader_string, &ctx, handler, - user); -} diff --git a/fusee/common/ini.h b/fusee/common/ini.h deleted file mode 100644 index f45ba40ba..000000000 --- a/fusee/common/ini.h +++ /dev/null @@ -1,130 +0,0 @@ -/* inih -- simple .INI file parser - -inih is released under the New BSD license (see LICENSE.txt). Go to the project -home page for more info: - -https://github.com/benhoyt/inih - -*/ - -#ifndef __INI_H__ -#define __INI_H__ - -/* Make this header file easier to include in C++ code */ -#ifdef __cplusplus -extern "C" { -#endif - -#include - -/* Nonzero if ini_handler callback should accept lineno parameter. */ -#ifndef INI_HANDLER_LINENO -#define INI_HANDLER_LINENO 0 -#endif - -/* Typedef for prototype of handler function. */ -#if INI_HANDLER_LINENO -typedef int (*ini_handler)(void* user, const char* section, - const char* name, const char* value, - int lineno); -#else -typedef int (*ini_handler)(void* user, const char* section, - const char* name, const char* value); -#endif - -/* Typedef for prototype of fgets-style reader function. */ -typedef char* (*ini_reader)(char* str, int num, void* stream); - -/* Parse given INI-style file. May have [section]s, name=value pairs - (whitespace stripped), and comments starting with ';' (semicolon). Section - is "" if name=value pair parsed before any section heading. name:value - pairs are also supported as a concession to Python's configparser. - - For each name=value pair parsed, call handler function with given user - pointer as well as section, name, and value (data only valid for duration - of handler call). Handler should return nonzero on success, zero on error. - - Returns 0 on success, line number of first error on parse error (doesn't - stop on first error), -1 on file open error, or -2 on memory allocation - error (only when INI_USE_STACK is zero). -*/ -int ini_parse(const char* filename, ini_handler handler, void* user); - -/* Same as ini_parse(), but takes a FILE* instead of filename. This doesn't - close the file when it's finished -- the caller must do that. */ -int ini_parse_file(FILE* file, ini_handler handler, void* user); - -/* Same as ini_parse(), but takes an ini_reader function pointer instead of - filename. Used for implementing custom or string-based I/O (see also - ini_parse_string). */ -int ini_parse_stream(ini_reader reader, void* stream, ini_handler handler, - void* user); - -/* Same as ini_parse(), but takes a zero-terminated string with the INI data -instead of a file. Useful for parsing INI data from a network socket or -already in memory. */ -int ini_parse_string(const char* string, ini_handler handler, void* user); - -/* Nonzero to allow multi-line value parsing, in the style of Python's - configparser. If allowed, ini_parse() will call the handler with the same - name for each subsequent line parsed. */ -#ifndef INI_ALLOW_MULTILINE -#define INI_ALLOW_MULTILINE 1 -#endif - -/* Nonzero to allow a UTF-8 BOM sequence (0xEF 0xBB 0xBF) at the start of - the file. See http://code.google.com/p/inih/issues/detail?id=21 */ -#ifndef INI_ALLOW_BOM -#define INI_ALLOW_BOM 1 -#endif - -/* Chars that begin a start-of-line comment. Per Python configparser, allow - both ; and # comments at the start of a line by default. */ -#ifndef INI_START_COMMENT_PREFIXES -#define INI_START_COMMENT_PREFIXES ";#" -#endif - -/* Nonzero to allow inline comments (with valid inline comment characters - specified by INI_INLINE_COMMENT_PREFIXES). Set to 0 to turn off and match - Python 3.2+ configparser behaviour. */ -#ifndef INI_ALLOW_INLINE_COMMENTS -#define INI_ALLOW_INLINE_COMMENTS 1 -#endif -#ifndef INI_INLINE_COMMENT_PREFIXES -#define INI_INLINE_COMMENT_PREFIXES ";" -#endif - -/* Nonzero to use stack for line buffer, zero to use heap (malloc/free). */ -#ifndef INI_USE_STACK -#define INI_USE_STACK 1 -#endif - -/* Maximum line length for any line in INI file (stack or heap). Note that - this must be 3 more than the longest line (due to '\r', '\n', and '\0'). */ -#ifndef INI_MAX_LINE -#define INI_MAX_LINE 200 -#endif - -/* Nonzero to allow heap line buffer to grow via realloc(), zero for a - fixed-size buffer of INI_MAX_LINE bytes. Only applies if INI_USE_STACK is - zero. */ -#ifndef INI_ALLOW_REALLOC -#define INI_ALLOW_REALLOC 0 -#endif - -/* Initial size in bytes for heap line buffer. Only applies if INI_USE_STACK - is zero. */ -#ifndef INI_INITIAL_ALLOC -#define INI_INITIAL_ALLOC 200 -#endif - -/* Stop parsing on first error (default is to keep parsing). */ -#ifndef INI_STOP_ON_FIRST_ERROR -#define INI_STOP_ON_FIRST_ERROR 0 -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* __INI_H__ */ diff --git a/fusee/common/log.c b/fusee/common/log.c deleted file mode 100644 index db765ff40..000000000 --- a/fusee/common/log.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "log.h" - -#ifdef FUSEE_STAGE2_SRC -#include "../../../fusee/fusee-secondary/src/console.h" -#include -#else -#include "display/video_fb.h" -#include "vsprintf.h" -#endif - -/* Default log level for screen output. */ -ScreenLogLevel g_screen_log_level = SCREEN_LOG_LEVEL_NONE; - -void log_set_log_level(ScreenLogLevel log_level) { - g_screen_log_level = log_level; -} - -ScreenLogLevel log_get_log_level() { - return g_screen_log_level; -} - -void log_to_uart(const char *message) { - /* TODO: Add UART logging. */ -} - -static void print_to_screen(ScreenLogLevel screen_log_level, char *message) { - /* Don't print to screen if below log level */ - if(screen_log_level > g_screen_log_level) return; - - #ifdef FUSEE_STAGE2_SRC - printf(message); - #else - video_puts(message); - #endif -} - -/** - * vprintk - logs a message and prints it to screen based on its screen_log_level - * - * If the level is below g_screen_log_level it will not be shown but logged to UART - * This text will not be colored or prefixed - * UART is TODO - */ -void vprint(ScreenLogLevel screen_log_level, const char *fmt, va_list args) -{ - char buf[PRINT_MESSAGE_MAX_LENGTH]; - vsnprintf(buf, PRINT_MESSAGE_MAX_LENGTH, fmt, args); - - /* We don't need that flag here, but if it gets used, strip it so we print correctly. */ - screen_log_level &= ~SCREEN_LOG_LEVEL_NO_PREFIX; - - /* Log to UART. */ - log_to_uart(buf); - - print_to_screen(screen_log_level, buf); -} - -static void add_prefix(ScreenLogLevel screen_log_level, const char *fmt, char *buf) { - char typebuf[] = "[%s] %s"; - - /* Apply prefix and append message format. */ - /* TODO: Add coloring to the output. */ - switch(screen_log_level) - { - case SCREEN_LOG_LEVEL_ERROR: - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, typebuf, "ERROR", fmt); - break; - case SCREEN_LOG_LEVEL_WARNING: - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, typebuf, "WARNING", fmt); - break; - case SCREEN_LOG_LEVEL_MANDATORY: - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, "%s", fmt); - break; - case SCREEN_LOG_LEVEL_INFO: - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, typebuf, "INFO", fmt); - break; - case SCREEN_LOG_LEVEL_DEBUG: - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, typebuf, "DEBUG", fmt); - break; - default: - break; - } -} - -/** - * print - logs a message and prints it to screen based on its screen_log_level - * - * If the level is below g_screen_log_level it will not be shown but logged to UART - * Use SCREEN_LOG_LEVEL_NO_PREFIX if you don't want a prefix to be added - * UART is TODO - */ -void print(ScreenLogLevel screen_log_level, const char * fmt, ...) -{ - char buf[PRINT_MESSAGE_MAX_LENGTH] = {}; - char message[PRINT_MESSAGE_MAX_LENGTH] = {}; - - /* Make splash disappear if level is ERROR or WARNING. */ - #ifdef FUSEE_STAGE2_SRC - if (screen_log_level < SCREEN_LOG_LEVEL_MANDATORY) { - console_resume(); - } - #endif - - /* Make prefix free messages with log_level possible. */ - if(screen_log_level & SCREEN_LOG_LEVEL_NO_PREFIX) { - /* Remove the NO_PREFIX flag so the enum can be recognized later on. */ - screen_log_level &= ~SCREEN_LOG_LEVEL_NO_PREFIX; - - snprintf(buf, PRINT_MESSAGE_MAX_LENGTH, "%s", fmt); - } - else { - add_prefix(screen_log_level, fmt, buf); - } - - /* Input arguments. */ - va_list args; - va_start(args, fmt); - vsnprintf(message, PRINT_MESSAGE_MAX_LENGTH, buf, args); - va_end(args); - - /* Log to UART. */ - log_to_uart(message); - - print_to_screen(screen_log_level, message); -} \ No newline at end of file diff --git a/fusee/common/log.h b/fusee/common/log.h deleted file mode 100644 index a551619a4..000000000 --- a/fusee/common/log.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_LOG_H -#define FUSEE_LOG_H - -#define PRINT_MESSAGE_MAX_LENGTH 1024 - -#include - -typedef enum { - SCREEN_LOG_LEVEL_NONE = 0, - SCREEN_LOG_LEVEL_ERROR = 1, - SCREEN_LOG_LEVEL_WARNING = 2, - SCREEN_LOG_LEVEL_MANDATORY = 3, /* No log prefix. */ - SCREEN_LOG_LEVEL_INFO = 4, - SCREEN_LOG_LEVEL_DEBUG = 5, - SCREEN_LOG_LEVEL_SD_DEBUG = 6, - - SCREEN_LOG_LEVEL_NO_PREFIX = 0x100 /* OR this to your LOG_LEVEL to prevent prefix creation. */ -} ScreenLogLevel; - -extern ScreenLogLevel g_screen_log_level; - -void log_set_log_level(ScreenLogLevel screen_log_level); -ScreenLogLevel log_get_log_level(); -void log_to_uart(const char *message); -void vprint(ScreenLogLevel screen_log_level, const char *fmt, va_list args); -void print(ScreenLogLevel screen_log_level, const char* fmt, ...); - -#endif \ No newline at end of file diff --git a/fusee/common/lz.c b/fusee/common/lz.c deleted file mode 100644 index e62e02d15..000000000 --- a/fusee/common/lz.c +++ /dev/null @@ -1,377 +0,0 @@ -/************************************************************************* -* Name: lz.c -* Author: Marcus Geelnard -* Description: LZ77 coder/decoder implementation. -* Reentrant: Yes -* -* The LZ77 compression scheme is a substitutional compression scheme -* proposed by Abraham Lempel and Jakob Ziv in 1977. It is very simple in -* its design, and uses no fancy bit level compression. -* -* This is my first attempt at an implementation of a LZ77 code/decoder. -* -* The principle of the LZ77 compression algorithm is to store repeated -* occurrences of strings as references to previous occurrences of the same -* string. The point is that the reference consumes less space than the -* string itself, provided that the string is long enough (in this -* implementation, the string has to be at least 4 bytes long, since the -* minimum coded reference is 3 bytes long). Also note that the term -* "string" refers to any kind of byte sequence (it does not have to be -* an ASCII string, for instance). -* -* The coder uses a brute force approach to finding string matches in the -* history buffer (or "sliding window", if you wish), which is very, very -* slow. I recon the complexity is somewhere between O(n^2) and O(n^3), -* depending on the input data. -* -* There is also a faster implementation that uses a large working buffer -* in which a "jump table" is stored, which is used to quickly find -* possible string matches (see the source code for LZ_CompressFast() for -* more information). The faster method is an order of magnitude faster, -* but still quite slow compared to other compression methods. -* -* The upside is that decompression is very fast, and the compression ratio -* is often very good. -* -* The reference to a string is coded as a (length,offset) pair, where the -* length indicates the length of the string, and the offset gives the -* offset from the current data position. To distinguish between string -* references and literal strings (uncompressed bytes), a string reference -* is preceded by a marker byte, which is chosen as the least common byte -* symbol in the input data stream (this marker byte is stored in the -* output stream as the first byte). -* -* Occurrences of the marker byte in the stream are encoded as the marker -* byte followed by a zero byte, which means that occurrences of the marker -* byte have to be coded with two bytes. -* -* The lengths and offsets are coded in a variable length fashion, allowing -* values of any magnitude (up to 4294967295 in this implementation). -* -* With this compression scheme, the worst case compression result is -* (257/256)*insize + 1. -* -*------------------------------------------------------------------------- -* Copyright (c) 2003-2006 Marcus Geelnard -* -* This software is provided 'as-is', without any express or implied -* warranty. In no event will the authors be held liable for any damages -* arising from the use of this software. -* -* Permission is granted to anyone to use this software for any purpose, -* including commercial applications, and to alter it and redistribute it -* freely, subject to the following restrictions: -* -* 1. The origin of this software must not be misrepresented; you must not -* claim that you wrote the original software. If you use this software -* in a product, an acknowledgment in the product documentation would -* be appreciated but is not required. -* -* 2. Altered source versions must be plainly marked as such, and must not -* be misrepresented as being the original software. -* -* 3. This notice may not be removed or altered from any source -* distribution. -* -* Marcus Geelnard -* marcus.geelnard at home.se -*************************************************************************/ - - -/************************************************************************* -* Constants used for LZ77 coding -*************************************************************************/ - -/* Maximum offset (can be any size < 2^31). Lower values give faster - compression, while higher values gives better compression. The default - value of 100000 is quite high. Experiment to see what works best for - you. */ -#define LZ_MAX_OFFSET 100000 - - - -/************************************************************************* -* INTERNAL FUNCTIONS * -*************************************************************************/ - - -/************************************************************************* -* _LZ_StringCompare() - Return maximum length string match. -*************************************************************************/ - -static unsigned int _LZ_StringCompare( const unsigned char * str1, - const unsigned char * str2, unsigned int minlen, unsigned int maxlen ) -{ - unsigned int len; - - for( len = minlen; (len < maxlen) && (str1[len] == str2[len]); ++ len ); - - return len; -} - - -/************************************************************************* -* _LZ_WriteVarSize() - Write unsigned integer with variable number of -* bytes depending on value. -*************************************************************************/ - -static int _LZ_WriteVarSize( unsigned int x, unsigned char * buf ) -{ - unsigned int y; - int num_bytes, i, b; - - /* Determine number of bytes needed to store the number x */ - y = x >> 3; - for( num_bytes = 5; num_bytes >= 2; -- num_bytes ) - { - if( y & 0xfe000000 ) break; - y <<= 7; - } - - /* Write all bytes, seven bits in each, with 8:th bit set for all */ - /* but the last byte. */ - for( i = num_bytes-1; i >= 0; -- i ) - { - b = (x >> (i*7)) & 0x0000007f; - if( i > 0 ) - { - b |= 0x00000080; - } - *buf ++ = (unsigned char) b; - } - - /* Return number of bytes written */ - return num_bytes; -} - - -/************************************************************************* -* _LZ_ReadVarSize() - Read unsigned integer with variable number of -* bytes depending on value. -*************************************************************************/ - -static int _LZ_ReadVarSize( unsigned int * x, const unsigned char * buf ) -{ - unsigned int y, b, num_bytes; - - /* Read complete value (stop when byte contains zero in 8:th bit) */ - y = 0; - num_bytes = 0; - do - { - b = (unsigned int) (*buf ++); - y = (y << 7) | (b & 0x0000007f); - ++ num_bytes; - } - while( b & 0x00000080 ); - - /* Store value in x */ - *x = y; - - /* Return number of bytes read */ - return num_bytes; -} - - - -/************************************************************************* -* PUBLIC FUNCTIONS * -*************************************************************************/ - - -/************************************************************************* -* LZ_Compress() - Compress a block of data using an LZ77 coder. -* in - Input (uncompressed) buffer. -* out - Output (compressed) buffer. This buffer must be 0.4% larger -* than the input buffer, plus one byte. -* insize - Number of input bytes. -* The function returns the size of the compressed data. -*************************************************************************/ - -int LZ_Compress( const unsigned char *in, unsigned char *out, unsigned int insize ) -{ - unsigned char marker, symbol; - unsigned int inpos, outpos, bytesleft, i; - unsigned int maxoffset, offset, bestoffset; - unsigned int maxlength, length, bestlength; - unsigned int histogram[ 256 ]; - const unsigned char *ptr1, *ptr2; - - /* Do we have anything to compress? */ - if( insize < 1 ) - { - return 0; - } - - /* Create histogram */ - for( i = 0; i < 256; ++ i ) - { - histogram[ i ] = 0; - } - for( i = 0; i < insize; ++ i ) - { - ++ histogram[ in[ i ] ]; - } - - /* Find the least common byte, and use it as the marker symbol */ - marker = 0; - for( i = 1; i < 256; ++ i ) - { - if( histogram[ i ] < histogram[ marker ] ) - { - marker = (unsigned char) i; - } - } - - /* Remember the marker symbol for the decoder */ - out[ 0 ] = marker; - - /* Start of compression */ - inpos = 0; - outpos = 1; - - /* Main compression loop */ - bytesleft = insize; - do - { - /* Determine most distant position */ - if( inpos > LZ_MAX_OFFSET ) maxoffset = LZ_MAX_OFFSET; - else maxoffset = inpos; - - /* Get pointer to current position */ - ptr1 = &in[ inpos ]; - - /* Search history window for maximum length string match */ - bestlength = 3; - bestoffset = 0; - for( offset = 3; offset <= maxoffset; ++ offset ) - { - /* Get pointer to candidate string */ - ptr2 = &ptr1[ -(int)offset ]; - - /* Quickly determine if this is a candidate (for speed) */ - if( (ptr1[ 0 ] == ptr2[ 0 ]) && - (ptr1[ bestlength ] == ptr2[ bestlength ]) ) - { - /* Determine maximum length for this offset */ - maxlength = (bytesleft < offset ? bytesleft : offset); - - /* Count maximum length match at this offset */ - length = _LZ_StringCompare( ptr1, ptr2, 0, maxlength ); - - /* Better match than any previous match? */ - if( length > bestlength ) - { - bestlength = length; - bestoffset = offset; - } - } - } - - /* Was there a good enough match? */ - if( (bestlength >= 8) || - ((bestlength == 4) && (bestoffset <= 0x0000007f)) || - ((bestlength == 5) && (bestoffset <= 0x00003fff)) || - ((bestlength == 6) && (bestoffset <= 0x001fffff)) || - ((bestlength == 7) && (bestoffset <= 0x0fffffff)) ) - { - out[ outpos ++ ] = (unsigned char) marker; - outpos += _LZ_WriteVarSize( bestlength, &out[ outpos ] ); - outpos += _LZ_WriteVarSize( bestoffset, &out[ outpos ] ); - inpos += bestlength; - bytesleft -= bestlength; - } - else - { - /* Output single byte (or two bytes if marker byte) */ - symbol = in[ inpos ++ ]; - out[ outpos ++ ] = symbol; - if( symbol == marker ) - { - out[ outpos ++ ] = 0; - } - -- bytesleft; - } - } - while( bytesleft > 3 ); - - /* Dump remaining bytes, if any */ - while( inpos < insize ) - { - if( in[ inpos ] == marker ) - { - out[ outpos ++ ] = marker; - out[ outpos ++ ] = 0; - } - else - { - out[ outpos ++ ] = in[ inpos ]; - } - ++ inpos; - } - - return outpos; -} - - -/************************************************************************* -* LZ_Uncompress() - Uncompress a block of data using an LZ77 decoder. -* in - Input (compressed) buffer. -* out - Output (uncompressed) buffer. This buffer must be large -* enough to hold the uncompressed data. -* insize - Number of input bytes. -*************************************************************************/ - -int LZ_Uncompress( const unsigned char *in, unsigned char *out, unsigned int insize ) -{ - unsigned char marker, symbol; - unsigned int i, inpos, outpos, length, offset; - - /* Do we have anything to uncompress? */ - if( insize < 1 ) - { - return 0; - } - - /* Get marker symbol from input stream */ - marker = in[ 0 ]; - inpos = 1; - - /* Main decompression loop */ - outpos = 0; - do - { - symbol = in[ inpos ++ ]; - if( symbol == marker ) - { - /* We had a marker byte */ - if( in[ inpos ] == 0 ) - { - /* It was a single occurrence of the marker byte */ - out[ outpos ++ ] = marker; - ++ inpos; - } - else - { - /* Extract true length and offset */ - inpos += _LZ_ReadVarSize( &length, &in[ inpos ] ); - inpos += _LZ_ReadVarSize( &offset, &in[ inpos ] ); - - /* Copy corresponding data from history window */ - for( i = 0; i < length; ++ i ) - { - out[ outpos ] = out[ outpos - offset ]; - ++ outpos; - } - } - } - else - { - /* No marker, plain copy */ - out[ outpos ++ ] = symbol; - } - } - while( inpos < insize ); - - return outpos; -} diff --git a/fusee/common/lz.h b/fusee/common/lz.h deleted file mode 100644 index bc40b6c63..000000000 --- a/fusee/common/lz.h +++ /dev/null @@ -1,51 +0,0 @@ -/************************************************************************* -* Name: lz.h -* Author: Marcus Geelnard -* Description: LZ77 coder/decoder interface. -* Reentrant: Yes -*------------------------------------------------------------------------- -* Copyright (c) 2003-2006 Marcus Geelnard -* -* This software is provided 'as-is', without any express or implied -* warranty. In no event will the authors be held liable for any damages -* arising from the use of this software. -* -* Permission is granted to anyone to use this software for any purpose, -* including commercial applications, and to alter it and redistribute it -* freely, subject to the following restrictions: -* -* 1. The origin of this software must not be misrepresented; you must not -* claim that you wrote the original software. If you use this software -* in a product, an acknowledgment in the product documentation would -* be appreciated but is not required. -* -* 2. Altered source versions must be plainly marked as such, and must not -* be misrepresented as being the original software. -* -* 3. This notice may not be removed or altered from any source -* distribution. -* -* Marcus Geelnard -* marcus.geelnard at home.se -*************************************************************************/ - -#ifndef _lz_h_ -#define _lz_h_ - -#ifdef __cplusplus -extern "C" { -#endif - - -/************************************************************************* -* Function prototypes -*************************************************************************/ - -int LZ_Compress(const unsigned char *in, unsigned char *out, unsigned int insize); -int LZ_Uncompress(const unsigned char *in, unsigned char *out, unsigned int insize); - -#ifdef __cplusplus -} -#endif - -#endif /* _lz_h_ */ diff --git a/fusee/common/sdmmc/mmc.h b/fusee/common/sdmmc/mmc.h deleted file mode 100644 index 4d18fb4a4..000000000 --- a/fusee/common/sdmmc/mmc.h +++ /dev/null @@ -1,449 +0,0 @@ -/* - * Header for MultiMediaCard (MMC) - * - * Copyright 2002 Hewlett-Packard Company - * Copyright (c) 2018-2020 Atmosphère-NX - * - * Use consistent with the GNU GPL is permitted, - * provided that this copyright notice is - * preserved in its entirety in all copies and derived works. - * - * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Many thanks to Alessandro Rubini and Jonathan Corbet! - * - * Based strongly on code by: - * - * Author: Yong-iL Joh - * - * Author: Andrew Christian - * 15 May 2002 - */ - -#ifndef LINUX_MMC_MMC_H -#define LINUX_MMC_MMC_H - -/* Standard MMC commands (4.1) type argument response */ - /* class 1 */ -#define MMC_GO_IDLE_STATE 0 /* bc */ -#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ -#define MMC_ALL_SEND_CID 2 /* bcr R2 */ -#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ -#define MMC_SET_DSR 4 /* bc [31:16] RCA */ -#define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */ -#define MMC_SWITCH 6 /* ac [31:0] See below R1b */ -#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ -#define MMC_SEND_EXT_CSD 8 /* adtc R1 */ -#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ -#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ -#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ -#define MMC_STOP_TRANSMISSION 12 /* ac R1b */ -#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ -#define MMC_BUS_TEST_R 14 /* adtc R1 */ -#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ -#define MMC_BUS_TEST_W 19 /* adtc R1 */ -#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */ -#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */ - - /* class 2 */ -#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ -#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ -#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ -#define MMC_SEND_TUNING_BLOCK 19 /* adtc R1 */ -#define MMC_SEND_TUNING_BLOCK_HS200 21 /* adtc R1 */ - - /* class 3 */ -#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ - - /* class 4 */ -#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ -#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ -#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ -#define MMC_PROGRAM_CID 26 /* adtc R1 */ -#define MMC_PROGRAM_CSD 27 /* adtc R1 */ - - /* class 6 */ -#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ -#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ -#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ - - /* class 5 */ -#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ -#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ -#define MMC_ERASE 38 /* ac R1b */ - - /* class 9 */ -#define MMC_FAST_IO 39 /* ac R4 */ -#define MMC_GO_IRQ_STATE 40 /* bcr R5 */ - - /* class 7 */ -#define MMC_LOCK_UNLOCK 42 /* adtc R1b */ - - /* class 8 */ -#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ -#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ - - /* class 11 */ -#define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */ -#define MMC_QUE_TASK_ADDR 45 /* ac [31:0] data addr R1 */ -#define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */ -#define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */ -#define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */ - -/* - * MMC_SWITCH argument format: - * - * [31:26] Always 0 - * [25:24] Access Mode - * [23:16] Location of target Byte in EXT_CSD - * [15:08] Value Byte - * [07:03] Always 0 - * [02:00] Command Set - */ - -/* - MMC status in R1, for native mode (SPI bits are different) - Type - e : error bit - s : status bit - r : detected and set for the actual command response - x : detected and set during command execution. the host must poll - the card by sending status command in order to read these bits. - Clear condition - a : according to the card state - b : always related to the previous command. Reception of - a valid command will clear it (with a delay of one command) - c : clear by read - */ - -#define R1_OUT_OF_RANGE (1 << 31) /* er, c */ -#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ -#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ -#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ -#define R1_ERASE_PARAM (1 << 27) /* ex, c */ -#define R1_WP_VIOLATION (1 << 26) /* erx, c */ -#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ -#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ -#define R1_COM_CRC_ERROR (1 << 23) /* er, b */ -#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ -#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ -#define R1_CC_ERROR (1 << 20) /* erx, c */ -#define R1_ERROR (1 << 19) /* erx, c */ -#define R1_UNDERRUN (1 << 18) /* ex, c */ -#define R1_OVERRUN (1 << 17) /* ex, c */ -#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ -#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ -#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ -#define R1_ERASE_RESET (1 << 13) /* sr, c */ -#define R1_STATUS(x) (x & 0xFFFFE000) -#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ -#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ -#define R1_SWITCH_ERROR (1 << 7) /* sx, c */ -#define R1_EXCEPTION_EVENT (1 << 6) /* sr, a */ -#define R1_APP_CMD (1 << 5) /* sr, c */ - -#define R1_STATE_IDLE 0 -#define R1_STATE_READY 1 -#define R1_STATE_IDENT 2 -#define R1_STATE_STBY 3 -#define R1_STATE_TRAN 4 -#define R1_STATE_DATA 5 -#define R1_STATE_RCV 6 -#define R1_STATE_PRG 7 -#define R1_STATE_DIS 8 - -/* - * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS - * R1 is the low order byte; R2 is the next highest byte, when present. - */ -#define R1_SPI_IDLE (1 << 0) -#define R1_SPI_ERASE_RESET (1 << 1) -#define R1_SPI_ILLEGAL_COMMAND (1 << 2) -#define R1_SPI_COM_CRC (1 << 3) -#define R1_SPI_ERASE_SEQ (1 << 4) -#define R1_SPI_ADDRESS (1 << 5) -#define R1_SPI_PARAMETER (1 << 6) -/* R1 bit 7 is always zero */ -#define R2_SPI_CARD_LOCKED (1 << 8) -#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */ -#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP -#define R2_SPI_ERROR (1 << 10) -#define R2_SPI_CC_ERROR (1 << 11) -#define R2_SPI_CARD_ECC_ERROR (1 << 12) -#define R2_SPI_WP_VIOLATION (1 << 13) -#define R2_SPI_ERASE_PARAM (1 << 14) -#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */ -#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE - -/* - * OCR bits are mostly in host.h - */ -#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ -#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ -#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ -#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ -#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ -#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ -#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ -#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ -#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ -#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ -#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ -#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ -#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ -#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ -#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ -#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ -#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ -#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ - -/* - * Card Command Classes (CCC) - */ -#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ - /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ - /* (and for SPI, CMD58,59) */ -#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ - /* (CMD11) */ -#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ - /* (CMD16,17,18) */ -#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ - /* (CMD20) */ -#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ - /* (CMD16,24,25,26,27) */ -#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ - /* (CMD32,33,34,35,36,37,38,39) */ -#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ - /* (CMD28,29,30) */ -#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ - /* (CMD16,CMD42) */ -#define CCC_APP_SPEC (1<<8) /* (8) Application specific */ - /* (CMD55,56,57,ACMD*) */ -#define CCC_IO_MODE (1<<9) /* (9) I/O mode */ - /* (CMD5,39,40,52,53) */ -#define CCC_SWITCH (1<<10) /* (10) High speed switch */ - /* (CMD6,34,35,36,37,50) */ - /* (11) Reserved */ - /* (CMD?) */ - -/* - * CSD field definitions - */ - -#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ -#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ -#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ -#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ - -#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ -#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ -#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ -#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ -#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ - -/* - * EXT_CSD fields - */ - -#define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */ -#define EXT_CSD_FLUSH_CACHE 32 /* W */ -#define EXT_CSD_CACHE_CTRL 33 /* R/W */ -#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */ -#define EXT_CSD_PACKED_FAILURE_INDEX 35 /* RO */ -#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */ -#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */ -#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */ -#define EXT_CSD_DATA_SECTOR_SIZE 61 /* R */ -#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ -#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ -#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ -#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ -#define EXT_CSD_HPI_MGMT 161 /* R/W */ -#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ -#define EXT_CSD_BKOPS_EN 163 /* R/W */ -#define EXT_CSD_BKOPS_START 164 /* W */ -#define EXT_CSD_SANITIZE_START 165 /* W */ -#define EXT_CSD_WR_REL_PARAM 166 /* RO */ -#define EXT_CSD_RPMB_MULT 168 /* RO */ -#define EXT_CSD_FW_CONFIG 169 /* R/W */ -#define EXT_CSD_BOOT_WP 173 /* R/W */ -#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ -#define EXT_CSD_PART_CONFIG 179 /* R/W */ -#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ -#define EXT_CSD_BUS_WIDTH 183 /* R/W */ -#define EXT_CSD_STROBE_SUPPORT 184 /* RO */ -#define EXT_CSD_HS_TIMING 185 /* R/W */ -#define EXT_CSD_POWER_CLASS 187 /* R/W */ -#define EXT_CSD_REV 192 /* RO */ -#define EXT_CSD_STRUCTURE 194 /* RO */ -#define EXT_CSD_CARD_TYPE 196 /* RO */ -#define EXT_CSD_DRIVER_STRENGTH 197 /* RO */ -#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */ -#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */ -#define EXT_CSD_PWR_CL_52_195 200 /* RO */ -#define EXT_CSD_PWR_CL_26_195 201 /* RO */ -#define EXT_CSD_PWR_CL_52_360 202 /* RO */ -#define EXT_CSD_PWR_CL_26_360 203 /* RO */ -#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ -#define EXT_CSD_S_A_TIMEOUT 217 /* RO */ -#define EXT_CSD_REL_WR_SEC_C 222 /* RO */ -#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ -#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ -#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ -#define EXT_CSD_BOOT_MULT 226 /* RO */ -#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ -#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ -#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ -#define EXT_CSD_TRIM_MULT 232 /* RO */ -#define EXT_CSD_PWR_CL_200_195 236 /* RO */ -#define EXT_CSD_PWR_CL_200_360 237 /* RO */ -#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ -#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */ -#define EXT_CSD_BKOPS_STATUS 246 /* RO */ -#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ -#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ -#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ -#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ -#define EXT_CSD_FIRMWARE_VERSION 254 /* RO, 8 bytes */ -#define EXT_CSD_PRE_EOL_INFO 267 /* RO */ -#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A 268 /* RO */ -#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B 269 /* RO */ -#define EXT_CSD_CMDQ_DEPTH 307 /* RO */ -#define EXT_CSD_CMDQ_SUPPORT 308 /* RO */ -#define EXT_CSD_SUPPORTED_MODE 493 /* RO */ -#define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */ -#define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */ -#define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ -#define EXT_CSD_MAX_PACKED_READS 501 /* RO */ -#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ -#define EXT_CSD_HPI_FEATURES 503 /* RO */ - -/* - * EXT_CSD field definitions - */ - -#define EXT_CSD_WR_REL_PARAM_EN (1<<2) - -#define EXT_CSD_BOOT_WP_B_PWR_WP_DIS (0x40) -#define EXT_CSD_BOOT_WP_B_PERM_WP_DIS (0x10) -#define EXT_CSD_BOOT_WP_B_PERM_WP_EN (0x04) -#define EXT_CSD_BOOT_WP_B_PWR_WP_EN (0x01) - -#define EXT_CSD_PART_CONFIG_ACC_MASK (0x7) -#define EXT_CSD_PART_CONFIG_ACC_BOOT0 (0x1) -#define EXT_CSD_PART_CONFIG_ACC_RPMB (0x3) -#define EXT_CSD_PART_CONFIG_ACC_GP0 (0x4) - -#define EXT_CSD_PART_SETTING_COMPLETED (0x1) -#define EXT_CSD_PART_SUPPORT_PART_EN (0x1) - -#define EXT_CSD_CMD_SET_NORMAL (1<<0) -#define EXT_CSD_CMD_SET_SECURE (1<<1) -#define EXT_CSD_CMD_SET_CPSECURE (1<<2) - -#define EXT_CSD_CARD_TYPE_HS_26 (1<<0) /* Card can run at 26MHz */ -#define EXT_CSD_CARD_TYPE_HS_52 (1<<1) /* Card can run at 52MHz */ -#define EXT_CSD_CARD_TYPE_HS (EXT_CSD_CARD_TYPE_HS_26 | \ - EXT_CSD_CARD_TYPE_HS_52) -#define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */ - /* DDR mode @1.8V or 3V I/O */ -#define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */ - /* DDR mode @1.2V I/O */ -#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ - | EXT_CSD_CARD_TYPE_DDR_1_2V) -#define EXT_CSD_CARD_TYPE_HS200_1_8V (1<<4) /* Card can run at 200MHz */ -#define EXT_CSD_CARD_TYPE_HS200_1_2V (1<<5) /* Card can run at 200MHz */ - /* SDR mode @1.2V I/O */ -#define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ - EXT_CSD_CARD_TYPE_HS200_1_2V) -#define EXT_CSD_CARD_TYPE_HS400_1_8V (1<<6) /* Card can run at 200MHz DDR, 1.8V */ -#define EXT_CSD_CARD_TYPE_HS400_1_2V (1<<7) /* Card can run at 200MHz DDR, 1.2V */ -#define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ - EXT_CSD_CARD_TYPE_HS400_1_2V) -#define EXT_CSD_CARD_TYPE_HS400ES (1<<8) /* Card can run at HS400ES */ - -#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ -#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ -#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ -#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ -#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ -#define EXT_CSD_BUS_WIDTH_STROBE BIT(7) /* Enhanced strobe mode */ - -#define EXT_CSD_TIMING_BC 0 /* Backwards compatility */ -#define EXT_CSD_TIMING_HS 1 /* High speed */ -#define EXT_CSD_TIMING_HS200 2 /* HS200 */ -#define EXT_CSD_TIMING_HS400 3 /* HS400 */ -#define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */ - -#define EXT_CSD_SEC_ER_EN BIT(0) -#define EXT_CSD_SEC_BD_BLK_EN BIT(2) -#define EXT_CSD_SEC_GB_CL_EN BIT(4) -#define EXT_CSD_SEC_SANITIZE BIT(6) /* v4.5 only */ - -#define EXT_CSD_RST_N_EN_MASK 0x3 -#define EXT_CSD_RST_N_ENABLED 1 /* RST_n is enabled on card */ - -#define EXT_CSD_NO_POWER_NOTIFICATION 0 -#define EXT_CSD_POWER_ON 1 -#define EXT_CSD_POWER_OFF_SHORT 2 -#define EXT_CSD_POWER_OFF_LONG 3 - -#define EXT_CSD_PWR_CL_8BIT_MASK 0xF0 /* 8 bit PWR CLS */ -#define EXT_CSD_PWR_CL_4BIT_MASK 0x0F /* 8 bit PWR CLS */ -#define EXT_CSD_PWR_CL_8BIT_SHIFT 4 -#define EXT_CSD_PWR_CL_4BIT_SHIFT 0 - -#define EXT_CSD_PACKED_EVENT_EN BIT(3) - -/* - * EXCEPTION_EVENT_STATUS field - */ -#define EXT_CSD_URGENT_BKOPS BIT(0) -#define EXT_CSD_DYNCAP_NEEDED BIT(1) -#define EXT_CSD_SYSPOOL_EXHAUSTED BIT(2) -#define EXT_CSD_PACKED_FAILURE BIT(3) - -#define EXT_CSD_PACKED_GENERIC_ERROR BIT(0) -#define EXT_CSD_PACKED_INDEXED_ERROR BIT(1) - -/* - * BKOPS status level - */ -#define EXT_CSD_BKOPS_LEVEL_2 0x2 - -/* - * BKOPS modes - */ -#define EXT_CSD_MANUAL_BKOPS_MASK 0x01 -#define EXT_CSD_AUTO_BKOPS_MASK 0x02 - -/* - * Command Queue - */ -#define EXT_CSD_CMDQ_MODE_ENABLED BIT(0) -#define EXT_CSD_CMDQ_DEPTH_MASK GENMASK(4, 0) -#define EXT_CSD_CMDQ_SUPPORTED BIT(0) - -/* - * MMC_SWITCH access modes - */ -#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ -#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ -#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ -#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ - -/* - * Erase/trim/discard - */ -#define MMC_ERASE_ARG 0x00000000 -#define MMC_SECURE_ERASE_ARG 0x80000000 -#define MMC_TRIM_ARG 0x00000001 -#define MMC_DISCARD_ARG 0x00000003 -#define MMC_SECURE_TRIM1_ARG 0x80000001 -#define MMC_SECURE_TRIM2_ARG 0x80008000 -#define MMC_SECURE_ARGS 0x80000000 -#define MMC_TRIM_ARGS 0x00008001 - -#endif /* LINUX_MMC_MMC_H */ diff --git a/fusee/common/sdmmc/sd.h b/fusee/common/sdmmc/sd.h deleted file mode 100644 index 7b75e55cc..000000000 --- a/fusee/common/sdmmc/sd.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * include/linux/mmc/sd.h - * - * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. - * Copyright (C) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - -#ifndef LINUX_MMC_SD_H -#define LINUX_MMC_SD_H - -/* SD commands type argument response */ -/* class 0 */ -/* This is basically the same command as for MMC with some quirks. */ -#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ -#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ -#define SD_SWITCH_VOLTAGE 11 /* ac R1 */ - -/* class 10 */ -#define SD_SWITCH 6 /* adtc [31:0] See below R1 */ - -/* class 5 */ -#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */ -#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */ - -/* Application commands */ -#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ -#define SD_APP_SD_STATUS 13 /* adtc R1 */ -#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ -#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ -#define SD_APP_SET_CLR_CARD_DETECT 42 /* ac [0] set cd R1 */ -#define SD_APP_SEND_SCR 51 /* adtc R1 */ - -/* OCR bit definitions */ -#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ -#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ -#define SD_OCR_XPC (1 << 28) /* SDXC power control */ -#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ -#define SD_OCR_VDD_LOW (1 << 7) /* SD: Reserved for Low Voltage Range */ -#define SD_OCR_VDD_20_21 (1 << 8) -#define SD_OCR_VDD_21_22 (1 << 9) -#define SD_OCR_VDD_22_23 (1 << 10) -#define SD_OCR_VDD_23_24 (1 << 11) -#define SD_OCR_VDD_24_25 (1 << 12) -#define SD_OCR_VDD_25_26 (1 << 13) -#define SD_OCR_VDD_26_27 (1 << 14) -#define SD_OCR_VDD_27_28 (1 << 15) -#define SD_OCR_VDD_28_29 (1 << 16) -#define SD_OCR_VDD_29_30 (1 << 17) -#define SD_OCR_VDD_30_31 (1 << 18) -#define SD_OCR_VDD_31_32 (1 << 19) -#define SD_OCR_VDD_32_33 (1 << 20) -#define SD_OCR_VDD_33_34 (1 << 21) -#define SD_OCR_VDD_34_35 (1 << 22) -#define SD_OCR_VDD_35_36 (1 << 23) - -/* - * SD_SWITCH argument format: - * - * [31] Check (0) or switch (1) - * [30:24] Reserved (0) - * [23:20] Function group 6 - * [19:16] Function group 5 - * [15:12] Function group 4 - * [11:8] Function group 3 - * [7:4] Function group 2 - * [3:0] Function group 1 - */ - -/* - * SD_SEND_IF_COND argument format: - * - * [31:12] Reserved (0) - * [11:8] Host Voltage Supply Flags - * [7:0] Check Pattern (0xAA) - */ - -/* - * SCR field definitions - */ - -#define SD_SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ -#define SD_SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ -#define SD_SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */ -#define SD_SCR_BUS_WIDTH_1 1 -#define SD_SCR_BUS_WIDTH_4 4 -#define SD_SCR_CMD20_SUPPORT 1 -#define SD_SCR_CMD23_SUPPORT 2 - -/* - * SD bus widths - */ -#define SD_BUS_WIDTH_1 0 -#define SD_BUS_WIDTH_4 2 - -/* - * SD bus speed modes - */ -#define UHS_SDR12_BUS_SPEED 0 -#define HIGH_SPEED_BUS_SPEED 1 -#define UHS_SDR25_BUS_SPEED 1 -#define UHS_SDR50_BUS_SPEED 2 -#define UHS_SDR104_BUS_SPEED 3 -#define UHS_DDR50_BUS_SPEED 4 -#define SD_MODE_HIGH_SPEED (1 << HIGH_SPEED_BUS_SPEED) -#define SD_MODE_UHS_SDR12 (1 << UHS_SDR12_BUS_SPEED) -#define SD_MODE_UHS_SDR25 (1 << UHS_SDR25_BUS_SPEED) -#define SD_MODE_UHS_SDR50 (1 << UHS_SDR50_BUS_SPEED) -#define SD_MODE_UHS_SDR104 (1 << UHS_SDR104_BUS_SPEED) -#define SD_MODE_UHS_DDR50 (1 << UHS_DDR50_BUS_SPEED) - -/* - * SD bus driver types - */ -#define SD_DRIVER_TYPE_B 0x01 -#define SD_DRIVER_TYPE_A 0x02 -#define SD_DRIVER_TYPE_C 0x04 -#define SD_DRIVER_TYPE_D 0x08 - -/* - * SD bus current limits - */ -#define SD_SET_CURRENT_LIMIT_200 0 -#define SD_SET_CURRENT_LIMIT_400 1 -#define SD_SET_CURRENT_LIMIT_600 2 -#define SD_SET_CURRENT_LIMIT_800 3 -#define SD_SET_CURRENT_NO_CHANGE (-1) -#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200) -#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400) -#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600) -#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800) - -/* - * SD_SWITCH mode - */ -#define SD_SWITCH_CHECK 0 -#define SD_SWITCH_SET 1 - -/* - * SD_SWITCH function groups - */ -#define SD_SWITCH_GRP_ACCESS 0 - -/* - * SD_SWITCH access modes - */ -#define SD_SWITCH_ACCESS_DEF 0 -#define SD_SWITCH_ACCESS_HS 1 - -#endif /* LINUX_MMC_SD_H */ diff --git a/fusee/common/sdmmc/sdmmc.c b/fusee/common/sdmmc/sdmmc.c deleted file mode 100644 index 65e5709af..000000000 --- a/fusee/common/sdmmc/sdmmc.c +++ /dev/null @@ -1,1512 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include - -#include "sdmmc.h" -#include "mmc.h" -#include "sd.h" - -#if defined(FUSEE_STAGE1_SRC) -#include "../../../fusee/fusee-primary/fusee-primary-main/src/timers.h" -#elif defined(FUSEE_STAGE2_SRC) -#include "../../../fusee/fusee-secondary/src/timers.h" -#endif - -#define UNSTUFF_BITS(resp,start,size) \ -({ \ - const int __size = size; \ - const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \ - const int __off = 3 - ((start) / 32); \ - const int __shft = (start) & 31; \ - uint32_t __res; \ - \ - __res = resp[__off] >> __shft; \ - if (__size + __shft > 32) \ - __res |= resp[__off-1] << ((32 - __shft) % 32); \ - __res & __mask; \ -}) - -static const unsigned int tran_exp[] = { - 10000, 100000, 1000000, 10000000, - 0, 0, 0, 0 -}; - -static const unsigned char tran_mant[] = { - 0, 10, 12, 13, 15, 20, 25, 30, - 35, 40, 45, 50, 55, 60, 70, 80, -}; - -static const unsigned int taac_exp[] = { - 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000, -}; - -static const unsigned int taac_mant[] = { - 0, 10, 12, 13, 15, 20, 25, 30, - 35, 40, 45, 50, 55, 60, 70, 80, -}; - -/* - Common SDMMC device functions. -*/ - -static bool is_sdmmc_device_r1_error(uint32_t status) { - return (status & (R1_OUT_OF_RANGE | R1_ADDRESS_ERROR | R1_BLOCK_LEN_ERROR - | R1_ERASE_SEQ_ERROR | R1_ERASE_PARAM | R1_WP_VIOLATION - | R1_LOCK_UNLOCK_FAILED | R1_COM_CRC_ERROR | R1_ILLEGAL_COMMAND - | R1_CARD_ECC_FAILED | R1_CC_ERROR | R1_ERROR | R1_CID_CSD_OVERWRITE - | R1_WP_ERASE_SKIP | R1_ERASE_RESET | R1_SWITCH_ERROR)); -} - -static int sdmmc_device_send_r1_cmd(sdmmc_device_t *device, uint32_t opcode, uint32_t arg, bool is_busy, uint32_t resp_mask, uint32_t resp_state) { - sdmmc_command_t cmd = {}; - - cmd.opcode = opcode; - cmd.arg = arg; - cmd.flags = (is_busy ? SDMMC_RSP_R1B : SDMMC_RSP_R1); - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R1, &resp)) { - return 0; - } - - /* Mask the response, if necessary. */ - if (resp_mask) { - resp &= ~(resp_mask); - } - - /* We got an error state. */ - if (is_sdmmc_device_r1_error(resp)) { - return 0; - } - - /* We need to check for the desired state. */ - if (resp_state != 0xFFFFFFFF) { - /* We didn't get the expected state. */ - if (R1_CURRENT_STATE(resp) != resp_state) { - return 0; - } - } - - return 1; -} - -static int sdmmc_device_go_idle(sdmmc_device_t *device) { - sdmmc_command_t cmd = {}; - - cmd.opcode = MMC_GO_IDLE_STATE; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_NONE; - - return sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0); -} - -static int sdmmc_device_send_cid(sdmmc_device_t *device, uint32_t *cid) { - sdmmc_command_t cmd = {}; - - cmd.opcode = MMC_ALL_SEND_CID; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R2; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - return 0; - } - - /* Try to load back the response. */ - return sdmmc_load_response(device->sdmmc, SDMMC_RSP_R2, cid); -} - -static int sdmmc_device_send_csd(sdmmc_device_t *device, uint32_t *csd) { - sdmmc_command_t cmd = {}; - - cmd.opcode = MMC_SEND_CSD; - cmd.arg = (device->rca << 16); - cmd.flags = SDMMC_RSP_R2; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - return 0; - } - - /* Try to load back the response. */ - return sdmmc_load_response(device->sdmmc, SDMMC_RSP_R2, csd); -} - -static int sdmmc_device_select_card(sdmmc_device_t *device) { - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, MMC_SELECT_CARD, (device->rca << 16), true, 0, 0xFFFFFFFF); -} - -static int sdmmc_device_set_blocklen(sdmmc_device_t *device, uint32_t blocklen) { - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, MMC_SET_BLOCKLEN, blocklen, false, 0, R1_STATE_TRAN); -} - -static int sdmmc_device_send_status(sdmmc_device_t *device) { - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, MMC_SEND_STATUS, (device->rca << 16), false, 0, R1_STATE_TRAN); -} - -static int sdmmc_device_rw(sdmmc_device_t *device, uint32_t sector, uint32_t num_sectors, void *data, bool is_read) { - uint8_t *buf = (uint8_t *)data; - - sdmmc_command_t cmd = {}; - sdmmc_request_t req = {}; - - while (num_sectors) { - uint32_t num_blocks_out = 0; - uint32_t num_retries = 10; - - for (; num_retries > 0; num_retries--) { - cmd.opcode = is_read ? MMC_READ_MULTIPLE_BLOCK : MMC_WRITE_MULTIPLE_BLOCK; - cmd.arg = sector; - cmd.flags = SDMMC_RSP_R1; - - req.data = buf; - req.blksz = 512; - req.num_blocks = num_sectors; - req.is_read = is_read; - req.is_multi_block = true; - req.is_auto_cmd12 = true; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, &req, &num_blocks_out)) { - /* Abort the transmission. */ - sdmmc_abort(device->sdmmc, MMC_STOP_TRANSMISSION); - - /* Peek the SD card's status. */ - sdmmc_device_send_status(device); - - /* Wait for a while. */ - mdelay(100); - } else { - break; - } - } - - /* Failed to read/write on all attempts. */ - if (!num_retries) { - return 0; - } - - /* Advance to next sector. */ - sector += num_blocks_out; - num_sectors -= num_blocks_out; - buf += (512 * num_blocks_out); - } - - return 1; -} - -int sdmmc_device_read(sdmmc_device_t *device, uint32_t sector, uint32_t num_sectors, void *data) { - return sdmmc_device_rw(device, sector, num_sectors, data, true); -} - -int sdmmc_device_write(sdmmc_device_t *device, uint32_t sector, uint32_t num_sectors, void *data) { - return sdmmc_device_rw(device, sector, num_sectors, data, false); -} - -int sdmmc_device_finish(sdmmc_device_t *device) { - /* Place the device in idle state. */ - if (!sdmmc_device_go_idle(device)) { - return 0; - } - - /* Terminate the device. */ - sdmmc_finish(device->sdmmc); - return 1; -} - -/* - SD device functions. -*/ - -static void sdmmc_sd_decode_cid(sdmmc_device_t *device, uint32_t *cid) { - device->cid.manfid = UNSTUFF_BITS(cid, 120, 8); - device->cid.oemid = UNSTUFF_BITS(cid, 104, 16); - device->cid.prod_name[0] = UNSTUFF_BITS(cid, 96, 8); - device->cid.prod_name[1] = UNSTUFF_BITS(cid, 88, 8); - device->cid.prod_name[2] = UNSTUFF_BITS(cid, 80, 8); - device->cid.prod_name[3] = UNSTUFF_BITS(cid, 72, 8); - device->cid.prod_name[4] = UNSTUFF_BITS(cid, 64, 8); - device->cid.hwrev = UNSTUFF_BITS(cid, 60, 4); - device->cid.fwrev = UNSTUFF_BITS(cid, 56, 4); - device->cid.serial = UNSTUFF_BITS(cid, 24, 32); - device->cid.year = UNSTUFF_BITS(cid, 12, 8) + 2000; /* SD cards year offset */ - device->cid.month = UNSTUFF_BITS(cid, 8, 4); -} - -static int sdmmc_sd_decode_csd(sdmmc_device_t *device, uint32_t *csd) { - unsigned int e, m; - device->csd.structure = UNSTUFF_BITS(csd, 126, 2); - - switch (device->csd.structure) { - case 0: - m = UNSTUFF_BITS(csd, 115, 4); - e = UNSTUFF_BITS(csd, 112, 3); - device->csd.taac_ns = (taac_exp[e] * taac_mant[m] + 9) / 10; - device->csd.taac_clks = UNSTUFF_BITS(csd, 104, 8) * 100; - - m = UNSTUFF_BITS(csd, 99, 4); - e = UNSTUFF_BITS(csd, 96, 3); - device->csd.max_dtr = tran_exp[e] * tran_mant[m]; - device->csd.cmdclass = UNSTUFF_BITS(csd, 84, 12); - - e = UNSTUFF_BITS(csd, 47, 3); - m = UNSTUFF_BITS(csd, 62, 12); - device->csd.capacity = ((1 + m) << (e + 2)); - - device->csd.read_blkbits = UNSTUFF_BITS(csd, 80, 4); - device->csd.read_partial = UNSTUFF_BITS(csd, 79, 1); - device->csd.write_misalign = UNSTUFF_BITS(csd, 78, 1); - device->csd.read_misalign = UNSTUFF_BITS(csd, 77, 1); - device->csd.dsr_imp = UNSTUFF_BITS(csd, 76, 1); - device->csd.r2w_factor = UNSTUFF_BITS(csd, 26, 3); - device->csd.write_blkbits = UNSTUFF_BITS(csd, 22, 4); - device->csd.write_partial = UNSTUFF_BITS(csd, 21, 1); - - if (UNSTUFF_BITS(csd, 46, 1)) { - device->csd.erase_size = 1; - } else if (device->csd.write_blkbits >= 9) { - device->csd.erase_size = UNSTUFF_BITS(csd, 39, 7) + 1; - device->csd.erase_size <<= (device->csd.write_blkbits - 9); - } - break; - case 1: - device->csd.taac_ns = 0; /* Unused */ - device->csd.taac_clks = 0; /* Unused */ - - m = UNSTUFF_BITS(csd, 99, 4); - e = UNSTUFF_BITS(csd, 96, 3); - device->csd.max_dtr = tran_exp[e] * tran_mant[m]; - device->csd.cmdclass = UNSTUFF_BITS(csd, 84, 12); - device->csd.c_size = UNSTUFF_BITS(csd, 48, 22); - - m = UNSTUFF_BITS(csd, 48, 22); - device->csd.capacity = ((1 + m) << 10); - - device->csd.read_blkbits = 9; - device->csd.read_partial = 0; - device->csd.write_misalign = 0; - device->csd.read_misalign = 0; - device->csd.r2w_factor = 4; /* Unused */ - device->csd.write_blkbits = 9; - device->csd.write_partial = 0; - device->csd.erase_size = 1; - break; - default: - return 0; - } - - return 1; -} - -static int sdmmc_sd_decode_scr(sdmmc_device_t *device, uint8_t *scr) { - uint8_t tmp[8]; - uint32_t resp[4]; - - /* This must be swapped. */ - for (int i = 0; i < 8; i += 4) { - tmp[i + 3] = scr[i]; - tmp[i + 2] = scr[i + 1]; - tmp[i + 1] = scr[i + 2]; - tmp[i] = scr[i + 3]; - } - - resp[3] = *(uint32_t *)&tmp[4]; - resp[2] = *(uint32_t *)&tmp[0]; - - device->scr.sda_vsn = UNSTUFF_BITS(resp, 56, 4); - device->scr.bus_widths = UNSTUFF_BITS(resp, 48, 4); - - /* Check if Physical Layer Spec v3.0 is supported. */ - if (device->scr.sda_vsn == SD_SCR_SPEC_VER_2) { - device->scr.sda_spec3 = UNSTUFF_BITS(resp, 47, 1); - } - if (device->scr.sda_spec3) { - device->scr.cmds = UNSTUFF_BITS(resp, 32, 2); - } - - /* Unknown SCR structure version. */ - if (UNSTUFF_BITS(resp, 60, 4)) { - return 0; - } else { - return 1; - } -} - -static void sdmmc_sd_decode_ssr(sdmmc_device_t *device, uint8_t *ssr) { - uint8_t tmp[64]; - uint32_t resp1[4]; - uint32_t resp2[4]; - - /* This must be swapped. */ - for (int i = 0; i < 64; i += 4) { - tmp[i + 3] = ssr[i]; - tmp[i + 2] = ssr[i + 1]; - tmp[i + 1] = ssr[i + 2]; - tmp[i] = ssr[i + 3]; - } - - resp1[3] = *(uint32_t *)&tmp[12]; - resp1[2] = *(uint32_t *)&tmp[8]; - resp1[1] = *(uint32_t *)&tmp[4]; - resp1[0] = *(uint32_t *)&tmp[0]; - resp2[3] = *(uint32_t *)&tmp[28]; - resp2[2] = *(uint32_t *)&tmp[24]; - resp2[1] = *(uint32_t *)&tmp[20]; - resp2[0] = *(uint32_t *)&tmp[16]; - - device->ssr.dat_bus_width = ((UNSTUFF_BITS(resp1, 126, 2) & SD_BUS_WIDTH_4) ? 4 : 1); - device->ssr.speed_class = UNSTUFF_BITS(resp1, 56, 8); - - if (device->ssr.speed_class < 4) { - device->ssr.speed_class <<= 1; - } else if (device->ssr.speed_class == 4) { - device->ssr.speed_class = 10; - } - - device->ssr.uhs_speed_grade = UNSTUFF_BITS(resp1, 12, 4); - device->ssr.video_speed_class = UNSTUFF_BITS(resp1, 0, 8); - device->ssr.app_perf_class = UNSTUFF_BITS(resp2, 80, 4); -} - -static int sdmmc_sd_send_app_cmd(sdmmc_device_t *device, sdmmc_command_t *cmd, sdmmc_request_t *req, uint32_t resp_mask, uint32_t resp_state) { - /* Try to send the APP command. */ - if (!sdmmc_device_send_r1_cmd(device, MMC_APP_CMD, (device->rca << 16), false, resp_mask, resp_state)) { - return 0; - } - - /* Send the actual command. */ - if (!sdmmc_send_cmd(device->sdmmc, cmd, req, 0)) { - return 0; - } - - return 1; -} - -static int sdmmc_sd_send_if_cond(sdmmc_device_t *device, bool *is_sd_ver2) { - sdmmc_command_t cmd = {}; - - cmd.opcode = SD_SEND_IF_COND; - /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ - cmd.arg = 0x1AA; - cmd.flags = SDMMC_RSP_R7; - - /* Command failed, this means SD Card is not version 2. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - *is_sd_ver2 = false; - return 1; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R7, &resp)) { - return 0; - } - - /* Check if we got a valid response. */ - if ((resp & 0xFF) == 0xAA) { - *is_sd_ver2 = true; - return 1; - } - - return 0; -} - -static int sdmmc_sd_send_op_cond(sdmmc_device_t *device, bool is_sd_ver2, bool is_uhs_en) { - sdmmc_command_t cmd = {}; - - /* Program a large timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - while (!is_timeout) { - /* Set this since most cards do not answer if some reserved bits in the OCR are set. */ - uint32_t arg = SD_OCR_VDD_32_33; - - /* Request support for SDXC power control and SDHC block mode cards. */ - if (is_sd_ver2) { - arg |= SD_OCR_XPC; - arg |= SD_OCR_CCS; - } - - /* Request support 1.8V switching. */ - if (is_uhs_en) { - arg |= SD_OCR_S18R; - } - - cmd.opcode = SD_APP_OP_COND; - cmd.arg = arg; - cmd.flags = SDMMC_RSP_R3; - - /* Try to send the command. */ - if (!sdmmc_sd_send_app_cmd(device, &cmd, 0, is_sd_ver2 ? 0 : 0x400000, 0xFFFFFFFF)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R3, &resp)) { - return 0; - } - - /* Card Power up bit is set. */ - if (resp & MMC_CARD_BUSY) { - /* We have a SDHC block mode card. */ - if (resp & SD_OCR_CCS) { - device->is_block_sdhc = true; - } - /* We asked for low voltage support and the card accepted. */ - if (is_uhs_en && (resp & SD_ROCR_S18A)) { - /* Voltage switching is only valid for SDMMC1. */ - if (device->sdmmc->controller == SDMMC_1) { - /* Failed to issue voltage switching command. */ - if (!sdmmc_device_send_r1_cmd(device, SD_SWITCH_VOLTAGE, 0, false, 0, R1_STATE_READY)) { - return 0; - } - - /* Delay a bit before asking for the voltage switch. */ - mdelay(100); - - /* Tell the driver to switch the voltage. */ - if (!sdmmc_switch_voltage(device->sdmmc)) { - return 0; - } - - /* We are now running at 1.8V. */ - device->is_180v = true; - } - } - - return 1; - } - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - - /* Delay for a minimum of 10 milliseconds. */ - mdelay(10); - } - - return 0; -} - -static int sdmmc_sd_send_relative_addr(sdmmc_device_t *device) { - sdmmc_command_t cmd = {}; - - cmd.opcode = SD_SEND_RELATIVE_ADDR; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R6; - - /* Program a large timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - while (!is_timeout) { - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R6, &resp)) { - return 0; - } - - /* Save the RCA. */ - if (resp >> 16) { - device->rca = (resp >> 16); - return 1; - } - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - - /* Delay for an appropriate period. */ - udelay(1000); - } - - return 0; -} - -static int sdmmc_sd_send_scr(sdmmc_device_t *device, uint8_t *scr) { - sdmmc_command_t cmd = {}; - sdmmc_request_t req = {}; - - cmd.opcode = SD_APP_SEND_SCR; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R1; - - req.data = scr; - req.blksz = 8; - req.num_blocks = 1; - req.is_read = true; - req.is_multi_block = false; - req.is_auto_cmd12 = false; - - /* Try to send the APP command. */ - if (!sdmmc_sd_send_app_cmd(device, &cmd, &req, 0, R1_STATE_TRAN)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R1, &resp)) { - return 0; - } - - /* Evaluate the response. */ - if (is_sdmmc_device_r1_error(resp)) { - return 0; - } else { - return 1; - } -} - -static int sdmmc_sd_set_clr_card_detect(sdmmc_device_t *device) { - /* Try to send the APP command. */ - if (!sdmmc_device_send_r1_cmd(device, MMC_APP_CMD, (device->rca << 16), false, 0, R1_STATE_TRAN)) { - return 0; - } - - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, SD_APP_SET_CLR_CARD_DETECT, 0, false, 0, R1_STATE_TRAN); -} - -static int sdmmc_sd_set_bus_width(sdmmc_device_t *device) { - /* Try to send the APP command. */ - if (!sdmmc_device_send_r1_cmd(device, MMC_APP_CMD, (device->rca << 16), false, 0, R1_STATE_TRAN)) { - return 0; - } - - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, SD_APP_SET_BUS_WIDTH, SD_BUS_WIDTH_4, false, 0, R1_STATE_TRAN); -} - -static int sdmmc_sd_switch(sdmmc_device_t *device, uint32_t mode, uint32_t group, uint8_t value, uint8_t *data) { - sdmmc_command_t cmd = {}; - sdmmc_request_t req = {}; - - cmd.opcode = SD_SWITCH; - cmd.arg = ((mode << 31) | 0x00FFFFFF); - cmd.arg &= ~(0xF << (group * 4)); - cmd.arg |= (value << (group * 4)); - cmd.flags = SDMMC_RSP_R1; - - req.data = data; - req.blksz = 64; - req.num_blocks = 1; - req.is_read = true; - req.is_multi_block = false; - req.is_auto_cmd12 = false; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, &req, 0)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R1, &resp)) { - return 0; - } - - /* Evaluate the response. */ - if (is_sdmmc_device_r1_error(resp)) { - return 0; - } else { - return 1; - } -} - -static int sdmmc_sd_set_current_limit(sdmmc_device_t *device, uint8_t *status) { - /* Start with the highest possible limit. */ - int32_t current_limit = SD_SET_CURRENT_LIMIT_800; - - /* Try each limit. */ - while (current_limit > SD_SET_CURRENT_NO_CHANGE) { - /* Switch the current limit. */ - if (!sdmmc_sd_switch(device, SD_SWITCH_SET, 3, current_limit, status)) { - return 0; - } - - /* Current limit was set successfully. */ - if (((status[15] >> 4) & 0x0F) == current_limit) { - break; - } - - current_limit--; - } - - return 1; -} - -static int sdmmc_sd_switch_hs(sdmmc_device_t *device, uint32_t type, uint8_t *status) { - /* Test if the card supports high-speed mode. */ - if (!sdmmc_sd_switch(device, 0, 0, type, status)) { - return 0; - } - - uint32_t res_type = (status[16] & 0xF); - - /* This high-speed mode type is not supported. */ - if (res_type != type) { - return 0; - } - - if ((((uint16_t)status[0] << 8) | status[1]) < 0x320) { - /* Try to switch to high-speed mode. */ - if (!sdmmc_sd_switch(device, 1, 0, type, status)) { - return 0; - } - - /* Something failed when switching to high-speed mode. */ - if ((status[16] & 0xF) != res_type) { - return 0; - } - } - - return 1; -} - -static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status) { - /* Adjust the current limit. */ - if (!sdmmc_sd_set_current_limit(device, status)) { - return 0; - } - - /* Invalid bus width. */ - if (device->sdmmc->bus_width != SDMMC_BUS_WIDTH_4BIT) { - return 0; - } - - /* Get the supported high-speed type. */ - if (!sdmmc_sd_switch(device, 0, 0, 0xF, status)) { - return 0; - } - - /* High-speed SDR104 is supported. */ - if (status[13] & SD_MODE_UHS_SDR104) { - /* Switch to high-speed. */ - if (!sdmmc_sd_switch_hs(device, UHS_SDR104_BUS_SPEED, status)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR104)) { - return 0; - } - - /* Run tuning. */ - if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR104, MMC_SEND_TUNING_BLOCK)) { - return 0; - } - } else if (status[13] & SD_MODE_UHS_SDR50) { /* High-speed SDR50 is supported. */ - /* Switch to high-speed. */ - if (!sdmmc_sd_switch_hs(device, UHS_SDR50_BUS_SPEED, status)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR50)) { - return 0; - } - - /* Run tuning. */ - if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR50, MMC_SEND_TUNING_BLOCK)) { - return 0; - } - } else if (status[13] & SD_MODE_UHS_SDR12) { /* High-speed SDR12 is supported. */ - /* Switch to high-speed. */ - if (!sdmmc_sd_switch_hs(device, UHS_SDR12_BUS_SPEED, status)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR12)) { - return 0; - } - - /* Run tuning. */ - if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR12, MMC_SEND_TUNING_BLOCK)) { - return 0; - } - } else { - return 0; - } - - /* Peek the SD card's status. */ - return sdmmc_device_send_status(device); -} - -static int sdmmc_sd_switch_hs_high(sdmmc_device_t *device, uint8_t *status) { - /* Get the supported high-speed type. */ - if (!sdmmc_sd_switch(device, 0, 0, 0xF, status)) { - return 0; - } - - /* High-speed is supported. */ - if (status[13] & 2) { - /* Switch to high-speed. */ - if (!sdmmc_sd_switch_hs(device, SDHCI_CTRL_UHS_SDR25, status)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR25)) { - return 0; - } - - /* Peek the SD card's status. */ - return sdmmc_device_send_status(device); - } - - /* Nothing to do. */ - return 1; -} - -static int sdmmc_sd_status(sdmmc_device_t *device, uint8_t *ssr) { - sdmmc_command_t cmd = {}; - sdmmc_request_t req = {}; - - cmd.opcode = SD_APP_SD_STATUS; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R1; - - req.data = ssr; - req.blksz = 64; - req.num_blocks = 1; - req.is_read = true; - req.is_multi_block = false; - req.is_auto_cmd12 = false; - - /* Try to send the APP command. */ - if (!sdmmc_sd_send_app_cmd(device, &cmd, &req, 0, R1_STATE_TRAN)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R1, &resp)) { - return 0; - } - - /* Evaluate the response. */ - if (is_sdmmc_device_r1_error(resp)) { - return 0; - } else { - return 1; - } -} - -int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed) { - bool is_sd_ver2 = false; - uint32_t cid[4] = {0}; - uint32_t csd[4] = {0}; - uint8_t scr[8] = {0}; - uint8_t ssr[64] = {0}; - uint8_t switch_status[512] = {0}; - - /* Initialize our device's struct. */ - memset(device, 0, sizeof(sdmmc_device_t)); - - /* Try to initialize the driver. */ - if (!sdmmc_init(sdmmc, SDMMC_1, SDMMC_VOLTAGE_3V3, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_SD_IDENT)) { - sdmmc_error(sdmmc, "Failed to initialize the SDMMC driver!"); - return 0; - } - - /* Bind the underlying driver. */ - device->sdmmc = sdmmc; - - sdmmc_info(sdmmc, "SDMMC driver was successfully initialized for SD!"); - - /* Apply at least 74 clock cycles. The card should be ready afterwards. */ - udelay((74000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - /* Instruct the SD card to go idle. */ - if (!sdmmc_device_go_idle(device)) { - sdmmc_error(sdmmc, "Failed to go idle!"); - return 0; - } - - sdmmc_info(sdmmc, "SD card went idle!"); - - /* Get the SD card's interface operating condition. */ - if (!sdmmc_sd_send_if_cond(device, &is_sd_ver2)) { - sdmmc_error(sdmmc, "Failed to send if cond!"); - return 0; - } - - sdmmc_info(sdmmc, "Sent if cond to SD card!"); - - /* Get the SD card's operating conditions. */ - if (!sdmmc_sd_send_op_cond(device, is_sd_ver2, (bus_width == SDMMC_BUS_WIDTH_4BIT) && (bus_speed == SDMMC_SPEED_SD_SDR104))) { - sdmmc_error(sdmmc, "Failed to send op cond!"); - return 0; - } - - sdmmc_info(sdmmc, "Sent op cond to SD card!"); - - /* Get the SD card's CID. */ - if (!sdmmc_device_send_cid(device, cid)) { - sdmmc_error(sdmmc, "Failed to get CID!"); - return 0; - } - - sdmmc_info(sdmmc, "Got CID from SD card!"); - - /* Decode and save the CID. */ - sdmmc_sd_decode_cid(device, cid); - - /* Get the SD card's RCA. */ - if (!sdmmc_sd_send_relative_addr(device)) { - sdmmc_error(sdmmc, "Failed to get RCA!"); - return 0; - } - - sdmmc_info(sdmmc, "Got RCA (0x%08x) from SD card!", device->rca); - - /* Get the SD card's CSD. */ - if (!sdmmc_device_send_csd(device, csd)) { - sdmmc_error(sdmmc, "Failed to get CSD!"); - return 0; - } - - sdmmc_info(sdmmc, "Got CSD from SD card!"); - - /* Decode and save the CSD. */ - if (!sdmmc_sd_decode_csd(device, csd)) { - sdmmc_warn(sdmmc, "Got unknown CSD structure (0x%08x)!", device->csd.structure); - } - - /* If we never switched to 1.8V, change the bus speed mode. */ - if (!device->is_180v) { - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_DS)) { - sdmmc_error(sdmmc, "Failed to apply the correct bus speed!"); - return 0; - } - - sdmmc_info(sdmmc, "Speed mode has been adjusted!"); - } - - /* Select the SD card. */ - if (!sdmmc_device_select_card(device)) { - sdmmc_error(sdmmc, "Failed to select SD card!"); - return 0; - } - - sdmmc_info(sdmmc, "SD card is now selected!"); - - /* Change the SD card's block length. */ - if (!sdmmc_device_set_blocklen(device, 512)) { - sdmmc_error(sdmmc, "Failed to set SD card's block length!"); - return 0; - } - - sdmmc_info(sdmmc, "SD card's block length is now 512!"); - - /* It's a good practice to disconnect the pull-up resistor with ACMD42. */ - if (!sdmmc_sd_set_clr_card_detect(device)) { - sdmmc_error(sdmmc, "Failed to disconnect the pull-up resistor!"); - return 0; - } - - sdmmc_info(sdmmc, "Pull-up resistor is now disconnected!"); - - /* Get the SD card's SCR. */ - if (!sdmmc_sd_send_scr(device, scr)) { - sdmmc_error(sdmmc, "Failed to get SCR!"); - return 0; - } - - sdmmc_info(sdmmc, "Got SCR from SD card!"); - - /* Decode and save the SCR. */ - if (!sdmmc_sd_decode_scr(device, scr)) { - sdmmc_error(sdmmc, "Got unknown SCR structure!"); - return 0; - } - - /* Switch to wider bus (if supported). */ - if ((bus_width == SDMMC_BUS_WIDTH_4BIT) - && (device->scr.bus_widths & SD_SCR_BUS_WIDTH_4) - && (device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2))) { - if (!sdmmc_sd_set_bus_width(device)) { - sdmmc_error(sdmmc, "Failed to switch to wider bus!"); - return 0; - } - - sdmmc_select_bus_width(device->sdmmc, SDMMC_BUS_WIDTH_4BIT); - sdmmc_info(sdmmc, "Switched to wider bus!"); - } - - if (device->is_180v) { - /* Switch to high-speed from low voltage (if possible). */ - if (!sdmmc_sd_switch_hs_low(device, switch_status)) { - sdmmc_error(sdmmc, "Failed to switch to high-speed from low voltage!"); - return 0; - } - - sdmmc_info(sdmmc, "Switched to high-speed from low voltage!"); - } else if ((device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2)) && ((bus_speed != SDMMC_SPEED_SD_DS))) { - /* Switch to high-speed from high voltage (if possible). */ - if (!sdmmc_sd_switch_hs_high(device, switch_status)) { - sdmmc_error(sdmmc, "Failed to switch to high-speed from high voltage!"); - return 0; - } - - sdmmc_info(sdmmc, "Switched to high-speed from high voltage!"); - } - - /* Correct any inconsistent states. */ - sdmmc_adjust_sd_clock(sdmmc); - - /* Get the SD card's SSR. */ - if (!sdmmc_sd_status(device, ssr)) { - sdmmc_error(sdmmc, "Failed to get SSR!"); - return 0; - } - - sdmmc_info(sdmmc, "Got SSR from SD card!"); - - /* Decode and save the SSR. */ - sdmmc_sd_decode_ssr(device, scr); - - return 1; -} - -/* - MMC device functions. -*/ - -static void sdmmc_mmc_decode_cid(sdmmc_device_t *device, uint32_t *cid) { - switch (device->csd.mmca_vsn) { - case 0: /* MMC v1.0 - v1.2 */ - case 1: /* MMC v1.4 */ - device->cid.prod_name[6] = UNSTUFF_BITS(cid, 48, 8); - device->cid.manfid = UNSTUFF_BITS(cid, 104, 24); - device->cid.hwrev = UNSTUFF_BITS(cid, 44, 4); - device->cid.fwrev = UNSTUFF_BITS(cid, 40, 4); - device->cid.serial = UNSTUFF_BITS(cid, 16, 24); - break; - case 2: /* MMC v2.0 - v2.2 */ - case 3: /* MMC v3.1 - v3.3 */ - case 4: /* MMC v4 */ - device->cid.manfid = UNSTUFF_BITS(cid, 120, 8); - device->cid.oemid = UNSTUFF_BITS(cid, 104, 8); - device->cid.prv = UNSTUFF_BITS(cid, 48, 8); - device->cid.serial = UNSTUFF_BITS(cid, 16, 32); - break; - default: - break; - } - - device->cid.prod_name[0] = UNSTUFF_BITS(cid, 96, 8); - device->cid.prod_name[1] = UNSTUFF_BITS(cid, 88, 8); - device->cid.prod_name[2] = UNSTUFF_BITS(cid, 80, 8); - device->cid.prod_name[3] = UNSTUFF_BITS(cid, 72, 8); - device->cid.prod_name[4] = UNSTUFF_BITS(cid, 64, 8); - device->cid.prod_name[5] = UNSTUFF_BITS(cid, 56, 8); - - device->cid.month = UNSTUFF_BITS(cid, 12, 4); - device->cid.year = (UNSTUFF_BITS(cid, 8, 4) + 1997); - - if ((device->ext_csd.rev >= 5) && (device->cid.year < 2010)) { - device->cid.year += 16; - } -} - -static int sdmmc_mmc_decode_csd(sdmmc_device_t *device, uint32_t *csd) { - unsigned int e, m, a, b; - - device->csd.structure = UNSTUFF_BITS(csd, 126, 2); - - if (!device->csd.structure) { - return 0; - } - - device->csd.mmca_vsn = UNSTUFF_BITS(csd, 122, 4); - - m = UNSTUFF_BITS(csd, 115, 4); - e = UNSTUFF_BITS(csd, 112, 3); - device->csd.taac_ns = ((taac_exp[e] * taac_mant[m] + 9) / 10); - device->csd.taac_clks = (UNSTUFF_BITS(csd, 104, 8) * 100); - - m = UNSTUFF_BITS(csd, 99, 4); - e = UNSTUFF_BITS(csd, 96, 3); - device->csd.max_dtr = (tran_exp[e] * tran_mant[m]); - device->csd.cmdclass = UNSTUFF_BITS(csd, 84, 12); - - e = UNSTUFF_BITS(csd, 47, 3); - m = UNSTUFF_BITS(csd, 62, 12); - device->csd.capacity = ((1 + m) << (e + 2)); - - device->csd.read_blkbits = UNSTUFF_BITS(csd, 80, 4); - device->csd.read_partial = UNSTUFF_BITS(csd, 79, 1); - device->csd.write_misalign = UNSTUFF_BITS(csd, 78, 1); - device->csd.read_misalign = UNSTUFF_BITS(csd, 77, 1); - device->csd.dsr_imp = UNSTUFF_BITS(csd, 76, 1); - device->csd.r2w_factor = UNSTUFF_BITS(csd, 26, 3); - device->csd.write_blkbits = UNSTUFF_BITS(csd, 22, 4); - device->csd.write_partial = UNSTUFF_BITS(csd, 21, 1); - - if (device->csd.write_blkbits >= 9) { - a = UNSTUFF_BITS(csd, 42, 5); - b = UNSTUFF_BITS(csd, 37, 5); - device->csd.erase_size = ((a + 1) * (b + 1)); - device->csd.erase_size <<= (device->csd.write_blkbits - 9); - } - - return 1; -} - -static void sdmmc_mmc_decode_ext_csd(sdmmc_device_t *device, uint8_t *ext_csd) { - device->ext_csd.rev = ext_csd[EXT_CSD_REV]; - device->ext_csd.raw_ext_csd_structure = ext_csd[EXT_CSD_STRUCTURE]; - device->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE]; - device->ext_csd.raw_rpmb_size_mult = ext_csd[EXT_CSD_RPMB_MULT]; - device->ext_csd.raw_sectors[0] = ext_csd[EXT_CSD_SEC_CNT + 0]; - device->ext_csd.raw_sectors[1] = ext_csd[EXT_CSD_SEC_CNT + 1]; - device->ext_csd.raw_sectors[2] = ext_csd[EXT_CSD_SEC_CNT + 2]; - device->ext_csd.raw_sectors[3] = ext_csd[EXT_CSD_SEC_CNT + 3]; - device->ext_csd.bkops = ext_csd[EXT_CSD_BKOPS_SUPPORT]; - device->ext_csd.man_bkops_en = ext_csd[EXT_CSD_BKOPS_EN]; - device->ext_csd.raw_bkops_status = ext_csd[EXT_CSD_BKOPS_STATUS]; -} - -static int sdmmc_mmc_send_op_cond(sdmmc_device_t *device, SdmmcBusVoltage bus_voltage) { - sdmmc_command_t cmd = {}; - - /* Program a large timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - while (!is_timeout) { - /* Set high capacity bit. */ - uint32_t arg = SD_OCR_CCS; - - /* Set voltage bits. */ - if (bus_voltage == SDMMC_VOLTAGE_1V8) { - arg |= MMC_VDD_165_195; - } else if (bus_voltage == SDMMC_VOLTAGE_3V3) { - arg |= (MMC_VDD_33_34 | MMC_VDD_32_33 | MMC_VDD_31_32 | MMC_VDD_30_31 | MMC_VDD_29_30 | MMC_VDD_28_29 | MMC_VDD_27_28); - } else { - return 0; - } - - cmd.opcode = MMC_SEND_OP_COND; - cmd.arg = arg; - cmd.flags = SDMMC_RSP_R3; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, 0, 0)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R3, &resp)) { - return 0; - } - - /* Card Power up bit is set. */ - if (resp & MMC_CARD_BUSY) { - /* We have a SDHC block mode card. */ - if (resp & SD_OCR_CCS) { - device->is_block_sdhc = true; - } - - return 1; - } - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - - /* Delay for a minimum of 10 milliseconds. */ - mdelay(10); - } - - return 0; -} - -static int sdmmc_mmc_send_ext_csd(sdmmc_device_t *device, uint8_t *ext_csd) { - sdmmc_command_t cmd = {}; - sdmmc_request_t req = {}; - - cmd.opcode = MMC_SEND_EXT_CSD; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R1; - - req.data = ext_csd; - req.blksz = 512; - req.num_blocks = 1; - req.is_read = true; - req.is_multi_block = false; - req.is_auto_cmd12 = false; - - /* Try to send the command. */ - if (!sdmmc_send_cmd(device->sdmmc, &cmd, &req, 0)) { - return 0; - } - - uint32_t resp = 0; - - /* Try to load back the response. */ - if (!sdmmc_load_response(device->sdmmc, SDMMC_RSP_R1, &resp)) { - return 0; - } - - /* Evaluate the response. */ - if (is_sdmmc_device_r1_error(resp)) { - return 0; - } else { - return 1; - } -} - -static int sdmmc_mmc_set_relative_addr(sdmmc_device_t *device) { - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, MMC_SET_RELATIVE_ADDR, (device->rca << 16), false, 0, 0xFFFFFFFF); -} - -static int sdmmc_mmc_switch(sdmmc_device_t *device, uint32_t arg) { - /* Try to send the command. */ - return sdmmc_device_send_r1_cmd(device, MMC_SWITCH, arg, true, 0, 0xFFFFFFFF); -} - -static int sdmmc_mmc_select_bus_width(sdmmc_device_t *device, SdmmcBusWidth bus_width) { - uint32_t arg = 0; - - /* Choose the argument for the switch command. */ - switch (bus_width) { - case SDMMC_BUS_WIDTH_1BIT: - return 1; - case SDMMC_BUS_WIDTH_4BIT: - arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_BUS_WIDTH) << 16) | ((EXT_CSD_BUS_WIDTH_4) << 8)); - break; - case SDMMC_BUS_WIDTH_8BIT: - arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_BUS_WIDTH) << 16) | ((EXT_CSD_BUS_WIDTH_8) << 8)); - break; - default: - return 0; - } - - /* Try to switch the bus width. */ - if (sdmmc_mmc_switch(device, arg) && sdmmc_device_send_status(device)) { - sdmmc_select_bus_width(device->sdmmc, bus_width); - return 1; - } - - return 0; -} - -static int sdmmc_mmc_select_hs(sdmmc_device_t *device, bool ignore_status) { - uint32_t arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_HS_TIMING) << 16) | ((EXT_CSD_TIMING_HS) << 8)); - - /* Try to switch to HS. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - /* Check the status if necessary. */ - if (!ignore_status && !sdmmc_device_send_status(device)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_MMC_HS)) { - return 0; - } - - /* Check the status if necessary. */ - if (!ignore_status && !sdmmc_device_send_status(device)) { - return 0; - } - - return 1; -} - -static int sdmmc_mmc_select_hs200(sdmmc_device_t *device) { - uint32_t arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_HS_TIMING) << 16) | ((EXT_CSD_TIMING_HS200) << 8)); - - /* Try to switch to HS200. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_MMC_HS200)) { - return 0; - } - - /* Execute tuning procedure. */ - if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_MMC_HS200, MMC_SEND_TUNING_BLOCK_HS200)) { - return 0; - } - - /* Peek the current status. */ - return sdmmc_device_send_status(device); -} - -static int sdmmc_mmc_select_hs400(sdmmc_device_t *device) { - uint32_t arg = 0; - - /* Switch to HS200 first. */ - if (!sdmmc_mmc_select_hs200(device)) { - return 0; - } - - /* Fetch and set the tuning tap value. */ - sdmmc_set_tuning_tap_val(device->sdmmc); - - /* Switch to HS. */ - if (!sdmmc_mmc_select_hs(device, true)) { - return 0; - } - - arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_BUS_WIDTH) << 16) | ((EXT_CSD_DDR_BUS_WIDTH_8) << 8)); - - /* Try to switch to 8bit bus. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_HS_TIMING) << 16) | ((EXT_CSD_TIMING_HS400) << 8)); - - /* Try to switch to HS400. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_MMC_HS400)) { - return 0; - } - - /* Peek the current status. */ - return sdmmc_device_send_status(device); -} - -static int sdmmc_mmc_select_timing(sdmmc_device_t *device, SdmmcBusSpeed bus_speed) { - if ((bus_speed == SDMMC_SPEED_MMC_HS400) && - (device->sdmmc->bus_width == SDMMC_BUS_WIDTH_8BIT) && - (device->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_HS400_1_8V)) { - /* Switch to HS400. */ - return sdmmc_mmc_select_hs400(device); - } else if (((bus_speed == SDMMC_SPEED_MMC_HS400) || (bus_speed == SDMMC_SPEED_MMC_HS200)) && - ((device->sdmmc->bus_width == SDMMC_BUS_WIDTH_8BIT) || (device->sdmmc->bus_width == SDMMC_BUS_WIDTH_4BIT)) && - (device->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_HS200_1_8V)) { - /* Switch to HS200. */ - return sdmmc_mmc_select_hs200(device); - } else if (device->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_HS_52) { - /* Switch to HS. */ - return sdmmc_mmc_select_hs(device, false); - } - - return 0; -} - -static int sdmmc_mmc_select_bkops(sdmmc_device_t *device) { - uint32_t arg = (((MMC_SWITCH_MODE_SET_BITS) << 24) | ((EXT_CSD_BKOPS_EN) << 16) | ((EXT_CSD_BKOPS_LEVEL_2) << 8)); - - /* Try to enable bkops. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - /* Peek the current status. */ - return sdmmc_device_send_status(device); -} - -int sdmmc_mmc_select_partition(sdmmc_device_t *device, SdmmcPartitionNum partition) { - uint32_t arg = (((MMC_SWITCH_MODE_WRITE_BYTE) << 24) | ((EXT_CSD_PART_CONFIG) << 16) | ((partition) << 8)); - - /* Try to change the active partition. */ - if (!sdmmc_mmc_switch(device, arg)) { - return 0; - } - - /* Peek the current status. */ - return sdmmc_device_send_status(device); -} - -int sdmmc_device_mmc_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed) { - uint32_t cid[4] = {0}; - uint32_t csd[4] = {0}; - uint8_t ext_csd[512] = {0}; - - /* Initialize our device's struct. */ - memset(device, 0, sizeof(sdmmc_device_t)); - - /* Try to initialize the driver. */ - if (!sdmmc_init(sdmmc, SDMMC_4, SDMMC_VOLTAGE_1V8, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_MMC_IDENT)) { - sdmmc_error(sdmmc, "Failed to initialize the SDMMC driver!"); - return 0; - } - - /* Bind the underlying driver. */ - device->sdmmc = sdmmc; - - /* Set RCA. */ - device->rca = 0x01; - - sdmmc_info(sdmmc, "SDMMC driver was successfully initialized for eMMC!"); - - /* Apply at least 74 clock cycles. eMMC should be ready afterwards. */ - udelay((74000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - /* Instruct the eMMC to go idle. */ - if (!sdmmc_device_go_idle(device)) { - sdmmc_error(sdmmc, "Failed to go idle!"); - return 0; - } - - sdmmc_info(sdmmc, "eMMC went idle!"); - - /* Get the eMMC's operating conditions. */ - if (!sdmmc_mmc_send_op_cond(device, SDMMC_VOLTAGE_1V8)) { - sdmmc_error(sdmmc, "Failed to send op cond!"); - return 0; - } - - sdmmc_info(sdmmc, "Sent op cond to eMMC!"); - - /* Get the eMMC's CID. */ - if (!sdmmc_device_send_cid(device, cid)) { - sdmmc_error(sdmmc, "Failed to get CID!"); - return 0; - } - - sdmmc_info(sdmmc, "Got CID from eMMC!"); - - /* Set the eMMC's RCA. */ - if (!sdmmc_mmc_set_relative_addr(device)) { - sdmmc_error(sdmmc, "Failed to set RCA!"); - return 0; - } - - sdmmc_info(sdmmc, "RCA is now set in eMMC!"); - - /* Get the eMMC card's CSD. */ - if (!sdmmc_device_send_csd(device, csd)) { - sdmmc_error(sdmmc, "Failed to get CSD!"); - return 0; - } - - sdmmc_info(sdmmc, "Got CSD from eMMC!"); - - /* Decode and save the CSD. */ - if (!sdmmc_mmc_decode_csd(device, csd)) { - sdmmc_warn(sdmmc, "Got unknown CSD structure (0x%08x)!", device->csd.structure); - } - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_MMC_LEGACY)) { - sdmmc_error(sdmmc, "Failed to apply the correct bus speed!"); - return 0; - } - - sdmmc_info(sdmmc, "Speed mode has been adjusted!"); - - /* Select the eMMC card. */ - if (!sdmmc_device_select_card(device)) { - sdmmc_error(sdmmc, "Failed to select eMMC card!"); - return 0; - } - - sdmmc_info(sdmmc, "eMMC card is now selected!"); - - /* Change the eMMC's block length. */ - if (!sdmmc_device_set_blocklen(device, 512)) { - sdmmc_error(sdmmc, "Failed to set eMMC's block length!"); - return 0; - } - - sdmmc_info(sdmmc, "eMMC's block length is now 512!"); - - /* Only specification version 4 and later support the next features. */ - if (device->csd.mmca_vsn < CSD_SPEC_VER_4) { - return 1; - } - - /* Change the eMMC's bus width. */ - if (!sdmmc_mmc_select_bus_width(device, bus_width)) { - sdmmc_error(sdmmc, "Failed to set eMMC's bus width!"); - return 0; - } - - sdmmc_info(sdmmc, "eMMC's bus width has been adjusted!"); - - /* Get the eMMC's extended CSD. */ - if (!sdmmc_mmc_send_ext_csd(device, ext_csd)) { - sdmmc_error(sdmmc, "Failed to get EXT_CSD!"); - return 0; - } - - sdmmc_info(sdmmc, "Got EXT_CSD from eMMC!"); - - /* Decode and save the extended CSD. */ - sdmmc_mmc_decode_ext_csd(device, ext_csd); - - /* Decode and save the CID. */ - sdmmc_mmc_decode_cid(device, cid); - - /* TODO: Handle automatic BKOPS properly. Leave it disabled for now. */ - if (false && device->ext_csd.bkops && !(device->ext_csd.auto_bkops_en & EXT_CSD_AUTO_BKOPS_MASK)) { - sdmmc_mmc_select_bkops(device); - sdmmc_info(sdmmc, "BKOPS is enabled!"); - } else { - sdmmc_info(sdmmc, "BKOPS is disabled!"); - } - - /* Switch to high speed mode. */ - if (!sdmmc_mmc_select_timing(device, bus_speed)) { - sdmmc_error(sdmmc, "Failed to switch to high speed mode!"); - return 0; - } - - sdmmc_info(sdmmc, "Switched to high speed mode!"); - - /* Correct any inconsistent states. */ - sdmmc_adjust_sd_clock(sdmmc); - - return 1; -} \ No newline at end of file diff --git a/fusee/common/sdmmc/sdmmc.h b/fusee/common/sdmmc/sdmmc.h deleted file mode 100644 index 0a6be4838..000000000 --- a/fusee/common/sdmmc/sdmmc.h +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SDMMC_H -#define FUSEE_SDMMC_H - -#include "sdmmc_core.h" - -/* Structure for storing the MMC CID (adapted from Linux headers) */ -typedef struct { - uint32_t manfid; - uint8_t prod_name[8]; - uint8_t prv; - uint32_t serial; - uint16_t oemid; - uint16_t year; - uint8_t hwrev; - uint8_t fwrev; - uint8_t month; -} mmc_cid_t; - -/* Structure for storing the MMC CSD (adapted from Linux headers) */ -typedef struct { - uint8_t structure; - uint8_t mmca_vsn; - uint16_t cmdclass; - uint16_t taac_clks; - uint32_t taac_ns; - uint32_t c_size; - uint32_t r2w_factor; - uint32_t max_dtr; - uint32_t erase_size; /* In sectors */ - uint32_t read_blkbits; - uint32_t write_blkbits; - uint32_t capacity; - uint32_t read_partial:1, - read_misalign:1, - write_partial:1, - write_misalign:1, - dsr_imp:1; -} mmc_csd_t; - -/* Structure for storing the MMC extended CSD (adapted from Linux headers) */ -typedef struct { - uint8_t rev; - uint8_t erase_group_def; - uint8_t sec_feature_support; - uint8_t rel_sectors; - uint8_t rel_param; - uint8_t part_config; - uint8_t cache_ctrl; - uint8_t rst_n_function; - uint8_t max_packed_writes; - uint8_t max_packed_reads; - uint8_t packed_event_en; - uint32_t part_time; /* Units: ms */ - uint32_t sa_timeout; /* Units: 100ns */ - uint32_t generic_cmd6_time; /* Units: 10ms */ - uint32_t power_off_longtime; /* Units: ms */ - uint8_t power_off_notification; /* state */ - uint32_t hs_max_dtr; - uint32_t hs200_max_dtr; - uint32_t sectors; - uint32_t hc_erase_size; /* In sectors */ - uint32_t hc_erase_timeout; /* In milliseconds */ - uint32_t sec_trim_mult; /* Secure trim multiplier */ - uint32_t sec_erase_mult; /* Secure erase multiplier */ - uint32_t trim_timeout; /* In milliseconds */ - uint32_t partition_setting_completed; /* enable bit */ - uint64_t enhanced_area_offset; /* Units: Byte */ - uint32_t enhanced_area_size; /* Units: KB */ - uint32_t cache_size; /* Units: KB */ - uint32_t hpi_en; /* HPI enablebit */ - uint32_t hpi; /* HPI support bit */ - uint32_t hpi_cmd; /* cmd used as HPI */ - uint32_t bkops; /* background support bit */ - uint32_t man_bkops_en; /* manual bkops enable bit */ - uint32_t auto_bkops_en; /* auto bkops enable bit */ - uint32_t data_sector_size; /* 512 bytes or 4KB */ - uint32_t data_tag_unit_size; /* DATA TAG UNIT size */ - uint32_t boot_ro_lock; /* ro lock support */ - uint32_t boot_ro_lockable; - uint32_t ffu_capable; /* Firmware upgrade support */ - uint32_t cmdq_en; /* Command Queue enabled */ - uint32_t cmdq_support; /* Command Queue supported */ - uint32_t cmdq_depth; /* Command Queue depth */ - uint8_t fwrev[8]; /* FW version */ - uint8_t raw_exception_status; /* 54 */ - uint8_t raw_partition_support; /* 160 */ - uint8_t raw_rpmb_size_mult; /* 168 */ - uint8_t raw_erased_mem_count; /* 181 */ - uint8_t strobe_support; /* 184 */ - uint8_t raw_ext_csd_structure; /* 194 */ - uint8_t raw_card_type; /* 196 */ - uint8_t raw_driver_strength; /* 197 */ - uint8_t out_of_int_time; /* 198 */ - uint8_t raw_pwr_cl_52_195; /* 200 */ - uint8_t raw_pwr_cl_26_195; /* 201 */ - uint8_t raw_pwr_cl_52_360; /* 202 */ - uint8_t raw_pwr_cl_26_360; /* 203 */ - uint8_t raw_s_a_timeout; /* 217 */ - uint8_t raw_hc_erase_gap_size; /* 221 */ - uint8_t raw_erase_timeout_mult; /* 223 */ - uint8_t raw_hc_erase_grp_size; /* 224 */ - uint8_t raw_sec_trim_mult; /* 229 */ - uint8_t raw_sec_erase_mult; /* 230 */ - uint8_t raw_sec_feature_support; /* 231 */ - uint8_t raw_trim_mult; /* 232 */ - uint8_t raw_pwr_cl_200_195; /* 236 */ - uint8_t raw_pwr_cl_200_360; /* 237 */ - uint8_t raw_pwr_cl_ddr_52_195; /* 238 */ - uint8_t raw_pwr_cl_ddr_52_360; /* 239 */ - uint8_t raw_pwr_cl_ddr_200_360; /* 253 */ - uint8_t raw_bkops_status; /* 246 */ - uint8_t raw_sectors[4]; /* 212 - 4 bytes */ - uint8_t pre_eol_info; /* 267 */ - uint8_t device_life_time_est_typ_a; /* 268 */ - uint8_t device_life_time_est_typ_b; /* 269 */ - uint32_t feature_support; -} mmc_ext_csd_t; - -/* Structure for storing the SD SCR (adapted from Linux headers) */ -typedef struct { - uint8_t sda_vsn; - uint8_t sda_spec3; - uint8_t bus_widths; - uint8_t cmds; -} sd_scr_t; - -/* Structure for storing the SD SSR (adapted from Linux headers) */ -typedef struct { - uint8_t dat_bus_width; - uint8_t secured_mode; - uint16_t sd_card_type; - uint8_t speed_class; - uint8_t uhs_speed_grade; - uint8_t uhs_au_size; - uint8_t video_speed_class; - uint8_t app_perf_class; -} sd_ssr_t; - -/* Structure describing a SDMMC device's context. */ -typedef struct { - /* Underlying driver context. */ - sdmmc_t *sdmmc; - - bool is_180v; - bool is_block_sdhc; - uint32_t rca; - mmc_cid_t cid; - mmc_csd_t csd; - mmc_ext_csd_t ext_csd; - sd_scr_t scr; - sd_ssr_t ssr; -} sdmmc_device_t; - -int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed); -int sdmmc_device_mmc_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed); -int sdmmc_device_read(sdmmc_device_t *device, uint32_t sector, uint32_t num_sectors, void *data); -int sdmmc_device_write(sdmmc_device_t *device, uint32_t sector, uint32_t num_sectors, void *data); -int sdmmc_device_finish(sdmmc_device_t *device); -int sdmmc_mmc_select_partition(sdmmc_device_t *device, SdmmcPartitionNum partition); - -#endif \ No newline at end of file diff --git a/fusee/common/sdmmc/sdmmc_core.c b/fusee/common/sdmmc/sdmmc_core.c deleted file mode 100644 index 5e002caaf..000000000 --- a/fusee/common/sdmmc/sdmmc_core.c +++ /dev/null @@ -1,1990 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include - -#include "sdmmc_core.h" -#if defined(FUSEE_STAGE1_SRC) -#include "../../../fusee/fusee-primary/fusee-primary-main/src/car.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/fuse.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/pinmux.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/timers.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/apb_misc.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/gpio.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/pmc.h" -#include "../../../fusee/fusee-primary/fusee-primary-main/src/max7762x.h" -#elif defined(FUSEE_STAGE2_SRC) -#include "../../../fusee/fusee-secondary/src/car.h" -#include "../../../fusee/fusee-secondary/src/fuse.h" -#include "../../../fusee/fusee-secondary/src/pinmux.h" -#include "../../../fusee/fusee-secondary/src/timers.h" -#include "../../../fusee/fusee-secondary/src/apb_misc.h" -#include "../../../fusee/fusee-secondary/src/gpio.h" -#include "../../../fusee/fusee-secondary/src/pmc.h" -#include "../../../fusee/fusee-secondary/src/max7762x.h" -#endif -#include "../log.h" - -static void sdmmc_print(sdmmc_t *sdmmc, ScreenLogLevel screen_log_level, char *fmt, va_list list) { - if (screen_log_level > log_get_log_level()) { - return; - } - print(screen_log_level, "%s: ", sdmmc->name); - vprint(screen_log_level, fmt, list); - print(screen_log_level | SCREEN_LOG_LEVEL_NO_PREFIX, "\n"); -} - -void sdmmc_error(sdmmc_t *sdmmc, char *fmt, ...) { - va_list list; - va_start(list, fmt); - sdmmc_print(sdmmc, SCREEN_LOG_LEVEL_ERROR, fmt, list); - va_end(list); -} - -void sdmmc_warn(sdmmc_t *sdmmc, char *fmt, ...) { - va_list list; - va_start(list, fmt); - sdmmc_print(sdmmc, SCREEN_LOG_LEVEL_WARNING, fmt, list); - va_end(list); -} - -void sdmmc_info(sdmmc_t *sdmmc, char *fmt, ...) { - va_list list; - va_start(list, fmt); - sdmmc_print(sdmmc, SCREEN_LOG_LEVEL_INFO, fmt, list); - va_end(list); -} - -void sdmmc_debug(sdmmc_t *sdmmc, char *fmt, ...) { - va_list list; - va_start(list, fmt); - sdmmc_print(sdmmc, SCREEN_LOG_LEVEL_SD_DEBUG, fmt, list); - va_end(list); -} - -void sdmmc_dump_regs(sdmmc_t *sdmmc) { - sdmmc_debug(sdmmc, "dma_address: 0x%08" PRIX32, sdmmc->regs->dma_address); - sdmmc_debug(sdmmc, "block_size: 0x%04" PRIX16, sdmmc->regs->block_size); - sdmmc_debug(sdmmc, "block_count: 0x%04" PRIX16, sdmmc->regs->block_count); - sdmmc_debug(sdmmc, "argument: 0x%08" PRIX32, sdmmc->regs->argument); - sdmmc_debug(sdmmc, "transfer_mode: 0x%04" PRIX16, sdmmc->regs->transfer_mode); - sdmmc_debug(sdmmc, "command: 0x%04" PRIX16, sdmmc->regs->command); - sdmmc_debug(sdmmc, "response[0]: 0x%08" PRIX32, sdmmc->regs->response[0]); - sdmmc_debug(sdmmc, "response[1]: 0x%08" PRIX32, sdmmc->regs->response[1]); - sdmmc_debug(sdmmc, "response[2]: 0x%08" PRIX32, sdmmc->regs->response[2]); - sdmmc_debug(sdmmc, "response[3]: 0x%08" PRIX32, sdmmc->regs->response[3]); - sdmmc_debug(sdmmc, "buffer: 0x%08" PRIX32, sdmmc->regs->buffer); - sdmmc_debug(sdmmc, "present_state: 0x%08" PRIX32, sdmmc->regs->present_state); - sdmmc_debug(sdmmc, "host_control: 0x%02" PRIX8, sdmmc->regs->host_control); - sdmmc_debug(sdmmc, "power_control: 0x%02" PRIX8, sdmmc->regs->power_control); - sdmmc_debug(sdmmc, "block_gap_control: 0x%02" PRIX8, sdmmc->regs->block_gap_control); - sdmmc_debug(sdmmc, "wake_up_control: 0x%02" PRIX8, sdmmc->regs->wake_up_control); - sdmmc_debug(sdmmc, "clock_control: 0x%04" PRIX16, sdmmc->regs->clock_control); - sdmmc_debug(sdmmc, "timeout_control: 0x%02" PRIX8, sdmmc->regs->timeout_control); - sdmmc_debug(sdmmc, "software_reset: 0x%02" PRIX8, sdmmc->regs->software_reset); - sdmmc_debug(sdmmc, "int_status: 0x%08" PRIX32, sdmmc->regs->int_status); - sdmmc_debug(sdmmc, "int_enable: 0x%08" PRIX32, sdmmc->regs->int_enable); - sdmmc_debug(sdmmc, "signal_enable: 0x%08" PRIX32, sdmmc->regs->signal_enable); - sdmmc_debug(sdmmc, "acmd12_err: 0x%04" PRIX16, sdmmc->regs->acmd12_err); - sdmmc_debug(sdmmc, "host_control2: 0x%04" PRIX16, sdmmc->regs->host_control2); - sdmmc_debug(sdmmc, "capabilities: 0x%08" PRIX32, sdmmc->regs->capabilities); - sdmmc_debug(sdmmc, "capabilities_1: 0x%08" PRIX32, sdmmc->regs->capabilities_1); - sdmmc_debug(sdmmc, "max_current: 0x%08" PRIX32, sdmmc->regs->max_current); - sdmmc_debug(sdmmc, "set_acmd12_error: 0x%04" PRIX16, sdmmc->regs->set_acmd12_error); - sdmmc_debug(sdmmc, "set_int_error: 0x%04" PRIX16, sdmmc->regs->set_int_error); - sdmmc_debug(sdmmc, "adma_error: 0x%02" PRIX8, sdmmc->regs->adma_error); - sdmmc_debug(sdmmc, "adma_address: 0x%08" PRIX32, sdmmc->regs->adma_address); - sdmmc_debug(sdmmc, "upper_adma_address: 0x%08" PRIX32, sdmmc->regs->upper_adma_address); - sdmmc_debug(sdmmc, "preset_for_init: 0x%04" PRIX16, sdmmc->regs->preset_for_init); - sdmmc_debug(sdmmc, "preset_for_default: 0x%04" PRIX16, sdmmc->regs->preset_for_default); - sdmmc_debug(sdmmc, "preset_for_high: 0x%04" PRIX16, sdmmc->regs->preset_for_high); - sdmmc_debug(sdmmc, "preset_for_sdr12: 0x%04" PRIX16, sdmmc->regs->preset_for_sdr12); - sdmmc_debug(sdmmc, "preset_for_sdr25: 0x%04" PRIX16, sdmmc->regs->preset_for_sdr25); - sdmmc_debug(sdmmc, "preset_for_sdr50: 0x%04" PRIX16, sdmmc->regs->preset_for_sdr50); - sdmmc_debug(sdmmc, "preset_for_sdr104: 0x%04" PRIX16, sdmmc->regs->preset_for_sdr104); - sdmmc_debug(sdmmc, "preset_for_ddr50: 0x%04" PRIX16, sdmmc->regs->preset_for_ddr50); - sdmmc_debug(sdmmc, "slot_int_status: 0x%04" PRIX16, sdmmc->regs->slot_int_status); - sdmmc_debug(sdmmc, "host_version: 0x%04" PRIX16, sdmmc->regs->host_version); - sdmmc_debug(sdmmc, "vendor_clock_cntrl: 0x%08" PRIX32, sdmmc->regs->vendor_clock_cntrl); - sdmmc_debug(sdmmc, "vendor_sys_sw_cntrl: 0x%08" PRIX32, sdmmc->regs->vendor_sys_sw_cntrl); - sdmmc_debug(sdmmc, "vendor_err_intr_status: 0x%08" PRIX32, sdmmc->regs->vendor_err_intr_status); - sdmmc_debug(sdmmc, "vendor_cap_overrides: 0x%08" PRIX32, sdmmc->regs->vendor_cap_overrides); - sdmmc_debug(sdmmc, "vendor_boot_cntrl: 0x%08" PRIX32, sdmmc->regs->vendor_boot_cntrl); - sdmmc_debug(sdmmc, "vendor_boot_ack_timeout: 0x%08" PRIX32, sdmmc->regs->vendor_boot_ack_timeout); - sdmmc_debug(sdmmc, "vendor_boot_dat_timeout: 0x%08" PRIX32, sdmmc->regs->vendor_boot_dat_timeout); - sdmmc_debug(sdmmc, "vendor_debounce_count: 0x%08" PRIX32, sdmmc->regs->vendor_debounce_count); - sdmmc_debug(sdmmc, "vendor_misc_cntrl: 0x%08" PRIX32, sdmmc->regs->vendor_misc_cntrl); - sdmmc_debug(sdmmc, "max_current_override: 0x%08" PRIX32, sdmmc->regs->max_current_override); - sdmmc_debug(sdmmc, "max_current_override_hi: 0x%08" PRIX32, sdmmc->regs->max_current_override_hi); - sdmmc_debug(sdmmc, "vendor_io_trim_cntrl: 0x%08" PRIX32, sdmmc->regs->vendor_io_trim_cntrl); - sdmmc_debug(sdmmc, "vendor_dllcal_cfg: 0x%08" PRIX32, sdmmc->regs->vendor_dllcal_cfg); - sdmmc_debug(sdmmc, "vendor_dll_ctrl0: 0x%08" PRIX32, sdmmc->regs->vendor_dll_ctrl0); - sdmmc_debug(sdmmc, "vendor_dll_ctrl1: 0x%08" PRIX32, sdmmc->regs->vendor_dll_ctrl1); - sdmmc_debug(sdmmc, "vendor_dllcal_cfg_sta: 0x%08" PRIX32, sdmmc->regs->vendor_dllcal_cfg_sta); - sdmmc_debug(sdmmc, "vendor_tuning_cntrl0: 0x%08" PRIX32, sdmmc->regs->vendor_tuning_cntrl0); - sdmmc_debug(sdmmc, "vendor_tuning_cntrl1: 0x%08" PRIX32, sdmmc->regs->vendor_tuning_cntrl1); - sdmmc_debug(sdmmc, "vendor_tuning_status0: 0x%08" PRIX32, sdmmc->regs->vendor_tuning_status0); - sdmmc_debug(sdmmc, "vendor_tuning_status1: 0x%08" PRIX32, sdmmc->regs->vendor_tuning_status1); - sdmmc_debug(sdmmc, "vendor_clk_gate_hysteresis_count: 0x%08" PRIX32, sdmmc->regs->vendor_clk_gate_hysteresis_count); - sdmmc_debug(sdmmc, "vendor_preset_val0: 0x%08" PRIX32, sdmmc->regs->vendor_preset_val0); - sdmmc_debug(sdmmc, "vendor_preset_val1: 0x%08" PRIX32, sdmmc->regs->vendor_preset_val1); - sdmmc_debug(sdmmc, "vendor_preset_val2: 0x%08" PRIX32, sdmmc->regs->vendor_preset_val2); - sdmmc_debug(sdmmc, "sdmemcomppadctrl: 0x%08" PRIX32, sdmmc->regs->sdmemcomppadctrl); - sdmmc_debug(sdmmc, "auto_cal_config: 0x%08" PRIX32, sdmmc->regs->auto_cal_config); - sdmmc_debug(sdmmc, "auto_cal_interval: 0x%08" PRIX32, sdmmc->regs->auto_cal_interval); - sdmmc_debug(sdmmc, "auto_cal_status: 0x%08" PRIX32, sdmmc->regs->auto_cal_status); - sdmmc_debug(sdmmc, "io_spare: 0x%08" PRIX32, sdmmc->regs->io_spare); - sdmmc_debug(sdmmc, "sdmmca_mccif_fifoctrl: 0x%08" PRIX32, sdmmc->regs->sdmmca_mccif_fifoctrl); - sdmmc_debug(sdmmc, "timeout_wcoal_sdmmca: 0x%08" PRIX32, sdmmc->regs->timeout_wcoal_sdmmca); -} - -typedef struct { - uint32_t clk_source_val; - uint32_t clk_div_val; -} sdmmc_clk_source_t; - -static sdmmc_clk_source_t sdmmc_clk_sources[4] = {0}; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -/* Check if the SDMMC device clock is held in reset. */ -static bool is_sdmmc_clk_rst(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - return (car->rst_dev_l & CLK_L_SDMMC1); - case SDMMC_2: - return (car->rst_dev_l & CLK_L_SDMMC2); - case SDMMC_3: - return (car->rst_dev_u & CLK_U_SDMMC3); - case SDMMC_4: - return (car->rst_dev_l & CLK_L_SDMMC4); - } - - return false; -} - -/* Put the SDMMC device clock in reset. */ -static void sdmmc_clk_set_rst(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - car->rst_dev_l_set = CLK_L_SDMMC1; - break; - case SDMMC_2: - car->rst_dev_l_set = CLK_L_SDMMC2; - break; - case SDMMC_3: - car->rst_dev_u_set = CLK_U_SDMMC3; - break; - case SDMMC_4: - car->rst_dev_l_set = CLK_L_SDMMC4; - break; - } -} - -/* Take the SDMMC device clock out of reset. */ -static void sdmmc_clk_clear_rst(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - car->rst_dev_l_clr = CLK_L_SDMMC1; - break; - case SDMMC_2: - car->rst_dev_l_clr = CLK_L_SDMMC2; - break; - case SDMMC_3: - car->rst_dev_u_clr = CLK_U_SDMMC3; - break; - case SDMMC_4: - car->rst_dev_l_clr = CLK_L_SDMMC4; - break; - } -} - -/* Check if the SDMMC device clock is enabled. */ -static bool is_sdmmc_clk_enb(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - return (car->clk_out_enb_l & CLK_L_SDMMC1); - case SDMMC_2: - return (car->clk_out_enb_l & CLK_L_SDMMC2); - case SDMMC_3: - return (car->clk_out_enb_u & CLK_U_SDMMC3); - case SDMMC_4: - return (car->clk_out_enb_l & CLK_L_SDMMC4); - } - - return false; -} - -/* Enable the SDMMC device clock. */ -static void sdmmc_clk_set_enb(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - car->clk_enb_l_set = CLK_L_SDMMC1; - break; - case SDMMC_2: - car->clk_enb_l_set = CLK_L_SDMMC2; - break; - case SDMMC_3: - car->clk_enb_u_set = CLK_U_SDMMC3; - break; - case SDMMC_4: - car->clk_enb_l_set = CLK_L_SDMMC4; - break; - } -} - -/* Disable the SDMMC device clock. */ -static void sdmmc_clk_clear_enb(SdmmcControllerNum controller) { - volatile tegra_car_t *car = car_get_regs(); - - switch (controller) { - case SDMMC_1: - car->clk_enb_l_clr = CLK_L_SDMMC1; - break; - case SDMMC_2: - car->clk_enb_l_clr = CLK_L_SDMMC2; - break; - case SDMMC_3: - car->clk_enb_u_clr = CLK_U_SDMMC3; - break; - case SDMMC_4: - car->clk_enb_l_clr = CLK_L_SDMMC4; - break; - } -} - -/* Get the appropriate SDMMC maximum frequency. */ -static int sdmmc_get_sdclk_freq(SdmmcBusSpeed bus_speed) { - switch (bus_speed) { - case SDMMC_SPEED_MMC_IDENT: - case SDMMC_SPEED_MMC_LEGACY: - return 26000; - case SDMMC_SPEED_MMC_HS: - return 52000; - case SDMMC_SPEED_MMC_HS200: - case SDMMC_SPEED_MMC_HS400: - case SDMMC_SPEED_SD_SDR104: - case SDMMC_SPEED_EMU_SDR104: - return 200000; - case SDMMC_SPEED_SD_IDENT: - case SDMMC_SPEED_SD_DS: - case SDMMC_SPEED_SD_SDR12: - return 25000; - case SDMMC_SPEED_SD_HS: - case SDMMC_SPEED_SD_SDR25: - return 50000; - case SDMMC_SPEED_SD_SDR50: - return 100000; - case SDMMC_SPEED_GC_ASIC_FPGA: - return 40800; - case SDMMC_SPEED_GC_ASIC: - return 200000; - default: - return 0; - } -} - -/* Get the appropriate SDMMC divider for the SDCLK. */ -static int sdmmc_get_sdclk_div(SdmmcBusSpeed bus_speed) { - switch (bus_speed) { - case SDMMC_SPEED_MMC_IDENT: - return 66; - case SDMMC_SPEED_SD_IDENT: - /* return 64; */ - case SDMMC_SPEED_MMC_LEGACY: - case SDMMC_SPEED_MMC_HS: - case SDMMC_SPEED_MMC_HS200: - case SDMMC_SPEED_MMC_HS400: - case SDMMC_SPEED_SD_DS: - case SDMMC_SPEED_SD_HS: - case SDMMC_SPEED_SD_SDR12: - case SDMMC_SPEED_SD_SDR25: - case SDMMC_SPEED_SD_SDR50: - case SDMMC_SPEED_SD_SDR104: - case SDMMC_SPEED_GC_ASIC_FPGA: - case SDMMC_SPEED_EMU_SDR104: - return 1; - case SDMMC_SPEED_GC_ASIC: - return 2; - default: - return 0; - } -} - -/* Set the device clock source and CAR divider. */ -static int sdmmc_clk_set_source(SdmmcControllerNum controller, uint32_t clk_freq) { - volatile tegra_car_t *car = car_get_regs(); - - uint32_t car_div = 0; - uint32_t out_freq = 0; - - switch (clk_freq) { - case 25000: - out_freq = 24728; - car_div = SDMMC_CAR_DIVIDER_SD_SDR12; - break; - case 26000: - out_freq = 25500; - car_div = SDMMC_CAR_DIVIDER_MMC_LEGACY; - break; - case 40800: - out_freq = 40800; - car_div = SDMMC_CAR_DIVIDER_GC_ASIC_FPGA; - break; - case 50000: - out_freq = 48000; - car_div = SDMMC_CAR_DIVIDER_SD_SDR25; - break; - case 52000: - out_freq = 51000; - car_div = SDMMC_CAR_DIVIDER_MMC_HS; - break; - case 100000: - out_freq = 90667; - car_div = SDMMC_CAR_DIVIDER_SD_SDR50; - break; - case 200000: - out_freq = 163200; - car_div = SDMMC_CAR_DIVIDER_MMC_HS200; - break; - case 208000: - out_freq = 204000; - car_div = SDMMC_CAR_DIVIDER_SD_SDR104; - break; - default: - return 0; - } - - sdmmc_clk_sources[controller].clk_source_val = clk_freq; - sdmmc_clk_sources[controller].clk_div_val = out_freq; - - switch (controller) { - case SDMMC_1: - car->clk_source_sdmmc1 = (CLK_SOURCE_FIRST | car_div); - break; - case SDMMC_2: - car->clk_source_sdmmc2 = (CLK_SOURCE_FIRST | car_div); - break; - case SDMMC_3: - car->clk_source_sdmmc3 = (CLK_SOURCE_FIRST | car_div); - break; - case SDMMC_4: - car->clk_source_sdmmc4 = (CLK_SOURCE_FIRST | car_div); - break; - } - - return out_freq; -} - -/* Adjust the device clock source value. */ -static int sdmmc_clk_adjust_source(SdmmcControllerNum controller, uint32_t clk_source_val) { - uint32_t out_val = 0; - - if (sdmmc_clk_sources[controller].clk_source_val == clk_source_val) { - out_val = sdmmc_clk_sources[controller].clk_div_val; - } else { - bool was_sdmmc_clk_enb = is_sdmmc_clk_enb(controller); - - /* Clock was already enabled. Disable it. */ - if (was_sdmmc_clk_enb) { - sdmmc_clk_clear_enb(controller); - } - - out_val = sdmmc_clk_set_source(controller, clk_source_val); - - /* Clock was already enabled. Enable it back. */ - if (was_sdmmc_clk_enb) { - sdmmc_clk_set_enb(controller); - } - - /* Dummy read for value refreshing. */ - is_sdmmc_clk_rst(controller); - } - - return out_val; -} - -/* Enable the SD clock if possible. */ -static void sdmmc_enable_sd_clock(sdmmc_t *sdmmc) { - if ((sdmmc->has_sd) && !(sdmmc->regs->clock_control & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)) { - sdmmc->regs->clock_control |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; - } - sdmmc->is_sd_clk_enabled = true; -} - -/* Disable the SD clock. */ -static void sdmmc_disable_sd_clock(sdmmc_t *sdmmc) { - sdmmc->is_sd_clk_enabled = false; - sdmmc->regs->clock_control &= ~TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE; -} - -/* Automatically enable or disable the SD clock. */ -void sdmmc_adjust_sd_clock(sdmmc_t *sdmmc) { - if (!(sdmmc->has_sd) && (sdmmc->regs->clock_control & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)) { - sdmmc_disable_sd_clock(sdmmc); - } else if (sdmmc->is_sd_clk_enabled && !(sdmmc->regs->clock_control & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)) { - sdmmc_enable_sd_clock(sdmmc); - } -} - -/* Return the clock control value. Used for dummy reads. */ -static int sdmmc_get_sd_clock_control(sdmmc_t *sdmmc) { - return sdmmc->regs->clock_control; -} - -/* Start the SDMMC clock. */ -static void sdmmc_clk_start(SdmmcControllerNum controller, uint32_t clk_source_val) { - /* Clock was already enabled. Disable it. */ - if (is_sdmmc_clk_enb(controller)) { - sdmmc_clk_clear_enb(controller); - } - - /* Put the device clock in reset. */ - sdmmc_clk_set_rst(controller); - - /* Configure the device clock source. */ - uint32_t clk_div = sdmmc_clk_set_source(controller, clk_source_val); - - /* Enable the device clock. */ - sdmmc_clk_set_enb(controller); - - /* Dummy read for value refreshing. */ - is_sdmmc_clk_rst(controller); - - /* Synchronize. */ - udelay((100000 + clk_div - 1) / clk_div); - - /* Take the device clock out of reset. */ - sdmmc_clk_clear_rst(controller); - - /* Dummy read for value refreshing. */ - is_sdmmc_clk_rst(controller); -} - -/* Stop the SDMMC clock. */ -static void sdmmc_clk_stop(SdmmcControllerNum controller) { - /* Put the device clock in reset. */ - sdmmc_clk_set_rst(controller); - - /* Disable the device clock. */ - sdmmc_clk_clear_enb(controller); - - /* Dummy read for value refreshing. */ - is_sdmmc_clk_rst(controller); -} - -/* Configure clock trimming. */ -static void sdmmc_vendor_clock_cntrl_config(sdmmc_t *sdmmc) { - bool is_mariko = is_soc_mariko(); - - /* Clear the I/O conditioning constants. */ - sdmmc->regs->vendor_clock_cntrl &= ~(SDMMC_CLOCK_TRIM_MASK | SDMMC_CLOCK_TAP_MASK); - - /* Set the PADPIPE clock enable */ - sdmmc->regs->vendor_clock_cntrl |= SDMMC_CLOCK_PADPIPE_CLKEN_OVERRIDE; - - /* Set the appropriate trim value. */ - switch (sdmmc->controller) { - case SDMMC_1: - sdmmc->regs->vendor_clock_cntrl |= (is_mariko ? SDMMC_CLOCK_TRIM_SDMMC1_MARIKO : SDMMC_CLOCK_TRIM_SDMMC1_ERISTA); - break; - case SDMMC_2: - sdmmc->regs->vendor_clock_cntrl |= (is_mariko ? SDMMC_CLOCK_TRIM_SDMMC2_MARIKO : SDMMC_CLOCK_TRIM_SDMMC2_ERISTA); - break; - case SDMMC_3: - sdmmc->regs->vendor_clock_cntrl |= SDMMC_CLOCK_TRIM_SDMMC3; - break; - case SDMMC_4: - sdmmc->regs->vendor_clock_cntrl |= (is_mariko ? SDMMC_CLOCK_TRIM_SDMMC4_MARIKO : SDMMC_CLOCK_TRIM_SDMMC4_ERISTA); - break; - } - - /* Clear the SPI_MODE clock enable. */ - sdmmc->regs->vendor_clock_cntrl &= ~(SDMMC_CLOCK_SPI_MODE_CLKEN_OVERRIDE); -} - -/* Configure automatic calibration. */ -static int sdmmc_autocal_config(sdmmc_t *sdmmc, SdmmcBusVoltage voltage) { - bool is_mariko = is_soc_mariko(); - - switch (sdmmc->controller) { - case SDMMC_1: - case SDMMC_3: - switch (voltage) { - case SDMMC_VOLTAGE_1V8: - sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK); - sdmmc->regs->auto_cal_config |= (is_mariko ? SDMMC_AUTOCAL_PDPU_SDMMC1_1V8_MARIKO : SDMMC_AUTOCAL_PDPU_SDMMC1_1V8_ERISTA); - break; - case SDMMC_VOLTAGE_3V3: - sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK); - sdmmc->regs->auto_cal_config |= (is_mariko ? SDMMC_AUTOCAL_PDPU_SDMMC1_3V3_MARIKO : SDMMC_AUTOCAL_PDPU_SDMMC1_3V3_ERISTA); - break; - default: - sdmmc_error(sdmmc, "uSD does not support requested voltage!"); - return 0; - } - - break; - case SDMMC_2: - case SDMMC_4: - if (voltage != SDMMC_VOLTAGE_1V8) { - sdmmc_error(sdmmc, "eMMC can only run at 1V8!"); - return 0; - } - sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK); - sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC4_1V8; - break; - } - - return 1; -} - -/* Run automatic calibration. */ -static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage) { - volatile tegra_padctl_t *padctl = padctl_get_regs(); - bool restart_sd_clock = false; - bool is_mariko = is_soc_mariko(); - - /* SD clock is enabled. Disable it and restart later. */ - if (sdmmc->is_sd_clk_enabled) { - restart_sd_clock = true; - sdmmc_disable_sd_clock(sdmmc); - } - - /* Set PAD_E_INPUT_OR_E_PWRD */ - if (!(sdmmc->regs->sdmemcomppadctrl & 0x80000000)) { - sdmmc->regs->sdmemcomppadctrl |= 0x80000000; - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Delay. */ - udelay(1); - } - - /* Start automatic calibration. */ - sdmmc->regs->auto_cal_config |= (SDMMC_AUTOCAL_START | SDMMC_AUTOCAL_ENABLE); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Delay. */ - udelay(2); - - /* Get current time. */ - uint32_t timebase = get_time(); - - /* Wait until the autocal is complete. */ - while ((sdmmc->regs->auto_cal_status & SDMMC_AUTOCAL_ACTIVE)) { - /* Ensure we haven't timed out. */ - if (get_time_since(timebase) > SDMMC_AUTOCAL_TIMEOUT) { - sdmmc_warn(sdmmc, "Auto-calibration timed out!"); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Upon timeout, fall back to standard values. */ - if (sdmmc->controller == SDMMC_1) { - uint32_t drvup, drvdn = 0; - if (is_mariko) { - drvup = 0x8; - drvdn = 0x8; - } else { - drvup = (voltage == SDMMC_VOLTAGE_3V3) ? 0xC : 0xB; - drvdn = (voltage == SDMMC_VOLTAGE_3V3) ? 0xC : 0xF; - } - uint32_t value = padctl->sdmmc1_pad_cfgpadctrl; - value &= ~(SDMMC1_PAD_CAL_DRVUP_MASK | SDMMC1_PAD_CAL_DRVDN_MASK); - value |= (drvup << SDMMC1_PAD_CAL_DRVUP_SHIFT); - value |= (drvdn << SDMMC1_PAD_CAL_DRVDN_SHIFT); - padctl->sdmmc1_pad_cfgpadctrl = value; - } else if (sdmmc->controller == SDMMC_2) { - uint32_t drvup, drvdn = 0; - if (is_mariko) { - drvup = 0xA; - drvdn = 0xA; - uint32_t value = padctl->emmc2_pad_cfgpadctrl; - value &= ~(SDMMC2_PAD_CAL_DRVUP_MASK | SDMMC2_PAD_CAL_DRVDN_MASK); - value |= (drvup << SDMMC2_PAD_CAL_DRVUP_SHIFT); - value |= (drvdn << SDMMC2_PAD_CAL_DRVDN_SHIFT); - padctl->emmc2_pad_cfgpadctrl = value; - } else { - drvup = 0x10; - drvdn = 0x10; - uint32_t value = padctl->emmc2_pad_cfgpadctrl; - value &= ~(EMMC2_PAD_DRVUP_COMP_MASK | EMMC2_PAD_DRVDN_COMP_MASK); - value |= (drvup << EMMC2_PAD_DRVUP_COMP_SHIFT); - value |= (drvdn << EMMC2_PAD_DRVDN_COMP_SHIFT); - padctl->emmc2_pad_cfgpadctrl = value; - } - } else if (sdmmc->controller == SDMMC_4) { - uint32_t drvup, drvdn = 0; - if (is_mariko) { - drvup = 0xA; - drvdn = 0xA; - } else { - drvup = 0x10; - drvdn = 0x10; - } - uint32_t value = padctl->emmc4_pad_cfgpadctrl; - value &= ~(EMMC4_PAD_DRVUP_COMP_MASK | EMMC4_PAD_DRVDN_COMP_MASK); - value |= (drvup << EMMC4_PAD_DRVUP_COMP_SHIFT); - value |= (drvdn << EMMC4_PAD_DRVDN_COMP_SHIFT); - padctl->emmc4_pad_cfgpadctrl = value; - } - - /* Manually clear the autocal enable bit. */ - sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_ENABLE); - break; - } - } - - /* Clear PAD_E_INPUT_OR_E_PWRD (relevant for eMMC only) */ - sdmmc->regs->sdmemcomppadctrl &= ~(0x80000000); - - /* If requested, enable the SD clock. */ - if (restart_sd_clock) { - sdmmc_enable_sd_clock(sdmmc); - } -} - -static int sdmmc_int_clk_enable(sdmmc_t *sdmmc) { - /* Enable the internal clock. */ - sdmmc->regs->clock_control |= TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE; - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a timeout of 2000ms. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait for the clock to stabilize. */ - while (!(sdmmc->regs->clock_control & TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - } - - /* Clock failed to stabilize. */ - if (is_timeout) { - sdmmc_error(sdmmc, "Clock never stabilized!"); - return 0; - } - - /* Configure clock control and host control 2. */ - sdmmc->regs->host_control2 &= ~SDHCI_CTRL_PRESET_VAL_ENABLE; - sdmmc->regs->clock_control &= ~TEGRA_MMC_CLKCON_PROG_CLOCK_MODE; - sdmmc->regs->host_control2 |= SDHCI_HOST_VERSION_4_EN; - - /* Ensure 64bit addressing is supported. */ - if (!(sdmmc->regs->capabilities & SDHCI_CAN_64BIT)) { - sdmmc_error(sdmmc, "64bit addressing is unsupported!"); - return 0; - } - - /* Enable 64bit addressing. */ - sdmmc->regs->host_control2 |= SDHCI_ADDRESSING_64BIT_EN; - - /* Use SDMA by default. */ - sdmmc->regs->host_control &= ~SDHCI_CTRL_DMA_MASK; - - /* Change to ADMA if possible. */ - if (sdmmc->regs->capabilities & SDHCI_CAN_DO_ADMA2) { - sdmmc->use_adma = true; - } - - /* Set the timeout to be the maximum value. */ - sdmmc->regs->timeout_control &= 0xF0; - sdmmc->regs->timeout_control |= 0x0E; - - return 1; -} - -void sdmmc_select_bus_width(sdmmc_t *sdmmc, SdmmcBusWidth width) { - if (width == SDMMC_BUS_WIDTH_1BIT) { - sdmmc->regs->host_control &= ~(SDHCI_CTRL_4BITBUS | SDHCI_CTRL_8BITBUS); - sdmmc->bus_width = SDMMC_BUS_WIDTH_1BIT; - } else if (width == SDMMC_BUS_WIDTH_4BIT) { - sdmmc->regs->host_control |= SDHCI_CTRL_4BITBUS; - sdmmc->regs->host_control &= ~SDHCI_CTRL_8BITBUS; - sdmmc->bus_width = SDMMC_BUS_WIDTH_4BIT; - } else if (width == SDMMC_BUS_WIDTH_8BIT) { - sdmmc->regs->host_control |= SDHCI_CTRL_8BITBUS; - sdmmc->bus_width = SDMMC_BUS_WIDTH_8BIT; - } else { - sdmmc_error(sdmmc, "Invalid bus width specified!"); - } -} - -void sdmmc_select_voltage(sdmmc_t *sdmmc, SdmmcBusVoltage voltage) { - if (voltage == SDMMC_VOLTAGE_NONE) { - sdmmc->regs->power_control &= ~TEGRA_MMC_PWRCTL_SD_BUS_POWER; - sdmmc->bus_voltage = SDMMC_VOLTAGE_NONE; - } else if (voltage == SDMMC_VOLTAGE_1V8) { - sdmmc->regs->power_control |= TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8; - sdmmc->regs->power_control |= TEGRA_MMC_PWRCTL_SD_BUS_POWER; - sdmmc->bus_voltage = SDMMC_VOLTAGE_1V8; - } else if (voltage == SDMMC_VOLTAGE_3V3) { - sdmmc->regs->power_control |= TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3; - sdmmc->regs->power_control |= TEGRA_MMC_PWRCTL_SD_BUS_POWER; - sdmmc->bus_voltage = SDMMC_VOLTAGE_3V3; - } else { - sdmmc_error(sdmmc, "Invalid power state specified!"); - } -} - -static void sdmmc_tap_config(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed) { - bool is_mariko = is_soc_mariko(); - - if (bus_speed == SDMMC_SPEED_MMC_HS400) { - /* Clear and set DQS_TRIM_VAL (used in HS400) */ - sdmmc->regs->vendor_cap_overrides &= ~(0x3F00); - sdmmc->regs->vendor_cap_overrides |= 0x2800; - } - - /* Clear TAP_VAL_UPDATED_BY_HW */ - sdmmc->regs->vendor_tuning_cntrl0 &= ~(0x20000); - - if (bus_speed == SDMMC_SPEED_MMC_HS400) { - /* We must have obtained the tap value from the tuning procedure here. */ - if (sdmmc->is_tuning_tap_val_set) { - /* Clear and set the tap value. */ - sdmmc->regs->vendor_clock_cntrl &= ~(0xFF0000); - sdmmc->regs->vendor_clock_cntrl |= (sdmmc->tap_val << 16); - } - } else { - /* Use the recommended values. */ - switch (sdmmc->controller) { - case SDMMC_1: - sdmmc->tap_val = (is_mariko ? 0xB : 4); - break; - case SDMMC_2: - case SDMMC_4: - sdmmc->tap_val = (is_mariko ? 0xB : 0); - break; - case SDMMC_3: - sdmmc->tap_val = 3; - break; - } - - /* Clear and set the tap value. */ - sdmmc->regs->vendor_clock_cntrl &= ~(0xFF0000); - sdmmc->regs->vendor_clock_cntrl |= (sdmmc->tap_val << 16); - } -} - -static int sdmmc_dllcal_run(sdmmc_t *sdmmc) { - bool shutdown_sd_clock = false; - - /* SD clock is disabled. Enable it. */ - if (!sdmmc->is_sd_clk_enabled) { - shutdown_sd_clock = true; - sdmmc_enable_sd_clock(sdmmc); - } - - /* Set the CALIBRATE bit. */ - sdmmc->regs->vendor_dllcal_cfg |= 0x80000000; - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a timeout of 5ms. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait for CALIBRATE to be cleared. */ - while ((sdmmc->regs->vendor_dllcal_cfg & 0x80000000) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 5000); - } - - /* Calibration failed. */ - if (is_timeout) { - sdmmc_error(sdmmc, "DLLCAL failed!"); - return 0; - } - - /* Program a timeout of 10ms. */ - timebase = get_time(); - is_timeout = false; - - /* Wait for DLL_CAL_ACTIVE to be cleared. */ - while ((sdmmc->regs->vendor_dllcal_cfg_sta & 0x80000000) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 10000); - } - - /* Calibration failed. */ - if (is_timeout) { - sdmmc_error(sdmmc, "DLLCAL failed!"); - return 0; - } - - /* If requested, disable the SD clock. */ - if (shutdown_sd_clock) { - sdmmc_disable_sd_clock(sdmmc); - } - - return 1; -} - -int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed) { - bool restart_sd_clock = false; - - /* SD clock is enabled. Disable it and restart later. */ - if (sdmmc->is_sd_clk_enabled) { - restart_sd_clock = true; - sdmmc_disable_sd_clock(sdmmc); - } - - /* Configure tap values as necessary. */ - sdmmc_tap_config(sdmmc, bus_speed); - - /* Set the appropriate host speed. */ - switch (bus_speed) { - /* 400kHz initialization mode and a few others. */ - case SDMMC_SPEED_MMC_IDENT: - case SDMMC_SPEED_MMC_LEGACY: - case SDMMC_SPEED_SD_IDENT: - case SDMMC_SPEED_SD_DS: - sdmmc->regs->host_control &= ~(SDHCI_CTRL_HISPD); - sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_VDD_180); - break; - - /* 50MHz high speed (SD) and 52MHz high speed (MMC). */ - case SDMMC_SPEED_SD_HS: - case SDMMC_SPEED_MMC_HS: - case SDMMC_SPEED_SD_SDR25: - sdmmc->regs->host_control |= SDHCI_CTRL_HISPD; - sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_VDD_180); - break; - - /* 200MHz UHS-I (SD) and other modes due to errata. */ - case SDMMC_SPEED_MMC_HS200: - case SDMMC_SPEED_SD_SDR104: - case SDMMC_SPEED_GC_ASIC_FPGA: - case SDMMC_SPEED_SD_SDR50: - case SDMMC_SPEED_GC_ASIC: - case SDMMC_SPEED_EMU_SDR104: - sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK); - sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR104; - sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180; - break; - - /* 200MHz single-data rate (MMC). */ - case SDMMC_SPEED_MMC_HS400: - sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK); - sdmmc->regs->host_control2 |= SDHCI_CTRL_HS400; - sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180; - break; - - /* 25MHz default speed (SD). */ - case SDMMC_SPEED_SD_SDR12: - sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK); - sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR12; - sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180; - break; - - default: - sdmmc_error(sdmmc, "Switching to unsupported speed!"); - return 0; - } - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Get the clock's frequency and divider. */ - uint32_t freq_val = sdmmc_get_sdclk_freq(bus_speed); - uint32_t div_val = sdmmc_get_sdclk_div(bus_speed); - - /* Adjust the CAR side of the clock. */ - uint32_t out_freq_val = sdmmc_clk_adjust_source(sdmmc->controller, freq_val); - - /* Save the internal divider value. */ - sdmmc->internal_divider = ((out_freq_val + div_val - 1) / div_val); - - uint16_t div_val_lo = div_val >> 1; - uint16_t div_val_hi = 0; - - if (div_val_lo > 0xFF) { - div_val_hi = (div_val_lo >> 8); - } - - /* Set the clock control divider values. */ - sdmmc->regs->clock_control &= ~((SDHCI_DIV_HI_MASK | SDHCI_DIV_MASK) << 6); - sdmmc->regs->clock_control |= ((div_val_hi << SDHCI_DIVIDER_HI_SHIFT) | (div_val_lo << SDHCI_DIVIDER_SHIFT)); - - /* If requested, enable the SD clock. */ - if (restart_sd_clock) { - sdmmc_enable_sd_clock(sdmmc); - } - - /* Run DLLCAL for HS400 only */ - if (bus_speed == SDMMC_SPEED_MMC_HS400) { - return sdmmc_dllcal_run(sdmmc); - } - - return 1; -} - -static int sdmmc1_config() { - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - volatile tegra_padctl_t *padctl = padctl_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - /* Set up the card detect pin as a GPIO input */ - pinmux->pz1 = PINMUX_SELECT_FUNCTION1 | PINMUX_PULL_UP | PINMUX_INPUT; - padctl->vgpio_gpio_mux_sel = 0; - gpio_configure_mode(GPIO_MICROSD_CARD_DETECT, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_MICROSD_CARD_DETECT, GPIO_DIRECTION_INPUT); - udelay(100); - - /* Check the GPIO. */ - if (gpio_read(GPIO_MICROSD_CARD_DETECT)) { - return 0; - } - - /* Enable loopback control. */ - padctl->sdmmc1_clk_lpbk_control = 1; - - /* Set up the SDMMC1 pinmux. */ - pinmux->sdmmc1_clk = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT; - pinmux->sdmmc1_cmd = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT | PINMUX_PULL_UP; - pinmux->sdmmc1_dat3 = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT | PINMUX_PULL_UP; - pinmux->sdmmc1_dat2 = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT | PINMUX_PULL_UP; - pinmux->sdmmc1_dat1 = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT | PINMUX_PULL_UP; - pinmux->sdmmc1_dat0 = PINMUX_DRIVE_2X | PINMUX_PARKED | PINMUX_SELECT_FUNCTION0 | PINMUX_INPUT | PINMUX_PULL_UP; - - /* Ensure the PMC is prepared for the SDMMC1 card to receive power. */ - pmc->no_iopower &= ~PMC_CONTROL_SDMMC1; - - /* Configure the enable line for the SD card power. */ - pinmux->dmic3_clk = PINMUX_SELECT_FUNCTION1 | PINMUX_PULL_DOWN | PINMUX_INPUT; - gpio_configure_mode(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_MODE_GPIO); - gpio_write(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_LEVEL_HIGH); - gpio_configure_direction(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_DIRECTION_OUTPUT); - - /* Delay. */ - udelay(10000); - - /* Configure Sdmmc1 IO as 3.3V. */ - pmc->pwr_det_val |= PMC_CONTROL_SDMMC1; - max77620_regulator_set_voltage(REGULATOR_LDO2, 3300000); - max77620_regulator_enable(REGULATOR_LDO2, 1); - - /* Delay. */ - udelay(130); - - return 1; -} - -static int sdmmc2_config() { - return 1; -} - -static int sdmmc3_config() { - return 1; -} - -static int sdmmc4_config() { - return 1; -} - -static int sdmmc_init_controller(sdmmc_t *sdmmc, SdmmcControllerNum controller) { - /* Sanitize input number for the controller. */ - if ((controller < SDMMC_1) || (controller > SDMMC_4)) { - return 0; - } - - /* Clear up memory for our struct. */ - memset(sdmmc, 0, sizeof(sdmmc_t)); - - /* Bind the appropriate controller and it's register space to our struct. */ - sdmmc->controller = controller; - sdmmc->regs = sdmmc_get_regs(controller); - - /* Set up per-device pointers and properties. */ - switch (sdmmc->controller) { - case SDMMC_1: - /* Controller properties. */ - sdmmc->name = "uSD"; - sdmmc->has_sd = true; - sdmmc->is_clk_running = false; - sdmmc->is_sd_clk_enabled = false; - sdmmc->is_tuning_tap_val_set = false; - sdmmc->use_adma = false; - sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS; - sdmmc->tap_val = 0; - sdmmc->internal_divider = 0; - sdmmc->bus_voltage = SDMMC_VOLTAGE_NONE; - - /* Function pointers. */ - sdmmc->sdmmc_config = sdmmc1_config; - break; - - case SDMMC_2: - /* Controller properties. */ - sdmmc->name = "GC"; - sdmmc->has_sd = true; - sdmmc->is_clk_running = false; - sdmmc->is_sd_clk_enabled = false; - sdmmc->is_tuning_tap_val_set = false; - sdmmc->use_adma = false; - sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS; - sdmmc->tap_val = 0; - sdmmc->internal_divider = 0; - sdmmc->bus_voltage = SDMMC_VOLTAGE_NONE; - - /* Function pointers. */ - sdmmc->sdmmc_config = sdmmc2_config; - break; - - case SDMMC_3: - /* Controller properties. */ - sdmmc->name = "UNUSED"; - sdmmc->has_sd = true; - sdmmc->is_clk_running = false; - sdmmc->is_sd_clk_enabled = false; - sdmmc->is_tuning_tap_val_set = false; - sdmmc->use_adma = false; - sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS; - sdmmc->tap_val = 0; - sdmmc->internal_divider = 0; - sdmmc->bus_voltage = SDMMC_VOLTAGE_NONE; - - /* Function pointers. */ - sdmmc->sdmmc_config = sdmmc3_config; - break; - - case SDMMC_4: - /* Controller properties. */ - sdmmc->name = "eMMC"; - sdmmc->has_sd = true; - sdmmc->is_clk_running = false; - sdmmc->is_sd_clk_enabled = false; - sdmmc->is_tuning_tap_val_set = false; - sdmmc->use_adma = false; - sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS; - sdmmc->tap_val = 0; - sdmmc->internal_divider = 0; - sdmmc->bus_voltage = SDMMC_VOLTAGE_NONE; - - /* Function pointers. */ - sdmmc->sdmmc_config = sdmmc4_config; - break; - } - - return 1; -} - -int sdmmc_init(sdmmc_t *sdmmc, SdmmcControllerNum controller, SdmmcBusVoltage bus_voltage, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed) { - bool is_mariko = is_soc_mariko(); - - /* Initialize our controller structure. */ - if (!sdmmc_init_controller(sdmmc, controller)) { - sdmmc_error(sdmmc, "Failed to initialize SDMMC%d", controller + 1); - return 0; - } - - /* Perform initial configuration steps if necessary. */ - if (!sdmmc->sdmmc_config()) { - sdmmc_error(sdmmc, "Failed to configure controller!"); - return 0; - } - - /* Initialize the clock status. */ - sdmmc->is_clk_running = false; - - /* Clock is enabled and out of reset. Shouldn't happen. */ - if (!is_sdmmc_clk_rst(controller) && is_sdmmc_clk_enb(controller)) { - /* Disable the SD clock. */ - sdmmc_disable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - } - - /* Sort out the clock's frequency. */ - uint32_t clk_freq_val = sdmmc_get_sdclk_freq(bus_speed); - - /* Start the SDMMC clock. */ - sdmmc_clk_start(controller, clk_freq_val); - - /* Update the clock status. */ - sdmmc->is_clk_running = true; - - /* Set IO_SPARE[19] (one cycle delay) */ - sdmmc->regs->io_spare |= 0x80000; - - /* Clear SEL_VREG */ - sdmmc->regs->vendor_io_trim_cntrl &= ~(0x04); - - /* Configure vendor clocking. */ - sdmmc_vendor_clock_cntrl_config(sdmmc); - - /* Set slew codes for SDMMC1 (Erista only). */ - if ((controller == SDMMC_1) && !is_mariko) { - volatile tegra_padctl_t *padctl = padctl_get_regs(); - uint32_t value = padctl->sdmmc1_pad_cfgpadctrl; - value &= ~(SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_MASK | SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_MASK); - value |= (0x01 << SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_SHIFT); - value |= (0x01 << SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_SHIFT); - padctl->sdmmc1_pad_cfgpadctrl = value; - } - - /* Set vref sel. */ - sdmmc->regs->sdmemcomppadctrl &= 0x0F; - if ((controller == SDMMC_1) && is_mariko) { - sdmmc->regs->sdmemcomppadctrl |= 0x00; - } else { - sdmmc->regs->sdmemcomppadctrl |= 0x07; - } - - /* Configure autocal offsets. */ - if (!sdmmc_autocal_config(sdmmc, bus_voltage)) { - sdmmc_error(sdmmc, "Failed to configure automatic calibration!"); - return 0; - } - - /* Do autocal. */ - sdmmc_autocal_run(sdmmc, bus_voltage); - - /* Enable the internal clock. */ - if (!sdmmc_int_clk_enable(sdmmc)) { - sdmmc_error(sdmmc, "Failed to enable the internal clock!"); - return 0; - } - - /* Select the desired bus width. */ - sdmmc_select_bus_width(sdmmc, bus_width); - - /* Select the desired voltage. */ - sdmmc_select_voltage(sdmmc, bus_voltage); - - /* Enable the internal clock. */ - if (!sdmmc_select_speed(sdmmc, bus_speed)) { - sdmmc_error(sdmmc, "Failed to apply the correct bus speed!"); - return 0; - } - - /* Correct any inconsistent states. */ - sdmmc_adjust_sd_clock(sdmmc); - - /* Enable the SD clock. */ - sdmmc_enable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - return 1; -} - -void sdmmc_finish(sdmmc_t *sdmmc) { - /* Stop everything. */ - if (sdmmc->is_clk_running) { - /* Disable the SD clock. */ - sdmmc_disable_sd_clock(sdmmc); - - /* Disable SDMMC power. */ - sdmmc_select_voltage(sdmmc, SDMMC_VOLTAGE_NONE); - - /* Disable the SD card power. */ - if (sdmmc->controller == SDMMC_1) { - /* Disable GPIO output. */ - gpio_configure_direction(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_DIRECTION_INPUT); - - /* Power cycle for 100ms without power. */ - mdelay(100); - - /* Disable the regulator. */ - max77620_regulator_enable(REGULATOR_LDO2, 0); - } - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Stop the SDMMC clock. */ - sdmmc_clk_stop(sdmmc->controller); - - /* Clock is no longer running by now. */ - sdmmc->is_clk_running = false; - } -} - -static void sdmmc_do_sw_reset(sdmmc_t *sdmmc) { - /* Assert a software reset. */ - sdmmc->regs->software_reset |= (TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE | TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a timeout of 100ms. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait for the register to be cleared. */ - while ((sdmmc->regs->software_reset & (TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE | TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE)) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 100000); - } -} - -static int sdmmc_wait_for_inhibit(sdmmc_t *sdmmc, bool wait_for_dat) { - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a timeout of 10ms. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait on CMD inhibit to be cleared. */ - while ((sdmmc->regs->present_state & TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 10000); - } - - /* Bit was never released. Reset. */ - if (is_timeout) { - sdmmc_do_sw_reset(sdmmc); - return 0; - } - - if (wait_for_dat) { - /* Program a timeout of 10ms. */ - timebase = get_time(); - is_timeout = false; - - /* Wait on DAT inhibit to be cleared. */ - while ((sdmmc->regs->present_state & TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 10000); - } - - /* Bit was never released, reset. */ - if (is_timeout) { - sdmmc_do_sw_reset(sdmmc); - return 0; - } - } - - return 1; -} - -static int sdmmc_wait_busy(sdmmc_t *sdmmc) { - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a timeout of 10ms. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait on DAT0 level mask to be set. */ - while (!(sdmmc->regs->present_state & SDHCI_DATA_0_LVL_MASK) && !is_timeout) { - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 10000); - } - - /* Bit was never released. Reset. */ - if (is_timeout) { - sdmmc_do_sw_reset(sdmmc); - return 0; - } - - return 1; -} - -static void sdmmc_intr_enable(sdmmc_t *sdmmc) { - /* Enable the relevant interrupts and set all error bits. */ - sdmmc->regs->int_enable |= (TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE | TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE | TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT); - sdmmc->regs->int_enable |= 0x017F0000; - - /* Refresh status. */ - sdmmc->regs->int_status = sdmmc->regs->int_status; -} - -static void sdmmc_intr_disable(sdmmc_t *sdmmc) { - /* Clear all error bits and disable the relevant interrupts. */ - sdmmc->regs->int_enable &= ~(0x017F0000); - sdmmc->regs->int_enable &= ~(TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE | TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE | TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT); -} - -static int sdmmc_intr_check(sdmmc_t *sdmmc, uint16_t *status_out, uint16_t status_mask) { - uint32_t int_status = sdmmc->regs->int_status; - - sdmmc_debug(sdmmc, "INTSTS: %08X", int_status); - - /* Return the status, if necessary. */ - if (status_out) { - *status_out = (int_status & 0xFFFF); - } - - if (int_status & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) { - /* Acknowledge error by refreshing status. */ - sdmmc->regs->int_status = int_status; - return -1; - } else if (int_status & status_mask) { - /* Mask the status. */ - sdmmc->regs->int_status = (int_status & status_mask); - return 1; - } - - return 0; -} - -static int sdmmc_dma_init(sdmmc_t *sdmmc, sdmmc_request_t *req) { - /* Invalid block count or size. */ - if (!req->blksz || !req->num_blocks) { - sdmmc_error(sdmmc, "Empty DMA request!"); - return 0; - } - - uint32_t blkcnt = req->num_blocks; - - /* Truncate block count. Length can't be over 65536 bytes. */ - if (blkcnt >= 0xFFFF) { - blkcnt = 0xFFFF; - } - - /* Use our bounce buffer for SDMA or the request data buffer for ADMA. */ - uint32_t dma_base_addr = sdmmc->use_adma ? (uint32_t)req->data : (uint32_t)sdmmc->dma_bounce_buf; - - /* DMA buffer address must be aligned to 4 bytes. */ - if ((4 - (dma_base_addr & 0x03)) & 0x03) { - sdmmc_error(sdmmc, "Invalid DMA request data buffer: 0x%08X", dma_base_addr); - return 0; - } - - /* Write our address to the registers. */ - if (sdmmc->use_adma) { - /* Set ADMA registers. */ - sdmmc->regs->adma_address = dma_base_addr; - sdmmc->regs->upper_adma_address = 0; - } else { - /* Set SDMA register. */ - sdmmc->regs->dma_address = dma_base_addr; - } - - /* Store the next DMA block address for updating. */ - sdmmc->next_dma_addr = ((dma_base_addr + 0x80000) & 0xFFF80000); - - /* Set the block size ORed with the DMA boundary mask. */ - sdmmc->regs->block_size = req->blksz | 0x7000; - - /* Set the block count. */ - sdmmc->regs->block_count = blkcnt; - - /* Select basic DMA transfer mode. */ - uint32_t transfer_mode = TEGRA_MMC_TRNMOD_DMA_ENABLE; - - /* Select multi block. */ - if (req->is_multi_block) { - transfer_mode |= (TEGRA_MMC_TRNMOD_MULTI_BLOCK_SELECT | TEGRA_MMC_TRNMOD_BLOCK_COUNT_ENABLE); - } - - /* Select read mode. */ - if (req->is_read) { - transfer_mode |= TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ; - } - - /* Select AUTO_CMD12. */ - if (req->is_auto_cmd12) { - transfer_mode &= ~(TEGRA_MMC_TRNMOD_AUTO_CMD12 & TEGRA_MMC_TRNMOD_AUTO_CMD23); - transfer_mode |= TEGRA_MMC_TRNMOD_AUTO_CMD12; - } - - /* Set the transfer mode in the register. */ - sdmmc->regs->transfer_mode = transfer_mode; - - return blkcnt; -} - -static int sdmmc_dma_update(sdmmc_t *sdmmc) { - uint16_t blkcnt = 0; - - /* Loop until all blocks have been consumed. */ - do { - /* Update block count. */ - blkcnt = sdmmc->regs->block_count; - - /* Program a large timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Watch over the DMA transfer. */ - while (!is_timeout) { - /* Check interrupts. */ - uint16_t intr_status = 0; - int intr_res = sdmmc_intr_check(sdmmc, &intr_status, TEGRA_MMC_NORINTSTS_XFER_COMPLETE | TEGRA_MMC_NORINTSTS_DMA_INTERRUPT); - - /* An error has been raised. Reset. */ - if (intr_res < 0) { - sdmmc_do_sw_reset(sdmmc); - return 0; - } - - /* Transfer is over. */ - if (intr_status & TEGRA_MMC_NORINTSTS_XFER_COMPLETE) { - return 1; - } - - /* We have a DMA interrupt. Restart the transfer where it was interrupted. */ - if (intr_status & TEGRA_MMC_NORINTSTS_DMA_INTERRUPT) { - if (sdmmc->use_adma) { - /* Update ADMA registers. */ - sdmmc->regs->adma_address = sdmmc->next_dma_addr; - sdmmc->regs->upper_adma_address = 0; - } else { - /* Update SDMA register. */ - sdmmc->regs->dma_address = sdmmc->next_dma_addr; - } - - sdmmc->next_dma_addr += 0x80000; - } - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - } - } while (sdmmc->regs->block_count < blkcnt); - - /* Should never get here. Reset. */ - sdmmc_do_sw_reset(sdmmc); - return 0; -} - -static void sdmmc_set_cmd_flags(sdmmc_t *sdmmc, sdmmc_command_t *cmd, bool is_dma) { - uint16_t cmd_reg_flags = 0; - - /* Select length flags based on response type. */ - if (!(cmd->flags & SDMMC_RSP_PRESENT)) { - cmd_reg_flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE; - } else if (cmd->flags & SDMMC_RSP_136) { - cmd_reg_flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136; - } else if (cmd->flags & SDMMC_RSP_BUSY) { - cmd_reg_flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY; - } else { - cmd_reg_flags = TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48; - } - - /* Select CRC flag based on response type. */ - if (cmd->flags & SDMMC_RSP_CRC) { - cmd_reg_flags |= TEGRA_MMC_TRNMOD_CMD_CRC_CHECK; - } - - /* Select opcode flag based on response type. */ - if (cmd->flags & SDMMC_RSP_OPCODE) { - cmd_reg_flags |= TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK; - } - - /* Select data present flag. */ - if (is_dma) { - cmd_reg_flags |= TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER; - } - - /* Set the CMD's argument, opcode and flags. */ - sdmmc->regs->argument = cmd->arg; - sdmmc->regs->command = ((cmd->opcode << 8) | cmd_reg_flags); -} - -static int sdmmc_wait_for_cmd(sdmmc_t *sdmmc) { - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a large timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Set this for error checking. */ - bool is_err = false; - - /* Wait for CMD to finish. */ - while (!is_err && !is_timeout) { - /* Check interrupts. */ - int intr_res = sdmmc_intr_check(sdmmc, 0, TEGRA_MMC_NORINTSTS_CMD_COMPLETE); - - /* Command is done. */ - if (intr_res > 0) { - return 1; - } - - /* Check for any raised errors. */ - is_err = (intr_res < 0); - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 2000000); - } - - /* Should never get here. Reset. */ - sdmmc_do_sw_reset(sdmmc); - return 0; -} - -static int sdmmc_save_response(sdmmc_t *sdmmc, uint32_t flags) { - /* We have a valid response. */ - if (flags & SDMMC_RSP_PRESENT) { - if (flags & SDMMC_RSP_136) { - /* CRC is stripped so we need to do some shifting. */ - for (int i = 0; i < 4; i++) { - sdmmc->resp[i] = (sdmmc->regs->response[3 - i] << 0x08); - - if (i != 0) { - sdmmc->resp[i - 1] |= ((sdmmc->regs->response[3 - i] >> 24) & 0xFF); - } - } - } else { - /* Card is still busy. */ - if (flags & SDMMC_RSP_BUSY) { - /* Wait for DAT0 level mask. */ - if (!sdmmc_wait_busy(sdmmc)) { - return 0; - } - } - - /* Save our response. */ - sdmmc->resp[0] = sdmmc->regs->response[0]; - } - - return 1; - } - - /* Invalid response. */ - return 0; -} - -int sdmmc_load_response(sdmmc_t *sdmmc, uint32_t flags, uint32_t *resp) { - /* Make sure our output buffer is valid. */ - if (!resp) { - return 0; - } - - /* We have a valid response. */ - if (flags & SDMMC_RSP_PRESENT) { - if (flags & SDMMC_RSP_136) { - resp[0] = sdmmc->resp[0]; - resp[1] = sdmmc->resp[1]; - resp[2] = sdmmc->resp[2]; - resp[3] = sdmmc->resp[3]; - } else { - resp[0] = sdmmc->resp[0]; - } - - return 1; - } - - /* Invalid response. */ - return 0; -} - -int sdmmc_send_cmd(sdmmc_t *sdmmc, sdmmc_command_t *cmd, sdmmc_request_t *req, uint32_t *num_blocks_out) { - uint32_t cmd_result = 0; - bool shutdown_sd_clock = false; - bool is_mariko = is_soc_mariko(); - - /* Run automatic calibration on each command submission for SDMMC1 (Erista only). */ - if ((sdmmc->controller == SDMMC_1) && !(sdmmc->has_sd) && !is_mariko) { - sdmmc_autocal_run(sdmmc, sdmmc->bus_voltage); - } - - /* SD clock is disabled. Enable it. */ - if (!sdmmc->is_sd_clk_enabled) { - shutdown_sd_clock = true; - sdmmc_enable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Provide 8 clock cycles after enabling the clock. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - } - - /* Determine if we should wait for data inhibit. */ - bool wait_for_dat = (req || (cmd->flags & SDMMC_RSP_BUSY)); - - /* Wait for CMD and DAT inhibit. */ - if (!sdmmc_wait_for_inhibit(sdmmc, wait_for_dat)) { - return 0; - } - - uint32_t dma_blkcnt = 0; - bool is_dma = false; - - /* This is a data transfer. */ - if (req) { - is_dma = true; - dma_blkcnt = sdmmc_dma_init(sdmmc, req); - - /* Abort in case initialization failed. */ - if (!dma_blkcnt) { - sdmmc_error(sdmmc, "Failed to initialize the DMA transfer!"); - return 0; - } - - /* If this is a SDMA write operation, copy the data into our bounce buffer. */ - if (!sdmmc->use_adma && !req->is_read) { - memcpy((void *)sdmmc->dma_bounce_buf, (void *)req->data, req->blksz * req->num_blocks); - } - } - - /* Enable interrupts. */ - sdmmc_intr_enable(sdmmc); - - /* Parse and set the CMD's flags. */ - sdmmc_set_cmd_flags(sdmmc, cmd, is_dma); - - /* Wait for the CMD to finish. */ - cmd_result = sdmmc_wait_for_cmd(sdmmc); - - sdmmc_debug(sdmmc, "CMD(%d): %08X, %08X, %08X, %08X", cmd_result, sdmmc->regs->response[0], sdmmc->regs->response[1], sdmmc->regs->response[2], sdmmc->regs->response[3]); - - if (cmd_result) { - /* Save response, if necessary. */ - sdmmc_save_response(sdmmc, cmd->flags); - - /* Update the DMA request. */ - if (req) { - /* Disable interrupts and abort in case updating failed. */ - if (!sdmmc_dma_update(sdmmc)) { - sdmmc_warn(sdmmc, "Failed to update the DMA transfer!"); - sdmmc_intr_disable(sdmmc); - return 0; - } - - /* If this is a SDMA read operation, copy the data from our bounce buffer. */ - if (!sdmmc->use_adma && req->is_read) { - uint32_t dma_data_size = (sdmmc->regs->dma_address - (uint32_t)sdmmc->dma_bounce_buf); - memcpy((void *)req->data, (void *)sdmmc->dma_bounce_buf, dma_data_size); - } - } - } - - /* Disable interrupts. */ - sdmmc_intr_disable(sdmmc); - - if (cmd_result) { - if (req) { - /* Save back the number of DMA blocks. */ - if (num_blocks_out) { - *num_blocks_out = dma_blkcnt; - } - /* Save the response for AUTO_CMD12. */ - if (req->is_auto_cmd12) { - sdmmc->resp_auto_cmd12 = sdmmc->regs->response[3]; - } - } - - /* Wait for DAT0 to be 0. */ - if (req || (cmd->flags & SDMMC_RSP_BUSY)) { - cmd_result = sdmmc_wait_busy(sdmmc); - } - } - - /* Provide 8 clock cycles before disabling the clock. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - if (shutdown_sd_clock) { - sdmmc_disable_sd_clock(sdmmc); - } - - return cmd_result; -} - -int sdmmc_switch_voltage(sdmmc_t *sdmmc) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - /* Disable the SD clock. */ - sdmmc_disable_sd_clock(sdmmc); - - /* Reconfigure the internal clock. */ - if (!sdmmc_select_speed(sdmmc, SDMMC_SPEED_SD_SDR12)) { - sdmmc_error(sdmmc, "Failed to apply the correct bus speed for low voltage support!"); - return 0; - } - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Reconfigure the regulator. */ - max77620_regulator_set_voltage(REGULATOR_LDO2, 1800000); - max77620_regulator_enable(REGULATOR_LDO2, 1); - udelay(150); - pmc->pwr_det_val &= ~(PMC_CONTROL_SDMMC1); - - /* Reconfigure autocal offsets. */ - if (!sdmmc_autocal_config(sdmmc, SDMMC_VOLTAGE_1V8)) { - sdmmc_error(sdmmc, "Failed to configure automatic calibration for low voltage support!"); - return 0; - } - - /* Do autocal again. */ - sdmmc_autocal_run(sdmmc, SDMMC_VOLTAGE_1V8); - - /* Change the desired voltage. */ - sdmmc_select_voltage(sdmmc, SDMMC_VOLTAGE_1V8); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Wait a while. */ - mdelay(5); - - /* Host control 2 flag should be set by now. */ - if (sdmmc->regs->host_control2 & SDHCI_CTRL_VDD_180) { - /* Enable the SD clock. */ - sdmmc_enable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Wait a while. */ - mdelay(1); - - /* Data level is up. Voltage switching is done.*/ - if (sdmmc->regs->present_state & SDHCI_DATA_LVL_MASK) { - return 1; - } - } - - return 0; -} - -static int sdmmc_send_tuning(sdmmc_t *sdmmc, uint32_t opcode) { - /* Nothing to do. */ - if (!sdmmc->has_sd) { - return 0; - } - - /* Wait for CMD and DAT inhibit. */ - if (!sdmmc_wait_for_inhibit(sdmmc, true)) { - return 0; - } - - /* Select the right size for sending the tuning block. */ - if (sdmmc->bus_width == SDMMC_BUS_WIDTH_4BIT) { - sdmmc->regs->block_size = 0x40; - } else if (sdmmc->bus_width == SDMMC_BUS_WIDTH_8BIT) { - sdmmc->regs->block_size = 0x80; - } else { - return 0; - } - - /* Select the block count and transfer mode. */ - sdmmc->regs->block_count = 1; - sdmmc->regs->transfer_mode = TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ; - - /* Manually enable the Buffer Read Ready interrupt. */ - sdmmc->regs->int_enable |= TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY; - - /* Refresh status. */ - sdmmc->regs->int_status = sdmmc->regs->int_status; - - /* Disable the SD clock. */ - sdmmc_disable_sd_clock(sdmmc); - - /* Prepare the tuning command. */ - sdmmc_command_t cmd = {}; - cmd.opcode = opcode; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R1; - - /* Parse and set the CMD's flags. */ - sdmmc_set_cmd_flags(sdmmc, &cmd, true); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Wait a while. */ - udelay(1); - - /* Reset. */ - sdmmc_do_sw_reset(sdmmc); - - /* Enable back the SD clock. */ - sdmmc_enable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Program a 50ms timeout. */ - uint32_t timebase = get_time(); - bool is_timeout = false; - - /* Wait for Buffer Read Ready interrupt. */ - while (!is_timeout) { - /* Buffer Read Ready was asserted. */ - if (sdmmc_intr_check(sdmmc, 0, TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY) > 0) { - /* Manually disable the Buffer Read Ready interrupt. */ - sdmmc->regs->int_enable &= ~(TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Provide 8 clock cycles. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - return 1; - } - - /* Keep checking if timeout expired. */ - is_timeout = (get_time_since(timebase) > 5000); - } - - /* Reset. */ - sdmmc_do_sw_reset(sdmmc); - - /* Manually disable the Buffer Read Ready interrupt. */ - sdmmc->regs->int_enable &= ~(TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Provide 8 clock cycles. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - return 0; -} - -void sdmmc_set_tuning_tap_val(sdmmc_t *sdmmc) { - sdmmc->tap_val = (sdmmc->regs->vendor_clock_cntrl >> 16); - sdmmc->is_tuning_tap_val_set = true; -} - -int sdmmc_execute_tuning(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed, uint32_t opcode) { - uint32_t max_tuning_loop = 0; - uint32_t tuning_cntrl_flag = 0; - - sdmmc->regs->vendor_tuning_cntrl1 = 0; - - switch (bus_speed) { - case SDMMC_SPEED_MMC_HS200: - case SDMMC_SPEED_MMC_HS400: - case SDMMC_SPEED_SD_SDR104: - case SDMMC_SPEED_EMU_SDR104: - max_tuning_loop = 0x80; - tuning_cntrl_flag = 0x4000; - break; - case SDMMC_SPEED_SD_SDR50: - case SDMMC_SPEED_GC_ASIC_FPGA: - case SDMMC_SPEED_GC_ASIC: - max_tuning_loop = 0x100; - tuning_cntrl_flag = 0x8000; - break; - default: - return 0; - } - - sdmmc->regs->vendor_tuning_cntrl0 &= ~(0xE000); - sdmmc->regs->vendor_tuning_cntrl0 |= tuning_cntrl_flag; - - sdmmc->regs->vendor_tuning_cntrl0 &= ~(0x1FC0); - sdmmc->regs->vendor_tuning_cntrl0 |= 0x40; - - sdmmc->regs->vendor_tuning_cntrl0 |= 0x20000; - - /* Start tuning. */ - sdmmc->regs->host_control2 |= SDHCI_CTRL_EXEC_TUNING; - - /* Repeat until Execute Tuning is set to 0 or the number of loops reaches the maximum value. */ - for (uint32_t i = 0; i < max_tuning_loop; i++) { - sdmmc_send_tuning(sdmmc, opcode); - - /* Tuning is done. */ - if (!(sdmmc->regs->host_control2 & SDHCI_CTRL_EXEC_TUNING)) { - break; - } - } - - /* Success! */ - if (sdmmc->regs->host_control2 & SDHCI_CTRL_TUNED_CLK) { - return 1; - } - - return 0; -} - -int sdmmc_abort(sdmmc_t *sdmmc, uint32_t opcode) { - uint32_t result = 0; - uint32_t cmd_result = 0; - bool shutdown_sd_clock = false; - - /* SD clock is disabled. Enable it. */ - if (!sdmmc->is_sd_clk_enabled) { - shutdown_sd_clock = true; - sdmmc_enable_sd_clock(sdmmc); - - /* Force a register read to refresh the clock control value. */ - sdmmc_get_sd_clock_control(sdmmc); - - /* Provide 8 clock cycles after enabling the clock. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - } - - /* Wait for CMD and DAT inhibit. */ - if (sdmmc_wait_for_inhibit(sdmmc, false)) { - /* Enable interrupts. */ - sdmmc_intr_enable(sdmmc); - - /* Prepare the command. */ - sdmmc_command_t cmd = {}; - cmd.opcode = opcode; - cmd.arg = 0; - cmd.flags = SDMMC_RSP_R1B; - - /* Parse and set the CMD's flags. */ - sdmmc_set_cmd_flags(sdmmc, &cmd, false); - - /* Wait for the CMD to finish. */ - cmd_result = sdmmc_wait_for_cmd(sdmmc); - - /* Disable interrupts. */ - sdmmc_intr_disable(sdmmc); - - if (cmd_result) { - /* Save response, if necessary. */ - sdmmc_save_response(sdmmc, cmd.flags); - - /* Wait for DAT0 to be 0. */ - result = sdmmc_wait_busy(sdmmc); - } - } - - /* Provide 8 clock cycles before disabling the clock. */ - udelay((8000 + sdmmc->internal_divider - 1) / sdmmc->internal_divider); - - /* Disable the SD clock if requested. */ - if (shutdown_sd_clock) { - sdmmc_disable_sd_clock(sdmmc); - } - - return result; -} \ No newline at end of file diff --git a/fusee/common/sdmmc/sdmmc_core.h b/fusee/common/sdmmc/sdmmc_core.h deleted file mode 100644 index 30a634421..000000000 --- a/fusee/common/sdmmc/sdmmc_core.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SDMMC_CORE_H -#define FUSEE_SDMMC_CORE_H - -#include "sdmmc_tegra.h" - -/* Bounce buffer */ -#define SDMMC_BOUNCE_BUFFER_ADDRESS 0x90000000 - -/* Present state */ -#define SDHCI_CMD_INHIBIT 0x00000001 -#define SDHCI_DATA_INHIBIT 0x00000002 -#define SDHCI_DOING_WRITE 0x00000100 -#define SDHCI_DOING_READ 0x00000200 -#define SDHCI_SPACE_AVAILABLE 0x00000400 -#define SDHCI_DATA_AVAILABLE 0x00000800 -#define SDHCI_CARD_PRESENT 0x00010000 -#define SDHCI_WRITE_PROTECT 0x00080000 -#define SDHCI_DATA_LVL_MASK 0x00F00000 -#define SDHCI_DATA_LVL_SHIFT 20 -#define SDHCI_DATA_0_LVL_MASK 0x00100000 -#define SDHCI_CMD_LVL 0x01000000 - -/* SDHCI clock control */ -#define SDHCI_DIVIDER_SHIFT 8 -#define SDHCI_DIVIDER_HI_SHIFT 6 -#define SDHCI_DIV_MASK 0xFF -#define SDHCI_DIV_MASK_LEN 8 -#define SDHCI_DIV_HI_MASK 0x300 -#define SDHCI_PROG_CLOCK_MODE 0x0020 -#define SDHCI_CLOCK_CARD_EN 0x0004 -#define SDHCI_CLOCK_INT_STABLE 0x0002 -#define SDHCI_CLOCK_INT_EN 0x0001 - -/* SDHCI host control */ -#define SDHCI_CTRL_LED 0x01 -#define SDHCI_CTRL_4BITBUS 0x02 -#define SDHCI_CTRL_HISPD 0x04 -#define SDHCI_CTRL_DMA_MASK 0x18 -#define SDHCI_CTRL_SDMA 0x00 -#define SDHCI_CTRL_ADMA1 0x08 -#define SDHCI_CTRL_ADMA32 0x10 -#define SDHCI_CTRL_ADMA64 0x18 -#define SDHCI_CTRL_8BITBUS 0x20 -#define SDHCI_CTRL_CDTEST_INS 0x40 -#define SDHCI_CTRL_CDTEST_EN 0x80 - -/* SDHCI host control 2 */ -#define SDHCI_CTRL_UHS_MASK 0x0007 -#define SDHCI_CTRL_UHS_SDR12 0x0000 -#define SDHCI_CTRL_UHS_SDR25 0x0001 -#define SDHCI_CTRL_UHS_SDR50 0x0002 -#define SDHCI_CTRL_UHS_SDR104 0x0003 -#define SDHCI_CTRL_UHS_DDR50 0x0004 -#define SDHCI_CTRL_HS400 0x0005 -#define SDHCI_CTRL_VDD_180 0x0008 -#define SDHCI_CTRL_DRV_TYPE_MASK 0x0030 -#define SDHCI_CTRL_DRV_TYPE_B 0x0000 -#define SDHCI_CTRL_DRV_TYPE_A 0x0010 -#define SDHCI_CTRL_DRV_TYPE_C 0x0020 -#define SDHCI_CTRL_DRV_TYPE_D 0x0030 -#define SDHCI_CTRL_EXEC_TUNING 0x0040 -#define SDHCI_CTRL_TUNED_CLK 0x0080 -#define SDHCI_UHS2_IF_EN 0x0100 -#define SDHCI_HOST_VERSION_4_EN 0x1000 -#define SDHCI_ADDRESSING_64BIT_EN 0x2000 -#define SDHCI_ASYNC_INTR_EN 0x4000 -#define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000 - -/* SDHCI capabilities */ -#define SDHCI_CAN_DO_8BIT 0x00040000 -#define SDHCI_CAN_DO_ADMA2 0x00080000 -#define SDHCI_CAN_DO_ADMA1 0x00100000 -#define SDHCI_CAN_DO_HISPD 0x00200000 -#define SDHCI_CAN_DO_SDMA 0x00400000 -#define SDHCI_CAN_VDD_330 0x01000000 -#define SDHCI_CAN_VDD_300 0x02000000 -#define SDHCI_CAN_VDD_180 0x04000000 -#define SDHCI_CAN_64BIT 0x10000000 -#define SDHCI_ASYNC_INTR 0x20000000 - -/* Vendor clock control */ -#define SDMMC_CLOCK_TAP_MASK (0xFF << 16) -#define SDMMC_CLOCK_TAP_SDMMC1 (0x04 << 16) -#define SDMMC_CLOCK_TAP_SDMMC2 (0x00 << 16) -#define SDMMC_CLOCK_TAP_SDMMC3 (0x03 << 16) -#define SDMMC_CLOCK_TAP_SDMMC4 (0x00 << 16) -#define SDMMC_CLOCK_TRIM_MASK (0xFF << 24) -#define SDMMC_CLOCK_TRIM_SDMMC1_ERISTA (0x02 << 24) -#define SDMMC_CLOCK_TRIM_SDMMC1_MARIKO (0x0E << 24) -#define SDMMC_CLOCK_TRIM_SDMMC2_ERISTA (0x08 << 24) -#define SDMMC_CLOCK_TRIM_SDMMC2_MARIKO (0x0D << 24) -#define SDMMC_CLOCK_TRIM_SDMMC3 (0x03 << 24) -#define SDMMC_CLOCK_TRIM_SDMMC4_ERISTA (0x08 << 24) -#define SDMMC_CLOCK_TRIM_SDMMC4_MARIKO (0x0D << 24) -#define SDMMC_CLOCK_SPI_MODE_CLKEN_OVERRIDE (1 << 2) -#define SDMMC_CLOCK_PADPIPE_CLKEN_OVERRIDE (1 << 3) - -/* Autocal configuration */ -#define SDMMC_AUTOCAL_PDPU_CONFIG_MASK 0x7F7F -#define SDMMC_AUTOCAL_PDPU_SDMMC1_1V8_ERISTA 0x7B7B -#define SDMMC_AUTOCAL_PDPU_SDMMC1_1V8_MARIKO 0x0606 -#define SDMMC_AUTOCAL_PDPU_SDMMC1_3V3_ERISTA 0x7D00 -#define SDMMC_AUTOCAL_PDPU_SDMMC1_3V3_MARIKO 0x0000 -#define SDMMC_AUTOCAL_PDPU_SDMMC4_1V8 0x0505 -#define SDMMC_AUTOCAL_START (1 << 31) -#define SDMMC_AUTOCAL_ENABLE (1 << 29) - -/* Autocal status */ -#define SDMMC_AUTOCAL_ACTIVE (1 << 31) - -/* Vendor tuning control 0*/ -#define SDMMC_VENDOR_TUNING_TRIES_MASK (0x7 << 13) -#define SDMMC_VENDOR_TUNING_TRIES_SHIFT 13 -#define SDMMC_VENDOR_TUNING_MULTIPLIER_MASK (0x7F << 6) -#define SDMMC_VENDOR_TUNING_MULTIPLIER_UNITY (1 << 6) -#define SDMMC_VENDOR_TUNING_DIVIDER_MASK (0x7 << 3) -#define SDMMC_VENDOR_TUNING_SET_BY_HW (1 << 17) - -/* Vendor tuning control 1*/ -#define SDMMC_VENDOR_TUNING_STEP_SIZE_SDR50_DEFAULT (0 << 0) -#define SDMMC_VENDOR_TUNING_STEP_SIZE_SDR104_DEFAULT (0 << 4) - -/* Vendor capability overrides */ -#define SDMMC_VENDOR_CAPABILITY_DQS_TRIM_MASK (0x3F << 8) -#define SDMMC_VENDOR_CAPABILITY_DQS_TRIM_HS400 (0x11 << 8) - -/* Timeouts */ -#define SDMMC_AUTOCAL_TIMEOUT (10 * 1000) -#define SDMMC_TUNING_TIMEOUT (150 * 1000) - -/* Command response flags */ -#define SDMMC_RSP_PRESENT (1 << 0) -#define SDMMC_RSP_136 (1 << 1) -#define SDMMC_RSP_CRC (1 << 2) -#define SDMMC_RSP_BUSY (1 << 3) -#define SDMMC_RSP_OPCODE (1 << 4) - -/* Command types */ -#define SDMMC_CMD_MASK (3 << 5) -#define SDMMC_CMD_AC (0 << 5) -#define SDMMC_CMD_ADTC (1 << 5) -#define SDMMC_CMD_BC (2 << 5) -#define SDMMC_CMD_BCR (3 << 5) - -/* SPI command response flags */ -#define SDMMC_RSP_SPI_S1 (1 << 7) -#define SDMMC_RSP_SPI_S2 (1 << 8) -#define SDMMC_RSP_SPI_B4 (1 << 9) -#define SDMMC_RSP_SPI_BUSY (1 << 10) - -/* Native response types for commands */ -#define SDMMC_RSP_NONE (0) -#define SDMMC_RSP_R1 (SDMMC_RSP_PRESENT|SDMMC_RSP_CRC|SDMMC_RSP_OPCODE) -#define SDMMC_RSP_R1B (SDMMC_RSP_PRESENT|SDMMC_RSP_CRC|SDMMC_RSP_OPCODE|SDMMC_RSP_BUSY) -#define SDMMC_RSP_R2 (SDMMC_RSP_PRESENT|SDMMC_RSP_136|SDMMC_RSP_CRC) -#define SDMMC_RSP_R3 (SDMMC_RSP_PRESENT) -#define SDMMC_RSP_R4 (SDMMC_RSP_PRESENT) -#define SDMMC_RSP_R5 (SDMMC_RSP_PRESENT|SDMMC_RSP_CRC|SDMMC_RSP_OPCODE) -#define SDMMC_RSP_R6 (SDMMC_RSP_PRESENT|SDMMC_RSP_CRC|SDMMC_RSP_OPCODE) -#define SDMMC_RSP_R7 (SDMMC_RSP_PRESENT|SDMMC_RSP_CRC|SDMMC_RSP_OPCODE) -#define SDMMC_RSP_R1_NO_CRC (SDMMC_RSP_PRESENT|SDMMC_RSP_OPCODE) - -/* SPI response types for commands */ -#define SDMMC_RSP_SPI_R1 (SDMMC_RSP_SPI_S1) -#define SDMMC_RSP_SPI_R1B (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_BUSY) -#define SDMMC_RSP_SPI_R2 (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_S2) -#define SDMMC_RSP_SPI_R3 (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_B4) -#define SDMMC_RSP_SPI_R4 (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_B4) -#define SDMMC_RSP_SPI_R5 (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_S2) -#define SDMMC_RSP_SPI_R7 (SDMMC_RSP_SPI_S1|SDMMC_RSP_SPI_B4) - -/* SDMMC controllers */ -typedef enum { - SDMMC_1 = 0, - SDMMC_2 = 1, - SDMMC_3 = 2, - SDMMC_4 = 3 -} SdmmcControllerNum; - -typedef enum { - SDMMC_PARTITION_INVALID = -1, - SDMMC_PARTITION_USER = 0, - SDMMC_PARTITION_BOOT0 = 1, - SDMMC_PARTITION_BOOT1 = 2, - SDMMC_PARTITION_RPMB = 3 -} SdmmcPartitionNum; - -typedef enum { - SDMMC_VOLTAGE_NONE = 0, - SDMMC_VOLTAGE_1V8 = 1, - SDMMC_VOLTAGE_3V3 = 2 -} SdmmcBusVoltage; - -typedef enum { - SDMMC_BUS_WIDTH_1BIT = 0, - SDMMC_BUS_WIDTH_4BIT = 1, - SDMMC_BUS_WIDTH_8BIT = 2 -} SdmmcBusWidth; - -typedef enum { - SDMMC_SPEED_MMC_IDENT = 0, - SDMMC_SPEED_MMC_LEGACY = 1, - SDMMC_SPEED_MMC_HS = 2, - SDMMC_SPEED_MMC_HS200 = 3, - SDMMC_SPEED_MMC_HS400 = 4, - SDMMC_SPEED_SD_IDENT = 5, - SDMMC_SPEED_SD_DS = 6, - SDMMC_SPEED_SD_HS = 7, - SDMMC_SPEED_SD_SDR12 = 8, - SDMMC_SPEED_SD_SDR25 = 9, - SDMMC_SPEED_SD_SDR50 = 10, - SDMMC_SPEED_SD_SDR104 = 11, - SDMMC_SPEED_SD_DDR50 = 12, - SDMMC_SPEED_GC_ASIC_FPGA = 13, - SDMMC_SPEED_GC_ASIC = 14, - SDMMC_SPEED_EMU_SDR104 = 255, /* Custom speed mode. Prevents low voltage switch in MMC emulation. */ -} SdmmcBusSpeed; - -typedef enum { - SDMMC_CAR_DIVIDER_MMC_LEGACY = 30, /* (16 * 2) - 2 */ - SDMMC_CAR_DIVIDER_MMC_HS = 14, /* (8 * 2) - 2 */ - SDMMC_CAR_DIVIDER_MMC_HS200 = 3, /* (2.5 * 2) - 2 (for PLLP_OUT0, same as HS400) */ - SDMMC_CAR_DIVIDER_SD_SDR12 = 31, /* (16.5 * 2) - 2 */ - SDMMC_CAR_DIVIDER_SD_SDR25 = 15, /* (8.5 * 2) - 2 */ - SDMMC_CAR_DIVIDER_SD_SDR50 = 7, /* (4.5 * 2) - 2 */ - SDMMC_CAR_DIVIDER_SD_SDR104 = 2, /* (2 * 2) - 2 */ - SDMMC_CAR_DIVIDER_GC_ASIC_FPGA = 18, /* (5 * 2 * 2) - 2 */ -} SdmmcCarDivider; - -/* Structure for describing a SDMMC device. */ -typedef struct { - /* Controller number */ - SdmmcControllerNum controller; - - /* Backing register space */ - volatile tegra_sdmmc_t *regs; - - /* Controller properties */ - const char *name; - bool has_sd; - bool is_clk_running; - bool is_sd_clk_enabled; - bool is_tuning_tap_val_set; - bool use_adma; - uint32_t tap_val; - uint32_t internal_divider; - uint32_t resp[4]; - uint32_t resp_auto_cmd12; - uint32_t next_dma_addr; - uint8_t* dma_bounce_buf; - SdmmcBusVoltage bus_voltage; - SdmmcBusWidth bus_width; - - /* Per-controller operations. */ - int (*sdmmc_config)(); -} sdmmc_t; - -/* Structure for describing a SDMMC command. */ -typedef struct { - uint32_t opcode; - uint32_t arg; - uint32_t resp[4]; - uint32_t flags; /* Expected response type. */ -} sdmmc_command_t; - -/* Structure for describing a SDMMC request. */ -typedef struct { - void* data; - uint32_t blksz; - uint32_t num_blocks; - bool is_multi_block; - bool is_read; - bool is_auto_cmd12; -} sdmmc_request_t; - -int sdmmc_init(sdmmc_t *sdmmc, SdmmcControllerNum controller, SdmmcBusVoltage bus_voltage, SdmmcBusWidth bus_width, SdmmcBusSpeed bus_speed); -void sdmmc_finish(sdmmc_t *sdmmc); -int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed); -void sdmmc_select_bus_width(sdmmc_t *sdmmc, SdmmcBusWidth width); -void sdmmc_select_voltage(sdmmc_t *sdmmc, SdmmcBusVoltage voltage); -void sdmmc_adjust_sd_clock(sdmmc_t *sdmmc); -int sdmmc_switch_voltage(sdmmc_t *sdmmc); -void sdmmc_set_tuning_tap_val(sdmmc_t *sdmmc); -int sdmmc_execute_tuning(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed, uint32_t opcode); -int sdmmc_send_cmd(sdmmc_t *sdmmc, sdmmc_command_t *cmd, sdmmc_request_t *req, uint32_t *num_blocks_out); -int sdmmc_load_response(sdmmc_t *sdmmc, uint32_t flags, uint32_t *resp); -int sdmmc_abort(sdmmc_t *sdmmc, uint32_t opcode); -void sdmmc_error(sdmmc_t *sdmmc, char *fmt, ...); -void sdmmc_warn(sdmmc_t *sdmmc, char *fmt, ...); -void sdmmc_info(sdmmc_t *sdmmc, char *fmt, ...); -void sdmmc_debug(sdmmc_t *sdmmc, char *fmt, ...); -void sdmmc_dump_regs(sdmmc_t *sdmmc); - -#endif diff --git a/fusee/common/sdmmc/sdmmc_tegra.h b/fusee/common/sdmmc/sdmmc_tegra.h deleted file mode 100644 index cf76c487d..000000000 --- a/fusee/common/sdmmc/sdmmc_tegra.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SDMMC_TEGRA_H -#define FUSEE_SDMMC_TEGRA_H - -#include -#include - -#define TEGRA_MMC_PWRCTL_SD_BUS_POWER (1 << 0) -#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8 (5 << 1) -#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0 (6 << 1) -#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3 (7 << 1) - -#define TEGRA_MMC_HOSTCTL_DMASEL_MASK (3 << 3) -#define TEGRA_MMC_HOSTCTL_DMASEL_SDMA (0 << 3) -#define TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_32BIT (2 << 3) -#define TEGRA_MMC_HOSTCTL_DMASEL_ADMA2_64BIT (3 << 3) - -#define TEGRA_MMC_TRNMOD_DMA_ENABLE (1 << 0) -#define TEGRA_MMC_TRNMOD_BLOCK_COUNT_ENABLE (1 << 1) -#define TEGRA_MMC_TRNMOD_AUTO_CMD12 (1 << 2) -#define TEGRA_MMC_TRNMOD_AUTO_CMD23 (1 << 3) -#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_WRITE (0 << 4) -#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ (1 << 4) -#define TEGRA_MMC_TRNMOD_MULTI_BLOCK_SELECT (1 << 5) - -#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_MASK (3 << 0) -#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE (0 << 0) -#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136 (1 << 0) -#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48 (2 << 0) -#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY (3 << 0) - -#define TEGRA_MMC_TRNMOD_CMD_CRC_CHECK (1 << 3) -#define TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK (1 << 4) -#define TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER (1 << 5) - -#define TEGRA_MMC_PRNSTS_CMD_INHIBIT_CMD (1 << 0) -#define TEGRA_MMC_PRNSTS_CMD_INHIBIT_DAT (1 << 1) - -#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE (1 << 0) -#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE (1 << 1) -#define TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE (1 << 2) -#define TEGRA_MMC_CLKCON_PROG_CLOCK_MODE (1 << 5) - -#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT 8 -#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK (0xff << 8) - -#define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL (1 << 0) -#define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE (1 << 1) -#define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE (1 << 2) - -#define TEGRA_MMC_NORINTSTS_CMD_COMPLETE (1 << 0) -#define TEGRA_MMC_NORINTSTS_XFER_COMPLETE (1 << 1) -#define TEGRA_MMC_NORINTSTS_DMA_INTERRUPT (1 << 3) -#define TEGRA_MMC_NORINTSTS_ERR_INTERRUPT (1 << 15) -#define TEGRA_MMC_NORINTSTS_CMD_TIMEOUT (1 << 16) - -#define TEGRA_MMC_NORINTSTSEN_CMD_COMPLETE (1 << 0) -#define TEGRA_MMC_NORINTSTSEN_XFER_COMPLETE (1 << 1) -#define TEGRA_MMC_NORINTSTSEN_DMA_INTERRUPT (1 << 3) -#define TEGRA_MMC_NORINTSTSEN_BUFFER_WRITE_READY (1 << 4) -#define TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY (1 << 5) - -#define TEGRA_MMC_NORINTSIGEN_XFER_COMPLETE (1 << 1) - -typedef struct { - /* SDHCI standard registers */ - uint32_t dma_address; - uint16_t block_size; - uint16_t block_count; - uint32_t argument; - uint16_t transfer_mode; - uint16_t command; - uint32_t response[0x4]; - uint32_t buffer; - uint32_t present_state; - uint8_t host_control; - uint8_t power_control; - uint8_t block_gap_control; - uint8_t wake_up_control; - uint16_t clock_control; - uint8_t timeout_control; - uint8_t software_reset; - uint32_t int_status; - uint32_t int_enable; - uint32_t signal_enable; - uint16_t acmd12_err; - uint16_t host_control2; - uint32_t capabilities; - uint32_t capabilities_1; - uint32_t max_current; - uint32_t _0x4c; - uint16_t set_acmd12_error; - uint16_t set_int_error; - uint8_t adma_error; - uint8_t _0x56[0x3]; - uint32_t adma_address; - uint32_t upper_adma_address; - uint16_t preset_for_init; - uint16_t preset_for_default; - uint16_t preset_for_high; - uint16_t preset_for_sdr12; - uint16_t preset_for_sdr25; - uint16_t preset_for_sdr50; - uint16_t preset_for_sdr104; - uint16_t preset_for_ddr50; - uint32_t _0x70[0x23]; - uint16_t slot_int_status; - uint16_t host_version; - - /* Vendor specific registers */ - uint32_t vendor_clock_cntrl; - uint32_t vendor_sys_sw_cntrl; - uint32_t vendor_err_intr_status; - uint32_t vendor_cap_overrides; - uint32_t vendor_boot_cntrl; - uint32_t vendor_boot_ack_timeout; - uint32_t vendor_boot_dat_timeout; - uint32_t vendor_debounce_count; - uint32_t vendor_misc_cntrl; - uint32_t max_current_override; - uint32_t max_current_override_hi; - uint32_t _0x12c[0x20]; - uint32_t vendor_io_trim_cntrl; - - /* Start of sdmmc2/sdmmc4 only */ - uint32_t vendor_dllcal_cfg; - uint32_t vendor_dll_ctrl0; - uint32_t vendor_dll_ctrl1; - uint32_t vendor_dllcal_cfg_sta; - /* End of sdmmc2/sdmmc4 only */ - - uint32_t vendor_tuning_cntrl0; - uint32_t vendor_tuning_cntrl1; - uint32_t vendor_tuning_status0; - uint32_t vendor_tuning_status1; - uint32_t vendor_clk_gate_hysteresis_count; - uint32_t vendor_preset_val0; - uint32_t vendor_preset_val1; - uint32_t vendor_preset_val2; - uint32_t sdmemcomppadctrl; - uint32_t auto_cal_config; - uint32_t auto_cal_interval; - uint32_t auto_cal_status; - uint32_t io_spare; - uint32_t sdmmca_mccif_fifoctrl; - uint32_t timeout_wcoal_sdmmca; - uint32_t _0x1fc; -} tegra_sdmmc_t; - -static inline volatile tegra_sdmmc_t *sdmmc_get_regs(uint32_t idx) -{ - return (volatile tegra_sdmmc_t *)(0x700B0000 + (idx * 0x200)); -} - -#endif \ No newline at end of file diff --git a/fusee/common/vsprintf.c b/fusee/common/vsprintf.c deleted file mode 100644 index b356b443a..000000000 --- a/fusee/common/vsprintf.c +++ /dev/null @@ -1,1676 +0,0 @@ -/* - * Copyright (C) 2011 Andrei Warkentin - * - * This program is free software ; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * linux/lib/vsprintf.c - * - * Copyright (C) 1991, 1992 Linus Torvalds - */ - -/* vsprintf.c -- Lars Wirzenius & Linus Torvalds. */ -/* - * Wirzenius wrote this portably, Torvalds fucked it up :-) - */ - -/* - * Fri Jul 13 2001 Crutcher Dunnavant - * - changed to provide snprintf and vsnprintf functions - * So Feb 1 16:51:32 CET 2004 Juergen Quade - * - scnprintf and vscnprintf - */ - -#include -#include -#include -#include -#include - -#include "vsprintf.h" - -#define USHRT_MAX ((uint16_t)(~0U)) -#define SHRT_MAX ((int16_t)(USHRT_MAX>>1)) -#define SHRT_MIN ((int16_t)(-SHRT_MAX - 1)) -#define INT_MAX ((int)(~0U>>1)) -#define INT_MIN (-INT_MAX - 1) -#define UINT_MAX (~0U) -#define LONG_MAX ((long)(~0UL>>1)) -#define LONG_MIN (-LONG_MAX - 1) -#define ULONG_MAX (~0UL) - -typedef _Bool bool_t; - -#define do_div(n,base) ({\ - uint32_t __base = (base);\ - uint32_t __rem;\ - __rem = ((uint64_t)(n)) % __base;\ - (n) = ((uint64_t)(n)) / __base;\ - __rem;\ - }) - -const char hex_asc[] = "0123456789abcdef"; -#define hex_asc_lo(x) hex_asc[((x) & 0x0f)] -#define hex_asc_hi(x) hex_asc[((x) & 0xf0) >> 4] - -static inline char *pack_hex_byte(char *buf, uint8_t byte) -{ - *buf++ = hex_asc_hi(byte); - *buf++ = hex_asc_lo(byte); - return buf; -} - -/** - * skip_spaces - Removes leading whitespace from @str. - * @str: The string to be stripped. - * - * Returns a pointer to the first non-whitespace character in @str. - */ -static char *skip_spaces(const char *str) -{ - while (isspace((unsigned char)*str)) - ++str; - return (char *)str; -} - - -/* Works only for digits and letters, but small and fast */ -#define TOLOWER(x) ((x) | 0x20) - -static unsigned int simple_guess_base(const char *cp) -{ - if (cp[0] == '0') { - if (TOLOWER(cp[1]) == 'x' && isxdigit((unsigned char)cp[2])) - return 16; - else - return 8; - } else { - return 10; - } -} - -/** - * simple_strtoull - convert a string to an unsigned long long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -unsigned long long simple_strtoull(const char *cp, char **endp, unsigned int base) -{ - unsigned long long result = 0; - - if (!base) - base = simple_guess_base(cp); - - if (base == 16 && cp[0] == '0' && TOLOWER(cp[1]) == 'x') - cp += 2; - - while (isxdigit((unsigned char)*cp)) { - unsigned int value; - - value = isdigit((unsigned char)*cp) ? *cp - '0' : TOLOWER(*cp) - 'a' + 10; - if (value >= base) - break; - result = result * base + value; - cp++; - } - if (endp) - *endp = (char *)cp; - - return result; -} - -/** - * simple_strtoul - convert a string to an unsigned long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -unsigned long simple_strtoul(const char *cp, char **endp, unsigned int base) -{ - return simple_strtoull(cp, endp, base); -} - -/** - * simple_strtol - convert a string to a signed long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -long simple_strtol(const char *cp, char **endp, unsigned int base) -{ - if (*cp == '-') - return -simple_strtoul(cp + 1, endp, base); - - return simple_strtoul(cp, endp, base); -} - -/** - * simple_strtoll - convert a string to a signed long long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -long long simple_strtoll(const char *cp, char **endp, unsigned int base) -{ - if (*cp == '-') - return -simple_strtoull(cp + 1, endp, base); - - return simple_strtoull(cp, endp, base); -} - -static -int skip_atoi(const char **s) -{ - int i = 0; - - while (isdigit((unsigned char)**s)) - i = i*10 + *((*s)++) - '0'; - - return i; -} - -/* Decimal conversion is by far the most typical, and is used - * for /proc and /sys data. This directly impacts e.g. top performance - * with many processes running. We optimize it for speed - * using code from - * http://www.cs.uiowa.edu/~jones/bcd/decimal.html - * (with permission from the author, Douglas W. Jones). */ - -/* Formats correctly any integer in [0,99999]. - * Outputs from one to five digits depending on input. - * On i386 gcc 4.1.2 -O2: ~250 bytes of code. */ -static -char *put_dec_trunc(char *buf, unsigned q) -{ - unsigned d3, d2, d1, d0; - d1 = (q>>4) & 0xf; - d2 = (q>>8) & 0xf; - d3 = (q>>12); - - d0 = 6*(d3 + d2 + d1) + (q & 0xf); - q = (d0 * 0xcd) >> 11; - d0 = d0 - 10*q; - *buf++ = d0 + '0'; /* least significant digit */ - d1 = q + 9*d3 + 5*d2 + d1; - if (d1 != 0) { - q = (d1 * 0xcd) >> 11; - d1 = d1 - 10*q; - *buf++ = d1 + '0'; /* next digit */ - - d2 = q + 2*d2; - if ((d2 != 0) || (d3 != 0)) { - q = (d2 * 0xd) >> 7; - d2 = d2 - 10*q; - *buf++ = d2 + '0'; /* next digit */ - - d3 = q + 4*d3; - if (d3 != 0) { - q = (d3 * 0xcd) >> 11; - d3 = d3 - 10*q; - *buf++ = d3 + '0'; /* next digit */ - if (q != 0) - *buf++ = q + '0'; /* most sign. digit */ - } - } - } - - return buf; -} -/* Same with if's removed. Always emits five digits */ -static -char *put_dec_full(char *buf, unsigned q) -{ - /* BTW, if q is in [0,9999], 8-bit ints will be enough, */ - /* but anyway, gcc produces better code with full-sized ints */ - unsigned d3, d2, d1, d0; - d1 = (q>>4) & 0xf; - d2 = (q>>8) & 0xf; - d3 = (q>>12); - - /* - * Possible ways to approx. divide by 10 - * gcc -O2 replaces multiply with shifts and adds - * (x * 0xcd) >> 11: 11001101 - shorter code than * 0x67 (on i386) - * (x * 0x67) >> 10: 1100111 - * (x * 0x34) >> 9: 110100 - same - * (x * 0x1a) >> 8: 11010 - same - * (x * 0x0d) >> 7: 1101 - same, shortest code (on i386) - */ - d0 = 6*(d3 + d2 + d1) + (q & 0xf); - q = (d0 * 0xcd) >> 11; - d0 = d0 - 10*q; - *buf++ = d0 + '0'; - d1 = q + 9*d3 + 5*d2 + d1; - q = (d1 * 0xcd) >> 11; - d1 = d1 - 10*q; - *buf++ = d1 + '0'; - - d2 = q + 2*d2; - q = (d2 * 0xd) >> 7; - d2 = d2 - 10*q; - *buf++ = d2 + '0'; - - d3 = q + 4*d3; - q = (d3 * 0xcd) >> 11; /* - shorter code */ - /* q = (d3 * 0x67) >> 10; - would also work */ - d3 = d3 - 10*q; - *buf++ = d3 + '0'; - *buf++ = q + '0'; - - return buf; -} -/* No inlining helps gcc to use registers better */ -static -char *put_dec(char *buf, unsigned long long num) -{ - while (1) { - unsigned rem; - if (num < 100000) - return put_dec_trunc(buf, num); - rem = do_div(num, 100000); - buf = put_dec_full(buf, rem); - } -} - -#define ZEROPAD 1 /* pad with zero */ -#define SIGN 2 /* unsigned/signed long */ -#define PLUS 4 /* show plus */ -#define SPACE 8 /* space if plus */ -#define LEFT 16 /* left justified */ -#define SMALL 32 /* use lowercase in hex (must be 32 == 0x20) */ -#define SPECIAL 64 /* prefix hex with "0x", octal with "0" */ - -enum format_type { - FORMAT_TYPE_NONE, /* Just a string part */ - FORMAT_TYPE_WIDTH, - FORMAT_TYPE_PRECISION, - FORMAT_TYPE_CHAR, - FORMAT_TYPE_STR, - FORMAT_TYPE_PTR, - FORMAT_TYPE_PERCENT_CHAR, - FORMAT_TYPE_INVALID, - FORMAT_TYPE_LONG_LONG, - FORMAT_TYPE_ULONG, - FORMAT_TYPE_LONG, - FORMAT_TYPE_UBYTE, - FORMAT_TYPE_BYTE, - FORMAT_TYPE_USHORT, - FORMAT_TYPE_SHORT, - FORMAT_TYPE_UINT, - FORMAT_TYPE_INT, - FORMAT_TYPE_NRCHARS, - FORMAT_TYPE_SIZE_T, - FORMAT_TYPE_PTRDIFF -}; - -struct printf_spec { - uint8_t type; /* format_type enum */ - uint8_t flags; /* flags to number() */ - uint8_t base; /* number base, 8, 10 or 16 only */ - uint8_t qualifier; /* number qualifier, one of 'hHlLtzZ' */ - int16_t field_width; /* width of output field */ - int16_t precision; /* # of digits/chars */ -}; - -static -char *number(char *buf, char *end, unsigned long long num, - struct printf_spec spec) -{ - /* we are called with base 8, 10 or 16, only, thus don't need "G..." */ - static const char digits[16] = "0123456789ABCDEF"; /* "GHIJKLMNOPQRSTUVWXYZ"; */ - - char tmp[66]; - char sign; - char locase; - int need_pfx = ((spec.flags & SPECIAL) && spec.base != 10); - int i; - - /* locase = 0 or 0x20. ORing digits or letters with 'locase' - * produces same digits or (maybe lowercased) letters */ - locase = (spec.flags & SMALL); - if (spec.flags & LEFT) - spec.flags &= ~ZEROPAD; - sign = 0; - if (spec.flags & SIGN) { - if ((signed long long)num < 0) { - sign = '-'; - num = -(signed long long)num; - spec.field_width--; - } else if (spec.flags & PLUS) { - sign = '+'; - spec.field_width--; - } else if (spec.flags & SPACE) { - sign = ' '; - spec.field_width--; - } - } - if (need_pfx) { - spec.field_width--; - if (spec.base == 16) - spec.field_width--; - } - - /* generate full string in tmp[], in reverse order */ - i = 0; - if (num == 0) - tmp[i++] = '0'; - /* Generic code, for any base: - else do { - tmp[i++] = (digits[do_div(num,base)] | locase); - } while (num != 0); - */ - else if (spec.base != 10) { /* 8 or 16 */ - int mask = spec.base - 1; - int shift = 3; - - if (spec.base == 16) - shift = 4; - do { - tmp[i++] = (digits[((unsigned char)num) & mask] | locase); - num >>= shift; - } while (num); - } else { /* base 10 */ - i = put_dec(tmp, num) - tmp; - } - - /* printing 100 using %2d gives "100", not "00" */ - if (i > spec.precision) - spec.precision = i; - /* leading space padding */ - spec.field_width -= spec.precision; - if (!(spec.flags & (ZEROPAD+LEFT))) { - while (--spec.field_width >= 0) { - if (buf < end) - *buf = ' '; - ++buf; - } - } - /* sign */ - if (sign) { - if (buf < end) - *buf = sign; - ++buf; - } - /* "0x" / "0" prefix */ - if (need_pfx) { - if (buf < end) - *buf = '0'; - ++buf; - if (spec.base == 16) { - if (buf < end) - *buf = ('X' | locase); - ++buf; - } - } - /* zero or space padding */ - if (!(spec.flags & LEFT)) { - char c = (spec.flags & ZEROPAD) ? '0' : ' '; - while (--spec.field_width >= 0) { - if (buf < end) - *buf = c; - ++buf; - } - } - /* hmm even more zero padding? */ - while (i <= --spec.precision) { - if (buf < end) - *buf = '0'; - ++buf; - } - /* actual digits of result */ - while (--i >= 0) { - if (buf < end) - *buf = tmp[i]; - ++buf; - } - /* trailing space padding */ - while (--spec.field_width >= 0) { - if (buf < end) - *buf = ' '; - ++buf; - } - - return buf; -} - -static -char *string(char *buf, char *end, const char *s, struct printf_spec spec) -{ - int len, i; - - if ((unsigned long)s == 0) - s = "(null)"; - - len = strnlen(s, spec.precision); - - if (!(spec.flags & LEFT)) { - while (len < spec.field_width--) { - if (buf < end) - *buf = ' '; - ++buf; - } - } - for (i = 0; i < len; ++i) { - if (buf < end) - *buf = *s; - ++buf; ++s; - } - while (len < spec.field_width--) { - if (buf < end) - *buf = ' '; - ++buf; - } - - return buf; -} - -static -char *uuid_string(char *buf, char *end, const uint8_t *addr, - struct printf_spec spec, const char *fmt) -{ - char uuid[sizeof("xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx")]; - char *p = uuid; - int i; - static const uint8_t be[16] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}; - static const uint8_t le[16] = {3,2,1,0,5,4,7,6,8,9,10,11,12,13,14,15}; - const uint8_t *index = be; - bool_t uc = false; - - switch (*(++fmt)) { - case 'L': - uc = true; /* fall-through */ - case 'l': - index = le; - break; - case 'B': - uc = true; - break; - } - - for (i = 0; i < 16; i++) { - p = pack_hex_byte(p, addr[index[i]]); - switch (i) { - case 3: - case 5: - case 7: - case 9: - *p++ = '-'; - break; - } - } - - *p = 0; - - if (uc) { - p = uuid; - do { - *p = toupper((unsigned char)*p); - } while (*(++p)); - } - - return string(buf, end, uuid, spec); -} - -int kptr_restrict = 1; - -/* - * Show a '%p' thing. A kernel extension is that the '%p' is followed - * by an extra set of alphanumeric characters that are extended format - * specifiers. - * - * Right now we handle: - * - * - 'U' For a 16 byte UUID/GUID, it prints the UUID/GUID in the form - * "xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx" - * Options for %pU are: - * b big endian lower case hex (default) - * B big endian UPPER case hex - * l little endian lower case hex - * L little endian UPPER case hex - * big endian output byte order is: - * [0][1][2][3]-[4][5]-[6][7]-[8][9]-[10][11][12][13][14][15] - * little endian output byte order is: - * [3][2][1][0]-[5][4]-[7][6]-[8][9]-[10][11][12][13][14][15] - * - 'V' For a struct va_format which contains a format string * and va_list *, - * call vsnprintf(->format, *->va_list). - * Implements a "recursive vsnprintf". - * Do not use this feature without some mechanism to verify the - * correctness of the format string and va_list arguments. - * - */ -static -char *pointer(const char *fmt, char *buf, char *end, void *ptr, - struct printf_spec spec) -{ - if (!ptr) { - /* - * Print (null) with the same width as a pointer so it makes - * tabular output look nice. - */ - if (spec.field_width == -1) - spec.field_width = 2 * sizeof(void *); - return string(buf, end, "(null)", spec); - } - - switch (*fmt) { - case 'U': - return uuid_string(buf, end, ptr, spec, fmt); - case 'V': - return buf + vsnprintf(buf, end - buf, - ((struct va_format *)ptr)->fmt, - *(((struct va_format *)ptr)->va)); - } - spec.flags |= SMALL; - if (spec.field_width == -1) { - spec.field_width = 2 * sizeof(void *); - spec.flags |= ZEROPAD; - } - spec.base = 16; - - return number(buf, end, (unsigned long) ptr, spec); -} - -/* - * Helper function to decode printf style format. - * Each call decode a token from the format and return the - * number of characters read (or likely the delta where it wants - * to go on the next call). - * The decoded token is returned through the parameters - * - * 'h', 'l', or 'L' for integer fields - * 'z' support added 23/7/1999 S.H. - * 'z' changed to 'Z' --davidm 1/25/99 - * 't' added for ptrdiff_t - * - * @fmt: the format string - * @type of the token returned - * @flags: various flags such as +, -, # tokens.. - * @field_width: overwritten width - * @base: base of the number (octal, hex, ...) - * @precision: precision of a number - * @qualifier: qualifier of a number (long, size_t, ...) - */ -static -int format_decode(const char *fmt, struct printf_spec *spec) -{ - const char *start = fmt; - - /* we finished early by reading the field width */ - if (spec->type == FORMAT_TYPE_WIDTH) { - if (spec->field_width < 0) { - spec->field_width = -spec->field_width; - spec->flags |= LEFT; - } - spec->type = FORMAT_TYPE_NONE; - goto precision; - } - - /* we finished early by reading the precision */ - if (spec->type == FORMAT_TYPE_PRECISION) { - if (spec->precision < 0) - spec->precision = 0; - - spec->type = FORMAT_TYPE_NONE; - goto qualifier; - } - - /* By default */ - spec->type = FORMAT_TYPE_NONE; - - for (; *fmt ; ++fmt) { - if (*fmt == '%') - break; - } - - /* Return the current non-format string */ - if (fmt != start || !*fmt) - return fmt - start; - - /* Process flags */ - spec->flags = 0; - - while (1) { /* this also skips first '%' */ - bool_t found = true; - - ++fmt; - - switch (*fmt) { - case '-': spec->flags |= LEFT; break; - case '+': spec->flags |= PLUS; break; - case ' ': spec->flags |= SPACE; break; - case '#': spec->flags |= SPECIAL; break; - case '0': spec->flags |= ZEROPAD; break; - default: found = false; - } - - if (!found) - break; - } - - /* get field width */ - spec->field_width = -1; - - if (isdigit((unsigned char)*fmt)) - spec->field_width = skip_atoi(&fmt); - else if (*fmt == '*') { - /* it's the next argument */ - spec->type = FORMAT_TYPE_WIDTH; - return ++fmt - start; - } - -precision: - /* get the precision */ - spec->precision = -1; - if (*fmt == '.') { - ++fmt; - if (isdigit((unsigned char)*fmt)) { - spec->precision = skip_atoi(&fmt); - if (spec->precision < 0) - spec->precision = 0; - } else if (*fmt == '*') { - /* it's the next argument */ - spec->type = FORMAT_TYPE_PRECISION; - return ++fmt - start; - } - } - -qualifier: - /* get the conversion qualifier */ - spec->qualifier = -1; - if (*fmt == 'h' || TOLOWER(*fmt) == 'l' || - TOLOWER(*fmt) == 'z' || *fmt == 't') { - spec->qualifier = *fmt++; - if (spec->qualifier == *fmt) { - if (spec->qualifier == 'l') { - spec->qualifier = 'L'; - ++fmt; - } else if (spec->qualifier == 'h') { - spec->qualifier = 'H'; - ++fmt; - } - } - } - - /* default base */ - spec->base = 10; - switch (*fmt) { - case 'c': - spec->type = FORMAT_TYPE_CHAR; - return ++fmt - start; - - case 's': - spec->type = FORMAT_TYPE_STR; - return ++fmt - start; - - case 'p': - spec->type = FORMAT_TYPE_PTR; - return fmt - start; - /* skip alnum */ - - case 'n': - spec->type = FORMAT_TYPE_NRCHARS; - return ++fmt - start; - - case '%': - spec->type = FORMAT_TYPE_PERCENT_CHAR; - return ++fmt - start; - - /* integer number formats - set up the flags and "break" */ - case 'o': - spec->base = 8; - break; - - case 'x': - spec->flags |= SMALL; - - case 'X': - spec->base = 16; - break; - - case 'd': - case 'i': - spec->flags |= SIGN; - case 'u': - break; - - default: - spec->type = FORMAT_TYPE_INVALID; - return fmt - start; - } - - if (spec->qualifier == 'L') - spec->type = FORMAT_TYPE_LONG_LONG; - else if (spec->qualifier == 'l') { - if (spec->flags & SIGN) - spec->type = FORMAT_TYPE_LONG; - else - spec->type = FORMAT_TYPE_ULONG; - } else if (TOLOWER(spec->qualifier) == 'z') { - spec->type = FORMAT_TYPE_SIZE_T; - } else if (spec->qualifier == 't') { - spec->type = FORMAT_TYPE_PTRDIFF; - } else if (spec->qualifier == 'H') { - if (spec->flags & SIGN) - spec->type = FORMAT_TYPE_BYTE; - else - spec->type = FORMAT_TYPE_UBYTE; - } else if (spec->qualifier == 'h') { - if (spec->flags & SIGN) - spec->type = FORMAT_TYPE_SHORT; - else - spec->type = FORMAT_TYPE_USHORT; - } else { - if (spec->flags & SIGN) - spec->type = FORMAT_TYPE_INT; - else - spec->type = FORMAT_TYPE_UINT; - } - - return ++fmt - start; -} - -/** - * vsnprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @size: The size of the buffer, including the trailing null space - * @fmt: The format string to use - * @args: Arguments for the format string - * - * This function follows C99 vsnprintf, but has some extensions: - * %pS output the name of a text symbol with offset - * %ps output the name of a text symbol without offset - * %pF output the name of a function pointer with its offset - * %pf output the name of a function pointer without its offset - * %pB output the name of a backtrace symbol with its offset - * %pR output the address range in a struct resource with decoded flags - * %pr output the address range in a struct resource with raw flags - * %pM output a 6-byte MAC address with colons - * %pm output a 6-byte MAC address without colons - * %pI4 print an IPv4 address without leading zeros - * %pi4 print an IPv4 address with leading zeros - * %pI6 print an IPv6 address with colons - * %pi6 print an IPv6 address without colons - * %pI6c print an IPv6 address as specified by - * http://tools.ietf.org/html/draft-ietf-6man-text-addr-representation-00 - * %pU[bBlL] print a UUID/GUID in big or little endian using lower or upper - * case. - * %n is ignored - * - * The return value is the number of characters which would - * be generated for the given input, excluding the trailing - * '\0', as per ISO C99. If you want to have the exact - * number of characters written into @buf as return value - * (not including the trailing '\0'), use vscnprintf(). If the - * return is greater than or equal to @size, the resulting - * string is truncated. - * - * Call this function if you are already dealing with a va_list. - * You probably want snprintf() instead. - */ -int vsnprintf(char *buf, size_t size, const char *fmt, va_list args) -{ - unsigned long long num; - char *str, *end; - struct printf_spec spec = {0}; - - str = buf; - end = buf + size; - - /* Make sure end is always >= buf */ - if (end < buf) { - end = ((void *)-1); - size = end - buf; - } - - while (*fmt) { - const char *old_fmt = fmt; - int read = format_decode(fmt, &spec); - - fmt += read; - - switch (spec.type) { - case FORMAT_TYPE_NONE: { - int copy = read; - if (str < end) { - if (copy > end - str) - copy = end - str; - memcpy(str, old_fmt, copy); - } - str += read; - break; - } - - case FORMAT_TYPE_WIDTH: - spec.field_width = va_arg(args, int); - break; - - case FORMAT_TYPE_PRECISION: - spec.precision = va_arg(args, int); - break; - - case FORMAT_TYPE_CHAR: { - char c; - - if (!(spec.flags & LEFT)) { - while (--spec.field_width > 0) { - if (str < end) - *str = ' '; - ++str; - - } - } - c = (unsigned char) va_arg(args, int); - if (str < end) - *str = c; - ++str; - while (--spec.field_width > 0) { - if (str < end) - *str = ' '; - ++str; - } - break; - } - - case FORMAT_TYPE_STR: - str = string(str, end, va_arg(args, char *), spec); - break; - - case FORMAT_TYPE_PTR: - str = pointer(fmt+1, str, end, va_arg(args, void *), - spec); - while (isalnum((unsigned char)*fmt)) - fmt++; - break; - - case FORMAT_TYPE_PERCENT_CHAR: - if (str < end) - *str = '%'; - ++str; - break; - - case FORMAT_TYPE_INVALID: - if (str < end) - *str = '%'; - ++str; - break; - - case FORMAT_TYPE_NRCHARS: { - uint8_t qualifier = spec.qualifier; - - if (qualifier == 'l') { - long *ip = va_arg(args, long *); - *ip = (str - buf); - } else if (TOLOWER(qualifier) == 'z') { - size_t *ip = va_arg(args, size_t *); - *ip = (str - buf); - } else { - int *ip = va_arg(args, int *); - *ip = (str - buf); - } - break; - } - - default: - switch (spec.type) { - case FORMAT_TYPE_LONG_LONG: - num = va_arg(args, long long); - break; - case FORMAT_TYPE_ULONG: - num = va_arg(args, unsigned long); - break; - case FORMAT_TYPE_LONG: - num = va_arg(args, long); - break; - case FORMAT_TYPE_SIZE_T: - num = va_arg(args, size_t); - break; - case FORMAT_TYPE_PTRDIFF: - num = va_arg(args, ptrdiff_t); - break; - case FORMAT_TYPE_UBYTE: - num = (unsigned char) va_arg(args, int); - break; - case FORMAT_TYPE_BYTE: - num = (signed char) va_arg(args, int); - break; - case FORMAT_TYPE_USHORT: - num = (unsigned short) va_arg(args, int); - break; - case FORMAT_TYPE_SHORT: - num = (short) va_arg(args, int); - break; - case FORMAT_TYPE_INT: - num = (int) va_arg(args, int); - break; - default: - num = va_arg(args, unsigned int); - } - - str = number(str, end, num, spec); - } - } - - if (size > 0) { - if (str < end) - *str = '\0'; - else - end[-1] = '\0'; - } - - /* the trailing null byte doesn't count towards the total */ - return str-buf; - -} - -/** - * vscnprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @size: The size of the buffer, including the trailing null space - * @fmt: The format string to use - * @args: Arguments for the format string - * - * The return value is the number of characters which have been written into - * the @buf not including the trailing '\0'. If @size is == 0 the function - * returns 0. - * - * Call this function if you are already dealing with a va_list. - * You probably want scnprintf() instead. - * - * See the vsnprintf() documentation for format string extensions over C99. - */ -int vscnprintf(char *buf, size_t size, const char *fmt, va_list args) -{ - int i; - - i = vsnprintf(buf, size, fmt, args); - - if (i < size) - return i; - if (size != 0) - return size - 1; - return 0; -} - -/** - * snprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @size: The size of the buffer, including the trailing null space - * @fmt: The format string to use - * @...: Arguments for the format string - * - * The return value is the number of characters which would be - * generated for the given input, excluding the trailing null, - * as per ISO C99. If the return is greater than or equal to - * @size, the resulting string is truncated. - * - * See the vsnprintf() documentation for format string extensions over C99. - */ -int snprintf(char *buf, size_t size, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vsnprintf(buf, size, fmt, args); - va_end(args); - - return i; -} - -/** - * scnprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @size: The size of the buffer, including the trailing null space - * @fmt: The format string to use - * @...: Arguments for the format string - * - * The return value is the number of characters written into @buf not including - * the trailing '\0'. If @size is == 0 the function returns 0. - */ - -int scnprintf(char *buf, size_t size, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vscnprintf(buf, size, fmt, args); - va_end(args); - - return i; -} - -/** - * vsprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @fmt: The format string to use - * @args: Arguments for the format string - * - * The function returns the number of characters written - * into @buf. Use vsnprintf() or vscnprintf() in order to avoid - * buffer overflows. - * - * Call this function if you are already dealing with a va_list. - * You probably want sprintf() instead. - * - * See the vsnprintf() documentation for format string extensions over C99. - */ -int vsprintf(char *buf, const char *fmt, va_list args) -{ - return vsnprintf(buf, INT_MAX, fmt, args); -} - -/** - * sprintf - Format a string and place it in a buffer - * @buf: The buffer to place the result into - * @fmt: The format string to use - * @...: Arguments for the format string - * - * The function returns the number of characters written - * into @buf. Use snprintf() or scnprintf() in order to avoid - * buffer overflows. - * - * See the vsnprintf() documentation for format string extensions over C99. - */ -int sprintf(char *buf, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vsnprintf(buf, INT_MAX, fmt, args); - va_end(args); - - return i; -} - -#ifdef CONFIG_BINARY_PRINTF -/* - * bprintf service: - * vbin_printf() - VA arguments to binary data - * bstr_printf() - Binary data to text string - */ - -/** - * vbin_printf - Parse a format string and place args' binary value in a buffer - * @bin_buf: The buffer to place args' binary value - * @size: The size of the buffer(by words(32bits), not characters) - * @fmt: The format string to use - * @args: Arguments for the format string - * - * The format follows C99 vsnprintf, except %n is ignored, and its argument - * is skiped. - * - * The return value is the number of words(32bits) which would be generated for - * the given input. - * - * NOTE: - * If the return value is greater than @size, the resulting bin_buf is NOT - * valid for bstr_printf(). - */ -int vbin_printf(uint32_t *bin_buf, size_t size, const char *fmt, va_list args) -{ - struct printf_spec spec = {0}; - char *str, *end; - - str = (char *)bin_buf; - end = (char *)(bin_buf + size); - -#define save_arg(type) \ -do { \ - if (sizeof(type) == 8) { \ - unsigned long long value; \ - str = PTR_ALIGN(str, sizeof(uint32_t)); \ - value = va_arg(args, unsigned long long); \ - if (str + sizeof(type) <= end) { \ - *(uint32_t *)str = *(uint32_t *)&value; \ - *(uint32_t *)(str + 4) = *((uint32_t *)&value + 1); \ - } \ - } else { \ - unsigned long value; \ - str = PTR_ALIGN(str, sizeof(type)); \ - value = va_arg(args, int); \ - if (str + sizeof(type) <= end) \ - *(typeof(type) *)str = (type)value; \ - } \ - str += sizeof(type); \ -} while (0) - - while (*fmt) { - int read = format_decode(fmt, &spec); - - fmt += read; - - switch (spec.type) { - case FORMAT_TYPE_NONE: - case FORMAT_TYPE_INVALID: - case FORMAT_TYPE_PERCENT_CHAR: - break; - - case FORMAT_TYPE_WIDTH: - case FORMAT_TYPE_PRECISION: - save_arg(int); - break; - - case FORMAT_TYPE_CHAR: - save_arg(char); - break; - - case FORMAT_TYPE_STR: { - const char *save_str = va_arg(args, char *); - size_t len; - - if ((unsigned long)save_str > (unsigned long)-PAGE_SIZE - || (unsigned long)save_str < PAGE_SIZE) - save_str = "(null)"; - len = strlen(save_str) + 1; - if (str + len < end) - memcpy(str, save_str, len); - str += len; - break; - } - - case FORMAT_TYPE_PTR: - save_arg(void *); - /* skip all alphanumeric pointer suffixes */ - while (isalnum((unsigned char)*fmt)) - fmt++; - break; - - case FORMAT_TYPE_NRCHARS: { - /* skip %n 's argument */ - uint8_t qualifier = spec.qualifier; - void *skip_arg; - if (qualifier == 'l') - skip_arg = va_arg(args, long *); - else if (TOLOWER(qualifier) == 'z') - skip_arg = va_arg(args, size_t *); - else - skip_arg = va_arg(args, int *); - break; - } - - default: - switch (spec.type) { - - case FORMAT_TYPE_LONG_LONG: - save_arg(long long); - break; - case FORMAT_TYPE_ULONG: - case FORMAT_TYPE_LONG: - save_arg(unsigned long); - break; - case FORMAT_TYPE_SIZE_T: - save_arg(size_t); - break; - case FORMAT_TYPE_PTRDIFF: - save_arg(ptrdiff_t); - break; - case FORMAT_TYPE_UBYTE: - case FORMAT_TYPE_BYTE: - save_arg(char); - break; - case FORMAT_TYPE_USHORT: - case FORMAT_TYPE_SHORT: - save_arg(short); - break; - default: - save_arg(int); - } - } - } - - return (uint32_t *)(PTR_ALIGN(str, sizeof(uint32_t))) - bin_buf; -#undef save_arg -} - -/** - * bstr_printf - Format a string from binary arguments and place it in a buffer - * @buf: The buffer to place the result into - * @size: The size of the buffer, including the trailing null space - * @fmt: The format string to use - * @bin_buf: Binary arguments for the format string - * - * This function like C99 vsnprintf, but the difference is that vsnprintf gets - * arguments from stack, and bstr_printf gets arguments from @bin_buf which is - * a binary buffer that generated by vbin_printf. - * - * The format follows C99 vsnprintf, but has some extensions: - * see vsnprintf comment for details. - * - * The return value is the number of characters which would - * be generated for the given input, excluding the trailing - * '\0', as per ISO C99. If you want to have the exact - * number of characters written into @buf as return value - * (not including the trailing '\0'), use vscnprintf(). If the - * return is greater than or equal to @size, the resulting - * string is truncated. - */ -int bstr_printf(char *buf, size_t size, const char *fmt, const uint32_t *bin_buf) -{ - struct printf_spec spec = {0}; - char *str, *end; - const char *args = (const char *)bin_buf; - - if (WARN_ON_ONCE((int) size < 0)) - return 0; - - str = buf; - end = buf + size; - -#define get_arg(type) \ -({ \ - typeof(type) value; \ - if (sizeof(type) == 8) { \ - args = PTR_ALIGN(args, sizeof(uint32_t)); \ - *(uint32_t *)&value = *(uint32_t *)args; \ - *((uint32_t *)&value + 1) = *(uint32_t *)(args + 4); \ - } else { \ - args = PTR_ALIGN(args, sizeof(type)); \ - value = *(typeof(type) *)args; \ - } \ - args += sizeof(type); \ - value; \ -}) - - /* Make sure end is always >= buf */ - if (end < buf) { - end = ((void *)-1); - size = end - buf; - } - - while (*fmt) { - const char *old_fmt = fmt; - int read = format_decode(fmt, &spec); - - fmt += read; - - switch (spec.type) { - case FORMAT_TYPE_NONE: { - int copy = read; - if (str < end) { - if (copy > end - str) - copy = end - str; - memcpy(str, old_fmt, copy); - } - str += read; - break; - } - - case FORMAT_TYPE_WIDTH: - spec.field_width = get_arg(int); - break; - - case FORMAT_TYPE_PRECISION: - spec.precision = get_arg(int); - break; - - case FORMAT_TYPE_CHAR: { - char c; - - if (!(spec.flags & LEFT)) { - while (--spec.field_width > 0) { - if (str < end) - *str = ' '; - ++str; - } - } - c = (unsigned char) get_arg(char); - if (str < end) - *str = c; - ++str; - while (--spec.field_width > 0) { - if (str < end) - *str = ' '; - ++str; - } - break; - } - - case FORMAT_TYPE_STR: { - const char *str_arg = args; - args += strlen(str_arg) + 1; - str = string(str, end, (char *)str_arg, spec); - break; - } - - case FORMAT_TYPE_PTR: - str = pointer(fmt+1, str, end, get_arg(void *), spec); - while (isalnum((unsigned char)*fmt)) - fmt++; - break; - - case FORMAT_TYPE_PERCENT_CHAR: - case FORMAT_TYPE_INVALID: - if (str < end) - *str = '%'; - ++str; - break; - - case FORMAT_TYPE_NRCHARS: - /* skip */ - break; - - default: { - unsigned long long num; - - switch (spec.type) { - - case FORMAT_TYPE_LONG_LONG: - num = get_arg(long long); - break; - case FORMAT_TYPE_ULONG: - case FORMAT_TYPE_LONG: - num = get_arg(unsigned long); - break; - case FORMAT_TYPE_SIZE_T: - num = get_arg(size_t); - break; - case FORMAT_TYPE_PTRDIFF: - num = get_arg(ptrdiff_t); - break; - case FORMAT_TYPE_UBYTE: - num = get_arg(unsigned char); - break; - case FORMAT_TYPE_BYTE: - num = get_arg(signed char); - break; - case FORMAT_TYPE_USHORT: - num = get_arg(unsigned short); - break; - case FORMAT_TYPE_SHORT: - num = get_arg(short); - break; - case FORMAT_TYPE_UINT: - num = get_arg(unsigned int); - break; - default: - num = get_arg(int); - } - - str = number(str, end, num, spec); - } /* default: */ - } /* switch(spec.type) */ - } /* while(*fmt) */ - - if (size > 0) { - if (str < end) - *str = '\0'; - else - end[-1] = '\0'; - } - -#undef get_arg - - /* the trailing null byte doesn't count towards the total */ - return str - buf; -} - -/** - * bprintf - Parse a format string and place args' binary value in a buffer - * @bin_buf: The buffer to place args' binary value - * @size: The size of the buffer(by words(32bits), not characters) - * @fmt: The format string to use - * @...: Arguments for the format string - * - * The function returns the number of words(uint32_t) written - * into @bin_buf. - */ -int bprintf(uint32_t *bin_buf, size_t size, const char *fmt, ...) -{ - va_list args; - int ret; - - va_start(args, fmt); - ret = vbin_printf(bin_buf, size, fmt, args); - va_end(args); - - return ret; -} - -#endif /* CONFIG_BINARY_PRINTF */ - -/** - * vsscanf - Unformat a buffer into a list of arguments - * @buf: input buffer - * @fmt: format of buffer - * @args: arguments - */ -int vsscanf(const char *buf, const char *fmt, va_list args) -{ - const char *str = buf; - char *next; - char digit; - int num = 0; - uint8_t qualifier; - uint8_t base; - int16_t field_width; - bool_t is_sign; - - while (*fmt && *str) { - /* skip any white space in format */ - /* white space in format matchs any amount of - * white space, including none, in the input. - */ - if (isspace((unsigned char)*fmt)) { - fmt = skip_spaces(++fmt); - str = skip_spaces(str); - } - - /* anything that is not a conversion must match exactly */ - if (*fmt != '%' && *fmt) { - if (*fmt++ != *str++) - break; - continue; - } - - if (!*fmt) - break; - ++fmt; - - /* skip this conversion. - * advance both strings to next white space - */ - if (*fmt == '*') { - while (!isspace((unsigned char)*fmt) && *fmt != '%' && *fmt) - fmt++; - while (!isspace((unsigned char)*str) && *str) - str++; - continue; - } - - /* get field width */ - field_width = -1; - if (isdigit((unsigned char)*fmt)) - field_width = skip_atoi(&fmt); - - /* get conversion qualifier */ - qualifier = -1; - if (*fmt == 'h' || TOLOWER(*fmt) == 'l' || - TOLOWER(*fmt) == 'z') { - qualifier = *fmt++; - if (qualifier == *fmt) { - if (qualifier == 'h') { - qualifier = 'H'; - fmt++; - } else if (qualifier == 'l') { - qualifier = 'L'; - fmt++; - } - } - } - - if (!*fmt || !*str) - break; - - base = 10; - is_sign = 0; - - switch (*fmt++) { - case 'c': - { - char *s = (char *)va_arg(args, char*); - if (field_width == -1) - field_width = 1; - do { - *s++ = *str++; - } while (--field_width > 0 && *str); - num++; - } - continue; - case 's': - { - char *s = (char *)va_arg(args, char *); - if (field_width == -1) - field_width = SHRT_MAX; - /* first, skip leading white space in buffer */ - str = skip_spaces(str); - - /* now copy until next white space */ - while (*str && !isspace((unsigned char)*str) && field_width--) - *s++ = *str++; - *s = '\0'; - num++; - } - continue; - case 'n': - /* return number of characters read so far */ - { - int *i = (int *)va_arg(args, int*); - *i = str - buf; - } - continue; - case 'o': - base = 8; - break; - case 'x': - case 'X': - base = 16; - break; - case 'i': - base = 0; - case 'd': - is_sign = 1; - case 'u': - break; - case '%': - /* looking for '%' in str */ - if (*str++ != '%') - return num; - continue; - default: - /* invalid format; stop here */ - return num; - } - - /* have some sort of integer conversion. - * first, skip white space in buffer. - */ - str = skip_spaces(str); - - digit = *str; - if (is_sign && digit == '-') - digit = *(str + 1); - - if (!digit - || (base == 16 && !isxdigit((unsigned char)digit)) - || (base == 10 && !isdigit((unsigned char)digit)) - || (base == 8 && (!isdigit((unsigned char)digit) || digit > '7')) - || (base == 0 && !isdigit((unsigned char)digit))) - break; - - switch (qualifier) { - case 'H': /* that's 'hh' in format */ - if (is_sign) { - signed char *s = (signed char *)va_arg(args, signed char *); - *s = (signed char)simple_strtol(str, &next, base); - } else { - unsigned char *s = (unsigned char *)va_arg(args, unsigned char *); - *s = (unsigned char)simple_strtoul(str, &next, base); - } - break; - case 'h': - if (is_sign) { - short *s = (short *)va_arg(args, short *); - *s = (short)simple_strtol(str, &next, base); - } else { - unsigned short *s = (unsigned short *)va_arg(args, unsigned short *); - *s = (unsigned short)simple_strtoul(str, &next, base); - } - break; - case 'l': - if (is_sign) { - long *l = (long *)va_arg(args, long *); - *l = simple_strtol(str, &next, base); - } else { - unsigned long *l = (unsigned long *)va_arg(args, unsigned long *); - *l = simple_strtoul(str, &next, base); - } - break; - case 'L': - if (is_sign) { - long long *l = (long long *)va_arg(args, long long *); - *l = simple_strtoll(str, &next, base); - } else { - unsigned long long *l = (unsigned long long *)va_arg(args, unsigned long long *); - *l = simple_strtoull(str, &next, base); - } - break; - case 'Z': - case 'z': - { - size_t *s = (size_t *)va_arg(args, size_t *); - *s = (size_t)simple_strtoul(str, &next, base); - } - break; - default: - if (is_sign) { - int *i = (int *)va_arg(args, int *); - *i = (int)simple_strtol(str, &next, base); - } else { - unsigned int *i = (unsigned int *)va_arg(args, unsigned int*); - *i = (unsigned int)simple_strtoul(str, &next, base); - } - break; - } - num++; - - if (!next) - break; - str = next; - } - - /* - * Now we've come all the way through so either the input string or the - * format ended. In the former case, there can be a %n at the current - * position in the format that needs to be filled. - */ - if (*fmt == '%' && *(fmt + 1) == 'n') { - int *p = (int *)va_arg(args, int *); - *p = str - buf; - } - - return num; -} - -/** - * sscanf - Unformat a buffer into a list of arguments - * @buf: input buffer - * @fmt: formatting of buffer - * @...: resulting arguments - */ -int sscanf(const char *buf, const char *fmt, ...) -{ - va_list args; - int i; - - va_start(args, fmt); - i = vsscanf(buf, fmt, args); - va_end(args); - - return i; -} diff --git a/fusee/common/vsprintf.h b/fusee/common/vsprintf.h deleted file mode 100644 index 7b7fea7aa..000000000 --- a/fusee/common/vsprintf.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2011 Andrei Warkentin - * - * This program is free software ; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - -#ifndef VSPRINTF_H -#define VSPRINTF_H - -struct va_format { - const char *fmt; - va_list *va; -}; - -unsigned long long simple_strtoull(const char *cp, char **endp, unsigned int base); - -int sprintf(char *buf, const char *fmt, ...); -int scnprintf(char *buf, size_t size, const char *fmt, ...); -int snprintf(char *buf, size_t size, const char *fmt, ...); -int vsnprintf(char *buf, size_t size, const char *fmt, va_list args); -int sscanf(const char *buf, const char *fmt, ...); - -#endif /* VSPRINTF_H */ diff --git a/fusee/fusee-primary/Makefile b/fusee/fusee-primary/Makefile deleted file mode 100644 index 8e203df39..000000000 --- a/fusee/fusee-primary/Makefile +++ /dev/null @@ -1,192 +0,0 @@ -#--------------------------------------------------------------------------------- -.SUFFIXES: -#--------------------------------------------------------------------------------- - -ifeq ($(strip $(DEVKITARM)),) -$(error "Please set DEVKITARM in your environment. export DEVKITARM=devkitARM") -endif - -TOPDIR ?= $(CURDIR) - -AMS := $(TOPDIR)/../../../ -include $(DEVKITARM)/base_rules - -AMSBRANCH := $(shell git symbolic-ref --short HEAD) -AMSREV := $(AMSBRANCH)-$(shell git rev-parse --short HEAD) - -ifneq (, $(strip $(shell git status --porcelain 2>/dev/null))) - AMSREV := $(AMSREV)-dirty -endif - -define _bin2o - bin2s $< | $(AS) -o $(@) - echo "extern const u8" `(echo $( `(echo $(> `(echo $(> `(echo $( $(notdir $*.lst) - -utils.o: CFLAGS += -fno-builtin - -$(OFILES_SRC) : $(HFILES_BIN) - -#--------------------------------------------------------------------------------- -# you need a rule like this for each extension you use as binary data -#--------------------------------------------------------------------------------- -%.bin.o %_bin.h: %.bin -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(bin2o) - -#--------------------------------------------------------------------------------- -# you need a rule like this for each extension you use as binary data -#--------------------------------------------------------------------------------- -fusee_primary_main.lz4.o fusee_primary_main_lz4.h: fusee-primary-main.lz4 -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(_bin2o) - --include $(DEPENDS) - -#--------------------------------------------------------------------------------------- -endif -#--------------------------------------------------------------------------------------- diff --git a/fusee/fusee-primary/fusee-primary-main/Makefile b/fusee/fusee-primary/fusee-primary-main/Makefile deleted file mode 100644 index 7ca99474b..000000000 --- a/fusee/fusee-primary/fusee-primary-main/Makefile +++ /dev/null @@ -1,177 +0,0 @@ -#--------------------------------------------------------------------------------- -.SUFFIXES: -#--------------------------------------------------------------------------------- - -ifeq ($(strip $(DEVKITARM)),) -$(error "Please set DEVKITARM in your environment. export DEVKITARM=devkitARM") -endif - -TOPDIR ?= $(CURDIR) - -AMS ?= $(TOPDIR)/../../../ -include $(DEVKITARM)/base_rules - -AMSBRANCH := $(shell git symbolic-ref --short HEAD) -AMSREV := $(AMSBRANCH)-$(shell git rev-parse --short HEAD) - -ifneq (, $(strip $(shell git status --porcelain 2>/dev/null))) - AMSREV := $(AMSREV)-dirty -endif - -#--------------------------------------------------------------------------------- -# TARGET is the name of the output -# BUILD is the directory where object files & intermediate files will be placed -# SOURCES is a list of directories containing source code -# DATA is a list of directories containing data files -# INCLUDES is a list of directories containing header files -#--------------------------------------------------------------------------------- -TARGET := $(notdir $(CURDIR)) -BUILD := build -SOURCES := src ../../../fusee/common ../../../fusee/common/display ../../../fusee/common/fatfs ../../../fusee/common/sdmmc -DATA := data -INCLUDES := include ../../../libraries/libvapours/include - -#--------------------------------------------------------------------------------- -# options for code generation -#--------------------------------------------------------------------------------- -ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork -DEFINES := -D__BPMP__ -DFUSEE_STAGE1_SRC -DATMOSPHERE_GIT_BRANCH=\"$(AMSBRANCH)\" -DATMOSPHERE_GIT_REV=\"$(AMSREV)\" - -CFLAGS := \ - -g \ - -gdwarf-4 \ - -O2 \ - -fomit-frame-pointer \ - -ffunction-sections \ - -fdata-sections \ - -std=gnu11 \ - -Werror \ - -Wall \ - -Wno-array-bounds \ - -Wno-stringop-overflow \ - -Wno-stringop-overread \ - -fstrict-volatile-bitfields \ - $(ARCH) $(DEFINES) - -CFLAGS += $(INCLUDE) - -CXXFLAGS := $(CFLAGS) -fno-rtti -fno-exceptions -std=gnu++11 - -ASFLAGS := -g -gdwarf-4 $(ARCH) -LDFLAGS = -specs=$(TOPDIR)/linker.specs -g -gdwarf-4 $(ARCH) -Wl,-Map,$(notdir $*.map) - -LIBS := - -#--------------------------------------------------------------------------------- -# list of directories containing libraries, this must be the top level containing -# include and lib -#--------------------------------------------------------------------------------- -LIBDIRS := - - -#--------------------------------------------------------------------------------- -# no real need to edit anything past this point unless you need to add additional -# rules for different file extensions -#--------------------------------------------------------------------------------- -ifneq ($(BUILD),$(notdir $(CURDIR))) -#--------------------------------------------------------------------------------- - -export OUTPUT := $(CURDIR)/$(TARGET) -export TOPDIR := $(CURDIR) - -export VPATH := $(foreach dir,$(SOURCES),$(CURDIR)/$(dir)) \ - $(foreach dir,$(DATA),$(CURDIR)/$(dir)) \ - $(AMS)/exosphere/program/rebootstub - -export DEPSDIR := $(CURDIR)/$(BUILD) - -CFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.c))) -CPPFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.cpp))) -SFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.s))) -BINFILES := $(foreach dir,$(DATA),$(notdir $(wildcard $(dir)/*.*))) rebootstub.bin - -#--------------------------------------------------------------------------------- -# use CXX for linking C++ projects, CC for standard C -#--------------------------------------------------------------------------------- -ifeq ($(strip $(CPPFILES)),) -#--------------------------------------------------------------------------------- - export LD := $(CC) -#--------------------------------------------------------------------------------- -else -#--------------------------------------------------------------------------------- - export LD := $(CXX) -#--------------------------------------------------------------------------------- -endif -#--------------------------------------------------------------------------------- - -export OFILES_BIN := $(addsuffix .o,$(BINFILES)) -export OFILES_SRC := $(CPPFILES:.cpp=.o) $(CFILES:.c=.o) $(SFILES:.s=.o) -export OFILES := $(OFILES_BIN) $(OFILES_SRC) -export HFILES_BIN := $(addsuffix .h,$(subst .,_,$(BINFILES))) - -export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \ - $(foreach dir,$(LIBDIRS),-I$(dir)/include) \ - -I$(CURDIR)/$(BUILD) - -export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib) - -.PHONY: $(BUILD) clean all check_rebootstub - -#--------------------------------------------------------------------------------- -all: check_rebootstub $(BUILD) - -check_rebootstub: - @$(MAKE) -C $(AMS)/exosphere/program/rebootstub all - -$(BUILD): check_rebootstub - @[ -d $@ ] || mkdir -p $@ - @$(MAKE) --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile - -#--------------------------------------------------------------------------------- -clean: - @echo clean ... - @$(MAKE) -C $(AMS)/exosphere/program/rebootstub clean - @rm -fr $(BUILD) $(TARGET).bin $(TARGET).elf - - -#--------------------------------------------------------------------------------- -else -.PHONY: all - -DEPENDS := $(OFILES:.o=.d) - -#--------------------------------------------------------------------------------- -# main targets -#--------------------------------------------------------------------------------- -all : $(OUTPUT).lz4 - -$(OUTPUT).lz4 : $(OUTPUT).bin - @python ../lz4_compress.py $(OUTPUT).bin $(OUTPUT).lz4 - @echo built ... $(notdir $@) - -$(OUTPUT).bin : $(OUTPUT).elf - $(OBJCOPY) -S -O binary $< $@ - @echo built ... $(notdir $@) - -$(OUTPUT).elf : $(OFILES) - -%.elf: $(OFILES) - @echo linking $(notdir $@) - @$(LD) $(LDFLAGS) $(OFILES) $(LIBPATHS) $(LIBS) -o $@ - @$(NM) -CSn $@ > $(notdir $*.lst) - -$(OFILES_SRC) : $(HFILES_BIN) - -#--------------------------------------------------------------------------------- -# you need a rule like this for each extension you use as binary data -#--------------------------------------------------------------------------------- -%.bin.o %_bin.h: %.bin -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(bin2o) - --include $(DEPENDS) - -#--------------------------------------------------------------------------------------- -endif -#--------------------------------------------------------------------------------------- diff --git a/fusee/fusee-primary/fusee-primary-main/linker.ld b/fusee/fusee-primary/fusee-primary-main/linker.ld deleted file mode 100644 index 7727c4656..000000000 --- a/fusee/fusee-primary/fusee-primary-main/linker.ld +++ /dev/null @@ -1,198 +0,0 @@ -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) - -PHDRS -{ - crt0 PT_LOAD; - chainloader PT_LOAD; - main PT_LOAD; -} - -/* Mostly copied from https://github.com/devkitPro/buildscripts/blob/master/dkarm-eabi/crtls/3dsx.ld */ -MEMORY -{ - NULL : ORIGIN = 0x00000000, LENGTH = 0x1000 - main : ORIGIN = 0x40008000, LENGTH = 0x38000 - low_iram : ORIGIN = 0x40000000, LENGTH = 0x6000 -} - -SECTIONS -{ - PROVIDE(__start__ = 0x40008000); - PROVIDE(__stack_top__ = 0x40008000); - PROVIDE(__stack_bottom__ = 0x40006000); - PROVIDE(__heap_start__ = 0); - PROVIDE(__heap_end__ = 0); - - . = __start__; - - .crt0 : - { - KEEP( *(.text.start) ) - KEEP( *(.init) ) - . = ALIGN(32); - PROVIDE (__reboot_start__ = ABSOLUTE(.)); - KEEP( *(.reboot*) ) - . = ALIGN(4); - PROVIDE (__reboot_end__ = ABSOLUTE(.)); - . = ALIGN(32); - } >main :crt0 - - .chainloader_loadable : - { - . = ALIGN(32); - PROVIDE (__chainloader_start__ = ABSOLUTE(.)); - PROVIDE (__chainloader_lma__ = LOADADDR(.chainloader_loadable)); - KEEP(*(.chainloader.text.start)) - chainloader.o(.text*) - chainloader.o(.rodata*) - chainloader.o(.data*) - . = ALIGN(32); - } >low_iram AT>main :chainloader - - .chainloader_bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__chainloader_bss_start__ = ABSOLUTE(.)); - chainloader.o(.bss* COMMON) - . = ALIGN(32); - PROVIDE (__chainloader_end__ = ABSOLUTE(.)); - } >low_iram :NONE - - .text : - { - . = ALIGN(32); - /* .text */ - *(.text.reboot_to_self) - *(.text) - *(.text.*) - *(.glue_7) - *(.glue_7t) - *(.stub) - *(.gnu.warning) - *(.gnu.linkonce.t*) - - /* .fini */ - KEEP( *(.fini) ) - . = ALIGN(8); - } >main :main - - .rodata : - { - *(.rodata) - *(.roda) - *(.rodata.*) - *all.rodata*(*) - *(.gnu.linkonce.r*) - SORT(CONSTRUCTORS) - . = ALIGN(8); - } >main - - .preinit_array : - { - PROVIDE (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE (__preinit_array_end = .); - } >main - - .init_array ALIGN(4) : - { - PROVIDE (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE (__init_array_end = .); - } >main - - .fini_array ALIGN(4) : - { - PROVIDE (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE (__fini_array_end = .); - } >main - - .ctors ALIGN(4) : - { - KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */ - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .dtors ALIGN(4) : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) __exidx_start = ABSOLUTE(.);} >main - ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) __exidx_end = ABSOLUTE(.);} >main - - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - CONSTRUCTORS - . = ALIGN(32); - } >main - - .bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__bss_start__ = ABSOLUTE(.)); - *(.dynbss) - *(.bss) - *(.bss.*) - *(.gnu.linkonce.b*) - *(COMMON) - . = ALIGN(32); - PROVIDE (__bss_end__ = ABSOLUTE(.)); - } >main :NONE - __end__ = ABSOLUTE(.) ; - - /* ================== - ==== Metadata ==== - ================== */ - - /* Discard sections that difficult post-processing */ - /DISCARD/ : { *(.group .comment .note) } - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } -} diff --git a/fusee/fusee-primary/fusee-primary-main/linker.specs b/fusee/fusee-primary/fusee-primary-main/linker.specs deleted file mode 100644 index 300990418..000000000 --- a/fusee/fusee-primary/fusee-primary-main/linker.specs +++ /dev/null @@ -1,7 +0,0 @@ -%rename link old_link - -*link: -%(old_link) -T %:getenv(TOPDIR /linker.ld) --nmagic --gc-sections - -*startfile: -crti%O%s crtbegin%O%s diff --git a/fusee/fusee-primary/fusee-primary-main/lz4_compress.py b/fusee/fusee-primary/fusee-primary-main/lz4_compress.py deleted file mode 100644 index 2bf17a64d..000000000 --- a/fusee/fusee-primary/fusee-primary-main/lz4_compress.py +++ /dev/null @@ -1,23 +0,0 @@ -#!/usr/bin/env python -import sys, lz4 -from struct import unpack as up - -def lz4_compress(data): - try: - import lz4.block as block - except ImportError: - block = lz4.LZ4_compress - return block.compress(data, 'high_compression', store_size=False) - -def main(argc, argv): - if argc != 3: - print('Usage: %s in out' % argv[0]) - return 1 - with open(argv[1], 'rb') as f: - data = f.read() - with open(argv[2], 'wb') as f: - f.write(lz4_compress(data)) - return 0 - -if __name__ == '__main__': - sys.exit(main(len(sys.argv), sys.argv)) diff --git a/fusee/fusee-primary/fusee-primary-main/src/apb_misc.h b/fusee/fusee-primary/fusee-primary-main/src/apb_misc.h deleted file mode 100644 index 3cac3c5f8..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/apb_misc.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_APB_MISC_H -#define FUSEE_APB_MISC_H - -#include - -#define APB_MISC_BASE 0x70000000 -#define APB_PADCTL_BASE 0x70000810 -#define MAKE_APB_MISC_REG(n) MAKE_REG32(APB_MISC_BASE + n) -#define MAKE_APB_PADCTL_REG(n) MAKE_REG32(APB_PADCTL_BASE + n) - -#define APB_MISC_PP_PINMUX_GLOBAL_0 MAKE_APB_MISC_REG(0x40) -#define APB_MISC_GP_DSI_PAD_CONTROL_0 MAKE_APB_MISC_REG(0xAC0) -#define APB_MISC_GP_WIFI_EN_CFGPADCTRL_0 MAKE_APB_MISC_REG(0xB64) -#define APB_MISC_GP_WIFI_RST_CFGPADCTRL_0 MAKE_APB_MISC_REG(0xB68) - -#define SDMMC1_PAD_CAL_DRVUP_SHIFT (20) -#define SDMMC1_PAD_CAL_DRVDN_SHIFT (12) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_SHIFT (28) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_SHIFT (30) -#define SDMMC1_PAD_CAL_DRVUP_MASK (0x7Fu << SDMMC1_PAD_CAL_DRVUP_SHIFT) -#define SDMMC1_PAD_CAL_DRVDN_MASK (0x7Fu << SDMMC1_PAD_CAL_DRVDN_SHIFT) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_MASK (0x03u << SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_SHIFT) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_MASK (0x03u << SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_SHIFT) - -#define EMMC2_PAD_DRVUP_COMP_SHIFT (8) -#define EMMC2_PAD_DRVDN_COMP_SHIFT (2) -#define EMMC2_PAD_DRVUP_COMP_MASK (0x3Fu << EMMC2_PAD_DRVUP_COMP_SHIFT) -#define EMMC2_PAD_DRVDN_COMP_MASK (0x3Fu << EMMC2_PAD_DRVDN_COMP_SHIFT) - -#define SDMMC2_PAD_CAL_DRVUP_SHIFT (20) -#define SDMMC2_PAD_CAL_DRVDN_SHIFT (12) -#define SDMMC2_PAD_CAL_DRVUP_MASK (0x7Fu << SDMMC2_PAD_CAL_DRVUP_SHIFT) -#define SDMMC2_PAD_CAL_DRVDN_MASK (0x7Fu << SDMMC2_PAD_CAL_DRVDN_SHIFT) - -#define EMMC4_PAD_DRVUP_COMP_SHIFT (8) -#define EMMC4_PAD_DRVDN_COMP_SHIFT (2) -#define EMMC4_PAD_DRVUP_COMP_MASK (0x3Fu << EMMC4_PAD_DRVUP_COMP_SHIFT) -#define EMMC4_PAD_DRVDN_COMP_MASK (0x3Fu << EMMC4_PAD_DRVDN_COMP_SHIFT) - -#define PADCTL_SDMMC1_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC3_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC2_ENABLE_DATA_IN (0xFF << 8) -#define PADCTL_SDMMC2_ENABLE_CLK_IN (0x3 << 4) -#define PADCTL_SDMMC2_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC4_ENABLE_DATA_IN (0xFF << 8) -#define PADCTL_SDMMC4_ENABLE_CLK_IN (0x3 << 4) -#define PADCTL_SDMMC4_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC1_CD_SOURCE (1 << 0) -#define PADCTL_SDMMC1_WP_SOURCE (1 << 1) -#define PADCTL_SDMMC3_CD_SOURCE (1 << 2) -#define PADCTL_SDMMC3_WP_SOURCE (1 << 3) - -typedef struct { - uint32_t asdbgreg; /* 0x810 */ - uint32_t _0x814[0x31]; - uint32_t sdmmc1_clk_lpbk_control; /* 0x8D4 */ - uint32_t sdmmc3_clk_lpbk_control; /* 0x8D8 */ - uint32_t emmc2_pad_cfg_control; /* 0x8DC */ - uint32_t emmc4_pad_cfg_control; /* 0x8E0 */ - uint32_t _0x8E4[0x6E]; - uint32_t sdmmc1_pad_cfgpadctrl; /* 0xA98 */ - uint32_t emmc2_pad_cfgpadctrl; /* 0xA9C */ - uint32_t emmc2_pad_drv_type_cfgpadctrl; /* 0xAA0 */ - uint32_t emmc2_pad_pupd_cfgpadctrl; /* 0xAA4 */ - uint32_t _0xAA8[0x03]; - uint32_t sdmmc3_pad_cfgpadctrl; /* 0xAB0 */ - uint32_t emmc4_pad_cfgpadctrl; /* 0xAB4 */ - uint32_t emmc4_pad_drv_type_cfgpadctrl; /* 0xAB8 */ - uint32_t emmc4_pad_pupd_cfgpadctrl; /* 0xABC */ - uint32_t _0xAC0[0x2E]; - uint32_t vgpio_gpio_mux_sel; /* 0xB74 */ - uint32_t qspi_sck_lpbk_control; /* 0xB78 */ -} tegra_padctl_t; - -static inline volatile tegra_padctl_t *padctl_get_regs(void) -{ - return (volatile tegra_padctl_t *)APB_PADCTL_BASE; -} - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/btn.c b/fusee/fusee-primary/fusee-primary-main/src/btn.c deleted file mode 100644 index c157aab52..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/btn.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "btn.h" -#include "i2c.h" -#include "gpio.h" -#include "timers.h" - -uint32_t btn_read() -{ - uint32_t res = 0; - - if (!gpio_read(GPIO_BUTTON_VOL_DOWN)) - res |= BTN_VOL_DOWN; - - if (!gpio_read(GPIO_BUTTON_VOL_UP)) - res |= BTN_VOL_UP; - - uint32_t val = 0; - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, 0x15, &val, 1)) - { - if (val & 0x4) - res |= BTN_POWER; - } - - return res; -} - -uint32_t btn_wait() -{ - uint32_t res = 0, btn = btn_read(); - int pwr = 0; - - if (btn & BTN_POWER) - { - pwr = 1; - btn &= ~BTN_POWER; - } - - do - { - res = btn_read(); - - if (!(res & BTN_POWER) && pwr) - pwr = 0; - else if (pwr) - res &= ~BTN_POWER; - } while (btn == res); - - return res; -} - -uint32_t btn_wait_timeout(uint32_t time_ms, uint32_t mask) -{ - uint32_t timeout = get_time_ms() + time_ms; - uint32_t res = btn_read() & mask; - - do - { - if (!(res & mask)) - res = btn_read() & mask; - } while (get_time_ms() < timeout); - - return res; -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/btn.h b/fusee/fusee-primary/fusee-primary-main/src/btn.h deleted file mode 100644 index a9a018eae..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/btn.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_BTN_H_ -#define FUSEE_BTN_H_ - -#define BTN_POWER 0x1 -#define BTN_VOL_DOWN 0x2 -#define BTN_VOL_UP 0x4 - -uint32_t btn_read(); -uint32_t btn_wait(); -uint32_t btn_wait_timeout(uint32_t time_ms, uint32_t mask); - -#endif \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/car.c b/fusee/fusee-primary/fusee-primary-main/src/car.c deleted file mode 100644 index 30c2d86aa..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/car.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "car.h" -#include "timers.h" -#include "utils.h" - -static inline uint32_t get_clk_source_reg(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0x178; - case CARDEVICE_UARTB: return 0x17C; - case CARDEVICE_UARTC: return 0x1A0; - case CARDEVICE_I2C1: return 0x124; - case CARDEVICE_I2C5: return 0x128; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0x42C; - case CARDEVICE_HOST1X: return 0x180; - case CARDEVICE_TSEC: return 0x1F4; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 0x410; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 0x1D4; - case CARDEVICE_MSELECT: return 0x3B4; - case CARDEVICE_ACTMON: return 0x3E8; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static inline uint32_t get_clk_source_val(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0; - case CARDEVICE_UARTB: return 0; - case CARDEVICE_UARTC: return 0; - case CARDEVICE_I2C1: return 6; - case CARDEVICE_I2C5: return 6; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0; - case CARDEVICE_HOST1X: return 4; - case CARDEVICE_TSEC: return 0; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 0; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 0; - case CARDEVICE_MSELECT: return 0; - case CARDEVICE_ACTMON: return 6; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static inline uint32_t get_clk_source_div(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0; - case CARDEVICE_UARTB: return 0; - case CARDEVICE_UARTC: return 0; - case CARDEVICE_I2C1: return 0; - case CARDEVICE_I2C5: return 0; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0; - case CARDEVICE_HOST1X: return 3; - case CARDEVICE_TSEC: return 2; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 2; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 4; - case CARDEVICE_MSELECT: return 6; - case CARDEVICE_ACTMON: return 0; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298}; -static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4}; - -void clk_enable(CarDevice dev) { - uint32_t clk_source_reg; - if ((clk_source_reg = get_clk_source_reg(dev))) { - MAKE_CAR_REG(clk_source_reg) = (get_clk_source_val(dev) << 29) | get_clk_source_div(dev); - } - MAKE_CAR_REG(g_clk_reg_offsets[dev >> 5]) |= BIT(dev & 0x1F); -} - -void clk_disable(CarDevice dev) { - MAKE_CAR_REG(g_clk_reg_offsets[dev >> 5]) &= ~(BIT(dev & 0x1F)); -} - -void rst_enable(CarDevice dev) { - MAKE_CAR_REG(g_rst_reg_offsets[dev >> 5]) |= BIT(dev & 0x1F); -} - -void rst_disable(CarDevice dev) { - MAKE_CAR_REG(g_rst_reg_offsets[dev >> 5]) &= ~(BIT(dev & 0x1F)); -} - -void clkrst_enable(CarDevice dev) { - clk_enable(dev); - rst_disable(dev); -} - -void clkrst_disable(CarDevice dev) { - rst_enable(dev); - clk_disable(dev); -} - -void clkrst_reboot(CarDevice dev) { - clkrst_disable(dev); - if (dev == CARDEVICE_KFUSE) { - /* Workaround for KFUSE clock. */ - clk_enable(dev); - udelay(100); - rst_disable(dev); - udelay(200); - } else { - clkrst_enable(dev); - } -} - -void clkrst_enable_fuse_regs(bool enable) { - volatile tegra_car_t *car = car_get_regs(); - car->misc_clk_enb = ((car->misc_clk_enb & 0xEFFFFFFF) | ((enable & 1) << 28)); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/car.h b/fusee/fusee-primary/fusee-primary-main/src/car.h deleted file mode 100644 index 97dc3f792..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/car.h +++ /dev/null @@ -1,510 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CAR_H -#define FUSEE_CAR_H - -#include -#include - -#define CAR_BASE 0x60006000 -#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n) - -#define CLK_L_SDMMC1 (1 << 14) -#define CLK_L_SDMMC2 (1 << 9) -#define CLK_U_SDMMC3 (1 << 5) -#define CLK_L_SDMMC4 (1 << 15) - -#define CLK_SOURCE_MASK (0b111 << 29) -#define CLK_SOURCE_FIRST (0b000 << 29) -#define CLK_DIVIDER_MASK (0xff << 0) -#define CLK_DIVIDER_UNITY (0x00 << 0) - -#define NUM_CAR_BANKS 7 - -/* Clock and reset devices. */ -typedef enum { - CARDEVICE_BPMP = ((0 << 5) | 0x1), - CARDEVICE_UARTA = ((0 << 5) | 0x6), - CARDEVICE_UARTB = ((0 << 5) | 0x7), - CARDEVICE_I2C1 = ((0 << 5) | 0xC), - CARDEVICE_USBD = ((0 << 5) | 0x16), - CARDEVICE_HOST1X = ((0 << 5) | 0x1C), - CARDEVICE_AHBDMA = ((1 << 5) | 0x1), - CARDEVICE_APBDMA = ((1 << 5) | 0x2), - CARDEVICE_KFUSE = ((1 << 5) | 0x8), - CARDEVICE_I2C5 = ((1 << 5) | 0xF), - CARDEVICE_UARTC = ((1 << 5) | 0x17), - CARDEVICE_USB2 = ((1 << 5) | 0x1A), - CARDEVICE_CORESIGHT = ((2 << 5) | 0x9), - CARDEVICE_TSEC = ((2 << 5) | 0x13), - CARDEVICE_MSELECT = ((3 << 5) | 0x8), - CARDEVICE_ACTMON = ((3 << 5) | 0x17), - CARDEVICE_TZRAM = ((3 << 5) | 0x1E), - CARDEVICE_SE = ((3 << 5) | 0x1F), - CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B), - CARDEVICE_SOR0 = ((5 << 5) | 0x16), - CARDEVICE_SOR1 = ((5 << 5) | 0x17), - CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E), -} CarDevice; - -/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ -typedef struct { - uint32_t rst_src; /* _RST_SOURCE_0, 0x00 */ - - /* _RST_DEVICES_L/H/U_0 0x4-0xc */ - uint32_t rst_dev_l; - uint32_t rst_dev_h; - uint32_t rst_dev_u; - - /* _CLK_OUT_ENB_L/H/U_0 0x10-0x18 */ - uint32_t clk_out_enb_l; - uint32_t clk_out_enb_h; - uint32_t clk_out_enb_u; - - uint32_t _0x1C; - uint32_t cclk_brst_pol; /* _CCLK_BURST_POLICY_0, 0x20 */ - uint32_t super_cclk_div; /* _SUPER_CCLK_DIVIDER_0, 0x24 */ - uint32_t sclk_brst_pol; /* _SCLK_BURST_POLICY_0, 0x28 */ - uint32_t super_sclk_div; /* _SUPER_SCLK_DIVIDER_0, 0x2c */ - uint32_t clk_sys_rate; /* _CLK_SYSTEM_RATE_0, 0x30 */ - uint32_t prog_dly_clk; /* _PROG_DLY_CLK_0, 0x34 */ - uint32_t aud_sync_clk_rate; /* _AUDIO_SYNC_CLK_RATE_0, 0x38 */ - uint32_t _0x3C; - uint32_t cop_clk_skip_plcy; /* _COP_CLK_SKIP_POLICY_0, 0x40 */ - uint32_t clk_mask_arm; /* _CLK_MASK_ARM_0, 0x44 */ - uint32_t misc_clk_enb; /* _MISC_CLK_ENB_0, 0x48 */ - uint32_t clk_cpu_cmplx; /* _CLK_CPU_CMPLX_0, 0x4c */ - uint32_t osc_ctrl; /* _OSC_CTRL_0, 0x50 */ - uint32_t pll_lfsr; /* _PLL_LFSR_0, 0x54 */ - uint32_t osc_freq_det; /* _OSC_FREQ_DET_0, 0x58 */ - uint32_t osc_freq_det_stat; /* _OSC_FREQ_DET_STATUS_0, 0x5c */ - uint32_t _0x60[2]; - uint32_t plle_ss_cntl; /* _PLLE_SS_CNTL_0, 0x68 */ - uint32_t plle_misc1; /* _PLLE_MISC1_0, 0x6c */ - uint32_t _0x70[4]; - - /* PLLC 0x80-0x8c */ - uint32_t pllc_base; - uint32_t pllc_out; - uint32_t pllc_misc0; - uint32_t pllc_misc1; - - /* PLLM 0x90-0x9c */ - uint32_t pllm_base; - uint32_t pllm_out; - uint32_t pllm_misc1; - uint32_t pllm_misc2; - - /* PLLP 0xa0-0xac */ - uint32_t pllp_base; - uint32_t pllp_outa; - uint32_t pllp_outb; - uint32_t pllp_misc; - - /* PLLA 0xb0-0xbc */ - uint32_t plla_base; - uint32_t plla_out; - uint32_t plla_misc0; - uint32_t plla_misc1; - - /* PLLU 0xc0-0xcc */ - uint32_t pllu_base; - uint32_t pllu_out; - uint32_t pllu_misc1; - uint32_t pllu_misc2; - - /* PLLD 0xd0-0xdc */ - uint32_t plld_base; - uint32_t plld_out; - uint32_t plld_misc1; - uint32_t plld_misc2; - - /* PLLX 0xe0-0xe4 */ - uint32_t pllx_base; - uint32_t pllx_misc; - - /* PLLE 0xe8-0xf4 */ - uint32_t plle_base; - uint32_t plle_misc; - uint32_t plle_ss_cntl1; - uint32_t plle_ss_cntl2; - - uint32_t lvl2_clk_gate_ovra; /* _LVL2_CLK_GATE_OVRA_0, 0xf8 */ - uint32_t lvl2_clk_gate_ovrb; /* _LVL2_CLK_GATE_OVRB_0, 0xfc */ - - uint32_t clk_source_i2s2; /* _CLK_SOURCE_I2S2_0, 0x100 */ - uint32_t clk_source_i2s3; /* _CLK_SOURCE_I2S3_0, 0x104 */ - uint32_t clk_source_spdif_out; /* _CLK_SOURCE_SPDIF_OUT_0, 0x108 */ - uint32_t clk_source_spdif_in; /* _CLK_SOURCE_SPDIF_IN_0, 0x10c */ - uint32_t clk_source_pwm; /* _CLK_SOURCE_PWM_0, 0x110 */ - uint32_t _0x114; - uint32_t clk_source_spi2; /* _CLK_SOURCE_SPI2_0, 0x118 */ - uint32_t clk_source_spi3; /* _CLK_SOURCE_SPI3_0, 0x11c */ - uint32_t _0x120; - uint32_t clk_source_i2c1; /* _CLK_SOURCE_I2C1_0, 0x124 */ - uint32_t clk_source_i2c5; /* _CLK_SOURCE_I2C5_0, 0x128 */ - uint32_t _0x12c[2]; - uint32_t clk_source_spi1; /* _CLK_SOURCE_SPI1_0, 0x134 */ - uint32_t clk_source_disp1; /* _CLK_SOURCE_DISP1_0, 0x138 */ - uint32_t clk_source_disp2; /* _CLK_SOURCE_DISP2_0, 0x13c */ - uint32_t _0x140; - uint32_t clk_source_isp; /* _CLK_SOURCE_ISP_0, 0x144 */ - uint32_t clk_source_vi; /* _CLK_SOURCE_VI_0, 0x148 */ - uint32_t _0x14c; - uint32_t clk_source_sdmmc1; /* _CLK_SOURCE_SDMMC1_0, 0x150 */ - uint32_t clk_source_sdmmc2; /* _CLK_SOURCE_SDMMC2_0, 0x154 */ - uint32_t _0x158[3]; - uint32_t clk_source_sdmmc4; /* _CLK_SOURCE_SDMMC4_0, 0x164 */ - uint32_t _0x168[4]; - uint32_t clk_source_uarta; /* _CLK_SOURCE_UARTA_0, 0x178 */ - uint32_t clk_source_uartb; /* _CLK_SOURCE_UARTB_0, 0x17c */ - uint32_t clk_source_host1x; /* _CLK_SOURCE_HOST1X_0, 0x180 */ - uint32_t _0x184[5]; - uint32_t clk_source_i2c2; /* _CLK_SOURCE_I2C2_0, 0x198 */ - uint32_t clk_source_emc; /* _CLK_SOURCE_EMC_0, 0x19c */ - uint32_t clk_source_uartc; /* _CLK_SOURCE_UARTC_0, 0x1a0 */ - uint32_t _0x1a4; - uint32_t clk_source_vi_sensor; /* _CLK_SOURCE_VI_SENSOR_0, 0x1a8 */ - uint32_t _0x1ac[2]; - uint32_t clk_source_spi4; /* _CLK_SOURCE_SPI4_0, 0x1b4 */ - uint32_t clk_source_i2c3; /* _CLK_SOURCE_I2C3_0, 0x1b8 */ - uint32_t clk_source_sdmmc3; /* _CLK_SOURCE_SDMMC3_0, 0x1bc */ - uint32_t clk_source_uartd; /* _CLK_SOURCE_UARTD_0, 0x1c0 */ - uint32_t _0x1c4[2]; - uint32_t clk_source_owr; /* _CLK_SOURCE_OWR_0, 0x1cc */ - uint32_t _0x1d0; - uint32_t clk_source_csite; /* _CLK_SOURCE_CSITE_0, 0x1d4 */ - uint32_t clk_source_i2s1; /* _CLK_SOURCE_I2S1_0, 0x1d8 */ - uint32_t clk_source_dtv; /* _CLK_SOURCE_DTV_0, 0x1dc */ - uint32_t _0x1e0[5]; - uint32_t clk_source_tsec; /* _CLK_SOURCE_TSEC_0, 0x1f4 */ - uint32_t _0x1f8; - - uint32_t clk_spare2; /* _CLK_SPARE2_0, 0x1fc */ - uint32_t _0x200[32]; - - uint32_t clk_out_enb_x; /* _CLK_OUT_ENB_X_0, 0x280 */ - uint32_t clk_enb_x_set; /* _CLK_ENB_X_SET_0, 0x284 */ - uint32_t clk_enb_x_clr; /* _CLK_ENB_X_CLR_0, 0x288 */ - - uint32_t rst_devices_x; /* _RST_DEVICES_X_0, 0x28c */ - uint32_t rst_dev_x_set; /* _RST_DEV_X_SET_0, 0x290 */ - uint32_t rst_dev_x_clr; /* _RST_DEV_X_CLR_0, 0x294 */ - - uint32_t clk_out_enb_y; /* _CLK_OUT_ENB_Y_0, 0x298 */ - uint32_t clk_enb_y_set; /* _CLK_ENB_Y_SET_0, 0x29c */ - uint32_t clk_enb_y_clr; /* _CLK_ENB_Y_CLR_0, 0x2a0 */ - - uint32_t rst_devices_y; /* _RST_DEVICES_Y_0, 0x2a4 */ - uint32_t rst_dev_y_set; /* _RST_DEV_Y_SET_0, 0x2a8 */ - uint32_t rst_dev_y_clr; /* _RST_DEV_Y_CLR_0, 0x2ac */ - - uint32_t _0x2b0[17]; - uint32_t dfll_base; /* _DFLL_BASE_0, 0x2f4 */ - uint32_t _0x2f8[2]; - - /* _RST_DEV_L/H/U_SET_0 0x300-0x314 */ - uint32_t rst_dev_l_set; - uint32_t rst_dev_l_clr; - uint32_t rst_dev_h_set; - uint32_t rst_dev_h_clr; - uint32_t rst_dev_u_set; - uint32_t rst_dev_u_clr; - - uint32_t _0x318[2]; - - /* _CLK_ENB_L/H/U_CLR_0 0x320-0x334 */ - uint32_t clk_enb_l_set; - uint32_t clk_enb_l_clr; - uint32_t clk_enb_h_set; - uint32_t clk_enb_h_clr; - uint32_t clk_enb_u_set; - uint32_t clk_enb_u_clr; - - uint32_t _0x338; - uint32_t ccplex_pg_sm_ovrd; /* _CCPLEX_PG_SM_OVRD_0, 0x33c */ - uint32_t rst_cpu_cmplx_set; /* _RST_CPU_CMPLX_SET_0, 0x340 */ - uint32_t rst_cpu_cmplx_clr; /* _RST_CPU_CMPLX_CLR_0, 0x344 */ - - /* Additional (T30) registers */ - uint32_t clk_cpu_cmplx_set; /* _CLK_CPU_CMPLX_SET_0, 0x348 */ - uint32_t clk_cpu_cmplx_clr; /* _CLK_CPU_CMPLX_SET_0, 0x34c */ - - uint32_t _0x350[2]; - uint32_t rst_dev_v; /* _RST_DEVICES_V_0, 0x358 */ - uint32_t rst_dev_w; /* _RST_DEVICES_W_0, 0x35c */ - uint32_t clk_out_enb_v; /* _CLK_OUT_ENB_V_0, 0x360 */ - uint32_t clk_out_enb_w; /* _CLK_OUT_ENB_W_0, 0x364 */ - uint32_t cclkg_brst_pol; /* _CCLKG_BURST_POLICY_0, 0x368 */ - uint32_t super_cclkg_div; /* _SUPER_CCLKG_DIVIDER_0, 0x36c */ - uint32_t cclklp_brst_pol; /* _CCLKLP_BURST_POLICY_0, 0x370 */ - uint32_t super_cclkp_div; /* _SUPER_CCLKLP_DIVIDER_0, 0x374 */ - uint32_t clk_cpug_cmplx; /* _CLK_CPUG_CMPLX_0, 0x378 */ - uint32_t clk_cpulp_cmplx; /* _CLK_CPULP_CMPLX_0, 0x37c */ - uint32_t cpu_softrst_ctrl; /* _CPU_SOFTRST_CTRL_0, 0x380 */ - uint32_t cpu_softrst_ctrl1; /* _CPU_SOFTRST_CTRL1_0, 0x384 */ - uint32_t cpu_softrst_ctrl2; /* _CPU_SOFTRST_CTRL2_0, 0x388 */ - uint32_t _0x38c[5]; - uint32_t lvl2_clk_gate_ovrc; /* _LVL2_CLK_GATE_OVRC, 0x3a0 */ - uint32_t lvl2_clk_gate_ovrd; /* _LVL2_CLK_GATE_OVRD, 0x3a4 */ - uint32_t _0x3a8[2]; - - uint32_t _0x3b0; - uint32_t clk_source_mselect; /* _CLK_SOURCE_MSELECT_0, 0x3b4 */ - uint32_t clk_source_tsensor; /* _CLK_SOURCE_TSENSOR_0, 0x3b8 */ - uint32_t clk_source_i2s4; /* _CLK_SOURCE_I2S4_0, 0x3bc */ - uint32_t clk_source_i2s5; /* _CLK_SOURCE_I2S5_0, 0x3c0 */ - uint32_t clk_source_i2c4; /* _CLK_SOURCE_I2C4_0, 0x3c4 */ - uint32_t _0x3c8[2]; - uint32_t clk_source_ahub; /* _CLK_SOURCE_AHUB_0, 0x3d0 */ - uint32_t _0x3d4[4]; - uint32_t clk_source_hda2codec_2x; /* _CLK_SOURCE_HDA2CODEC_2X_0, 0x3e4 */ - uint32_t clk_source_actmon; /* _CLK_SOURCE_ACTMON_0, 0x3e8 */ - uint32_t clk_source_extperiph1; /* _CLK_SOURCE_EXTPERIPH1_0, 0x3ec */ - uint32_t clk_source_extperiph2; /* _CLK_SOURCE_EXTPERIPH2_0, 0x3f0 */ - uint32_t clk_source_extperiph3; /* _CLK_SOURCE_EXTPERIPH3_0, 0x3f4 */ - uint32_t _0x3f8; - uint32_t clk_source_i2c_slow; /* _CLK_SOURCE_I2C_SLOW_0, 0x3fc */ - uint32_t clk_source_sys; /* _CLK_SOURCE_SYS_0, 0x400 */ - uint32_t clk_source_ispb; /* _CLK_SOURCE_ISPB_0, 0x404 */ - uint32_t _0x408[2]; - uint32_t clk_source_sor1; /* _CLK_SOURCE_SOR1_0, 0x410 */ - uint32_t clk_source_sor0; /* _CLK_SOURCE_SOR0_0, 0x414 */ - uint32_t _0x418[2]; - uint32_t clk_source_sata_oob; /* _CLK_SOURCE_SATA_OOB_0, 0x420 */ - uint32_t clk_source_sata; /* _CLK_SOURCE_SATA_0, 0x424 */ - uint32_t clk_source_hda; /* _CLK_SOURCE_HDA_0, 0x428 */ - uint32_t clk_source_se; /* _CLK_SOURCE_SE_0, 0x42c */ - - /* _RST_DEV_V/W_SET_0 0x430-0x43c */ - uint32_t rst_dev_v_set; - uint32_t rst_dev_v_clr; - uint32_t rst_dev_w_set; - uint32_t rst_dev_w_clr; - - /* _CLK_ENB_V/W_CLR_0 0x440-0x44c */ - uint32_t clk_enb_v_set; - uint32_t clk_enb_v_clr; - uint32_t clk_enb_w_set; - uint32_t clk_enb_w_clr; - - /* Additional (T114+) registers */ - uint32_t rst_cpug_cmplx_set; /* _RST_CPUG_CMPLX_SET_0, 0x450 */ - uint32_t rst_cpug_cmplx_clr; /* _RST_CPUG_CMPLX_CLR_0, 0x454 */ - uint32_t rst_cpulp_cmplx_set; /* _RST_CPULP_CMPLX_SET_0, 0x458 */ - uint32_t rst_cpulp_cmplx_clr; /* _RST_CPULP_CMPLX_CLR_0, 0x45c */ - uint32_t clk_cpug_cmplx_set; /* _CLK_CPUG_CMPLX_SET_0, 0x460 */ - uint32_t clk_cpug_cmplx_clr; /* _CLK_CPUG_CMPLX_CLR_0, 0x464 */ - uint32_t clk_cpulp_cmplx_set; /* _CLK_CPULP_CMPLX_SET_0, 0x468 */ - uint32_t clk_cpulp_cmplx_clr; /* _CLK_CPULP_CMPLX_CLR_0, 0x46c */ - uint32_t cpu_cmplx_status; /* _CPU_CMPLX_STATUS_0, 0x470 */ - uint32_t _0x474; - uint32_t intstatus; /* _INTSTATUS_0, 0x478 */ - uint32_t intmask; /* _INTMASK_0, 0x47c */ - uint32_t utmip_pll_cfg0; /* _UTMIP_PLL_CFG0_0, 0x480 */ - uint32_t utmip_pll_cfg1; /* _UTMIP_PLL_CFG1_0, 0x484 */ - uint32_t utmip_pll_cfg2; /* _UTMIP_PLL_CFG2_0, 0x488 */ - - uint32_t plle_aux; /* _PLLE_AUX_0, 0x48c */ - uint32_t sata_pll_cfg0; /* _SATA_PLL_CFG0_0, 0x490 */ - uint32_t sata_pll_cfg1; /* _SATA_PLL_CFG1_0, 0x494 */ - uint32_t pcie_pll_cfg0; /* _PCIE_PLL_CFG0_0, 0x498 */ - - uint32_t prog_audio_dly_clk; /* _PROG_AUDIO_DLY_CLK_0, 0x49c */ - uint32_t audio_sync_clk_i2s0; /* _AUDIO_SYNC_CLK_I2S0_0, 0x4a0 */ - uint32_t audio_sync_clk_i2s1; /* _AUDIO_SYNC_CLK_I2S1_0, 0x4a4 */ - uint32_t audio_sync_clk_i2s2; /* _AUDIO_SYNC_CLK_I2S2_0, 0x4a8 */ - uint32_t audio_sync_clk_i2s3; /* _AUDIO_SYNC_CLK_I2S3_0, 0x4ac */ - uint32_t audio_sync_clk_i2s4; /* _AUDIO_SYNC_CLK_I2S4_0, 0x4b0 */ - uint32_t audio_sync_clk_spdif; /* _AUDIO_SYNC_CLK_SPDIF_0, 0x4b4 */ - - uint32_t plld2_base; /* _PLLD2_BASE_0, 0x4b8 */ - uint32_t plld2_misc; /* _PLLD2_MISC_0, 0x4bc */ - uint32_t utmip_pll_cfg3; /* _UTMIP_PLL_CFG3_0, 0x4c0 */ - uint32_t pllrefe_base; /* _PLLREFE_BASE_0, 0x4c4 */ - uint32_t pllrefe_misc; /* _PLLREFE_MISC_0, 0x4c8 */ - uint32_t pllrefe_out; /* _PLLREFE_OUT_0, 0x4cc */ - uint32_t cpu_finetrim_byp; /* _CPU_FINETRIM_BYP_0, 0x4d0 */ - uint32_t cpu_finetrim_select; /* _CPU_FINETRIM_SELECT_0, 0x4d4 */ - uint32_t cpu_finetrim_dr; /* _CPU_FINETRIM_DR_0, 0x4d8 */ - uint32_t cpu_finetrim_df; /* _CPU_FINETRIM_DF_0, 0x4dc */ - uint32_t cpu_finetrim_f; /* _CPU_FINETRIM_F_0, 0x4e0 */ - uint32_t cpu_finetrim_r; /* _CPU_FINETRIM_R_0, 0x4e4 */ - uint32_t pllc2_base; /* _PLLC2_BASE_0, 0x4e8 */ - uint32_t pllc2_misc0; /* _PLLC2_MISC_0_0, 0x4ec */ - uint32_t pllc2_misc1; /* _PLLC2_MISC_1_0, 0x4f0 */ - uint32_t pllc2_misc2; /* _PLLC2_MISC_2_0, 0x4f4 */ - uint32_t pllc2_misc3; /* _PLLC2_MISC_3_0, 0x4f8 */ - uint32_t pllc3_base; /* _PLLC3_BASE_0, 0x4fc */ - uint32_t pllc3_misc0; /* _PLLC3_MISC_0_0, 0x500 */ - uint32_t pllc3_misc1; /* _PLLC3_MISC_1_0, 0x504 */ - uint32_t pllc3_misc2; /* _PLLC3_MISC_2_0, 0x508 */ - uint32_t pllc3_misc3; /* _PLLC3_MISC_3_0, 0x50c */ - uint32_t pllx_misc1; /* _PLLX_MISC_1_0, 0x510 */ - uint32_t pllx_misc2; /* _PLLX_MISC_2_0, 0x514 */ - uint32_t pllx_misc3; /* _PLLX_MISC_3_0, 0x518 */ - uint32_t xusbio_pll_cfg0; /* _XUSBIO_PLL_CFG0_0, 0x51c */ - uint32_t xusbio_pll_cfg1; /* _XUSBIO_PLL_CFG0_1, 0x520 */ - uint32_t plle_aux1; /* _PLLE_AUX1_0, 0x524 */ - uint32_t pllp_reshift; /* _PLLP_RESHIFT_0, 0x528 */ - uint32_t utmipll_hw_pwrdn_cfg0; /* _UTMIPLL_HW_PWRDN_CFG0_0, 0x52c */ - uint32_t pllu_hw_pwrdn_cfg0; /* _PLLU_HW_PWRDN_CFG0_0, 0x530 */ - uint32_t xusb_pll_cfg0; /* _XUSB_PLL_CFG0_0, 0x534 */ - uint32_t _0x538; - uint32_t clk_cpu_misc; /* _CLK_CPU_MISC_0, 0x53c */ - uint32_t clk_cpug_misc; /* _CLK_CPUG_MISC_0, 0x540 */ - uint32_t clk_cpulp_misc; /* _CLK_CPULP_MISC_0, 0x544 */ - uint32_t pllx_hw_ctrl_cfg; /* _PLLX_HW_CTRL_CFG_0, 0x548 */ - uint32_t pllx_sw_ramp_cfg; /* _PLLX_SW_RAMP_CFG_0, 0x54c */ - uint32_t pllx_hw_ctrl_status; /* _PLLX_HW_CTRL_STATUS_0, 0x550 */ - uint32_t lvl2_clk_gate_ovre; /* _LVL2_CLK_GATE_OVRE, 0x554 */ - uint32_t super_gr3d_clk_div; /* _SUPER_GR3D_CLK_DIVIDER_0, 0x558 */ - uint32_t spare_reg0; /* _SPARE_REG0_0, 0x55c */ - uint32_t audio_sync_clk_dmic1; /* _AUDIO_SYNC_CLK_DMIC1_0, 0x560 */ - uint32_t audio_sync_clk_dmic2; /* _AUDIO_SYNC_CLK_DMIC2_0, 0x564 */ - - uint32_t _0x568[2]; - uint32_t plld2_ss_cfg; /* _PLLD2_SS_CFG, 0x570 */ - uint32_t plld2_ss_ctrl1; /* _PLLD2_SS_CTRL1_0, 0x574 */ - uint32_t plld2_ss_ctrl2; /* _PLLD2_SS_CTRL2_0, 0x578 */ - uint32_t _0x57c[5]; - - uint32_t plldp_base; /* _PLLDP_BASE, 0x590*/ - uint32_t plldp_misc; /* _PLLDP_MISC, 0x594 */ - uint32_t plldp_ss_cfg; /* _PLLDP_SS_CFG, 0x598 */ - uint32_t plldp_ss_ctrl1; /* _PLLDP_SS_CTRL1_0, 0x59c */ - uint32_t plldp_ss_ctrl2; /* _PLLDP_SS_CTRL2_0, 0x5a0 */ - uint32_t pllc4_base; /* _PLLC4_BASE_0, 0x5a4 */ - uint32_t pllc4_misc; /* _PLLC4_MISC_0, 0x5a8 */ - uint32_t _0x5ac[6]; - uint32_t clk_spare0; /* _CLK_SPARE0_0, 0x5c4 */ - uint32_t clk_spare1; /* _CLK_SPARE1_0, 0x5c8 */ - uint32_t gpu_isob_ctrl; /* _GPU_ISOB_CTRL_0, 0x5cc */ - uint32_t pllc_misc2; /* _PLLC_MISC_2_0, 0x5d0 */ - uint32_t pllc_misc3; /* _PLLC_MISC_3_0, 0x5d4 */ - uint32_t plla_misc2; /* _PLLA_MISC2_0, 0x5d8 */ - uint32_t _0x5dc[2]; - uint32_t pllc4_out; /* _PLLC4_OUT_0, 0x5e4 */ - uint32_t pllmb_base; /* _PLLMB_BASE_0, 0x5e8 */ - uint32_t pllmb_misc1; /* _PLLMB_MISC1_0, 0x5ec */ - uint32_t pllx_misc4; /* _PLLX_MISC_4_0, 0x5f0 */ - uint32_t pllx_misc5; /* _PLLX_MISC_5_0, 0x5f4 */ - uint32_t _0x5f8[2]; - - uint32_t clk_source_xusb_core_host; /* _CLK_SOURCE_XUSB_CORE_HOST_0, 0x600 */ - uint32_t clk_source_xusb_falcon; /* _CLK_SOURCE_XUSB_FALCON_0, 0x604 */ - uint32_t clk_source_xusb_fs; /* _CLK_SOURCE_XUSB_FS_0, 0x608 */ - uint32_t clk_source_xusb_core_dev; /* _CLK_SOURCE_XUSB_CORE_DEV_0, 0x60c */ - uint32_t clk_source_xusb_ss; /* _CLK_SOURCE_XUSB_SS_0, 0x610 */ - uint32_t clk_source_cilab; /* _CLK_SOURCE_CILAB_0, 0x614 */ - uint32_t clk_source_cilcd; /* _CLK_SOURCE_CILCD_0, 0x618 */ - uint32_t clk_source_cilef; /* _CLK_SOURCE_CILEF_0, 0x61c */ - uint32_t clk_source_dsia_lp; /* _CLK_SOURCE_DSIA_LP_0, 0x620 */ - uint32_t clk_source_dsib_lp; /* _CLK_SOURCE_DSIB_LP_0, 0x624 */ - uint32_t clk_source_entropy; /* _CLK_SOURCE_ENTROPY_0, 0x628 */ - uint32_t clk_source_dvfs_ref; /* _CLK_SOURCE_DVFS_REF_0, 0x62c */ - uint32_t clk_source_dvfs_soc; /* _CLK_SOURCE_DVFS_SOC_0, 0x630 */ - uint32_t _0x634[3]; - uint32_t clk_source_emc_latency; /* _CLK_SOURCE_EMC_LATENCY_0, 0x640 */ - uint32_t clk_source_soc_therm; /* _CLK_SOURCE_SOC_THERM_0, 0x644 */ - uint32_t _0x648; - uint32_t clk_source_dmic1; /* _CLK_SOURCE_DMIC1_0, 0x64c */ - uint32_t clk_source_dmic2; /* _CLK_SOURCE_DMIC2_0, 0x650 */ - uint32_t _0x654; - uint32_t clk_source_vi_sensor2; /* _CLK_SOURCE_VI_SENSOR2_0, 0x658 */ - uint32_t clk_source_i2c6; /* _CLK_SOURCE_I2C6_0, 0x65c */ - uint32_t clk_source_mipibif; /* _CLK_SOURCE_MIPIBIF_0, 0x660 */ - uint32_t clk_source_emc_dll; /* _CLK_SOURCE_EMC_DLL_0, 0x664 */ - uint32_t _0x668; - uint32_t clk_source_uart_fst_mipi_cal; /* _CLK_SOURCE_UART_FST_MIPI_CAL_0, 0x66c */ - uint32_t _0x670[2]; - uint32_t clk_source_vic; /* _CLK_SOURCE_VIC_0, 0x678 */ - - uint32_t pllp_outc; /* _PLLP_OUTC_0, 0x67c */ - uint32_t pllp_misc1; /* _PLLP_MISC1_0, 0x680 */ - uint32_t _0x684[2]; - uint32_t emc_div_clk_shaper_ctrl; /* _EMC_DIV_CLK_SHAPER_CTRL_0, 0x68c */ - uint32_t emc_pllc_shaper_ctrl; /* _EMC_PLLC_SHAPER_CTRL_0, 0x690 */ - - uint32_t clk_source_sdmmc_legacy_tm; /* _CLK_SOURCE_SDMMC_LEGACY_TM_0, 0x694 */ - uint32_t clk_source_nvdec; /* _CLK_SOURCE_NVDEC_0, 0x698 */ - uint32_t clk_source_nvjpg; /* _CLK_SOURCE_NVJPG_0, 0x69c */ - uint32_t clk_source_nvenc; /* _CLK_SOURCE_NVENC_0, 0x6a0 */ - - uint32_t plla1_base; /* _PLLA1_BASE_0, 0x6a4 */ - uint32_t plla1_misc0; /* _PLLA1_MISC_0_0, 0x6a8 */ - uint32_t plla1_misc1; /* _PLLA1_MISC_1_0, 0x6ac */ - uint32_t plla1_misc2; /* _PLLA1_MISC_2_0, 0x6b0 */ - uint32_t plla1_misc3; /* _PLLA1_MISC_3_0, 0x6b4 */ - uint32_t audio_sync_clk_dmic3; /* _AUDIO_SYNC_CLK_DMIC3_0, 0x6b8 */ - - uint32_t clk_source_dmic3; /* _CLK_SOURCE_DMIC3_0, 0x6bc */ - uint32_t clk_source_ape; /* _CLK_SOURCE_APE_0, 0x6c0 */ - uint32_t clk_source_qspi; /* _CLK_SOURCE_QSPI_0, 0x6c4 */ - uint32_t clk_source_vi_i2c; /* _CLK_SOURCE_VI_I2C_0, 0x6c8 */ - uint32_t clk_source_usb2_hsic_trk; /* _CLK_SOURCE_USB2_HSIC_TRK_0, 0x6cc */ - uint32_t clk_source_pex_sata_usb_rx_byp; /* _CLK_SOURCE_PEX_SATA_USB_RX_BYP_0, 0x6d0 */ - uint32_t clk_source_maud; /* _CLK_SOURCE_MAUD_0, 0x6d4 */ - uint32_t clk_source_tsecb; /* _CLK_SOURCE_TSECB_0, 0x6d8 */ - - uint32_t clk_cpug_misc1; /* _CLK_CPUG_MISC1_0, 0x6dc */ - uint32_t aclk_burst_policy; /* _ACLK_BURST_POLICY_0, 0x6e0 */ - uint32_t super_aclk_divider; /* _SUPER_ACLK_DIVIDER_0, 0x6e4 */ - - uint32_t nvenc_super_clk_divider; /* _NVENC_SUPER_CLK_DIVIDER_0, 0x6e8 */ - uint32_t vi_super_clk_divider; /* _VI_SUPER_CLK_DIVIDER_0, 0x6ec */ - uint32_t vic_super_clk_divider; /* _VIC_SUPER_CLK_DIVIDER_0, 0x6f0 */ - uint32_t nvdec_super_clk_divider; /* _NVDEC_SUPER_CLK_DIVIDER_0, 0x6f4 */ - uint32_t isp_super_clk_divider; /* _ISP_SUPER_CLK_DIVIDER_0, 0x6f8 */ - uint32_t ispb_super_clk_divider; /* _ISPB_SUPER_CLK_DIVIDER_0, 0x6fc */ - uint32_t nvjpg_super_clk_divider; /* _NVJPG_SUPER_CLK_DIVIDER_0, 0x700 */ - uint32_t se_super_clk_divider; /* _SE_SUPER_CLK_DIVIDER_0, 0x704 */ - uint32_t tsec_super_clk_divider; /* _TSEC_SUPER_CLK_DIVIDER_0, 0x708 */ - uint32_t tsecb_super_clk_divider; /* _TSECB_SUPER_CLK_DIVIDER_0, 0x70c */ - - uint32_t clk_source_uartape; /* _CLK_SOURCE_UARTAPE_0, 0x710 */ - uint32_t clk_cpug_misc2; /* _CLK_CPUG_MISC2_0, 0x714 */ - uint32_t clk_source_dbgapb; /* _CLK_SOURCE_DBGAPB_0, 0x718 */ - uint32_t clk_ccplex_cc4_ret_clk_enb; /* _CLK_CCPLEX_CC4_RET_CLK_ENB_0, 0x71c */ - uint32_t actmon_cpu_clk; /* _ACTMON_CPU_CLK_0, 0x720 */ - uint32_t clk_source_emc_safe; /* _CLK_SOURCE_EMC_SAFE_0, 0x724 */ - uint32_t sdmmc2_pllc4_out0_shaper_ctrl; /* _SDMMC2_PLLC4_OUT0_SHAPER_CTRL_0, 0x728 */ - uint32_t sdmmc2_pllc4_out1_shaper_ctrl; /* _SDMMC2_PLLC4_OUT1_SHAPER_CTRL_0, 0x72c */ - uint32_t sdmmc2_pllc4_out2_shaper_ctrl; /* _SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0, 0x730 */ - uint32_t sdmmc2_div_clk_shaper_ctrl; /* _SDMMC2_DIV_CLK_SHAPER_CTRL_0, 0x734 */ - uint32_t sdmmc4_pllc4_out0_shaper_ctrl; /* _SDMMC4_PLLC4_OUT0_SHAPER_CTRL_0, 0x738 */ - uint32_t sdmmc4_pllc4_out1_shaper_ctrl; /* _SDMMC4_PLLC4_OUT1_SHAPER_CTRL_0, 0x73c */ - uint32_t sdmmc4_pllc4_out2_shaper_ctrl; /* _SDMMC4_PLLC4_OUT2_SHAPER_CTRL_0, 0x740 */ - uint32_t sdmmc4_div_clk_shaper_ctrl; /* _SDMMC4_DIV_CLK_SHAPER_CTRL_0, 0x744 */ -} tegra_car_t; - -static inline volatile tegra_car_t *car_get_regs(void) { - return (volatile tegra_car_t *)CAR_BASE; -} - -void clk_enable(CarDevice dev); -void clk_disable(CarDevice dev); -void rst_enable(CarDevice dev); -void rst_disable(CarDevice dev); - -void clkrst_enable(CarDevice dev); -void clkrst_disable(CarDevice dev); -void clkrst_reboot(CarDevice dev); - -void clkrst_enable_fuse_regs(bool enable); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/chainloader.c b/fusee/fusee-primary/fusee-primary-main/src/chainloader.c deleted file mode 100644 index aa9979982..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/chainloader.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "chainloader.h" - -int g_chainloader_argc = 0; -char g_chainloader_arg_data[CHAINLOADER_ARG_DATA_MAX_SIZE] = {0}; -chainloader_entry_t g_chainloader_entries[CHAINLOADER_MAX_ENTRIES] = {0}; /* keep them sorted */ -size_t g_chainloader_num_entries = 0; -uintptr_t g_chainloader_entrypoint = 0; - -#pragma GCC optimize (3) - -static void *xmemmove(void *dst, const void *src, size_t len) -{ - const uint8_t *src8 = (const uint8_t *)src; - uint8_t *dst8 = (uint8_t *)dst; - - if (dst8 < src8) { - for (size_t i = 0; i < len; i++) { - dst8[i] = src8[i]; - } - } else if (dst8 > src8) { - for (size_t i = len; len > 0; len--) - dst8[i - 1] = src8[i - 1]; - } - - return dst; -} - -void relocate_and_chainload_main(void) { - for(size_t i = 0; i < g_chainloader_num_entries; i++) { - chainloader_entry_t *entry = &g_chainloader_entries[i]; - xmemmove((void *)entry->load_address, (const void *)entry->src_address, entry->size); - } - - ((void (*)(int, void *))g_chainloader_entrypoint)(g_chainloader_argc, g_chainloader_arg_data); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/chainloader.h b/fusee/fusee-primary/fusee-primary-main/src/chainloader.h deleted file mode 100644 index f08bf6396..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/chainloader.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CHAINLOADER_H -#define FUSEE_CHAINLOADER_H - -#include -#include - -#define CHAINLOADER_ARG_DATA_MAX_SIZE 0x5400 -#define CHAINLOADER_MAX_ENTRIES 128 - -typedef struct chainloader_entry_t { - uintptr_t load_address; - uintptr_t src_address; - size_t size; - size_t num; -} chainloader_entry_t; - -extern int g_chainloader_argc; -extern chainloader_entry_t g_chainloader_entries[CHAINLOADER_MAX_ENTRIES]; /* keep them sorted */ -extern size_t g_chainloader_num_entries; -extern uintptr_t g_chainloader_entrypoint; - -extern char g_chainloader_arg_data[CHAINLOADER_ARG_DATA_MAX_SIZE]; - -void relocate_and_chainload(void); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/di.c b/fusee/fusee-primary/fusee-primary-main/src/di.c deleted file mode 100644 index 59cc1e44f..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/di.c +++ /dev/null @@ -1,465 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "di.h" -#include "fuse.h" -#include "timers.h" -#include "i2c.h" -#include "pmc.h" -#include "max77620.h" -#include "gpio.h" -#include "pinmux.h" -#include "car.h" -#include "apb_misc.h" - -#include "di.inl" - -static uint32_t g_lcd_vendor = 0; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static void do_dsi_sleep_or_register_writes(const dsi_sleep_or_register_write_t *writes, uint32_t num_writes) { - for (uint32_t i = 0; i < num_writes; i++) { - if (writes[i].kind == 1) { - udelay(1000 * writes[i].offset); - } else { - *(volatile uint32_t *)(DSI_BASE + sizeof(uint32_t) * writes[i].offset) = writes[i].value; - } - } -} - -static void do_register_writes(uint32_t base_address, const register_write_t *writes, uint32_t num_writes) { - for (uint32_t i = 0; i < num_writes; i++) { - *(volatile uint32_t *)(base_address + writes[i].offset) = writes[i].value; - } -} - -static void dsi_wait(uint32_t timeout, uint32_t offset, uint32_t mask, uint32_t delay) { - uint32_t end = get_time_us() + timeout; - while ((get_time_us() < end) && (MAKE_DSI_REG(offset) & mask)) { - /* Wait. */ - } - udelay(delay); -} - -void display_init(void) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - bool is_mariko = is_soc_mariko(); - uint32_t hardware_type = fuse_get_hardware_type(); - - /* Power on. */ - if (is_mariko) { - uint8_t val = 0x3A; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD2, &val, 1); - val = 0x71; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD2_CFG, &val, 1); - val = 0xD0; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_LDO0_CFG, &val, 1); - } else { - uint8_t val = 0xD0; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_LDO0_CFG, &val, 1); - } - - /* Enable MIPI CAL, DSI, DISP1, HOST1X, UART_FST_MIPI_CAL, DSIA LP clocks. */ - car->rst_dev_h_clr = 0x1010000; - car->clk_enb_h_set = 0x1010000; - car->rst_dev_l_clr = 0x18000000; - car->clk_enb_l_set = 0x18000000; - car->clk_enb_x_set = 0x20000; - car->clk_source_uart_fst_mipi_cal = 0xA; - car->clk_enb_w_set = 0x80000; - car->clk_source_dsia_lp = 0xA; - - /* DPD idle. */ - pmc->io_dpd_req = 0x40000000; - pmc->io_dpd2_req = 0x40000000; - - /* Configure pins. */ - pinmux->nfc_en &= ~PINMUX_TRISTATE; - pinmux->nfc_int &= ~PINMUX_TRISTATE; - pinmux->lcd_bl_pwm &= ~PINMUX_TRISTATE; - pinmux->lcd_bl_en &= ~PINMUX_TRISTATE; - pinmux->lcd_rst &= ~PINMUX_TRISTATE; - - if (is_mariko && (hardware_type == 5)) { - /* HardwareType_Five only configures GPIO_LCD_BL_RST. */ - gpio_configure_mode(GPIO_LCD_BL_RST, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_RST, GPIO_DIRECTION_OUTPUT); - } else { - /* Configure Backlight +-5V GPIOs. */ - gpio_configure_mode(GPIO_LCD_BL_P5V, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_N5V, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_P5V, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_N5V, GPIO_DIRECTION_OUTPUT); - - /* Enable Backlight +5V. */ - gpio_write(GPIO_LCD_BL_P5V, GPIO_LEVEL_HIGH); - - udelay(10000); - - /* Enable Backlight -5V. */ - gpio_write(GPIO_LCD_BL_N5V, GPIO_LEVEL_HIGH); - - udelay(10000); - - /* Configure Backlight PWM, EN and RST GPIOs. */ - gpio_configure_mode(GPIO_LCD_BL_PWM, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_EN, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_RST, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_PWM, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_EN, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_RST, GPIO_DIRECTION_OUTPUT); - - /* Enable Backlight EN. */ - gpio_write(GPIO_LCD_BL_EN, GPIO_LEVEL_HIGH); - } - - /* Configure display interface and display. */ - MAKE_MIPI_CAL_REG(MIPI_CAL_MIPI_BIAS_PAD_CFG2) = 0; - if (is_mariko) { - MAKE_MIPI_CAL_REG(MIPI_CAL_MIPI_BIAS_PAD_CFG0) = 0; - APB_MISC_GP_DSI_PAD_CONTROL_0 = 0; - } - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_01_mariko, 4); - } else { - do_register_writes(CAR_BASE, display_config_plld_01_erista, 4); - } - do_register_writes(DI_BASE, display_config_dc_01, 94); - do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_01_init_02_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_01_init_02_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_01_init_04_mariko, 7); - } else { - do_register_writes(DSI_BASE, display_config_dsi_01_init_04_erista, 0); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_07, 14); - - udelay(10000); - - /* Enable Backlight RST. */ - gpio_write(GPIO_LCD_BL_RST, GPIO_LEVEL_HIGH); - - udelay(60000); - - if (is_mariko && (hardware_type == 5)) { - MAKE_DSI_REG(DSI_BTA_TIMING) = 0x40103; - } else { - MAKE_DSI_REG(DSI_BTA_TIMING) = 0x50204; - } - MAKE_DSI_REG(DSI_WR_DATA) = 0x337; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - dsi_wait(250000, DSI_TRIGGER, (DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO), 5); - - MAKE_DSI_REG(DSI_WR_DATA) = 0x406; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - dsi_wait(250000, DSI_TRIGGER, (DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO), 5); - - MAKE_DSI_REG(DSI_HOST_CONTROL) = (DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_IMM_BTA | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC); - dsi_wait(150000, DSI_HOST_CONTROL, DSI_HOST_CONTROL_IMM_BTA, 5000); - - /* Parse LCD vendor. */ - uint32_t host_response[3]; - for (uint32_t i = 0; i < 3; i++) { - host_response[i] = MAKE_DSI_REG(DSI_RD_DATA); - } - - /* The last word from host response is: - Bits 0-7: FAB - Bits 8-15: REV - Bits 16-23: Minor REV - */ - if ((host_response[2] & 0xFF) == 0x10) { - g_lcd_vendor = 0; - } else { - g_lcd_vendor = (host_response[2] >> 8) & 0xFF00; - } - g_lcd_vendor = (g_lcd_vendor & 0xFFFFFF00) | (host_response[2] & 0xFF); - - /* LCD vendor specific configuration. */ - switch (g_lcd_vendor) { - case 0x10: /* Japan Display Inc screens. */ - do_dsi_sleep_or_register_writes(display_config_jdi_specific_init_01, 48); - break; - case 0xF20: /* Innolux nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_innolux_nx_abca2_specific_init_01, 14); - break; - case 0xF30: /* AUO nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abca2_specific_init_01, 14); - break; - case 0x2050: /* Unknown nx-abcd screens. */ - do_dsi_sleep_or_register_writes(display_config_50_nx_abcd_specific_init_01, 13); - break; - case 0x1020: /* Innolux nx-abcc screens. */ - case 0x1030: /* AUO nx-abcc screens. */ - case 0x1040: /* Unknown nx-abcc screens. */ - default: - do_dsi_sleep_or_register_writes(display_config_innolux_auo_40_nx_abcc_specific_init_01, 5); - break; - } - - udelay(20000); - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_02_mariko, 3); - } else { - do_register_writes(CAR_BASE, display_config_plld_02_erista, 3); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_08, 1); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_09, 19); - MAKE_DI_REG(DC_DISP_DISP_CLOCK_CONTROL) = 4; - do_register_writes(DSI_BASE, display_config_dsi_01_init_10, 10); - - udelay(10000); - - if (is_mariko) { - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_01, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_mariko, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_mariko, 7); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_mariko, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_mariko, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_mariko, 7); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_mariko, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - } else { - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_01, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_erista, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_erista, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_erista, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - } - - udelay(10000); - - do_register_writes(DI_BASE, display_config_dc_02, 113); -} - -void display_end(void) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - bool is_mariko = is_soc_mariko(); - - /* Disable Backlight. */ - display_backlight(false); - - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 1; - MAKE_DSI_REG(DSI_WR_DATA) = 0x2805; - - /* Wait 5 frames. */ - uint32_t start_val = MAKE_HOST1X_REG(0x30A4); - while (MAKE_HOST1X_REG(0x30A4) < start_val + 5) { - /* Wait. */ - } - - MAKE_DI_REG(DC_CMD_STATE_ACCESS) = (READ_MUX | WRITE_MUX); - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 0; - - do_register_writes(DI_BASE, display_config_dc_01_fini_01, 13); - udelay(40000); - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_01_mariko, 4); - } else { - do_register_writes(CAR_BASE, display_config_plld_01_erista, 4); - } - do_register_writes(DSI_BASE, display_config_dsi_01_fini_01, 2); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_fini_02, 13); - - if (g_lcd_vendor != 0x2050) { - udelay(10000); - } - - /* LCD vendor specific shutdown. */ - switch (g_lcd_vendor) { - case 0x10: /* Japan Display Inc screens. */ - do_dsi_sleep_or_register_writes(display_config_jdi_specific_fini_01, 22); - break; - case 0xF30: /* AUO nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abca2_specific_fini_01, 38); - break; - case 0x1020: /* Innolux nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_innolux_nx_abcc_specific_fini_01, 10); - break; - case 0x1030: /* AUO nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abcc_specific_fini_01, 10); - break; - case 0x1040: /* Unknown nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_40_nx_abcc_specific_fini_01, 10); - break; - default: - break; - } - - MAKE_DSI_REG(DSI_WR_DATA) = 0x1005; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - udelay((g_lcd_vendor == 0x2050) ? 120000 : 50000); - - /* Disable Backlight RST. */ - gpio_write(GPIO_LCD_BL_RST, GPIO_LEVEL_LOW); - - if (g_lcd_vendor == 0x2050) { - udelay(30000); - } else { - udelay(10000); - - /* Disable Backlight -5V. */ - gpio_write(GPIO_LCD_BL_N5V, GPIO_LEVEL_LOW); - - udelay(10000); - - /* Disable Backlight +5V. */ - gpio_write(GPIO_LCD_BL_P5V, GPIO_LEVEL_LOW); - - udelay(10000); - } - - /* Disable clocks. */ - car->rst_dev_h_set = 0x1010000; - car->clk_enb_h_clr = 0x1010000; - car->rst_dev_l_set = 0x18000000; - car->clk_enb_l_clr = 0x18000000; - - MAKE_DSI_REG(DSI_PAD_CONTROL_0) = (DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF)); - MAKE_DSI_REG(DSI_POWER_CONTROL) = 0; - - if (!is_mariko) { - /* Backlight PWM. */ - gpio_configure_mode(GPIO_LCD_BL_PWM, GPIO_MODE_SFIO); - - pinmux->lcd_bl_pwm = ((pinmux->lcd_bl_pwm & ~PINMUX_TRISTATE) | PINMUX_TRISTATE); - pinmux->lcd_bl_pwm = (((pinmux->lcd_bl_pwm >> 2) << 2) | 1); - } -} - -void display_backlight(bool enable) { - if (g_lcd_vendor == 0x2050) { - int brightness = enable ? 100 : 0; - - /* Enable FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_ENABLE) = 2; - - /* Configure DSI_LINE_TYPE as FOUR */ - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 1; - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 9; - - /* Set and wait for FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - while ((MAKE_DI_REG(DC_CMD_INT_STATUS) & 2) != 0) { - /* Wait */ - } - - /* Configure display brightness. */ - const uint32_t brightness_val = ((0x7FF * brightness) / 100); - MAKE_DSI_REG(DSI_WR_DATA) = 0x339; - MAKE_DSI_REG(DSI_WR_DATA) = (brightness_val & 0x700) | ((brightness_val & 0xFF) << 16) | 0x51; - - /* Set and wait for FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - while ((MAKE_DI_REG(DC_CMD_INT_STATUS) & 2) != 0) { - /* Wait */ - } - - /* Set client sync point block reset. */ - MAKE_DSI_REG(DSI_INCR_SYNCPT_CNTRL) = 1; - udelay(300000); - - /* Clear client sync point block resest. */ - MAKE_DSI_REG(DSI_INCR_SYNCPT_CNTRL) = 0; - udelay(300000); - - /* Clear DSI_LINE_TYPE config. */ - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 0; - - /* Disable FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_ENABLE) = 0; - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - } else { - /* Enable Backlight PWM. */ - gpio_write(GPIO_LCD_BL_PWM, enable ? GPIO_LEVEL_HIGH : GPIO_LEVEL_LOW); - } -} - -void display_color_screen(uint32_t color) { - do_register_writes(DI_BASE, display_config_solid_color, 8); - - /* Configure display to show single color. */ - MAKE_DI_REG(DC_WIN_AD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_WIN_BD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_WIN_CD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_DISP_BLEND_BACKGROUND_COLOR) = color; - MAKE_DI_REG(DC_CMD_STATE_CONTROL) = ((MAKE_DI_REG(DC_CMD_STATE_CONTROL) & 0xFFFFFFFE) | GENERAL_ACT_REQ); - - udelay(35000); - - display_backlight(true); -} - -uint32_t *display_init_framebuffer(void *address) { - static register_write_t conf[sizeof(display_config_frame_buffer)/sizeof(register_write_t)] = {0}; - if (conf[0].value == 0) { - for (uint32_t i = 0; i < sizeof(display_config_frame_buffer)/sizeof(register_write_t); i++) { - conf[i] = display_config_frame_buffer[i]; - } - } - - uint32_t *lfb_addr = (uint32_t *)address; - conf[19].value = (uint32_t)address; - - /* This configures the framebuffer @ address with a resolution of 1280x720 (line stride 768). */ - do_register_writes(DI_BASE, conf, 32); - - udelay(35000); - - return lfb_addr; -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/di.h b/fusee/fusee-primary/fusee-primary-main/src/di.h deleted file mode 100644 index 4beeb862c..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/di.h +++ /dev/null @@ -1,400 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_DI_H_ -#define FUSEE_DI_H_ - -#include -#include - -#define HOST1X_BASE 0x50000000 -#define DI_BASE 0x54200000 -#define DSI_BASE 0x54300000 -#define VIC_BASE 0x54340000 -#define MIPI_CAL_BASE 0x700E3000 -#define MAKE_HOST1X_REG(n) MAKE_REG32(HOST1X_BASE + n) -#define MAKE_DI_REG(n) MAKE_REG32(DI_BASE + n * 4) -#define MAKE_DSI_REG(n) MAKE_REG32(DSI_BASE + n * 4) -#define MAKE_MIPI_CAL_REG(n) MAKE_REG32(MIPI_CAL_BASE + n) -#define MAKE_VIC_REG(n) MAKE_REG32(VIC_BASE + n) - -/* Clock and reset registers. */ -#define CLK_RST_CONTROLLER_CLK_SOURCE_DISP1 0x138 -#define CLK_RST_CONTROLLER_PLLD_BASE 0xD0 -#define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8 -#define CLK_RST_CONTROLLER_PLLD_MISC 0xDC - -/* Display registers. */ -#define DC_CMD_GENERAL_INCR_SYNCPT 0x00 - -#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x01 -#define SYNCPT_CNTRL_NO_STALL (1 << 8) -#define SYNCPT_CNTRL_SOFT_RESET (1 << 0) - -#define DC_CMD_CONT_SYNCPT_VSYNC 0x28 -#define SYNCPT_VSYNC_ENABLE (1 << 8) - -#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031 - -#define DC_CMD_DISPLAY_COMMAND 0x32 -#define DISP_CTRL_MODE_STOP (0 << 5) -#define DISP_CTRL_MODE_C_DISPLAY (1 << 5) -#define DISP_CTRL_MODE_NC_DISPLAY (2 << 5) -#define DISP_CTRL_MODE_MASK (3 << 5) - -#define DC_CMD_DISPLAY_POWER_CONTROL 0x36 -#define PW0_ENABLE (1 << 0) -#define PW1_ENABLE (1 << 2) -#define PW2_ENABLE (1 << 4) -#define PW3_ENABLE (1 << 6) -#define PW4_ENABLE (1 << 8) -#define PM0_ENABLE (1 << 16) -#define PM1_ENABLE (1 << 18) - -#define DC_CMD_INT_STATUS 0x37 -#define DC_CMD_INT_MASK 0x38 -#define DC_CMD_INT_ENABLE 0x39 - -#define DC_CMD_STATE_ACCESS 0x40 -#define READ_MUX (1 << 0) -#define WRITE_MUX (1 << 2) - -#define DC_CMD_STATE_CONTROL 0x41 -#define GENERAL_ACT_REQ (1 << 0) -#define WIN_A_ACT_REQ (1 << 1) -#define WIN_B_ACT_REQ (1 << 2) -#define WIN_C_ACT_REQ (1 << 3) -#define CURSOR_ACT_REQ (1 << 7) -#define GENERAL_UPDATE (1 << 8) -#define WIN_A_UPDATE (1 << 9) -#define WIN_B_UPDATE (1 << 10) -#define WIN_C_UPDATE (1 << 11) -#define CURSOR_UPDATE (1 << 15) -#define NC_HOST_TRIG (1 << 24) - -#define DC_CMD_DISPLAY_WINDOW_HEADER 0x42 -#define WINDOW_A_SELECT (1 << 4) -#define WINDOW_B_SELECT (1 << 5) -#define WINDOW_C_SELECT (1 << 6) - -#define DC_CMD_REG_ACT_CONTROL 0x043 - -#define DC_COM_CRC_CONTROL 0x300 -#define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x)) -#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) - -#define DC_COM_DSC_TOP_CTL 0x33E - -#define DC_DISP_DISP_WIN_OPTIONS 0x402 -#define HDMI_ENABLE (1 << 30) -#define DSI_ENABLE (1 << 29) -#define SOR1_TIMING_CYA (1 << 27) -#define SOR1_ENABLE (1 << 26) -#define SOR_ENABLE (1 << 25) -#define CURSOR_ENABLE (1 << 16) - -#define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403 -#define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404 -#define DC_DISP_DISP_TIMING_OPTIONS 0x405 -#define DC_DISP_REF_TO_SYNC 0x406 -#define DC_DISP_SYNC_WIDTH 0x407 -#define DC_DISP_BACK_PORCH 0x408 -#define DC_DISP_ACTIVE 0x409 -#define DC_DISP_FRONT_PORCH 0x40A - -#define DC_DISP_DISP_CLOCK_CONTROL 0x42E -#define PIXEL_CLK_DIVIDER_PCD1 (0 << 8) -#define PIXEL_CLK_DIVIDER_PCD1H (1 << 8) -#define PIXEL_CLK_DIVIDER_PCD2 (2 << 8) -#define PIXEL_CLK_DIVIDER_PCD3 (3 << 8) -#define PIXEL_CLK_DIVIDER_PCD4 (4 << 8) -#define PIXEL_CLK_DIVIDER_PCD6 (5 << 8) -#define PIXEL_CLK_DIVIDER_PCD8 (6 << 8) -#define PIXEL_CLK_DIVIDER_PCD9 (7 << 8) -#define PIXEL_CLK_DIVIDER_PCD12 (8 << 8) -#define PIXEL_CLK_DIVIDER_PCD16 (9 << 8) -#define PIXEL_CLK_DIVIDER_PCD18 (10 << 8) -#define PIXEL_CLK_DIVIDER_PCD24 (11 << 8) -#define PIXEL_CLK_DIVIDER_PCD13 (12 << 8) -#define SHIFT_CLK_DIVIDER(x) ((x) & 0xff) - -#define DC_DISP_DISP_INTERFACE_CONTROL 0x42F -#define DISP_DATA_FORMAT_DF1P1C (0 << 0) -#define DISP_DATA_FORMAT_DF1P2C24B (1 << 0) -#define DISP_DATA_FORMAT_DF1P2C18B (2 << 0) -#define DISP_DATA_FORMAT_DF1P2C16B (3 << 0) -#define DISP_DATA_FORMAT_DF2S (4 << 0) -#define DISP_DATA_FORMAT_DF3S (5 << 0) -#define DISP_DATA_FORMAT_DFSPI (6 << 0) -#define DISP_DATA_FORMAT_DF1P3C24B (7 << 0) -#define DISP_DATA_FORMAT_DF1P3C18B (8 << 0) -#define DISP_ALIGNMENT_MSB (0 << 8) -#define DISP_ALIGNMENT_LSB (1 << 8) -#define DISP_ORDER_RED_BLUE (0 << 9) -#define DISP_ORDER_BLUE_RED (1 << 9) - -#define DC_DISP_DISP_COLOR_CONTROL 0x430 -#define DITHER_CONTROL_MASK (3 << 8) -#define DITHER_CONTROL_DISABLE (0 << 8) -#define DITHER_CONTROL_ORDERED (2 << 8) -#define DITHER_CONTROL_ERRDIFF (3 << 8) -#define BASE_COLOR_SIZE_MASK (0xf << 0) -#define BASE_COLOR_SIZE_666 (0 << 0) -#define BASE_COLOR_SIZE_111 (1 << 0) -#define BASE_COLOR_SIZE_222 (2 << 0) -#define BASE_COLOR_SIZE_333 (3 << 0) -#define BASE_COLOR_SIZE_444 (4 << 0) -#define BASE_COLOR_SIZE_555 (5 << 0) -#define BASE_COLOR_SIZE_565 (6 << 0) -#define BASE_COLOR_SIZE_332 (7 << 0) -#define BASE_COLOR_SIZE_888 (8 << 0) - -#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431 -#define SC1_H_QUALIFIER_NONE (1 << 16) -#define SC0_H_QUALIFIER_NONE (1 << 0) - -#define DC_DISP_DATA_ENABLE_OPTIONS 0x432 -#define DE_SELECT_ACTIVE_BLANK (0 << 0) -#define DE_SELECT_ACTIVE (1 << 0) -#define DE_SELECT_ACTIVE_IS (2 << 0) -#define DE_CONTROL_ONECLK (0 << 2) -#define DE_CONTROL_NORMAL (1 << 2) -#define DE_CONTROL_EARLY_EXT (2 << 2) -#define DE_CONTROL_EARLY (3 << 2) -#define DE_CONTROL_ACTIVE_BLANK (4 << 2) - -#define DC_DISP_DC_MCCIF_FIFOCTRL 0x480 -#define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4 - -#define DC_WIN_CSC_YOF 0x611 -#define DC_WIN_CSC_KYRGB 0x612 -#define DC_WIN_CSC_KUR 0x613 -#define DC_WIN_CSC_KVR 0x614 -#define DC_WIN_CSC_KUG 0x615 -#define DC_WIN_CSC_KVG 0x616 -#define DC_WIN_CSC_KUB 0x617 -#define DC_WIN_CSC_KVB 0x618 -#define DC_WIN_AD_WIN_OPTIONS 0xB80 -#define DC_WIN_BD_WIN_OPTIONS 0xD80 -#define DC_WIN_CD_WIN_OPTIONS 0xF80 - -/* The following registers are A/B/C shadows of the 0xB80/0xD80/0xF80 registers (see DISPLAY_WINDOW_HEADER). */ -#define DC_WIN_WIN_OPTIONS 0x700 -#define H_DIRECTION (1 << 0) -#define V_DIRECTION (1 << 2) -#define COLOR_EXPAND (1 << 6) -#define CSC_ENABLE (1 << 18) -#define WIN_ENABLE (1 << 30) - -#define DC_WIN_COLOR_DEPTH 0x703 -#define WIN_COLOR_DEPTH_P1 0x0 -#define WIN_COLOR_DEPTH_P2 0x1 -#define WIN_COLOR_DEPTH_P4 0x2 -#define WIN_COLOR_DEPTH_P8 0x3 -#define WIN_COLOR_DEPTH_B4G4R4A4 0x4 -#define WIN_COLOR_DEPTH_B5G5R5A 0x5 -#define WIN_COLOR_DEPTH_B5G6R5 0x6 -#define WIN_COLOR_DEPTH_AB5G5R5 0x7 -#define WIN_COLOR_DEPTH_B8G8R8A8 0xC -#define WIN_COLOR_DEPTH_R8G8B8A8 0xD -#define WIN_COLOR_DEPTH_B6x2G6x2R6x2A8 0xE -#define WIN_COLOR_DEPTH_R6x2G6x2B6x2A8 0xF -#define WIN_COLOR_DEPTH_YCbCr422 0x10 -#define WIN_COLOR_DEPTH_YUV422 0x11 -#define WIN_COLOR_DEPTH_YCbCr420P 0x12 -#define WIN_COLOR_DEPTH_YUV420P 0x13 -#define WIN_COLOR_DEPTH_YCbCr422P 0x14 -#define WIN_COLOR_DEPTH_YUV422P 0x15 -#define WIN_COLOR_DEPTH_YCbCr422R 0x16 -#define WIN_COLOR_DEPTH_YUV422R 0x17 -#define WIN_COLOR_DEPTH_YCbCr422RA 0x18 -#define WIN_COLOR_DEPTH_YUV422RA 0x19 - -#define DC_WIN_BUFFER_CONTROL 0x702 -#define DC_WIN_POSITION 0x704 - -#define DC_WIN_SIZE 0x705 -#define H_SIZE(x) (((x) & 0x1fff) << 0) -#define V_SIZE(x) (((x) & 0x1fff) << 16) - -#define DC_WIN_PRESCALED_SIZE 0x706 -#define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0) -#define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) - -#define DC_WIN_H_INITIAL_DDA 0x707 -#define DC_WIN_V_INITIAL_DDA 0x708 - -#define DC_WIN_DDA_INC 0x709 -#define H_DDA_INC(x) (((x) & 0xffff) << 0) -#define V_DDA_INC(x) (((x) & 0xffff) << 16) - -#define DC_WIN_LINE_STRIDE 0x70A -#define DC_WIN_DV_CONTROL 0x70E -#define DC_WINBUF_BLEND_LAYER_CONTROL 0x716 - -/* The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER). */ -#define DC_WINBUF_START_ADDR 0x800 -#define DC_WINBUF_ADDR_H_OFFSET 0x806 -#define DC_WINBUF_ADDR_V_OFFSET 0x808 -#define DC_WINBUF_SURFACE_KIND 0x80B - -/* Display serial interface registers. */ -#define DSI_INCR_SYNCPT_CNTRL 0x1 - -#define DSI_RD_DATA 0x9 -#define DSI_WR_DATA 0xA - -#define DSI_POWER_CONTROL 0xB -#define DSI_POWER_CONTROL_ENABLE 1 - -#define DSI_INT_ENABLE 0xC -#define DSI_INT_STATUS 0xD -#define DSI_INT_MASK 0xE - -#define DSI_HOST_CONTROL 0xF -#define DSI_HOST_CONTROL_FIFO_RESET (1 << 21) -#define DSI_HOST_CONTROL_CRC_RESET (1 << 20) -#define DSI_HOST_CONTROL_TX_TRIG_SOL (0 << 12) -#define DSI_HOST_CONTROL_TX_TRIG_FIFO (1 << 12) -#define DSI_HOST_CONTROL_TX_TRIG_HOST (2 << 12) -#define DSI_HOST_CONTROL_RAW (1 << 6) -#define DSI_HOST_CONTROL_HS (1 << 5) -#define DSI_HOST_CONTROL_FIFO_SEL (1 << 4) -#define DSI_HOST_CONTROL_IMM_BTA (1 << 3) -#define DSI_HOST_CONTROL_PKT_BTA (1 << 2) -#define DSI_HOST_CONTROL_CS (1 << 1) -#define DSI_HOST_CONTROL_ECC (1 << 0) - -#define DSI_CONTROL 0x10 -#define DSI_CONTROL_HS_CLK_CTRL (1 << 20) -#define DSI_CONTROL_CHANNEL(c) (((c) & 0x3) << 16) -#define DSI_CONTROL_FORMAT(f) (((f) & 0x3) << 12) -#define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8) -#define DSI_CONTROL_LANES(n) (((n) & 0x3) << 4) -#define DSI_CONTROL_DCS_ENABLE (1 << 3) -#define DSI_CONTROL_SOURCE(s) (((s) & 0x1) << 2) -#define DSI_CONTROL_VIDEO_ENABLE (1 << 1) -#define DSI_CONTROL_HOST_ENABLE (1 << 0) - -#define DSI_SOL_DELAY 0x11 -#define DSI_MAX_THRESHOLD 0x12 - -#define DSI_TRIGGER 0x13 -#define DSI_TRIGGER_HOST (1 << 1) -#define DSI_TRIGGER_VIDEO (1 << 0) - -#define DSI_TX_CRC 0x14 -#define DSI_STATUS 0x15 -#define DSI_INIT_SEQ_CONTROL 0x1A -#define DSI_INIT_SEQ_DATA_0 0x1B -#define DSI_INIT_SEQ_DATA_1 0x1C -#define DSI_INIT_SEQ_DATA_2 0x1D -#define DSI_INIT_SEQ_DATA_3 0x1E -#define DSI_PKT_SEQ_0_LO 0x23 -#define DSI_PKT_SEQ_0_HI 0x24 -#define DSI_PKT_SEQ_1_LO 0x25 -#define DSI_PKT_SEQ_1_HI 0x26 -#define DSI_PKT_SEQ_2_LO 0x27 -#define DSI_PKT_SEQ_2_HI 0x28 -#define DSI_PKT_SEQ_3_LO 0x29 -#define DSI_PKT_SEQ_3_HI 0x2A -#define DSI_PKT_SEQ_4_LO 0x2B -#define DSI_PKT_SEQ_4_HI 0x2C -#define DSI_PKT_SEQ_5_LO 0x2D -#define DSI_PKT_SEQ_5_HI 0x2E -#define DSI_DCS_CMDS 0x33 -#define DSI_PKT_LEN_0_1 0x34 -#define DSI_PKT_LEN_2_3 0x35 -#define DSI_PKT_LEN_4_5 0x36 -#define DSI_PKT_LEN_6_7 0x37 -#define DSI_PHY_TIMING_0 0x3C -#define DSI_PHY_TIMING_1 0x3D -#define DSI_PHY_TIMING_2 0x3E -#define DSI_BTA_TIMING 0x3F - -#define DSI_TIMEOUT_0 0x44 -#define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16) -#define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0) - -#define DSI_TIMEOUT_1 0x45 -#define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16) -#define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0) - -#define DSI_TO_TALLY 0x46 - -#define DSI_PAD_CONTROL_0 0x4B -#define DSI_PAD_CONTROL_VS1_PULLDN_CLK (1 << 24) -#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) -#define DSI_PAD_CONTROL_VS1_PDIO_CLK (1 << 8) -#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) - -#define DSI_PAD_CONTROL_CD 0x4C -#define DSI_VIDEO_MODE_CONTROL 0x4E - -#define DSI_PAD_CONTROL_1 0x4F -#define DSI_PAD_CONTROL_2 0x50 - -#define DSI_PAD_CONTROL_3 0x51 -#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12) -#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8) -#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4) -#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0) - -#define DSI_PAD_CONTROL_4 0x52 -#define DSI_PAD_CONTROL_5_MARIKO 0x53 -#define DSI_PAD_CONTROL_6_MARIKO 0x54 -#define DSI_PAD_CONTROL_7_MARIKO 0x55 -#define DSI_INIT_SEQ_DATA_15 0x5F -#define DSI_INIT_SEQ_DATA_15_MARIKO 0x62 - -/* MIPI calibration registers. */ -#define MIPI_CAL_MIPI_CAL_CTRL 0x0 -#define MIPI_CAL_MIPI_CAL_AUTOCAL_CTRL0 0x4 -#define MIPI_CAL_CIL_MIPI_CAL_STATUS 0x8 -#define MIPI_CAL_CIL_MIPI_CAL_STATUS_2 0xC -#define MIPI_CAL_CILA_MIPI_CAL_CONFIG 0x14 -#define MIPI_CAL_CILB_MIPI_CAL_CONFIG 0x18 -#define MIPI_CAL_CILC_MIPI_CAL_CONFIG 0x1C -#define MIPI_CAL_CILD_MIPI_CAL_CONFIG 0x20 -#define MIPI_CAL_CILE_MIPI_CAL_CONFIG 0x24 -#define MIPI_CAL_CILF_MIPI_CAL_CONFIG 0x28 -#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG 0x38 -#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG 0x3C -#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG 0x40 -#define MIPI_CAL_DSID_MIPI_CAL_CONFIG 0x44 -#define MIPI_CAL_MIPI_BIAS_PAD_CFG0 0x58 -#define MIPI_CAL_MIPI_BIAS_PAD_CFG1 0x5C -#define MIPI_CAL_MIPI_BIAS_PAD_CFG2 0x60 -#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2 0x64 -#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2 0x68 -#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2 0x70 -#define MIPI_CAL_DSID_MIPI_CAL_CONFIG_2 0x74 - -void display_init(void); -void display_end(void); - -/* Switches screen backlight ON/OFF. */ -void display_backlight(bool enable); - -/* Show one single color on the display. */ -void display_color_screen(uint32_t color); - -/* Init display in full 1280x720 resolution (B8G8R8A8, line stride 768, framebuffer size = 1280*768*4 bytes). */ -uint32_t *display_init_framebuffer(void *address); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/di.inl b/fusee/fusee-primary/fusee-primary-main/src/di.inl deleted file mode 100644 index 3ea8dc5df..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/di.inl +++ /dev/null @@ -1,773 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -typedef struct { - uint32_t offset; - uint32_t value; -} register_write_t; - -typedef struct { - uint16_t kind; - uint16_t offset; - uint32_t value; -} dsi_sleep_or_register_write_t; - -static const uint32_t display_config_frame_buffer_address = 0xC0000000; - -static const register_write_t display_config_plld_01_erista[4] = { - {CLK_RST_CONTROLLER_CLK_SOURCE_DISP1, 0x40000000}, - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4830A001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000020}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002D0AAA}, -}; - -static const register_write_t display_config_plld_01_mariko[4] = { - {CLK_RST_CONTROLLER_CLK_SOURCE_DISP1, 0x40000000}, - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4830A001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000000}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002DFC00}, -}; - -static const register_write_t display_config_dc_01[94] = { - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_REG_ACT_CONTROL, 0x54}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_DISP_DC_MCCIF_FIFOCTRL, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_MEM_HIGH_PRIORITY, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_POWER_CONTROL, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | PW4_ENABLE | PM0_ENABLE | PM1_ENABLE}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT_CNTRL, SYNCPT_CNTRL_NO_STALL}, - {sizeof(uint32_t) * DC_CMD_CONT_SYNCPT_VSYNC, SYNCPT_VSYNC_ENABLE | 0x9}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(3), 0}, - {sizeof(uint32_t) * DC_DISP_BLEND_BACKGROUND_COLOR, 0}, - {sizeof(uint32_t) * DC_COM_CRC_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, -}; - -static const register_write_t display_config_dsi_01_init_01[8] = { - {sizeof(uint32_t) * DSI_WR_DATA, 0x0}, - {sizeof(uint32_t) * DSI_INT_ENABLE, 0x0}, - {sizeof(uint32_t) * DSI_INT_STATUS, 0x0}, - {sizeof(uint32_t) * DSI_INT_MASK, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_0, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_1, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_2, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_3, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_02_erista[1] = { - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_02_mariko[1] = { - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15_MARIKO, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_03[14] = { - {sizeof(uint32_t) * DSI_DCS_CMDS, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0}, - {sizeof(uint32_t) * DSI_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_01_init_04_erista[0] = { - /* No register writes. */ -}; - -static const register_write_t display_config_dsi_01_init_04_mariko[7] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_5_MARIKO, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_6_MARIKO, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0}, -}; - -static const register_write_t display_config_dsi_01_init_05[10] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_CD, 0}, - {sizeof(uint32_t) * DSI_SOL_DELAY, 0x18}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_0_1, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_2_3, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_4_5, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_6_7, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_06[12] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30109}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_07[14] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30118}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x40}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_TX_CRC, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_phy_timing_erista[1] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_0, 0x6070601}, -}; - -static const register_write_t display_config_dsi_phy_timing_mariko[1] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_0, 0x6070603}, -}; - -static const dsi_sleep_or_register_write_t display_config_jdi_specific_init_01[48] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xBD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1939}, - {0, DSI_WR_DATA, 0xAAAAAAD8}, - {0, DSI_WR_DATA, 0xAAAAAAEB}, - {0, DSI_WR_DATA, 0xAAEBAAAA}, - {0, DSI_WR_DATA, 0xAAAAAAAA}, - {0, DSI_WR_DATA, 0xAAAAAAEB}, - {0, DSI_WR_DATA, 0xAAEBAAAA}, - {0, DSI_WR_DATA, 0xAA}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1BD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2739}, - {0, DSI_WR_DATA, 0xFFFFFFD8}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFF}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2BD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xF39}, - {0, DSI_WR_DATA, 0xFFFFFFD8}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFF}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xBD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x6D915}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_nx_abca2_specific_init_01[14] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x739}, - {0, DSI_WR_DATA, 0x751548B1}, - {0, DSI_WR_DATA, 0x143209}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abca2_specific_init_01[14] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x739}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x143209}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_auo_40_nx_abcc_specific_init_01[5] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x78, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_50_nx_abcd_specific_init_01[13] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0xA015}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x205315}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x339}, - {0, DSI_WR_DATA, 0xFF0751}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const register_write_t display_config_plld_02_erista[3] = { - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4810c001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000020}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002D0AAA}, -}; - -static const register_write_t display_config_plld_02_mariko[3] = { - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4810c001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000000}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002DFC00}, -}; - -static const register_write_t display_config_dsi_01_init_08[1] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_09[19] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30172}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xA40)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x5A2F) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0x40000208}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_LO, 0x3F3B2B08}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0x2CC}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_LO, 0x3F3B2B08}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0x2CC}, - {sizeof(uint32_t) * DSI_PKT_LEN_0_1, 0xCE0000}, - {sizeof(uint32_t) * DSI_PKT_LEN_2_3, 0x87001A2}, - {sizeof(uint32_t) * DSI_PKT_LEN_4_5, 0x190}, - {sizeof(uint32_t) * DSI_PKT_LEN_6_7, 0x190}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_01_init_10[10] = { - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_CONTROL, 0}, - {sizeof(uint32_t) * DSI_SOL_DELAY, 6}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_FIFO_SEL| DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC} -}; - -static const register_write_t display_config_dsi_01_init_11_erista[4] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3)}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0} -}; - -static const register_write_t display_config_dsi_01_init_11_mariko[7] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0x77777}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_5_MARIKO, 0x77777}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_6_MARIKO, DSI_PAD_PREEMP_PD_CLK(0x1) | DSI_PAD_PREEMP_PU_CLK(0x1) | DSI_PAD_PREEMP_PD(0x01) | DSI_PAD_PREEMP_PU(0x1)}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0}, -}; - -static const register_write_t display_config_mipi_cal_01[4] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0}, - {MIPI_CAL_CIL_MIPI_CAL_STATUS, 0xF3F10000}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG0, 1}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0}, -}; - -static const register_write_t display_config_mipi_cal_02_erista[2] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0x10010}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG1, 0x300}, -}; - -static const register_write_t display_config_mipi_cal_02_mariko[2] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0x10010}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG1, 0}, -}; - -static const register_write_t display_config_mipi_cal_03_erista[6] = { - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200200}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200200}, - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x200002}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x200002}, - {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, -}; - -static const register_write_t display_config_mipi_cal_03_mariko[6] = { - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200006}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200006}, - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x260000}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x260000}, - {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, -}; - -static const register_write_t display_config_mipi_cal_04[10] = { - {MIPI_CAL_CILC_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILD_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILE_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILF_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSIC_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSID_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_DSID_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_MIPI_CAL_CTRL, 0x2A000001}, -}; - -static const register_write_t display_config_dc_02[113] = { - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(3), 0}, - {sizeof(uint32_t) * DC_DISP_BLEND_BACKGROUND_COLOR, 0}, - {sizeof(uint32_t) * DC_COM_CRC_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_TIMING_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_REF_TO_SYNC, (1 << 16)}, - {sizeof(uint32_t) * DC_DISP_SYNC_WIDTH, 0x10048}, - {sizeof(uint32_t) * DC_DISP_BACK_PORCH, 0x90048}, - {sizeof(uint32_t) * DC_DISP_ACTIVE, 0x50002D0}, - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_ENABLE(1), 0}, - {sizeof(uint32_t) * DC_DISP_DATA_ENABLE_OPTIONS, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_DISP_DISP_CLOCK_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, READ_MUX | WRITE_MUX}, - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, -}; - -static const register_write_t display_config_frame_buffer[32] = { - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_WIN_POSITION, 0}, - {sizeof(uint32_t) * DC_WIN_H_INITIAL_DDA, 0}, - {sizeof(uint32_t) * DC_WIN_V_INITIAL_DDA, 0}, - {sizeof(uint32_t) * DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(2880)}, - {sizeof(uint32_t) * DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, - {sizeof(uint32_t) * DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)}, - {sizeof(uint32_t) * DC_WIN_LINE_STRIDE, 0x6000C00}, - {sizeof(uint32_t) * DC_WIN_BUFFER_CONTROL, 0}, - {sizeof(uint32_t) * DC_WINBUF_SURFACE_KIND, 0}, - {sizeof(uint32_t) * DC_WINBUF_START_ADDR, display_config_frame_buffer_address}, - {sizeof(uint32_t) * DC_WINBUF_ADDR_H_OFFSET, 0}, - {sizeof(uint32_t) * DC_WINBUF_ADDR_V_OFFSET, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, WIN_ENABLE}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ}, -}; - -static const register_write_t display_config_solid_color[8] = { - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, -}; - -static const register_write_t display_config_dc_01_fini_01[13] = { - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_CMD_INT_MASK, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_INT_ENABLE, 0}, - {sizeof(uint32_t) * DC_CMD_CONT_SYNCPT_VSYNC, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, -}; - -static const register_write_t display_config_dsi_01_fini_01[2] = { - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_fini_02[13] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30109}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) }, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x40}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_TX_CRC, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0} -}; - -static const dsi_sleep_or_register_write_t display_config_jdi_specific_fini_01[22] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2139}, - {0, DSI_WR_DATA, 0x191919D5}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x4F0F41B1}, - {0, DSI_WR_DATA, 0xF179A433}, - {0, DSI_WR_DATA, 0x2D81}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abca2_specific_fini_01[38] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2C39}, - {0, DSI_WR_DATA, 0x191919D5}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2C39}, - {0, DSI_WR_DATA, 0x191919D6}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x114D31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x751548B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x115631}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x114D31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_40_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x731348B1}, - {0, DSI_WR_DATA, 0x71243209}, - {0, DSI_WR_DATA, 0x4C31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/emc.h b/fusee/fusee-primary/fusee-primary-main/src/emc.h deleted file mode 100644 index 8bf0f8076..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/emc.h +++ /dev/null @@ -1,1129 +0,0 @@ -/* - * arch/arm/mach-tegra/tegra21_emc.h - * - * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - */ - -#ifndef FUSEE_EMC_H_ -#define FUSEE_EMC_H_ - -#define EMC_BASE 0x7001B000 -#define EMC0_BASE 0x7001E000 -#define EMC1_BASE 0x7001F000 -#define MAKE_EMC_REG(n) MAKE_REG32(EMC_BASE + n) -#define MAKE_EMC0_REG(n) MAKE_REG32(EMC0_BASE + n) -#define MAKE_EMC1_REG(n) MAKE_REG32(EMC1_BASE + n) - -#define EMC_INTSTATUS 0x0 -#define EMC_INTSTATUS_MRR_DIVLD (0x1 << 5) -#define EMC_INTSTATUS_CLKCHANGE_COMPLETE (0x1 << 4) - -#define EMC_INTMASK 0x4 -#define EMC_DBG 0x8 -#define EMC_DBG_WRITE_MUX_ACTIVE (1 << 1) -#define EMC_DBG_CFG_SWAP_SHIFT 26 -#define EMC_DBG_CFG_SWAP_MASK \ - (0x3 << EMC_DBG_CFG_SWAP_SHIFT) -#define EMC_DBG_WRITE_ACTIVE_ONLY (1 << 30) - -#define EMC_CONFIG_SAMPLE_DELAY 0x5f0 -#define EMC_CFG_UPDATE 0x5f4 -#define EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_SHIFT 9 -#define EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_MASK \ - (0x3 << EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_SHIFT) -#define EMC_CFG 0xc -#define EMC_CFG_DRAM_CLKSTOP_PD (1 << 31) -#define EMC_CFG_DRAM_CLKSTOP_SR (1 << 30) -#define EMC_CFG_DRAM_ACPD (1 << 29) -#define EMC_CFG_DYN_SELF_REF (1 << 28) -#define EMC_CFG_REQACT_ASYNC (1 << 26) -#define EMC_CFG_AUTO_PRE_WR (1 << 25) -#define EMC_CFG_AUTO_PRE_RD (1 << 24) -#define EMC_CFG_MAM_PRE_WR (1 << 23) -#define EMC_CFG_MAN_PRE_RD (1 << 22) -#define EMC_CFG_PERIODIC_QRST (1 << 21) -#define EMC_CFG_PERIODIC_QRST_SHIFT (21) -#define EMC_CFG_EN_DYNAMIC_PUTERM (1 << 20) -#define EMC_CFG_DLY_WR_DQ_HALF_CLOCK (1 << 19) -#define EMC_CFG_DSR_VTTGEN_DRV_EN (1 << 18) -#define EMC_CFG_EMC2MC_CLK_RATIO (3 << 16) -#define EMC_CFG_WAIT_FOR_ISP2B_READY_B4_CC (1 << 9) -#define EMC_CFG_WAIT_FOR_VI2_READY_B4_CC (1 << 8) -#define EMC_CFG_WAIT_FOR_ISP2_READY_B4_CC (1 << 7) -#define EMC_CFG_INVERT_DQM (1 << 6) -#define EMC_CFG_WAIT_FOR_DISPLAYB_READY_B4_CC (1 << 5) -#define EMC_CFG_WAIT_FOR_DISPLAY_READY_B4_CC (1 << 4) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_DATAPIPE2 (1 << 3) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_DATAPIPE1 (1 << 2) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_ADDRPIPE (1 << 1) - -#define EMC_ADR_CFG 0x10 -#define EMC_REFCTRL 0x20 -#define EMC_REFCTRL_DEV_SEL_SHIFT 0 -#define EMC_REFCTRL_DEV_SEL_MASK \ - (0x3 << EMC_REFCTRL_DEV_SEL_SHIFT) -#define EMC_REFCTRL_ENABLE (0x1 << 31) -#define EMC_REFCTRL_ENABLE_ALL(num) \ - (((((num) > 1) ? 0 : 2) << EMC_REFCTRL_DEV_SEL_SHIFT) \ - | EMC_REFCTRL_ENABLE) -#define EMC_REFCTRL_DISABLE_ALL(num) \ - ((((num) > 1) ? 0 : 2) << EMC_REFCTRL_DEV_SEL_SHIFT) - -#define EMC_PIN 0x24 -#define EMC_PIN_PIN_CKE_PER_DEV (1 << 2) -#define EMC_PIN_PIN_CKEB (1 << 1) -#define EMC_PIN_PIN_CKE (1 << 0) - -#define EMC_CLK_FORCE_CC_TRIGGER (1 << 27) - -#define EMC_TIMING_CONTROL 0x28 -#define EMC_RC 0x2c -#define EMC_RFC 0x30 -#define EMC_RFCPB 0x590 -#define EMC_RAS 0x34 -#define EMC_RP 0x38 -#define EMC_R2W 0x3c -#define EMC_W2R 0x40 -#define EMC_R2P 0x44 -#define EMC_W2P 0x48 -#define EMC_CCDMW 0x5c0 -#define EMC_RD_RCD 0x4c -#define EMC_WR_RCD 0x50 -#define EMC_RRD 0x54 -#define EMC_REXT 0x58 -#define EMC_WDV 0x5c -#define EMC_QUSE 0x60 -#define EMC_QRST 0x64 -#define EMC_ISSUE_QRST 0x428 -#define EMC_QSAFE 0x68 -#define EMC_RDV 0x6c -#define EMC_REFRESH 0x70 -#define EMC_BURST_REFRESH_NUM 0x74 -#define EMC_PDEX2WR 0x78 -#define EMC_PDEX2RD 0x7c -#define EMC_PDEX2CKE 0x118 -#define EMC_PCHG2PDEN 0x80 -#define EMC_ACT2PDEN 0x84 -#define EMC_AR2PDEN 0x88 -#define EMC_RW2PDEN 0x8c -#define EMC_CKE2PDEN 0x11c -#define EMC_TXSR 0x90 -#define EMC_TCKE 0x94 -#define EMC_TFAW 0x98 -#define EMC_TRPAB 0x9c -#define EMC_TCLKSTABLE 0xa0 -#define EMC_TCLKSTOP 0xa4 -#define EMC_TREFBW 0xa8 -#define EMC_TPPD 0xac -#define EMC_PDEX2MRR 0xb4 -#define EMC_ODT_WRITE 0xb0 -#define EMC_WEXT 0xb8 -#define EMC_RFC_SLR 0xc0 -#define EMC_MRS_WAIT_CNT2 0xc4 -#define EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_SHIFT 16 -#define EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_MASK \ - (0x7ff << EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_SHIFT) -#define EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_SHIFT 0 -#define EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_MASK \ - (0x3ff << EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_SHIFT) - -#define EMC_MRS_WAIT_CNT 0xc8 -#define EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT 0 -#define EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK \ - (0x3FF << EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT) -#define EMC_MRS_WAIT_CNT_LONG_WAIT_SHIFT 16 -#define EMC_MRS_WAIT_CNT_LONG_WAIT_MASK \ - (0x3FF << EMC_MRS_WAIT_CNT_LONG_WAIT_SHIFT) - -#define EMC_MRS 0xcc -#define EMC_MODE_SET_DLL_RESET (1 << 8) -#define EMC_MRS_USE_MRS_LONG_CNT (1 << 26) - -#define EMC_EMRS 0xd0 -#define EMC_EMRS_USE_EMRS_LONG_CNT (1 << 26) - -#define EMC_REF 0xd4 -#define EMC_REF_FORCE_CMD 1 - -#define EMC_PRE 0xd8 -#define EMC_NOP 0xdc -#define EMC_SELF_REF 0xe0 -#define EMC_SELF_REF_CMD_ENABLED (1 << 0) -#define EMC_SELF_REF_ACTIVE_SELF_REF (1 << 8) -#define EMC_SELF_REF_DEV_SEL_SHIFT 30 -#define EMC_SELF_REF_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) - -#define EMC_DPD 0xe4 -#define EMC_MRW 0xe8 -#define EMC_MRW_MRW_OP_SHIFT 0 -#define EMC_MRW_MRW_OP_MASK \ - (0xff << EMC_MRW_MRW_OP_SHIFT) -#define EMC_MRW_MRW_MA_SHIFT 16 -#define EMC_MRW_MRW_MA_MASK \ - (0xff << EMC_MRW_MRW_MA_SHIFT) -#define EMC_MRW_USE_MRW_LONG_CNT 26 -#define EMC_MRW_USE_MRW_EXT_CNT 27 -#define EMC_MRW_MRW_DEV_SELECTN_SHIFT 30 -#define EMC_MRW_MRW_DEV_SELECTN_MASK \ - (0x3 << EMC_MRW_MRW_DEV_SELECTN_SHIFT) - -#define EMC_MRR 0xec -#define EMC_MRR_DEV_SEL_SHIFT 30 -#define EMC_MRR_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) -#define EMC_MRR_MA_SHIFT 16 -#define EMC_MRR_MA_MASK \ - (0xff << EMC_MRR_MA_SHIFT) -#define EMC_MRR_DATA_SHIFT 0 -#define EMC_MRR_DATA_MASK \ - (0xffff << EMC_MRR_DATA_SHIFT) -#define LPDDR2_MR4_TEMP_SHIFT 0 -#define LPDDR2_MR4_TEMP_MASK \ - (0x7 << LPDDR2_MR4_TEMP_SHIFT) - -#define EMC_CMDQ 0xf0 -#define EMC_MC2EMCQ 0xf4 -#define EMC_FBIO_SPARE 0x100 -#define EMC_FBIO_CFG5 0x104 -#define EMC_FBIO_CFG5_DRAM_TYPE_SHIFT 0 -#define EMC_FBIO_CFG5_DRAM_TYPE_MASK \ - (0x3 << EMC_FBIO_CFG5_DRAM_TYPE_SHIFT) -#define EMC_FBIO_CFG5_CMD_TX_DIS (1 << 8) -#define EMC_FBIO_CFG5_CMD_BUS_RETURN_TO_ZERO (1 << 27) - -#define EMC_CFG5_QUSE_MODE_SHIFT 13 -#define EMC_CFG5_QUSE_MODE_MASK \ - (0x7 << EMC_CFG5_QUSE_MODE_SHIFT) - -#define EMC_CFG_RSV 0x120 -#define EMC_ACPD_CONTROL 0x124 -#define EMC_MPC 0x128 -#define EMC_EMRS2 0x12c -#define EMC_EMRS2_USE_EMRS2_LONG_CNT (1 << 26) - -#define EMC_EMRS3 0x130 -#define EMC_MRW2 0x134 -#define EMC_MRW3 0x138 -#define EMC_MRW4 0x13c -#define EMC_MRW5 0x4a0 -#define EMC_MRW6 0x4a4 -#define EMC_MRW7 0x4a8 -#define EMC_MRW8 0x4ac -#define EMC_MRW9 0x4b0 -#define EMC_MRW10 0x4b4 -#define EMC_MRW11 0x4b8 -#define EMC_MRW12 0x4bc -#define EMC_MRW13 0x4c0 -#define EMC_MRW14 0x4c4 -#define EMC_MRW15 0x4d0 -#define EMC_CFG_SYNC 0x4d4 -#define EMC_CLKEN_OVERRIDE 0x140 -#define EMC_R2R 0x144 -#define EMC_W2W 0x148 -#define EMC_EINPUT 0x14c -#define EMC_EINPUT_DURATION 0x150 -#define EMC_PUTERM_EXTRA 0x154 -#define EMC_TCKESR 0x158 -#define EMC_TPD 0x15c -#define EMC_STAT_CONTROL 0x160 -#define EMC_STAT_STATUS 0x164 -#define EMC_STAT_DRAM_CLOCK_LIMIT_LO 0x19c -#define EMC_STAT_DRAM_CLOCK_LIMIT_HI 0x1a0 -#define EMC_STAT_DRAM_CLOCKS_LO 0x1a4 -#define EMC_STAT_DRAM_CLOCKS_HI 0x1a8 -#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_LO 0x1ac -#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_HI 0x1b0 -#define EMC_STAT_DRAM_DEV0_READ_CNT_LO 0x1b4 -#define EMC_STAT_DRAM_DEV0_READ_CNT_HI 0x1b8 -#define EMC_STAT_DRAM_DEV0_READ8_CNT_LO 0x1bc -#define EMC_STAT_DRAM_DEV0_READ8_CNT_HI 0x1c0 -#define EMC_STAT_DRAM_DEV0_WRITE_CNT_LO 0x1c4 -#define EMC_STAT_DRAM_DEV0_WRITE_CNT_HI 0x1c8 -#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_LO 0x1cc -#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_HI 0x1d0 -#define EMC_STAT_DRAM_DEV0_REF_CNT_LO 0x1d4 -#define EMC_STAT_DRAM_DEV0_REF_CNT_HI 0x1d8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1dc -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e0 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1e4 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1ec -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f0 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1f4 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x1fc -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x200 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x204 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x208 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x20c -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x210 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x214 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x218 -#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_LO 0x21c -#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_HI 0x220 -#define EMC_STAT_DRAM_DEV0_DSR 0x224 -#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_LO 0x228 -#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_HI 0x22c -#define EMC_STAT_DRAM_DEV1_READ_CNT_LO 0x230 -#define EMC_STAT_DRAM_DEV1_READ_CNT_HI 0x234 -#define EMC_STAT_DRAM_DEV1_READ8_CNT_LO 0x238 -#define EMC_STAT_DRAM_DEV1_READ8_CNT_HI 0x23c -#define EMC_STAT_DRAM_DEV1_WRITE_CNT_LO 0x240 -#define EMC_STAT_DRAM_DEV1_WRITE_CNT_HI 0x244 -#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_LO 0x248 -#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_HI 0x24c -#define EMC_STAT_DRAM_DEV1_REF_CNT_LO 0x250 -#define EMC_STAT_DRAM_DEV1_REF_CNT_HI 0x254 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x258 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x25c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x260 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x264 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x268 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x26c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x270 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x274 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x278 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x27c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x280 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x284 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x288 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x28c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x290 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x294 -#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_LO 0x298 -#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_HI 0x29c -#define EMC_STAT_DRAM_DEV1_DSR 0x2a0 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc8c -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc90 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc94 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc98 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xc9c -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xca4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca8 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcac -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcb4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb8 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcbc -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcc4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc8 -#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_LO 0xccc -#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_HI 0xcd0 -#define EMC_STAT_DRAM_IO_DSR 0xcd4 -#define EMC_AUTO_CAL_CONFIG 0x2a4 -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_COMPUTE_START (1 << 0) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_MEASURE_STALL (1 << 9) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_UPDATE_STALL (1 << 10) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE (1 << 29) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_START (1 << 31) - -#define EMC_AUTO_CAL_CONFIG2 0x458 -#define EMC_AUTO_CAL_CONFIG3 0x45c -#define EMC_AUTO_CAL_CONFIG4 0x5b0 -#define EMC_AUTO_CAL_CONFIG5 0x5b4 -#define EMC_AUTO_CAL_CONFIG6 0x5cc -#define EMC_AUTO_CAL_CONFIG7 0x574 -#define EMC_AUTO_CAL_CONFIG8 0x2dc -#define EMC_AUTO_CAL_VREF_SEL_0 0x2f8 -#define EMC_AUTO_CAL_VREF_SEL_1 0x300 -#define EMC_AUTO_CAL_INTERVAL 0x2a8 -#define EMC_AUTO_CAL_STATUS 0x2ac -#define EMC_AUTO_CAL_STATUS2 0x3d4 -#define EMC_AUTO_CAL_CHANNEL 0x464 -#define EMC_PMACRO_RX_TERM 0xc48 -#define EMC_PMACRO_DQ_TX_DRV 0xc70 -#define EMC_PMACRO_CA_TX_DRV 0xc74 -#define EMC_PMACRO_CMD_TX_DRV 0xc4c -#define EMC_PMACRO_AUTOCAL_CFG_0 0x700 -#define EMC_PMACRO_AUTOCAL_CFG_1 0x704 -#define EMC_PMACRO_AUTOCAL_CFG_2 0x708 -#define EMC_PMACRO_AUTOCAL_CFG_COMMON 0xc78 -#define EMC_PMACRO_AUTOCAL_CFG_COMMON_E_CAL_BYPASS_DVFS (1 << 16) - -#define EMC_PMACRO_ZCTRL 0xc44 -#define EMC_XM2COMPPADCTRL 0x30c -#define EMC_XM2COMPPADCTRL_VREF_CAL_ENABLE (1 << 10) - -#define EMC_XM2COMPPADCTRL2 0x578 -#define EMC_XM2COMPPADCTRL3 0x2f4 -#define EMC_COMP_PAD_SW_CTRL 0x57c -#define EMC_REQ_CTRL 0x2b0 -#define EMC_EMC_STATUS 0x2b4 -#define EMC_EMC_STATUS_MRR_DIVLD (1 << 20) -#define EMC_EMC_STATUS_TIMING_UPDATE_STALLED (1 << 23) -#define EMC_EMC_STATUS_DRAM_IN_POWERDOWN_SHIFT 4 -#define EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK \ - (0x3 << EMC_EMC_STATUS_DRAM_IN_POWERDOWN_SHIFT) -#define EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_SHIFT 8 -#define EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK \ - (0x3 << EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_SHIFT) - -#define EMC_CFG_2 0x2b8 -#define EMC_CFG_DIG_DLL 0x2bc -#define EMC_CFG_DIG_DLL_CFG_DLL_EN (1 << 0) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_UNTIL_LOCK (1 << 1) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_TRAFFIC (1 << 3) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_RW_UNTIL_LOCK (1 << 4) -#define EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT 6 -#define EMC_CFG_DIG_DLL_CFG_DLL_MODE_MASK \ - (0x3 << EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT) -#define EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_SHIFT 8 -#define EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_MASK \ - (0x7 << EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_SHIFT) - -#define EMC_CFG_DIG_DLL_PERIOD 0x2c0 -#define EMC_DIG_DLL_STATUS 0x2c4 -#define EMC_DIG_DLL_STATUS_DLL_LOCK (1 << 15) -#define EMC_DIG_DLL_STATUS_DLL_PRIV_UPDATED (1 << 17) -#define EMC_DIG_DLL_STATUS_DLL_OUT_SHIFT 0 -#define EMC_DIG_DLL_STATUS_DLL_OUT_MASK \ - (0x7ff << EMC_DIG_DLL_STATUS_DLL_OUT_SHIFT) - -#define EMC_CFG_DIG_DLL_1 0x2c8 -#define EMC_RDV_MASK 0x2cc -#define EMC_WDV_MASK 0x2d0 -#define EMC_RDV_EARLY_MASK 0x2d4 -#define EMC_RDV_EARLY 0x2d8 -#define EMC_WDV_CHK 0x4e0 -#define EMC_ZCAL_INTERVAL 0x2e0 -#define EMC_ZCAL_WAIT_CNT 0x2e4 -#define EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK 0x7ff -#define EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_SHIFT 0 - -#define EMC_ZCAL_MRW_CMD 0x2e8 -#define EMC_ZQ_CAL 0x2ec -#define EMC_ZQ_CAL_DEV_SEL_SHIFT 30 -#define EMC_ZQ_CAL_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) -#define EMC_ZQ_CAL_LONG (1 << 4) -#define EMC_ZQ_CAL_ZQ_LATCH_CMD (1 << 1) -#define EMC_ZQ_CAL_ZQ_CAL_CMD (1 << 0) -#define EMC_ZQ_CAL_LONG_CMD_DEV0 \ - (DRAM_DEV_SEL_0 | EMC_ZQ_CAL_LONG | EMC_ZQ_CAL_CMD) -#define EMC_ZQ_CAL_LONG_CMD_DEV1 \ - (DRAM_DEV_SEL_1 | EMC_ZQ_CAL_LONG | EMC_ZQ_CAL_CMD) - -#define EMC_SCRATCH0 0x324 -#define EMC_STALL_THEN_EXE_BEFORE_CLKCHANGE 0x3c8 -#define EMC_STALL_THEN_EXE_AFTER_CLKCHANGE 0x3cc -#define EMC_UNSTALL_RW_AFTER_CLKCHANGE 0x3d0 -#define EMC_FDPD_CTRL_CMD_NO_RAMP 0x4d8 -#define EMC_FDPD_CTRL_CMD_NO_RAMP_CMD_DPD_NO_RAMP_ENABLE (1 << 0) - -#define EMC_SEL_DPD_CTRL 0x3d8 -#define EMC_SEL_DPD_CTRL_DATA_SEL_DPD_EN (1 << 8) -#define EMC_SEL_DPD_CTRL_ODT_SEL_DPD_EN (1 << 5) -#define EMC_SEL_DPD_CTRL_RESET_SEL_DPD_EN (1 << 4) -#define EMC_SEL_DPD_CTRL_CA_SEL_DPD_EN (1 << 3) -#define EMC_SEL_DPD_CTRL_CLK_SEL_DPD_EN (1 << 2) -#define EMC_SEL_DPD_CTRL_DDR3_MASK \ - ((0xf << 2) | (0x1 << 8)) -#define EMC_SEL_DPD_CTRL_MAS \ - ((0x3 << 2) | (0x1 << 5) | (0x1 << 8)) - -#define EMC_FDPD_CTRL_DQ 0x310 -#define EMC_FDPD_CTRL_CMD 0x314 -#define EMC_PRE_REFRESH_REQ_CNT 0x3dc -#define EMC_REFCTRL2 0x580 -#define EMC_FBIO_CFG7 0x584 -#define EMC_FBIO_CFG7_CH0_ENABLE (1 << 1) -#define EMC_FBIO_CFG7_CH1_ENABLE (1 << 2) - -#define EMC_DATA_BRLSHFT_0 0x588 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_SHIFT 21 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_SHIFT 18 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_SHIFT 15 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_SHIFT 12 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_SHIFT 9 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_SHIFT 6 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT 3 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT 0 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT) - -#define EMC_DATA_BRLSHFT_1 0x58c -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_SHIFT 21 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_SHIFT 18 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_SHIFT 15 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_SHIFT 12 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_SHIFT 9 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_SHIFT 6 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_SHIFT 3 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_SHIFT 0 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_SHIFT) - -#define EMC_DQS_BRLSHFT_0 0x594 -#define EMC_DQS_BRLSHFT_1 0x598 -#define EMC_CMD_BRLSHFT_0 0x59c -#define EMC_CMD_BRLSHFT_1 0x5a0 -#define EMC_CMD_BRLSHFT_2 0x5a4 -#define EMC_CMD_BRLSHFT_3 0x5a8 -#define EMC_QUSE_BRLSHFT_0 0x5ac -#define EMC_QUSE_BRLSHFT_1 0x5b8 -#define EMC_QUSE_BRLSHFT_2 0x5bc -#define EMC_QUSE_BRLSHFT_3 0x5c4 -#define EMC_FBIO_CFG8 0x5c8 -#define EMC_CMD_MAPPING_CMD0_0 0x380 -#define EMC_CMD_MAPPING_CMD0_1 0x384 -#define EMC_CMD_MAPPING_CMD0_2 0x388 -#define EMC_CMD_MAPPING_CMD1_0 0x38c -#define EMC_CMD_MAPPING_CMD1_1 0x390 -#define EMC_CMD_MAPPING_CMD1_2 0x394 -#define EMC_CMD_MAPPING_CMD2_0 0x398 -#define EMC_CMD_MAPPING_CMD2_1 0x39c -#define EMC_CMD_MAPPING_CMD2_2 0x3a0 -#define EMC_CMD_MAPPING_CMD3_0 0x3a4 -#define EMC_CMD_MAPPING_CMD3_1 0x3a8 -#define EMC_CMD_MAPPING_CMD3_2 0x3ac -#define EMC_CMD_MAPPING_BYTE 0x3b0 -#define EMC_DYN_SELF_REF_CONTROL 0x3e0 -#define EMC_TXSRDLL 0x3e4 -#define EMC_CCFIFO_ADDR 0x3e8 -#define EMC_CCFIFO_DATA 0x3ec -#define EMC_CCFIFO_STATUS 0x3f0 -#define EMC_SWIZZLE_RANK0_BYTE0 0x404 -#define EMC_SWIZZLE_RANK0_BYTE1 0x408 -#define EMC_SWIZZLE_RANK0_BYTE2 0x40c -#define EMC_SWIZZLE_RANK0_BYTE3 0x410 -#define EMC_SWIZZLE_RANK1_BYTE0 0x418 -#define EMC_SWIZZLE_RANK1_BYTE1 0x41c -#define EMC_SWIZZLE_RANK1_BYTE2 0x420 -#define EMC_SWIZZLE_RANK1_BYTE3 0x424 -#define EMC_TR_TIMING_0 0x3b4 -#define EMC_TR_CTRL_0 0x3b8 -#define EMC_TR_CTRL_1 0x3bc -#define EMC_TR_DVFS 0x460 -#define EMC_TR_DVFS_TRAINING_DVFS (1 << 0) - -#define EMC_SWITCH_BACK_CTRL 0x3c0 -#define EMC_TR_RDV 0x3c4 -#define EMC_TR_QPOP 0x3f4 -#define EMC_TR_RDV_MASK 0x3f8 -#define EMC_TR_QSAFE 0x3fc -#define EMC_TR_QRST 0x400 -#define EMC_IBDLY 0x468 -#define EMC_OBDLY 0x46c -#define EMC_TXDSRVTTGEN 0x480 -#define EMC_WE_DURATION 0x48c -#define EMC_WS_DURATION 0x490 -#define EMC_WEV 0x494 -#define EMC_WSV 0x498 -#define EMC_CFG_3 0x49c -#define EMC_CFG_PIPE_2 0x554 -#define EMC_CFG_PIPE_CLK 0x558 -#define EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON (1 << 0) - -#define EMC_CFG_PIPE_1 0x55c -#define EMC_CFG_PIPE 0x560 -#define EMC_QPOP 0x564 -#define EMC_QUSE_WIDTH 0x568 -#define EMC_PUTERM_WIDTH 0x56c -#define EMC_PROTOBIST_CONFIG_ADR_1 0x5d0 -#define EMC_PROTOBIST_CONFIG_ADR_2 0x5d4 -#define EMC_PROTOBIST_MISC 0x5d8 -#define EMC_PROTOBIST_WDATA_LOWER 0x5dc -#define EMC_PROTOBIST_WDATA_UPPER 0x5e0 -#define EMC_PROTOBIST_RDATA 0x5ec -#define EMC_DLL_CFG_0 0x5e4 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_IGNORE_START (1 << 29) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_DUAL_PASS_LOCK (1 << 28) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_SHIFT 24 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_SHIFT 20 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_SHIFT 16 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_SHIFT 12 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_SHIFT 4 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_MASK \ - (0xff << EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_SHIFT 0 -#define EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_SHIFT) - -#define EMC_DLL_CFG_1 0x5e8 -#define EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_SHIFT 10 -#define EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_MASK \ - (0x7ff << EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_SHIFT) - -#define EMC_TRAINING_CMD 0xe00 -#define EMC_TRAINING_CMD_PRIME (1 << 0) -#define EMC_TRAINING_CMD_CA (1 << 1) -#define EMC_TRAINING_CMD_RD (1 << 2) -#define EMC_TRAINING_CMD_WR (1 << 3) -#define EMC_TRAINING_CMD_QUSE (1 << 4) -#define EMC_TRAINING_CMD_CA_VREF (1 << 5) -#define EMC_TRAINING_CMD_RD_VREF (1 << 6) -#define EMC_TRAINING_CMD_WR_VREF (1 << 7) -#define EMC_TRAINING_CMD_QUSE_VREF (1 << 8) -#define EMC_TRAINING_CMD_GO (1 << 31) - -#define EMC_TRAINING_CTRL 0xe04 -#define EMC_TRAINING_CTRL_SWAP_RANK (1 << 14) - -#define EMC_TRAINING_STATUS 0xe08 -#define EMC_TRAINING_QUSE_CORS_CTRL 0xe0c -#define EMC_TRAINING_QUSE_FINE_CTRL 0xe10 -#define EMC_TRAINING_QUSE_CTRL_MISC 0xe14 -#define EMC_TRAINING_WRITE_FINE_CTRL 0xe18 -#define EMC_TRAINING_WRITE_CTRL_MISC 0xe1c -#define EMC_TRAINING_WRITE_VREF_CTRL 0xe20 -#define EMC_TRAINING_READ_FINE_CTRL 0xe24 -#define EMC_TRAINING_READ_CTRL_MISC 0xe28 -#define EMC_TRAINING_READ_VREF_CTRL 0xe2c -#define EMC_TRAINING_CA_FINE_CTRL 0xe30 -#define EMC_TRAINING_CA_CTRL_MISC 0xe34 -#define EMC_TRAINING_CA_CTRL_MISC1 0xe38 -#define EMC_TRAINING_CA_VREF_CTRL 0xe3c -#define EMC_TRAINING_CA_TADR_CTRL 0xe40 -#define EMC_TRAINING_SETTLE 0xe44 -#define EMC_TRAINING_DEBUG_CTRL 0xe48 -#define EMC_TRAINING_DEBUG_DQ0 0xe4c -#define EMC_TRAINING_DEBUG_DQ1 0xe50 -#define EMC_TRAINING_DEBUG_DQ2 0xe54 -#define EMC_TRAINING_DEBUG_DQ3 0xe58 -#define EMC_TRAINING_MPC 0xe5c -#define EMC_TRAINING_PATRAM_CTRL 0xe60 -#define EMC_TRAINING_PATRAM_DQ 0xe64 -#define EMC_TRAINING_PATRAM_DMI 0xe68 -#define EMC_TRAINING_VREF_SETTLE 0xe6c -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE0 0xe70 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE1 0xe74 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE2 0xe78 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE3 0xe7c -#define EMC_TRAINING_RW_EYE_CENTER_IB_MISC 0xe80 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE0 0xe84 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE1 0xe88 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE2 0xe8c -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE3 0xe90 -#define EMC_TRAINING_RW_EYE_CENTER_OB_MISC 0xe94 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE0 0xe98 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE1 0xe9c -#define EMC_TRAINING_RW_OFFSET_IB_BYTE2 0xea0 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE3 0xea4 -#define EMC_TRAINING_RW_OFFSET_IB_MISC 0xea8 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE0 0xeac -#define EMC_TRAINING_RW_OFFSET_OB_BYTE1 0xeb0 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE2 0xeb4 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE3 0xeb8 -#define EMC_TRAINING_RW_OFFSET_OB_MISC 0xebc -#define EMC_TRAINING_OPT_CA_VREF 0xec0 -#define EMC_TRAINING_OPT_DQ_OB_VREF 0xec4 -#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK0 0xec8 -#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK1 0xecc -#define EMC_TRAINING_QUSE_VREF_CTRL 0xed0 -#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK0 0xed4 -#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK1 0xed8 -#define EMC_TRAINING_DRAMC_TIMING 0xedc -#define EMC_PMACRO_QUSE_DDLL_RANK0_0 0x600 -#define EMC_PMACRO_QUSE_DDLL_RANK0_1 0x604 -#define EMC_PMACRO_QUSE_DDLL_RANK0_2 0x608 -#define EMC_PMACRO_QUSE_DDLL_RANK0_3 0x60c -#define EMC_PMACRO_QUSE_DDLL_RANK0_4 0x610 -#define EMC_PMACRO_QUSE_DDLL_RANK0_5 0x614 -#define EMC_PMACRO_QUSE_DDLL_RANK1_0 0x620 -#define EMC_PMACRO_QUSE_DDLL_RANK1_1 0x624 -#define EMC_PMACRO_QUSE_DDLL_RANK1_2 0x628 -#define EMC_PMACRO_QUSE_DDLL_RANK1_3 0x62c -#define EMC_PMACRO_QUSE_DDLL_RANK1_4 0x630 -#define EMC_PMACRO_QUSE_DDLL_RANK1_5 0x634 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 0x640 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 0x644 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 0x648 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 0x64c -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4 0x650 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5 0x654 - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 0x660 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 0x664 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 0x668 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 0x66c -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4 0x670 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5 0x674 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0 0x680 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1 0x684 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2 0x688 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3 0x68c -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4 0x690 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5 0x694 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0 0x6a0 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1 0x6a4 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2 0x6a8 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3 0x6ac -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4 0x6b0 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5 0x6b4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0 0x6c0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1 0x6c4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2 0x6c8 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3 0x6cc -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_4 0x6d0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_5 0x6d4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0 0x6e0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1 0x6e4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2 0x6e8 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3 0x6ec -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_4 0x6f0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_5 0x6f4 -#define EMC_PMACRO_TX_PWRD_0 0x720 -#define EMC_PMACRO_TX_PWRD_1 0x724 -#define EMC_PMACRO_TX_PWRD_2 0x728 -#define EMC_PMACRO_TX_PWRD_3 0x72c -#define EMC_PMACRO_TX_PWRD_4 0x730 -#define EMC_PMACRO_TX_PWRD_5 0x734 -#define EMC_PMACRO_TX_SEL_CLK_SRC_0 0x740 -#define EMC_PMACRO_TX_SEL_CLK_SRC_1 0x744 -#define EMC_PMACRO_TX_SEL_CLK_SRC_3 0x74c -#define EMC_PMACRO_TX_SEL_CLK_SRC_2 0x748 -#define EMC_PMACRO_TX_SEL_CLK_SRC_4 0x750 -#define EMC_PMACRO_TX_SEL_CLK_SRC_5 0x754 -#define EMC_PMACRO_DDLL_BYPASS 0x760 -#define EMC_PMACRO_DDLL_PWRD_0 0x770 -#define EMC_PMACRO_DDLL_PWRD_1 0x774 -#define EMC_PMACRO_DDLL_PWRD_2 0x778 -#define EMC_PMACRO_CMD_CTRL_0 0x780 -#define EMC_PMACRO_CMD_CTRL_1 0x784 -#define EMC_PMACRO_CMD_CTRL_2 0x788 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0x800 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0x804 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0x808 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_3 0x80c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0x810 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0x814 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0x818 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_3 0x81c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0x820 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0x824 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0x828 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_3 0x82c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0x830 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0x834 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0x838 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_3 0x83c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0x840 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0x844 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0x848 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_3 0x84c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0x850 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0x854 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0x858 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_3 0x85c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0x860 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0x864 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0x868 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_3 0x86c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0x870 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0x874 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0x878 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_3 0x87c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0 0x880 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1 0x884 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2 0x888 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_3 0x88c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0 0x890 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1 0x894 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2 0x898 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_3 0x89c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0 0x8a0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1 0x8a4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2 0x8a8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_3 0x8ac -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0 0x8b0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1 0x8b4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2 0x8b8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_3 0x8bc -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0x900 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0x904 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0x908 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_3 0x90c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0x910 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0x914 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0x918 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_3 0x91c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0x920 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0x924 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0x928 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_3 0x92c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0x930 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0x934 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0x938 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_3 0x93c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0x940 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0x944 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0x948 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_3 0x94c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0x950 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0x954 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0x958 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_3 0x95c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0x960 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0x964 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0x968 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_3 0x96c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0x970 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0x974 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0x978 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_3 0x97c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_0 0x980 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_1 0x984 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_2 0x988 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_3 0x98c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_0 0x990 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_1 0x994 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_2 0x998 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_3 0x99c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_0 0x9a0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_1 0x9a4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_2 0x9a8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_3 0x9ac -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_0 0x9b0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_1 0x9b4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_2 0x9b8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_3 0x9bc -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0xa00 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0xa04 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0xa08 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0xa10 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0xa14 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0xa18 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0xa20 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0xa24 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0xa28 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0xa30 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0xa34 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0xa38 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0xa40 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0xa44 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0xa48 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0xa50 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0xa54 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0xa58 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0xa60 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0xa64 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0xa68 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0xa70 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0xa74 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0xa78 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_0 0xa80 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_1 0xa84 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_2 0xa88 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_0 0xa90 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_1 0xa94 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_2 0xa98 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_0 0xaa0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_1 0xaa4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_2 0xaa8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_0 0xab0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_1 0xab4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_2 0xab8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0xb00 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0xb04 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0xb08 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0xb10 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0xb14 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0xb18 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0xb20 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0xb24 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0xb28 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0xb30 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0xb34 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0xb38 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0xb40 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0xb44 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0xb48 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0xb50 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0xb54 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0xb58 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0xb60 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0xb64 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0xb68 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0xb70 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0xb74 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0xb78 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_0 0xb80 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_1 0xb84 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_2 0xb88 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_0 0xb90 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_1 0xb94 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_2 0xb98 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_0 0xba0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_1 0xba4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_2 0xba8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_0 0xbb0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_1 0xbb4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_2 0xbb8 -#define EMC_PMACRO_IB_VREF_DQ_0 0xbe0 -#define EMC_PMACRO_IB_VREF_DQ_1 0xbe4 -#define EMC_PMACRO_IB_VREF_DQ_2 0xbe8 -#define EMC_PMACRO_IB_VREF_DQS_0 0xbf0 -#define EMC_PMACRO_IB_VREF_DQS_1 0xbf4 -#define EMC_PMACRO_IB_VREF_DQS_2 0xbf8 -#define EMC_PMACRO_IB_RXRT 0xcf4 -#define EMC_PMACRO_DDLL_LONG_CMD_0 0xc00 -#define EMC_PMACRO_DDLL_LONG_CMD_1 0xc04 -#define EMC_PMACRO_DDLL_LONG_CMD_2 0xc08 -#define EMC_PMACRO_DDLL_LONG_CMD_3 0xc0c -#define EMC_PMACRO_DDLL_LONG_CMD_4 0xc10 -#define EMC_PMACRO_DDLL_LONG_CMD_5 0xc14 -#define EMC_PMACRO_DDLL_SHORT_CMD_0 0xc20 -#define EMC_PMACRO_DDLL_SHORT_CMD_1 0xc24 -#define EMC_PMACRO_DDLL_SHORT_CMD_2 0xc28 -#define EMC_PMACRO_CFG_PM_GLOBAL_0 0xc30 -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0 (1 << 16) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE1 (1 << 17) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE2 (1 << 18) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE3 (1 << 19) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE4 (1 << 20) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE5 (1 << 21) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE6 (1 << 22) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE7 (1 << 23) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD0 (1 << 24) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD1 (1 << 25) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD2 (1 << 26) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD3 (1 << 27) - -#define EMC_PMACRO_VTTGEN_CTRL_0 0xc34 -#define EMC_PMACRO_VTTGEN_CTRL_1 0xc38 -#define EMC_PMACRO_VTTGEN_CTRL_2 0xcf0 -#define EMC_PMACRO_BG_BIAS_CTRL_0 0xc3c -#define EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD (1 << 0) -#define EMC_PMACRO_BG_BIAS_CTRL_0_BG_MODE (1 << 1) -#define EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD (1 << 2) - -#define EMC_PMACRO_PAD_CFG_CTRL 0xc40 -#define EMC_PMACRO_CMD_PAD_RX_CTRL 0xc50 -#define EMC_PMACRO_DATA_PAD_RX_CTRL 0xc54 -#define EMC_PMACRO_CMD_RX_TERM_MODE 0xc58 -#define EMC_PMACRO_DATA_RX_TERM_MODE 0xc5c -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_SHIFT 8 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_SHIFT) -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_SHIFT 4 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_SHIFT) -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_SHIFT 0 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_SHIFT) - -#define RX_TERM_MODE \ - ~(EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_MASK | \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_MASK | \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_MASK) - -#define EMC_PMACRO_CMD_PAD_TX_CTRL 0xc60 -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC (1 << 1) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC (1 << 9) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC (1 << 16) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC (1 << 24) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON (1 << 26) - -#define EMC_PMACRO_DATA_PAD_TX_CTRL 0xc64 -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF (1 << 0) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC (1 << 1) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF (1 << 8) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC (1 << 9) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC (1 << 16) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC (1 << 24) - -#define EMC_PMACRO_COMMON_PAD_TX_CTRL 0xc68 -#define EMC_PMACRO_BRICK_MAPPING_0 0xc80 -#define EMC_PMACRO_BRICK_MAPPING_1 0xc84 -#define EMC_PMACRO_BRICK_MAPPING_2 0xc88 -#define EMC_PMACRO_DDLLCAL_CAL 0xce0 -#define EMC_PMACRO_DDLL_OFFSET 0xce4 -#define EMC_PMACRO_DDLL_PERIODIC_OFFSET 0xce8 -#define EMC_PMACRO_BRICK_CTRL_RFU1 0x330 -#define EMC_PMACRO_BRICK_CTRL_RFU2 0x334 -#define EMC_PMACRO_CMD_BRICK_CTRL_FDPD 0x318 -#define EMC_PMACRO_DATA_BRICK_CTRL_FDPD 0x31c -#define EMC_PMACRO_TRAINING_CTRL_0 0xcf8 -#define EMC_PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR (1 << 3) - -#define EMC_PMACRO_TRAINING_CTRL_1 0xcfc -#define EMC_PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR (1 << 3) - -#define EMC_PMC_SCRATCH1 0x440 -#define EMC_PMC_SCRATCH2 0x444 -#define EMC_PMC_SCRATCH3 0x448 - -#define EMC_PMACRO_PERBIT_FGCG_CTRL_0 0xd40 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_1 0xd44 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_2 0xd48 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_3 0xd4c -#define EMC_PMACRO_PERBIT_FGCG_CTRL_4 0xd50 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_5 0xd54 -#define EMC_PMACRO_PERBIT_RFU_CTRL_0 0xd60 -#define EMC_PMACRO_PERBIT_RFU_CTRL_1 0xd64 -#define EMC_PMACRO_PERBIT_RFU_CTRL_2 0xd68 -#define EMC_PMACRO_PERBIT_RFU_CTRL_3 0xd6c -#define EMC_PMACRO_PERBIT_RFU_CTRL_4 0xd70 -#define EMC_PMACRO_PERBIT_RFU_CTRL_5 0xd74 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_0 0xd80 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_1 0xd84 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_2 0xd88 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_3 0xd8c -#define EMC_PMACRO_PERBIT_RFU1_CTRL_4 0xd90 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_5 0xd94 - -#define EMC_PMACRO_PMU_OUT_EOFF1_0 0xda0 -#define EMC_PMACRO_PMU_OUT_EOFF1_1 0xda4 -#define EMC_PMACRO_PMU_OUT_EOFF1_2 0xda8 -#define EMC_PMACRO_PMU_OUT_EOFF1_3 0xdac -#define EMC_PMACRO_PMU_OUT_EOFF1_4 0xdb0 -#define EMC_PMACRO_PMU_OUT_EOFF1_5 0xdb4 - -#define EMC_PMACRO_COMP_PMU_OUT 0xdc0 -#define EMC_PMACRO_DATA_PI_CTRL 0x110 -#define EMC_PMACRO_CMD_PI_CTRL 0x114 - -#define EMC_AUTO_CAL_CONFIG9 0x42c - -#define EMC_TRTM 0xbc -#define EMC_TWTM 0xf8 -#define EMC_TRATM 0xfc -#define EMC_TWATM 0x108 -#define EMC_TR2REF 0x10c - -#define EMC_PMACRO_DSR_VTTGEN_CTRL_0 0xc6c - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.c b/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.c deleted file mode 100644 index 88c01c812..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "exception_handlers.h" -#include "utils.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/vsprintf.h" - -#define CODE_DUMP_SIZE 0x30 -#define STACK_DUMP_SIZE 0x30 - -extern const uint32_t exception_handler_table[]; - -static const char *exception_names[] = { - "Reset", "Undefined instruction", "SWI", "Prefetch abort", "Data abort", "Reserved", "IRQ", "FIQ", -}; - -static const char *register_names[] = { - "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", - "SP", "LR", "PC", "CPSR", -}; - -/* Adapted from https://gist.github.com/ccbrown/9722406 */ -static void hexdump(const void* data, size_t size, uintptr_t addrbase, char* strbuf) { - const uint8_t *d = (const uint8_t *)data; - char ascii[17] = {0}; - ascii[16] = '\0'; - - for (size_t i = 0; i < size; i++) { - if (i % 16 == 0) { - strbuf += sprintf(strbuf, "%0*" PRIXPTR ": | ", 2 * sizeof(addrbase), addrbase + i); - } - strbuf += sprintf(strbuf, "%02X ", d[i]); - if (d[i] >= ' ' && d[i] <= '~') { - ascii[i % 16] = d[i]; - } else { - ascii[i % 16] = '.'; - } - if ((i+1) % 8 == 0 || i+1 == size) { - strbuf += sprintf(strbuf, " "); - if ((i+1) % 16 == 0) { - strbuf += sprintf(strbuf, "| %s \n", ascii); - } else if (i+1 == size) { - ascii[(i+1) % 16] = '\0'; - if ((i+1) % 16 <= 8) { - strbuf += sprintf(strbuf, " "); - } - for (size_t j = (i+1) % 16; j < 16; j++) { - strbuf += sprintf(strbuf, " "); - } - strbuf += sprintf(strbuf, "| %s \n", ascii); - } - } - } -} - -void setup_exception_handlers(void) { - volatile uint32_t *bpmp_exception_handler_table = (volatile uint32_t *)0x6000F200; - for (int i = 0; i < 8; i++) { - if (exception_handler_table[i] != 0) { - bpmp_exception_handler_table[i] = exception_handler_table[i]; - } - } -} - -void exception_handler_main(uint32_t *registers, unsigned int exception_type) { - char exception_log[0x400] = {0}; - uint8_t code_dump[CODE_DUMP_SIZE] = {0}; - uint8_t stack_dump[STACK_DUMP_SIZE] = {0}; - size_t code_dump_size = 0; - size_t stack_dump_size = 0; - - uint32_t pc = registers[15]; - uint32_t cpsr = registers[16]; - uint32_t instr_addr = pc + ((cpsr & 0x20) ? 2 : 4) - CODE_DUMP_SIZE; - - sprintf(exception_log, "An exception occurred!\n"); - - code_dump_size = safecpy(code_dump, (const void *)instr_addr, CODE_DUMP_SIZE); - stack_dump_size = safecpy(stack_dump, (const void *)registers[13], STACK_DUMP_SIZE); - - sprintf(exception_log + strlen(exception_log), "\nException type: %s\n", exception_names[exception_type]); - sprintf(exception_log + strlen(exception_log), "\nRegisters:\n"); - - /* Print r0 to pc. */ - for (int i = 0; i < 16; i += 2) { - sprintf(exception_log + strlen(exception_log), "%-7s%08"PRIX32" %-7s%08"PRIX32"\n", - register_names[i], registers[i], register_names[i+1], registers[i+1]); - } - - /* Print cpsr. */ - sprintf(exception_log + strlen(exception_log), "%-7s%08"PRIX32"\n", register_names[16], registers[16]); - - /* Print code and stack regions. */ - sprintf(exception_log + strlen(exception_log), "\nCode dump:\n"); - hexdump(code_dump, code_dump_size, instr_addr, exception_log + strlen(exception_log)); - sprintf(exception_log + strlen(exception_log), "\nStack dump:\n"); - hexdump(stack_dump, stack_dump_size, registers[13], exception_log + strlen(exception_log)); - sprintf(exception_log + strlen(exception_log), "\n"); - - /* Throw fatal error with the full exception log. */ - fatal_error(exception_log); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.h b/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.h deleted file mode 100644 index 8cbd1c07f..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_EXCEPTION_HANDLERS_H -#define FUSEE_EXCEPTION_HANDLERS_H - -#include -#include - -/* Copies up to len bytes, stops and returns the read length on data fault. */ -size_t safecpy(void *dst, const void *src, size_t len); - -void setup_exception_handlers(void); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers_asm.s b/fusee/fusee-primary/fusee-primary-main/src/exception_handlers_asm.s deleted file mode 100644 index 4404c565a..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/exception_handlers_asm.s +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -.macro GEN_USUAL_HANDLER name, index, lr_arm_displ, lr_thumb_displ - _exception_handler_\name: - ldr sp, =_regs - stmia sp!, {r0-r7} - - /* Adjust lr to make it point to the location where the exception occured. */ - mrs r1, spsr - tst r1, #0x20 - subeq lr, lr, #\lr_arm_displ - subne lr, lr, #\lr_thumb_displ - - mov r0, sp - mov r1, #\index - b _exception_handler_common -.endm - -.section .text.exception_handlers_asm, "ax", %progbits -.arm -.align 5 - -_exception_handler_common: - mrs r2, spsr - mrs r3, cpsr - - /* Mask interrupts. */ - orr r3, #0xC0 - msr cpsr_cx, r3 - - /* Switch to the mode that triggered the interrupt, get the remaining regs, switch back. */ - ands r4, r2, #0xF - moveq r4, #0xF /* usr => sys */ - bic r5, r3, #0xF - orr r5, r4 - msr cpsr_c, r5 - stmia r0!, {r8-lr} - msr cpsr_c, r3 - - str lr, [r0], #4 - str r2, [r0] - - /* Finally, switch to system mode, setting interrupts and clearing the flags; set sp as well. */ - msr cpsr_cxsf, #0xDF - ldr sp, =(_exception_handler_stack + 0x1000) - ldr r0, =_regs - bl exception_handler_main - b . - -GEN_USUAL_HANDLER undefined_instruction, 1, 4, 2 -GEN_USUAL_HANDLER swi, 2, 4, 2 -GEN_USUAL_HANDLER prefetch_abort, 3, 4, 4 -GEN_USUAL_HANDLER data_abort_normal, 4, 8, 8 -GEN_USUAL_HANDLER fiq, 7, 4, 4 - -_exception_handler_data_abort: - /* Mask interrupts (abort mode). */ - msr cpsr_cx, #0xD7 - - adr sp, safecpy+8 - cmp lr, sp - blo _exception_handler_data_abort_normal - adr sp, _safecpy_end+8 - cmp lr, sp - bhs _exception_handler_data_abort_normal - - /* Set the flags, set r12 to 0 for safecpy, return from exception. */ - msr spsr_f, #(1 << 30) - mov r12, #0 - subs pc, lr, #4 - -.global safecpy -.type safecpy, %function -safecpy: - push {r4, lr} - mov r3, #0 - movs r12, #1 - - _safecpy_loop: - ldrb r4, [r1, r3] - cmp r12, #0 - beq _safecpy_loop_end - strb r4, [r0, r3] - add r3, #1 - cmp r3, r2 - blo _safecpy_loop - - _safecpy_loop_end: - mov r0, r3 - pop {r4, lr} - bx lr /* Need to do that separately on ARMv4. */ - -_safecpy_end: - -.section .rodata.exception_handlers_asm, "a", %progbits -.align 2 -.global exception_handler_table -exception_handler_table: - .word 0 /* Reset */ - .word _exception_handler_undefined_instruction - .word _exception_handler_swi - .word _exception_handler_prefetch_abort - .word _exception_handler_data_abort - .word 0 /* Reserved */ - .word 0 /* IRQ */ - .word _exception_handler_fiq - -.section .bss.exception_handlers_asm, "w", %nobits -.align 4 -_exception_handler_stack: .skip 0x1000 -_regs: .skip (4 * 17) diff --git a/fusee/fusee-primary/fusee-primary-main/src/flow.h b/fusee/fusee-primary/fusee-primary-main/src/flow.h deleted file mode 100644 index 3b083bf1e..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/flow.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FLOW_CTLR_H -#define FUSEE_FLOW_CTLR_H - -#include - -#define FLOW_CTLR_BASE 0x60007000 -#define MAKE_FLOW_REG(n) MAKE_REG32(FLOW_CTLR_BASE + n) - -#define FLOW_CTLR_HALT_COP_EVENTS_0 MAKE_FLOW_REG(0x004) -#define FLOW_CTLR_RAM_REPAIR_0 MAKE_FLOW_REG(0x040) -#define FLOW_CTLR_FLOW_DBG_QUAL_0 MAKE_FLOW_REG(0x050) -#define FLOW_CTLR_L2FLUSH_CONTROL_0 MAKE_FLOW_REG(0x094) -#define FLOW_CTLR_BPMP_CLUSTER_CONTROL_0 MAKE_FLOW_REG(0x098) - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/fs_utils.c b/fusee/fusee-primary/fusee-primary-main/src/fs_utils.c deleted file mode 100644 index a1047ac02..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/fs_utils.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "fs_utils.h" -#include "mc.h" -#include "../../../fusee/common/fatfs/ff.h" -#include "../../../fusee/common/log.h" - -FATFS sd_fs; -static bool g_sd_mounted = false; -static bool g_sd_initialized = false; -static bool g_ahb_redirect_enabled = false; -sdmmc_t g_sd_sdmmc; -sdmmc_device_t g_sd_device; - - -bool mount_sd(void) -{ - /* Already mounted. */ - if (g_sd_mounted) - return true; - - /* Enable AHB redirection if necessary. */ - if (!g_ahb_redirect_enabled) { - mc_enable_ahb_redirect(); - g_ahb_redirect_enabled = true; - } - - if (!g_sd_initialized) { - /* Initialize SD. */ - if (sdmmc_device_sd_init(&g_sd_device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_SD_SDR104)) - { - g_sd_initialized = true; - - /* Mount SD. */ - if (f_mount(&sd_fs, "", 1) == FR_OK) { - print(SCREEN_LOG_LEVEL_INFO, "Mounted SD card!\n"); - g_sd_mounted = true; - } - } - else - fatal_error("Failed to initialize the SD card!.\n"); - } - - return g_sd_mounted; -} - -void unmount_sd(void) -{ - if (g_sd_mounted) - { - f_mount(NULL, "", 1); - sdmmc_device_finish(&g_sd_device); - g_sd_mounted = false; - } - - /* Disable AHB redirection if necessary. */ - if (g_ahb_redirect_enabled) { - mc_disable_ahb_redirect(); - g_ahb_redirect_enabled = false; - } -} - -uint32_t get_file_size(const char *filename) -{ - /* SD card hasn't been mounted yet. */ - if (!g_sd_mounted) - return 0; - - /* Open the file for reading. */ - FIL f; - if (f_open(&f, filename, FA_READ) != FR_OK) - return 0; - - /* Get the file size. */ - uint32_t file_size = f_size(&f); - - /* Close the file. */ - f_close(&f); - - return file_size; -} - -int read_from_file(void *dst, uint32_t dst_size, const char *filename) -{ - /* SD card hasn't been mounted yet. */ - if (!g_sd_mounted) - return 0; - - /* Open the file for reading. */ - FIL f; - if (f_open(&f, filename, FA_READ) != FR_OK) - return 0; - - /* Sync. */ - f_sync(&f); - - /* Read from file. */ - UINT br = 0; - int res = f_read(&f, dst, dst_size, &br); - f_close(&f); - - return (res == FR_OK) ? (int)br : 0; -} - -int write_to_file(void *src, uint32_t src_size, const char *filename) -{ - /* SD card hasn't been mounted yet. */ - if (!g_sd_mounted) - return 0; - - /* Open the file for writing. */ - FIL f; - if (f_open(&f, filename, FA_CREATE_ALWAYS | FA_WRITE) != FR_OK) - return 0; - - /* Sync. */ - f_sync(&f); - - /* Write to file. */ - UINT bw = 0; - int res = f_write(&f, src, src_size, &bw); - f_close(&f); - - return (res == FR_OK) ? (int)bw : 0; -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/fs_utils.h b/fusee/fusee-primary/fusee-primary-main/src/fs_utils.h deleted file mode 100644 index 057cff991..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/fs_utils.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FS_UTILS_H -#define FUSEE_FS_UTILS_H - -#include -#include - -#include "../../../fusee/common/sdmmc/sdmmc.h" -#include "utils.h" - -extern sdmmc_t g_sd_sdmmc; -extern sdmmc_device_t g_sd_device; - -bool mount_sd(void); -void unmount_sd(void); -uint32_t get_file_size(const char *filename); -int read_from_file(void *dst, uint32_t dst_size, const char *filename); -int write_to_file(void *src, uint32_t src_size, const char *filename); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/fuse.c b/fusee/fusee-primary/fusee-primary-main/src/fuse.c deleted file mode 100644 index a1de8fb14..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/fuse.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include - -#include "car.h" -#include "fuse.h" -#include "pmc.h" -#include "timers.h" - -/* Initialize the fuse driver */ -void fuse_init(void) { - /* Make all fuse registers visible, disable the private key and disable programming. */ - clkrst_enable_fuse_regs(true); - fuse_disable_private_key(); - fuse_disable_programming(); -} - -/* Disable access to the private key and set the TZ sticky bit. */ -void fuse_disable_private_key(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - fuse->FUSE_PRIVATEKEYDISABLE = 0x10; -} - -/* Disable all fuse programming. */ -void fuse_disable_programming(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - fuse->FUSE_DISABLEREGPROGRAM = 1; -} - -/* Enable power to the fuse hardware array. */ -void fuse_enable_power(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - pmc->fuse_control &= ~(0x200); /* Clear PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */ - mdelay(1); - pmc->fuse_control |= 0x100; /* Set PMC_FUSE_CTRL_PS18_LATCH_SET. */ - mdelay(1); -} - -/* Disable power to the fuse hardware array. */ -void fuse_disable_power(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - pmc->fuse_control &= ~(0x100); /* Clear PMC_FUSE_CTRL_PS18_LATCH_SET. */ - mdelay(1); - pmc->fuse_control |= 0x200; /* Set PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */ - mdelay(1); -} - -/* Wait for the fuse driver to go idle. */ -static void fuse_wait_idle(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - uint32_t ctrl_val = 0; - - /* Wait for STATE_IDLE */ - while ((ctrl_val & (0xF0000)) != 0x40000) { - ctrl_val = fuse->FUSE_FUSECTRL; - } -} - -/* Read a fuse from the hardware array. */ -uint32_t fuse_hw_read(uint32_t addr) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Program the target address. */ - fuse->FUSE_FUSEADDR = addr; - - /* Enable read operation in control register. */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x1; /* Set READ command. */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); - - return fuse->FUSE_FUSERDATA; -} - -/* Write a fuse in the hardware array. */ -void fuse_hw_write(uint32_t value, uint32_t addr) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Program the target address and value. */ - fuse->FUSE_FUSEADDR = addr; - fuse->FUSE_FUSEWDATA = value; - - /* Enable write operation in control register. */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x2; /* Set WRITE command. */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); -} - -/* Sense the fuse hardware array into the fuse cache. */ -void fuse_hw_sense(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Enable sense operation in control register */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x3; /* Set SENSE_CTRL command */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); -} - -/* Read the SKU info register. */ -uint32_t fuse_get_sku_info(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_SKU_INFO; -} - -/* Read the bootrom patch version. */ -uint32_t fuse_get_bootrom_patch_version(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_SOC_SPEEDO_1_CALIB; -} - -/* Read a spare bit register. */ -uint32_t fuse_get_spare_bit(uint32_t index) { - uint32_t soc_type = fuse_get_soc_type(); - if (soc_type == 0) { - if (index < 32) { - volatile tegra_fuse_chip_erista_t *fuse_chip = fuse_chip_erista_get_regs(); - return fuse_chip->FUSE_SPARE_BIT[index]; - } - } else if (soc_type == 1) { - if (index < 30) { - volatile tegra_fuse_chip_mariko_t *fuse_chip = fuse_chip_mariko_get_regs(); - return fuse_chip->FUSE_SPARE_BIT[index]; - } - } - return 0; -} - -/* Read a reserved ODM register. */ -uint32_t fuse_get_reserved_odm(uint32_t index) { - if (index < 8) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_RESERVED_ODM0[index]; - } else { - uint32_t soc_type = fuse_get_soc_type(); - if (soc_type == 1) { - volatile tegra_fuse_chip_mariko_t *fuse_chip = fuse_chip_mariko_get_regs(); - if (index < 22) { - return fuse_chip->FUSE_RESERVED_ODM8[index - 8]; - } else if (index < 25) { - return fuse_chip->FUSE_RESERVED_ODM22[index - 22]; - } else if (index < 26) { - return fuse_chip->FUSE_RESERVED_ODM25; - } else if (index < 29) { - return fuse_chip->FUSE_RESERVED_ODM26[index - 26]; - } else if (index < 30) { - return fuse_chip->FUSE_RESERVED_ODM29; - } - } - } - return 0; -} - -/* Get the DramId. */ -uint32_t fuse_get_dram_id(void) { - return ((fuse_get_reserved_odm(4) >> 3) & 0x1F); -} - -/* Derive the DeviceId. */ -uint64_t fuse_get_device_id(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - - uint64_t device_id = 0; - uint64_t y_coord = fuse_chip->FUSE_OPT_Y_COORDINATE & 0x1FF; - uint64_t x_coord = fuse_chip->FUSE_OPT_X_COORDINATE & 0x1FF; - uint64_t wafer_id = fuse_chip->FUSE_OPT_WAFER_ID & 0x3F; - uint32_t lot_code = fuse_chip->FUSE_OPT_LOT_CODE_0; - uint64_t fab_code = fuse_chip->FUSE_OPT_FAB_CODE & 0x3F; - - uint64_t derived_lot_code = 0; - for (unsigned int i = 0; i < 5; i++) { - derived_lot_code = (derived_lot_code * 0x24) + ((lot_code >> (24 - 6*i)) & 0x3F); - } - derived_lot_code &= 0x03FFFFFF; - - device_id |= y_coord << 0; - device_id |= x_coord << 9; - device_id |= wafer_id << 18; - device_id |= derived_lot_code << 24; - device_id |= fab_code << 50; - - return device_id; -} - -/* Derive the HardwareType with firmware specific checks. */ -uint32_t fuse_get_hardware_type_with_firmware_check(uint32_t target_firmware) { - uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4); - uint32_t hardware_type = (((fuse_reserved_odm4 >> 7) & 2) | ((fuse_reserved_odm4 >> 2) & 1)); - - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_4_0_0) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - uint32_t fuse_spare_bit9 = (fuse_chip->FUSE_SPARE_BIT[9] & 1); - - switch (hardware_type) { - case 0x00: return (fuse_spare_bit9 == 0) ? 0 : 3; - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 1; /* HardwareType_Copper */ - default: return 3; /* HardwareType_Undefined */ - } - } else { - hardware_type |= ((fuse_reserved_odm4 >> 14) & 0x3C); - - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_7_0_0) { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 1; /* HardwareType_Copper */ - case 0x04: return 3; /* HardwareType_Iowa */ - default: return 4; /* HardwareType_Undefined */ - } - } else { - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_10_0_0) { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 4; /* HardwareType_Calcio */ - case 0x04: return 3; /* HardwareType_Iowa */ - case 0x08: return 2; /* HardwareType_Hoag */ - default: return 0xF; /* HardwareType_Undefined */ - } - } else { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 4; /* HardwareType_Calcio */ - case 0x04: return 3; /* HardwareType_Iowa */ - case 0x08: return 2; /* HardwareType_Hoag */ - case 0x10: return 5; /* HardwareType_Five */ - default: return 0xF; /* HardwareType_Undefined */ - } - } - } - } -} - -/* Derive the HardwareType. */ -uint32_t fuse_get_hardware_type(void) { - return fuse_get_hardware_type_with_firmware_check(ATMOSPHERE_TARGET_FIRMWARE_CURRENT); -} - -/* Derive the HardwareState. */ -uint32_t fuse_get_hardware_state(void) { - uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4); - uint32_t hardware_state = (((fuse_reserved_odm4 >> 7) & 4) | (fuse_reserved_odm4 & 3)); - - switch (hardware_state) { - case 0x03: return 0; /* HardwareState_Development */ - case 0x04: return 1; /* HardwareState_Production */ - default: return 2; /* HardwareState_Undefined */ - } -} - -/* Derive the 16-byte HardwareInfo and copy to output buffer. */ -void fuse_get_hardware_info(void *dst) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - uint32_t hw_info[0x4]; - - uint32_t ops_reserved = fuse_chip->FUSE_OPT_OPS_RESERVED & 0x3F; - uint32_t y_coord = fuse_chip->FUSE_OPT_Y_COORDINATE & 0x1FF; - uint32_t x_coord = fuse_chip->FUSE_OPT_X_COORDINATE & 0x1FF; - uint32_t wafer_id = fuse_chip->FUSE_OPT_WAFER_ID & 0x3F; - uint32_t lot_code_0 = fuse_chip->FUSE_OPT_LOT_CODE_0; - uint32_t lot_code_1 = fuse_chip->FUSE_OPT_LOT_CODE_1 & 0x0FFFFFFF; - uint32_t fab_code = fuse_chip->FUSE_OPT_FAB_CODE & 0x3F; - uint32_t vendor_code = fuse_chip->FUSE_OPT_VENDOR_CODE & 0xF; - - /* Hardware Info = OPS_RESERVED || Y_COORD || X_COORD || WAFER_ID || LOT_CODE || FAB_CODE || VENDOR_ID */ - hw_info[0] = (uint32_t)((lot_code_1 << 30) | (wafer_id << 24) | (x_coord << 15) | (y_coord << 6) | (ops_reserved)); - hw_info[1] = (uint32_t)((lot_code_0 << 26) | (lot_code_1 >> 2)); - hw_info[2] = (uint32_t)((fab_code << 26) | (lot_code_0 >> 6)); - hw_info[3] = (uint32_t)(vendor_code); - - memcpy(dst, hw_info, 0x10); -} - -/* Check if have a new ODM fuse format. */ -bool fuse_is_new_format(void) { - return ((fuse_get_reserved_odm(4) & 0x800) && (fuse_get_reserved_odm(0) == 0x8E61ECAE) && (fuse_get_reserved_odm(1) == 0xF2BA3BB2)); -} - -/* Get the DeviceUniqueKeyGeneration. */ -uint32_t fuse_get_device_unique_key_generation(void) { - if (fuse_is_new_format()) { - return (fuse_get_reserved_odm(2) & 0x1F); - } else { - return 0; - } -} - -/* Get the SocType from the HardwareType. */ -uint32_t fuse_get_soc_type(void) { - switch (fuse_get_hardware_type()) { - case 0: - case 1: - return 0; /* SocType_Erista */ - case 3: - case 2: - case 4: - case 5: - return 1; /* SocType_Mariko */ - default: - return 0xF; /* SocType_Undefined */ - } -} - -/* Get the Regulator type. */ -uint32_t fuse_get_regulator(void) { - if (fuse_get_soc_type() == 1) { - return ((fuse_get_reserved_odm(28) & 1) + 1); /* Regulator_Mariko_Max77812_A or Regulator_Mariko_Max77812_B */ - } else { - return 0; /* Regulator_Erista_Max77621 */ - } -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/fuse.h b/fusee/fusee-primary/fusee-primary-main/src/fuse.h deleted file mode 100644 index eb590553c..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/fuse.h +++ /dev/null @@ -1,484 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FUSE_H -#define FUSEE_FUSE_H - -#define FUSE_BASE 0x7000F800 -#define FUSE_CHIP_BASE (FUSE_BASE + 0x98) -#define MAKE_FUSE_REG(n) MAKE_REG32(FUSE_BASE + n) -#define MAKE_FUSE_CHIP_REG(n) MAKE_REG32(FUSE_CHIP_BASE + n) - -typedef struct { - uint32_t FUSE_FUSECTRL; - uint32_t FUSE_FUSEADDR; - uint32_t FUSE_FUSERDATA; - uint32_t FUSE_FUSEWDATA; - uint32_t FUSE_FUSETIME_RD1; - uint32_t FUSE_FUSETIME_RD2; - uint32_t FUSE_FUSETIME_PGM1; - uint32_t FUSE_FUSETIME_PGM2; - uint32_t FUSE_PRIV2INTFC_START; - uint32_t FUSE_FUSEBYPASS; - uint32_t FUSE_PRIVATEKEYDISABLE; - uint32_t FUSE_DISABLEREGPROGRAM; - uint32_t FUSE_WRITE_ACCESS_SW; - uint32_t FUSE_PWR_GOOD_SW; - uint32_t _0x38; - uint32_t FUSE_PRIV2RESHIFT; - uint32_t _0x40[0x3]; - uint32_t FUSE_FUSETIME_RD3; - uint32_t _0x50[0xC]; - uint32_t FUSE_PRIVATE_KEY0_NONZERO; - uint32_t FUSE_PRIVATE_KEY1_NONZERO; - uint32_t FUSE_PRIVATE_KEY2_NONZERO; - uint32_t FUSE_PRIVATE_KEY3_NONZERO; - uint32_t FUSE_PRIVATE_KEY4_NONZERO; - uint32_t _0x94; -} tegra_fuse_t; - -typedef struct { - uint32_t _0x98[0x1A]; - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t _0x11C[0x3]; - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t _0x144; - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t _0x18C; - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t _0x224; - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t _0x238[0x3]; - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t _0x268[0x5]; - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t _0x294; - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC[0x5]; - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t _0x324[0x5]; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x20]; -} tegra_fuse_chip_common_t; - -typedef struct { - uint32_t _0x98[0x1A]; - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t _0x11C[0x3]; - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t _0x144; - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t _0x18C; - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t FUSE_SATA_CALIB; /* Erista only. */ - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t _0x238[0x3]; - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t FUSE_PKC_DISABLE; /* Erista only. */ - uint32_t _0x26C[0x4]; - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t _0x294; - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC[0x5]; - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t FUSE_OPT_RAM_SVOP_DP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_PDP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_REG; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_SP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_SMPDP; /* Erista only. */ - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x20]; -} tegra_fuse_chip_erista_t; - -typedef struct { - uint32_t FUSE_RESERVED_ODM8[0xE]; /* Mariko only. */ - uint32_t FUSE_KEK[0x4]; /* Mariko only. */ - uint32_t FUSE_BEK[0x4]; /* Mariko only. */ - uint32_t _0xF0; /* Mariko only. */ - uint32_t _0xF4; /* Mariko only. */ - uint32_t _0xF8; /* Mariko only. */ - uint32_t _0xFC; /* Mariko only. */ - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t FUSE_RESERVED_ODM22[0x3]; /* Mariko only. */ - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t FUSE_RESERVED_ODM25; /* Mariko only. */ - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t FUSE_OPT_SECURE_SCC_DIS; /* Mariko only. */ - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; /* Mariko only. */ - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t _0x224; /* Mariko only. */ - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t FUSE_RESERVED_ODM26[0x3]; /* Mariko only. */ - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t FUSE_BOOT_SECURITY_INFO; /* Mariko only. */ - uint32_t _0x26C; /* Mariko only. */ - uint32_t _0x270; /* Mariko only. */ - uint32_t _0x274; /* Mariko only. */ - uint32_t _0x278; /* Mariko only. */ - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t FUSE_RESERVED_ODM29; /* Mariko only. */ - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC; - uint32_t _0x2B0; /* Mariko only. */ - uint32_t _0x2B4; /* Mariko only. */ - uint32_t _0x2B8; /* Mariko only. */ - uint32_t _0x2BC; /* Mariko only. */ - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t _0x324; /* Mariko only. */ - uint32_t _0x328; /* Mariko only. */ - uint32_t _0x32C; /* Mariko only. */ - uint32_t _0x330; /* Mariko only. */ - uint32_t _0x334; /* Mariko only. */ - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x1E]; -} tegra_fuse_chip_mariko_t; - -static inline volatile tegra_fuse_t *fuse_get_regs(void) -{ - return (volatile tegra_fuse_t *)FUSE_BASE; -} - -static inline volatile tegra_fuse_chip_common_t *fuse_chip_common_get_regs(void) -{ - return (volatile tegra_fuse_chip_common_t *)FUSE_CHIP_BASE; -} - -static inline volatile tegra_fuse_chip_erista_t *fuse_chip_erista_get_regs(void) -{ - return (volatile tegra_fuse_chip_erista_t *)FUSE_CHIP_BASE; -} - -static inline volatile tegra_fuse_chip_mariko_t *fuse_chip_mariko_get_regs(void) -{ - return (volatile tegra_fuse_chip_mariko_t *)FUSE_CHIP_BASE; -} - -void fuse_init(void); -void fuse_disable_programming(void); -void fuse_disable_private_key(void); -void fuse_enable_power(void); -void fuse_disable_power(void); - -uint32_t fuse_get_sku_info(void); -uint32_t fuse_get_spare_bit(uint32_t index); -uint32_t fuse_get_reserved_odm(uint32_t index); -uint32_t fuse_get_bootrom_patch_version(void); -uint64_t fuse_get_device_id(void); -uint32_t fuse_get_dram_id(void); -uint32_t fuse_get_hardware_type_with_firmware_check(uint32_t target_firmware); -uint32_t fuse_get_hardware_type(void); -uint32_t fuse_get_retail_type(void); -void fuse_get_hardware_info(void *dst); -bool fuse_is_new_format(void); -uint32_t fuse_get_device_unique_key_generation(void); -uint32_t fuse_get_soc_type(void); -uint32_t fuse_get_regulator(void); - -uint32_t fuse_hw_read(uint32_t addr); -void fuse_hw_write(uint32_t value, uint32_t addr); -void fuse_hw_sense(void); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/gpio.c b/fusee/fusee-primary/fusee-primary-main/src/gpio.c deleted file mode 100644 index 76dbb87ce..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/gpio.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include - -#include "gpio.h" -#include "utils.h" - -/* Set GPIO's value. */ -static void gpio_register_set(uint32_t pin, bool do_set, uint32_t offset) { - volatile tegra_gpio_t *gpio = gpio_get_regs(); - - /* Retrieve the register set that corresponds to the given pin and offset. */ - volatile uint32_t *cluster = (uint32_t *)((uintptr_t)&gpio->bank[(pin >> GPIO_BANK_SHIFT)] + offset); - - /* Figure out the offset into the cluster, and the mask to be used. */ - uint32_t port = ((pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK); - uint32_t mask = (1 << (pin & GPIO_PIN_MASK)); - - /* Set or clear the bit, as appropriate. */ - if (do_set) - cluster[port] |= mask; - else - cluster[port] &= ~mask; - - /* Dummy read. */ - cluster[port]; -} - -/* Get GPIO's value. */ -static bool gpio_register_get(uint32_t pin, uint32_t offset) { - volatile tegra_gpio_t *gpio = gpio_get_regs(); - - /* Retrieve the register set that corresponds to the given pin and offset. */ - volatile uint32_t *cluster = (uint32_t *)((uintptr_t)&gpio->bank[(pin >> GPIO_BANK_SHIFT)] + offset); - - /* Figure out the offset into the cluster, and the mask to be used. */ - uint32_t port = ((pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK); - uint32_t mask = (1 << (pin & GPIO_PIN_MASK)); - - /* Convert the given value to a boolean. */ - return !!(cluster[port] & mask); -} - -/* Configure GPIO's mode. */ -void gpio_configure_mode(uint32_t pin, uint32_t mode) { - gpio_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(tegra_gpio_bank_t, config)); -} - -/* Configure GPIO's direction. */ -void gpio_configure_direction(uint32_t pin, uint32_t dir) { - gpio_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(tegra_gpio_bank_t, direction)); -} - -/* Write to GPIO. */ -void gpio_write(uint32_t pin, uint32_t value) { - gpio_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(tegra_gpio_bank_t, out)); -} - -/* Read from GPIO. */ -uint32_t gpio_read(uint32_t pin) { - return gpio_register_get(pin, offsetof(tegra_gpio_bank_t, in)); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/gpio.h b/fusee/fusee-primary/fusee-primary-main/src/gpio.h deleted file mode 100644 index b187ed618..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/gpio.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_GPIO_H -#define FUSEE_GPIO_H - -#include - -#define GPIO_BASE 0x6000D000 -#define MAKE_GPIO_REG(n) MAKE_REG32(GPIO_BASE + n) - -#define TEGRA_GPIO_PORTS 4 -#define TEGRA_GPIO_BANKS 8 -#define GPIO_BANK_SHIFT 5 -#define GPIO_PORT_SHIFT 3 -#define GPIO_PORT_MASK 0x03 -#define GPIO_PIN_MASK 0x07 - -typedef enum { - TEGRA_GPIO_PORT_A = 0, - TEGRA_GPIO_PORT_B = 1, - TEGRA_GPIO_PORT_C = 2, - TEGRA_GPIO_PORT_D = 3, - TEGRA_GPIO_PORT_E = 4, - TEGRA_GPIO_PORT_F = 5, - TEGRA_GPIO_PORT_G = 6, - TEGRA_GPIO_PORT_H = 7, - TEGRA_GPIO_PORT_I = 8, - TEGRA_GPIO_PORT_J = 9, - TEGRA_GPIO_PORT_K = 10, - TEGRA_GPIO_PORT_L = 11, - TEGRA_GPIO_PORT_M = 12, - TEGRA_GPIO_PORT_N = 13, - TEGRA_GPIO_PORT_O = 14, - TEGRA_GPIO_PORT_P = 15, - TEGRA_GPIO_PORT_Q = 16, - TEGRA_GPIO_PORT_R = 17, - TEGRA_GPIO_PORT_S = 18, - TEGRA_GPIO_PORT_T = 19, - TEGRA_GPIO_PORT_U = 20, - TEGRA_GPIO_PORT_V = 21, - TEGRA_GPIO_PORT_W = 22, - TEGRA_GPIO_PORT_X = 23, - TEGRA_GPIO_PORT_Y = 24, - TEGRA_GPIO_PORT_Z = 25, - TEGRA_GPIO_PORT_AA = 26, - TEGRA_GPIO_PORT_BB = 27, - TEGRA_GPIO_PORT_CC = 28, - TEGRA_GPIO_PORT_DD = 29, - TEGRA_GPIO_PORT_EE = 30, - TEGRA_GPIO_PORT_FF = 31, -} tegra_gpio_port; - -typedef struct { - uint32_t config[TEGRA_GPIO_PORTS]; - uint32_t direction[TEGRA_GPIO_PORTS]; - uint32_t out[TEGRA_GPIO_PORTS]; - uint32_t in[TEGRA_GPIO_PORTS]; - uint32_t int_status[TEGRA_GPIO_PORTS]; - uint32_t int_enable[TEGRA_GPIO_PORTS]; - uint32_t int_level[TEGRA_GPIO_PORTS]; - uint32_t int_clear[TEGRA_GPIO_PORTS]; - uint32_t masked_config[TEGRA_GPIO_PORTS]; - uint32_t masked_dir_out[TEGRA_GPIO_PORTS]; - uint32_t masked_out[TEGRA_GPIO_PORTS]; - uint32_t masked_in[TEGRA_GPIO_PORTS]; - uint32_t masked_int_status[TEGRA_GPIO_PORTS]; - uint32_t masked_int_enable[TEGRA_GPIO_PORTS]; - uint32_t masked_int_level[TEGRA_GPIO_PORTS]; - uint32_t masked_int_clear[TEGRA_GPIO_PORTS]; -} tegra_gpio_bank_t; - -typedef struct { - tegra_gpio_bank_t bank[TEGRA_GPIO_BANKS]; -} tegra_gpio_t; - -static inline volatile tegra_gpio_t *gpio_get_regs(void) -{ - return (volatile tegra_gpio_t *)GPIO_BASE; -} - -#define TEGRA_GPIO(port, offset) \ - ((TEGRA_GPIO_PORT_##port * 8) + offset) - -/* Mode select */ -#define GPIO_MODE_SFIO 0 -#define GPIO_MODE_GPIO 1 - -/* Direction */ -#define GPIO_DIRECTION_INPUT 0 -#define GPIO_DIRECTION_OUTPUT 1 - -/* Level */ -#define GPIO_LEVEL_LOW 0 -#define GPIO_LEVEL_HIGH 1 - -/* Named GPIOs */ -#define GPIO_BUTTON_VOL_DOWN TEGRA_GPIO(X, 7) -#define GPIO_BUTTON_VOL_UP TEGRA_GPIO(X, 6) -#define GPIO_MICROSD_CARD_DETECT TEGRA_GPIO(Z, 1) -#define GPIO_MICROSD_WRITE_PROTECT TEGRA_GPIO(Z, 4) -#define GPIO_MICROSD_SUPPLY_ENABLE TEGRA_GPIO(E, 4) -#define GPIO_LCD_BL_P5V TEGRA_GPIO(I, 0) -#define GPIO_LCD_BL_N5V TEGRA_GPIO(I, 1) -#define GPIO_LCD_BL_PWM TEGRA_GPIO(V, 0) -#define GPIO_LCD_BL_EN TEGRA_GPIO(V, 1) -#define GPIO_LCD_BL_RST TEGRA_GPIO(V, 2) - -void gpio_configure_mode(uint32_t pin, uint32_t mode); -void gpio_configure_direction(uint32_t pin, uint32_t dir); -void gpio_write(uint32_t pin, uint32_t value); -uint32_t gpio_read(uint32_t pin); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/hwinit.c b/fusee/fusee-primary/fusee-primary-main/src/hwinit.c deleted file mode 100644 index 40d94ae11..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/hwinit.c +++ /dev/null @@ -1,319 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "hwinit.h" -#include "apb_misc.h" -#include "car.h" -#include "di.h" -#include "fuse.h" -#include "gpio.h" -#include "i2c.h" -#include "max77620.h" -#include "mc.h" -#include "pinmux.h" -#include "pmc.h" -#include "se.h" -#include "sdram.h" -#include "sysctr0.h" -#include "sysreg.h" -#include "timers.h" -#include "uart.h" - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static void config_oscillators(void) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - car->spare_reg0 = ((car->spare_reg0 & 0xFFFFFFF3) | 4); - - SYSCTR0_CNTFID0_0 = 19200000; - TIMERUS_USEC_CFG_0 = 0x45F; - - car->osc_ctrl = 0x50000071; - pmc->osc_edpd_over = ((pmc->osc_edpd_over & 0xFFFFFF81) | 0xE); - pmc->osc_edpd_over = ((pmc->osc_edpd_over & 0xFFBFFFFF) | 0x400000); - pmc->cntrl2 = ((pmc->cntrl2 & 0xFFFFEFFF) | 0x1000); - pmc->scratch188 = ((pmc->scratch188 & 0xFCFFFFFF) | 0x2000000); - car->clk_sys_rate = 0x10; - car->pllmb_base &= 0xBFFFFFFF; - pmc->tsc_mult = ((pmc->tsc_mult & 0xFFFF0000) | 0x249F); /* 0x249F = 19200000 * (16 / 32.768 kHz) */ - car->sclk_brst_pol = 0x20004444; - car->super_sclk_div = 0x80000000; - car->clk_sys_rate = 2; -} - -static void config_gpios(void) { - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - - /* NOTE: This is also not done for calcio/copper. */ - if (fuse_get_hardware_type() != 2) { - pinmux->uart2_tx = 0; - pinmux->uart3_tx = 0; - gpio_configure_mode(TEGRA_GPIO(G, 0), GPIO_MODE_GPIO); - gpio_configure_mode(TEGRA_GPIO(D, 1), GPIO_MODE_GPIO); - gpio_configure_direction(TEGRA_GPIO(G, 0), GPIO_DIRECTION_INPUT); - gpio_configure_direction(TEGRA_GPIO(D, 1), GPIO_DIRECTION_INPUT); - } - - pinmux->pe6 = PINMUX_INPUT; - pinmux->ph6 = PINMUX_INPUT; - gpio_configure_mode(TEGRA_GPIO(E, 6), GPIO_MODE_GPIO); - gpio_configure_mode(TEGRA_GPIO(H, 6), GPIO_MODE_GPIO); - gpio_configure_direction(TEGRA_GPIO(E, 6), GPIO_DIRECTION_INPUT); - gpio_configure_direction(TEGRA_GPIO(H, 6), GPIO_DIRECTION_INPUT); - - i2c_config(I2C_1); - i2c_config(I2C_5); - uart_config(UART_A); - - /* Configure volume up/down buttons as inputs. */ - gpio_configure_mode(GPIO_BUTTON_VOL_UP, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_BUTTON_VOL_DOWN, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_BUTTON_VOL_UP, GPIO_DIRECTION_INPUT); - gpio_configure_direction(GPIO_BUTTON_VOL_DOWN, GPIO_DIRECTION_INPUT); - - /* Configure home button as input. */ - gpio_configure_mode(TEGRA_GPIO(Y, 1), GPIO_MODE_GPIO); - gpio_configure_direction(TEGRA_GPIO(Y, 1), GPIO_DIRECTION_INPUT); -} - -static void mbist_workaround(void) { - volatile tegra_car_t *car = car_get_regs(); - - car->clk_source_sor1 = ((car->clk_source_sor1 | 0x8000) & 0xFFFFBFFF); - car->plld_base |= 0x40800000u; - car->rst_dev_y_clr = 0x40; - car->rst_dev_x_clr = 0x40000; - car->rst_dev_l_clr = 0x18000000; - udelay(2); - - /* Setup I2S. */ - MAKE_I2S_REG(0x0A0) |= 0x400; - MAKE_I2S_REG(0x088) &= 0xFFFFFFFE; - MAKE_I2S_REG(0x1A0) |= 0x400; - MAKE_I2S_REG(0x188) &= 0xFFFFFFFE; - MAKE_I2S_REG(0x2A0) |= 0x400; - MAKE_I2S_REG(0x288) &= 0xFFFFFFFE; - MAKE_I2S_REG(0x3A0) |= 0x400; - MAKE_I2S_REG(0x388) &= 0xFFFFFFFE; - MAKE_I2S_REG(0x4A0) |= 0x400; - MAKE_I2S_REG(0x488) &= 0xFFFFFFFE; - - MAKE_DI_REG(DC_COM_DSC_TOP_CTL) |= 4; - MAKE_VIC_REG(0x8C) = 0xFFFFFFFF; - udelay(2); - - /* Set devices in reset. */ - car->rst_dev_y_set = 0x40; - car->rst_dev_l_set = 0x18000000; - car->rst_dev_x_set = 0x40000; - - /* Clock out enables. */ - car->clk_out_enb_h = 0xC0; - car->clk_out_enb_l = 0x80000130; - car->clk_out_enb_u = 0x1F00200; - car->clk_out_enb_v = 0x80400808; - car->clk_out_enb_w = 0x402000FC; - car->clk_out_enb_x = 0x23000780; - car->clk_out_enb_y = 0x300; - - /* LVL2 clock gate overrides. */ - car->lvl2_clk_gate_ovra = 0; - car->lvl2_clk_gate_ovrb = 0; - car->lvl2_clk_gate_ovrc = 0; - car->lvl2_clk_gate_ovrd = 0; - car->lvl2_clk_gate_ovre = 0; - - /* Configure clock sources. */ - car->plld_base &= 0x1F7FFFFF; - car->clk_source_sor1 &= 0xFFFF3FFF; - car->clk_source_vi = ((car->clk_source_vi & 0x1FFFFFFF) | 0x80000000); - car->clk_source_host1x = ((car->clk_source_host1x & 0x1FFFFFFF) | 0x80000000); - car->clk_source_nvenc = ((car->clk_source_nvenc & 0x1FFFFFFF) | 0x80000000); -} - -static void config_se_brom(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - volatile tegra_se_t *se = se_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - /* Bootrom part we skipped. */ - uint32_t sbk[4] = {fuse_chip->FUSE_PRIVATE_KEY[0], fuse_chip->FUSE_PRIVATE_KEY[1], fuse_chip->FUSE_PRIVATE_KEY[2], fuse_chip->FUSE_PRIVATE_KEY[3]}; - for (int i = 0; i < 4; ++i) { - if (sbk[i] != 0xFFFFFFFF) { - set_aes_keyslot(0xE, sbk, 0x10); - break; - } - } - - /* Lock SBK from being read. */ - se->SE_CRYPTO_KEYTABLE_ACCESS[0xE] = 0x7E; - - /* This memset needs to happen here, else TZRAM will behave weirdly later on. */ - memset((void *)0x7C010000, 0, 0x10000); - - pmc->crypto_op = 0; - se->SE_INT_STATUS = 0x1F; - - /* Lock SSK (although it's not set and unused anyways). */ - se->SE_CRYPTO_KEYTABLE_ACCESS[0xF] = 0x7E; - - /* Clear the boot reason to avoid problems later */ - pmc->scratch200 = 0; - pmc->rst_status = 0; -} - -void nx_hwinit(bool enable_log) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - volatile tegra_car_t *car = car_get_regs(); - bool is_mariko = is_soc_mariko(); - - if (!is_mariko) { - /* Bootrom stuff we skipped by going through RCM. */ - config_se_brom(); - - AHB_AHB_SPARE_REG_0 &= 0xFFFFFF9F; - pmc->scratch49 = (((pmc->scratch49 >> 1) << 1) & 0xFFFFFFFD); - - /* Apply the memory built-in self test workaround. */ - mbist_workaround(); - } - - /* Enable SE clock. */ - clkrst_reboot(CARDEVICE_SE); - if (is_mariko) { - /* Lock the SE clock. */ - car->clk_source_se |= 0x100; - } - - /* Initialize the fuse driver. */ - fuse_init(); - - if (!is_mariko) { - /* Initialize the memory controller. */ - mc_enable(); - } - - /* Configure oscillators. */ - config_oscillators(); - - /* Disable pinmux tristate input clamping. */ - APB_MISC_PP_PINMUX_GLOBAL_0 = 0; - - /* Configure GPIOs. */ - config_gpios(); - - /* UART debugging. */ - if (enable_log) { - clkrst_reboot(CARDEVICE_UARTA); - uart_init(UART_A, 115200); - } - - /* Enable CL-DVFS clock. */ - clkrst_reboot(CARDEVICE_CL_DVFS); - - /* Enable I2C1 clock. */ - clkrst_reboot(CARDEVICE_I2C1); - - /* Enable I2C5 clock. */ - clkrst_reboot(CARDEVICE_I2C5); - - /* Enable TZRAM clock. */ - clkrst_reboot(CARDEVICE_TZRAM); - - /* Initialize I2C5. */ - i2c_init(I2C_5); - - /* Configure the PMIC. */ - if (is_mariko) { - uint8_t val = 0x40; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGBBC, &val, 1); - val = 0x78; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &val, 1); - } else { - uint8_t val = 0x40; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGBBC, &val, 1); - val = 0x58; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &val, 1); - val = 0x38; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_CFG0, &val, 1); - val = 0x3A; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_CFG1, &val, 1); - val = 0x38; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_CFG2, &val, 1); - val = 0xF; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_LDO4, &val, 1); - val = 0xC7; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_LDO8, &val, 1); - val = 0x4F; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_SD0, &val, 1); - val = 0x29; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_SD1, &val, 1); - val = 0x1B; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_SD3, &val, 1); - - /* NOTE: [3.0.0+] This was added. */ - val = 0x22; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_FPS_GPIO3, &val, 1); - - /* TODO: In 3.x+, if the unit is SDEV, the MBLPD bit is set. */ - /* - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGGLBL1, &val, 1); - val |= 0x40; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGGLBL1, &val, 1); - */ - } - - /* Configure SD0 voltage as 1.125v for erista, 1.050v for mariko. */ - if (is_mariko) { - uint8_t val = 0x24; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD0, &val, 1); - } else { - uint8_t val = 0x2A; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD0, &val, 1); - } - - /* Enable LDO8 in HardwareType_Hoag only. */ - if (fuse_get_hardware_type() == 2) { - uint8_t val = 0xE8; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_LDO8_CFG, &val, 1); - } - - /* Initialize I2C1. */ - i2c_init(I2C_1); - - /* Set super clock burst policy. */ - car->sclk_brst_pol = ((car->sclk_brst_pol & 0xFFFF8888) | 0x3333); - - if (is_mariko) { - /* Mariko only PMC configuration for TZRAM. */ - pmc->tzram_pwr_cntrl &= 0xFFFFFFFE; - pmc->tzram_non_sec_disable = 0x3; - pmc->tzram_sec_disable = 0x3; - } - - /* Save SDRAM parameters to scratch. */ - sdram_save_params(sdram_get_params(fuse_get_dram_id())); - - /* Initialize SDRAM. */ - sdram_init(); -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/hwinit.h b/fusee/fusee-primary/fusee-primary-main/src/hwinit.h deleted file mode 100644 index b01a34c0b..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/hwinit.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_HWINIT_H_ -#define FUSEE_HWINIT_H_ - -#include - -#define I2S_BASE 0x702D1000 -#define MAKE_I2S_REG(n) MAKE_REG32(I2S_BASE + n) - -void nx_hwinit(bool enable_log); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/i2c.c b/fusee/fusee-primary/fusee-primary-main/src/i2c.c deleted file mode 100644 index e8a9d3e1b..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/i2c.c +++ /dev/null @@ -1,252 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "i2c.h" -#include "utils.h" -#include "timers.h" -#include "pinmux.h" - -/* Prototypes for internal commands. */ -volatile tegra_i2c_t *i2c_get_registers_from_id(I2CDevice id); -void i2c_load_config(volatile tegra_i2c_t *regs); - -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size); -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size); - -bool i2c_write(volatile tegra_i2c_t *regs, uint8_t device, void *src, size_t src_size); -bool i2c_read(volatile tegra_i2c_t *regs, uint8_t device, void *dst, size_t dst_size); - -/* Configure I2C pinmux. */ -void i2c_config(I2CDevice id) { - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - - switch (id) { - case I2C_1: - pinmux->gen1_i2c_scl = PINMUX_INPUT; - pinmux->gen1_i2c_sda = PINMUX_INPUT; - break; - case I2C_2: - pinmux->gen2_i2c_scl = PINMUX_INPUT; - pinmux->gen2_i2c_sda = PINMUX_INPUT; - break; - case I2C_3: - pinmux->gen3_i2c_scl = PINMUX_INPUT; - pinmux->gen3_i2c_sda = PINMUX_INPUT; - break; - case I2C_4: - pinmux->cam_i2c_scl = PINMUX_INPUT; - pinmux->cam_i2c_sda = PINMUX_INPUT; - break; - case I2C_5: - pinmux->pwr_i2c_scl = PINMUX_INPUT; - pinmux->pwr_i2c_sda = PINMUX_INPUT; - break; - case I2C_6: - /* Unused. */ - break; - default: break; - } -} - -/* Initialize I2C based on registers. */ -void i2c_init(I2CDevice id) { - volatile tegra_i2c_t *regs = i2c_get_registers_from_id(id); - - /* Setup divisor, and clear the bus. */ - regs->I2C_I2C_CLK_DIVISOR_REGISTER_0 = 0x50001; - regs->I2C_I2C_BUS_CLEAR_CONFIG_0 = 0x90003; - - /* Load hardware configuration. */ - i2c_load_config(regs); - - /* Wait a while until BUS_CLEAR_DONE is set. */ - for (unsigned int i = 0; i < 10; i++) { - udelay(20000); - if (regs->I2C_INTERRUPT_STATUS_REGISTER_0 & 0x800) { - break; - } - } - - /* Read the BUS_CLEAR_STATUS. Result doesn't matter. */ - regs->I2C_I2C_BUS_CLEAR_STATUS_0; - - /* Read and set the Interrupt Status. */ - uint32_t int_status = regs->I2C_INTERRUPT_STATUS_REGISTER_0; - regs->I2C_INTERRUPT_STATUS_REGISTER_0 = int_status; -} - -/* Sets a bit in a PMIC register over I2C during CPU shutdown. */ -void i2c_send_pmic_cpu_shutdown_cmd(void) { - uint32_t val = 0; - /* PMIC == Device 4:3C. */ - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, 0x41, &val, 1); - val |= 4; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, 0x41, &val, 1); -} - -/* Queries the value of TI charger bit over I2C. */ -bool i2c_query_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - return (val & 0x80) != 0; -} - -/* Clears TI charger bit over I2C. */ -void i2c_clear_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - val &= 0x7F; - i2c_send(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); -} - -/* Sets TI charger bit over I2C. */ -void i2c_set_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - val |= 0x80; - i2c_send(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); -} - -/* Get registers pointer based on I2C ID. */ -volatile tegra_i2c_t *i2c_get_registers_from_id(I2CDevice id) { - switch (id) { - case I2C_1: - return I2C1_REGS; - case I2C_2: - return I2C2_REGS; - case I2C_3: - return I2C3_REGS; - case I2C_4: - return I2C4_REGS; - case I2C_5: - return I2C5_REGS; - case I2C_6: - return I2C6_REGS; - default: - generic_panic(); - } - return NULL; -} - -/* Load hardware config for I2C4. */ -void i2c_load_config(volatile tegra_i2c_t *regs) { - /* Set MSTR_CONFIG_LOAD, TIMEOUT_CONFIG_LOAD, undocumented bit. */ - regs->I2C_I2C_CONFIG_LOAD_0 = 0x25; - - /* Wait a bit for master config to be loaded. */ - for (unsigned int i = 0; i < 20; i++) { - udelay(1); - if (!(regs->I2C_I2C_CONFIG_LOAD_0 & 1)) { - break; - } - } -} - -/* Reads a register from a device over I2C, writes result to output. */ -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size) { - volatile tegra_i2c_t *regs = i2c_get_registers_from_id(id); - uint32_t val = r; - - /* Write single byte register ID to device. */ - if (!i2c_write(regs, device, &val, 1)) { - return false; - } - /* Limit output size to 32-bits. */ - if (dst_size > 4) { - return false; - } - - return i2c_read(regs, device, dst, dst_size); -} - -/* Writes a value to a register over I2C. */ -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size) { - uint32_t val = r; - if (src_size == 0) { - return true; - } else if (src_size <= 3) { - memcpy(((uint8_t *)&val) + 1, src, src_size); - return i2c_write(i2c_get_registers_from_id(id), device, &val, src_size + 1); - } else { - return false; - } -} - -/* Writes bytes to device over I2C. */ -bool i2c_write(volatile tegra_i2c_t *regs, uint8_t device, void *src, size_t src_size) { - if (src_size > 4) { - return false; - } else if (src_size == 0) { - return true; - } - - /* Set device for 7-bit write mode. */ - regs->I2C_I2C_CMD_ADDR0_0 = device << 1; - - /* Load in data to write. */ - regs->I2C_I2C_CMD_DATA1_0 = read32le(src, 0); - - /* Set config with LENGTH = src_size, NEW_MASTER_FSM, DEBOUNCE_CNT = 4T. */ - regs->I2C_I2C_CNFG_0 = ((src_size << 1) - 2) | 0x2800; - - i2c_load_config(regs); - - /* Config |= SEND; */ - regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200); - - while (regs->I2C_I2C_STATUS_0 & 0x100) { - /* Wait until not busy. */ - } - - /* Return CMD1_STAT == SL1_XFER_SUCCESSFUL. */ - return (regs->I2C_I2C_STATUS_0 & 0xF) == 0; -} - -/* Reads bytes from device over I2C. */ -bool i2c_read(volatile tegra_i2c_t *regs, uint8_t device, void *dst, size_t dst_size) { - if (dst_size > 4) { - return false; - } else if (dst_size == 0) { - return true; - } - - /* Set device for 7-bit read mode. */ - regs->I2C_I2C_CMD_ADDR0_0 = (device << 1) | 1; - - /* Set config with LENGTH = dst_size, NEW_MASTER_FSM, DEBOUNCE_CNT = 4T. */ - regs->I2C_I2C_CNFG_0 = ((dst_size << 1) - 2) | 0x2840; - - i2c_load_config(regs); - - /* Config |= SEND; */ - regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200); - - while (regs->I2C_I2C_STATUS_0 & 0x100) { - /* Wait until not busy. */ - } - - /* Ensure success. */ - if ((regs->I2C_I2C_STATUS_0 & 0xF) != 0) { - return false; - } - - uint32_t val = regs->I2C_I2C_CMD_DATA1_0; - memcpy(dst, &val, dst_size); - return true; -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/i2c.h b/fusee/fusee-primary/fusee-primary-main/src/i2c.h deleted file mode 100644 index 4d3254333..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/i2c.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_I2C_H -#define FUSEE_I2C_H - -#include -#include -#include - -#define I2C1234_BASE 0x7000C000 -#define I2C56_BASE 0x7000D000 - -#define MAX77621_CPU_I2C_ADDR 0x1B -#define MAX77621_GPU_I2C_ADDR 0x1C -#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31 -#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33 -#define MAX17050_I2C_ADDR 0x36 -#define MAX77620_PWR_I2C_ADDR 0x3C -#define MAX77620_RTC_I2C_ADDR 0x68 -#define BQ24193_I2C_ADDR 0x6B - -typedef enum { - I2C_1 = 0, - I2C_2 = 1, - I2C_3 = 2, - I2C_4 = 3, - I2C_5 = 4, - I2C_6 = 5, -} I2CDevice; - -typedef struct { - uint32_t I2C_I2C_CNFG_0; - uint32_t I2C_I2C_CMD_ADDR0_0; - uint32_t I2C_I2C_CMD_ADDR1_0; - uint32_t I2C_I2C_CMD_DATA1_0; - uint32_t I2C_I2C_CMD_DATA2_0; - uint32_t _0x14; - uint32_t _0x18; - uint32_t I2C_I2C_STATUS_0; - uint32_t I2C_I2C_SL_CNFG_0; - uint32_t I2C_I2C_SL_RCVD_0; - uint32_t I2C_I2C_SL_STATUS_0; - uint32_t I2C_I2C_SL_ADDR1_0; - uint32_t I2C_I2C_SL_ADDR2_0; - uint32_t I2C_I2C_TLOW_SEXT_0; - uint32_t _0x38; - uint32_t I2C_I2C_SL_DELAY_COUNT_0; - uint32_t I2C_I2C_SL_INT_MASK_0; - uint32_t I2C_I2C_SL_INT_SOURCE_0; - uint32_t I2C_I2C_SL_INT_SET_0; - uint32_t _0x4C; - uint32_t I2C_I2C_TX_PACKET_FIFO_0; - uint32_t I2C_I2C_RX_FIFO_0; - uint32_t I2C_PACKET_TRANSFER_STATUS_0; - uint32_t I2C_FIFO_CONTROL_0; - uint32_t I2C_FIFO_STATUS_0; - uint32_t I2C_INTERRUPT_MASK_REGISTER_0; - uint32_t I2C_INTERRUPT_STATUS_REGISTER_0; - uint32_t I2C_I2C_CLK_DIVISOR_REGISTER_0; - uint32_t I2C_I2C_INTERRUPT_SOURCE_REGISTER_0; - uint32_t I2C_I2C_INTERRUPT_SET_REGISTER_0; - uint32_t I2C_I2C_SLV_TX_PACKET_FIFO_0; - uint32_t I2C_I2C_SLV_RX_FIFO_0; - uint32_t I2C_I2C_SLV_PACKET_STATUS_0; - uint32_t I2C_I2C_BUS_CLEAR_CONFIG_0; - uint32_t I2C_I2C_BUS_CLEAR_STATUS_0; - uint32_t I2C_I2C_CONFIG_LOAD_0; - uint32_t _0x90; - uint32_t I2C_I2C_INTERFACE_TIMING_0_0; - uint32_t I2C_I2C_INTERFACE_TIMING_1_0; - uint32_t I2C_I2C_HS_INTERFACE_TIMING_0_0; - uint32_t I2C_I2C_HS_INTERFACE_TIMING_1_0; -} tegra_i2c_t; - -#define I2C1_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x000)) -#define I2C2_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x400)) -#define I2C3_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x500)) -#define I2C4_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x700)) -#define I2C5_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x000)) -#define I2C6_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x100)) - -void i2c_config(I2CDevice id); - -void i2c_init(I2CDevice id); -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size); -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size); - -void i2c_send_pmic_cpu_shutdown_cmd(void); -bool i2c_query_ti_charger_bit_7(void); -void i2c_clear_ti_charger_bit_7(void); -void i2c_set_ti_charger_bit_7(void); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/init.c b/fusee/fusee-primary/fusee-primary-main/src/init.c deleted file mode 100644 index 4add8d793..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/init.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include "utils.h" - -void __libc_init_array(void); -void __libc_fini_array(void); - -extern uint8_t __bss_start__[], __bss_end__[]; -extern uint8_t __heap_start__[], __heap_end__[]; - -extern char *fake_heap_start; -extern char *fake_heap_end; - -int __program_argc; -void **__program_argv; - -void __attribute__((noreturn)) __program_exit(int rc); -void __attribute__((noreturn)) (*__program_exit_callback)(int rc) = NULL; - -static void __program_parse_argc_argv(int argc, char *argdata); -static void __program_cleanup_argv(void); - -static void __program_init_heap(void) { - fake_heap_start = (char*)__heap_start__; - fake_heap_end = (char*)__heap_end__; -} - -static void __program_init_newlib_hooks(void) { - __syscalls.exit = __program_exit; /* For exit, etc. */ -} - -static void __program_move_additional_sections(void) { -#if defined(FUSEE_STAGE1_SRC) || defined(FUSEE_STAGE2_SRC) - extern uint8_t __chainloader_lma__[], __chainloader_start__[], __chainloader_bss_start__[], __chainloader_end__[]; - memcpy(__chainloader_start__, __chainloader_lma__, __chainloader_bss_start__ - __chainloader_start__); - memset(__chainloader_bss_start__, 0, __chainloader_end__ - __chainloader_bss_start__); -#endif -} - -void __program_init(int argc, char *argdata) { - /* Zero-fill the .bss section */ - memset(__bss_start__, 0, __bss_end__ - __bss_start__); - - __program_init_heap(); - __program_init_newlib_hooks(); - __program_parse_argc_argv(argc, argdata); - - /* Once argv is parsed, we can discard the low IRAM region */ - __program_move_additional_sections(); - __libc_init_array(); -} - -void __program_exit(int rc) { - __libc_fini_array(); - __program_cleanup_argv(); - if (__program_exit_callback == NULL) { - /* Default callback */ - generic_panic(); - } else { - __program_exit_callback(rc); - } - for (;;); -} - -#ifdef FUSEE_STAGE1_SRC -static void __program_parse_argc_argv(int argc, char *argdata) { - __program_argc = 0; - __program_argv = NULL; -} -#elif defined(FUSEE_STAGE2_SRC) -#include "stage2.h" -static void __program_parse_argc_argv(int argc, char *argdata) { - size_t pos = 0, len; - - __program_argc = argc; - - __program_argv = malloc(argc * sizeof(void **)); - if (__program_argv == NULL) { - generic_panic(); - } - - len = strlen(argdata); - __program_argv[0] = malloc(len + 1); - if (__program_argv[0] == NULL) { - generic_panic(); - } - strcpy((char *)__program_argv[0], argdata); - pos += len + 1; - - __program_argv[1] = malloc(sizeof(stage2_args_t)); - if (__program_argv[1] == NULL) { - generic_panic(); - } - memcpy(__program_argv[1], argdata + pos, sizeof(stage2_args_t)); -} -#else -static void __program_parse_argc_argv(int argc, char *argdata) { - size_t pos = 0, len; - - __program_argc = argc; - - __program_argv = malloc(argc * sizeof(void **)); - if (__program_argv == NULL) { - generic_panic(); - } - - for (int i = 0; i < argc; i++) { - len = strlen(argdata + pos); - __program_argv[i] = malloc(len + 1); - if (__program_argv[i] == NULL) { - generic_panic(); - } - strcpy((char *)__program_argv[i], argdata + pos); - pos += len + 1; - } -} -#endif - -static void __program_cleanup_argv(void) { -#ifndef FUSEE_STAGE1_SRC - for (int i = 0; i < __program_argc; i++) { - free(__program_argv[i]); - __program_argv[i] = NULL; - } - free(__program_argv); -#endif -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/main.c b/fusee/fusee-primary/fusee-primary-main/src/main.c deleted file mode 100644 index 148ed4a94..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/main.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "utils.h" -#include "exception_handlers.h" -#include "panic.h" -#include "fuse.h" -#include "hwinit.h" -#include "di.h" -#include "timers.h" -#include "fs_utils.h" -#include "stage2.h" -#include "chainloader.h" -#include "../../../fusee/common/sdmmc/sdmmc.h" -#include "../../../fusee/common/fatfs/ff.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/vsprintf.h" -#include "../../../fusee/common/ini.h" -#include "../../../fusee/common/display/video_fb.h" - -extern void (*__program_exit_callback)(int rc); - -static void *g_framebuffer; -static char g_bct0_buffer[BCTO_MAX_SIZE]; - -#define CONFIG_LOG_LEVEL_KEY "log_level" - -static const char *get_default_bct0(void) { - return "BCT0\n" - "[stage1]\n" - "stage2_path = atmosphere/fusee-secondary.bin\n" - "stage2_mtc_path = atmosphere/fusee-mtc.bin\n" - "stage2_addr = 0xF0000000\n" - "stage2_entrypoint = 0xF0000000\n" - "\n" - "[stratosphere]\n" - "\n"; -} - -static const char *load_config(void) { - if (!read_from_file(g_bct0_buffer, BCTO_MAX_SIZE, "atmosphere/config/BCT.ini")) { - print(SCREEN_LOG_LEVEL_DEBUG, "Failed to read BCT0 from SD!\n"); - print(SCREEN_LOG_LEVEL_DEBUG, "Using default BCT0!\n"); - - const char * const default_bct0 = get_default_bct0(); - memcpy(g_bct0_buffer, default_bct0, strlen(default_bct0)); - } - - if (memcmp(g_bct0_buffer, "BCT0", 4) != 0) { - fatal_error("Unexpected magic in BCT.ini!\n"); - } - - /* Return pointer to first line of the ini. */ - const char *bct0 = g_bct0_buffer; - while (*bct0 && *bct0 != '\n') { - bct0++; - } - - if (!bct0) { - fatal_error("BCT.ini has no newline!\n"); - } - - return bct0; -} - -static int config_ini_handler(void *user, const char *section, const char *name, const char *value) { - if (strcmp(section, "config") == 0) { - if (strcmp(name, CONFIG_LOG_LEVEL_KEY) == 0) { - ScreenLogLevel *config_log_level = (ScreenLogLevel *)user; - int log_level = 0; - sscanf(value, "%d", &log_level); - *config_log_level = (ScreenLogLevel)log_level; - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static void setup_display(void) { - g_framebuffer = (void *)0xC0000000; - - /* Zero-fill the framebuffer and register it as printk provider. */ - video_init(g_framebuffer); - - /* Initialize the display. */ - display_init(); - - /* Set the framebuffer. */ - display_init_framebuffer(g_framebuffer); - - /* Turn on the backlight after initializing the lfb */ - /* to avoid flickering. */ - display_backlight(true); -} - -static void cleanup_display(void) { - /* Turn off the backlight. */ - display_backlight(false); - - /* Terminate the display. */ - display_end(); -} - -static void setup_env(void) { - /* Initialize hardware. */ - nx_hwinit(false); - - /* Set up the exception handlers. */ - setup_exception_handlers(); - - /* Mount the SD card. */ - mount_sd(); -} - -static void cleanup_env(void) { - /* Unmount the SD card. */ - unmount_sd(); -} - -static void exit_callback(int rc) { - (void)rc; - relocate_and_chainload(); -} - -int main(void) { - const char *bct0; - const char *stage2_path; - stage2_args_t *stage2_args; - uint32_t stage2_version = 0; - ScreenLogLevel log_level = SCREEN_LOG_LEVEL_NONE; - - /* Initialize the boot environment. */ - setup_env(); - - /* Check for panics. */ - check_and_display_panic(); - - /* Load the BCT0 configuration ini off of the SD. */ - bct0 = load_config(); - - /* Extract the logging level from the BCT.ini file. */ - if (ini_parse_string(bct0, config_ini_handler, &log_level) < 0) { - fatal_error("Failed to parse BCT.ini!\n"); - } - - /* Override the global logging level. */ - log_set_log_level(log_level); - - if (log_level != SCREEN_LOG_LEVEL_NONE) { - /* Initialize the display for debugging. */ - setup_display(); - } - - /* Say hello. */ - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, "Welcome to Atmosph\xe8re Fus\xe9" "e!\n"); - print(SCREEN_LOG_LEVEL_DEBUG, "Using color linear framebuffer at 0x%p!\n", g_framebuffer); - - /* Load the loader payload into DRAM. */ - load_stage2(bct0); - - /* Setup argument data. */ - stage2_path = stage2_get_program_path(); - strcpy(g_chainloader_arg_data, stage2_path); - stage2_args = (stage2_args_t *)(g_chainloader_arg_data + strlen(stage2_path) + 1); /* May be unaligned. */ - memcpy(&stage2_args->version, &stage2_version, 4); - memcpy(&stage2_args->log_level, &log_level, sizeof(log_level)); - strcpy(stage2_args->bct0, bct0); - g_chainloader_argc = 2; - - /* Terminate the boot environment. */ - cleanup_env(); - - if (log_level != SCREEN_LOG_LEVEL_NONE) { - /* Wait a while for debugging. */ - mdelay(1000); - - /* Terminate the display for debugging. */ - cleanup_display(); - } - - /* Finally, after the cleanup routines (__libc_fini_array, etc.) are called, jump to Stage2. */ - __program_exit_callback = exit_callback; - return 0; -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/max77620.h b/fusee/fusee-primary/fusee-primary-main/src/max77620.h deleted file mode 100644 index 7c8e95556..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/max77620.h +++ /dev/null @@ -1,357 +0,0 @@ -/* - * Defining registers address and its bit definitions of MAX77620 and MAX20024 - * - * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - */ - -#ifndef _MFD_MAX77620_H_ -#define _MFD_MAX77620_H_ - -/* RTC Registers */ -#define MAX77620_REG_RTCINT 0x00 -#define MAX77620_REG_RTCINTM 0x01 -#define MAX77620_REG_RTCCNTLM 0x02 -#define MAX77620_REG_RTCCNTL 0x03 -#define MAX77620_REG_RTCUPDATE0 0x04 -#define MAX77620_REG_RTCUPDATE1 0x05 -#define MAX77620_REG_RTCSMPL 0x06 -#define MAX77620_REG_RTCSEC 0x07 -#define MAX77620_REG_RTCMIN 0x08 -#define MAX77620_REG_RTCHOUR 0x09 -#define MAX77620_REG_RTCDOW 0x0A -#define MAX77620_REG_RTCMONTH 0x0B -#define MAX77620_REG_RTCYEAR 0x0C -#define MAX77620_REG_RTCDOM 0x0D -#define MAX77620_REG_RTCSECA1 0x0E -#define MAX77620_REG_RTCMINA1 0x0F -#define MAX77620_REG_RTCHOURA1 0x10 -#define MAX77620_REG_RTCDOWA1 0x11 -#define MAX77620_REG_RTCMONTHA1 0x12 -#define MAX77620_REG_RTCYEARA1 0x13 -#define MAX77620_REG_RTCDOMA1 0x14 -#define MAX77620_REG_RTCSECA2 0x15 -#define MAX77620_REG_RTCMINA2 0x16 -#define MAX77620_REG_RTCHOURA2 0x17 -#define MAX77620_REG_RTCDOWA2 0x18 -#define MAX77620_REG_RTCMONTHA2 0x19 -#define MAX77620_REG_RTCYEARA2 0x1A -#define MAX77620_REG_RTCDOMA2 0x1B - -/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */ -#define MAX77620_REG_CNFGGLBL1 0x00 -#define MAX77620_REG_CNFGGLBL2 0x01 -#define MAX77620_REG_CNFGGLBL3 0x02 -#define MAX77620_REG_CNFG1_32K 0x03 -#define MAX77620_REG_CNFGBBC 0x04 -#define MAX77620_REG_IRQTOP 0x05 -#define MAX77620_REG_INTLBT 0x06 -#define MAX77620_REG_IRQSD 0x07 -#define MAX77620_REG_IRQ_LVL2_L0_7 0x08 -#define MAX77620_REG_IRQ_LVL2_L8 0x09 -#define MAX77620_REG_IRQ_LVL2_GPIO 0x0A -#define MAX77620_REG_ONOFFIRQ 0x0B -#define MAX77620_REG_NVERC 0x0C -#define MAX77620_REG_IRQTOPM 0x0D -#define MAX77620_REG_INTENLBT 0x0E -#define MAX77620_REG_IRQMASKSD 0x0F -#define MAX77620_REG_IRQ_MSK_L0_7 0x10 -#define MAX77620_REG_IRQ_MSK_L8 0x11 -#define MAX77620_REG_ONOFFIRQM 0x12 -#define MAX77620_REG_STATLBT 0x13 -#define MAX77620_REG_STATSD 0x14 -#define MAX77620_REG_ONOFFSTAT 0x15 - -/* SD and LDO Registers */ -#define MAX77620_REG_SD0 0x16 -#define MAX77620_REG_SD1 0x17 -#define MAX77620_REG_SD2 0x18 -#define MAX77620_REG_SD3 0x19 -#define MAX77620_REG_SD4 0x1A -#define MAX77620_REG_DVSSD0 0x1B -#define MAX77620_REG_DVSSD1 0x1C -#define MAX77620_REG_SD0_CFG 0x1D -#define MAX77620_REG_SD1_CFG 0x1E -#define MAX77620_REG_SD2_CFG 0x1F -#define MAX77620_REG_SD3_CFG 0x20 -#define MAX77620_REG_SD4_CFG 0x21 -#define MAX77620_REG_SD_CFG2 0x22 -#define MAX77620_REG_LDO0_CFG 0x23 -#define MAX77620_REG_LDO0_CFG2 0x24 -#define MAX77620_REG_LDO1_CFG 0x25 -#define MAX77620_REG_LDO1_CFG2 0x26 -#define MAX77620_REG_LDO2_CFG 0x27 -#define MAX77620_REG_LDO2_CFG2 0x28 -#define MAX77620_REG_LDO3_CFG 0x29 -#define MAX77620_REG_LDO3_CFG2 0x2A -#define MAX77620_REG_LDO4_CFG 0x2B -#define MAX77620_REG_LDO4_CFG2 0x2C -#define MAX77620_REG_LDO5_CFG 0x2D -#define MAX77620_REG_LDO5_CFG2 0x2E -#define MAX77620_REG_LDO6_CFG 0x2F -#define MAX77620_REG_LDO6_CFG2 0x30 -#define MAX77620_REG_LDO7_CFG 0x31 -#define MAX77620_REG_LDO7_CFG2 0x32 -#define MAX77620_REG_LDO8_CFG 0x33 -#define MAX77620_REG_LDO8_CFG2 0x34 -#define MAX77620_REG_LDO_CFG3 0x35 - -#define MAX77620_LDO_SLEW_RATE_MASK 0x1 - -/* LDO Configuration 3 */ -#define MAX77620_TRACK4_MASK (1 << 5) -#define MAX77620_TRACK4_SHIFT 5 - -/* Voltage */ -#define MAX77620_SDX_VOLT_MASK 0xFF -#define MAX77620_SD0_VOLT_MASK 0x3F -#define MAX77620_SD1_VOLT_MASK 0x7F -#define MAX77620_LDO_VOLT_MASK 0x3F - -#define MAX77620_REG_GPIO0 0x36 -#define MAX77620_REG_GPIO1 0x37 -#define MAX77620_REG_GPIO2 0x38 -#define MAX77620_REG_GPIO3 0x39 -#define MAX77620_REG_GPIO4 0x3A -#define MAX77620_REG_GPIO5 0x3B -#define MAX77620_REG_GPIO6 0x3C -#define MAX77620_REG_GPIO7 0x3D -#define MAX77620_REG_PUE_GPIO 0x3E -#define MAX77620_REG_PDE_GPIO 0x3F -#define MAX77620_REG_AME_GPIO 0x40 -#define MAX77620_REG_ONOFFCNFG1 0x41 -#define MAX77620_REG_ONOFFCNFG2 0x42 - -/* FPS Registers */ -#define MAX77620_REG_FPS_CFG0 0x43 -#define MAX77620_REG_FPS_CFG1 0x44 -#define MAX77620_REG_FPS_CFG2 0x45 -#define MAX77620_REG_FPS_LDO0 0x46 -#define MAX77620_REG_FPS_LDO1 0x47 -#define MAX77620_REG_FPS_LDO2 0x48 -#define MAX77620_REG_FPS_LDO3 0x49 -#define MAX77620_REG_FPS_LDO4 0x4A -#define MAX77620_REG_FPS_LDO5 0x4B -#define MAX77620_REG_FPS_LDO6 0x4C -#define MAX77620_REG_FPS_LDO7 0x4D -#define MAX77620_REG_FPS_LDO8 0x4E -#define MAX77620_REG_FPS_SD0 0x4F -#define MAX77620_REG_FPS_SD1 0x50 -#define MAX77620_REG_FPS_SD2 0x51 -#define MAX77620_REG_FPS_SD3 0x52 -#define MAX77620_REG_FPS_SD4 0x53 -#define MAX77620_REG_FPS_NONE 0 - -#define MAX77620_FPS_SRC_MASK 0xC0 -#define MAX77620_FPS_SRC_SHIFT 6 -#define MAX77620_FPS_PU_PERIOD_MASK 0x38 -#define MAX77620_FPS_PU_PERIOD_SHIFT 3 -#define MAX77620_FPS_PD_PERIOD_MASK 0x07 -#define MAX77620_FPS_PD_PERIOD_SHIFT 0 -#define MAX77620_FPS_TIME_PERIOD_MASK 0x38 -#define MAX77620_FPS_TIME_PERIOD_SHIFT 3 -#define MAX77620_FPS_EN_SRC_MASK 0x06 -#define MAX77620_FPS_EN_SRC_SHIFT 1 -#define MAX77620_FPS_ENFPS_SW_MASK 0x01 -#define MAX77620_FPS_ENFPS_SW 0x01 - -/* Minimum and maximum FPS period time (in microseconds) are - * different for MAX77620 and Max20024. - */ -#define MAX77620_FPS_PERIOD_MIN_US 40 -#define MAX20024_FPS_PERIOD_MIN_US 20 - -#define MAX77620_FPS_PERIOD_MAX_US 2560 -#define MAX20024_FPS_PERIOD_MAX_US 5120 - -#define MAX77620_REG_FPS_GPIO1 0x54 -#define MAX77620_REG_FPS_GPIO2 0x55 -#define MAX77620_REG_FPS_GPIO3 0x56 -#define MAX77620_REG_FPS_RSO 0x57 -#define MAX77620_REG_CID0 0x58 -#define MAX77620_REG_CID1 0x59 -#define MAX77620_REG_CID2 0x5A -#define MAX77620_REG_CID3 0x5B -#define MAX77620_REG_CID4 0x5C -#define MAX77620_REG_CID5 0x5D - -#define MAX77620_REG_DVSSD4 0x5E -#define MAX20024_REG_MAX_ADD 0x70 - -#define MAX77620_CID_DIDM_MASK 0xF0 -#define MAX77620_CID_DIDM_SHIFT 4 - -/* CNCG2SD */ -#define MAX77620_SD_CNF2_ROVS_EN_SD1 (1 << 1) -#define MAX77620_SD_CNF2_ROVS_EN_SD0 (1 << 2) - -/* Device Identification Metal */ -#define MAX77620_CID5_DIDM(n) (((n) >> 4) & 0xF) -/* Device Indentification OTP */ -#define MAX77620_CID5_DIDO(n) ((n) & 0xF) - -/* SD CNFG1 */ -#define MAX77620_SD_SR_MASK 0xC0 -#define MAX77620_SD_SR_SHIFT 6 -#define MAX77620_SD_POWER_MODE_MASK 0x30 -#define MAX77620_SD_POWER_MODE_SHIFT 4 -#define MAX77620_SD_CFG1_ADE_MASK (1 << 3) -#define MAX77620_SD_CFG1_ADE_DISABLE 0 -#define MAX77620_SD_CFG1_ADE_ENABLE (1 << 3) -#define MAX77620_SD_FPWM_MASK 0x04 -#define MAX77620_SD_FPWM_SHIFT 2 -#define MAX77620_SD_FSRADE_MASK 0x01 -#define MAX77620_SD_FSRADE_SHIFT 0 -#define MAX77620_SD_CFG1_FPWM_SD_MASK (1 << 2) -#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0 -#define MAX77620_SD_CFG1_FPWM_SD_FPWM (1 << 2) -#define MAX20024_SD_CFG1_MPOK_MASK (1 << 1) -#define MAX77620_SD_CFG1_FSRADE_SD_MASK (1 << 0) -#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0 -#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE (1 << 0) - -/* LDO_CNFG2 */ -#define MAX77620_LDO_POWER_MODE_MASK 0xC0 -#define MAX77620_LDO_POWER_MODE_SHIFT 6 -#define MAX20024_LDO_CFG2_MPOK_MASK (1 << 2) -#define MAX77620_LDO_CFG2_ADE_MASK (1 << 1) -#define MAX77620_LDO_CFG2_ADE_DISABLE 0 -#define MAX77620_LDO_CFG2_ADE_ENABLE (1 << 1) -#define MAX77620_LDO_CFG2_SS_MASK (1 << 0) -#define MAX77620_LDO_CFG2_SS_FAST (1 << 0) -#define MAX77620_LDO_CFG2_SS_SLOW 0 - -#define MAX77620_IRQ_TOP_GLBL_MASK (1 << 7) -#define MAX77620_IRQ_TOP_SD_MASK (1 << 6) -#define MAX77620_IRQ_TOP_LDO_MASK (1 << 5) -#define MAX77620_IRQ_TOP_GPIO_MASK (1 << 4) -#define MAX77620_IRQ_TOP_RTC_MASK (1 << 3) -#define MAX77620_IRQ_TOP_32K_MASK (1 << 2) -#define MAX77620_IRQ_TOP_ONOFF_MASK (1 << 1) - -#define MAX77620_IRQ_LBM_MASK (1 << 3) -#define MAX77620_IRQ_TJALRM1_MASK (1 << 2) -#define MAX77620_IRQ_TJALRM2_MASK (1 << 1) - -#define MAX77620_CNFG_GPIO_DRV_MASK (1 << 0) -#define MAX77620_CNFG_GPIO_DRV_PUSHPULL (1 << 0) -#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN 0 -#define MAX77620_CNFG_GPIO_DIR_MASK (1 << 1) -#define MAX77620_CNFG_GPIO_DIR_INPUT (1 << 1) -#define MAX77620_CNFG_GPIO_DIR_OUTPUT 0 -#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK (1 << 2) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK (1 << 3) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH (1 << 3) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW 0 -#define MAX77620_CNFG_GPIO_INT_MASK (0x3 << 4) -#define MAX77620_CNFG_GPIO_INT_FALLING (1 << 4) -#define MAX77620_CNFG_GPIO_INT_RISING (1 << 5) -#define MAX77620_CNFG_GPIO_DBNC_MASK (0x3 << 6) -#define MAX77620_CNFG_GPIO_DBNC_None (0x0 << 6) -#define MAX77620_CNFG_GPIO_DBNC_8ms (0x1 << 6) -#define MAX77620_CNFG_GPIO_DBNC_16ms (0x2 << 6) -#define MAX77620_CNFG_GPIO_DBNC_32ms (0x3 << 6) - -#define MAX77620_IRQ_LVL2_GPIO_EDGE0 (1 << 0) -#define MAX77620_IRQ_LVL2_GPIO_EDGE1 (1 << 1) -#define MAX77620_IRQ_LVL2_GPIO_EDGE2 (1 << 2) -#define MAX77620_IRQ_LVL2_GPIO_EDGE3 (1 << 3) -#define MAX77620_IRQ_LVL2_GPIO_EDGE4 (1 << 4) -#define MAX77620_IRQ_LVL2_GPIO_EDGE5 (1 << 5) -#define MAX77620_IRQ_LVL2_GPIO_EDGE6 (1 << 6) -#define MAX77620_IRQ_LVL2_GPIO_EDGE7 (1 << 7) - -#define MAX77620_CNFG1_32K_OUT0_EN (1 << 2) - -#define MAX77620_ONOFFCNFG1_SFT_RST (1 << 7) -#define MAX77620_ONOFFCNFG1_MRT_MASK 0x38 -#define MAX77620_ONOFFCNFG1_MRT_SHIFT 0x3 -#define MAX77620_ONOFFCNFG1_SLPEN (1 << 2) -#define MAX77620_ONOFFCNFG1_PWR_OFF (1 << 1) -#define MAX20024_ONOFFCNFG1_CLRSE 0x18 - -#define MAX77620_ONOFFCNFG2_SFT_RST_WK (1 << 7) -#define MAX77620_ONOFFCNFG2_WD_RST_WK (1 << 6) -#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK (1 << 5) -#define MAX77620_ONOFFCNFG2_WK_ALARM1 (1 << 2) -#define MAX77620_ONOFFCNFG2_WK_EN0 (1 << 0) - -#define MAX77620_GLBLM_MASK (1 << 0) - -#define MAX77620_WDTC_MASK 0x3 -#define MAX77620_WDTOFFC (1 << 4) -#define MAX77620_WDTSLPC (1 << 3) -#define MAX77620_WDTEN (1 << 2) - -#define MAX77620_TWD_MASK 0x3 -#define MAX77620_TWD_2s 0x0 -#define MAX77620_TWD_16s 0x1 -#define MAX77620_TWD_64s 0x2 -#define MAX77620_TWD_128s 0x3 - -#define MAX77620_CNFGGLBL1_LBDAC_EN (1 << 7) -#define MAX77620_CNFGGLBL1_MPPLD (1 << 6) -#define MAX77620_CNFGGLBL1_LBHYST ((1 << 5) | (1 << 4)) -#define MAX77620_CNFGGLBL1_LBHYST_N (1 << 4) -#define MAX77620_CNFGGLBL1_LBDAC 0x0E -#define MAX77620_CNFGGLBL1_LBDAC_N (1 << 1) -#define MAX77620_CNFGGLBL1_LBRSTEN (1 << 0) - -/* CNFG BBC registers */ -#define MAX77620_CNFGBBC_ENABLE (1 << 0) -#define MAX77620_CNFGBBC_CURRENT_MASK 0x06 -#define MAX77620_CNFGBBC_CURRENT_SHIFT 1 -#define MAX77620_CNFGBBC_VOLTAGE_MASK 0x18 -#define MAX77620_CNFGBBC_VOLTAGE_SHIFT 3 -#define MAX77620_CNFGBBC_LOW_CURRENT_DISABLE (1 << 5) -#define MAX77620_CNFGBBC_RESISTOR_MASK 0xC0 -#define MAX77620_CNFGBBC_RESISTOR_SHIFT 6 - -#define MAX77620_FPS_COUNT 3 - -/* Interrupts */ -enum { - MAX77620_IRQ_TOP_GLBL, /* Low-Battery */ - MAX77620_IRQ_TOP_SD, /* SD power fail */ - MAX77620_IRQ_TOP_LDO, /* LDO power fail */ - MAX77620_IRQ_TOP_GPIO, /* TOP GPIO internal int to MAX77620 */ - MAX77620_IRQ_TOP_RTC, /* RTC */ - MAX77620_IRQ_TOP_32K, /* 32kHz oscillator */ - MAX77620_IRQ_TOP_ONOFF, /* ON/OFF oscillator */ - MAX77620_IRQ_LBT_MBATLOW, /* Thermal alarm status, > 120C */ - MAX77620_IRQ_LBT_TJALRM1, /* Thermal alarm status, > 120C */ - MAX77620_IRQ_LBT_TJALRM2, /* Thermal alarm status, > 140C */ -}; - -/* GPIOs */ -enum { - MAX77620_GPIO0, - MAX77620_GPIO1, - MAX77620_GPIO2, - MAX77620_GPIO3, - MAX77620_GPIO4, - MAX77620_GPIO5, - MAX77620_GPIO6, - MAX77620_GPIO7, - MAX77620_GPIO_NR, -}; - -/* FPS Source */ -enum max77620_fps_src { - MAX77620_FPS_SRC_0, - MAX77620_FPS_SRC_1, - MAX77620_FPS_SRC_2, - MAX77620_FPS_SRC_NONE, - MAX77620_FPS_SRC_DEF, -}; - -enum max77620_chip_id { - MAX77620, - MAX20024, -}; - -#endif /* _MFD_MAX77620_H_ */ diff --git a/fusee/fusee-primary/fusee-primary-main/src/max7762x.c b/fusee/fusee-primary/fusee-primary-main/src/max7762x.c deleted file mode 100644 index 54530499d..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/max7762x.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "max7762x.h" -#include "max77620.h" -#include "i2c.h" -#include "timers.h" - -#define REGULATOR_SD 0 -#define REGULATOR_LDO 1 - -typedef struct _max77620_regulator_t -{ - uint8_t type; - const char *name; - uint8_t reg_sd; - uint32_t mv_step; - uint32_t mv_min; - uint32_t mv_default; - uint32_t mv_max; - uint8_t volt_addr; - uint8_t cfg_addr; - uint8_t volt_mask; - uint8_t enable_mask; - uint8_t enable_shift; - uint8_t status_mask; - - uint8_t fps_addr; - uint8_t fps_src; - uint8_t pd_period; - uint8_t pu_period; -} max77620_regulator_t; - -static const max77620_regulator_t _pmic_regulators[] = { - { REGULATOR_SD, "sd0", 0x16, 12500, 600000, 625000, 1400000, MAX77620_REG_SD0, MAX77620_REG_SD0_CFG, 0x3F, 0x30, 4, 0x80, 0x4F, 1, 7, 1 }, - { REGULATOR_SD, "sd1", 0x17, 12500, 600000, 1125000, 1125000, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, 0x3F, 0x30, 4, 0x40, 0x50, 0, 1, 5 }, - { REGULATOR_SD, "sd2", 0x18, 12500, 600000, 1325000, 1350000, MAX77620_REG_SD2, MAX77620_REG_SD2_CFG, 0xFF, 0x30, 4, 0x20, 0x51, 1, 5, 2 }, - { REGULATOR_SD, "sd3", 0x19, 12500, 600000, 1800000, 1800000, MAX77620_REG_SD3, MAX77620_REG_SD3_CFG, 0xFF, 0x30, 4, 0x10, 0x52, 0, 3, 3 }, - { REGULATOR_LDO, "ldo0", 0x00, 25000, 800000, 1200000, 1200000, MAX77620_REG_LDO0_CFG, MAX77620_REG_LDO0_CFG2, 0x3F, 0xC0, 6, 0x00, 0x46, 3, 7, 0 }, - { REGULATOR_LDO, "ldo1", 0x00, 25000, 800000, 1050000, 1050000, MAX77620_REG_LDO1_CFG, MAX77620_REG_LDO1_CFG2, 0x3F, 0xC0, 6, 0x00, 0x47, 3, 7, 0 }, - { REGULATOR_LDO, "ldo2", 0x00, 50000, 800000, 1800000, 3300000, MAX77620_REG_LDO2_CFG, MAX77620_REG_LDO2_CFG2, 0x3F, 0xC0, 6, 0x00, 0x48, 3, 7, 0 }, - { REGULATOR_LDO, "ldo3", 0x00, 50000, 800000, 3100000, 3100000, MAX77620_REG_LDO3_CFG, MAX77620_REG_LDO3_CFG2, 0x3F, 0xC0, 6, 0x00, 0x49, 3, 7, 0 }, - { REGULATOR_LDO, "ldo4", 0x00, 12500, 800000, 850000, 850000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4A, 0, 7, 1 }, - { REGULATOR_LDO, "ldo5", 0x00, 50000, 800000, 1800000, 1800000, MAX77620_REG_LDO5_CFG, MAX77620_REG_LDO5_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4B, 3, 7, 0 }, - { REGULATOR_LDO, "ldo6", 0x00, 50000, 800000, 2900000, 2900000, MAX77620_REG_LDO6_CFG, MAX77620_REG_LDO6_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4C, 3, 7, 0 }, - { REGULATOR_LDO, "ldo7", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO7_CFG, MAX77620_REG_LDO7_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4D, 1, 4, 3 }, - { REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4E, 3, 7, 0 } -}; - -int max77620_regulator_get_status(uint32_t id) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - uint8_t val = 0; - - if (reg->type == REGULATOR_SD) { - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_STATSD, &val, 1)) - return (val & reg->status_mask) ? 0 : 1; - } - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->cfg_addr, &val, 1)) - return (val & 8) ? 1 : 0; - - return 0; -} - -int max77620_regulator_config_fps(uint32_t id) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - uint8_t val = ((reg->fps_src << 6) | (reg->pu_period << 3) | (reg->pd_period)); - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->fps_addr, &val, 1)) { - return 1; - } - - return 0; -} - -int max77620_regulator_set_voltage(uint32_t id, uint32_t mv) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - - if ((mv < reg->mv_default) || (mv > reg->mv_max)) - return 0; - - uint32_t mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step; - uint8_t val = 0; - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1)) - { - val = ((val & ~reg->volt_mask) | (mult & reg->volt_mask)); - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1)) - { - udelay(1000); - return 1; - } - } - - return 0; -} - -int max77620_regulator_enable(uint32_t id, int enable) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - - uint32_t addr = (reg->type == REGULATOR_SD) ? reg->cfg_addr : reg->volt_addr; - uint8_t val = 0; - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1)) - { - if (enable) - val = ((val & ~reg->enable_mask) | ((3 << reg->enable_shift) & reg->enable_mask)); - else - val &= ~reg->enable_mask; - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1)) - { - udelay(1000); - return 1; - } - } - - return 0; -} - -void max77620_config_default() -{ - for (uint32_t i = 1; i <= REGULATOR_MAX; i++) - { - uint8_t val = 0; - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CID4, &val, 1)) - { - max77620_regulator_config_fps(i); - max77620_regulator_set_voltage(i, _pmic_regulators[i].mv_default); - - if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE) { - max77620_regulator_enable(i, 1); - } - } - } - - uint8_t val = 4; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD_CFG2, &val, 1); -} - -void max77620_low_battery_monitor_config() -{ - uint8_t val = (MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N); - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGGLBL1, &val, 1); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/max7762x.h b/fusee/fusee-primary/fusee-primary-main/src/max7762x.h deleted file mode 100644 index 3e6d4a1e3..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/max7762x.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MAX7762X_H_ -#define FUSEE_MAX7762X_H_ - -/* -* Switch Power domains (max77620): -* Name | Usage | uV step | uV min | uV default | uV max | Init -*-------+---------------+---------+--------+------------+---------+------------------ -* sd0 | core | 12500 | 600000 | 625000 | 1400000 | 1.125V (pkg1.1) -* sd1 | SDRAM | 12500 | 600000 | 1125000 | 1125000 | 1.1V (pkg1.1) -* sd2 | ldo{0-1, 7-8} | 12500 | 600000 | 1325000 | 1350000 | 1.325V (pcv) -* sd3 | 1.8V general | 12500 | 600000 | 1800000 | 1800000 | -* ldo0 | Display Panel | 25000 | 800000 | 1200000 | 1200000 | 1.2V (pkg1.1) -* ldo1 | XUSB, PCIE | 25000 | 800000 | 1050000 | 1050000 | 1.05V (pcv) -* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 | -* ldo3 | | 50000 | 800000 | 3100000 | 3100000 | -* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 | -* ldo5 | | 50000 | 800000 | 1800000 | 1800000 | -* ldo6 | | 50000 | 800000 | 2900000 | 2900000 | -* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 | -* ldo8 | XUSB, DC | 50000 | 800000 | 1050000 | 1050000 | -*/ - -/* -* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode -* MAX77620_REG_GPIOx: 0x9 sets output and enable -*/ - -/*! MAX77620 partitions. */ -#define REGULATOR_SD0 0 -#define REGULATOR_SD1 1 -#define REGULATOR_SD2 2 -#define REGULATOR_SD3 3 -#define REGULATOR_LDO0 4 -#define REGULATOR_LDO1 5 -#define REGULATOR_LDO2 6 -#define REGULATOR_LDO3 7 -#define REGULATOR_LDO4 8 -#define REGULATOR_LDO5 9 -#define REGULATOR_LDO6 10 -#define REGULATOR_LDO7 11 -#define REGULATOR_LDO8 12 -#define REGULATOR_MAX 12 - -int max77620_regulator_get_status(uint32_t id); -int max77620_regulator_config_fps(uint32_t id); -int max77620_regulator_set_voltage(uint32_t id, uint32_t mv); -int max77620_regulator_enable(uint32_t id, int enable); -void max77620_config_default(); -void max77620_low_battery_monitor_config(); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/max77812.h b/fusee/fusee-primary/fusee-primary-main/src/max77812.h deleted file mode 100644 index bf329ff6b..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/max77812.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MAX77812_H_ -#define FUSEE_MAX77812_H_ - -#define MAX77812_REG_RESET 0x00 -#define MAX77812_REG_INT_SRC 0x01 -#define MAX77812_REG_INT_SRC_M 0x02 -#define MAX77812_REG_TOPSYS_INT 0x03 -#define MAX77812_REG_TOPSYS_INT_M 0x04 -#define MAX77812_REG_TOPSYS_STAT 0x05 -#define MAX77812_REG_EN_CTRL 0x06 -#define MAX77812_REG_STUP_DLY1 0x07 -#define MAX77812_REG_STUP_DLY2 0x08 -#define MAX77812_REG_STUP_DLY3 0x09 -#define MAX77812_REG_SHDN_DLY1 0x0A -#define MAX77812_REG_SHDN_DLY2 0x0B -#define MAX77812_REG_SHDN_DLY3 0x0C -#define MAX77812_REG_SHDN_DLY4 0x0D -#define MAX77812_REG_WDTRSTB_DEB 0x0E -#define MAX77812_REG_GPI_FUNC 0x0F -#define MAX77812_REG_GPI_DEB1 0x10 -#define MAX77812_REG_GPI_DEB2 0x11 -#define MAX77812_REG_GPI_PD_CTRL 0x12 -#define MAX77812_REG_PROT_CFG 0x13 -#define MAX77812_REG_I2C_CFG 0x15 -#define MAX77812_REG_BUCK_INT 0x20 -#define MAX77812_REG_BUCK_INT_M 0x21 -#define MAX77812_REG_BUCK_STAT 0x22 -#define MAX77812_REG_M1_VOUT 0x23 -#define MAX77812_REG_M2_VOUT 0x24 -#define MAX77812_REG_M3_VOUT 0x25 -#define MAX77812_REG_M4_VOUT 0x26 -#define MAX77812_REG_M1_VOUT_D 0x27 -#define MAX77812_REG_M2_VOUT_D 0x28 -#define MAX77812_REG_M3_VOUT_D 0x29 -#define MAX77812_REG_M4_VOUT_D 0x2A -#define MAX77812_REG_M1_VOUT_S 0x2B -#define MAX77812_REG_M2_VOUT_S 0x2C -#define MAX77812_REG_M3_VOUT_S 0x2D -#define MAX77812_REG_M4_VOUT_S 0x2E -#define MAX77812_REG_M1_CGF 0x2F -#define MAX77812_REG_M2_CGF 0x30 -#define MAX77812_REG_M3_CGF 0x31 -#define MAX77812_REG_M4_CGF 0x32 -#define MAX77812_REG_GLB_CFG1 0x33 -#define MAX77812_REG_GLB_CFG2 0x34 -#define MAX77812_REG_GLB_CFG3 0x35 - -#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n) -#define MAX77812_START_SLEW_RATE_MASK 0x07 -#define MAX77812_SHDN_SLEW_RATE_MASK 0x70 -#define MAX77812_RAMPDOWN_SLEW_RATE_MASK 0x07 -#define MAX77812_RAMPUP_SLEW_RATE_MASK 0x70 - -#define MAX77812_VOUT_MASK 0xFF -#define MAX77812_VOUT_N_VOLTAGE 0xFF -#define MAX77812_VOUT_VMIN 250000 -#define MAX77812_VOUT_VMAX 1525000 -#define MAX77812_VOUT_STEP 5000 - -#define MAX77812_REGULATOR_ID_M1 0 -#define MAX77812_REGULATOR_ID_M2 1 -#define MAX77812_REGULATOR_ID_M3 2 -#define MAX77812_REGULATOR_ID_M4 3 - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/mc.c b/fusee/fusee-primary/fusee-primary-main/src/mc.c deleted file mode 100644 index 35048d98e..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/mc.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "mc.h" -#include "car.h" -#include "timers.h" - -void mc_config_tsec_carveout(uint32_t bom, uint32_t size1mb, bool lock) -{ - MAKE_MC_REG(MC_SEC_CARVEOUT_BOM) = bom; - MAKE_MC_REG(MC_SEC_CARVEOUT_SIZE_MB) = size1mb; - - if (lock) - MAKE_MC_REG(MC_SEC_CARVEOUT_REG_CTRL) = 1; -} - -void mc_config_carveout() -{ - *(volatile uint32_t *)0x8005FFFC = 0xC0EDBBCC; - - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = 1; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_SIZE_MB) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_REG_CTRL) = 1; - - mc_config_tsec_carveout(0, 0, true); - - MAKE_MC_REG(MC_MTS_CARVEOUT_BOM) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_SIZE_MB) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_ADR_HI) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_REG_CTRL) = 1; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CFG0) = 0x4000006; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2) = (BIT(CSR_GPUSRD) | BIT(CSW_GPUSWR)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4) = (BIT(CSR_GPUSRD2) | BIT(CSW_GPUSWR2)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CFG0) = 0x4401E7E; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CFG0) = 0x8F; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CFG0) = 0x8F; -} - -void mc_config_carveout_finalize() -{ - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_BOM) = 0x80020000; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_SIZE_128KB) = 2; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = (BIT(CSR_GPUSRD) | BIT(CSW_GPUSWR)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4) = (BIT(CSR_GPUSRD2) | BIT(CSW_GPUSWR2)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CFG0) = 0x440167E; -} - -void mc_enable_ahb_redirect() -{ - volatile tegra_car_t *car = car_get_regs(); - car->lvl2_clk_gate_ovrd = ((car->lvl2_clk_gate_ovrd & 0xFFF7FFFF) | 0x80000); - - MAKE_MC_REG(MC_IRAM_BOM) = 0x40000000; - MAKE_MC_REG(MC_IRAM_TOM) = 0x4003F000; -} - -void mc_disable_ahb_redirect() -{ - volatile tegra_car_t *car = car_get_regs(); - - MAKE_MC_REG(MC_IRAM_BOM) = 0xFFFFF000; - MAKE_MC_REG(MC_IRAM_TOM) = 0; - - car->lvl2_clk_gate_ovrd &= 0xFFF7FFFF; -} - -void mc_enable() -{ - volatile tegra_car_t *car = car_get_regs(); - - /* Set EMC clock source. */ - car->clk_source_emc = ((car->clk_source_emc & 0x1FFFFFFF) | 0x40000000); - - /* Enable MIPI CAL clock. */ - car->clk_enb_h_set = ((car->clk_enb_h_set & 0xFDFFFFFF) | 0x2000000); - - /* Enable MC clock. */ - car->clk_enb_h_set = ((car->clk_enb_h_set & 0xFFFFFFFE) | 1); - - /* Enable EMC DLL clock. */ - car->clk_enb_x_set = ((car->clk_enb_x_set & 0xFFFFBFFF) | 0x4000); - - /* Clear EMC and MC reset. */ - /* NOTE: [4.0.0+] This was changed to use the right register. */ - /* car->rst_dev_h_set = 0x2000001; */ - car->rst_dev_h_clr = 0x2000001; - udelay(5); - - mc_disable_ahb_redirect(); -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/mc.h b/fusee/fusee-primary/fusee-primary-main/src/mc.h deleted file mode 100644 index c414f907a..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/mc.h +++ /dev/null @@ -1,606 +0,0 @@ -/* - * Copyright (c) 2014, NVIDIA Corporation. All rights reserved. - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MC_H_ -#define FUSEE_MC_H_ - -#include -#include - -#define MC_BASE 0x70019000 -#define MAKE_MC_REG(n) MAKE_REG32(MC_BASE + n) - -#define MC_INTSTATUS 0x0 -#define MC_INTMASK 0x4 -#define MC_ERR_STATUS 0x8 -#define MC_ERR_ADR 0xc -#define MC_SMMU_CONFIG 0x10 -#define MC_SMMU_TLB_CONFIG 0x14 -#define MC_SMMU_PTC_CONFIG 0x18 -#define MC_SMMU_PTB_ASID 0x1c -#define MC_SMMU_PTB_DATA 0x20 -#define MC_SMMU_TLB_FLUSH 0x30 -#define MC_SMMU_PTC_FLUSH 0x34 -#define MC_SMMU_ASID_SECURITY 0x38 -#define MC_SMMU_ASID_SECURITY_1 0x3c -#define MC_SMMU_ASID_SECURITY_2 0x9e0 -#define MC_SMMU_ASID_SECURITY_3 0x9e4 -#define MC_SMMU_ASID_SECURITY_4 0x9e8 -#define MC_SMMU_ASID_SECURITY_5 0x9ec -#define MC_SMMU_ASID_SECURITY_6 0x9f0 -#define MC_SMMU_ASID_SECURITY_7 0x9f4 -#define MC_SMMU_AFI_ASID 0x238 -#define MC_SMMU_AVPC_ASID 0x23c -#define MC_SMMU_TSEC_ASID 0x294 -#define MC_SMMU_PPCS1_ASID 0x298 -#define MC_SMMU_TRANSLATION_ENABLE_0 0x228 -#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c -#define MC_SMMU_TRANSLATION_ENABLE_2 0x230 -#define MC_SMMU_TRANSLATION_ENABLE_3 0x234 -#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98 -#define MC_PCFIFO_CLIENT_CONFIG0 0xdd0 -#define MC_PCFIFO_CLIENT_CONFIG1 0xdd4 -#define MC_PCFIFO_CLIENT_CONFIG2 0xdd8 -#define MC_PCFIFO_CLIENT_CONFIG3 0xddc -#define MC_PCFIFO_CLIENT_CONFIG4 0xde0 -#define MC_EMEM_CFG 0x50 -#define MC_EMEM_ADR_CFG 0x54 -#define MC_EMEM_ADR_CFG_DEV0 0x58 -#define MC_EMEM_ADR_CFG_DEV1 0x5c -#define MC_EMEM_ADR_CFG_CHANNEL_MASK 0x60 -#define MC_EMEM_ADR_CFG_BANK_MASK_0 0x64 -#define MC_EMEM_ADR_CFG_BANK_MASK_1 0x68 -#define MC_EMEM_ADR_CFG_BANK_MASK_2 0x6c -#define MC_SECURITY_CFG0 0x70 -#define MC_SECURITY_CFG1 0x74 -#define MC_SECURITY_CFG3 0x9bc -#define MC_SECURITY_RSV 0x7c -#define MC_EMEM_ARB_CFG 0x90 -#define MC_EMEM_ARB_OUTSTANDING_REQ 0x94 -#define MC_EMEM_ARB_TIMING_RCD 0x98 -#define MC_EMEM_ARB_TIMING_RP 0x9c -#define MC_EMEM_ARB_TIMING_RC 0xa0 -#define MC_EMEM_ARB_TIMING_RAS 0xa4 -#define MC_EMEM_ARB_TIMING_FAW 0xa8 -#define MC_EMEM_ARB_TIMING_RRD 0xac -#define MC_EMEM_ARB_TIMING_RAP2PRE 0xb0 -#define MC_EMEM_ARB_TIMING_WAP2PRE 0xb4 -#define MC_EMEM_ARB_TIMING_R2R 0xb8 -#define MC_EMEM_ARB_TIMING_W2W 0xbc -#define MC_EMEM_ARB_TIMING_R2W 0xc0 -#define MC_EMEM_ARB_TIMING_W2R 0xc4 -#define MC_EMEM_ARB_TIMING_RFCPB 0x6c0 -#define MC_EMEM_ARB_TIMING_CCDMW 0x6c4 -#define MC_EMEM_ARB_REFPB_HP_CTRL 0x6f0 -#define MC_EMEM_ARB_REFPB_BANK_CTRL 0x6f4 -#define MC_EMEM_ARB_DA_TURNS 0xd0 -#define MC_EMEM_ARB_DA_COVERS 0xd4 -#define MC_EMEM_ARB_MISC0 0xd8 -#define MC_EMEM_ARB_MISC1 0xdc -#define MC_EMEM_ARB_MISC2 0xc8 -#define MC_EMEM_ARB_RING1_THROTTLE 0xe0 -#define MC_EMEM_ARB_RING3_THROTTLE 0xe4 -#define MC_EMEM_ARB_NISO_THROTTLE 0x6b0 -#define MC_EMEM_ARB_OVERRIDE 0xe8 -#define MC_EMEM_ARB_RSV 0xec -#define MC_CLKEN_OVERRIDE 0xf4 -#define MC_TIMING_CONTROL_DBG 0xf8 -#define MC_TIMING_CONTROL 0xfc -#define MC_STAT_CONTROL 0x100 -#define MC_STAT_STATUS 0x104 -#define MC_STAT_EMC_CLOCK_LIMIT 0x108 -#define MC_STAT_EMC_CLOCK_LIMIT_MSBS 0x10c -#define MC_STAT_EMC_CLOCKS 0x110 -#define MC_STAT_EMC_CLOCKS_MSBS 0x114 -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO 0x118 -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO 0x158 -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI 0x11c -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI 0x15c -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER 0xa20 -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER 0xa24 -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_LO 0x198 -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_LO 0x1a8 -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_HI 0x19c -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_HI 0x1ac -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_UPPER 0xa28 -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_UPPER 0xa2c -#define MC_STAT_EMC_FILTER_SET0_ASID 0x1a0 -#define MC_STAT_EMC_FILTER_SET1_ASID 0x1b0 -#define MC_STAT_EMC_FILTER_SET0_SLACK_LIMIT 0x120 -#define MC_STAT_EMC_FILTER_SET1_SLACK_LIMIT 0x160 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_0 0x128 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_0 0x168 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_1 0x12c -#define MC_STAT_EMC_FILTER_SET1_CLIENT_1 0x16c -#define MC_STAT_EMC_FILTER_SET0_CLIENT_2 0x130 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_2 0x170 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_3 0x134 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_4 0xb88 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_3 0x174 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_4 0xb8c -#define MC_STAT_EMC_SET0_COUNT 0x138 -#define MC_STAT_EMC_SET0_COUNT_MSBS 0x13c -#define MC_STAT_EMC_SET1_COUNT 0x178 -#define MC_STAT_EMC_SET1_COUNT_MSBS 0x17c -#define MC_STAT_EMC_SET0_SLACK_ACCUM 0x140 -#define MC_STAT_EMC_SET0_SLACK_ACCUM_MSBS 0x144 -#define MC_STAT_EMC_SET1_SLACK_ACCUM 0x180 -#define MC_STAT_EMC_SET1_SLACK_ACCUM_MSBS 0x184 -#define MC_STAT_EMC_SET0_HISTO_COUNT 0x148 -#define MC_STAT_EMC_SET0_HISTO_COUNT_MSBS 0x14c -#define MC_STAT_EMC_SET1_HISTO_COUNT 0x188 -#define MC_STAT_EMC_SET1_HISTO_COUNT_MSBS 0x18c -#define MC_STAT_EMC_SET0_MINIMUM_SLACK_OBSERVED 0x150 -#define MC_STAT_EMC_SET1_MINIMUM_SLACK_OBSERVED 0x190 -#define MC_STAT_EMC_SET0_IDLE_CYCLE_COUNT 0x1b8 -#define MC_STAT_EMC_SET0_IDLE_CYCL_COUNT_MSBS 0x1bc -#define MC_STAT_EMC_SET1_IDLE_CYCLE_COUNT 0x1c8 -#define MC_STAT_EMC_SET1_IDLE_CYCL_COUNT_MSBS 0x1cc -#define MC_STAT_EMC_SET0_IDLE_CYCLE_PARTITION_SELECT 0x1c0 -#define MC_STAT_EMC_SET1_IDLE_CYCLE_PARTITION_SELECT 0x1d0 -#define MC_CLIENT_HOTRESET_CTRL 0x200 -#define MC_CLIENT_HOTRESET_CTRL_1 0x970 -#define MC_CLIENT_HOTRESET_STATUS 0x204 -#define MC_CLIENT_HOTRESET_STATUS_1 0x974 -#define MC_EMEM_ARB_ISOCHRONOUS_0 0x208 -#define MC_EMEM_ARB_ISOCHRONOUS_1 0x20c -#define MC_EMEM_ARB_ISOCHRONOUS_2 0x210 -#define MC_EMEM_ARB_ISOCHRONOUS_3 0x214 -#define MC_EMEM_ARB_ISOCHRONOUS_4 0xb94 -#define MC_EMEM_ARB_HYSTERESIS_0 0x218 -#define MC_EMEM_ARB_HYSTERESIS_1 0x21c -#define MC_EMEM_ARB_HYSTERESIS_2 0x220 -#define MC_EMEM_ARB_HYSTERESIS_3 0x224 -#define MC_EMEM_ARB_HYSTERESIS_4 0xb84 -#define MC_EMEM_ARB_DHYSTERESIS_0 0xbb0 -#define MC_EMEM_ARB_DHYSTERESIS_1 0xbb4 -#define MC_EMEM_ARB_DHYSTERESIS_2 0xbb8 -#define MC_EMEM_ARB_DHYSTERESIS_3 0xbbc -#define MC_EMEM_ARB_DHYSTERESIS_4 0xbc0 -#define MC_EMEM_ARB_DHYST_CTRL 0xbcc -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 0xbd0 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 0xbd4 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 0xbd8 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 0xbdc -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 0xbe0 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 0xbe4 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 0xbe8 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 0xbec -#define MC_RESERVED_RSV 0x3fc -#define MC_DISB_EXTRA_SNAP_LEVELS 0x408 -#define MC_APB_EXTRA_SNAP_LEVELS 0x2a4 -#define MC_AHB_EXTRA_SNAP_LEVELS 0x2a0 -#define MC_USBD_EXTRA_SNAP_LEVELS 0xa18 -#define MC_ISP_EXTRA_SNAP_LEVELS 0xa08 -#define MC_AUD_EXTRA_SNAP_LEVELS 0xa10 -#define MC_MSE_EXTRA_SNAP_LEVELS 0x40c -#define MC_GK2_EXTRA_SNAP_LEVELS 0xa40 -#define MC_A9AVPPC_EXTRA_SNAP_LEVELS 0x414 -#define MC_FTOP_EXTRA_SNAP_LEVELS 0x2bc -#define MC_JPG_EXTRA_SNAP_LEVELS 0xa3c -#define MC_HOST_EXTRA_SNAP_LEVELS 0xa14 -#define MC_SAX_EXTRA_SNAP_LEVELS 0x2c0 -#define MC_DIS_EXTRA_SNAP_LEVELS 0x2ac -#define MC_VICPC_EXTRA_SNAP_LEVELS 0xa1c -#define MC_HDAPC_EXTRA_SNAP_LEVELS 0xa48 -#define MC_AVP_EXTRA_SNAP_LEVELS 0x2a8 -#define MC_USBX_EXTRA_SNAP_LEVELS 0x404 -#define MC_PCX_EXTRA_SNAP_LEVELS 0x2b8 -#define MC_SD_EXTRA_SNAP_LEVELS 0xa04 -#define MC_DFD_EXTRA_SNAP_LEVELS 0xa4c -#define MC_VE_EXTRA_SNAP_LEVELS 0x2d8 -#define MC_GK_EXTRA_SNAP_LEVELS 0xa00 -#define MC_VE2_EXTRA_SNAP_LEVELS 0x410 -#define MC_SDM_EXTRA_SNAP_LEVELS 0xa44 -#define MC_VIDEO_PROTECT_BOM 0x648 -#define MC_VIDEO_PROTECT_SIZE_MB 0x64c -#define MC_VIDEO_PROTECT_BOM_ADR_HI 0x978 -#define MC_VIDEO_PROTECT_REG_CTRL 0x650 -#define MC_ERR_VPR_STATUS 0x654 -#define MC_ERR_VPR_ADR 0x658 -#define MC_VIDEO_PROTECT_VPR_OVERRIDE 0x418 -#define MC_VIDEO_PROTECT_VPR_OVERRIDE1 0x590 -#define MC_IRAM_BOM 0x65c -#define MC_IRAM_TOM 0x660 -#define MC_IRAM_ADR_HI 0x980 -#define MC_IRAM_REG_CTRL 0x964 -#define MC_EMEM_CFG_ACCESS_CTRL 0x664 -#define MC_TZ_SECURITY_CTRL 0x668 -#define MC_EMEM_ARB_OUTSTANDING_REQ_RING3 0x66c -#define MC_EMEM_ARB_OUTSTANDING_REQ_NISO 0x6b4 -#define MC_EMEM_ARB_RING0_THROTTLE_MASK 0x6bc -#define MC_EMEM_ARB_NISO_THROTTLE_MASK 0x6b8 -#define MC_EMEM_ARB_NISO_THROTTLE_MASK_1 0xb80 -#define MC_SEC_CARVEOUT_BOM 0x670 -#define MC_SEC_CARVEOUT_SIZE_MB 0x674 -#define MC_SEC_CARVEOUT_ADR_HI 0x9d4 -#define MC_SEC_CARVEOUT_REG_CTRL 0x678 -#define MC_ERR_SEC_STATUS 0x67c -#define MC_ERR_SEC_ADR 0x680 -#define MC_PC_IDLE_CLOCK_GATE_CONFIG 0x684 -#define MC_STUTTER_CONTROL 0x688 -#define MC_RESERVED_RSV_1 0x958 -#define MC_DVFS_PIPE_SELECT 0x95c -#define MC_AHB_PTSA_MIN 0x4e0 -#define MC_AUD_PTSA_MIN 0x54c -#define MC_MLL_MPCORER_PTSA_RATE 0x44c -#define MC_RING2_PTSA_RATE 0x440 -#define MC_USBD_PTSA_RATE 0x530 -#define MC_USBX_PTSA_MIN 0x528 -#define MC_USBD_PTSA_MIN 0x534 -#define MC_APB_PTSA_MAX 0x4f0 -#define MC_JPG_PTSA_RATE 0x584 -#define MC_DIS_PTSA_MIN 0x420 -#define MC_AVP_PTSA_MAX 0x4fc -#define MC_AVP_PTSA_RATE 0x4f4 -#define MC_RING1_PTSA_MIN 0x480 -#define MC_DIS_PTSA_MAX 0x424 -#define MC_SD_PTSA_MAX 0x4d8 -#define MC_MSE_PTSA_RATE 0x4c4 -#define MC_VICPC_PTSA_MIN 0x558 -#define MC_PCX_PTSA_MAX 0x4b4 -#define MC_ISP_PTSA_RATE 0x4a0 -#define MC_A9AVPPC_PTSA_MIN 0x48c -#define MC_RING2_PTSA_MAX 0x448 -#define MC_AUD_PTSA_RATE 0x548 -#define MC_HOST_PTSA_MIN 0x51c -#define MC_MLL_MPCORER_PTSA_MAX 0x454 -#define MC_SD_PTSA_MIN 0x4d4 -#define MC_RING1_PTSA_RATE 0x47c -#define MC_JPG_PTSA_MIN 0x588 -#define MC_HDAPC_PTSA_MIN 0x62c -#define MC_AVP_PTSA_MIN 0x4f8 -#define MC_JPG_PTSA_MAX 0x58c -#define MC_VE_PTSA_MAX 0x43c -#define MC_DFD_PTSA_MAX 0x63c -#define MC_VICPC_PTSA_RATE 0x554 -#define MC_GK_PTSA_MAX 0x544 -#define MC_VICPC_PTSA_MAX 0x55c -#define MC_SDM_PTSA_MAX 0x624 -#define MC_SAX_PTSA_RATE 0x4b8 -#define MC_PCX_PTSA_MIN 0x4b0 -#define MC_APB_PTSA_MIN 0x4ec -#define MC_GK2_PTSA_MIN 0x614 -#define MC_PCX_PTSA_RATE 0x4ac -#define MC_RING1_PTSA_MAX 0x484 -#define MC_HDAPC_PTSA_RATE 0x628 -#define MC_MLL_MPCORER_PTSA_MIN 0x450 -#define MC_GK2_PTSA_MAX 0x618 -#define MC_AUD_PTSA_MAX 0x550 -#define MC_GK2_PTSA_RATE 0x610 -#define MC_ISP_PTSA_MAX 0x4a8 -#define MC_DISB_PTSA_RATE 0x428 -#define MC_VE2_PTSA_MAX 0x49c -#define MC_DFD_PTSA_MIN 0x638 -#define MC_FTOP_PTSA_RATE 0x50c -#define MC_A9AVPPC_PTSA_RATE 0x488 -#define MC_VE2_PTSA_MIN 0x498 -#define MC_USBX_PTSA_MAX 0x52c -#define MC_DIS_PTSA_RATE 0x41c -#define MC_USBD_PTSA_MAX 0x538 -#define MC_A9AVPPC_PTSA_MAX 0x490 -#define MC_USBX_PTSA_RATE 0x524 -#define MC_FTOP_PTSA_MAX 0x514 -#define MC_HDAPC_PTSA_MAX 0x630 -#define MC_SD_PTSA_RATE 0x4d0 -#define MC_DFD_PTSA_RATE 0x634 -#define MC_FTOP_PTSA_MIN 0x510 -#define MC_SDM_PTSA_RATE 0x61c -#define MC_AHB_PTSA_RATE 0x4dc -#define MC_SMMU_SMMU_PTSA_MAX 0x460 -#define MC_RING2_PTSA_MIN 0x444 -#define MC_SDM_PTSA_MIN 0x620 -#define MC_APB_PTSA_RATE 0x4e8 -#define MC_MSE_PTSA_MIN 0x4c8 -#define MC_HOST_PTSA_RATE 0x518 -#define MC_VE_PTSA_RATE 0x434 -#define MC_AHB_PTSA_MAX 0x4e4 -#define MC_SAX_PTSA_MIN 0x4bc -#define MC_SMMU_SMMU_PTSA_MIN 0x45c -#define MC_ISP_PTSA_MIN 0x4a4 -#define MC_HOST_PTSA_MAX 0x520 -#define MC_SAX_PTSA_MAX 0x4c0 -#define MC_VE_PTSA_MIN 0x438 -#define MC_GK_PTSA_MIN 0x540 -#define MC_MSE_PTSA_MAX 0x4cc -#define MC_DISB_PTSA_MAX 0x430 -#define MC_DISB_PTSA_MIN 0x42c -#define MC_SMMU_SMMU_PTSA_RATE 0x458 -#define MC_VE2_PTSA_RATE 0x494 -#define MC_GK_PTSA_RATE 0x53c -#define MC_PTSA_GRANT_DECREMENT 0x960 -#define MC_LATENCY_ALLOWANCE_AVPC_0 0x2e4 -#define MC_LATENCY_ALLOWANCE_AXIAP_0 0x3a0 -#define MC_LATENCY_ALLOWANCE_XUSB_1 0x380 -#define MC_LATENCY_ALLOWANCE_ISP2B_0 0x384 -#define MC_LATENCY_ALLOWANCE_SDMMCAA_0 0x3bc -#define MC_LATENCY_ALLOWANCE_SDMMCA_0 0x3b8 -#define MC_LATENCY_ALLOWANCE_ISP2_0 0x370 -#define MC_LATENCY_ALLOWANCE_SE_0 0x3e0 -#define MC_LATENCY_ALLOWANCE_ISP2_1 0x374 -#define MC_LATENCY_ALLOWANCE_DC_0 0x2e8 -#define MC_LATENCY_ALLOWANCE_VIC_0 0x394 -#define MC_LATENCY_ALLOWANCE_DCB_1 0x2f8 -#define MC_LATENCY_ALLOWANCE_NVDEC_0 0x3d8 -#define MC_LATENCY_ALLOWANCE_DCB_2 0x2fc -#define MC_LATENCY_ALLOWANCE_TSEC_0 0x390 -#define MC_LATENCY_ALLOWANCE_DC_2 0x2f0 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB 0x694 -#define MC_LATENCY_ALLOWANCE_PPCS_1 0x348 -#define MC_LATENCY_ALLOWANCE_XUSB_0 0x37c -#define MC_LATENCY_ALLOWANCE_PPCS_0 0x344 -#define MC_LATENCY_ALLOWANCE_TSECB_0 0x3f0 -#define MC_LATENCY_ALLOWANCE_AFI_0 0x2e0 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B 0x698 -#define MC_LATENCY_ALLOWANCE_DC_1 0x2ec -#define MC_LATENCY_ALLOWANCE_APE_0 0x3dc -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C 0x6a0 -#define MC_LATENCY_ALLOWANCE_A9AVP_0 0x3a4 -#define MC_LATENCY_ALLOWANCE_GPU2_0 0x3e8 -#define MC_LATENCY_ALLOWANCE_DCB_0 0x2f4 -#define MC_LATENCY_ALLOWANCE_HC_1 0x314 -#define MC_LATENCY_ALLOWANCE_SDMMC_0 0x3c0 -#define MC_LATENCY_ALLOWANCE_NVJPG_0 0x3e4 -#define MC_LATENCY_ALLOWANCE_PTC_0 0x34c -#define MC_LATENCY_ALLOWANCE_ETR_0 0x3ec -#define MC_LATENCY_ALLOWANCE_MPCORE_0 0x320 -#define MC_LATENCY_ALLOWANCE_VI2_0 0x398 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB 0x69c -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB 0x6a4 -#define MC_LATENCY_ALLOWANCE_SATA_0 0x350 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A 0x690 -#define MC_LATENCY_ALLOWANCE_HC_0 0x310 -#define MC_LATENCY_ALLOWANCE_DC_3 0x3c8 -#define MC_LATENCY_ALLOWANCE_GPU_0 0x3ac -#define MC_LATENCY_ALLOWANCE_SDMMCAB_0 0x3c4 -#define MC_LATENCY_ALLOWANCE_ISP2B_1 0x388 -#define MC_LATENCY_ALLOWANCE_NVENC_0 0x328 -#define MC_LATENCY_ALLOWANCE_HDA_0 0x318 -#define MC_MIN_LENGTH_APE_0 0xb34 -#define MC_MIN_LENGTH_DCB_2 0x8a8 -#define MC_MIN_LENGTH_A9AVP_0 0x950 -#define MC_MIN_LENGTH_TSEC_0 0x93c -#define MC_MIN_LENGTH_DC_1 0x898 -#define MC_MIN_LENGTH_AXIAP_0 0x94c -#define MC_MIN_LENGTH_ISP2B_0 0x930 -#define MC_MIN_LENGTH_VI2_0 0x944 -#define MC_MIN_LENGTH_DCB_0 0x8a0 -#define MC_MIN_LENGTH_DCB_1 0x8a4 -#define MC_MIN_LENGTH_PPCS_1 0x8f4 -#define MC_MIN_LENGTH_NVJPG_0 0xb3c -#define MC_MIN_LENGTH_HDA_0 0x8c4 -#define MC_MIN_LENGTH_NVENC_0 0x8d4 -#define MC_MIN_LENGTH_SDMMC_0 0xb18 -#define MC_MIN_LENGTH_ISP2B_1 0x934 -#define MC_MIN_LENGTH_HC_1 0x8c0 -#define MC_MIN_LENGTH_DC_3 0xb20 -#define MC_MIN_LENGTH_AVPC_0 0x890 -#define MC_MIN_LENGTH_VIC_0 0x940 -#define MC_MIN_LENGTH_ISP2_0 0x91c -#define MC_MIN_LENGTH_HC_0 0x8bc -#define MC_MIN_LENGTH_SE_0 0xb38 -#define MC_MIN_LENGTH_NVDEC_0 0xb30 -#define MC_MIN_LENGTH_SATA_0 0x8fc -#define MC_MIN_LENGTH_DC_0 0x894 -#define MC_MIN_LENGTH_XUSB_1 0x92c -#define MC_MIN_LENGTH_DC_2 0x89c -#define MC_MIN_LENGTH_SDMMCAA_0 0xb14 -#define MC_MIN_LENGTH_GPU_0 0xb04 -#define MC_MIN_LENGTH_ETR_0 0xb44 -#define MC_MIN_LENGTH_AFI_0 0x88c -#define MC_MIN_LENGTH_PPCS_0 0x8f0 -#define MC_MIN_LENGTH_ISP2_1 0x920 -#define MC_MIN_LENGTH_XUSB_0 0x928 -#define MC_MIN_LENGTH_MPCORE_0 0x8cc -#define MC_MIN_LENGTH_TSECB_0 0xb48 -#define MC_MIN_LENGTH_SDMMCA_0 0xb10 -#define MC_MIN_LENGTH_GPU2_0 0xb40 -#define MC_MIN_LENGTH_SDMMCAB_0 0xb1c -#define MC_MIN_LENGTH_PTC_0 0x8f8 -#define MC_EMEM_ARB_OVERRIDE_1 0x968 -#define MC_VIDEO_PROTECT_GPU_OVERRIDE_0 0x984 -#define MC_VIDEO_PROTECT_GPU_OVERRIDE_1 0x988 -#define MC_EMEM_ARB_STATS_0 0x990 -#define MC_EMEM_ARB_STATS_1 0x994 -#define MC_MTS_CARVEOUT_BOM 0x9a0 -#define MC_MTS_CARVEOUT_SIZE_MB 0x9a4 -#define MC_MTS_CARVEOUT_ADR_HI 0x9a8 -#define MC_MTS_CARVEOUT_REG_CTRL 0x9ac -#define MC_ERR_MTS_STATUS 0x9b0 -#define MC_ERR_MTS_ADR 0x9b4 -#define MC_ERR_GENERALIZED_CARVEOUT_STATUS 0xc00 -#define MC_ERR_GENERALIZED_CARVEOUT_ADR 0xc04 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 0xd74 -#define MC_SECURITY_CARVEOUT4_CFG0 0xcf8 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 0xd10 -#define MC_SECURITY_CARVEOUT4_SIZE_128KB 0xd04 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 0xc28 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 0xc30 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 0xc8c -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 0xd1c -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 0xd70 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 0xc2c -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 0xd7c -#define MC_SECURITY_CARVEOUT3_SIZE_128KB 0xcb4 -#define MC_SECURITY_CARVEOUT2_CFG0 0xc58 -#define MC_SECURITY_CARVEOUT1_CFG0 0xc08 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 0xc84 -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 0xc68 -#define MC_SECURITY_CARVEOUT3_BOM 0xcac -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 0xc70 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 0xd78 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 0xc7c -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 0xd18 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 0xcbc -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 0xc38 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 0xc34 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 0xcc0 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 0xd60 -#define MC_SECURITY_CARVEOUT3_CFG0 0xca8 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 0xcb8 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 0xc88 -#define MC_SECURITY_CARVEOUT2_SIZE_128KB 0xc64 -#define MC_SECURITY_CARVEOUT5_BOM_HI 0xd50 -#define MC_SECURITY_CARVEOUT1_SIZE_128KB 0xc14 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 0xd14 -#define MC_SECURITY_CARVEOUT1_BOM 0xc0c -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 0xd2c -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 0xd68 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 0xcc8 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 0xd58 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 0xd24 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 0xcc4 -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 0xc78 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 0xc1c -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 0xc18 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 0xd28 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 0xd5c -#define MC_SECURITY_CARVEOUT3_BOM_HI 0xcb0 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 0xcd8 -#define MC_SECURITY_CARVEOUT2_BOM_HI 0xc60 -#define MC_SECURITY_CARVEOUT4_BOM_HI 0xd00 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 0xd64 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 0xcdc -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 0xc80 -#define MC_SECURITY_CARVEOUT5_SIZE_128KB 0xd54 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 0xd20 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 0xcd4 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 0xd0c -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 0xc74 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 0xccc -#define MC_SECURITY_CARVEOUT4_BOM 0xcfc -#define MC_SECURITY_CARVEOUT5_CFG0 0xd48 -#define MC_SECURITY_CARVEOUT2_BOM 0xc5c -#define MC_SECURITY_CARVEOUT5_BOM 0xd4c -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 0xc24 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 0xd6c -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 0xcd0 -#define MC_SECURITY_CARVEOUT1_BOM_HI 0xc10 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 0xc20 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 0xc3c -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 0xc6c -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 0xd08 -#define MC_ERR_APB_ASID_UPDATE_STATUS 0x9d0 -#define MC_DA_CONFIG0 0x9dc -#define MC_UNTRANSLATED_REGION_CHECK 0x948 - -/* Memory Controller clients */ -#define CLIENT_ACCESS_NUM_CLIENTS 32 -typedef enum { - /* _ACCESS0 */ - CSR_PTCR = (0 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0A = (1 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0AB = (2 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0B = (3 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0BB = (4 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0C = (5 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0CB = (6 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_AFIR = (14 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_AVPCARM7R = (15 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAYHC = (16 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAYHCB = (17 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HDAR = (21 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HOST1XDMAR = (22 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HOST1XR = (23 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_NVENCSRD = (28 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_PPCSAHBDMAR = (29 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_PPCSAHBSLVR = (30 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_SATAR = (31 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - - /* _ACCESS1 */ - CSR_VDEBSEVR = (34 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDEMBER = (35 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDEMCER = (36 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDETPER = (37 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_MPCORELPR = (38 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_MPCORER = (39 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_NVENCSWR = (43 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_AFIW = (49 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_AVPCARM7W = (50 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_HDAW = (53 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_HOST1XW = (54 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_MPCORELPW = (56 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_MPCOREW = (57 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_PPCSAHBDMAW = (59 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_PPCSAHBSLVW = (60 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_SATAW = (61 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_VDEBSEVW = (62 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_VDEDBGW = (63 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - - /* _ACCESS2 */ - CSW_VDEMBEW = (64 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_VDETPMW = (65 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_ISPRA = (68 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWA = (70 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWB = (71 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_XUSB_HOSTR = (74 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_XUSB_HOSTW = (75 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_XUSB_DEVR = (76 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_XUSB_DEVW = (77 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_ISPRAB = (78 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWAB = (80 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWBB = (81 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_TSECSRD = (84 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_TSECSWR = (85 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_A9AVPSCR = (86 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_A9AVPSCW = (87 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_GPUSRD = (88 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_GPUSWR = (89 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_DISPLAYT = (90 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - - /* _ACCESS3 */ - CSR_SDMMCRA = (96 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCRAA = (97 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCR = (98 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCRAB = (99 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWA = (100 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWAA = (101 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCW = (102 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWAB = (103 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_VICSRD = (108 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_VICSWR = (109 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_VIW = (114 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_DISPLAYD = (115 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_NVDECSRD = (120 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_NVDECSWR = (121 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_APER = (122 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_APEW = (123 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_NVJPGSRD = (126 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_NVJPGSWR = (127 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - - /* _ACCESS4 */ - CSR_SESRD = (128 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_SESWR = (129 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_AXIAPR = (130 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_AXIAPW = (131 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_ETRR = (132 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_ETRW = (133 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_TSECSRDB = (134 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_TSECSWRB = (135 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_GPUSRD2 = (136 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_GPUSWR2 = (137 - (CLIENT_ACCESS_NUM_CLIENTS * 4)) -} McClient; - -void mc_config_tsec_carveout(uint32_t bom, uint32_t size1mb, bool lock); -void mc_config_carveout(); -void mc_config_carveout_finalize(); -void mc_enable_ahb_redirect(); -void mc_disable_ahb_redirect(); -void mc_enable(); - -#endif \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/panic.c b/fusee/fusee-primary/fusee-primary-main/src/panic.c deleted file mode 100644 index a25ee8521..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/panic.c +++ /dev/null @@ -1,249 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include "panic.h" -#include "di.h" -#include "pmc.h" -#include "fuse.h" -#include "utils.h" -#include "fs_utils.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/display/video_fb.h" - -#define PROGRAM_ID_AMS_MITM 0x010041544D530000ull -#define PROGRAM_ID_BOOT 0x0100000000000005ull - -static uint32_t g_panic_code = 0; - -static const char *get_error_desc_str(uint32_t error_desc) { - switch (error_desc) { - case 0x100: - return "Instruction Abort"; - case 0x101: - return "Data Abort"; - case 0x102: - return "PC Misalignment"; - case 0x103: - return "SP Misalignment"; - case 0x104: - return "Trap"; - case 0x106: - return "SError"; - case 0x301: - return "Bad SVC"; - case 0xF00: - return "Kernel Panic"; - case 0xFFD: - return "Stack overflow"; - case 0xFFE: - return "std::abort() called"; - default: - return "Unknown"; - } -} - -static void _try_suggest_fix(const atmosphere_fatal_error_ctx *ctx) { - /* Try to recognize certain errors automatically, and suggest fixes for them. */ - const char *suggestion = NULL; - - if (ctx->error_desc == 0xFFE) { - if (ctx->program_id == PROGRAM_ID_AMS_MITM) { - /* When a user has archive bits set improperly, attempting to create an automatic backup will fail */ - /* to create the file path with error 0x202 (fs::ResultPathNotFound()) */ - if (ctx->gprs[0] == 0x202) { - /* When the archive bit error is occurring, it manifests as failure to create automatic backup. */ - /* Thus, we can search the stack for the automatic backups path. */ - const char * const automatic_backups_prefix = "automatic_backups/X" /* ..... */; - const int prefix_len = strlen(automatic_backups_prefix); - - for (size_t i = 0; i + prefix_len < ctx->stack_dump_size; ++i) { - if (memcmp(&ctx->stack_dump[i], automatic_backups_prefix, prefix_len) == 0) { - suggestion = "The atmosphere directory may improperly have archive\n" - "bits set. Please try running an archive bit fixer tool\n" - "(for example, the one in Hekate).\n"; - break; - } - } - } else if (ctx->gprs[0] == 0x249A02) { /* fs::ResultResultExFatUnavailable() */ - /* When a user installs non-exFAT firm but has an exFAT formatted SD card, this error will */ - /* be returned on attempt to access the SD card. */ - suggestion = "Your console has non-exFAT firmware installed, but your SD card\n" - "is formatted as exFAT. Format your SD card as FAT32, or manually\n" - "flash exFAT firmware to package2.\n"; - } - } else if (ctx->program_id == PROGRAM_ID_BOOT) { - /* 9.x -> 10.x updated the API for SvcQueryIoMapping. */ - /* This can cause the kernel to reject incorrect-ABI calls by boot when a partial update is applied */ - /* (older kernel in package2, for some reason). */ - for (size_t i = 0; i < 8; ++i) { - if (ctx->gprs[i] == 0xF201) { - suggestion = "A partial update may have been improperly performed.\n" - "To fix, try manually flashing latest package2 to MMC.\n" - "\n" - "For help doing this, seek support in the ReSwitched or\n" - "Nintendo Homebrew discord servers.\n"; - break; - } - } - } - } else if (ctx->error_desc == 0xF00) { /* Kernel Panic */ - suggestion = "Please contact SciresM#0524 on Discord, or create an issue\n" - "on the Atmosphere GitHub issue tracker. Thank you very much\n" - "for helping to test mesosphere.\n"; - } - - if (suggestion != NULL) { - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "\n%s", suggestion); - } -} - -static void _check_and_display_atmosphere_fatal_error(void) { - /* Check for valid magic. */ - if (ATMOSPHERE_FATAL_ERROR_CONTEXT->magic != ATMOSPHERE_REBOOT_TO_FATAL_MAGIC && - ATMOSPHERE_FATAL_ERROR_CONTEXT->magic != ATMOSPHERE_REBOOT_TO_FATAL_MAGIC_1 && - ATMOSPHERE_FATAL_ERROR_CONTEXT->magic != ATMOSPHERE_REBOOT_TO_FATAL_MAGIC_0) - { - return; - } - - { - /* Zero-fill the framebuffer and register it as printk provider. */ - video_init((void *)0xC0000000); - - /* Initialize the display. */ - display_init(); - - /* Set the framebuffer. */ - display_init_framebuffer((void *)0xC0000000); - - /* Turn on the backlight after initializing the lfb */ - /* to avoid flickering. */ - display_backlight(true); - - /* Override the global logging level. */ - log_set_log_level(SCREEN_LOG_LEVEL_ERROR); - - /* Copy fatal error context to the stack. */ - atmosphere_fatal_error_ctx ctx = *(ATMOSPHERE_FATAL_ERROR_CONTEXT); - - /* Change magic to invalid, to prevent double-display of error/bootlooping. */ - ATMOSPHERE_FATAL_ERROR_CONTEXT->magic = 0xCCCCCCCC; - - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "A fatal error occurred when running Atmosph\xe8re.\n"); - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "Program ID: %016llx\n", ctx.program_id); - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "Error Desc: %s (0x%x)\n", get_error_desc_str(ctx.error_desc), ctx.error_desc); - - /* Save context to the SD card. */ - { - char filepath[0x40]; - snprintf(filepath, sizeof(filepath) - 1, "/atmosphere/fatal_errors/report_%016llx.bin", ctx.report_identifier); - filepath[sizeof(filepath)-1] = 0; - if (write_to_file(&ctx, sizeof(ctx), filepath) != sizeof(ctx)) { - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "Failed to save report to the SD card!\n"); - } else { - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "Report saved to %s\n", filepath); - } - } - - /* Try to print a fix suggestion via automatic error detection. */ - _try_suggest_fix(&ctx); - - /* Display error. */ - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "\nPress POWER to reboot\n"); - } - - /* Wait for button and reboot. */ - wait_for_button_and_reboot(); -} - -void check_and_display_panic(void) { - /* Handle a panic sent via a stratosphere module. */ - _check_and_display_atmosphere_fatal_error(); - - /* We also handle our own panics. */ - bool has_panic = ((APBDEV_PMC_RST_STATUS_0 != 0) || (g_panic_code != 0)); - uint32_t code = (g_panic_code == 0) ? APBDEV_PMC_SCRATCH200_0 : g_panic_code; - has_panic = has_panic && !((APBDEV_PMC_RST_STATUS_0 != 1) && (code == PANIC_CODE_SAFEMODE)); - - if (has_panic) { - uint32_t color; - - /* Check for predefined codes: */ - switch (code & MASK(20)) { - case 0x01: /* Package2 signature verification failed. */ - case 0x02: /* Package2 meta verification failed. */ - case 0x03: /* Package2 version check failed. */ - case 0x04: /* Package2 payload verification failed. */ - color = PANIC_COLOR_KERNEL; - break; - case 0x05: /* Unknown SMC. */ - case 0x06: /* Unknown Abort. */ - color = PANIC_COLOR_SECMON_GENERIC; - break; - case 0x07: /* Invalid CPU context. */ - case 0x08: /* Invalid SE state. */ - case 0x09: /* CPU is already awake (2.0.0+). */ - color = PANIC_COLOR_SECMON_DEEPSLEEP; - break; - case 0x10: /* Unknown exception. */ - color = PANIC_COLOR_SECMON_EXCEPTION; - break; - case 0x30: /* General bootloader error. */ - case 0x31: /* Invalid DRAM ID. */ - case 0x32: /* Invalid size. */ - case 0x33: /* Invalid arguement. */ - case 0x34: /* Bad GPT. */ - case 0x35: /* Failed to boot SafeMode. */ - case 0x36: /* Activity monitor fired (4.0.0+). */ - color = PANIC_COLOR_BOOTLOADER_GENERIC; - break; - case 0x40: /* Kernel panic. */ - color = PANIC_COLOR_KERNEL; - break; - default: - color = code >> 20; - color |= color << 4; - break; - } - - /* Initialize the display. */ - display_init(); - - /* Fill the screen. */ - display_color_screen(color); - - /* Wait for button and reboot. */ - wait_for_button_and_reboot(); - } else { - g_panic_code = 0; - APBDEV_PMC_SCRATCH200_0 = 0; - } -} - -__attribute__ ((noreturn)) void panic(uint32_t code) { - /* Set panic code. */ - if (g_panic_code == 0) { - g_panic_code = code; - APBDEV_PMC_SCRATCH200_0 = code; - } - - fuse_disable_programming(); - APBDEV_PMC_CRYPTO_OP_0 = 1; /* Disable all SE operations. */ - - check_and_display_panic(); - while(true); -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/panic.h b/fusee/fusee-primary/fusee-primary-main/src/panic.h deleted file mode 100644 index a7db236d4..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/panic.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PANIC_H -#define FUSEE_PANIC_H - -#include - -#define PANIC_COLOR_KERNEL 0x0000FF -#define PANIC_COLOR_SECMON_EXCEPTION 0xFF7700 -#define PANIC_COLOR_SECMON_GENERIC 0x00FFFF -#define PANIC_COLOR_SECMON_DEEPSLEEP 0xFF77FF /* 4.0+ color */ -#define PANIC_COLOR_BOOTLOADER_GENERIC 0xAA00FF -#define PANIC_COLOR_BOOTLOADER_SAFEMODE 0xFFFFAA /* Removed */ - -#define PANIC_CODE_SAFEMODE 0x00000020 - -#define AMS_FATAL_ERROR_MAX_STACKTRACE 0x20 -#define AMS_FATAL_ERROR_MAX_STACKDUMP 0x100 -#define AMS_FATAL_ERROR_TLS_SIZE 0x100 - -/* Atmosphere reboot-to-fatal-error. */ -typedef struct { - uint32_t magic; - uint32_t error_desc; - uint64_t program_id; - union { - uint64_t gprs[32]; - struct { - uint64_t _gprs[29]; - uint64_t fp; - uint64_t lr; - uint64_t sp; - }; - }; - uint64_t pc; - uint64_t module_base; - uint32_t pstate; - uint32_t afsr0; - uint32_t afsr1; - uint32_t esr; - uint64_t far; - uint64_t report_identifier; /* Normally just system tick. */ - uint64_t stack_trace_size; - uint64_t stack_dump_size; - uint64_t stack_trace[AMS_FATAL_ERROR_MAX_STACKTRACE]; - uint8_t stack_dump[AMS_FATAL_ERROR_MAX_STACKDUMP]; - uint8_t tls[AMS_FATAL_ERROR_TLS_SIZE]; -} atmosphere_fatal_error_ctx; - -/* "AFE2" */ -#define ATMOSPHERE_REBOOT_TO_FATAL_MAGIC 0x32454641 -/* "AFE1" */ -#define ATMOSPHERE_REBOOT_TO_FATAL_MAGIC_1 0x31454641 -/* "AFE0" */ -#define ATMOSPHERE_REBOOT_TO_FATAL_MAGIC_0 0x30454641 - -#define ATMOSPHERE_FATAL_ERROR_CONTEXT ((volatile atmosphere_fatal_error_ctx *)(0x4003E000)) - -void check_and_display_panic(void); -__attribute__ ((noreturn)) void panic(uint32_t code); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/panic_color.h b/fusee/fusee-primary/fusee-primary-main/src/panic_color.h deleted file mode 100644 index 8d90c7ffa..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/panic_color.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PANIC_COLOR_H -#define FUSEE_PANIC_COLOR_H - -#define COLOR_0 0x00F00003 -#define COLOR_1 0x0F000003 -#define COLOR_2 0xF0000003 -#define COLOR_3 0x0FF00003 -#define COLOR_4 0xF0F00003 -#define COLOR_5 0xFF000003 -#define COLOR_6 0xFFF00003 -#define COLOR_7 0xAAF00003 -#define COLOR_8 0xAFA00003 -#define COLOR_9 0xFAA00003 -#define COLOR_A 0x33300003 -#define COLOR_B 0x06F00003 -#define COLOR_C 0x14800003 -#define COLOR_D 0x00300003 -#define COLOR_E 0x03000003 -#define COLOR_F 0xB6000003 - -#define PANIC_REBOOT 0x20 - -#endif \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/pinmux.h b/fusee/fusee-primary/fusee-primary-main/src/pinmux.h deleted file mode 100644 index 616e90262..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/pinmux.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PINMUX_H -#define FUSEE_PINMUX_H - -#define PINMUX_BASE 0x70003000 -#define MAKE_PINMUX_REG(n) MAKE_REG32(PINMUX_BASE + n) - -#define PINMUX_TRISTATE (1 << 4) -#define PINMUX_PARKED (1 << 5) -#define PINMUX_INPUT (1 << 6) -#define PINMUX_PULL_NONE (0 << 2) -#define PINMUX_PULL_DOWN (1 << 2) -#define PINMUX_PULL_UP (2 << 2) -#define PINMUX_SELECT_FUNCTION0 0 -#define PINMUX_SELECT_FUNCTION1 1 -#define PINMUX_SELECT_FUNCTION2 2 -#define PINMUX_SELECT_FUNCTION3 3 -#define PINMUX_DRIVE_1X (0 << 13) -#define PINMUX_DRIVE_2X (1 << 13) -#define PINMUX_DRIVE_3X (2 << 13) -#define PINMUX_DRIVE_4X (3 << 13) - -typedef struct { - uint32_t sdmmc1_clk; - uint32_t sdmmc1_cmd; - uint32_t sdmmc1_dat3; - uint32_t sdmmc1_dat2; - uint32_t sdmmc1_dat1; - uint32_t sdmmc1_dat0; - uint32_t _r18; - uint32_t sdmmc3_clk; - uint32_t sdmmc3_cmd; - uint32_t sdmmc3_dat0; - uint32_t sdmmc3_dat1; - uint32_t sdmmc3_dat2; - uint32_t sdmmc3_dat3; - uint32_t _r34; - uint32_t pex_l0_rst_n; - uint32_t pex_l0_clkreq_n; - uint32_t pex_wake_n; - uint32_t pex_l1_rst_n; - uint32_t pex_l1_clkreq_n; - uint32_t sata_led_active; - uint32_t spi1_mosi; - uint32_t spi1_miso; - uint32_t spi1_sck; - uint32_t spi1_cs0; - uint32_t spi1_cs1; - uint32_t spi2_mosi; - uint32_t spi2_miso; - uint32_t spi2_sck; - uint32_t spi2_cs0; - uint32_t spi2_cs1; - uint32_t spi4_mosi; - uint32_t spi4_miso; - uint32_t spi4_sck; - uint32_t spi4_cs0; - uint32_t qspi_sck; - uint32_t qspi_cs_n; - uint32_t qspi_io0; - uint32_t qspi_io1; - uint32_t qspi_io2; - uint32_t qspi_io3; - uint32_t _ra0; - uint32_t dmic1_clk; - uint32_t dmic1_dat; - uint32_t dmic2_clk; - uint32_t dmic2_dat; - uint32_t dmic3_clk; - uint32_t dmic3_dat; - uint32_t gen1_i2c_scl; - uint32_t gen1_i2c_sda; - uint32_t gen2_i2c_scl; - uint32_t gen2_i2c_sda; - uint32_t gen3_i2c_scl; - uint32_t gen3_i2c_sda; - uint32_t cam_i2c_scl; - uint32_t cam_i2c_sda; - uint32_t pwr_i2c_scl; - uint32_t pwr_i2c_sda; - uint32_t uart1_tx; - uint32_t uart1_rx; - uint32_t uart1_rts; - uint32_t uart1_cts; - uint32_t uart2_tx; - uint32_t uart2_rx; - uint32_t uart2_rts; - uint32_t uart2_cts; - uint32_t uart3_tx; - uint32_t uart3_rx; - uint32_t uart3_rts; - uint32_t uart3_cts; - uint32_t uart4_tx; - uint32_t uart4_rx; - uint32_t uart4_rts; - uint32_t uart4_cts; - uint32_t dap1_fs; - uint32_t dap1_din; - uint32_t dap1_dout; - uint32_t dap1_sclk; - uint32_t dap2_fs; - uint32_t dap2_din; - uint32_t dap2_dout; - uint32_t dap2_sclk; - uint32_t dap4_fs; - uint32_t dap4_din; - uint32_t dap4_dout; - uint32_t dap4_sclk; - uint32_t cam1_mclk; - uint32_t cam2_mclk; - uint32_t jtag_rtck; - uint32_t clk_32k_in; - uint32_t clk_32k_out; - uint32_t batt_bcl; - uint32_t clk_req; - uint32_t cpu_pwr_req; - uint32_t pwr_int_n; - uint32_t shutdown; - uint32_t core_pwr_req; - uint32_t aud_mclk; - uint32_t dvfs_pwm; - uint32_t dvfs_clk; - uint32_t gpio_x1_aud; - uint32_t gpio_x3_aud; - uint32_t pcc7; - uint32_t hdmi_cec; - uint32_t hdmi_int_dp_hpd; - uint32_t spdif_out; - uint32_t spdif_in; - uint32_t usb_vbus_en0; - uint32_t usb_vbus_en1; - uint32_t dp_hpd0; - uint32_t wifi_en; - uint32_t wifi_rst; - uint32_t wifi_wake_ap; - uint32_t ap_wake_bt; - uint32_t bt_rst; - uint32_t bt_wake_ap; - uint32_t ap_wake_nfc; - uint32_t nfc_en; - uint32_t nfc_int; - uint32_t gps_en; - uint32_t gps_rst; - uint32_t cam_rst; - uint32_t cam_af_en; - uint32_t cam_flash_en; - uint32_t cam1_pwdn; - uint32_t cam2_pwdn; - uint32_t cam1_strobe; - uint32_t lcd_te; - uint32_t lcd_bl_pwm; - uint32_t lcd_bl_en; - uint32_t lcd_rst; - uint32_t lcd_gpio1; - uint32_t lcd_gpio2; - uint32_t ap_ready; - uint32_t touch_rst; - uint32_t touch_clk; - uint32_t modem_wake_ap; - uint32_t touch_int; - uint32_t motion_int; - uint32_t als_prox_int; - uint32_t temp_alert; - uint32_t button_power_on; - uint32_t button_vol_up; - uint32_t button_vol_down; - uint32_t button_slide_sw; - uint32_t button_home; - uint32_t pa6; - uint32_t pe6; - uint32_t pe7; - uint32_t ph6; - uint32_t pk0; - uint32_t pk1; - uint32_t pk2; - uint32_t pk3; - uint32_t pk4; - uint32_t pk5; - uint32_t pk6; - uint32_t pk7; - uint32_t pl0; - uint32_t pl1; - uint32_t pz0; - uint32_t pz1; - uint32_t pz2; - uint32_t pz3; - uint32_t pz4; - uint32_t pz5; -} tegra_pinmux_t; - -static inline volatile tegra_pinmux_t *pinmux_get_regs(void) -{ - return (volatile tegra_pinmux_t *)PINMUX_BASE; -} - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/pmc.h b/fusee/fusee-primary/fusee-primary-main/src/pmc.h deleted file mode 100644 index a287d85e7..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/pmc.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PMC_H -#define FUSEE_PMC_H - -#include - -#define PMC_BASE 0x7000E400 -#define MAKE_PMC_REG(n) MAKE_REG32(PMC_BASE + n) - -#define PMC_CONTROL_SDMMC1 (1 << 12) -#define PMC_CONTROL_SDMMC3 (1 << 13) -#define PMC_CONTROL_SDMMC4 (1 << 14) - -#define APBDEV_PMC_CONTROL MAKE_PMC_REG(0x00) -#define APBDEV_PM_0 MAKE_PMC_REG(0x14) -#define APBDEV_PMC_DPD_ENABLE_0 MAKE_PMC_REG(0x24) -#define APBDEV_PMC_PWRGATE_TOGGLE_0 MAKE_PMC_REG(0x30) -#define APBDEV_PMC_PWRGATE_STATUS_0 MAKE_PMC_REG(0x38) -#define APBDEV_PMC_NO_IOPOWER_0 MAKE_PMC_REG(0x44) -#define APBDEV_PMC_SCRATCH0_0 MAKE_PMC_REG(0x50) -#define APBDEV_PMC_SCRATCH1_0 MAKE_PMC_REG(0x54) -#define APBDEV_PMC_SCRATCH20_0 MAKE_PMC_REG(0xA0) -#define APBDEV_PMC_PWR_DET_VAL_0 MAKE_PMC_REG(0xE4) -#define APBDEV_PMC_DDR_PWR_0 MAKE_PMC_REG(0xE8) -#define APBDEV_PMC_CRYPTO_OP_0 MAKE_PMC_REG(0xF4) -#define APBDEV_PMC_WAKE2_STATUS_0 MAKE_PMC_REG(0x168) -#define APBDEV_PMC_OSC_EDPD_OVER_0 MAKE_PMC_REG(0x1A4) -#define APBDEV_PMC_RST_STATUS_0 MAKE_PMC_REG(0x1B4) -#define APBDEV_PMC_IO_DPD_REQ_0 MAKE_PMC_REG(0x1B8) -#define APBDEV_PMC_IO_DPD2_REQ_0 MAKE_PMC_REG(0x1C0) -#define APBDEV_PMC_VDDP_SEL_0 MAKE_PMC_REG(0x1CC) -#define APBDEV_PMC_SCRATCH49_0 MAKE_PMC_REG(0x244) -#define APBDEV_PMC_TSC_MULT_0 MAKE_PMC_REG(0x2B4) -#define APBDEV_PMC_REG_SHORT_0 MAKE_PMC_REG(0x2CC) -#define APBDEV_PMC_WEAK_BIAS_0 MAKE_PMC_REG(0x2C8) -#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334) -#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360) -#define APBDEV_PMC_SECURE_SCRATCH49_0 MAKE_PMC_REG(0x3A4) -#define APBDEV_PMC_CNTRL2_0 MAKE_PMC_REG(0x440) -#define APBDEV_PMC_IO_DPD4_REQ_0 MAKE_PMC_REG(0x464) -#define APBDEV_PMC_UTMIP_PAD_CFG1_0 MAKE_PMC_REG(0x4C4) -#define APBDEV_PMC_UTMIP_PAD_CFG3_0 MAKE_PMC_REG(0x4CC) -#define APBDEV_PMC_DDR_CNTRL_0 MAKE_PMC_REG(0x4E4) -#define APBDEV_PMC_SCRATCH43_0 MAKE_PMC_REG(0x22C) -#define APBDEV_PMC_SCRATCH188_0 MAKE_PMC_REG(0x810) -#define APBDEV_PMC_SCRATCH190_0 MAKE_PMC_REG(0x818) -#define APBDEV_PMC_SCRATCH200_0 MAKE_PMC_REG(0x840) - -#define APBDEV_PMC_SCRATCH45_0 MAKE_PMC_REG(0x234) -#define APBDEV_PMC_SCRATCH46_0 MAKE_PMC_REG(0x238) -#define APBDEV_PMC_SCRATCH33_0 MAKE_PMC_REG(0x120) -#define APBDEV_PMC_SCRATCH40_0 MAKE_PMC_REG(0x13C) - -/* Power Management Controller (APBDEV_PMC_) regs */ -typedef struct { - uint32_t cntrl; /* _CNTRL_0, 0x00 */ - uint32_t sec_disable; /* _SEC_DISABLE_0, 0x04 */ - uint32_t pmc_swrst; /* _PMC_SWRST_0, 0x08 */ - uint32_t wake_mask; /* _WAKE_MASK_0, 0x0c */ - uint32_t wake_lvl; /* _WAKE_LVL_0, 0x10 */ - uint32_t wake_status; /* _WAKE_STATUS_0, 0x14 */ - uint32_t sw_wake_status; /* _SW_WAKE_STATUS_0, 0x18 */ - uint32_t dpd_pads_oride; /* _DPD_PADS_ORIDE_0, 0x1c */ - uint32_t dpd_sample; /* _DPD_SAMPLE_0, 0x20 */ - uint32_t dpd_enable; /* _DPD_ENABLE_0, 0x24 */ - uint32_t pwrgate_timer_off; /* _PWRGATE_TIMER_OFF_0, 0x28 */ - uint32_t clamp_status; /* _CLAMP_STATUS_0, 0x2c */ - uint32_t pwrgate_toggle; /* _PWRGATE_TOGGLE_0, 0x30 */ - uint32_t remove_clamping; /* _REMOVE_CLAMPING_0, 0x34 */ - uint32_t pwrgate_status; /* _PWRGATE_STATUS_0, 0x38 */ - uint32_t pwrgood_timer; /* _PWRGOOD_TIMER_0, 0x3c */ - uint32_t blink_timer; /* _BLINK_TIMER_0, 0x40 */ - uint32_t no_iopower; /* _NO_IOPOWER_0, 0x44 */ - uint32_t pwr_det; /* _PWR_DET_0, 0x48 */ - uint32_t pwr_det_latch; /* _PWR_DET_LATCH_0, 0x4c */ - uint32_t scratch0; /* _SCRATCH0_0, 0x50 */ - uint32_t scratch1; /* _SCRATCH1_0, 0x54 */ - uint32_t scratch2; /* _SCRATCH2_0, 0x58 */ - uint32_t scratch3; /* _SCRATCH3_0, 0x5c */ - uint32_t scratch4; /* _SCRATCH4_0, 0x60 */ - uint32_t scratch5; /* _SCRATCH5_0, 0x64 */ - uint32_t scratch6; /* _SCRATCH6_0, 0x68 */ - uint32_t scratch7; /* _SCRATCH7_0, 0x6c */ - uint32_t scratch8; /* _SCRATCH8_0, 0x70 */ - uint32_t scratch9; /* _SCRATCH9_0, 0x74 */ - uint32_t scratch10; /* _SCRATCH10_0, 0x78 */ - uint32_t scratch11; /* _SCRATCH11_0, 0x7c */ - uint32_t scratch12; /* _SCRATCH12_0, 0x80 */ - uint32_t scratch13; /* _SCRATCH13_0, 0x84 */ - uint32_t scratch14; /* _SCRATCH14_0, 0x88 */ - uint32_t scratch15; /* _SCRATCH15_0, 0x8c */ - uint32_t scratch16; /* _SCRATCH16_0, 0x90 */ - uint32_t scratch17; /* _SCRATCH17_0, 0x94 */ - uint32_t scratch18; /* _SCRATCH18_0, 0x98 */ - uint32_t scratch19; /* _SCRATCH19_0, 0x9c */ - uint32_t scratch20; /* _SCRATCH20_0, 0xa0 */ - uint32_t scratch21; /* _SCRATCH21_0, 0xa4 */ - uint32_t scratch22; /* _SCRATCH22_0, 0xa8 */ - uint32_t scratch23; /* _SCRATCH23_0, 0xac */ - uint32_t secure_scratch0; /* _SECURE_SCRATCH0_0, 0xb0 */ - uint32_t secure_scratch1; /* _SECURE_SCRATCH1_0, 0xb4 */ - uint32_t secure_scratch2; /* _SECURE_SCRATCH2_0, 0xb8 */ - uint32_t secure_scratch3; /* _SECURE_SCRATCH3_0, 0xbc */ - uint32_t secure_scratch4; /* _SECURE_SCRATCH4_0, 0xc0 */ - uint32_t secure_scratch5; /* _SECURE_SCRATCH5_0, 0xc4 */ - uint32_t cpupwrgood_timer; /* _CPUPWRGOOD_TIMER_0, 0xc8 */ - uint32_t cpupwroff_timer; /* _CPUPWROFF_TIMER_0, 0xcc */ - uint32_t pg_mask; /* _PG_MASK_0, 0xd0 */ - uint32_t pg_mask_1; /* _PG_MASK_1_0, 0xd4 */ - uint32_t auto_wake_lvl; /* _AUTO_WAKE_LVL_0, 0xd8 */ - uint32_t auto_wake_lvl_mask; /* _AUTO_WAKE_LVL_MASK_0, 0xdc */ - uint32_t wake_delay; /* _WAKE_DELAY_0, 0xe0 */ - uint32_t pwr_det_val; /* _PWR_DET_VAL_0, 0xe4 */ - uint32_t ddr_pwr; /* _DDR_PWR_0, 0xe8 */ - uint32_t usb_debounce_del; /* _USB_DEBOUNCE_DEL_0, 0xec */ - uint32_t usb_ao; /* _USB_AO_0, 0xf0 */ - uint32_t crypto_op; /* _CRYPTO_OP_0, 0xf4 */ - uint32_t pllp_wb0_override; /* _PLLP_WB0_OVERRIDE_0, 0xf8 */ - uint32_t scratch24; /* _SCRATCH24_0, 0xfc */ - uint32_t scratch25; /* _SCRATCH25_0, 0x100 */ - uint32_t scratch26; /* _SCRATCH26_0, 0x104 */ - uint32_t scratch27; /* _SCRATCH27_0, 0x108 */ - uint32_t scratch28; /* _SCRATCH28_0, 0x10c */ - uint32_t scratch29; /* _SCRATCH29_0, 0x110 */ - uint32_t scratch30; /* _SCRATCH30_0, 0x114 */ - uint32_t scratch31; /* _SCRATCH31_0, 0x118 */ - uint32_t scratch32; /* _SCRATCH32_0, 0x11c */ - uint32_t scratch33; /* _SCRATCH33_0, 0x120 */ - uint32_t scratch34; /* _SCRATCH34_0, 0x124 */ - uint32_t scratch35; /* _SCRATCH35_0, 0x128 */ - uint32_t scratch36; /* _SCRATCH36_0, 0x12c */ - uint32_t scratch37; /* _SCRATCH37_0, 0x130 */ - uint32_t scratch38; /* _SCRATCH38_0, 0x134 */ - uint32_t scratch39; /* _SCRATCH39_0, 0x138 */ - uint32_t scratch40; /* _SCRATCH40_0, 0x13c */ - uint32_t scratch41; /* _SCRATCH41_0, 0x140 */ - uint32_t scratch42; /* _SCRATCH42_0, 0x144 */ - uint32_t bondout_mirror0; /* _BONDOUT_MIRROR0_0, 0x148 */ - uint32_t bondout_mirror1; /* _BONDOUT_MIRROR1_0, 0x14c */ - uint32_t bondout_mirror2; /* _BONDOUT_MIRROR2_0, 0x150 */ - uint32_t sys_33v_en; /* _SYS_33V_EN_0, 0x154 */ - uint32_t bondout_mirror_access; /* _BONDOUT_MIRROR_ACCESS_0, 0x158 */ - uint32_t gate; /* _GATE_0, 0x15c */ - uint32_t wake2_mask; /* _WAKE2_MASK_0, 0x160 */ - uint32_t wake2_lvl; /* _WAKE2_LVL_0, 0x164 */ - uint32_t wake2_status; /* _WAKE2_STATUS_0, 0x168 */ - uint32_t sw_wake2_status; /* _SW_WAKE2_STATUS_0, 0x16c */ - uint32_t auto_wake2_lvl_mask; /* _AUTO_WAKE2_LVL_MASK_0, 0x170 */ - uint32_t pg_mask_2; /* _PG_MASK_2_0, 0x174 */ - uint32_t pg_mask_ce1; /* _PG_MASK_CE1_0, 0x178 */ - uint32_t pg_mask_ce2; /* _PG_MASK_CE2_0, 0x17c */ - uint32_t pg_mask_ce3; /* _PG_MASK_CE3_0, 0x180 */ - uint32_t pwrgate_timer_ce_0; /* _PWRGATE_TIMER_CE_0_0, 0x184 */ - uint32_t pwrgate_timer_ce_1; /* _PWRGATE_TIMER_CE_1_0, 0x188 */ - uint32_t pwrgate_timer_ce_2; /* _PWRGATE_TIMER_CE_2_0, 0x18c */ - uint32_t pwrgate_timer_ce_3; /* _PWRGATE_TIMER_CE_3_0, 0x190 */ - uint32_t pwrgate_timer_ce_4; /* _PWRGATE_TIMER_CE_4_0, 0x194 */ - uint32_t pwrgate_timer_ce_5; /* _PWRGATE_TIMER_CE_5_0, 0x198 */ - uint32_t pwrgate_timer_ce_6; /* _PWRGATE_TIMER_CE_6_0, 0x19c */ - uint32_t pcx_edpd_cntrl; /* _PCX_EDPD_CNTRL_0, 0x1a0 */ - uint32_t osc_edpd_over; /* _OSC_EDPD_OVER_0, 0x1a4 */ - uint32_t clk_out_cntrl; /* _CLK_OUT_CNTRL_0, 0x1a8 */ - uint32_t sata_pwrgt; /* _SATA_PWRGT_0, 0x1ac */ - uint32_t sensor_ctrl; /* _SENSOR_CTRL_0, 0x1b0 */ - uint32_t rst_status; /* _RST_STATUS_0, 0x1b4 */ - uint32_t io_dpd_req; /* _IO_DPD_REQ_0, 0x1b8 */ - uint32_t io_dpd_status; /* _IO_DPD_STATUS_0, 0x1bc */ - uint32_t io_dpd2_req; /* _IO_DPD2_REQ_0, 0x1c0 */ - uint32_t io_dpd2_status; /* _IO_DPD2_STATUS_0, 0x1c4 */ - uint32_t sel_dpd_tim; /* _SEL_DPD_TIM_0, 0x1c8 */ - uint32_t vddp_sel; /* _VDDP_SEL_0, 0x1cc */ - uint32_t ddr_cfg; /* _DDR_CFG_0, 0x1d0 */ - uint32_t _0x1d4[2]; - uint32_t pllm_wb0_override_freq; /* _PLLM_WB0_OVERRIDE_FREQ_0, 0x1dc */ - uint32_t _0x1e0; - uint32_t pwrgate_timer_mult; /* _PWRGATE_TIMER_MULT_0, 0x1e4 */ - uint32_t dsi_sel_dpd; /* _DSI_SEL_DPD_0, 0x1e8 */ - uint32_t utmip_uhsic_triggers; /* _UTMIP_UHSIC_TRIGGERS_0, 0x1ec */ - uint32_t utmip_uhsic_saved_state; /* _UTMIP_UHSIC_SAVED_STATE_0, 0x1f0 */ - uint32_t _0x1f4; - uint32_t utmip_term_pad_cfg; /* _UTMIP_TERM_PAD_CFG_0, 0x1f8 */ - uint32_t utmip_uhsic_sleep_cfg; /* _UTMIP_UHSIC_SLEEP_CFG_0, 0x1fc */ - uint32_t utmip_uhsic_sleepwalk_cfg; /* _UTMIP_UHSIC_SLEEPWALK_CFG_0, 0x200 */ - uint32_t utmip_sleepwalk_p0; /* _UTMIP_SLEEPWALK_P0_0, 0x204 */ - uint32_t utmip_sleepwalk_p1; /* _UTMIP_SLEEPWALK_P1_0, 0x208 */ - uint32_t utmip_sleepwalk_p2; /* _UTMIP_SLEEPWALK_P2_0, 0x20c */ - uint32_t uhsic_sleepwalk_p0; /* _UHSIC_SLEEPWALK_P0_0, 0x210 */ - uint32_t utmip_uhsic_status; /* _UTMIP_UHSIC_STATUS_0, 0x214 */ - uint32_t utmip_uhsic_fake; /* _UTMIP_UHSIC_FAKE_0, 0x218 */ - uint32_t bondout_mirror3; /* _BONDOUT_MIRROR3_0, 0x21c */ - uint32_t bondout_mirror4; /* _BONDOUT_MIRROR4_0, 0x220 */ - uint32_t secure_scratch6; /* _SECURE_SCRATCH6_0, 0x224 */ - uint32_t secure_scratch7; /* _SECURE_SCRATCH7_0, 0x228 */ - uint32_t scratch43; /* _SCRATCH43_0, 0x22c */ - uint32_t scratch44; /* _SCRATCH44_0, 0x230 */ - uint32_t scratch45; /* _SCRATCH45_0, 0x234 */ - uint32_t scratch46; /* _SCRATCH46_0, 0x238 */ - uint32_t scratch47; /* _SCRATCH47_0, 0x23c */ - uint32_t scratch48; /* _SCRATCH48_0, 0x240 */ - uint32_t scratch49; /* _SCRATCH49_0, 0x244 */ - uint32_t scratch50; /* _SCRATCH50_0, 0x248 */ - uint32_t scratch51; /* _SCRATCH51_0, 0x24c */ - uint32_t scratch52; /* _SCRATCH52_0, 0x250 */ - uint32_t scratch53; /* _SCRATCH53_0, 0x254 */ - uint32_t scratch54; /* _SCRATCH54_0, 0x258 */ - uint32_t scratch55; /* _SCRATCH55_0, 0x25c */ - uint32_t scratch0_eco; /* _SCRATCH0_ECO_0, 0x260 */ - uint32_t por_dpd_ctrl; /* _POR_DPD_CTRL_0, 0x264 */ - uint32_t scratch2_eco; /* _SCRATCH2_ECO_0, 0x268 */ - uint32_t utmip_uhsic_line_wakeup; /* _UTMIP_UHSIC_LINE_WAKEUP_0, 0x26c */ - uint32_t utmip_bias_master_cntrl; /* _UTMIP_BIAS_MASTER_CNTRL_0, 0x270 */ - uint32_t utmip_master_config; /* _UTMIP_MASTER_CONFIG_0, 0x274 */ - uint32_t td_pwrgate_inter_part_timer; /* _TD_PWRGATE_INTER_PART_TIMER_0, 0x278 */ - uint32_t utmip_uhsic2_triggers; /* _UTMIP_UHSIC2_TRIGGERS_0, 0x27c */ - uint32_t utmip_uhsic2_saved_state; /* _UTMIP_UHSIC2_SAVED_STATE_0, 0x280 */ - uint32_t utmip_uhsic2_sleep_cfg; /* _UTMIP_UHSIC2_SLEEP_CFG_0, 0x284 */ - uint32_t utmip_uhsic2_sleepwalk_cfg; /* _UTMIP_UHSIC2_SLEEPWALK_CFG_0, 0x288 */ - uint32_t uhsic2_sleepwalk_p1; /* _UHSIC2_SLEEPWALK_P1_0, 0x28c */ - uint32_t utmip_uhsic2_status; /* _UTMIP_UHSIC2_STATUS_0, 0x290 */ - uint32_t utmip_uhsic2_fake; /* _UTMIP_UHSIC2_FAKE_0, 0x294 */ - uint32_t utmip_uhsic2_line_wakeup; /* _UTMIP_UHSIC2_LINE_WAKEUP_0, 0x298 */ - uint32_t utmip_master2_config; /* _UTMIP_MASTER2_CONFIG_0, 0x29c */ - uint32_t utmip_uhsic_rpd_cfg; /* _UTMIP_UHSIC_RPD_CFG_0, 0x2a0 */ - uint32_t pg_mask_ce0; /* _PG_MASK_CE0_0, 0x2a4 */ - uint32_t pg_mask_3; /* _PG_MASK_3_0, 0x2a8 */ - uint32_t pg_mask_4; /* _PG_MASK_4_0, 0x2ac */ - uint32_t pllm_wb0_override2; /* _PLLM_WB0_OVERRIDE2_0, 0x2b0 */ - uint32_t tsc_mult; /* _TSC_MULT_0, 0x2b4 */ - uint32_t cpu_vsense_override; /* _CPU_VSENSE_OVERRIDE_0, 0x2b8 */ - uint32_t glb_amap_cfg; /* _GLB_AMAP_CFG_0, 0x2bc */ - uint32_t sticky_bits; /* _STICKY_BITS_0, 0x2c0 */ - uint32_t sec_disable2; /* _SEC_DISABLE2_0, 0x2c4 */ - uint32_t weak_bias; /* _WEAK_BIAS_0, 0x2c8 */ - uint32_t reg_short; /* _REG_SHORT_0, 0x2cc */ - uint32_t pg_mask_andor; /* _PG_MASK_ANDOR_0, 0x2d0 */ - uint32_t gpu_rg_cntrl; /* _GPU_RG_CNTRL_0, 0x2d4 */ - uint32_t sec_disable3; /* _SEC_DISABLE3_0, 0x2d8 */ - uint32_t pg_mask_5; /* _PG_MASK_5_0, 0x2dc */ - uint32_t pg_mask_6; /* _PG_MASK_6_0, 0x2e0 */ - uint32_t _0x2e4[7]; - uint32_t secure_scratch8; /* _SECURE_SCRATCH8_0, 0x300 */ - uint32_t secure_scratch9; /* _SECURE_SCRATCH9_0, 0x304 */ - uint32_t secure_scratch10; /* _SECURE_SCRATCH10_0, 0x308 */ - uint32_t secure_scratch11; /* _SECURE_SCRATCH11_0, 0x30c */ - uint32_t secure_scratch12; /* _SECURE_SCRATCH12_0, 0x310 */ - uint32_t secure_scratch13; /* _SECURE_SCRATCH13_0, 0x314 */ - uint32_t secure_scratch14; /* _SECURE_SCRATCH14_0, 0x318 */ - uint32_t secure_scratch15; /* _SECURE_SCRATCH15_0, 0x31c */ - uint32_t secure_scratch16; /* _SECURE_SCRATCH16_0, 0x320 */ - uint32_t secure_scratch17; /* _SECURE_SCRATCH17_0, 0x324 */ - uint32_t secure_scratch18; /* _SECURE_SCRATCH18_0, 0x328 */ - uint32_t secure_scratch19; /* _SECURE_SCRATCH19_0, 0x32c */ - uint32_t secure_scratch20; /* _SECURE_SCRATCH20_0, 0x330 */ - uint32_t secure_scratch21; /* _SECURE_SCRATCH21_0, 0x334 */ - uint32_t secure_scratch22; /* _SECURE_SCRATCH22_0, 0x338 */ - uint32_t secure_scratch23; /* _SECURE_SCRATCH23_0, 0x33c */ - uint32_t secure_scratch24; /* _SECURE_SCRATCH24_0, 0x340 */ - uint32_t secure_scratch25; /* _SECURE_SCRATCH25_0, 0x344 */ - uint32_t secure_scratch26; /* _SECURE_SCRATCH26_0, 0x348 */ - uint32_t secure_scratch27; /* _SECURE_SCRATCH27_0, 0x34c */ - uint32_t secure_scratch28; /* _SECURE_SCRATCH28_0, 0x350 */ - uint32_t secure_scratch29; /* _SECURE_SCRATCH29_0, 0x354 */ - uint32_t secure_scratch30; /* _SECURE_SCRATCH30_0, 0x358 */ - uint32_t secure_scratch31; /* _SECURE_SCRATCH31_0, 0x35c */ - uint32_t secure_scratch32; /* _SECURE_SCRATCH32_0, 0x360 */ - uint32_t secure_scratch33; /* _SECURE_SCRATCH33_0, 0x364 */ - uint32_t secure_scratch34; /* _SECURE_SCRATCH34_0, 0x368 */ - uint32_t secure_scratch35; /* _SECURE_SCRATCH35_0, 0x36c */ - uint32_t secure_scratch36; /* _SECURE_SCRATCH36_0, 0x370 */ - uint32_t secure_scratch37; /* _SECURE_SCRATCH37_0, 0x374 */ - uint32_t secure_scratch38; /* _SECURE_SCRATCH38_0, 0x378 */ - uint32_t secure_scratch39; /* _SECURE_SCRATCH39_0, 0x37c */ - uint32_t secure_scratch40; /* _SECURE_SCRATCH40_0, 0x380 */ - uint32_t secure_scratch41; /* _SECURE_SCRATCH41_0, 0x384 */ - uint32_t secure_scratch42; /* _SECURE_SCRATCH42_0, 0x388 */ - uint32_t secure_scratch43; /* _SECURE_SCRATCH43_0, 0x38c */ - uint32_t secure_scratch44; /* _SECURE_SCRATCH44_0, 0x390 */ - uint32_t secure_scratch45; /* _SECURE_SCRATCH45_0, 0x394 */ - uint32_t secure_scratch46; /* _SECURE_SCRATCH46_0, 0x398 */ - uint32_t secure_scratch47; /* _SECURE_SCRATCH47_0, 0x39c */ - uint32_t secure_scratch48; /* _SECURE_SCRATCH48_0, 0x3a0 */ - uint32_t secure_scratch49; /* _SECURE_SCRATCH49_0, 0x3a4 */ - uint32_t secure_scratch50; /* _SECURE_SCRATCH50_0, 0x3a8 */ - uint32_t secure_scratch51; /* _SECURE_SCRATCH51_0, 0x3ac */ - uint32_t secure_scratch52; /* _SECURE_SCRATCH52_0, 0x3b0 */ - uint32_t secure_scratch53; /* _SECURE_SCRATCH53_0, 0x3b4 */ - uint32_t secure_scratch54; /* _SECURE_SCRATCH54_0, 0x3b8 */ - uint32_t secure_scratch55; /* _SECURE_SCRATCH55_0, 0x3bc */ - uint32_t secure_scratch56; /* _SECURE_SCRATCH56_0, 0x3c0 */ - uint32_t secure_scratch57; /* _SECURE_SCRATCH57_0, 0x3c4 */ - uint32_t secure_scratch58; /* _SECURE_SCRATCH58_0, 0x3c8 */ - uint32_t secure_scratch59; /* _SECURE_SCRATCH59_0, 0x3cc */ - uint32_t secure_scratch60; /* _SECURE_SCRATCH60_0, 0x3d0 */ - uint32_t secure_scratch61; /* _SECURE_SCRATCH61_0, 0x3d4 */ - uint32_t secure_scratch62; /* _SECURE_SCRATCH62_0, 0x3d8 */ - uint32_t secure_scratch63; /* _SECURE_SCRATCH63_0, 0x3dc */ - uint32_t secure_scratch64; /* _SECURE_SCRATCH64_0, 0x3e0 */ - uint32_t secure_scratch65; /* _SECURE_SCRATCH65_0, 0x3e4 */ - uint32_t secure_scratch66; /* _SECURE_SCRATCH66_0, 0x3e8 */ - uint32_t secure_scratch67; /* _SECURE_SCRATCH67_0, 0x3ec */ - uint32_t secure_scratch68; /* _SECURE_SCRATCH68_0, 0x3f0 */ - uint32_t secure_scratch69; /* _SECURE_SCRATCH69_0, 0x3f4 */ - uint32_t secure_scratch70; /* _SECURE_SCRATCH70_0, 0x3f8 */ - uint32_t secure_scratch71; /* _SECURE_SCRATCH71_0, 0x3fc */ - uint32_t secure_scratch72; /* _SECURE_SCRATCH72_0, 0x400 */ - uint32_t secure_scratch73; /* _SECURE_SCRATCH73_0, 0x404 */ - uint32_t secure_scratch74; /* _SECURE_SCRATCH74_0, 0x408 */ - uint32_t secure_scratch75; /* _SECURE_SCRATCH75_0, 0x40c */ - uint32_t secure_scratch76; /* _SECURE_SCRATCH76_0, 0x410 */ - uint32_t secure_scratch77; /* _SECURE_SCRATCH77_0, 0x414 */ - uint32_t secure_scratch78; /* _SECURE_SCRATCH78_0, 0x418 */ - uint32_t secure_scratch79; /* _SECURE_SCRATCH79_0, 0x41c */ - uint32_t _0x420[8]; - uint32_t cntrl2; /* _CNTRL2_0, 0x440 */ - uint32_t io_dpd_off_mask; /* _IO_DPD_OFF_MASK_0, 0x444 */ - uint32_t io_dpd2_off_mask; /* _IO_DPD2_OFF_MASK_0, 0x448 */ - uint32_t event_counter; /* _EVENT_COUNTER_0, 0x44c */ - uint32_t fuse_control; /* _FUSE_CONTROL_0, 0x450 */ - uint32_t scratch1_eco; /* _SCRATCH1_ECO_0, 0x454 */ - uint32_t _0x458; - uint32_t io_dpd3_req; /* _IO_DPD3_REQ_0, 0x45c */ - uint32_t io_dpd3_status; /* _IO_DPD3_STATUS_0, 0x460 */ - uint32_t io_dpd4_req; /* _IO_DPD4_REQ_0, 0x464 */ - uint32_t io_dpd4_status; /* _IO_DPD4_STATUS_0, 0x468 */ - uint32_t _0x46c[2]; - uint32_t direct_thermtrip_cfg; /* _DIRECT_THERMTRIP_CFG_0, 0x474 */ - uint32_t tsosc_delay; /* _TSOSC_DELAY_0, 0x478 */ - uint32_t set_sw_clamp; /* _SET_SW_CLAMP_0, 0x47c */ - uint32_t debug_authentication; /* _DEBUG_AUTHENTICATION_0, 0x480 */ - uint32_t aotag_cfg; /* _AOTAG_CFG_0, 0x484 */ - uint32_t aotag_thresh1_cfg; /* _AOTAG_THRESH1_CFG_0, 0x488 */ - uint32_t aotag_thresh2_cfg; /* _AOTAG_THRESH2_CFG_0, 0x48c */ - uint32_t aotag_thresh3_cfg; /* _AOTAG_THRESH3_CFG_0, 0x490 */ - uint32_t aotag_status; /* _AOTAG_STATUS_0, 0x494 */ - uint32_t aotag_security; /* _AOTAG_SECURITY_0, 0x498 */ - uint32_t tsensor_config0; /* _TSENSOR_CONFIG0_0, 0x49c */ - uint32_t tsensor_config1; /* _TSENSOR_CONFIG1_0, 0x4a0 */ - uint32_t tsensor_config2; /* _TSENSOR_CONFIG2_0, 0x4a4 */ - uint32_t tsensor_status0; /* _TSENSOR_STATUS0_0, 0x4a8 */ - uint32_t tsensor_status1; /* _TSENSOR_STATUS1_0, 0x4ac */ - uint32_t tsensor_status2; /* _TSENSOR_STATUS2_0, 0x4b0 */ - uint32_t tsensor_pdiv; /* _TSENSOR_PDIV_0, 0x4b4 */ - uint32_t aotag_intr_en; /* _AOTAG_INTR_EN_0, 0x4b8 */ - uint32_t aotag_intr_dis; /* _AOTAG_INTR_DIS_0, 0x4bc */ - uint32_t utmip_pad_cfg0; /* _UTMIP_PAD_CFG0_0, 0x4c0 */ - uint32_t utmip_pad_cfg1; /* _UTMIP_PAD_CFG1_0, 0x4c4 */ - uint32_t utmip_pad_cfg2; /* _UTMIP_PAD_CFG2_0, 0x4c8 */ - uint32_t utmip_pad_cfg3; /* _UTMIP_PAD_CFG3_0, 0x4cc */ - uint32_t utmip_uhsic_sleep_cfg1; /* _UTMIP_UHSIC_SLEEP_CFG1_0, 0x4d0 */ - uint32_t cc4_hvc_control; /* _CC4_HVC_CONTROL_0, 0x4d4 */ - uint32_t wake_debounce_en; /* _WAKE_DEBOUNCE_EN_0, 0x4d8 */ - uint32_t ramdump_ctl_status; /* _RAMDUMP_CTL_STATUS_0, 0x4dc */ - uint32_t utmip_sleepwalk_p3; /* _UTMIP_SLEEPWALK_P3_0, 0x4e0 */ - uint32_t ddr_cntrl; /* _DDR_CNTRL_0, 0x4e4 */ - uint32_t _0x4e8[50]; - uint32_t sec_disable4; /* _SEC_DISABLE4_0, 0x5b0 */ - uint32_t sec_disable5; /* _SEC_DISABLE5_0, 0x5b4 */ - uint32_t sec_disable6; /* _SEC_DISABLE6_0, 0x5b8 */ - uint32_t sec_disable7; /* _SEC_DISABLE7_0, 0x5bc */ - uint32_t sec_disable8; /* _SEC_DISABLE8_0, 0x5c0 */ - uint32_t sec_disable9; /* _SEC_DISABLE9_0, 0x5c4 */ - uint32_t sec_disable10; /* _SEC_DISABLE10_0, 0x5c8 */ - uint32_t _0x5cc[13]; - uint32_t scratch56; /* _SCRATCH56_0, 0x600 */ - uint32_t scratch57; /* _SCRATCH57_0, 0x604 */ - uint32_t scratch58; /* _SCRATCH58_0, 0x608 */ - uint32_t scratch59; /* _SCRATCH59_0, 0x60c */ - uint32_t scratch60; /* _SCRATCH60_0, 0x610 */ - uint32_t scratch61; /* _SCRATCH61_0, 0x614 */ - uint32_t scratch62; /* _SCRATCH62_0, 0x618 */ - uint32_t scratch63; /* _SCRATCH63_0, 0x61c */ - uint32_t scratch64; /* _SCRATCH64_0, 0x620 */ - uint32_t scratch65; /* _SCRATCH65_0, 0x624 */ - uint32_t scratch66; /* _SCRATCH66_0, 0x628 */ - uint32_t scratch67; /* _SCRATCH67_0, 0x62c */ - uint32_t scratch68; /* _SCRATCH68_0, 0x630 */ - uint32_t scratch69; /* _SCRATCH69_0, 0x634 */ - uint32_t scratch70; /* _SCRATCH70_0, 0x638 */ - uint32_t scratch71; /* _SCRATCH71_0, 0x63c */ - uint32_t scratch72; /* _SCRATCH72_0, 0x640 */ - uint32_t scratch73; /* _SCRATCH73_0, 0x644 */ - uint32_t scratch74; /* _SCRATCH74_0, 0x648 */ - uint32_t scratch75; /* _SCRATCH75_0, 0x64c */ - uint32_t scratch76; /* _SCRATCH76_0, 0x650 */ - uint32_t scratch77; /* _SCRATCH77_0, 0x654 */ - uint32_t scratch78; /* _SCRATCH78_0, 0x658 */ - uint32_t scratch79; /* _SCRATCH79_0, 0x65c */ - uint32_t scratch80; /* _SCRATCH80_0, 0x660 */ - uint32_t scratch81; /* _SCRATCH81_0, 0x664 */ - uint32_t scratch82; /* _SCRATCH82_0, 0x668 */ - uint32_t scratch83; /* _SCRATCH83_0, 0x66c */ - uint32_t scratch84; /* _SCRATCH84_0, 0x670 */ - uint32_t scratch85; /* _SCRATCH85_0, 0x674 */ - uint32_t scratch86; /* _SCRATCH86_0, 0x678 */ - uint32_t scratch87; /* _SCRATCH87_0, 0x67c */ - uint32_t scratch88; /* _SCRATCH88_0, 0x680 */ - uint32_t scratch89; /* _SCRATCH89_0, 0x684 */ - uint32_t scratch90; /* _SCRATCH90_0, 0x688 */ - uint32_t scratch91; /* _SCRATCH91_0, 0x68c */ - uint32_t scratch92; /* _SCRATCH92_0, 0x690 */ - uint32_t scratch93; /* _SCRATCH93_0, 0x694 */ - uint32_t scratch94; /* _SCRATCH94_0, 0x698 */ - uint32_t scratch95; /* _SCRATCH95_0, 0x69c */ - uint32_t scratch96; /* _SCRATCH96_0, 0x6a0 */ - uint32_t scratch97; /* _SCRATCH97_0, 0x6a4 */ - uint32_t scratch98; /* _SCRATCH98_0, 0x6a8 */ - uint32_t scratch99; /* _SCRATCH99_0, 0x6ac */ - uint32_t scratch100; /* _SCRATCH100_0, 0x6b0 */ - uint32_t scratch101; /* _SCRATCH101_0, 0x6b4 */ - uint32_t scratch102; /* _SCRATCH102_0, 0x6b8 */ - uint32_t scratch103; /* _SCRATCH103_0, 0x6bc */ - uint32_t scratch104; /* _SCRATCH104_0, 0x6c0 */ - uint32_t scratch105; /* _SCRATCH105_0, 0x6c4 */ - uint32_t scratch106; /* _SCRATCH106_0, 0x6c8 */ - uint32_t scratch107; /* _SCRATCH107_0, 0x6cc */ - uint32_t scratch108; /* _SCRATCH108_0, 0x6d0 */ - uint32_t scratch109; /* _SCRATCH109_0, 0x6d4 */ - uint32_t scratch110; /* _SCRATCH110_0, 0x6d8 */ - uint32_t scratch111; /* _SCRATCH111_0, 0x6dc */ - uint32_t scratch112; /* _SCRATCH112_0, 0x6e0 */ - uint32_t scratch113; /* _SCRATCH113_0, 0x6e4 */ - uint32_t scratch114; /* _SCRATCH114_0, 0x6e8 */ - uint32_t scratch115; /* _SCRATCH115_0, 0x6ec */ - uint32_t scratch116; /* _SCRATCH116_0, 0x6f0 */ - uint32_t scratch117; /* _SCRATCH117_0, 0x6f4 */ - uint32_t scratch118; /* _SCRATCH118_0, 0x6f8 */ - uint32_t scratch119; /* _SCRATCH119_0, 0x6fc */ - uint32_t scratch120; /* _SCRATCH120_0, 0x700 */ - uint32_t scratch121; /* _SCRATCH121_0, 0x704 */ - uint32_t scratch122; /* _SCRATCH122_0, 0x708 */ - uint32_t scratch123; /* _SCRATCH123_0, 0x70c */ - uint32_t scratch124; /* _SCRATCH124_0, 0x710 */ - uint32_t scratch125; /* _SCRATCH125_0, 0x714 */ - uint32_t scratch126; /* _SCRATCH126_0, 0x718 */ - uint32_t scratch127; /* _SCRATCH127_0, 0x71c */ - uint32_t scratch128; /* _SCRATCH128_0, 0x720 */ - uint32_t scratch129; /* _SCRATCH129_0, 0x724 */ - uint32_t scratch130; /* _SCRATCH130_0, 0x728 */ - uint32_t scratch131; /* _SCRATCH131_0, 0x72c */ - uint32_t scratch132; /* _SCRATCH132_0, 0x730 */ - uint32_t scratch133; /* _SCRATCH133_0, 0x734 */ - uint32_t scratch134; /* _SCRATCH134_0, 0x738 */ - uint32_t scratch135; /* _SCRATCH135_0, 0x73c */ - uint32_t scratch136; /* _SCRATCH136_0, 0x740 */ - uint32_t scratch137; /* _SCRATCH137_0, 0x744 */ - uint32_t scratch138; /* _SCRATCH138_0, 0x748 */ - uint32_t scratch139; /* _SCRATCH139_0, 0x74c */ - uint32_t scratch140; /* _SCRATCH140_0, 0x750 */ - uint32_t scratch141; /* _SCRATCH141_0, 0x754 */ - uint32_t scratch142; /* _SCRATCH142_0, 0x758 */ - uint32_t scratch143; /* _SCRATCH143_0, 0x75c */ - uint32_t scratch144; /* _SCRATCH144_0, 0x760 */ - uint32_t scratch145; /* _SCRATCH145_0, 0x764 */ - uint32_t scratch146; /* _SCRATCH146_0, 0x768 */ - uint32_t scratch147; /* _SCRATCH147_0, 0x76c */ - uint32_t scratch148; /* _SCRATCH148_0, 0x770 */ - uint32_t scratch149; /* _SCRATCH149_0, 0x774 */ - uint32_t scratch150; /* _SCRATCH150_0, 0x778 */ - uint32_t scratch151; /* _SCRATCH151_0, 0x77c */ - uint32_t scratch152; /* _SCRATCH152_0, 0x780 */ - uint32_t scratch153; /* _SCRATCH153_0, 0x784 */ - uint32_t scratch154; /* _SCRATCH154_0, 0x788 */ - uint32_t scratch155; /* _SCRATCH155_0, 0x78c */ - uint32_t scratch156; /* _SCRATCH156_0, 0x790 */ - uint32_t scratch157; /* _SCRATCH157_0, 0x794 */ - uint32_t scratch158; /* _SCRATCH158_0, 0x798 */ - uint32_t scratch159; /* _SCRATCH159_0, 0x79c */ - uint32_t scratch160; /* _SCRATCH160_0, 0x7a0 */ - uint32_t scratch161; /* _SCRATCH161_0, 0x7a4 */ - uint32_t scratch162; /* _SCRATCH162_0, 0x7a8 */ - uint32_t scratch163; /* _SCRATCH163_0, 0x7ac */ - uint32_t scratch164; /* _SCRATCH164_0, 0x7b0 */ - uint32_t scratch165; /* _SCRATCH165_0, 0x7b4 */ - uint32_t scratch166; /* _SCRATCH166_0, 0x7b8 */ - uint32_t scratch167; /* _SCRATCH167_0, 0x7bc */ - uint32_t scratch168; /* _SCRATCH168_0, 0x7c0 */ - uint32_t scratch169; /* _SCRATCH169_0, 0x7c4 */ - uint32_t scratch170; /* _SCRATCH170_0, 0x7c8 */ - uint32_t scratch171; /* _SCRATCH171_0, 0x7cc */ - uint32_t scratch172; /* _SCRATCH172_0, 0x7d0 */ - uint32_t scratch173; /* _SCRATCH173_0, 0x7d4 */ - uint32_t scratch174; /* _SCRATCH174_0, 0x7d8 */ - uint32_t scratch175; /* _SCRATCH175_0, 0x7dc */ - uint32_t scratch176; /* _SCRATCH176_0, 0x7e0 */ - uint32_t scratch177; /* _SCRATCH177_0, 0x7e4 */ - uint32_t scratch178; /* _SCRATCH178_0, 0x7e8 */ - uint32_t scratch179; /* _SCRATCH179_0, 0x7ec */ - uint32_t scratch180; /* _SCRATCH180_0, 0x7f0 */ - uint32_t scratch181; /* _SCRATCH181_0, 0x7f4 */ - uint32_t scratch182; /* _SCRATCH182_0, 0x7f8 */ - uint32_t scratch183; /* _SCRATCH183_0, 0x7fc */ - uint32_t scratch184; /* _SCRATCH184_0, 0x800 */ - uint32_t scratch185; /* _SCRATCH185_0, 0x804 */ - uint32_t scratch186; /* _SCRATCH186_0, 0x808 */ - uint32_t scratch187; /* _SCRATCH187_0, 0x80c */ - uint32_t scratch188; /* _SCRATCH188_0, 0x810 */ - uint32_t scratch189; /* _SCRATCH189_0, 0x814 */ - uint32_t scratch190; /* _SCRATCH190_0, 0x818 */ - uint32_t scratch191; /* _SCRATCH191_0, 0x81c */ - uint32_t scratch192; /* _SCRATCH192_0, 0x820 */ - uint32_t scratch193; /* _SCRATCH193_0, 0x824 */ - uint32_t scratch194; /* _SCRATCH194_0, 0x828 */ - uint32_t scratch195; /* _SCRATCH195_0, 0x82c */ - uint32_t scratch196; /* _SCRATCH196_0, 0x830 */ - uint32_t scratch197; /* _SCRATCH197_0, 0x834 */ - uint32_t scratch198; /* _SCRATCH198_0, 0x838 */ - uint32_t scratch199; /* _SCRATCH199_0, 0x83c */ - uint32_t scratch200; /* _SCRATCH200_0, 0x840 */ - uint32_t scratch201; /* _SCRATCH201_0, 0x844 */ - uint32_t scratch202; /* _SCRATCH202_0, 0x848 */ - uint32_t scratch203; /* _SCRATCH203_0, 0x84c */ - uint32_t scratch204; /* _SCRATCH204_0, 0x850 */ - uint32_t scratch205; /* _SCRATCH205_0, 0x854 */ - uint32_t scratch206; /* _SCRATCH206_0, 0x858 */ - uint32_t scratch207; /* _SCRATCH207_0, 0x85c */ - uint32_t scratch208; /* _SCRATCH208_0, 0x860 */ - uint32_t scratch209; /* _SCRATCH209_0, 0x864 */ - uint32_t scratch210; /* _SCRATCH210_0, 0x868 */ - uint32_t scratch211; /* _SCRATCH211_0, 0x86c */ - uint32_t scratch212; /* _SCRATCH212_0, 0x870 */ - uint32_t scratch213; /* _SCRATCH213_0, 0x874 */ - uint32_t scratch214; /* _SCRATCH214_0, 0x878 */ - uint32_t scratch215; /* _SCRATCH215_0, 0x87c */ - uint32_t scratch216; /* _SCRATCH216_0, 0x880 */ - uint32_t scratch217; /* _SCRATCH217_0, 0x884 */ - uint32_t scratch218; /* _SCRATCH218_0, 0x888 */ - uint32_t scratch219; /* _SCRATCH219_0, 0x88c */ - uint32_t scratch220; /* _SCRATCH220_0, 0x890 */ - uint32_t scratch221; /* _SCRATCH221_0, 0x894 */ - uint32_t scratch222; /* _SCRATCH222_0, 0x898 */ - uint32_t scratch223; /* _SCRATCH223_0, 0x89c */ - uint32_t scratch224; /* _SCRATCH224_0, 0x8a0 */ - uint32_t scratch225; /* _SCRATCH225_0, 0x8a4 */ - uint32_t scratch226; /* _SCRATCH226_0, 0x8a8 */ - uint32_t scratch227; /* _SCRATCH227_0, 0x8ac */ - uint32_t scratch228; /* _SCRATCH228_0, 0x8b0 */ - uint32_t scratch229; /* _SCRATCH229_0, 0x8b4 */ - uint32_t scratch230; /* _SCRATCH230_0, 0x8b8 */ - uint32_t scratch231; /* _SCRATCH231_0, 0x8bc */ - uint32_t scratch232; /* _SCRATCH232_0, 0x8c0 */ - uint32_t scratch233; /* _SCRATCH233_0, 0x8c4 */ - uint32_t scratch234; /* _SCRATCH234_0, 0x8c8 */ - uint32_t scratch235; /* _SCRATCH235_0, 0x8cc */ - uint32_t scratch236; /* _SCRATCH236_0, 0x8d0 */ - uint32_t scratch237; /* _SCRATCH237_0, 0x8d4 */ - uint32_t scratch238; /* _SCRATCH238_0, 0x8d8 */ - uint32_t scratch239; /* _SCRATCH239_0, 0x8dc */ - uint32_t scratch240; /* _SCRATCH240_0, 0x8e0 */ - uint32_t scratch241; /* _SCRATCH241_0, 0x8e4 */ - uint32_t scratch242; /* _SCRATCH242_0, 0x8e8 */ - uint32_t scratch243; /* _SCRATCH243_0, 0x8ec */ - uint32_t scratch244; /* _SCRATCH244_0, 0x8f0 */ - uint32_t scratch245; /* _SCRATCH245_0, 0x8f4 */ - uint32_t scratch246; /* _SCRATCH246_0, 0x8f8 */ - uint32_t scratch247; /* _SCRATCH247_0, 0x8fc */ - uint32_t scratch248; /* _SCRATCH248_0, 0x900 */ - uint32_t scratch249; /* _SCRATCH249_0, 0x904 */ - uint32_t scratch250; /* _SCRATCH250_0, 0x908 */ - uint32_t scratch251; /* _SCRATCH251_0, 0x90c */ - uint32_t scratch252; /* _SCRATCH252_0, 0x910 */ - uint32_t scratch253; /* _SCRATCH253_0, 0x914 */ - uint32_t scratch254; /* _SCRATCH254_0, 0x918 */ - uint32_t scratch255; /* _SCRATCH255_0, 0x91c */ - uint32_t scratch256; /* _SCRATCH256_0, 0x920 */ - uint32_t scratch257; /* _SCRATCH257_0, 0x924 */ - uint32_t scratch258; /* _SCRATCH258_0, 0x928 */ - uint32_t scratch259; /* _SCRATCH259_0, 0x92c */ - uint32_t scratch260; /* _SCRATCH260_0, 0x930 */ - uint32_t scratch261; /* _SCRATCH261_0, 0x934 */ - uint32_t scratch262; /* _SCRATCH262_0, 0x938 */ - uint32_t scratch263; /* _SCRATCH263_0, 0x93c */ - uint32_t scratch264; /* _SCRATCH264_0, 0x940 */ - uint32_t scratch265; /* _SCRATCH265_0, 0x944 */ - uint32_t scratch266; /* _SCRATCH266_0, 0x948 */ - uint32_t scratch267; /* _SCRATCH267_0, 0x94c */ - uint32_t scratch268; /* _SCRATCH268_0, 0x950 */ - uint32_t scratch269; /* _SCRATCH269_0, 0x954 */ - uint32_t scratch270; /* _SCRATCH270_0, 0x958 */ - uint32_t scratch271; /* _SCRATCH271_0, 0x95c */ - uint32_t scratch272; /* _SCRATCH272_0, 0x960 */ - uint32_t scratch273; /* _SCRATCH273_0, 0x964 */ - uint32_t scratch274; /* _SCRATCH274_0, 0x968 */ - uint32_t scratch275; /* _SCRATCH275_0, 0x96c */ - uint32_t scratch276; /* _SCRATCH276_0, 0x970 */ - uint32_t scratch277; /* _SCRATCH277_0, 0x974 */ - uint32_t scratch278; /* _SCRATCH278_0, 0x978 */ - uint32_t scratch279; /* _SCRATCH279_0, 0x97c */ - uint32_t scratch280; /* _SCRATCH280_0, 0x980 */ - uint32_t scratch281; /* _SCRATCH281_0, 0x984 */ - uint32_t scratch282; /* _SCRATCH282_0, 0x988 */ - uint32_t scratch283; /* _SCRATCH283_0, 0x98c */ - uint32_t scratch284; /* _SCRATCH284_0, 0x990 */ - uint32_t scratch285; /* _SCRATCH285_0, 0x994 */ - uint32_t scratch286; /* _SCRATCH286_0, 0x998 */ - uint32_t scratch287; /* _SCRATCH287_0, 0x99c */ - uint32_t scratch288; /* _SCRATCH288_0, 0x9a0 */ - uint32_t scratch289; /* _SCRATCH289_0, 0x9a4 */ - uint32_t scratch290; /* _SCRATCH290_0, 0x9a8 */ - uint32_t scratch291; /* _SCRATCH291_0, 0x9ac */ - uint32_t scratch292; /* _SCRATCH292_0, 0x9b0 */ - uint32_t scratch293; /* _SCRATCH293_0, 0x9b4 */ - uint32_t scratch294; /* _SCRATCH294_0, 0x9b8 */ - uint32_t scratch295; /* _SCRATCH295_0, 0x9bc */ - uint32_t scratch296; /* _SCRATCH296_0, 0x9c0 */ - uint32_t scratch297; /* _SCRATCH297_0, 0x9c4 */ - uint32_t scratch298; /* _SCRATCH298_0, 0x9c8 */ - uint32_t scratch299; /* _SCRATCH299_0, 0x9cc */ - uint32_t _0x9d0[50]; - uint32_t secure_scratch80; /* _SECURE_SCRATCH80_0, 0xa98 */ - uint32_t secure_scratch81; /* _SECURE_SCRATCH81_0, 0xa9c */ - uint32_t secure_scratch82; /* _SECURE_SCRATCH82_0, 0xaa0 */ - uint32_t secure_scratch83; /* _SECURE_SCRATCH83_0, 0xaa4 */ - uint32_t secure_scratch84; /* _SECURE_SCRATCH84_0, 0xaa8 */ - uint32_t secure_scratch85; /* _SECURE_SCRATCH85_0, 0xaac */ - uint32_t secure_scratch86; /* _SECURE_SCRATCH86_0, 0xab0 */ - uint32_t secure_scratch87; /* _SECURE_SCRATCH87_0, 0xab4 */ - uint32_t secure_scratch88; /* _SECURE_SCRATCH88_0, 0xab8 */ - uint32_t secure_scratch89; /* _SECURE_SCRATCH89_0, 0xabc */ - uint32_t secure_scratch90; /* _SECURE_SCRATCH90_0, 0xac0 */ - uint32_t secure_scratch91; /* _SECURE_SCRATCH91_0, 0xac4 */ - uint32_t secure_scratch92; /* _SECURE_SCRATCH92_0, 0xac8 */ - uint32_t secure_scratch93; /* _SECURE_SCRATCH93_0, 0xacc */ - uint32_t secure_scratch94; /* _SECURE_SCRATCH94_0, 0xad0 */ - uint32_t secure_scratch95; /* _SECURE_SCRATCH95_0, 0xad4 */ - uint32_t secure_scratch96; /* _SECURE_SCRATCH96_0, 0xad8 */ - uint32_t secure_scratch97; /* _SECURE_SCRATCH97_0, 0xadc */ - uint32_t secure_scratch98; /* _SECURE_SCRATCH98_0, 0xae0 */ - uint32_t secure_scratch99; /* _SECURE_SCRATCH99_0, 0xae4 */ - uint32_t secure_scratch100; /* _SECURE_SCRATCH100_0, 0xae8 */ - uint32_t secure_scratch101; /* _SECURE_SCRATCH101_0, 0xaec */ - uint32_t secure_scratch102; /* _SECURE_SCRATCH102_0, 0xaf0 */ - uint32_t secure_scratch103; /* _SECURE_SCRATCH103_0, 0xaf4 */ - uint32_t secure_scratch104; /* _SECURE_SCRATCH104_0, 0xaf8 */ - uint32_t secure_scratch105; /* _SECURE_SCRATCH105_0, 0xafc */ - uint32_t secure_scratch106; /* _SECURE_SCRATCH106_0, 0xb00 */ - uint32_t secure_scratch107; /* _SECURE_SCRATCH107_0, 0xb04 */ - uint32_t secure_scratch108; /* _SECURE_SCRATCH108_0, 0xb08 */ - uint32_t secure_scratch109; /* _SECURE_SCRATCH109_0, 0xb0c */ - uint32_t secure_scratch110; /* _SECURE_SCRATCH110_0, 0xb10 */ - uint32_t secure_scratch111; /* _SECURE_SCRATCH111_0, 0xb14 */ - uint32_t secure_scratch112; /* _SECURE_SCRATCH112_0, 0xb18 */ - uint32_t secure_scratch113; /* _SECURE_SCRATCH113_0, 0xb1c */ - uint32_t secure_scratch114; /* _SECURE_SCRATCH114_0, 0xb20 */ - uint32_t secure_scratch115; /* _SECURE_SCRATCH115_0, 0xb24 */ - uint32_t secure_scratch116; /* _SECURE_SCRATCH116_0, 0xb28 */ - uint32_t secure_scratch117; /* _SECURE_SCRATCH117_0, 0xb2c */ - uint32_t secure_scratch118; /* _SECURE_SCRATCH118_0, 0xb30 */ - uint32_t secure_scratch119; /* _SECURE_SCRATCH119_0, 0xb34 */ - uint32_t secure_scratch120; /* _SECURE_SCRATCH120_0, 0xb38 */ - uint32_t secure_scratch121; /* _SECURE_SCRATCH121_0, 0xb3c */ - uint32_t secure_scratch122; /* _SECURE_SCRATCH122_0, 0xb40 */ - uint32_t secure_scratch123; /* _SECURE_SCRATCH123_0, 0xb44 */ - uint32_t led_breathing_ctrl; /* _LED_BREATHING_CTRL_0, 0xb48 */ - uint32_t led_breathing_counter0; /* _LED_BREATHING_COUNTER0_0, 0xb4c */ - uint32_t led_breathing_counter1; /* _LED_BREATHING_COUNTER1_0, 0xb50 */ - uint32_t led_breathing_counter2; /* _LED_BREATHING_COUNTER2_0, 0xb54 */ - uint32_t led_breathing_counter3; /* _LED_BREATHING_COUNTER3_0, 0xb58 */ - uint32_t led_breathing_status; /* _LED_BREATHING_STATUS_0, 0xb5c */ - uint32_t _0xb60[2]; - uint32_t secure_scratch124; /* _SECURE_SCRATCH124_0, 0xb68 */ - uint32_t secure_scratch125; /* _SECURE_SCRATCH125_0, 0xb6c */ - uint32_t secure_scratch126; /* _SECURE_SCRATCH126_0, 0xb70 */ - uint32_t secure_scratch127; /* _SECURE_SCRATCH127_0, 0xb74 */ - uint32_t secure_scratch128; /* _SECURE_SCRATCH128_0, 0xb78 */ - uint32_t secure_scratch129; /* _SECURE_SCRATCH129_0, 0xb7c */ - uint32_t secure_scratch130; /* _SECURE_SCRATCH130_0, 0xb80 */ - uint32_t secure_scratch131; /* _SECURE_SCRATCH131_0, 0xb84 */ - uint32_t secure_scratch132; /* _SECURE_SCRATCH132_0, 0xb88 */ - uint32_t secure_scratch133; /* _SECURE_SCRATCH133_0, 0xb8c */ - uint32_t secure_scratch134; /* _SECURE_SCRATCH134_0, 0xb90 */ - uint32_t secure_scratch135; /* _SECURE_SCRATCH135_0, 0xb94 */ - uint32_t secure_scratch136; /* _SECURE_SCRATCH136_0, 0xb98 */ - uint32_t secure_scratch137; /* _SECURE_SCRATCH137_0, 0xb9c */ - uint32_t secure_scratch138; /* _SECURE_SCRATCH138_0, 0xba0 */ - uint32_t secure_scratch139; /* _SECURE_SCRATCH139_0, 0xba4 */ - uint32_t _0xba8[2]; - uint32_t sec_disable_ns; /* _SEC_DISABLE_NS_0, 0xbb0 */ - uint32_t sec_disable2_ns; /* _SEC_DISABLE2_NS_0, 0xbb4 */ - uint32_t sec_disable3_ns; /* _SEC_DISABLE3_NS_0, 0xbb8 */ - uint32_t sec_disable4_ns; /* _SEC_DISABLE4_NS_0, 0xbbc */ - uint32_t sec_disable5_ns; /* _SEC_DISABLE5_NS_0, 0xbc0 */ - uint32_t sec_disable6_ns; /* _SEC_DISABLE6_NS_0, 0xbc4 */ - uint32_t sec_disable7_ns; /* _SEC_DISABLE7_NS_0, 0xbc8 */ - uint32_t sec_disable8_ns; /* _SEC_DISABLE8_NS_0, 0xbcc */ - uint32_t sec_disable9_ns; /* _SEC_DISABLE9_NS_0, 0xbd0 */ - uint32_t sec_disable10_ns; /* _SEC_DISABLE10_NS_0, 0xbd4 */ - uint32_t _0xbd8[4]; - uint32_t tzram_pwr_cntrl; /* _TZRAM_PWR_CNTRL_0, 0xbe8 */ - uint32_t tzram_sec_disable; /* _TZRAM_SEC_DISABLE_0, 0xbec */ - uint32_t tzram_non_sec_disable; /* _TZRAM_NON_SEC_DISABLE_0, 0xbf0 */ -} tegra_pmc_t; - -static inline volatile tegra_pmc_t *pmc_get_regs(void) -{ - return (volatile tegra_pmc_t *)PMC_BASE; -} - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/preprocessor.h b/fusee/fusee-primary/fusee-primary-main/src/preprocessor.h deleted file mode 100644 index 2560cf456..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/preprocessor.h +++ /dev/null @@ -1,207 +0,0 @@ -/* TuxSH: I added INC/DEC_10 to INC/DEC_32; tuples */ - -#ifndef FUSEE_PREPROCESSOR_H -#define FUSEE_PREPROCESSOR_H - -/*============================================================================= - Copyright (c) 2015 Paul Fultz II - cloak.h - Distributed under the Boost Software License, Version 1.0. (See accompanying - file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt) -==============================================================================*/ - -/*#ifndef CLOAK_GUARD_H -#define CLOAK_GUARD_H*/ - -#define CAT(a, ...) PRIMITIVE_CAT(a, __VA_ARGS__) -#define PRIMITIVE_CAT(a, ...) a ## __VA_ARGS__ - -#define COMPL(b) PRIMITIVE_CAT(COMPL_, b) -#define COMPL_0 1 -#define COMPL_1 0 - -#define BITAND(x) PRIMITIVE_CAT(BITAND_, x) -#define BITAND_0(y) 0 -#define BITAND_1(y) y - -#define INC(x) PRIMITIVE_CAT(INC_, x) -#define INC_0 1 -#define INC_1 2 -#define INC_2 3 -#define INC_3 4 -#define INC_4 5 -#define INC_5 6 -#define INC_6 7 -#define INC_7 8 -#define INC_8 9 -#define INC_9 10 -#define INC_10 11 -#define INC_11 12 -#define INC_12 13 -#define INC_13 14 -#define INC_14 15 -#define INC_15 16 -#define INC_16 17 -#define INC_17 18 -#define INC_18 19 -#define INC_19 20 -#define INC_20 21 -#define INC_21 22 -#define INC_22 23 -#define INC_23 24 -#define INC_24 25 -#define INC_25 26 -#define INC_26 27 -#define INC_27 28 -#define INC_28 29 -#define INC_29 30 -#define INC_30 31 -#define INC_31 32 -#define INC_32 32 -#define INC_33 33 - -#define DEC(x) PRIMITIVE_CAT(DEC_, x) -#define DEC_0 0 -#define DEC_1 0 -#define DEC_2 1 -#define DEC_3 2 -#define DEC_4 3 -#define DEC_5 4 -#define DEC_6 5 -#define DEC_7 6 -#define DEC_8 7 -#define DEC_9 8 -#define DEC_10 9 -#define DEC_11 10 -#define DEC_12 11 -#define DEC_13 12 -#define DEC_14 13 -#define DEC_15 14 -#define DEC_16 15 -#define DEC_17 16 -#define DEC_18 17 -#define DEC_19 18 -#define DEC_20 19 -#define DEC_21 20 -#define DEC_22 21 -#define DEC_23 22 -#define DEC_24 23 -#define DEC_25 24 -#define DEC_26 25 -#define DEC_27 26 -#define DEC_28 27 -#define DEC_29 28 -#define DEC_30 29 -#define DEC_31 30 -#define DEC_32 31 -#define DEC_33 32 - -#define CHECK_N(x, n, ...) n -#define CHECK(...) CHECK_N(__VA_ARGS__, 0,) -#define PROBE(x) x, 1, - -#define IS_PAREN(x) CHECK(IS_PAREN_PROBE x) -#define IS_PAREN_PROBE(...) PROBE(~) - -#define NOT(x) CHECK(PRIMITIVE_CAT(NOT_, x)) -#define NOT_0 PROBE(~) - -#define COMPL(b) PRIMITIVE_CAT(COMPL_, b) -#define COMPL_0 1 -#define COMPL_1 0 - -#define BOOL(x) COMPL(NOT(x)) - -#define IIF(c) PRIMITIVE_CAT(IIF_, c) -#define IIF_0(t, ...) __VA_ARGS__ -#define IIF_1(t, ...) t - -#define IF(c) IIF(BOOL(c)) - -#define EAT(...) -#define EXPAND(...) __VA_ARGS__ -#define WHEN(c) IF(c)(EXPAND, EAT) - -#define EMPTY() -#define DEFER(id) id EMPTY() -#define OBSTRUCT(id) id DEFER(EMPTY)() - -#define EVAL(...) EVAL1(EVAL1(EVAL1(__VA_ARGS__))) -#define EVAL1(...) EVAL2(EVAL2(EVAL2(__VA_ARGS__))) -#define EVAL2(...) EVAL3(EVAL3(EVAL3(__VA_ARGS__))) -#define EVAL3(...) EVAL4(EVAL4(EVAL4(__VA_ARGS__))) -#define EVAL4(...) EVAL5(EVAL5(EVAL5(__VA_ARGS__))) -#define EVAL5(...) __VA_ARGS__ - -#define REPEAT(count, macro, ...) \ - WHEN(count) \ - ( \ - OBSTRUCT(REPEAT_INDIRECT) () \ - ( \ - DEC(count), macro, __VA_ARGS__ \ - ) \ - OBSTRUCT(macro) \ - ( \ - DEC(count), __VA_ARGS__ \ - ) \ - ) -#define REPEAT_INDIRECT() REPEAT - -#define WHILE(pred, op, ...) \ - IF(pred(__VA_ARGS__)) \ - ( \ - OBSTRUCT(WHILE_INDIRECT) () \ - ( \ - pred, op, op(__VA_ARGS__) \ - ), \ - __VA_ARGS__ \ - ) -#define WHILE_INDIRECT() WHILE - -#define PRIMITIVE_COMPARE(x, y) IS_PAREN \ -( \ - COMPARE_ ## x ( COMPARE_ ## y) (()) \ -) - -#define IS_COMPARABLE(x) IS_PAREN( CAT(COMPARE_, x) (()) ) - -#define NOT_EQUAL(x, y) \ -IIF(BITAND(IS_COMPARABLE(x))(IS_COMPARABLE(y)) ) \ -( \ - PRIMITIVE_COMPARE, \ - 1 EAT \ -)(x, y) - -#define EQUAL(x, y) COMPL(NOT_EQUAL(x, y)) - -#define COMMA() , - -#define COMMA_IF(n) IF(n)(COMMA, EAT)() - -#define PLUS() + - -#define _TUPLE_ELEM_0(a, ...) a -#define _TUPLE_ELEM_1(a, b, ...) b -#define _TUPLE_ELEM_2(a, b, c, ...) c -#define _TUPLE_ELEM_3(a, b, c, d, ...) d -#define _TUPLE_ELEM_4(a, b, c, d, e, ...) e - -#define TUPLE_ELEM_0(T) EVAL(_TUPLE_ELEM_0 T) -#define TUPLE_ELEM_1(T) EVAL(_TUPLE_ELEM_1 T) -#define TUPLE_ELEM_2(T) EVAL(_TUPLE_ELEM_2 T) -#define TUPLE_ELEM_3(T) EVAL(_TUPLE_ELEM_3 T) -#define TUPLE_ELEM_4(T) EVAL(_TUPLE_ELEM_4 T) - -#define _TUPLE_FOLD_LEFT_0(i, T, op) (_TUPLE_ELEM_0 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_1(i, T, op) (_TUPLE_ELEM_1 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_2(i, T, op) (_TUPLE_ELEM_2 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_3(i, T, op) (_TUPLE_ELEM_3 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_4(i, T, op) (_TUPLE_ELEM_4 CAT(T,i)) op() - -#define TUPLE_FOLD_LEFT_0(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_0, T, op)) -#define TUPLE_FOLD_LEFT_1(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_1, T, op)) -#define TUPLE_FOLD_LEFT_2(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_2, T, op)) -#define TUPLE_FOLD_LEFT_3(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_3, T, op)) -#define TUPLE_FOLD_LEFT_4(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_4, T, op)) - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/reboot_start.s b/fusee/fusee-primary/fusee-primary-main/src/reboot_start.s deleted file mode 100644 index e2bbe8bb1..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/reboot_start.s +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -.macro CLEAR_GPR_REG_ITER - mov r\@, #0 -.endm - -.section .reboot.start, "ax", %progbits -.arm -.align 5 -.global reboot_start -.type reboot_start, %function -reboot_start: - /* Switch to system mode, mask all interrupts, clear all flags */ - msr cpsr_cxsf, #0xDF - - /* Relocate reboot start to 0x4003E000. */ - ldr r0, =0x4003E000 - adr r1, reboot_start - cmp r0, r1 - beq 1f - - mov r2, #0x1000 -0: - ldmia r1!, {r5-r12} - stmia r0!, {r5-r12} - subs r2, #0x20 - bne 0b - - ldr r0, =0x4003E000 - adr r1, reboot_start - adr r2, 1f - sub r2, r2, r1 - add r2, r2, r0 - bx r2 - -1: - - /* Restore our low iram code. */ - ldr r0, =0x40008000 - ldr r1, =0x40030000 - mov r2, #0x8000 -0: - ldmia r1!, {r5-r12} - stmia r0!, {r5-r12} - subs r2, #0x20 - bne 0b - - /* Restore our upper stub code. */ - ldr r0, =0x40010000 - ldr r1, =0x4003D000 - mov r2, #0x1000 -0: - ldmia r1!, {r5-r12} - stmia r0!, {r5-r12} - subs r2, #0x20 - bne 0b - - /* Jump to start. */ - ldr r0, =0x40008000 - bx r0 - -0: b 0b \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/sdram.c b/fusee/fusee-primary/fusee-primary-main/src/sdram.c deleted file mode 100644 index 98d7c1182..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sdram.c +++ /dev/null @@ -1,3366 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "i2c.h" -#include "mc.h" -#include "emc.h" -#include "pmc.h" -#include "timers.h" -#include "sysreg.h" -#include "fuse.h" -#include "max77620.h" -#include "sdram_params.h" -#include "car.h" - -#define CONFIG_SDRAM_COMPRESS - -#ifdef CONFIG_SDRAM_COMPRESS -#include "../../../fusee/common/lz.h" -#include "sdram_lz.inl" -#else -#include "sdram.inl" -#endif - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static void sdram_config_erista(const sdram_params_erista_t *params) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - pmc->io_dpd3_req = (((4 * params->EmcPmcScratch1 >> 2) + 0x80000000) ^ 0xFFFF) & 0xC000FFFF; - udelay(params->PmcIoDpd3ReqWait); - uint32_t req = (4 * params->EmcPmcScratch2 >> 2) + 0x80000000; - pmc->io_dpd4_req = (req >> 16 << 16) ^ 0x3FFF0000; - udelay(params->PmcIoDpd4ReqWait); - pmc->io_dpd4_req = (req ^ 0xFFFF) & 0xC000FFFF; - udelay(params->PmcIoDpd4ReqWait); - pmc->weak_bias = 0; - udelay(1); - - car->pllm_misc1 = params->PllMSetupControl; - car->pllm_misc2 = 0; - car->pllm_base = ((params->PllMFeedbackDivider << 8) | params->PllMInputDivider | 0x40000000 | ((params->PllMPostDivider & 0xFFFF) << 20)); - - bool timeout = false; - uint32_t wait_end = get_time_us() + 300; - - while (!(car->pllm_base & 0x8000000) && !timeout) { - if (get_time_us() >= wait_end) - timeout = true; - } - - if (!timeout) { - udelay(10); - } - - car->clk_source_emc = (((params->McEmemArbMisc0 >> 11) & 0x10000) | (params->EmcClockSource & 0xFFFEFFFF)); - - if (params->EmcClockSourceDll) { - car->clk_source_emc_dll = params->EmcClockSourceDll; - } - if (params->ClearClk2Mc1) { - car->clk_enb_w_clr = 0x40000000; - } - - car->clk_enb_h_set = 0x2000001; - car->clk_enb_x_set = 0x4000; - car->rst_dev_h_clr = 0x2000001; - - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_0) = params->EmcPmacroVttgenCtrl0; - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_1) = params->EmcPmacroVttgenCtrl1; - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_2) = params->EmcPmacroVttgenCtrl2; - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - udelay(1); - - MAKE_EMC_REG(EMC_DBG) = (params->EmcDbgWriteMux << 1) | params->EmcDbg; - - if (params->EmcBctSpare2) { - *(volatile uint32_t *)params->EmcBctSpare2 = params->EmcBctSpare3; - } - - MAKE_EMC_REG(EMC_FBIO_CFG7) = params->EmcFbioCfg7; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_0) = params->EmcCmdMappingCmd0_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_1) = params->EmcCmdMappingCmd0_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_2) = params->EmcCmdMappingCmd0_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_0) = params->EmcCmdMappingCmd1_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_1) = params->EmcCmdMappingCmd1_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_2) = params->EmcCmdMappingCmd1_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_0) = params->EmcCmdMappingCmd2_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_1) = params->EmcCmdMappingCmd2_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_2) = params->EmcCmdMappingCmd2_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_0) = params->EmcCmdMappingCmd3_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_1) = params->EmcCmdMappingCmd3_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_2) = params->EmcCmdMappingCmd3_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_BYTE) = params->EmcCmdMappingByte; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_0) = params->EmcPmacroBrickMapping0; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_1) = params->EmcPmacroBrickMapping1; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_2) = params->EmcPmacroBrickMapping2; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU1) = ((params->EmcPmacroBrickCtrlRfu1 & 0x1120112) | 0x1EED1EED); - MAKE_EMC_REG(EMC_CONFIG_SAMPLE_DELAY) = params->EmcConfigSampleDelay; - MAKE_EMC_REG(EMC_FBIO_CFG8) = params->EmcFbioCfg8; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE0) = params->EmcSwizzleRank0Byte0; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE1) = params->EmcSwizzleRank0Byte1; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE2) = params->EmcSwizzleRank0Byte2; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE3) = params->EmcSwizzleRank0Byte3; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE0) = params->EmcSwizzleRank1Byte0; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE1) = params->EmcSwizzleRank1Byte1; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE2) = params->EmcSwizzleRank1Byte2; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE3) = params->EmcSwizzleRank1Byte3; - - if (params->EmcBctSpare6) { - *(volatile uint32_t *)params->EmcBctSpare6 = params->EmcBctSpare7; - } - - MAKE_EMC_REG(EMC_XM2COMPPADCTRL) = params->EmcXm2CompPadCtrl; - MAKE_EMC_REG(EMC_XM2COMPPADCTRL2) = params->EmcXm2CompPadCtrl2; - MAKE_EMC_REG(EMC_XM2COMPPADCTRL3) = params->EmcXm2CompPadCtrl3; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG2) = params->EmcAutoCalConfig2; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG3) = params->EmcAutoCalConfig3; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG4) = params->EmcAutoCalConfig4; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG5) = params->EmcAutoCalConfig5; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG6) = params->EmcAutoCalConfig6; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG7) = params->EmcAutoCalConfig7; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG8) = params->EmcAutoCalConfig8; - MAKE_EMC_REG(EMC_PMACRO_RX_TERM) = params->EmcPmacroRxTerm; - MAKE_EMC_REG(EMC_PMACRO_DQ_TX_DRV) = params->EmcPmacroDqTxDrv; - MAKE_EMC_REG(EMC_PMACRO_CA_TX_DRV) = params->EmcPmacroCaTxDrv; - MAKE_EMC_REG(EMC_PMACRO_CMD_TX_DRV) = params->EmcPmacroCmdTxDrv; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_COMMON) = params->EmcPmacroAutocalCfgCommon; - MAKE_EMC_REG(EMC_AUTO_CAL_CHANNEL) = params->EmcAutoCalChannel; - MAKE_EMC_REG(EMC_PMACRO_ZCTRL) = params->EmcPmacroZctrl; - MAKE_EMC_REG(EMC_DLL_CFG_0) = params->EmcDllCfg0; - MAKE_EMC_REG(EMC_DLL_CFG_1) = params->EmcDllCfg1; - MAKE_EMC_REG(EMC_CFG_DIG_DLL_1) = params->EmcCfgDigDll_1; - MAKE_EMC_REG(EMC_DATA_BRLSHFT_0) = params->EmcDataBrlshft0; - MAKE_EMC_REG(EMC_DATA_BRLSHFT_1) = params->EmcDataBrlshft1; - MAKE_EMC_REG(EMC_DQS_BRLSHFT_0) = params->EmcDqsBrlshft0; - MAKE_EMC_REG(EMC_DQS_BRLSHFT_1) = params->EmcDqsBrlshft1; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_0) = params->EmcCmdBrlshft0; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_1) = params->EmcCmdBrlshft1; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_2) = params->EmcCmdBrlshft2; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_3) = params->EmcCmdBrlshft3; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_0) = params->EmcQuseBrlshft0; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_1) = params->EmcQuseBrlshft1; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_2) = params->EmcQuseBrlshft2; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_3) = params->EmcQuseBrlshft3; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU1) = ((params->EmcPmacroBrickCtrlRfu1 & 0x1BF01BF) | 0x1E401E40); - MAKE_EMC_REG(EMC_PMACRO_PAD_CFG_CTRL) = params->EmcPmacroPadCfgCtrl; - MAKE_EMC_REG(EMC_PMACRO_CMD_BRICK_CTRL_FDPD) = params->EmcPmacroCmdBrickCtrlFdpd; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU2) = (params->EmcPmacroBrickCtrlRfu2 & 0xFF7FFF7F); - MAKE_EMC_REG(EMC_PMACRO_DATA_BRICK_CTRL_FDPD) = params->EmcPmacroDataBrickCtrlFdpd; - MAKE_EMC_REG(EMC_PMACRO_BG_BIAS_CTRL_0) = params->EmcPmacroBgBiasCtrl0; - MAKE_EMC_REG(EMC_PMACRO_DATA_PAD_RX_CTRL) = params->EmcPmacroDataPadRxCtrl; - MAKE_EMC_REG(EMC_PMACRO_CMD_PAD_RX_CTRL) = params->EmcPmacroCmdPadRxCtrl; - MAKE_EMC_REG(EMC_PMACRO_DATA_PAD_TX_CTRL) = params->EmcPmacroDataPadTxCtrl; - MAKE_EMC_REG(EMC_PMACRO_DATA_RX_TERM_MODE) = params->EmcPmacroDataRxTermMode; - MAKE_EMC_REG(EMC_PMACRO_CMD_RX_TERM_MODE) = params->EmcPmacroCmdRxTermMode; - MAKE_EMC_REG(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->EmcPmacroCmdPadTxCtrl; - MAKE_EMC_REG(EMC_CFG_3) = params->EmcCfg3; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_0) = params->EmcPmacroTxPwrd0; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_1) = params->EmcPmacroTxPwrd1; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_2) = params->EmcPmacroTxPwrd2; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_3) = params->EmcPmacroTxPwrd3; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_4) = params->EmcPmacroTxPwrd4; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_5) = params->EmcPmacroTxPwrd5; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_0) = params->EmcPmacroTxSelClkSrc0; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_1) = params->EmcPmacroTxSelClkSrc1; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_2) = params->EmcPmacroTxSelClkSrc2; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_3) = params->EmcPmacroTxSelClkSrc3; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_4) = params->EmcPmacroTxSelClkSrc4; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_5) = params->EmcPmacroTxSelClkSrc5; - MAKE_EMC_REG(EMC_PMACRO_DDLL_BYPASS) = params->EmcPmacroDdllBypass; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_0) = params->EmcPmacroDdllPwrd0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_1) = params->EmcPmacroDdllPwrd1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_2) = params->EmcPmacroDdllPwrd2; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_0) = params->EmcPmacroCmdCtrl0; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_1) = params->EmcPmacroCmdCtrl1; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_2) = params->EmcPmacroCmdCtrl2; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQ_0) = params->EmcPmacroIbVrefDq_0; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQ_1) = params->EmcPmacroIbVrefDq_1; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQS_0) = params->EmcPmacroIbVrefDqs_0; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQS_1) = params->EmcPmacroIbVrefDqs_1; - MAKE_EMC_REG(EMC_PMACRO_IB_RXRT) = params->EmcPmacroIbRxrt; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_0) = params->EmcPmacroQuseDdllRank0_0; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_1) = params->EmcPmacroQuseDdllRank0_1; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_2) = params->EmcPmacroQuseDdllRank0_2; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_3) = params->EmcPmacroQuseDdllRank0_3; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_4) = params->EmcPmacroQuseDdllRank0_4; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_5) = params->EmcPmacroQuseDdllRank0_5; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_0) = params->EmcPmacroQuseDdllRank1_0; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_1) = params->EmcPmacroQuseDdllRank1_1; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_2) = params->EmcPmacroQuseDdllRank1_2; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_3) = params->EmcPmacroQuseDdllRank1_3; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_4) = params->EmcPmacroQuseDdllRank1_4; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_5) = params->EmcPmacroQuseDdllRank1_5; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU1) = params->EmcPmacroBrickCtrlRfu1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0) = params->EmcPmacroObDdllLongDqRank0_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1) = params->EmcPmacroObDdllLongDqRank0_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) = params->EmcPmacroObDdllLongDqRank0_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3) = params->EmcPmacroObDdllLongDqRank0_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4) = params->EmcPmacroObDdllLongDqRank0_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5) = params->EmcPmacroObDdllLongDqRank0_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0) = params->EmcPmacroObDdllLongDqRank1_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1) = params->EmcPmacroObDdllLongDqRank1_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2) = params->EmcPmacroObDdllLongDqRank1_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3) = params->EmcPmacroObDdllLongDqRank1_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4) = params->EmcPmacroObDdllLongDqRank1_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5) = params->EmcPmacroObDdllLongDqRank1_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0) = params->EmcPmacroObDdllLongDqsRank0_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1) = params->EmcPmacroObDdllLongDqsRank0_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2) = params->EmcPmacroObDdllLongDqsRank0_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3) = params->EmcPmacroObDdllLongDqsRank0_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4) = params->EmcPmacroObDdllLongDqsRank0_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5) = params->EmcPmacroObDdllLongDqsRank0_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0) = params->EmcPmacroObDdllLongDqsRank1_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1) = params->EmcPmacroObDdllLongDqsRank1_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2) = params->EmcPmacroObDdllLongDqsRank1_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3) = params->EmcPmacroObDdllLongDqsRank1_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4) = params->EmcPmacroObDdllLongDqsRank1_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5) = params->EmcPmacroObDdllLongDqsRank1_5; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0) = params->EmcPmacroIbDdllLongDqsRank0_0; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1) = params->EmcPmacroIbDdllLongDqsRank0_1; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2) = params->EmcPmacroIbDdllLongDqsRank0_2; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3) = params->EmcPmacroIbDdllLongDqsRank0_3; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0) = params->EmcPmacroIbDdllLongDqsRank1_0; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1) = params->EmcPmacroIbDdllLongDqsRank1_1; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) = params->EmcPmacroIbDdllLongDqsRank1_2; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) = params->EmcPmacroIbDdllLongDqsRank1_3; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_0) = params->EmcPmacroDdllLongCmd_0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_1) = params->EmcPmacroDdllLongCmd_1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_2) = params->EmcPmacroDdllLongCmd_2; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_3) = params->EmcPmacroDdllLongCmd_3; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_4) = params->EmcPmacroDdllLongCmd_4; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_0) = params->EmcPmacroDdllShortCmd_0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_1) = params->EmcPmacroDdllShortCmd_1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_2) = params->EmcPmacroDdllShortCmd_2; - MAKE_EMC_REG(EMC_PMACRO_COMMON_PAD_TX_CTRL) = ((params->EmcPmacroCommonPadTxCtrl & 1) | 0xE); - - if (params->EmcBctSpare4) { - *(volatile uint32_t *)params->EmcBctSpare4 = params->EmcBctSpare5; - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM) = params->McVideoProtectBom; - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM_ADR_HI) = params->McVideoProtectBomAdrHi; - MAKE_MC_REG(MC_VIDEO_PROTECT_SIZE_MB) = params->McVideoProtectSizeMb; - MAKE_MC_REG(MC_VIDEO_PROTECT_VPR_OVERRIDE) = params->McVideoProtectVprOverride; - MAKE_MC_REG(MC_VIDEO_PROTECT_VPR_OVERRIDE1) = params->McVideoProtectVprOverride1; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = params->McVideoProtectGpuOverride0; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = params->McVideoProtectGpuOverride1; - MAKE_MC_REG(MC_EMEM_ADR_CFG) = params->McEmemAdrCfg; - MAKE_MC_REG(MC_EMEM_ADR_CFG_DEV0) = params->McEmemAdrCfgDev0; - MAKE_MC_REG(MC_EMEM_ADR_CFG_DEV1) = params->McEmemAdrCfgDev1; - MAKE_MC_REG(MC_EMEM_ADR_CFG_CHANNEL_MASK) = params->McEmemAdrCfgChannelMask; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_0) = params->McEmemAdrCfgBankMask0; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_1) = params->McEmemAdrCfgBankMask1; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_2) = params->McEmemAdrCfgBankMask2; - MAKE_MC_REG(MC_EMEM_CFG) = params->McEmemCfg; - MAKE_MC_REG(MC_SEC_CARVEOUT_BOM) = params->McSecCarveoutBom; - MAKE_MC_REG(MC_SEC_CARVEOUT_ADR_HI) = params->McSecCarveoutAdrHi; - MAKE_MC_REG(MC_SEC_CARVEOUT_SIZE_MB) = params->McSecCarveoutSizeMb; - MAKE_MC_REG(MC_MTS_CARVEOUT_BOM) = params->McMtsCarveoutBom; - MAKE_MC_REG(MC_MTS_CARVEOUT_ADR_HI) = params->McMtsCarveoutAdrHi; - MAKE_MC_REG(MC_MTS_CARVEOUT_SIZE_MB) = params->McMtsCarveoutSizeMb; - MAKE_MC_REG(MC_EMEM_ARB_CFG) = params->McEmemArbCfg; - MAKE_MC_REG(MC_EMEM_ARB_OUTSTANDING_REQ) = params->McEmemArbOutstandingReq; - MAKE_MC_REG(MC_EMEM_ARB_REFPB_HP_CTRL) = params->McEmemArbRefpbHpCtrl; - MAKE_MC_REG(MC_EMEM_ARB_REFPB_BANK_CTRL) = params->McEmemArbRefpbBankCtrl; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RCD) = params->McEmemArbTimingRcd; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RP) = params->McEmemArbTimingRp; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RC) = params->McEmemArbTimingRc; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RAS) = params->McEmemArbTimingRas; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_FAW) = params->McEmemArbTimingFaw; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RRD) = params->McEmemArbTimingRrd; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RAP2PRE) = params->McEmemArbTimingRap2Pre; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_WAP2PRE) = params->McEmemArbTimingWap2Pre; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_R2R) = params->McEmemArbTimingR2R; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_W2W) = params->McEmemArbTimingW2W; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_CCDMW) = params->McEmemArbTimingCcdmw; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_R2W) = params->McEmemArbTimingR2W; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_W2R) = params->McEmemArbTimingW2R; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RFCPB) = params->McEmemArbTimingRFCPB; - MAKE_MC_REG(MC_EMEM_ARB_DA_TURNS) = params->McEmemArbDaTurns; - MAKE_MC_REG(MC_EMEM_ARB_DA_COVERS) = params->McEmemArbDaCovers; - MAKE_MC_REG(MC_EMEM_ARB_MISC0) = params->McEmemArbMisc0; - MAKE_MC_REG(MC_EMEM_ARB_MISC1) = params->McEmemArbMisc1; - MAKE_MC_REG(MC_EMEM_ARB_MISC2) = params->McEmemArbMisc2; - MAKE_MC_REG(MC_EMEM_ARB_RING1_THROTTLE) = params->McEmemArbRing1Throttle; - MAKE_MC_REG(MC_EMEM_ARB_OVERRIDE) = params->McEmemArbOverride; - MAKE_MC_REG(MC_EMEM_ARB_OVERRIDE_1) = params->McEmemArbOverride1; - MAKE_MC_REG(MC_EMEM_ARB_RSV) = params->McEmemArbRsv; - MAKE_MC_REG(MC_DA_CONFIG0) = params->McDaCfg0; - MAKE_MC_REG(MC_TIMING_CONTROL) = 1; - MAKE_MC_REG(MC_CLKEN_OVERRIDE) = params->McClkenOverride; - MAKE_MC_REG(MC_STAT_CONTROL) = params->McStatControl; - - MAKE_EMC_REG(EMC_ADR_CFG) = params->EmcAdrCfg; - MAKE_EMC_REG(EMC_CLKEN_OVERRIDE) = params->EmcClkenOverride; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_0) = params->EmcPmacroAutocalCfg0; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_1) = params->EmcPmacroAutocalCfg1; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_2) = params->EmcPmacroAutocalCfg2; - MAKE_EMC_REG(EMC_AUTO_CAL_VREF_SEL_0) = params->EmcAutoCalVrefSel0; - MAKE_EMC_REG(EMC_AUTO_CAL_VREF_SEL_1) = params->EmcAutoCalVrefSel1; - MAKE_EMC_REG(EMC_AUTO_CAL_INTERVAL) = params->EmcAutoCalInterval; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG) = params->EmcAutoCalConfig; - udelay(params->EmcAutoCalWait); - - if (params->EmcBctSpare8) { - *(volatile uint32_t *)params->EmcBctSpare8 = params->EmcBctSpare9; - } - - MAKE_EMC_REG(EMC_CFG_2) = params->EmcCfg2; - MAKE_EMC_REG(EMC_CFG_PIPE) = params->EmcCfgPipe; - MAKE_EMC_REG(EMC_CFG_PIPE_1) = params->EmcCfgPipe1; - MAKE_EMC_REG(EMC_CFG_PIPE_2) = params->EmcCfgPipe2; - MAKE_EMC_REG(EMC_CMDQ) = params->EmcCmdQ; - MAKE_EMC_REG(EMC_MC2EMCQ) = params->EmcMc2EmcQ; - MAKE_EMC_REG(EMC_MRS_WAIT_CNT) = params->EmcMrsWaitCnt; - MAKE_EMC_REG(EMC_MRS_WAIT_CNT2) = params->EmcMrsWaitCnt2; - MAKE_EMC_REG(EMC_FBIO_CFG5) = params->EmcFbioCfg5; - MAKE_EMC_REG(EMC_RC) = params->EmcRc; - MAKE_EMC_REG(EMC_RFC) = params->EmcRfc; - MAKE_EMC_REG(EMC_RFCPB) = params->EmcRfcPb; - MAKE_EMC_REG(EMC_REFCTRL2) = params->EmcRefctrl2; - MAKE_EMC_REG(EMC_RFC_SLR) = params->EmcRfcSlr; - MAKE_EMC_REG(EMC_RAS) = params->EmcRas; - MAKE_EMC_REG(EMC_RP) = params->EmcRp; - MAKE_EMC_REG(EMC_TPPD) = params->EmcTppd; - MAKE_EMC_REG(EMC_R2R) = params->EmcR2r; - MAKE_EMC_REG(EMC_W2W) = params->EmcW2w; - MAKE_EMC_REG(EMC_R2W) = params->EmcR2w; - MAKE_EMC_REG(EMC_W2R) = params->EmcW2r; - MAKE_EMC_REG(EMC_R2P) = params->EmcR2p; - MAKE_EMC_REG(EMC_W2P) = params->EmcW2p; - MAKE_EMC_REG(EMC_CCDMW) = params->EmcCcdmw; - MAKE_EMC_REG(EMC_RD_RCD) = params->EmcRdRcd; - MAKE_EMC_REG(EMC_WR_RCD) = params->EmcWrRcd; - MAKE_EMC_REG(EMC_RRD) = params->EmcRrd; - MAKE_EMC_REG(EMC_REXT) = params->EmcRext; - MAKE_EMC_REG(EMC_WEXT) = params->EmcWext; - MAKE_EMC_REG(EMC_WDV) = params->EmcWdv; - MAKE_EMC_REG(EMC_WDV_CHK) = params->EmcWdvChk; - MAKE_EMC_REG(EMC_WSV) = params->EmcWsv; - MAKE_EMC_REG(EMC_WEV) = params->EmcWev; - MAKE_EMC_REG(EMC_WDV_MASK) = params->EmcWdvMask; - MAKE_EMC_REG(EMC_WS_DURATION) = params->EmcWsDuration; - MAKE_EMC_REG(EMC_WE_DURATION) = params->EmcWeDuration; - MAKE_EMC_REG(EMC_QUSE) = params->EmcQUse; - MAKE_EMC_REG(EMC_QUSE_WIDTH) = params->EmcQuseWidth; - MAKE_EMC_REG(EMC_IBDLY) = params->EmcIbdly; - MAKE_EMC_REG(EMC_OBDLY) = params->EmcObdly; - MAKE_EMC_REG(EMC_EINPUT) = params->EmcEInput; - MAKE_EMC_REG(EMC_EINPUT_DURATION) = params->EmcEInputDuration; - MAKE_EMC_REG(EMC_PUTERM_EXTRA) = params->EmcPutermExtra; - MAKE_EMC_REG(EMC_PUTERM_WIDTH) = params->EmcPutermWidth; - MAKE_EMC_REG(EMC_PMACRO_COMMON_PAD_TX_CTRL) = params->EmcPmacroCommonPadTxCtrl; - MAKE_EMC_REG(EMC_DBG) = params->EmcDbg; - MAKE_EMC_REG(EMC_QRST) = params->EmcQRst; - MAKE_EMC_REG(EMC_ISSUE_QRST) = 0; - MAKE_EMC_REG(EMC_QSAFE) = params->EmcQSafe; - MAKE_EMC_REG(EMC_RDV) = params->EmcRdv; - MAKE_EMC_REG(EMC_RDV_MASK) = params->EmcRdvMask; - MAKE_EMC_REG(EMC_RDV_EARLY) = params->EmcRdvEarly; - MAKE_EMC_REG(EMC_RDV_EARLY_MASK) = params->EmcRdvEarlyMask; - MAKE_EMC_REG(EMC_QPOP) = params->EmcQpop; - MAKE_EMC_REG(EMC_REFRESH) = params->EmcRefresh; - MAKE_EMC_REG(EMC_BURST_REFRESH_NUM) = params->EmcBurstRefreshNum; - MAKE_EMC_REG(EMC_PRE_REFRESH_REQ_CNT) = params->EmcPreRefreshReqCnt; - MAKE_EMC_REG(EMC_PDEX2WR) = params->EmcPdEx2Wr; - MAKE_EMC_REG(EMC_PDEX2RD) = params->EmcPdEx2Rd; - MAKE_EMC_REG(EMC_PCHG2PDEN) = params->EmcPChg2Pden; - MAKE_EMC_REG(EMC_ACT2PDEN) = params->EmcAct2Pden; - MAKE_EMC_REG(EMC_AR2PDEN) = params->EmcAr2Pden; - MAKE_EMC_REG(EMC_RW2PDEN) = params->EmcRw2Pden; - MAKE_EMC_REG(EMC_CKE2PDEN) = params->EmcCke2Pden; - MAKE_EMC_REG(EMC_PDEX2CKE) = params->EmcPdex2Cke; - MAKE_EMC_REG(EMC_PDEX2MRR) = params->EmcPdex2Mrr; - MAKE_EMC_REG(EMC_TXSR) = params->EmcTxsr; - MAKE_EMC_REG(EMC_TXSRDLL) = params->EmcTxsrDll; - MAKE_EMC_REG(EMC_TCKE) = params->EmcTcke; - MAKE_EMC_REG(EMC_TCKESR) = params->EmcTckesr; - MAKE_EMC_REG(EMC_TPD) = params->EmcTpd; - MAKE_EMC_REG(EMC_TFAW) = params->EmcTfaw; - MAKE_EMC_REG(EMC_TRPAB) = params->EmcTrpab; - MAKE_EMC_REG(EMC_TCLKSTABLE) = params->EmcTClkStable; - MAKE_EMC_REG(EMC_TCLKSTOP) = params->EmcTClkStop; - MAKE_EMC_REG(EMC_TREFBW) = params->EmcTRefBw; - MAKE_EMC_REG(EMC_ODT_WRITE) = params->EmcOdtWrite; - MAKE_EMC_REG(EMC_CFG_DIG_DLL) = params->EmcCfgDigDll; - MAKE_EMC_REG(EMC_CFG_DIG_DLL_PERIOD) = params->EmcCfgDigDllPeriod; - MAKE_EMC_REG(EMC_FBIO_SPARE) = params->EmcFbioSpare & 0xFFFFFFFD; - MAKE_EMC_REG(EMC_CFG_RSV) = params->EmcCfgRsv; - MAKE_EMC_REG(EMC_PMC_SCRATCH1) = params->EmcPmcScratch1; - MAKE_EMC_REG(EMC_PMC_SCRATCH2) = params->EmcPmcScratch2; - MAKE_EMC_REG(EMC_PMC_SCRATCH3) = params->EmcPmcScratch3; - MAKE_EMC_REG(EMC_ACPD_CONTROL) = params->EmcAcpdControl; - MAKE_EMC_REG(EMC_TXDSRVTTGEN) = params->EmcTxdsrvttgen; - MAKE_EMC_REG(EMC_CFG) = (params->EmcCfg & 0xE) | 0x3C00000; - - if (params->BootRomPatchControl & 0x80000000) { - *(volatile uint32_t *)(4 * (params->BootRomPatchControl + 0x1C000000)) = params->BootRomPatchData; - MAKE_MC_REG(MC_TIMING_CONTROL) = 1; - } - - pmc->io_dpd3_req = (((4 * params->EmcPmcScratch1 >> 2) + 0x40000000) & 0xCFFF0000); - udelay(params->PmcIoDpd3ReqWait); - - if (!params->EmcAutoCalInterval) { - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG) = (params->EmcAutoCalConfig | 0x200); - } - - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU2) = params->EmcPmacroBrickCtrlRfu2; - - if (params->EmcZcalWarmColdBootEnables & 1) { - if (params->MemoryType == NvBootMemoryType_Ddr3) { - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = (8 * params->EmcZcalWaitCnt); - } else if (params->MemoryType == NvBootMemoryType_LpDdr4) { - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = params->EmcZcalWaitCnt; - MAKE_EMC_REG(EMC_ZCAL_MRW_CMD) = params->EmcZcalMrwCmd; - } - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - udelay(params->EmcTimingControlWait); - - pmc->ddr_cntrl &= 0xFFF8007F; - udelay(params->PmcDdrCntrlWait); - - MAKE_EMC_REG(EMC_PIN) = (params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12); - udelay(params->EmcPinExtraWait + 200); - MAKE_EMC_REG(EMC_PIN) = ((params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12)) + 256; - - if (params->MemoryType == NvBootMemoryType_Ddr3) { - udelay(params->EmcPinExtraWait + 500); - } else if (params->MemoryType == NvBootMemoryType_LpDdr4) { - udelay(params->EmcPinExtraWait + 2000); - } - - MAKE_EMC_REG(EMC_PIN) = (((params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12)) + 0x101); - udelay(params->EmcPinProgramWait); - - if (params->MemoryType != NvBootMemoryType_LpDdr4) { - MAKE_EMC_REG(EMC_NOP) = (params->EmcDevSelect << 30) + 1; - if (params->MemoryType == NvBootMemoryType_LpDdr2) { - udelay(params->EmcPinExtraWait + 200); - } - } else { - if (params->EmcBctSpare10) { - *(volatile uint32_t *)params->EmcBctSpare10 = params->EmcBctSpare11; - } - - MAKE_EMC_REG(EMC_MRW2) = params->EmcMrw2; - MAKE_EMC_REG(EMC_MRW) = params->EmcMrw1; - MAKE_EMC_REG(EMC_MRW3) = params->EmcMrw3; - MAKE_EMC_REG(EMC_MRW4) = params->EmcMrw4; - MAKE_EMC_REG(EMC_MRW6) = params->EmcMrw6; - MAKE_EMC_REG(EMC_MRW14) = params->EmcMrw14; - MAKE_EMC_REG(EMC_MRW8) = params->EmcMrw8; - MAKE_EMC_REG(EMC_MRW12) = params->EmcMrw12; - MAKE_EMC_REG(EMC_MRW9) = params->EmcMrw9; - MAKE_EMC_REG(EMC_MRW13) = params->EmcMrw13; - - if (params->EmcZcalWarmColdBootEnables & 1) { - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev0; - udelay(params->EmcZcalInitWait); - MAKE_EMC_REG(EMC_ZQ_CAL) = (params->EmcZcalInitDev0 ^ 3); - - if (!(params->EmcDevSelect & 2)) { - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev1; - udelay(params->EmcZcalInitWait); - MAKE_EMC_REG(EMC_ZQ_CAL) = (params->EmcZcalInitDev1 ^ 3); - } - } - } - - pmc->ddr_cfg = params->PmcDdrCfg; - if ((params->MemoryType == NvBootMemoryType_LpDdr2) - || (params->MemoryType == NvBootMemoryType_Ddr3) - || (params->MemoryType == NvBootMemoryType_LpDdr4)) { - MAKE_EMC_REG(EMC_ZCAL_INTERVAL) = params->EmcZcalInterval; - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = params->EmcZcalWaitCnt; - MAKE_EMC_REG(EMC_ZCAL_MRW_CMD) = params->EmcZcalMrwCmd; - } - - if (params->EmcBctSpare12) { - *(volatile uint32_t *)params->EmcBctSpare12 = params->EmcBctSpare13; - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - - if (params->EmcExtraRefreshNum) { - MAKE_EMC_REG(EMC_REF) = (((1 << params->EmcExtraRefreshNum << 8) - 0xFD) | (params->EmcPinGpio << 30)); - } - - MAKE_EMC_REG(EMC_REFCTRL) = (params->EmcDevSelect | 0x80000000); - MAKE_EMC_REG(EMC_DYN_SELF_REF_CONTROL) = params->EmcDynSelfRefControl; - MAKE_EMC_REG(EMC_CFG_UPDATE) = params->EmcCfgUpdate; - MAKE_EMC_REG(EMC_CFG) = params->EmcCfg; - MAKE_EMC_REG(EMC_FDPD_CTRL_DQ) = params->EmcFdpdCtrlDq; - MAKE_EMC_REG(EMC_FDPD_CTRL_CMD) = params->EmcFdpdCtrlCmd; - MAKE_EMC_REG(EMC_SEL_DPD_CTRL) = params->EmcSelDpdCtrl; - MAKE_EMC_REG(EMC_FBIO_SPARE) = (params->EmcFbioSpare | 2); - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - MAKE_EMC_REG(EMC_CFG_PIPE_CLK) = params->EmcCfgPipeClk; - MAKE_EMC_REG(EMC_FDPD_CTRL_CMD_NO_RAMP) = params->EmcFdpdCtrlCmdNoRamp; - - AHB_ARBITRATION_XBAR_CTRL_0 = ((AHB_ARBITRATION_XBAR_CTRL_0 & 0xFFFEFFFF) | ((params->AhbArbitrationXbarCtrlMemInitDone & 0xFFFF) << 16)); - - MAKE_MC_REG(MC_VIDEO_PROTECT_REG_CTRL) = params->McVideoProtectWriteAccess; - MAKE_MC_REG(MC_SEC_CARVEOUT_REG_CTRL) = params->McSecCarveoutProtectWriteAccess; - MAKE_MC_REG(MC_MTS_CARVEOUT_REG_CTRL) = params->McMtsCarveoutRegCtrl; - MAKE_MC_REG(MC_EMEM_CFG_ACCESS_CTRL) = 1; -} - -static void sdram_config_mariko(const sdram_params_mariko_t *params) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - - if (params->EmcBctSpare0) { - *(volatile uint32_t *)params->EmcBctSpare0 = params->EmcBctSpare1; - } - - if (params->ClkRstControllerPllmMisc2OverrideEnable) { - car->pllm_misc2 = params->ClkRstControllerPllmMisc2Override; - } - - pmc->weak_bias = ((~params->EmcPmcScratch1 & 0x1000) << 19) | ((~params->EmcPmcScratch1 & 0xFFF) << 18) | ((~params->EmcPmcScratch1 & 0x8000) << 15); - pmc->io_dpd3_req = (~params->EmcPmcScratch1 & 0x9FFF) + 0x80000000; - udelay(params->PmcIoDpd3ReqWait); - pmc->io_dpd4_req = (~params->EmcPmcScratch2 & 0x3FFF0000) | 0x80000000; - udelay(params->PmcIoDpd4ReqWait); - pmc->io_dpd4_req = (~params->EmcPmcScratch2 & 0x1FFF) | 0x80000000; - udelay(1); - - MAKE_EMC_REG(EMC_FBIO_CFG7) = params->EmcFbioCfg7; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_0) = params->EmcCmdMappingCmd0_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_1) = params->EmcCmdMappingCmd0_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD0_2) = params->EmcCmdMappingCmd0_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_0) = params->EmcCmdMappingCmd1_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_1) = params->EmcCmdMappingCmd1_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD1_2) = params->EmcCmdMappingCmd1_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_0) = params->EmcCmdMappingCmd2_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_1) = params->EmcCmdMappingCmd2_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD2_2) = params->EmcCmdMappingCmd2_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_0) = params->EmcCmdMappingCmd3_0; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_1) = params->EmcCmdMappingCmd3_1; - MAKE_EMC_REG(EMC_CMD_MAPPING_CMD3_2) = params->EmcCmdMappingCmd3_2; - MAKE_EMC_REG(EMC_CMD_MAPPING_BYTE) = params->EmcCmdMappingByte; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_0) = params->EmcPmacroBrickMapping0; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_1) = params->EmcPmacroBrickMapping1; - MAKE_EMC_REG(EMC_PMACRO_BRICK_MAPPING_2) = params->EmcPmacroBrickMapping2; - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_0) = params->EmcPmacroVttgenCtrl0; - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_1) = params->EmcPmacroVttgenCtrl1; - MAKE_EMC_REG(EMC_PMACRO_VTTGEN_CTRL_2) = params->EmcPmacroVttgenCtrl2; - MAKE_EMC_REG(EMC_PMACRO_BG_BIAS_CTRL_0) = params->EmcPmacroBgBiasCtrl0; - - if (params->EmcBctSpareSecure0) { - *(volatile uint32_t *)params->EmcBctSpareSecure0 = params->EmcBctSpareSecure1; - } - if (params->EmcBctSpareSecure2) { - *(volatile uint32_t *)params->EmcBctSpareSecure2 = params->EmcBctSpareSecure3; - } - if (params->EmcBctSpareSecure4) { - *(volatile uint32_t *)params->EmcBctSpareSecure4 = params->EmcBctSpareSecure5; - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - udelay(params->PmcVddpSelWait + 2); - car->clk_source_emc = params->EmcClockSource; - car->clk_source_emc_dll = params->EmcClockSourceDll; - MAKE_EMC_REG(EMC_DBG) = params->EmcDbg | (2 * params->EmcDbgWriteMux); - - if (params->EmcBctSpare2) { - *(volatile uint32_t *)params->EmcBctSpare2 = params->EmcBctSpare3; - } - - MAKE_EMC_REG(EMC_CONFIG_SAMPLE_DELAY) = params->EmcConfigSampleDelay; - MAKE_EMC_REG(EMC_FBIO_CFG8) = params->EmcFbioCfg8; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE0) = params->EmcSwizzleRank0Byte0; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE1) = params->EmcSwizzleRank0Byte1; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE2) = params->EmcSwizzleRank0Byte2; - MAKE_EMC_REG(EMC_SWIZZLE_RANK0_BYTE3) = params->EmcSwizzleRank0Byte3; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE0) = params->EmcSwizzleRank1Byte0; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE1) = params->EmcSwizzleRank1Byte1; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE2) = params->EmcSwizzleRank1Byte2; - MAKE_EMC_REG(EMC_SWIZZLE_RANK1_BYTE3) = params->EmcSwizzleRank1Byte3; - - if (params->EmcBctSpare6) { - *(volatile uint32_t *)params->EmcBctSpare6 = params->EmcBctSpare7; - } - - MAKE_EMC_REG(EMC_XM2COMPPADCTRL) = params->EmcXm2CompPadCtrl; - MAKE_EMC_REG(EMC_XM2COMPPADCTRL2) = params->EmcXm2CompPadCtrl2; - MAKE_EMC_REG(EMC_XM2COMPPADCTRL3) = params->EmcXm2CompPadCtrl3; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG2) = params->EmcAutoCalConfig2; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG3) = params->EmcAutoCalConfig3; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG4) = params->EmcAutoCalConfig4; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG5) = params->EmcAutoCalConfig5; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG6) = params->EmcAutoCalConfig6; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG7) = params->EmcAutoCalConfig7; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG8) = params->EmcAutoCalConfig8; - MAKE_EMC_REG(EMC_PMACRO_RX_TERM) = params->EmcPmacroRxTerm; - MAKE_EMC_REG(EMC_PMACRO_DQ_TX_DRV) = params->EmcPmacroDqTxDrv; - MAKE_EMC_REG(EMC_PMACRO_CA_TX_DRV) = params->EmcPmacroCaTxDrv; - MAKE_EMC_REG(EMC_PMACRO_CMD_TX_DRV) = params->EmcPmacroCmdTxDrv; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_COMMON) = params->EmcPmacroAutocalCfgCommon; - MAKE_EMC_REG(EMC_AUTO_CAL_CHANNEL) = params->EmcAutoCalChannel; - MAKE_EMC_REG(EMC_PMACRO_ZCTRL) = params->EmcPmacroZctrl; - MAKE_EMC_REG(EMC_DLL_CFG_0) = params->EmcPmacroDllCfg0; - MAKE_EMC_REG(EMC_DLL_CFG_1) = params->EmcPmacroDllCfg1; - MAKE_EMC_REG(EMC_CFG_DIG_DLL_1) = params->EmcCfgDigDll_1; - MAKE_EMC_REG(EMC_DATA_BRLSHFT_0) = params->EmcDataBrlshft0; - MAKE_EMC_REG(EMC_DATA_BRLSHFT_1) = params->EmcDataBrlshft1; - MAKE_EMC_REG(EMC_DQS_BRLSHFT_0) = params->EmcDqsBrlshft0; - MAKE_EMC_REG(EMC_DQS_BRLSHFT_1) = params->EmcDqsBrlshft1; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_0) = params->EmcCmdBrlshft0; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_1) = params->EmcCmdBrlshft1; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_2) = params->EmcCmdBrlshft2; - MAKE_EMC_REG(EMC_CMD_BRLSHFT_3) = params->EmcCmdBrlshft3; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_0) = params->EmcQuseBrlshft0; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_1) = params->EmcQuseBrlshft1; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_2) = params->EmcQuseBrlshft2; - MAKE_EMC_REG(EMC_QUSE_BRLSHFT_3) = params->EmcQuseBrlshft3; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU1) = params->EmcPmacroBrickCtrlRfu1; - MAKE_EMC_REG(EMC_PMACRO_PAD_CFG_CTRL) = params->EmcPmacroPadCfgCtrl; - MAKE_EMC_REG(EMC_PMACRO_CMD_BRICK_CTRL_FDPD) = params->EmcPmacroCmdBrickCtrlFdpd; - MAKE_EMC_REG(EMC_PMACRO_BRICK_CTRL_RFU2) = params->EmcPmacroBrickCtrlRfu2; - MAKE_EMC_REG(EMC_PMACRO_DATA_BRICK_CTRL_FDPD) = params->EmcPmacroDataBrickCtrlFdpd; - MAKE_EMC_REG(EMC_PMACRO_DATA_PAD_RX_CTRL) = params->EmcPmacroDataPadRxCtrl; - MAKE_EMC_REG(EMC_PMACRO_CMD_PAD_RX_CTRL) = params->EmcPmacroCmdPadRxCtrl; - MAKE_EMC_REG(EMC_PMACRO_DATA_PAD_TX_CTRL) = params->EmcPmacroDataPadTxCtrl; - MAKE_EMC_REG(EMC_PMACRO_DATA_RX_TERM_MODE) = params->EmcPmacroDataRxTermMode; - MAKE_EMC_REG(EMC_PMACRO_CMD_RX_TERM_MODE) = params->EmcPmacroCmdRxTermMode; - MAKE_EMC_REG(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->EmcPmacroCmdPadTxCtrl & 0xEFFFFFFF; - MAKE_EMC_REG(EMC_CFG_3) = params->EmcCfg3; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_0) = params->EmcPmacroTxPwrd0; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_1) = params->EmcPmacroTxPwrd1; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_2) = params->EmcPmacroTxPwrd2; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_3) = params->EmcPmacroTxPwrd3; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_4) = params->EmcPmacroTxPwrd4; - MAKE_EMC_REG(EMC_PMACRO_TX_PWRD_5) = params->EmcPmacroTxPwrd5; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_0) = params->EmcPmacroTxSelClkSrc0; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_1) = params->EmcPmacroTxSelClkSrc1; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_2) = params->EmcPmacroTxSelClkSrc2; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_3) = params->EmcPmacroTxSelClkSrc3; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_4) = params->EmcPmacroTxSelClkSrc4; - MAKE_EMC_REG(EMC_PMACRO_TX_SEL_CLK_SRC_5) = params->EmcPmacroTxSelClkSrc5; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_0) = params->EmcPmacroPerbitFgcgCtrl0; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_1) = params->EmcPmacroPerbitFgcgCtrl1; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_2) = params->EmcPmacroPerbitFgcgCtrl2; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_3) = params->EmcPmacroPerbitFgcgCtrl3; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_4) = params->EmcPmacroPerbitFgcgCtrl4; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_FGCG_CTRL_5) = params->EmcPmacroPerbitFgcgCtrl5; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_0) = params->EmcPmacroPerbitRfuCtrl0; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_1) = params->EmcPmacroPerbitRfuCtrl1; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_2) = params->EmcPmacroPerbitRfuCtrl2; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_3) = params->EmcPmacroPerbitRfuCtrl3; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_4) = params->EmcPmacroPerbitRfuCtrl4; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU_CTRL_5) = params->EmcPmacroPerbitRfuCtrl5; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_0) = params->EmcPmacroPerbitRfu1Ctrl0; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_1) = params->EmcPmacroPerbitRfu1Ctrl1; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_2) = params->EmcPmacroPerbitRfu1Ctrl2; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_3) = params->EmcPmacroPerbitRfu1Ctrl3; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_4) = params->EmcPmacroPerbitRfu1Ctrl4; - MAKE_EMC_REG(EMC_PMACRO_PERBIT_RFU1_CTRL_5) = params->EmcPmacroPerbitRfu1Ctrl5; - MAKE_EMC_REG(EMC_PMACRO_DATA_PI_CTRL) = params->EmcPmacroDataPiCtrl; - MAKE_EMC_REG(EMC_PMACRO_CMD_PI_CTRL) = params->EmcPmacroCmdPiCtrl; - MAKE_EMC_REG(EMC_PMACRO_DDLL_BYPASS) = params->EmcPmacroDdllBypass; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_0) = params->EmcPmacroDdllPwrd0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_1) = params->EmcPmacroDdllPwrd1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PWRD_2) = params->EmcPmacroDdllPwrd2; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_0) = params->EmcPmacroCmdCtrl0; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_1) = params->EmcPmacroCmdCtrl1; - MAKE_EMC_REG(EMC_PMACRO_CMD_CTRL_2) = params->EmcPmacroCmdCtrl2; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQ_0) = params->EmcPmacroIbVrefDq_0; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQ_1) = params->EmcPmacroIbVrefDq_1; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQS_0) = params->EmcPmacroIbVrefDqs_0; - MAKE_EMC_REG(EMC_PMACRO_IB_VREF_DQS_1) = params->EmcPmacroIbVrefDqs_1; - MAKE_EMC_REG(EMC_PMACRO_IB_RXRT) = params->EmcPmacroIbRxrt; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_0) = params->EmcPmacroQuseDdllRank0_0; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_1) = params->EmcPmacroQuseDdllRank0_1; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_2) = params->EmcPmacroQuseDdllRank0_2; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_3) = params->EmcPmacroQuseDdllRank0_3; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_4) = params->EmcPmacroQuseDdllRank0_4; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK0_5) = params->EmcPmacroQuseDdllRank0_5; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_0) = params->EmcPmacroQuseDdllRank1_0; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_1) = params->EmcPmacroQuseDdllRank1_1; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_2) = params->EmcPmacroQuseDdllRank1_2; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_3) = params->EmcPmacroQuseDdllRank1_3; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_4) = params->EmcPmacroQuseDdllRank1_4; - MAKE_EMC_REG(EMC_PMACRO_QUSE_DDLL_RANK1_5) = params->EmcPmacroQuseDdllRank1_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0) = params->EmcPmacroObDdllLongDqRank0_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1) = params->EmcPmacroObDdllLongDqRank0_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) = params->EmcPmacroObDdllLongDqRank0_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3) = params->EmcPmacroObDdllLongDqRank0_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4) = params->EmcPmacroObDdllLongDqRank0_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5) = params->EmcPmacroObDdllLongDqRank0_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0) = params->EmcPmacroObDdllLongDqRank1_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1) = params->EmcPmacroObDdllLongDqRank1_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2) = params->EmcPmacroObDdllLongDqRank1_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3) = params->EmcPmacroObDdllLongDqRank1_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4) = params->EmcPmacroObDdllLongDqRank1_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5) = params->EmcPmacroObDdllLongDqRank1_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0) = params->EmcPmacroObDdllLongDqsRank0_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1) = params->EmcPmacroObDdllLongDqsRank0_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2) = params->EmcPmacroObDdllLongDqsRank0_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3) = params->EmcPmacroObDdllLongDqsRank0_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4) = params->EmcPmacroObDdllLongDqsRank0_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5) = params->EmcPmacroObDdllLongDqsRank0_5; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0) = params->EmcPmacroObDdllLongDqsRank1_0; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1) = params->EmcPmacroObDdllLongDqsRank1_1; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2) = params->EmcPmacroObDdllLongDqsRank1_2; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3) = params->EmcPmacroObDdllLongDqsRank1_3; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4) = params->EmcPmacroObDdllLongDqsRank1_4; - MAKE_EMC_REG(EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5) = params->EmcPmacroObDdllLongDqsRank1_5; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0) = params->EmcPmacroIbDdllLongDqsRank0_0; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1) = params->EmcPmacroIbDdllLongDqsRank0_1; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2) = params->EmcPmacroIbDdllLongDqsRank0_2; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3) = params->EmcPmacroIbDdllLongDqsRank0_3; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0) = params->EmcPmacroIbDdllLongDqsRank1_0; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1) = params->EmcPmacroIbDdllLongDqsRank1_1; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) = params->EmcPmacroIbDdllLongDqsRank1_2; - MAKE_EMC_REG(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) = params->EmcPmacroIbDdllLongDqsRank1_3; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_0) = params->EmcPmacroDdllLongCmd_0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_1) = params->EmcPmacroDdllLongCmd_1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_2) = params->EmcPmacroDdllLongCmd_2; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_3) = params->EmcPmacroDdllLongCmd_3; - MAKE_EMC_REG(EMC_PMACRO_DDLL_LONG_CMD_4) = params->EmcPmacroDdllLongCmd_4; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_0) = params->EmcPmacroDdllShortCmd_0; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_1) = params->EmcPmacroDdllShortCmd_1; - MAKE_EMC_REG(EMC_PMACRO_DDLL_SHORT_CMD_2) = params->EmcPmacroDdllShortCmd_2; - MAKE_EMC_REG(EMC_PMACRO_DDLL_PERIODIC_OFFSET) = params->EmcPmacroDdllPeriodicOffset; - - if (params->EmcBctSpare4) { - *(volatile uint32_t *)params->EmcBctSpare4 = params->EmcBctSpare5; - } - if (params->EmcBctSpareSecure6) { - *(volatile uint32_t *)params->EmcBctSpareSecure6 = params->EmcBctSpareSecure7; - } - if (params->EmcBctSpareSecure8) { - *(volatile uint32_t *)params->EmcBctSpareSecure8 = params->EmcBctSpareSecure9; - } - if (params->EmcBctSpareSecure10) { - *(volatile uint32_t *)params->EmcBctSpareSecure10 = params->EmcBctSpareSecure11; - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM) = params->McVideoProtectBom; - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM_ADR_HI) = params->McVideoProtectBomAdrHi; - MAKE_MC_REG(MC_VIDEO_PROTECT_SIZE_MB) = params->McVideoProtectSizeMb; - MAKE_MC_REG(MC_VIDEO_PROTECT_VPR_OVERRIDE) = params->McVideoProtectVprOverride; - MAKE_MC_REG(MC_VIDEO_PROTECT_VPR_OVERRIDE1) = params->McVideoProtectVprOverride1; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = params->McVideoProtectGpuOverride0; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = params->McVideoProtectGpuOverride1; - MAKE_MC_REG(MC_EMEM_ADR_CFG) = params->McEmemAdrCfg; - MAKE_MC_REG(MC_EMEM_ADR_CFG_DEV0) = params->McEmemAdrCfgDev0; - MAKE_MC_REG(MC_EMEM_ADR_CFG_DEV1) = params->McEmemAdrCfgDev1; - MAKE_MC_REG(MC_EMEM_ADR_CFG_CHANNEL_MASK) = params->McEmemAdrCfgChannelMask; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_0) = params->McEmemAdrCfgBankMask0; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_1) = params->McEmemAdrCfgBankMask1; - MAKE_MC_REG(MC_EMEM_ADR_CFG_BANK_MASK_2) = params->McEmemAdrCfgBankMask2; - MAKE_MC_REG(MC_EMEM_CFG) = params->McEmemCfg; - MAKE_MC_REG(MC_SEC_CARVEOUT_BOM) = params->McSecCarveoutBom; - MAKE_MC_REG(MC_SEC_CARVEOUT_ADR_HI) = params->McSecCarveoutAdrHi; - MAKE_MC_REG(MC_SEC_CARVEOUT_SIZE_MB) = params->McSecCarveoutSizeMb; - MAKE_MC_REG(MC_MTS_CARVEOUT_BOM) = params->McMtsCarveoutBom; - MAKE_MC_REG(MC_MTS_CARVEOUT_ADR_HI) = params->McMtsCarveoutAdrHi; - MAKE_MC_REG(MC_MTS_CARVEOUT_SIZE_MB) = params->McMtsCarveoutSizeMb; - MAKE_MC_REG(MC_EMEM_ARB_CFG) = params->McEmemArbCfg; - MAKE_MC_REG(MC_EMEM_ARB_OUTSTANDING_REQ) = params->McEmemArbOutstandingReq; - MAKE_MC_REG(MC_EMEM_ARB_REFPB_HP_CTRL) = params->McEmemArbRefpbHpCtrl; - MAKE_MC_REG(MC_EMEM_ARB_REFPB_BANK_CTRL) = params->McEmemArbRefpbBankCtrl; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RCD) = params->McEmemArbTimingRcd; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RP) = params->McEmemArbTimingRp; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RC) = params->McEmemArbTimingRc; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RAS) = params->McEmemArbTimingRas; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_FAW) = params->McEmemArbTimingFaw; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RRD) = params->McEmemArbTimingRrd; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RAP2PRE) = params->McEmemArbTimingRap2Pre; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_WAP2PRE) = params->McEmemArbTimingWap2Pre; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_R2R) = params->McEmemArbTimingR2R; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_W2W) = params->McEmemArbTimingW2W; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_CCDMW) = params->McEmemArbTimingCcdmw; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_R2W) = params->McEmemArbTimingR2W; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_W2R) = params->McEmemArbTimingW2R; - MAKE_MC_REG(MC_EMEM_ARB_TIMING_RFCPB) = params->McEmemArbTimingRFCPB; - MAKE_MC_REG(MC_EMEM_ARB_DA_TURNS) = params->McEmemArbDaTurns; - MAKE_MC_REG(MC_EMEM_ARB_DA_COVERS) = params->McEmemArbDaCovers; - MAKE_MC_REG(MC_EMEM_ARB_MISC0) = params->McEmemArbMisc0; - MAKE_MC_REG(MC_EMEM_ARB_MISC1) = params->McEmemArbMisc1; - MAKE_MC_REG(MC_EMEM_ARB_MISC2) = params->McEmemArbMisc2; - MAKE_MC_REG(MC_EMEM_ARB_RING1_THROTTLE) = params->McEmemArbRing1Throttle; - MAKE_MC_REG(MC_EMEM_ARB_OVERRIDE) = params->McEmemArbOverride; - MAKE_MC_REG(MC_EMEM_ARB_OVERRIDE_1) = params->McEmemArbOverride1; - MAKE_MC_REG(MC_EMEM_ARB_RSV) = params->McEmemArbRsv; - MAKE_MC_REG(MC_DA_CONFIG0) = params->McDaCfg0; - MAKE_MC_REG(MC_TIMING_CONTROL) = 1; - MAKE_MC_REG(MC_CLKEN_OVERRIDE) = params->McClkenOverride; - MAKE_MC_REG(MC_STAT_CONTROL) = params->McStatControl; - - MAKE_EMC_REG(EMC_ADR_CFG) = params->EmcAdrCfg; - MAKE_EMC_REG(EMC_CLKEN_OVERRIDE) = params->EmcClkenOverride; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_0) = params->EmcPmacroAutocalCfg0; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_1) = params->EmcPmacroAutocalCfg1; - MAKE_EMC_REG(EMC_PMACRO_AUTOCAL_CFG_2) = params->EmcPmacroAutocalCfg2; - MAKE_EMC_REG(EMC_AUTO_CAL_VREF_SEL_0) = params->EmcAutoCalVrefSel0; - MAKE_EMC_REG(EMC_AUTO_CAL_VREF_SEL_1) = params->EmcAutoCalVrefSel1; - MAKE_EMC_REG(EMC_AUTO_CAL_INTERVAL) = params->EmcAutoCalInterval; - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG) = params->EmcAutoCalConfig; - udelay(params->EmcAutoCalWait); - - if (params->EmcBctSpare8) { - *(volatile uint32_t *)params->EmcBctSpare8 = params->EmcBctSpare9; - } - - MAKE_EMC_REG(EMC_AUTO_CAL_CONFIG9) = params->EmcAutoCalConfig9; - MAKE_EMC_REG(EMC_CFG_2) = params->EmcCfg2; - MAKE_EMC_REG(EMC_CFG_PIPE) = params->EmcCfgPipe; - MAKE_EMC_REG(EMC_CFG_PIPE_1) = params->EmcCfgPipe1; - MAKE_EMC_REG(EMC_CFG_PIPE_2) = params->EmcCfgPipe2; - MAKE_EMC_REG(EMC_CMDQ) = params->EmcCmdQ; - MAKE_EMC_REG(EMC_MC2EMCQ) = params->EmcMc2EmcQ; - MAKE_EMC_REG(EMC_MRS_WAIT_CNT) = params->EmcMrsWaitCnt; - MAKE_EMC_REG(EMC_MRS_WAIT_CNT2) = params->EmcMrsWaitCnt2; - MAKE_EMC_REG(EMC_FBIO_CFG5) = params->EmcFbioCfg5; - MAKE_EMC_REG(EMC_RC) = params->EmcRc; - MAKE_EMC_REG(EMC_RFC) = params->EmcRfc; - MAKE_EMC_REG(EMC_RFCPB) = params->EmcRfcPb; - MAKE_EMC_REG(EMC_REFCTRL2) = params->EmcRefctrl2; - MAKE_EMC_REG(EMC_RFC_SLR) = params->EmcRfcSlr; - MAKE_EMC_REG(EMC_RAS) = params->EmcRas; - MAKE_EMC_REG(EMC_RP) = params->EmcRp; - MAKE_EMC_REG(EMC_TPPD) = params->EmcTppd; - MAKE_EMC_REG(EMC_TRTM) = params->EmcTrtm; - MAKE_EMC_REG(EMC_TWTM) = params->EmcTwtm; - MAKE_EMC_REG(EMC_TRATM) = params->EmcTratm; - MAKE_EMC_REG(EMC_TWATM) = params->EmcTwatm; - MAKE_EMC_REG(EMC_TR2REF) = params->EmcTr2ref; - MAKE_EMC_REG(EMC_R2R) = params->EmcR2r; - MAKE_EMC_REG(EMC_W2W) = params->EmcW2w; - MAKE_EMC_REG(EMC_R2W) = params->EmcR2w; - MAKE_EMC_REG(EMC_W2R) = params->EmcW2r; - MAKE_EMC_REG(EMC_R2P) = params->EmcR2p; - MAKE_EMC_REG(EMC_W2P) = params->EmcW2p; - MAKE_EMC_REG(EMC_CCDMW) = params->EmcCcdmw; - MAKE_EMC_REG(EMC_RD_RCD) = params->EmcRdRcd; - MAKE_EMC_REG(EMC_WR_RCD) = params->EmcWrRcd; - MAKE_EMC_REG(EMC_RRD) = params->EmcRrd; - MAKE_EMC_REG(EMC_REXT) = params->EmcRext; - MAKE_EMC_REG(EMC_WEXT) = params->EmcWext; - MAKE_EMC_REG(EMC_WDV) = params->EmcWdv; - MAKE_EMC_REG(EMC_WDV_CHK) = params->EmcWdvChk; - MAKE_EMC_REG(EMC_WSV) = params->EmcWsv; - MAKE_EMC_REG(EMC_WEV) = params->EmcWev; - MAKE_EMC_REG(EMC_WDV_MASK) = params->EmcWdvMask; - MAKE_EMC_REG(EMC_WS_DURATION) = params->EmcWsDuration; - MAKE_EMC_REG(EMC_WE_DURATION) = params->EmcWeDuration; - MAKE_EMC_REG(EMC_QUSE) = params->EmcQUse; - MAKE_EMC_REG(EMC_QUSE_WIDTH) = params->EmcQuseWidth; - MAKE_EMC_REG(EMC_IBDLY) = params->EmcIbdly; - MAKE_EMC_REG(EMC_OBDLY) = params->EmcObdly; - MAKE_EMC_REG(EMC_EINPUT) = params->EmcEInput; - MAKE_EMC_REG(EMC_EINPUT_DURATION) = params->EmcEInputDuration; - MAKE_EMC_REG(EMC_PUTERM_EXTRA) = params->EmcPutermExtra; - MAKE_EMC_REG(EMC_PUTERM_WIDTH) = params->EmcPutermWidth; - MAKE_EMC_REG(EMC_DBG) = params->EmcDbg; - MAKE_EMC_REG(EMC_QRST) = params->EmcQRst; - MAKE_EMC_REG(EMC_ISSUE_QRST) = 0; - MAKE_EMC_REG(EMC_QSAFE) = params->EmcQSafe; - MAKE_EMC_REG(EMC_RDV) = params->EmcRdv; - MAKE_EMC_REG(EMC_RDV_MASK) = params->EmcRdvMask; - MAKE_EMC_REG(EMC_RDV_EARLY) = params->EmcRdvEarly; - MAKE_EMC_REG(EMC_RDV_EARLY_MASK) = params->EmcRdvEarlyMask; - MAKE_EMC_REG(EMC_QPOP) = params->EmcQpop; - MAKE_EMC_REG(EMC_REFRESH) = params->EmcRefresh; - MAKE_EMC_REG(EMC_BURST_REFRESH_NUM) = params->EmcBurstRefreshNum; - MAKE_EMC_REG(EMC_PRE_REFRESH_REQ_CNT) = params->EmcPreRefreshReqCnt; - MAKE_EMC_REG(EMC_PDEX2WR) = params->EmcPdEx2Wr; - MAKE_EMC_REG(EMC_PDEX2RD) = params->EmcPdEx2Rd; - MAKE_EMC_REG(EMC_PCHG2PDEN) = params->EmcPChg2Pden; - MAKE_EMC_REG(EMC_ACT2PDEN) = params->EmcAct2Pden; - MAKE_EMC_REG(EMC_AR2PDEN) = params->EmcAr2Pden; - MAKE_EMC_REG(EMC_RW2PDEN) = params->EmcRw2Pden; - MAKE_EMC_REG(EMC_CKE2PDEN) = params->EmcCke2Pden; - MAKE_EMC_REG(EMC_PDEX2CKE) = params->EmcPdex2Cke; - MAKE_EMC_REG(EMC_PDEX2MRR) = params->EmcPdex2Mrr; - MAKE_EMC_REG(EMC_TXSR) = params->EmcTxsr; - MAKE_EMC_REG(EMC_TXSRDLL) = params->EmcTxsrDll; - MAKE_EMC_REG(EMC_TCKE) = params->EmcTcke; - MAKE_EMC_REG(EMC_TCKESR) = params->EmcTckesr; - MAKE_EMC_REG(EMC_TPD) = params->EmcTpd; - MAKE_EMC_REG(EMC_TFAW) = params->EmcTfaw; - MAKE_EMC_REG(EMC_TRPAB) = params->EmcTrpab; - MAKE_EMC_REG(EMC_TCLKSTABLE) = params->EmcTClkStable; - MAKE_EMC_REG(EMC_TCLKSTOP) = params->EmcTClkStop; - MAKE_EMC_REG(EMC_TREFBW) = params->EmcTRefBw; - MAKE_EMC_REG(EMC_ODT_WRITE) = params->EmcOdtWrite; - MAKE_EMC_REG(EMC_CFG_DIG_DLL) = params->EmcCfgDigDll; - MAKE_EMC_REG(EMC_CFG_DIG_DLL_PERIOD) = params->EmcCfgDigDllPeriod; - MAKE_EMC_REG(EMC_FBIO_SPARE) = params->EmcFbioSpare & 0xFFFFFFFD; - MAKE_EMC_REG(EMC_CFG_RSV) = params->EmcCfgRsv; - MAKE_EMC_REG(EMC_PMC_SCRATCH1) = params->EmcPmcScratch1; - MAKE_EMC_REG(EMC_PMC_SCRATCH2) = params->EmcPmcScratch2; - MAKE_EMC_REG(EMC_PMC_SCRATCH3) = params->EmcPmcScratch3; - MAKE_EMC_REG(EMC_ACPD_CONTROL) = params->EmcAcpdControl; - MAKE_EMC_REG(EMC_TXDSRVTTGEN) = params->EmcTxdsrvttgen; - MAKE_EMC_REG(EMC_PMACRO_DSR_VTTGEN_CTRL_0) = params->EmcPmacroDsrVttgenCtrl0; - MAKE_EMC_REG(EMC_CFG) = ((((((params->EmcCfg & 4) | 0x3C00000) & 0xFFFFFFF7) | (params->EmcCfg & 8)) & 0xFFFFFFFD) | (params->EmcCfg & 2)); - - if (params->BootRomPatchControl) { - *(volatile uint32_t *)params->BootRomPatchControl = params->BootRomPatchData; - MAKE_MC_REG(MC_TIMING_CONTROL) = 1; - } - - if (params->EmcBctSpareSecure12) { - *(volatile uint32_t *)params->EmcBctSpareSecure12 = params->EmcBctSpareSecure13; - } - if (params->EmcBctSpareSecure14) { - *(volatile uint32_t *)params->EmcBctSpareSecure14 = params->EmcBctSpareSecure15; - } - if (params->EmcBctSpareSecure16) { - *(volatile uint32_t *)params->EmcBctSpareSecure16 = params->EmcBctSpareSecure17; - } - - pmc->io_dpd3_req = ((4 * params->EmcPmcScratch1 >> 2) + 0x40000000) & 0xCFFF0000; - udelay(params->PmcIoDpd3ReqWait); - MAKE_EMC_REG(EMC_PMACRO_CMD_PAD_TX_CTRL) = params->EmcPmacroCmdPadTxCtrl; - - if (params->EmcZcalWarmColdBootEnables & 1) { - if (params->MemoryType == NvBootMemoryType_Ddr3) { - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = 8 * params->EmcZcalWaitCnt; - } else if (params->MemoryType == NvBootMemoryType_LpDdr4) { - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = params->EmcZcalWaitCnt; - MAKE_EMC_REG(EMC_ZCAL_MRW_CMD) = params->EmcZcalMrwCmd; - } - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - udelay(params->EmcTimingControlWait); - - pmc->ddr_cntrl &= 0xFF78007F; - udelay(params->PmcDdrCntrlWait); - - MAKE_EMC_REG(EMC_PIN) = (params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12); - udelay(params->EmcPinExtraWait + 200); - MAKE_EMC_REG(EMC_PIN) = ((params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12)) + 256; - - if (params->MemoryType == NvBootMemoryType_Ddr3) { - udelay(params->EmcPinExtraWait + 500); - } else if (params->MemoryType == NvBootMemoryType_LpDdr4) { - udelay(params->EmcPinExtraWait + 2000); - } - - MAKE_EMC_REG(EMC_PIN) = ((params->EmcPinGpioEn << 16) | (params->EmcPinGpio << 12)) + 257; - udelay(params->EmcPinProgramWait); - - if (params->MemoryType != NvBootMemoryType_LpDdr4) { - MAKE_EMC_REG(EMC_NOP) = (params->EmcDevSelect << 30) + 1; - if (params->MemoryType == NvBootMemoryType_LpDdr2) { - udelay(params->EmcPinExtraWait + 200); - } - } else { - if (params->EmcBctSpare10) { - *(volatile uint32_t *)params->EmcBctSpare10 = params->EmcBctSpare11; - } - - MAKE_EMC_REG(EMC_MRW2) = params->EmcMrw2; - MAKE_EMC_REG(EMC_MRW) = params->EmcMrw1; - MAKE_EMC_REG(EMC_MRW3) = params->EmcMrw3; - MAKE_EMC_REG(EMC_MRW4) = params->EmcMrw4; - MAKE_EMC_REG(EMC_MRW6) = params->EmcMrw6; - MAKE_EMC_REG(EMC_MRW14) = params->EmcMrw14; - MAKE_EMC_REG(EMC_MRW8) = params->EmcMrw8; - MAKE_EMC_REG(EMC_MRW12) = params->EmcMrw12; - MAKE_EMC_REG(EMC_MRW9) = params->EmcMrw9; - MAKE_EMC_REG(EMC_MRW13) = params->EmcMrw13; - - if (params->EmcZcalWarmColdBootEnables & 1) { - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev0; - udelay(params->EmcZcalInitWait); - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev0 ^ 3; - - if (!(params->EmcDevSelect & 2)) { - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev1; - udelay(params->EmcZcalInitWait); - MAKE_EMC_REG(EMC_ZQ_CAL) = params->EmcZcalInitDev1 ^ 3; - } - } - } - - if (params->EmcBctSpareSecure18) { - *(volatile uint32_t *)params->EmcBctSpareSecure18 = params->EmcBctSpareSecure19; - } - if (params->EmcBctSpareSecure20) { - *(volatile uint32_t *)params->EmcBctSpareSecure20 = params->EmcBctSpareSecure21; - } - if (params->EmcBctSpareSecure22) { - *(volatile uint32_t *)params->EmcBctSpareSecure22 = params->EmcBctSpareSecure23; - } - - pmc->ddr_cfg = params->PmcDdrCfg; - if ((params->MemoryType == NvBootMemoryType_LpDdr2) - || (params->MemoryType == NvBootMemoryType_Ddr3) - || (params->MemoryType == NvBootMemoryType_LpDdr4)) { - MAKE_EMC_REG(EMC_ZCAL_INTERVAL) = params->EmcZcalInterval; - MAKE_EMC_REG(EMC_ZCAL_WAIT_CNT) = params->EmcZcalWaitCnt; - MAKE_EMC_REG(EMC_ZCAL_MRW_CMD) = params->EmcZcalMrwCmd; - } - - if (params->EmcBctSpare12) { - *(volatile uint32_t *)params->EmcBctSpare12 = params->EmcBctSpare13; - } - - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - - if (params->EmcExtraRefreshNum) { - MAKE_EMC_REG(EMC_REF) = ((1 << params->EmcExtraRefreshNum << 8) - 253) | (params->EmcDevSelect << 30); - } - - MAKE_EMC_REG(EMC_REFCTRL) = params->EmcDevSelect | 0x80000000; - MAKE_EMC_REG(EMC_DYN_SELF_REF_CONTROL) = params->EmcDynSelfRefControl; - MAKE_EMC_REG(EMC_CFG) = params->EmcCfg; - MAKE_EMC_REG(EMC_FDPD_CTRL_DQ) = params->EmcFdpdCtrlDq; - MAKE_EMC_REG(EMC_FDPD_CTRL_CMD) = params->EmcFdpdCtrlCmd; - MAKE_EMC_REG(EMC_SEL_DPD_CTRL) = params->EmcSelDpdCtrl; - MAKE_EMC_REG(EMC_FBIO_SPARE) = params->EmcFbioSpare | 2; - MAKE_EMC_REG(EMC_TIMING_CONTROL) = 1; - MAKE_EMC_REG(EMC_CFG_UPDATE) = params->EmcCfgUpdate; - MAKE_EMC_REG(EMC_CFG_PIPE_CLK) = params->EmcCfgPipeClk; - MAKE_EMC_REG(EMC_FDPD_CTRL_CMD_NO_RAMP) = params->EmcFdpdCtrlCmdNoRamp; - MAKE_MC_REG(MC_UNTRANSLATED_REGION_CHECK) = params->McUntranslatedRegionCheck; - MAKE_MC_REG(MC_VIDEO_PROTECT_REG_CTRL) = params->McVideoProtectWriteAccess; - MAKE_MC_REG(MC_SEC_CARVEOUT_REG_CTRL) = params->McSecCarveoutProtectWriteAccess; - MAKE_MC_REG(MC_MTS_CARVEOUT_REG_CTRL) = params->McMtsCarveoutRegCtrl; - MAKE_MC_REG(MC_EMEM_CFG_ACCESS_CTRL) = 1; - - AHB_ARBITRATION_XBAR_CTRL_0 = ((AHB_ARBITRATION_XBAR_CTRL_0 & 0xFFFEFFFF) | ((params->AhbArbitrationXbarCtrlMemInitDone & 0xFFFF) << 16)); -} - -static const void *sdram_get_params_erista(uint32_t dram_id) { - uint32_t sdram_params_index = sdram_params_index_table_erista[dram_id]; -#ifdef CONFIG_SDRAM_COMPRESS - uint8_t *buf = (uint8_t *)0x40030000; - LZ_Uncompress(sdram_params_erista_lz, buf, sizeof(sdram_params_erista_lz)); - return (const void *)&buf[sizeof(sdram_params_erista_t) * sdram_params_index]; -#else - return sdram_params_erista[sdram_params_index]; -#endif -} - -static const void *sdram_get_params_mariko(uint32_t dram_id) { - uint32_t sdram_params_index = sdram_params_index_table_mariko[dram_id]; -#ifdef CONFIG_SDRAM_COMPRESS - uint8_t *buf = (uint8_t *)0x40030000; - LZ_Uncompress(sdram_params_mariko_lz, buf, sizeof(sdram_params_mariko_lz)); - return (const void *)&buf[sizeof(sdram_params_mariko_t) * sdram_params_index]; -#else - return sdram_params_mariko[sdram_params_index]; -#endif -} - -static void sdram_init_erista(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - const sdram_params_erista_t *params = (const sdram_params_erista_t *)sdram_get_params_erista(fuse_get_dram_id()); - - /* Enable VddMemory. */ - uint8_t val = 5; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD_CFG2, &val, 1); - val = 40; /* 40 = (1000 * 1100 - 600000) / 12500 -> 1.1V */ - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD1, &val, 1); - - pmc->vddp_sel = params->PmcVddpSel; - udelay(params->PmcVddpSelWait); - pmc->ddr_pwr = pmc->ddr_pwr; - pmc->no_iopower = params->PmcNoIoPower; - pmc->reg_short = params->PmcRegShort; - pmc->ddr_cntrl = params->PmcDdrCntrl; - - if (params->EmcBctSpare0) { - *(volatile uint32_t *)params->EmcBctSpare0 = params->EmcBctSpare1; - } - - sdram_config_erista(params); -} - -static void sdram_init_mariko(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - const sdram_params_mariko_t *params = (const sdram_params_mariko_t *)sdram_get_params_mariko(fuse_get_dram_id()); - - /* Enable VddMemory. */ - uint8_t val = 5; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD_CFG2, &val, 1); - - pmc->vddp_sel = params->PmcVddpSel; - udelay(params->PmcVddpSelWait); - pmc->no_iopower = params->PmcNoIoPower; - pmc->reg_short = params->PmcRegShort; - pmc->ddr_cntrl = params->PmcDdrCntrl; - - if (params->EmcBctSpare0) { - *(volatile uint32_t *)params->EmcBctSpare0 = params->EmcBctSpare1; - } - - sdram_config_mariko(params); -} - -static void sdram_save_params_erista(const void *save_params) { - const sdram_params_erista_t *params = (const sdram_params_erista_t *)save_params; - volatile tegra_pmc_t *pmc = pmc_get_regs(); - -#define pack(src, src_bits, dst, dst_bits) { \ - uint32_t mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \ - dst &= ~(mask << (0 ? dst_bits)); \ - dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \ -} - -#define s(param, src_bits, pmcreg, dst_bits) \ - pack(params->param, src_bits, pmc->pmcreg, dst_bits) - -#define c(value, pmcreg, dst_bits) \ - pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits) - -/* 32 bits version of s macro */ -#define s32(param, pmcreg) pmc->pmcreg = params->param - -/* 32 bits version c macro */ -#define c32(value, pmcreg) pmc->pmcreg = value - - /* [1.0.0-3.0.2] Patch carveout parameters. */ - /* - *(volatile uint32_t *)params->McGeneralizedCarveout1Bom = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1BomHi = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Size128kb = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Access0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Access1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Access2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Access3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Access4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1ForceInternalAccess0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1ForceInternalAccess1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1ForceInternalAccess2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1ForceInternalAccess3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1ForceInternalAccess4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout1Cfg0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Bom = 0x80020000; - *(volatile uint32_t *)params->McGeneralizedCarveout2BomHi = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Size128kb = 2; - *(volatile uint32_t *)params->McGeneralizedCarveout2Access0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Access1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Access2 = 0x3000000; - *(volatile uint32_t *)params->McGeneralizedCarveout2Access3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Access4 = 0x300; - *(volatile uint32_t *)params->McGeneralizedCarveout2ForceInternalAccess0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2ForceInternalAccess1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2ForceInternalAccess2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2ForceInternalAccess3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2ForceInternalAccess4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout2Cfg0 = 0x440167E; - *(volatile uint32_t *)params->McGeneralizedCarveout3Bom = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3BomHi = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Size128kb = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Access0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Access1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Access2 = 0x3000000; - *(volatile uint32_t *)params->McGeneralizedCarveout3Access3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Access4 = 0x300; - *(volatile uint32_t *)params->McGeneralizedCarveout3ForceInternalAccess0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3ForceInternalAccess1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3ForceInternalAccess2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3ForceInternalAccess3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3ForceInternalAccess4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout3Cfg0 = 0x4401E7E; - *(volatile uint32_t *)params->McGeneralizedCarveout4Bom = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4BomHi = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Size128kb = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Access0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Access1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Access2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Access3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Access4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4ForceInternalAccess0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4ForceInternalAccess1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4ForceInternalAccess2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4ForceInternalAccess3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4ForceInternalAccess4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout4Cfg0 = 0x8F; - *(volatile uint32_t *)params->McGeneralizedCarveout5Bom = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5BomHi = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Size128kb = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Access0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Access1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Access2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Access3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Access4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5ForceInternalAccess0 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5ForceInternalAccess1 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5ForceInternalAccess2 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5ForceInternalAccess3 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5ForceInternalAccess4 = 0; - *(volatile uint32_t *)params->McGeneralizedCarveout5Cfg0 = 0x8F; - */ - - /* [4.0.0+] Patch carveout parameters. */ - *(volatile uint32_t *)¶ms->McGeneralizedCarveout1Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout2Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout3Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout4Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout5Cfg0 = 0; - - /* Patch SDRAM parameters. */ - uint32_t t0 = params->EmcSwizzleRank0Byte0 << 5 >> 29 > params->EmcSwizzleRank0Byte0 << 1 >> 29; - uint32_t t1 = (t0 & 0xFFFFFFEF) | ((params->EmcSwizzleRank1Byte0 << 5 >> 29 > params->EmcSwizzleRank1Byte0 << 1 >> 29) << 4); - uint32_t t2 = (t1 & 0xFFFFFFFD) | ((params->EmcSwizzleRank0Byte1 << 5 >> 29 > params->EmcSwizzleRank0Byte1 << 1 >> 29) << 1); - uint32_t t3 = (t2 & 0xFFFFFFDF) | ((params->EmcSwizzleRank1Byte1 << 5 >> 29 > params->EmcSwizzleRank1Byte1 << 1 >> 29) << 5); - uint32_t t4 = (t3 & 0xFFFFFFFB) | ((params->EmcSwizzleRank0Byte2 << 5 >> 29 > params->EmcSwizzleRank0Byte2 << 1 >> 29) << 2); - uint32_t t5 = (t4 & 0xFFFFFFBF) | ((params->EmcSwizzleRank1Byte2 << 5 >> 29 > params->EmcSwizzleRank1Byte2 << 1 >> 29) << 6); - uint32_t t6 = (t5 & 0xFFFFFFF7) | ((params->EmcSwizzleRank0Byte3 << 5 >> 29 > params->EmcSwizzleRank0Byte3 << 1 >> 29) << 3); - uint32_t t7 = (t6 & 0xFFFFFF7F) | ((params->EmcSwizzleRank1Byte3 << 5 >> 29 > params->EmcSwizzleRank1Byte3 << 1 >> 29) << 7); - *(volatile uint32_t *)¶ms->SwizzleRankByteEncode = t7; - *(volatile uint32_t *)¶ms->EmcBctSpare2 = 0x40000DD8; - *(volatile uint32_t *)¶ms->EmcBctSpare3 = t7; - - s(EmcClockSource, 7:0, scratch6, 15:8); - s(EmcClockSourceDll, 7:0, scratch6, 23:16); - s(EmcClockSource, 31:29, scratch6, 26:24); - s(EmcClockSourceDll, 31:29, scratch6, 29:27); - s(EmcClockSourceDll, 11:10, scratch6, 31:30); - s(ClkRstControllerPllmMisc2Override, 9:8, scratch7, 1:0); - s(ClkRstControllerPllmMisc2Override, 2:1, scratch7, 3:2); - s(EmcZqCalLpDdr4WarmBoot, 31:30, scratch7, 5:4); - s(EmcClockSource, 15:15, scratch7, 6:6); - s(EmcClockSource, 26:26, scratch7, 7:7); - s(EmcClockSource, 20:20, scratch7, 8:8); - s(EmcClockSource, 19:19, scratch7, 9:9); - s(ClkRstControllerPllmMisc2Override, 13:13, scratch7, 10:10); - s(ClkRstControllerPllmMisc2Override, 12:12, scratch7, 11:11); - s(ClkRstControllerPllmMisc2Override, 11:11, scratch7, 12:12); - s(ClkRstControllerPllmMisc2Override, 10:10, scratch7, 13:13); - s(ClkRstControllerPllmMisc2Override, 5:5, scratch7, 14:14); - s(ClkRstControllerPllmMisc2Override, 4:4, scratch7, 15:15); - s(ClkRstControllerPllmMisc2Override, 3:3, scratch7, 16:16); - s(ClkRstControllerPllmMisc2Override, 0:0, scratch7, 17:17); - s(EmcZqCalLpDdr4WarmBoot, 1:0, scratch7, 19:18); - s(EmcZqCalLpDdr4WarmBoot, 4:4, scratch7, 20:20); - s(EmcOdtWrite, 5:0, scratch7, 26:21); - s(EmcOdtWrite, 11:8, scratch7, 30:27); - s(EmcOdtWrite, 31:31, scratch7, 31:31); - s(EmcFdpdCtrlCmdNoRamp, 0:0, scratch13, 30:30); - s(EmcCfgPipeClk, 0:0, scratch13, 31:31); - s(McEmemArbMisc2, 0:0, scratch14, 30:30); - s(McDaCfg0, 0:0, scratch14, 31:31); - s(EmcQRst, 6:0, scratch15, 26:20); - s(EmcQRst, 20:16, scratch15, 31:27); - s(EmcPmacroCmdTxDrv, 5:0, scratch16, 25:20); - s(EmcPmacroCmdTxDrv, 13:8, scratch16, 31:26); - s(EmcPmacroAutocalCfg0, 2:0, scratch17, 22:20); - s(EmcPmacroAutocalCfg0, 10:8, scratch17, 25:23); - s(EmcPmacroAutocalCfg0, 18:16, scratch17, 28:26); - s(EmcPmacroAutocalCfg0, 26:24, scratch17, 31:29); - s(EmcPmacroAutocalCfg1, 2:0, scratch18, 22:20); - s(EmcPmacroAutocalCfg1, 10:8, scratch18, 25:23); - s(EmcPmacroAutocalCfg1, 18:16, scratch18, 28:26); - s(EmcPmacroAutocalCfg1, 26:24, scratch18, 31:29); - s(EmcPmacroAutocalCfg2, 2:0, scratch19, 22:20); - s(EmcPmacroAutocalCfg2, 10:8, scratch19, 25:23); - s(EmcPmacroAutocalCfg2, 18:16, scratch19, 28:26); - s(EmcPmacroAutocalCfg2, 26:24, scratch19, 31:29); - s32(EmcCfgRsv,scratch22); - s32(EmcAutoCalConfig, scratch23); - s32(EmcAutoCalVrefSel0, scratch24); - s32(EmcPmacroBrickCtrlRfu1, scratch25); - s32(EmcPmacroBrickCtrlRfu2, scratch26); - s32(EmcPmcScratch1, scratch27); - s32(EmcPmcScratch2, scratch28); - s32(EmcPmcScratch3, scratch29); - s32(McEmemArbDaTurns, scratch30); - s(EmcFbioSpare, 31:24, scratch58, 7:0); - s(EmcFbioSpare, 23:16, scratch58, 15:8); - s(EmcFbioSpare, 15:8, scratch58, 23:16); - s(EmcFbioSpare, 7:2, scratch58, 29:24); - s(EmcFbioSpare, 0:0, scratch58, 30:30); - s(EmcDllCfg0, 29:0, scratch59, 29:0); - s(EmcPmacroDdllBypass, 11:0, scratch60, 11:0); - s(EmcPmacroDdllBypass, 27:13, scratch60, 26:12); - s(EmcPmacroDdllBypass, 31:29, scratch60, 29:27); - s(McEmemArbMisc0, 14:0, scratch61, 14:0); - s(McEmemArbMisc0, 30:16, scratch61, 29:15); - s(EmcFdpdCtrlCmd, 16:0, scratch62, 16:0); - s(EmcFdpdCtrlCmd, 31:20, scratch62, 28:17); - s(EmcAutoCalConfig2, 27:0, scratch63, 27:0); - s(EmcBurstRefreshNum, 3:0, scratch63, 31:28); - s(EmcPmacroZctrl, 27:0, scratch64, 27:0); - s(EmcTppd, 3:0, scratch64, 31:28); - s(EmcCfgDigDll, 10:0, scratch65, 10:0); - s(EmcCfgDigDll, 25:12, scratch65, 24:11); - s(EmcCfgDigDll, 27:27, scratch65, 25:25); - s(EmcCfgDigDll, 31:30, scratch65, 27:26); - s(EmcR2r, 3:0, scratch65, 31:28); - s(EmcFdpdCtrlDq, 16:0, scratch66, 16:0); - s(EmcFdpdCtrlDq, 28:20, scratch66, 25:17); - s(EmcFdpdCtrlDq, 31:30, scratch66, 27:26); - s(EmcW2w, 3:0, scratch66, 31:28); - s(EmcPmacroTxPwrd4, 13:0, scratch67, 13:0); - s(EmcPmacroTxPwrd4, 29:16, scratch67, 27:14); - s(EmcPmacroCommonPadTxCtrl, 3:0, scratch67, 31:28); - s(EmcPmacroTxPwrd5, 13:0, scratch68, 13:0); - s(EmcPmacroTxPwrd5, 29:16, scratch68, 27:14); - s(EmcPmacroDdllPwrd0, 4:0, scratch69, 4:0); - s(EmcPmacroDdllPwrd0, 12:6, scratch69, 11:5); - s(EmcPmacroDdllPwrd0, 20:14, scratch69, 18:12); - s(EmcPmacroDdllPwrd0, 28:22, scratch69, 25:19); - s(EmcPmacroDdllPwrd0, 31:30, scratch69, 27:26); - s(EmcCfg, 4:4, scratch69, 31:31); - s(EmcPmacroDdllPwrd1, 4:0, scratch70, 4:0); - s(EmcPmacroDdllPwrd1, 12:6, scratch70, 11:5); - s(EmcPmacroDdllPwrd1, 20:14, scratch70, 18:12); - s(EmcPmacroDdllPwrd1, 28:22, scratch70, 25:19); - s(EmcPmacroDdllPwrd1, 31:30, scratch70, 27:26); - s(EmcCfg, 5:5, scratch70, 31:31); - s(EmcPmacroDdllPwrd2, 4:0, scratch71, 4:0); - s(EmcPmacroDdllPwrd2, 12:6, scratch71, 11:5); - s(EmcPmacroDdllPwrd2, 20:14, scratch71, 18:12); - s(EmcPmacroDdllPwrd2, 28:22, scratch71, 25:19); - s(EmcPmacroDdllPwrd2, 31:30, scratch71, 27:26); - s(EmcFbioCfg5, 23:20, scratch71, 31:28); - s(EmcPmacroIbVrefDq_0, 6:0, scratch72, 6:0); - s(EmcPmacroIbVrefDq_0, 14:8, scratch72, 13:7); - s(EmcPmacroIbVrefDq_0, 22:16, scratch72, 20:14); - s(EmcPmacroIbVrefDq_0, 30:24, scratch72, 27:21); - s(EmcFbioCfg5, 15:13, scratch72, 30:28); - s(EmcCfg, 6:6, scratch72, 31:31); - s(EmcPmacroIbVrefDq_1, 6:0, scratch73, 6:0); - s(EmcPmacroIbVrefDq_1, 14:8, scratch73, 13:7); - s(EmcPmacroIbVrefDq_1, 22:16, scratch73, 20:14); - s(EmcPmacroIbVrefDq_1, 30:24, scratch73, 27:21); - s(EmcCfg2, 5:3, scratch73, 30:28); - s(EmcCfg, 7:7, scratch73, 31:31); - s(EmcPmacroIbVrefDqs_0, 6:0, scratch74, 6:0); - s(EmcPmacroIbVrefDqs_0, 14:8, scratch74, 13:7); - s(EmcPmacroIbVrefDqs_0, 22:16, scratch74, 20:14); - s(EmcPmacroIbVrefDqs_0, 30:24, scratch74, 27:21); - s(EmcCfg, 17:16, scratch74, 29:28); - s(EmcFbioCfg5, 1:0, scratch74, 31:30); - s(EmcPmacroIbVrefDqs_1, 6:0, scratch75, 6:0); - s(EmcPmacroIbVrefDqs_1, 14:8, scratch75, 13:7); - s(EmcPmacroIbVrefDqs_1, 22:16, scratch75, 20:14); - s(EmcPmacroIbVrefDqs_1, 30:24, scratch75, 27:21); - s(EmcFbioCfg5, 3:2, scratch75, 29:28); - s(EmcCfg2, 27:26, scratch75, 31:30); - s(EmcPmacroDdllShortCmd_0, 6:0, scratch76, 6:0); - s(EmcPmacroDdllShortCmd_0, 14:8, scratch76, 13:7); - s(EmcPmacroDdllShortCmd_0, 22:16, scratch76, 20:14); - s(EmcPmacroDdllShortCmd_0, 30:24, scratch76, 27:21); - s(EmcPmacroCmdPadTxCtrl, 3:2, scratch76, 29:28); - s(EmcPmacroCmdPadTxCtrl, 7:6, scratch76, 31:30); - s(EmcPmacroDdllShortCmd_1, 6:0, scratch77, 6:0); - s(EmcPmacroDdllShortCmd_1, 14:8, scratch77, 13:7); - s(EmcPmacroDdllShortCmd_1, 22:16, scratch77, 20:14); - s(EmcPmacroDdllShortCmd_1, 30:24, scratch77, 27:21); - s(EmcPmacroCmdPadTxCtrl, 11:10, scratch77, 29:28); - s(EmcPmacroCmdPadTxCtrl, 15:14, scratch77, 31:30); - s(EmcAutoCalChannel, 5:0, scratch78, 5:0); - s(EmcAutoCalChannel, 11:8, scratch78, 9:6); - s(EmcAutoCalChannel, 27:16, scratch78, 21:10); - s(EmcAutoCalChannel, 31:29, scratch78, 24:22); - s(EmcConfigSampleDelay, 6:0, scratch78, 31:25); - s(EmcPmacroRxTerm, 5:0, scratch79, 5:0); - s(EmcPmacroRxTerm, 13:8, scratch79, 11:6); - s(EmcPmacroRxTerm, 21:16, scratch79, 17:12); - s(EmcPmacroRxTerm, 29:24, scratch79, 23:18); - s(EmcRc, 7:0, scratch79, 31:24); - s(EmcPmacroDqTxDrv, 5:0, scratch80, 5:0); - s(EmcPmacroDqTxDrv, 13:8, scratch80, 11:6); - s(EmcPmacroDqTxDrv, 21:16, scratch80, 17:12); - s(EmcPmacroDqTxDrv, 29:24, scratch80, 23:18); - s(EmcSelDpdCtrl, 5:2, scratch80, 27:24); - s(EmcSelDpdCtrl, 8:8, scratch80, 28:28); - s(EmcSelDpdCtrl, 18:16, scratch80, 31:29); - s(EmcPmacroCaTxDrv, 5:0, scratch81, 5:0); - s(EmcPmacroCaTxDrv, 13:8, scratch81, 11:6); - s(EmcPmacroCaTxDrv, 21:16, scratch81, 17:12); - s(EmcPmacroCaTxDrv, 29:24, scratch81, 23:18); - s(EmcObdly, 5:0, scratch81, 29:24); - s(EmcObdly, 29:28, scratch81, 31:30); - s(EmcZcalInterval, 23:10, scratch82, 13:0); - s(EmcZcalInterval, 9:0, scratch82, 23:14); - s(EmcPmacroCmdRxTermMode, 1:0, scratch82, 25:24); - s(EmcPmacroCmdRxTermMode, 5:4, scratch82, 27:26); - s(EmcPmacroCmdRxTermMode, 9:8, scratch82, 29:28); - s(EmcPmacroCmdRxTermMode, 13:12, scratch82, 31:30); - s(EmcDataBrlshft0, 23:0, scratch83, 23:0); - s(EmcPmacroDataRxTermMode, 1:0, scratch83, 25:24); - s(EmcPmacroDataRxTermMode, 5:4, scratch83, 27:26); - s(EmcPmacroDataRxTermMode, 9:8, scratch83, 29:28); - s(EmcPmacroDataRxTermMode, 13:12, scratch83, 31:30); - s(EmcDataBrlshft1, 23:0, scratch84, 23:0); - s(McEmemArbTimingRc, 7:0, scratch84, 31:24); - s(EmcDqsBrlshft0, 23:0, scratch85, 23:0); - s(McEmemArbRsv, 7:0, scratch85, 31:24); - s(EmcDqsBrlshft1, 23:0, scratch86, 23:0); - s(EmcCfgPipe2, 11:0, scratch87, 11:0); - s(EmcCfgPipe2, 27:16, scratch87, 23:12); - s(EmcCfgPipe1, 11:0, scratch88, 11:0); - s(EmcCfgPipe1, 27:16, scratch88, 23:12); - s(EmcPmacroCmdCtrl0, 5:0, scratch89, 5:0); - s(EmcPmacroCmdCtrl0, 13:8, scratch89, 11:6); - s(EmcPmacroCmdCtrl0, 21:16, scratch89, 17:12); - s(EmcPmacroCmdCtrl0, 29:24, scratch89, 23:18); - s(EmcPmacroCmdCtrl1, 5:0, scratch90, 5:0); - s(EmcPmacroCmdCtrl1, 13:8, scratch90, 11:6); - s(EmcPmacroCmdCtrl1, 21:16, scratch90, 17:12); - s(EmcPmacroCmdCtrl1, 29:24, scratch90, 23:18); - s(EmcRas, 6:0, scratch90, 30:24); - s(EmcCfg, 8:8, scratch90, 31:31); - s(EmcPmacroVttgenCtrl2, 23:0, scratch91, 23:0); - s(EmcW2p, 6:0, scratch91, 30:24); - s(EmcCfg, 9:9, scratch91, 31:31); - s(EmcPmacroCmdPadRxCtrl, 2:0, scratch92, 2:0); - s(EmcPmacroCmdPadRxCtrl, 5:4, scratch92, 4:3); - s(EmcPmacroCmdPadRxCtrl, 10:8, scratch92, 7:5); - s(EmcPmacroCmdPadRxCtrl, 22:12, scratch92, 18:8); - s(EmcPmacroCmdPadRxCtrl, 28:24, scratch92, 23:19); - s(EmcQSafe, 6:0, scratch92, 30:24); - s(EmcCfg, 18:18, scratch92, 31:31); - s(EmcPmacroDataPadRxCtrl, 2:0, scratch93, 2:0); - s(EmcPmacroDataPadRxCtrl, 5:4, scratch93, 4:3); - s(EmcPmacroDataPadRxCtrl, 10:8, scratch93, 7:5); - s(EmcPmacroDataPadRxCtrl, 22:12, scratch93, 18:8); - s(EmcPmacroDataPadRxCtrl, 28:24, scratch93, 23:19); - s(EmcRdv, 6:0, scratch93, 30:24); - s(EmcCfg, 21:21, scratch93, 31:31); - s(McEmemArbDaCovers, 23:0, scratch94, 23:0); - s(EmcRw2Pden, 6:0, scratch94, 30:24); - s(EmcCfg, 22:22, scratch94, 31:31); - s(EmcPmacroCmdCtrl2, 5:0, scratch95, 5:0); - s(EmcPmacroCmdCtrl2, 13:9, scratch95, 10:6); - s(EmcPmacroCmdCtrl2, 21:16, scratch95, 16:11); - s(EmcPmacroCmdCtrl2, 29:24, scratch95, 22:17); - s(EmcRfcPb, 8:0, scratch95, 31:23); - s(EmcPmacroQuseDdllRank0_0, 10:0, scratch96, 10:0); - s(EmcPmacroQuseDdllRank0_0, 26:16, scratch96, 21:11); - s(EmcCfgUpdate, 2:0, scratch96, 24:22); - s(EmcCfgUpdate, 10:8, scratch96, 27:25); - s(EmcCfgUpdate, 31:28, scratch96, 31:28); - s(EmcPmacroQuseDdllRank0_1, 10:0, scratch97, 10:0); - s(EmcPmacroQuseDdllRank0_1, 26:16, scratch97, 21:11); - s(EmcRfc, 9:0, scratch97, 31:22); - s(EmcPmacroQuseDdllRank0_2, 10:0, scratch98, 10:0); - s(EmcPmacroQuseDdllRank0_2, 26:16, scratch98, 21:11); - s(EmcTxsr, 9:0, scratch98, 31:22); - s(EmcPmacroQuseDdllRank0_3, 10:0, scratch99, 10:0); - s(EmcPmacroQuseDdllRank0_3, 26:16, scratch99, 21:11); - s(EmcMc2EmcQ, 2:0, scratch99, 24:22); - s(EmcMc2EmcQ, 10:8, scratch99, 27:25); - s(EmcMc2EmcQ, 27:24, scratch99, 31:28); - s(EmcPmacroQuseDdllRank0_4, 10:0, scratch100, 10:0); - s(EmcPmacroQuseDdllRank0_4, 26:16, scratch100, 21:11); - s(McEmemArbRing1Throttle, 4:0, scratch100, 26:22); - s(McEmemArbRing1Throttle, 20:16, scratch100, 31:27); - s(EmcPmacroQuseDdllRank0_5, 10:0, scratch101, 10:0); - s(EmcPmacroQuseDdllRank0_5, 26:16, scratch101, 21:11); - s(EmcPmacroQuseDdllRank1_0, 10:0, scratch102, 10:0); - s(EmcPmacroQuseDdllRank1_0, 26:16, scratch102, 21:11); - s(EmcAr2Pden, 8:0, scratch102, 30:22); - s(EmcCfg, 23:23, scratch102, 31:31); - s(EmcPmacroQuseDdllRank1_1, 10:0, scratch103, 10:0); - s(EmcPmacroQuseDdllRank1_1, 26:16, scratch103, 21:11); - s(EmcRfcSlr, 8:0, scratch103, 30:22); - s(EmcCfg, 24:24, scratch103, 31:31); - s(EmcPmacroQuseDdllRank1_2, 10:0, scratch104, 10:0); - s(EmcPmacroQuseDdllRank1_2, 26:16, scratch104, 21:11); - s(EmcIbdly, 6:0, scratch104, 28:22); - s(EmcIbdly, 29:28, scratch104, 30:29); - s(EmcCfg, 25:25, scratch104, 31:31); - s(EmcPmacroQuseDdllRank1_3, 10:0, scratch105, 10:0); - s(EmcPmacroQuseDdllRank1_3, 26:16, scratch105, 21:11); - s(McEmemArbTimingRFCPB, 8:0, scratch105, 30:22); - s(EmcCfg, 26:26, scratch105, 31:31); - s(EmcPmacroQuseDdllRank1_4, 10:0, scratch106, 10:0); - s(EmcPmacroQuseDdllRank1_4, 26:16, scratch106, 21:11); - s(EmcTfaw, 6:0, scratch106, 28:22); - s(EmcPmacroDataPadTxCtrl, 3:2, scratch106, 30:29); - s(EmcCfg, 28:28, scratch106, 31:31); - s(EmcPmacroQuseDdllRank1_5, 10:0, scratch107, 10:0); - s(EmcPmacroQuseDdllRank1_5, 26:16, scratch107, 21:11); - s(EmcTClkStable, 6:0, scratch107, 28:22); - s(EmcPmacroDataPadTxCtrl, 7:6, scratch107, 30:29); - s(EmcCfg, 29:29, scratch107, 31:31); - s(EmcPmacroObDdllLongDqRank0_0, 10:0, scratch108, 10:0); - s(EmcPmacroObDdllLongDqRank0_0, 26:16, scratch108, 21:11); - s(EmcPdex2Mrr, 6:0, scratch108, 28:22); - s(EmcPmacroDataPadTxCtrl, 11:10, scratch108, 30:29); - s(EmcCfg, 30:30, scratch108, 31:31); - s(EmcPmacroObDdllLongDqRank0_1, 10:0, scratch109, 10:0); - s(EmcPmacroObDdllLongDqRank0_1, 26:16, scratch109, 21:11); - s(EmcRdvMask, 6:0, scratch109, 28:22); - s(EmcPmacroDataPadTxCtrl, 15:14, scratch109, 30:29); - s(EmcCfg, 31:31, scratch109, 31:31); - s(EmcPmacroObDdllLongDqRank0_2, 10:0, scratch110, 10:0); - s(EmcPmacroObDdllLongDqRank0_2, 26:16, scratch110, 21:11); - s(EmcRdvEarlyMask, 6:0, scratch110, 28:22); - s(EmcFbioCfg5, 4:4, scratch110, 29:29); - s(EmcFbioCfg5, 8:8, scratch110, 30:30); - s(EmcFbioCfg5, 10:10, scratch110, 31:31); - s(EmcPmacroObDdllLongDqRank0_3, 10:0, scratch111, 10:0); - s(EmcPmacroObDdllLongDqRank0_3, 26:16, scratch111, 21:11); - s(EmcRdvEarly, 6:0, scratch111, 28:22); - s(EmcFbioCfg5, 12:12, scratch111, 29:29); - s(EmcFbioCfg5, 25:24, scratch111, 31:30); - s(EmcPmacroObDdllLongDqRank0_4, 10:0, scratch112, 10:0); - s(EmcPmacroObDdllLongDqRank0_4, 26:16, scratch112, 21:11); - s(EmcPmacroDdllShortCmd_2, 6:0, scratch112, 28:22); - s(EmcFbioCfg5, 28:26, scratch112, 31:29); - s(EmcPmacroObDdllLongDqRank0_5, 10:0, scratch113, 10:0); - s(EmcPmacroObDdllLongDqRank0_5, 26:16, scratch113, 21:11); - s(McEmemArbTimingRp, 6:0, scratch113, 28:22); - s(EmcFbioCfg5, 31:30, scratch113, 30:29); - s(EmcCfg2, 0:0, scratch113, 31:31); - s(EmcPmacroObDdllLongDqRank1_0, 10:0, scratch114, 10:0); - s(EmcPmacroObDdllLongDqRank1_0, 26:16, scratch114, 21:11); - s(McEmemArbTimingRas, 6:0, scratch114, 28:22); - s(EmcCfg2, 2:1, scratch114, 30:29); - s(EmcCfg2, 7:7, scratch114, 31:31); - s(EmcPmacroObDdllLongDqRank1_1, 10:0, scratch115, 10:0); - s(EmcPmacroObDdllLongDqRank1_1, 26:16, scratch115, 21:11); - s(McEmemArbTimingFaw, 6:0, scratch115, 28:22); - s(EmcCfg2, 11:10, scratch115, 30:29); - s(EmcCfg2, 14:14, scratch115, 31:31); - s(EmcPmacroObDdllLongDqRank1_2, 10:0, scratch123, 10:0); - s(EmcPmacroObDdllLongDqRank1_2, 26:16, scratch123, 21:11); - s(McEmemArbTimingRap2Pre, 6:0, scratch123, 28:22); - s(EmcCfg2, 16:15, scratch123, 30:29); - s(EmcCfg2, 20:20, scratch123, 31:31); - s(EmcPmacroObDdllLongDqRank1_3, 10:0, scratch124, 10:0); - s(EmcPmacroObDdllLongDqRank1_3, 26:16, scratch124, 21:11); - s(McEmemArbTimingWap2Pre, 6:0, scratch124, 28:22); - s(EmcCfg2, 24:22, scratch124, 31:29); - s(EmcPmacroObDdllLongDqRank1_4, 10:0, scratch125, 10:0); - s(EmcPmacroObDdllLongDqRank1_4, 26:16, scratch125, 21:11); - s(McEmemArbTimingR2W, 6:0, scratch125, 28:22); - s(EmcCfg2, 25:25, scratch125, 29:29); - s(EmcCfg2, 29:28, scratch125, 31:30); - s(EmcPmacroObDdllLongDqRank1_5, 10:0, scratch126, 10:0); - s(EmcPmacroObDdllLongDqRank1_5, 26:16, scratch126, 21:11); - s(McEmemArbTimingW2R, 6:0, scratch126, 28:22); - s(EmcCfg2, 31:30, scratch126, 30:29); - s(EmcCfgPipe, 0:0, scratch126, 31:31); - s(EmcPmacroObDdllLongDqsRank0_0, 10:0, scratch127, 10:0); - s(EmcPmacroObDdllLongDqsRank0_0, 26:16, scratch127, 21:11); - s(EmcRp, 5:0, scratch127, 27:22); - s(EmcCfgPipe, 4:1, scratch127, 31:28); - s(EmcPmacroObDdllLongDqsRank0_1, 10:0, scratch128, 10:0); - s(EmcPmacroObDdllLongDqsRank0_1, 26:16, scratch128, 21:11); - s(EmcR2w, 5:0, scratch128, 27:22); - s(EmcCfgPipe, 8:5, scratch128, 31:28); - s(EmcPmacroObDdllLongDqsRank0_2, 10:0, scratch129, 10:0); - s(EmcPmacroObDdllLongDqsRank0_2, 26:16, scratch129, 21:11); - s(EmcW2r, 5:0, scratch129, 27:22); - s(EmcCfgPipe, 11:9, scratch129, 30:28); - s(EmcCfgPipe, 16:16, scratch129, 31:31); - s(EmcPmacroObDdllLongDqsRank0_3, 10:0, scratch130, 10:0); - s(EmcPmacroObDdllLongDqsRank0_3, 26:16, scratch130, 21:11); - s(EmcR2p, 5:0, scratch130, 27:22); - s(EmcCfgPipe, 20:17, scratch130, 31:28); - s(EmcPmacroObDdllLongDqsRank0_4, 10:0, scratch131, 10:0); - s(EmcPmacroObDdllLongDqsRank0_4, 26:16, scratch131, 21:11); - s(EmcCcdmw, 5:0, scratch131, 27:22); - s(EmcCfgPipe, 24:21, scratch131, 31:28); - s(EmcPmacroObDdllLongDqsRank0_5, 10:0, scratch132, 10:0); - s(EmcPmacroObDdllLongDqsRank0_5, 26:16, scratch132, 21:11); - s(EmcRdRcd, 5:0, scratch132, 27:22); - s(EmcCfgPipe, 27:25, scratch132, 30:28); - s(EmcPmacroTxPwrd0, 0:0, scratch132, 31:31); - s(EmcPmacroObDdllLongDqsRank1_0, 10:0, scratch133, 10:0); - s(EmcPmacroObDdllLongDqsRank1_0, 26:16, scratch133, 21:11); - s(EmcWrRcd, 5:0, scratch133, 27:22); - s(EmcPmacroTxPwrd0, 4:1, scratch133, 31:28); - s(EmcPmacroObDdllLongDqsRank1_1, 10:0, scratch134, 10:0); - s(EmcPmacroObDdllLongDqsRank1_1, 26:16, scratch134, 21:11); - s(EmcWdv, 5:0, scratch134, 27:22); - s(EmcPmacroTxPwrd0, 8:5, scratch134, 31:28); - s(EmcPmacroObDdllLongDqsRank1_2, 10:0, scratch135, 10:0); - s(EmcPmacroObDdllLongDqsRank1_2, 26:16, scratch135, 21:11); - s(EmcQUse, 5:0, scratch135, 27:22); - s(EmcPmacroTxPwrd0, 12:9, scratch135, 31:28); - s(EmcPmacroObDdllLongDqsRank1_3, 10:0, scratch136, 10:0); - s(EmcPmacroObDdllLongDqsRank1_3, 26:16, scratch136, 21:11); - s(EmcPdEx2Wr, 5:0, scratch136, 27:22); - s(EmcPmacroTxPwrd0, 13:13, scratch136, 28:28); - s(EmcPmacroTxPwrd0, 18:16, scratch136, 31:29); - s(EmcPmacroObDdllLongDqsRank1_4, 10:0, scratch137, 10:0); - s(EmcPmacroObDdllLongDqsRank1_4, 26:16, scratch137, 21:11); - s(EmcPdEx2Rd, 5:0, scratch137, 27:22); - s(EmcPmacroTxPwrd0, 22:19, scratch137, 31:28); - s(EmcPmacroObDdllLongDqsRank1_5, 10:0, scratch138, 10:0); - s(EmcPmacroObDdllLongDqsRank1_5, 26:16, scratch138, 21:11); - s(EmcPdex2Cke, 5:0, scratch138, 27:22); - s(EmcPmacroTxPwrd0, 26:23, scratch138, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_0, 10:0, scratch139, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_0, 26:16, scratch139, 21:11); - s(EmcPChg2Pden, 5:0, scratch139, 27:22); - s(EmcPmacroTxPwrd0, 29:27, scratch139, 30:28); - s(EmcPmacroTxPwrd1, 0:0, scratch139, 31:31); - s(EmcPmacroIbDdllLongDqsRank0_1, 10:0, scratch140, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_1, 26:16, scratch140, 21:11); - s(EmcAct2Pden, 5:0, scratch140, 27:22); - s(EmcPmacroTxPwrd1, 4:1, scratch140, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_2, 10:0, scratch141, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_2, 26:16, scratch141, 21:11); - s(EmcCke2Pden, 5:0, scratch141, 27:22); - s(EmcPmacroTxPwrd1, 8:5, scratch141, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_3, 10:0, scratch142, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_3, 26:16, scratch142, 21:11); - s(EmcTcke, 5:0, scratch142, 27:22); - s(EmcPmacroTxPwrd1, 12:9, scratch142, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_0, 10:0, scratch143, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_0, 26:16, scratch143, 21:11); - s(EmcTrpab, 5:0, scratch143, 27:22); - s(EmcPmacroTxPwrd1, 13:13, scratch143, 28:28); - s(EmcPmacroTxPwrd1, 18:16, scratch143, 31:29); - s(EmcPmacroIbDdllLongDqsRank1_1, 10:0, scratch144, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_1, 26:16, scratch144, 21:11); - s(EmcClkenOverride, 3:1, scratch144, 24:22); - s(EmcClkenOverride, 8:6, scratch144, 27:25); - s(EmcPmacroTxPwrd1, 22:19, scratch144, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_2, 10:0, scratch145, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_2, 26:16, scratch145, 21:11); - s(EmcEInput, 5:0, scratch145, 27:22); - s(EmcPmacroTxPwrd1, 26:23, scratch145, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_3, 10:0, scratch146, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_3, 26:16, scratch146, 21:11); - s(EmcEInputDuration, 5:0, scratch146, 27:22); - s(EmcPmacroTxPwrd1, 29:27, scratch146, 30:28); - s(EmcPmacroTxPwrd2, 0:0, scratch146, 31:31); - s(EmcPmacroDdllLongCmd_0, 10:0, scratch147, 10:0); - s(EmcPmacroDdllLongCmd_0, 26:16, scratch147, 21:11); - s(EmcPutermExtra, 5:0, scratch147, 27:22); - s(EmcPmacroTxPwrd2, 4:1, scratch147, 31:28); - s(EmcPmacroDdllLongCmd_1, 10:0, scratch148, 10:0); - s(EmcPmacroDdllLongCmd_1, 26:16, scratch148, 21:11); - s(EmcTckesr, 5:0, scratch148, 27:22); - s(EmcPmacroTxPwrd2, 8:5, scratch148, 31:28); - s(EmcPmacroDdllLongCmd_2, 10:0, scratch149, 10:0); - s(EmcPmacroDdllLongCmd_2, 26:16, scratch149, 21:11); - s(EmcTpd, 5:0, scratch149, 27:22); - s(EmcPmacroTxPwrd2, 12:9, scratch149, 31:28); - s(EmcPmacroDdllLongCmd_3, 10:0, scratch150, 10:0); - s(EmcPmacroDdllLongCmd_3, 26:16, scratch150, 21:11); - s(EmcWdvMask, 5:0, scratch150, 27:22); - s(EmcPmacroTxPwrd2, 13:13, scratch150, 28:28); - s(EmcPmacroTxPwrd2, 18:16, scratch150, 31:29); - s(McEmemArbCfg, 8:0, scratch151, 8:0); - s(McEmemArbCfg, 20:16, scratch151, 13:9); - s(McEmemArbCfg, 31:24, scratch151, 21:14); - s(EmcWdvChk, 5:0, scratch151, 27:22); - s(EmcPmacroTxPwrd2, 22:19, scratch151, 31:28); - s(McEmemArbMisc1, 12:0, scratch152, 12:0); - s(McEmemArbMisc1, 25:21, scratch152, 17:13); - s(McEmemArbMisc1, 31:28, scratch152, 21:18); - s(EmcCmdBrlshft0, 5:0, scratch152, 27:22); - s(EmcPmacroTxPwrd2, 26:23, scratch152, 31:28); - s(EmcMrsWaitCnt2, 9:0, scratch153, 9:0); - s(EmcMrsWaitCnt2, 26:16, scratch153, 20:10); - s(EmcPmacroIbRxrt, 10:0, scratch153, 31:21); - s(EmcMrsWaitCnt, 9:0, scratch154, 9:0); - s(EmcMrsWaitCnt, 26:16, scratch154, 20:10); - s(EmcPmacroDdllLongCmd_4, 10:0, scratch154, 31:21); - s(EmcAutoCalInterval, 20:0, scratch155, 20:0); - s(McEmemArbOutstandingReq, 8:0, scratch155, 29:21); - s(McEmemArbOutstandingReq, 31:30, scratch155, 31:30); - s(McEmemArbRefpbHpCtrl, 6:0, scratch156, 6:0); - s(McEmemArbRefpbHpCtrl, 14:8, scratch156, 13:7); - s(McEmemArbRefpbHpCtrl, 22:16, scratch156, 20:14); - s(EmcCmdBrlshft1, 5:0, scratch156, 26:21); - s(EmcRrd, 4:0, scratch156, 31:27); - s(EmcQuseBrlshft0, 19:0, scratch157, 19:0); - s(EmcFbioCfg8, 27:16, scratch157, 31:20); - s(EmcQuseBrlshft1, 19:0, scratch158, 19:0); - s(EmcTxsrDll, 11:0, scratch158, 31:20); - s(EmcQuseBrlshft2, 19:0, scratch159, 19:0); - s(EmcTxdsrvttgen, 11:0, scratch159, 31:20); - s(EmcQuseBrlshft3, 19:0, scratch160, 19:0); - s(EmcPmacroVttgenCtrl0, 3:0, scratch160, 23:20); - s(EmcPmacroVttgenCtrl0, 11:8, scratch160, 27:24); - s(EmcPmacroVttgenCtrl0, 19:16, scratch160, 31:28); - s(EmcPmacroVttgenCtrl1, 19:0, scratch161, 19:0); - s(EmcCmdBrlshft2, 5:0, scratch161, 25:20); - s(EmcCmdBrlshft3, 5:0, scratch161, 31:26); - s(EmcAutoCalConfig3, 5:0, scratch162, 5:0); - s(EmcAutoCalConfig3, 13:8, scratch162, 11:6); - s(EmcAutoCalConfig3, 18:16, scratch162, 14:12); - s(EmcAutoCalConfig3, 22:20, scratch162, 17:15); - s(EmcTRefBw, 13:0, scratch162, 31:18); - s(EmcAutoCalConfig4, 5:0, scratch163, 5:0); - s(EmcAutoCalConfig4, 13:8, scratch163, 11:6); - s(EmcAutoCalConfig4, 18:16, scratch163, 14:12); - s(EmcAutoCalConfig4, 22:20, scratch163, 17:15); - s(EmcQpop, 6:0, scratch163, 24:18); - s(EmcQpop, 22:16, scratch163, 31:25); - s(EmcAutoCalConfig5, 5:0, scratch164, 5:0); - s(EmcAutoCalConfig5, 13:8, scratch164, 11:6); - s(EmcAutoCalConfig5, 18:16, scratch164, 14:12); - s(EmcAutoCalConfig5, 22:20, scratch164, 17:15); - s(EmcPmacroAutocalCfgCommon, 5:0, scratch164, 23:18); - s(EmcPmacroAutocalCfgCommon, 13:8, scratch164, 29:24); - s(EmcPmacroAutocalCfgCommon, 16:16, scratch164, 30:30); - s(EmcPmacroTxPwrd2, 27:27, scratch164, 31:31); - s(EmcAutoCalConfig6, 5:0, scratch165, 5:0); - s(EmcAutoCalConfig6, 13:8, scratch165, 11:6); - s(EmcAutoCalConfig6, 18:16, scratch165, 14:12); - s(EmcAutoCalConfig6, 22:20, scratch165, 17:15); - s(EmcWev, 5:0, scratch165, 23:18); - s(EmcWsv, 5:0, scratch165, 29:24); - s(EmcPmacroTxPwrd2, 29:28, scratch165, 31:30); - s(EmcAutoCalConfig7, 5:0, scratch166, 5:0); - s(EmcAutoCalConfig7, 13:8, scratch166, 11:6); - s(EmcAutoCalConfig7, 18:16, scratch166, 14:12); - s(EmcAutoCalConfig7, 22:20, scratch166, 17:15); - s(EmcCfg3, 2:0, scratch166, 20:18); - s(EmcCfg3, 6:4, scratch166, 23:21); - s(EmcQuseWidth, 3:0, scratch166, 27:24); - s(EmcQuseWidth, 29:28, scratch166, 29:28); - s(EmcPmacroTxPwrd3, 1:0, scratch166, 31:30); - s(EmcAutoCalConfig8, 5:0, scratch167, 5:0); - s(EmcAutoCalConfig8, 13:8, scratch167, 11:6); - s(EmcAutoCalConfig8, 18:16, scratch167, 14:12); - s(EmcAutoCalConfig8, 22:20, scratch167, 17:15); - s(EmcPmacroBgBiasCtrl0, 2:0, scratch167, 20:18); - s(EmcPmacroBgBiasCtrl0, 6:4, scratch167, 23:21); - s(McEmemArbTimingRcd, 5:0, scratch167, 29:24); - s(EmcPmacroTxPwrd3, 3:2, scratch167, 31:30); - s(EmcXm2CompPadCtrl2, 17:0, scratch168, 17:0); - s(McEmemArbTimingCcdmw, 5:0, scratch168, 23:18); - s(McEmemArbOverride, 27:27, scratch168, 24:24); - s(McEmemArbOverride, 26:26, scratch168, 25:25); - s(McEmemArbOverride, 16:16, scratch168, 26:26); - s(McEmemArbOverride, 10:10, scratch168, 27:27); - s(McEmemArbOverride, 4:4, scratch168, 28:28); - s(McEmemArbOverride, 3:3, scratch168, 29:29); - s(EmcPmacroTxPwrd3, 5:4, scratch168, 31:30); - s(EmcXm2CompPadCtrl3, 17:0, scratch169, 17:0); - s(EmcRext, 4:0, scratch169, 22:18); - s(EmcTClkStop, 4:0, scratch169, 27:23); - s(EmcPmacroTxPwrd3, 9:6, scratch169, 31:28); - s(EmcZcalWaitCnt, 10:0, scratch170, 10:0); - s(EmcZcalWaitCnt, 21:16, scratch170, 16:11); - s(EmcZcalWaitCnt, 31:31, scratch170, 17:17); - s(EmcWext, 4:0, scratch170, 22:18); - s(EmcRefctrl2, 0:0, scratch170, 23:23); - s(EmcRefctrl2, 26:24, scratch170, 26:24); - s(EmcRefctrl2, 31:31, scratch170, 27:27); - s(EmcPmacroTxPwrd3, 13:10, scratch170, 31:28); - s(EmcZcalMrwCmd, 7:0, scratch171, 7:0); - s(EmcZcalMrwCmd, 23:16, scratch171, 15:8); - s(EmcZcalMrwCmd, 31:30, scratch171, 17:16); - s(EmcWeDuration, 4:0, scratch171, 22:18); - s(EmcWsDuration, 4:0, scratch171, 27:23); - s(EmcPmacroTxPwrd3, 19:16, scratch171, 31:28); - s(EmcSwizzleRank0Byte0, 2:0, scratch172, 2:0); - s(EmcSwizzleRank0Byte0, 6:4, scratch172, 5:3); - s(EmcSwizzleRank0Byte0, 10:8, scratch172, 8:6); - s(EmcSwizzleRank0Byte0, 14:12, scratch172, 11:9); - s(EmcSwizzleRank0Byte0, 18:16, scratch172, 14:12); - s(EmcSwizzleRank0Byte0, 22:20, scratch172, 17:15); - s(EmcPutermWidth, 31:31, scratch172, 18:18); - s(EmcPutermWidth, 3:0, scratch172, 22:19); - s(McEmemArbTimingRrd, 4:0, scratch172, 27:23); - s(EmcPmacroTxPwrd3, 23:20, scratch172, 31:28); - s(EmcSwizzleRank0Byte1, 2:0, scratch173, 2:0); - s(EmcSwizzleRank0Byte1, 6:4, scratch173, 5:3); - s(EmcSwizzleRank0Byte1, 10:8, scratch173, 8:6); - s(EmcSwizzleRank0Byte1, 14:12, scratch173, 11:9); - s(EmcSwizzleRank0Byte1, 18:16, scratch173, 14:12); - s(EmcSwizzleRank0Byte1, 22:20, scratch173, 17:15); - s(McEmemArbTimingR2R, 4:0, scratch173, 22:18); - s(McEmemArbTimingW2W, 4:0, scratch173, 27:23); - s(EmcPmacroTxPwrd3, 27:24, scratch173, 31:28); - s(EmcSwizzleRank0Byte2, 2:0, scratch174, 2:0); - s(EmcSwizzleRank0Byte2, 6:4, scratch174, 5:3); - s(EmcSwizzleRank0Byte2, 10:8, scratch174, 8:6); - s(EmcSwizzleRank0Byte2, 14:12, scratch174, 11:9); - s(EmcSwizzleRank0Byte2, 18:16, scratch174, 14:12); - s(EmcSwizzleRank0Byte2, 22:20, scratch174, 17:15); - s(EmcPmacroTxPwrd3, 29:28, scratch174, 19:18); - s(EmcPmacroTxSelClkSrc0, 11:0, scratch174, 31:20); - s(EmcSwizzleRank0Byte3, 2:0, scratch175, 2:0); - s(EmcSwizzleRank0Byte3, 6:4, scratch175, 5:3); - s(EmcSwizzleRank0Byte3, 10:8, scratch175, 8:6); - s(EmcSwizzleRank0Byte3, 14:12, scratch175, 11:9); - s(EmcSwizzleRank0Byte3, 18:16, scratch175, 14:12); - s(EmcSwizzleRank0Byte3, 22:20, scratch175, 17:15); - s(EmcPmacroTxSelClkSrc0, 27:16, scratch175, 29:18); - s(EmcPmacroTxSelClkSrc1, 1:0, scratch175, 31:30); - s(EmcSwizzleRank1Byte0, 2:0, scratch176, 2:0); - s(EmcSwizzleRank1Byte0, 6:4, scratch176, 5:3); - s(EmcSwizzleRank1Byte0, 10:8, scratch176, 8:6); - s(EmcSwizzleRank1Byte0, 14:12, scratch176, 11:9); - s(EmcSwizzleRank1Byte0, 18:16, scratch176, 14:12); - s(EmcSwizzleRank1Byte0, 22:20, scratch176, 17:15); - s(EmcPmacroTxSelClkSrc1, 11:2, scratch176, 27:18); - s(EmcPmacroTxSelClkSrc1, 19:16, scratch176, 31:28); - s(EmcSwizzleRank1Byte1, 2:0, scratch177, 2:0); - s(EmcSwizzleRank1Byte1, 6:4, scratch177, 5:3); - s(EmcSwizzleRank1Byte1, 10:8, scratch177, 8:6); - s(EmcSwizzleRank1Byte1, 14:12, scratch177, 11:9); - s(EmcSwizzleRank1Byte1, 18:16, scratch177, 14:12); - s(EmcSwizzleRank1Byte1, 22:20, scratch177, 17:15); - s(EmcPmacroTxSelClkSrc1, 27:20, scratch177, 25:18); - s(EmcPmacroTxSelClkSrc3, 5:0, scratch177, 31:26); - s(EmcSwizzleRank1Byte2, 2:0, scratch178, 2:0); - s(EmcSwizzleRank1Byte2, 6:4, scratch178, 5:3); - s(EmcSwizzleRank1Byte2, 10:8, scratch178, 8:6); - s(EmcSwizzleRank1Byte2, 14:12, scratch178, 11:9); - s(EmcSwizzleRank1Byte2, 18:16, scratch178, 14:12); - s(EmcSwizzleRank1Byte2, 22:20, scratch178, 17:15); - s(EmcPmacroTxSelClkSrc3, 11:6, scratch178, 23:18); - s(EmcPmacroTxSelClkSrc3, 23:16, scratch178, 31:24); - s(EmcSwizzleRank1Byte3, 2:0, scratch179, 2:0); - s(EmcSwizzleRank1Byte3, 6:4, scratch179, 5:3); - s(EmcSwizzleRank1Byte3, 10:8, scratch179, 8:6); - s(EmcSwizzleRank1Byte3, 14:12, scratch179, 11:9); - s(EmcSwizzleRank1Byte3, 18:16, scratch179, 14:12); - s(EmcSwizzleRank1Byte3, 22:20, scratch179, 17:15); - s(EmcPmacroTxSelClkSrc3, 27:24, scratch179, 21:18); - s(EmcPmacroTxSelClkSrc2, 9:0, scratch179, 31:22); - s(EmcPmacroCmdBrickCtrlFdpd, 17:0, scratch180, 17:0); - s(EmcPmacroTxSelClkSrc2, 11:10, scratch180, 19:18); - s(EmcPmacroTxSelClkSrc2, 27:16, scratch180, 31:20); - s(EmcPmacroDataBrickCtrlFdpd, 17:0, scratch181, 17:0); - s(EmcPmacroTxSelClkSrc4, 11:0, scratch181, 29:18); - s(EmcPmacroTxSelClkSrc4, 17:16, scratch181, 31:30); - s(EmcFbioCfg7, 16:0, scratch182, 16:0); - s(McEmemArbRefpbBankCtrl, 6:0, scratch182, 23:17); - s(McEmemArbRefpbBankCtrl, 14:8, scratch182, 30:24); - s(McEmemArbRefpbBankCtrl, 31:31, scratch182, 31:31); - s(EmcDynSelfRefControl, 15:0, scratch183, 15:0); - s(EmcDynSelfRefControl, 31:31, scratch183, 16:16); - s(EmcPmacroTxSelClkSrc4, 27:18, scratch183, 26:17); - s(EmcPmacroTxSelClkSrc5, 4:0, scratch183, 31:27); - s(EmcDllCfg1, 16:0, scratch184, 16:0); - s(EmcPmacroTxSelClkSrc5, 11:5, scratch184, 23:17); - s(EmcPmacroTxSelClkSrc5, 23:16, scratch184, 31:24); - s(EmcPmacroPadCfgCtrl, 1:0, scratch185, 1:0); - s(EmcPmacroPadCfgCtrl, 6:5, scratch185, 3:2); - s(EmcPmacroPadCfgCtrl, 11:9, scratch185, 6:4); - s(EmcPmacroPadCfgCtrl, 13:13, scratch185, 7:7); - s(EmcPmacroPadCfgCtrl, 17:16, scratch185, 9:8); - s(EmcPmacroPadCfgCtrl, 21:20, scratch185, 11:10); - s(EmcPmacroPadCfgCtrl, 25:24, scratch185, 13:12); - s(EmcPmacroPadCfgCtrl, 30:28, scratch185, 16:14); - s(EmcPmacroTxSelClkSrc5, 27:24, scratch185, 20:17); - s(EmcPmacroCmdPadTxCtrl, 1:0, scratch185, 22:21); - s(EmcPmacroCmdPadTxCtrl, 5:4, scratch185, 24:23); - s(EmcPmacroCmdPadTxCtrl, 9:8, scratch185, 26:25); - s(EmcPmacroCmdPadTxCtrl, 13:12, scratch185, 28:27); - s(EmcPmacroCmdPadTxCtrl, 16:16, scratch185, 29:29); - s(EmcPmacroCmdPadTxCtrl, 21:20, scratch185, 31:30); - s(EmcRefresh, 15:0, scratch186, 15:0); - s(EmcCmdQ, 4:0, scratch186, 20:16); - s(EmcCmdQ, 10:8, scratch186, 23:21); - s(EmcCmdQ, 14:12, scratch186, 26:24); - s(EmcCmdQ, 28:24, scratch186, 31:27); - s(EmcAcpdControl, 15:0, scratch187, 15:0); - s(EmcAutoCalVrefSel1, 15:0, scratch187, 31:16); - s(EmcXm2CompPadCtrl, 1:0, scratch188, 1:0); - s(EmcXm2CompPadCtrl, 6:3, scratch188, 5:2); - s(EmcXm2CompPadCtrl, 9:9, scratch188, 6:6); - s(EmcXm2CompPadCtrl, 19:11, scratch188, 15:7); - s(EmcCfgDigDllPeriod, 15:0, scratch188, 31:16); - s(EmcCfgDigDll_1, 15:0, scratch189, 15:0); - s(EmcPreRefreshReqCnt, 15:0, scratch189, 31:16); - s(EmcPmacroCmdPadTxCtrl, 27:24, scratch190, 19:16); - s(EmcPmacroDataPadTxCtrl, 1:0, scratch190, 21:20); - s(EmcPmacroDataPadTxCtrl, 5:4, scratch190, 23:22); - s(EmcPmacroDataPadTxCtrl, 9:8, scratch190, 25:24); - s(EmcPmacroDataPadTxCtrl, 13:12, scratch190, 27:26); - s(EmcPmacroDataPadTxCtrl, 16:16, scratch190, 28:28); - s(EmcPmacroDataPadTxCtrl, 21:20, scratch190, 30:29); - s(EmcPmacroDataPadTxCtrl, 24:24, scratch190, 31:31); - s(EmcPmacroDataPadTxCtrl, 27:25, scratch191, 2:0); - - s(EmcPinGpio, 1:0, scratch8, 31:30); - s(EmcPinGpioEn, 1:0, scratch9, 31:30); - s(EmcDevSelect, 1:0, scratch10, 31:30); - s(EmcZcalWarmColdBootEnables, 1:0, scratch11, 31:30); - s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch12, 31:30); - s32(EmcBctSpare13, scratch31); - s32(EmcBctSpare12, scratch32); - s32(EmcBctSpare7, scratch33); - s32(EmcBctSpare6, scratch40); - s32(EmcBctSpare5, scratch42); - s32(EmcBctSpare4, scratch44); - s32(EmcBctSpare3, scratch45); - s32(EmcBctSpare2, scratch46); - s32(EmcBctSpare1, scratch47); - s32(EmcBctSpare0, scratch48); - s32(EmcBctSpare9, scratch50); - s32(EmcBctSpare8, scratch51); - s32(BootRomPatchData, scratch56); - s32(BootRomPatchControl, scratch57); - s(McClkenOverrideAllWarmBoot, 0:0, scratch58, 31:31); - s(EmcClkenOverrideAllWarmBoot, 0:0, scratch59, 30:30); - s(EmcMrsWarmBootEnable, 0:0, scratch59, 31:31); - s(ClearClk2Mc1, 0:0, scratch60, 30:30); - s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch60, 31:31); - s(ClkRstControllerPllmMisc2OverrideEnable, 0:0, scratch61, 30:30); - s(EmcDbgWriteMux, 0:0, scratch61, 31:31); - s(EmcExtraRefreshNum, 2:0, scratch62, 31:29); - s(PmcIoDpd3ReqWait, 2:0, scratch68, 30:28); - s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch68, 31:31); - s(MemoryType, 2:0, scratch69, 30:28); - s(PmcIoDpd4ReqWait, 2:0, scratch70, 30:28); - s(EmcTimingControlWait, 7:0, scratch86, 31:24); - s(EmcZcalWarmBootWait, 7:0, scratch87, 31:24); - s(WarmBootWait, 7:0, scratch88, 31:24); - s(EmcPinProgramWait, 7:0, scratch89, 31:24); - s(EmcAutoCalWait, 9:0, scratch101, 31:22); - s(SwizzleRankByteEncode, 15:0, scratch190, 15:0); - - switch (params->MemoryType) { - case NvBootMemoryType_LpDdr2: - case NvBootMemoryType_LpDdr4: - s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0); - s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8); - s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16); - s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24); - s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0); - s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2); - s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4); - s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6); - s(EmcMrw6, 27:0, scratch8, 27:0); - s(EmcMrw6, 31:30, scratch8, 29:28); - s(EmcMrw8, 27:0, scratch9, 27:0); - s(EmcMrw8, 31:30, scratch9, 29:28); - s(EmcMrw9, 27:0, scratch10, 27:0); - s(EmcMrw9, 31:30, scratch10, 29:28); - s(EmcMrw10, 27:0, scratch11, 27:0); - s(EmcMrw10, 31:30, scratch11, 29:28); - s(EmcMrw12, 27:0, scratch12, 27:0); - s(EmcMrw12, 31:30, scratch12, 29:28); - s(EmcMrw13, 27:0, scratch13, 27:0); - s(EmcMrw13, 31:30, scratch13, 29:28); - s(EmcMrw14, 27:0, scratch14, 27:0); - s(EmcMrw14, 31:30, scratch14, 29:28); - s(EmcMrw1, 7:0, scratch15, 7:0); - s(EmcMrw1, 23:16, scratch15, 15:8); - s(EmcMrw1, 27:26, scratch15, 17:16); - s(EmcMrw1, 31:30, scratch15, 19:18); - s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0); - s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8); - s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16); - s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18); - s(EmcMrw2, 7:0, scratch17, 7:0); - s(EmcMrw2, 23:16, scratch17, 15:8); - s(EmcMrw2, 27:26, scratch17, 17:16); - s(EmcMrw2, 31:30, scratch17, 19:18); - s(EmcMrw3, 7:0, scratch18, 7:0); - s(EmcMrw3, 23:16, scratch18, 15:8); - s(EmcMrw3, 27:26, scratch18, 17:16); - s(EmcMrw3, 31:30, scratch18, 19:18); - s(EmcMrw4, 7:0, scratch19, 7:0); - s(EmcMrw4, 23:16, scratch19, 15:8); - s(EmcMrw4, 27:26, scratch19, 17:16); - s(EmcMrw4, 31:30, scratch19, 19:18); - break; - case NvBootMemoryType_Ddr3: - s(EmcMrs, 13:0, scratch5, 13:0); - s(EmcEmrs, 13:0, scratch5, 27:14); - s(EmcMrs, 21:20, scratch5, 29:28); - s(EmcMrs, 31:30, scratch5, 31:30); - s(EmcEmrs2, 13:0, scratch8, 13:0); - s(EmcEmrs3, 13:0, scratch8, 27:14); - s(EmcEmrs, 21:20, scratch8, 29:28); - s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0); - s(EmcEmrs, 31:30, scratch9, 15:14); - s(EmcEmrs2, 21:20, scratch9, 17:16); - s(EmcEmrs2, 31:30, scratch9, 19:18); - s(EmcEmrs3, 21:20, scratch9, 21:20); - s(EmcEmrs3, 31:30, scratch9, 23:22); - s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24); - s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26); - s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28); - s(EmcMrs, 27:26, scratch10, 1:0); - s(EmcEmrs, 27:26, scratch10, 3:2); - s(EmcEmrs2, 27:26, scratch10, 5:4); - s(EmcEmrs3, 27:26, scratch10, 7:6); - s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8); - s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9); - s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10); - s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11); - break; - default: break; - } - - s32(EmcCmdMappingByte, secure_scratch8); - s32(EmcPmacroBrickMapping0, secure_scratch9); - s32(EmcPmacroBrickMapping1, secure_scratch10); - s32(EmcPmacroBrickMapping2, secure_scratch11); - s32(McVideoProtectGpuOverride0, secure_scratch12); - s(EmcCmdMappingCmd0_0, 6:0, secure_scratch13, 6:0); - s(EmcCmdMappingCmd0_0, 14:8, secure_scratch13, 13:7); - s(EmcCmdMappingCmd0_0, 22:16, secure_scratch13, 20:14); - s(EmcCmdMappingCmd0_0, 30:24, secure_scratch13, 27:21); - s(McVideoProtectBomAdrHi, 1:0, secure_scratch13, 29:28); - s(McVideoProtectWriteAccess, 1:0, secure_scratch13, 31:30); - s(EmcCmdMappingCmd0_1, 6:0, secure_scratch14, 6:0); - s(EmcCmdMappingCmd0_1, 14:8, secure_scratch14, 13:7); - s(EmcCmdMappingCmd0_1, 22:16, secure_scratch14, 20:14); - s(EmcCmdMappingCmd0_1, 30:24, secure_scratch14, 27:21); - s(McSecCarveoutAdrHi, 1:0, secure_scratch14, 29:28); - s(McMtsCarveoutAdrHi, 1:0, secure_scratch14, 31:30); - s(EmcCmdMappingCmd1_0, 6:0, secure_scratch15, 6:0); - s(EmcCmdMappingCmd1_0, 14:8, secure_scratch15, 13:7); - s(EmcCmdMappingCmd1_0, 22:16, secure_scratch15, 20:14); - s(EmcCmdMappingCmd1_0, 30:24, secure_scratch15, 27:21); - s(McGeneralizedCarveout5BomHi, 1:0, secure_scratch15, 29:28); - s(McGeneralizedCarveout3BomHi, 1:0, secure_scratch15, 31:30); - s(EmcCmdMappingCmd1_1, 6:0, secure_scratch16, 6:0); - s(EmcCmdMappingCmd1_1, 14:8, secure_scratch16, 13:7); - s(EmcCmdMappingCmd1_1, 22:16, secure_scratch16, 20:14); - s(EmcCmdMappingCmd1_1, 30:24, secure_scratch16, 27:21); - s(McGeneralizedCarveout2BomHi, 1:0, secure_scratch16, 29:28); - s(McGeneralizedCarveout4BomHi, 1:0, secure_scratch16, 31:30); - s(EmcCmdMappingCmd2_0, 6:0, secure_scratch17, 6:0); - s(EmcCmdMappingCmd2_0, 14:8, secure_scratch17, 13:7); - s(EmcCmdMappingCmd2_0, 22:16, secure_scratch17, 20:14); - s(EmcCmdMappingCmd2_0, 30:24, secure_scratch17, 27:21); - s(McGeneralizedCarveout1BomHi, 1:0, secure_scratch17, 29:28); - s(EmcAdrCfg, 0:0, secure_scratch17, 30:30); - s(EmcFbioSpare, 1:1, secure_scratch17, 31:31); - s(EmcCmdMappingCmd2_1, 6:0, secure_scratch18, 6:0); - s(EmcCmdMappingCmd2_1, 14:8, secure_scratch18, 13:7); - s(EmcCmdMappingCmd2_1, 22:16, secure_scratch18, 20:14); - s(EmcCmdMappingCmd2_1, 30:24, secure_scratch18, 27:21); - s(EmcFbioCfg8, 15:15, secure_scratch18, 28:28); - s(McEmemAdrCfg, 0:0, secure_scratch18, 29:29); - s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch18, 30:30); - s(McMtsCarveoutRegCtrl, 0:0, secure_scratch18, 31:31); - s(EmcCmdMappingCmd3_0, 6:0, secure_scratch19, 6:0); - s(EmcCmdMappingCmd3_0, 14:8, secure_scratch19, 13:7); - s(EmcCmdMappingCmd3_0, 22:16, secure_scratch19, 20:14); - s(EmcCmdMappingCmd3_0, 30:24, secure_scratch19, 27:21); - s(McGeneralizedCarveout2Cfg0, 6:3, secure_scratch19, 31:28); - s(EmcCmdMappingCmd3_1, 6:0, secure_scratch20, 6:0); - s(EmcCmdMappingCmd3_1, 14:8, secure_scratch20, 13:7); - s(EmcCmdMappingCmd3_1, 22:16, secure_scratch20, 20:14); - s(EmcCmdMappingCmd3_1, 30:24, secure_scratch20, 27:21); - s(McGeneralizedCarveout2Cfg0, 10:7, secure_scratch20, 31:28); - s(McGeneralizedCarveout4Cfg0, 26:0, secure_scratch39, 26:0); - s(McGeneralizedCarveout2Cfg0, 17:14, secure_scratch39, 30:27); - s(McVideoProtectVprOverride, 0:0, secure_scratch39, 31:31); - s(McGeneralizedCarveout5Cfg0, 26:0, secure_scratch40, 26:0); - s(McGeneralizedCarveout2Cfg0, 21:18, secure_scratch40, 30:27); - s(McVideoProtectVprOverride, 1:1, secure_scratch40, 31:31); - s(EmcCmdMappingCmd0_2, 6:0, secure_scratch41, 6:0); - s(EmcCmdMappingCmd0_2, 14:8, secure_scratch41, 13:7); - s(EmcCmdMappingCmd0_2, 22:16, secure_scratch41, 20:14); - s(EmcCmdMappingCmd0_2, 27:24, secure_scratch41, 24:21); - s(McGeneralizedCarveout1Cfg0, 6:3, secure_scratch41, 28:25); - s(McGeneralizedCarveout2Cfg0, 13:11, secure_scratch41, 31:29); - s(EmcCmdMappingCmd1_2, 6:0, secure_scratch42, 6:0); - s(EmcCmdMappingCmd1_2, 14:8, secure_scratch42, 13:7); - s(EmcCmdMappingCmd1_2, 22:16, secure_scratch42, 20:14); - s(EmcCmdMappingCmd1_2, 27:24, secure_scratch42, 24:21); - s(McGeneralizedCarveout1Cfg0, 13:7, secure_scratch42, 31:25); - s(EmcCmdMappingCmd2_2, 6:0, secure_scratch43, 6:0); - s(EmcCmdMappingCmd2_2, 14:8, secure_scratch43, 13:7); - s(EmcCmdMappingCmd2_2, 22:16, secure_scratch43, 20:14); - s(EmcCmdMappingCmd2_2, 27:24, secure_scratch43, 24:21); - s(McGeneralizedCarveout1Cfg0, 17:14, secure_scratch43, 28:25); - s(McGeneralizedCarveout3Cfg0, 13:11, secure_scratch43, 31:29); - s(EmcCmdMappingCmd3_2, 6:0, secure_scratch44, 6:0); - s(EmcCmdMappingCmd3_2, 14:8, secure_scratch44, 13:7); - s(EmcCmdMappingCmd3_2, 22:16, secure_scratch44, 20:14); - s(EmcCmdMappingCmd3_2, 27:24, secure_scratch44, 24:21); - s(McGeneralizedCarveout1Cfg0, 21:18, secure_scratch44, 28:25); - s(McVideoProtectVprOverride, 3:2, secure_scratch44, 30:29); - s(McVideoProtectVprOverride, 6:6, secure_scratch44, 31:31); - s(McEmemAdrCfgChannelMask, 31:9, secure_scratch45, 22:0); - s(McEmemAdrCfgDev0, 2:0, secure_scratch45, 25:23); - s(McEmemAdrCfgDev0, 9:8, secure_scratch45, 27:26); - s(McEmemAdrCfgDev0, 19:16, secure_scratch45, 31:28); - s(McEmemAdrCfgBankMask0, 31:10, secure_scratch46, 21:0); - s(McEmemAdrCfgDev1, 2:0, secure_scratch46, 24:22); - s(McEmemAdrCfgDev1, 9:8, secure_scratch46, 26:25); - s(McEmemAdrCfgDev1, 19:16, secure_scratch46, 30:27); - s(McVideoProtectVprOverride, 7:7, secure_scratch46, 31:31); - s(McEmemAdrCfgBankMask1, 31:10, secure_scratch47, 21:0); - s(McGeneralizedCarveout3Cfg0, 10:3, secure_scratch47, 29:22); - s(McVideoProtectVprOverride, 9:8, secure_scratch47, 31:30); - s(McEmemAdrCfgBankMask2, 31:10, secure_scratch48, 21:0); - s(McGeneralizedCarveout3Cfg0, 21:14, secure_scratch48, 29:22); - s(McVideoProtectVprOverride, 11:11, secure_scratch48, 30:30); - s(McVideoProtectVprOverride, 14:14, secure_scratch48, 31:31); - s(McVideoProtectGpuOverride1, 15:0, secure_scratch49, 15:0); - s(McEmemCfg, 13:0, secure_scratch49, 29:16); - s(McEmemCfg, 31:31, secure_scratch49, 30:30); - s(McVideoProtectVprOverride, 15:15, secure_scratch49, 31:31); - s(McGeneralizedCarveout3Bom, 31:17, secure_scratch50, 14:0); - s(McGeneralizedCarveout1Bom, 31:17, secure_scratch50, 29:15); - s(McVideoProtectVprOverride, 18:17, secure_scratch50, 31:30); - s(McGeneralizedCarveout4Bom, 31:17, secure_scratch51, 14:0); - s(McGeneralizedCarveout2Bom, 31:17, secure_scratch51, 29:15); - s(McVideoProtectVprOverride, 20:19, secure_scratch51, 31:30); - s(McGeneralizedCarveout5Bom, 31:17, secure_scratch52, 14:0); - s(McVideoProtectBom, 31:20, secure_scratch52, 26:15); - s(McVideoProtectVprOverride, 23:21, secure_scratch52, 29:27); - s(McVideoProtectVprOverride, 26:26, secure_scratch52, 30:30); - s(McVideoProtectVprOverride, 29:29, secure_scratch52, 31:31); - s(McVideoProtectSizeMb, 11:0, secure_scratch53, 11:0); - s(McSecCarveoutBom, 31:20, secure_scratch53, 23:12); - s(McVideoProtectVprOverride, 31:30, secure_scratch53, 25:24); - s(McVideoProtectVprOverride1, 1:0, secure_scratch53, 27:26); - s(McVideoProtectVprOverride1, 7:4, secure_scratch53, 31:28); - s(McSecCarveoutSizeMb, 11:0, secure_scratch54, 11:0); - s(McMtsCarveoutBom, 31:20, secure_scratch54, 23:12); - s(McVideoProtectVprOverride1, 15:8, secure_scratch54, 31:24); - s(McMtsCarveoutSizeMb, 11:0, secure_scratch55, 11:0); - s(McGeneralizedCarveout4Size128kb, 11:0, secure_scratch55, 23:12); - s(McVideoProtectVprOverride1, 16:16, secure_scratch55, 24:24); - s(McGeneralizedCarveout2Cfg0, 2:0, secure_scratch55, 27:25); - s(McGeneralizedCarveout2Cfg0, 25:22, secure_scratch55, 31:28); - s(McGeneralizedCarveout3Size128kb, 11:0, secure_scratch56, 11:0); - s(McGeneralizedCarveout2Size128kb, 11:0, secure_scratch56, 23:12); - s(McGeneralizedCarveout2Cfg0, 26:26, secure_scratch56, 24:24); - s(McGeneralizedCarveout1Cfg0, 2:0, secure_scratch56, 27:25); - s(McGeneralizedCarveout1Cfg0, 25:22, secure_scratch56, 31:28); - s(McGeneralizedCarveout1Size128kb, 11:0, secure_scratch57, 11:0); - s(McGeneralizedCarveout5Size128kb, 11:0, secure_scratch57, 23:12); - s(McGeneralizedCarveout1Cfg0, 26:26, secure_scratch57, 24:24); - s(McGeneralizedCarveout3Cfg0, 2:0, secure_scratch57, 27:25); - s(McGeneralizedCarveout3Cfg0, 25:22, secure_scratch57, 31:28); - s(McGeneralizedCarveout3Cfg0, 26:26, secure_scratch58, 0:0); - - s32(McGeneralizedCarveout1Access0, secure_scratch59); - s32(McGeneralizedCarveout1Access1, secure_scratch60); - s32(McGeneralizedCarveout1Access2, secure_scratch61); - s32(McGeneralizedCarveout1Access3, secure_scratch62); - s32(McGeneralizedCarveout1Access4, secure_scratch63); - s32(McGeneralizedCarveout2Access0, secure_scratch64); - s32(McGeneralizedCarveout2Access1, secure_scratch65); - s32(McGeneralizedCarveout2Access2, secure_scratch66); - s32(McGeneralizedCarveout2Access3, secure_scratch67); - s32(McGeneralizedCarveout2Access4, secure_scratch68); - s32(McGeneralizedCarveout3Access0, secure_scratch69); - s32(McGeneralizedCarveout3Access1, secure_scratch70); - s32(McGeneralizedCarveout3Access2, secure_scratch71); - s32(McGeneralizedCarveout3Access3, secure_scratch72); - s32(McGeneralizedCarveout3Access4, secure_scratch73); - s32(McGeneralizedCarveout4Access0, secure_scratch74); - s32(McGeneralizedCarveout4Access1, secure_scratch75); - s32(McGeneralizedCarveout4Access2, secure_scratch76); - s32(McGeneralizedCarveout4Access3, secure_scratch77); - s32(McGeneralizedCarveout4Access4, secure_scratch78); - s32(McGeneralizedCarveout5Access0, secure_scratch79); - s32(McGeneralizedCarveout5Access1, secure_scratch80); - s32(McGeneralizedCarveout5Access2, secure_scratch81); - s32(McGeneralizedCarveout5Access3, secure_scratch82); - s32(McGeneralizedCarveout1ForceInternalAccess0, secure_scratch84); - s32(McGeneralizedCarveout1ForceInternalAccess1, secure_scratch85); - s32(McGeneralizedCarveout1ForceInternalAccess2, secure_scratch86); - s32(McGeneralizedCarveout1ForceInternalAccess3, secure_scratch87); - s32(McGeneralizedCarveout1ForceInternalAccess4, secure_scratch88); - s32(McGeneralizedCarveout2ForceInternalAccess0, secure_scratch89); - s32(McGeneralizedCarveout2ForceInternalAccess1, secure_scratch90); - s32(McGeneralizedCarveout2ForceInternalAccess2, secure_scratch91); - s32(McGeneralizedCarveout2ForceInternalAccess3, secure_scratch92); - s32(McGeneralizedCarveout2ForceInternalAccess4, secure_scratch93); - s32(McGeneralizedCarveout3ForceInternalAccess0, secure_scratch94); - s32(McGeneralizedCarveout3ForceInternalAccess1, secure_scratch95); - s32(McGeneralizedCarveout3ForceInternalAccess2, secure_scratch96); - s32(McGeneralizedCarveout3ForceInternalAccess3, secure_scratch97); - s32(McGeneralizedCarveout3ForceInternalAccess4, secure_scratch98); - s32(McGeneralizedCarveout4ForceInternalAccess0, secure_scratch99); - s32(McGeneralizedCarveout4ForceInternalAccess1, secure_scratch100); - s32(McGeneralizedCarveout4ForceInternalAccess2, secure_scratch101); - s32(McGeneralizedCarveout4ForceInternalAccess3, secure_scratch102); - s32(McGeneralizedCarveout4ForceInternalAccess4, secure_scratch103); - s32(McGeneralizedCarveout5ForceInternalAccess0, secure_scratch104); - s32(McGeneralizedCarveout5ForceInternalAccess1, secure_scratch105); - s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106); - s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107); - - c32(0, scratch2); - s(PllMInputDivider, 7:0, scratch2, 7:0); - s(PllMFeedbackDivider, 7:0, scratch2, 15:8); - s(PllMPostDivider, 4:0, scratch2, 20:16); - s(PllMKVCO, 0:0, scratch2, 21:21); - s(PllMKCP, 1:0, scratch2, 23:22); - - c32(0, scratch35); - s(PllMSetupControl, 15:0, scratch35, 15:0); - - c32(0, scratch3); - s(PllMInputDivider, 7:0, scratch3, 7:0); - c(0x3e, scratch3, 15:8); - c(0, scratch3, 20:16); - s(PllMKVCO, 0:0, scratch3, 21:21); - s(PllMKCP, 1:0, scratch3, 23:22); - - c32(0, scratch36); - s(PllMSetupControl, 23:0, scratch36, 23:0); - - c32(0, scratch4); - s(PllMStableTime, 9:0, scratch4, 9:0); -} - -static void sdram_save_params_mariko(const void *save_params) { - const sdram_params_mariko_t *params = (const sdram_params_mariko_t *)save_params; - volatile tegra_pmc_t *pmc = pmc_get_regs(); - -#define pack(src, src_bits, dst, dst_bits) { \ - uint32_t mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \ - dst &= ~(mask << (0 ? dst_bits)); \ - dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \ -} - -#define s(param, src_bits, pmcreg, dst_bits) \ - pack(params->param, src_bits, pmc->pmcreg, dst_bits) - -#define c(value, pmcreg, dst_bits) \ - pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits) - -/* 32 bits version of s macro. */ -#define s32(param, pmcreg) pmc->pmcreg = params->param - -/* 32 bits version c macro. */ -#define c32(value, pmcreg) pmc->pmcreg = value - - /* Patch carveout parameters. */ - *(volatile uint32_t *)¶ms->McGeneralizedCarveout1Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout2Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout3Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout4Cfg0 = 0; - *(volatile uint32_t *)¶ms->McGeneralizedCarveout5Cfg0 = 0; - - /* Patch SDRAM parameters. */ - *(volatile uint32_t *)¶ms->SwizzleRankByteEncode = 0; - uint32_t t0 = params->EmcSwizzleRank0Byte0 << 5 >> 29 > params->EmcSwizzleRank0Byte0 << 1 >> 29; - uint32_t t1 = (t0 & 0xFFFFFFEF) | ((params->EmcSwizzleRank1Byte0 << 5 >> 29 > params->EmcSwizzleRank1Byte0 << 1 >> 29) << 4); - uint32_t t2 = (t1 & 0xFFFFFFFD) | ((params->EmcSwizzleRank0Byte1 << 5 >> 29 > params->EmcSwizzleRank0Byte1 << 1 >> 29) << 1); - uint32_t t3 = (t2 & 0xFFFFFFDF) | ((params->EmcSwizzleRank1Byte1 << 5 >> 29 > params->EmcSwizzleRank1Byte1 << 1 >> 29) << 5); - uint32_t t4 = (t3 & 0xFFFFFFFB) | ((params->EmcSwizzleRank0Byte2 << 5 >> 29 > params->EmcSwizzleRank0Byte2 << 1 >> 29) << 2); - uint32_t t5 = (t4 & 0xFFFFFFBF) | ((params->EmcSwizzleRank1Byte2 << 5 >> 29 > params->EmcSwizzleRank1Byte2 << 1 >> 29) << 6); - uint32_t t6 = (t5 & 0xFFFFFFF7) | ((params->EmcSwizzleRank0Byte3 << 5 >> 29 > params->EmcSwizzleRank0Byte3 << 1 >> 29) << 3); - uint32_t t7 = (t6 & 0xFFFFFF7F) | ((params->EmcSwizzleRank1Byte3 << 5 >> 29 > params->EmcSwizzleRank1Byte3 << 1 >> 29) << 7); - *(volatile uint32_t *)¶ms->SwizzleRankByteEncode = t7; - *(volatile uint32_t *)¶ms->EmcBctSpare2 = 0x40000DD8; - *(volatile uint32_t *)¶ms->EmcBctSpare3 = t7; - - s(EmcClockSource, 7:0, scratch6, 15:8); - s(EmcClockSourceDll, 7:0, scratch6, 23:16); - s(EmcClockSource, 31:29, scratch6, 26:24); - s(EmcClockSourceDll, 31:29, scratch6, 29:27); - s(EmcClockSourceDll, 11:10, scratch6, 31:30); - s(ClkRstControllerPllmMisc2Override, 9:8, scratch7, 1:0); - s(ClkRstControllerPllmMisc2Override, 2:1, scratch7, 3:2); - s(EmcZqCalLpDdr4WarmBoot, 31:30, scratch7, 5:4); - s(EmcClockSource, 27:27, scratch7, 6:6); - s(EmcClockSource, 26:26, scratch7, 7:7); - s(EmcClockSource, 15:15, scratch7, 8:8); - s(EmcClockSource, 25:25, scratch7, 9:9); - s(EmcClockSource, 19:19, scratch7, 10:10); - s(EmcClockSource, 20:20, scratch7, 11:11); - s(EmcClockSource, 16:16, scratch7, 12:12); - s(ClkRstControllerPllmMisc2Override, 13:13, scratch7, 13:13); - s(ClkRstControllerPllmMisc2Override, 12:12, scratch7, 14:14); - s(ClkRstControllerPllmMisc2Override, 11:11, scratch7, 15:15); - s(ClkRstControllerPllmMisc2Override, 10:10, scratch7, 16:16); - s(ClkRstControllerPllmMisc2Override, 5:5, scratch7, 17:17); - s(ClkRstControllerPllmMisc2Override, 4:4, scratch7, 18:18); - s(ClkRstControllerPllmMisc2Override, 3:3, scratch7, 19:19); - s(ClkRstControllerPllmMisc2Override, 0:0, scratch7, 20:20); - s(EmcZqCalLpDdr4WarmBoot, 1:0, scratch7, 22:21); - s(EmcZqCalLpDdr4WarmBoot, 4:4, scratch7, 23:23); - s(EmcRc, 7:0, scratch7, 31:24); - s(EmcPmacroBgBiasCtrl0, 13:12, scratch8, 31:30); - s(EmcFdpdCtrlCmdNoRamp, 0:0, scratch14, 30:30); - s(EmcCfgPipeClk, 0:0, scratch14, 31:31); - s(EmcQRst, 6:0, scratch15, 26:20); - s(EmcQRst, 20:16, scratch15, 31:27); - s(EmcPmacroCmdTxDrv, 5:0, scratch16, 25:20); - s(EmcPmacroCmdTxDrv, 13:8, scratch16, 31:26); - s(EmcFbioCfg8, 27:16, scratch17, 31:20); - s(EmcTxsrDll, 11:0, scratch18, 31:20); - s(EmcTxdsrvttgen, 11:0, scratch19, 31:20); - s32(EmcCfgRsv,scratch22); - s32(EmcAutoCalConfig, scratch23); - s32(EmcAutoCalVrefSel0, scratch24); - s32(EmcPmacroBrickCtrlRfu1, scratch25); - s32(EmcPmacroBrickCtrlRfu2, scratch26); - s32(EmcPmcScratch1, scratch27); - s32(EmcPmcScratch2, scratch28); - s32(EmcPmcScratch3, scratch29); - s32(EmcPmacroPerbitRfuCtrl0, scratch30); - s32(EmcPmacroPerbitRfuCtrl1, scratch31); - s32(EmcPmacroPerbitRfuCtrl2, scratch32); - s32(EmcPmacroPerbitRfuCtrl3, scratch33); - s32(EmcPmacroPerbitRfuCtrl4, scratch40); - s32(EmcPmacroPerbitRfuCtrl5, scratch42); - s32(McEmemArbDaTurns, scratch44); - s(EmcFbioSpare, 31:24, scratch64, 7:0); - s(EmcFbioSpare, 23:16, scratch64, 15:8); - s(EmcFbioSpare, 15:8, scratch64, 23:16); - s(EmcFbioSpare, 7:2, scratch64, 29:24); - s(EmcFbioSpare, 0:0, scratch64, 30:30); - s(McEmemArbMisc2, 0:0, scratch64, 31:31); - s(McEmemArbMisc0, 14:0, scratch65, 14:0); - s(McEmemArbMisc0, 30:16, scratch65, 29:15); - s(McDaCfg0, 0:0, scratch65, 30:30); - s(EmcFdpdCtrlCmd, 16:0, scratch66, 16:0); - s(EmcFdpdCtrlCmd, 31:20, scratch66, 28:17); - s(EmcAutoCalConfig2, 27:0, scratch67, 27:0); - s(EmcBurstRefreshNum, 3:0, scratch67, 31:28); - s(EmcCfgDigDll, 10:0, scratch68, 10:0); - s(EmcCfgDigDll, 25:12, scratch68, 24:11); - s(EmcCfgDigDll, 27:27, scratch68, 25:25); - s(EmcCfgDigDll, 31:30, scratch68, 27:26); - s(EmcTppd, 3:0, scratch68, 31:28); - s(EmcFdpdCtrlDq, 16:0, scratch69, 16:0); - s(EmcFdpdCtrlDq, 28:20, scratch69, 25:17); - s(EmcFdpdCtrlDq, 31:30, scratch69, 27:26); - s(EmcR2r, 3:0, scratch69, 31:28); - s(EmcPmacroIbVrefDq_0, 6:0, scratch70, 6:0); - s(EmcPmacroIbVrefDq_0, 14:8, scratch70, 13:7); - s(EmcPmacroIbVrefDq_0, 22:16, scratch70, 20:14); - s(EmcPmacroIbVrefDq_0, 30:24, scratch70, 27:21); - s(EmcW2w, 3:0, scratch70, 31:28); - s(EmcPmacroIbVrefDq_1, 6:0, scratch71, 6:0); - s(EmcPmacroIbVrefDq_1, 14:8, scratch71, 13:7); - s(EmcPmacroIbVrefDq_1, 22:16, scratch71, 20:14); - s(EmcPmacroIbVrefDq_1, 30:24, scratch71, 27:21); - s(EmcPmacroVttgenCtrl0, 19:16, scratch71, 31:28); - s(EmcPmacroIbVrefDqs_0, 6:0, scratch72, 6:0); - s(EmcPmacroIbVrefDqs_0, 14:8, scratch72, 13:7); - s(EmcPmacroIbVrefDqs_0, 22:16, scratch72, 20:14); - s(EmcPmacroIbVrefDqs_0, 30:24, scratch72, 27:21); - s(EmcPmacroIbVrefDqs_0, 6:0, scratch73, 6:0); - s(EmcPmacroIbVrefDqs_0, 14:8, scratch73, 13:7); - s(EmcPmacroIbVrefDqs_0, 22:16, scratch73, 20:14); - s(EmcPmacroIbVrefDqs_0, 30:24, scratch73, 27:21); - s(EmcPmacroDdllShortCmd_0, 6:0, scratch74, 6:0); - s(EmcPmacroDdllShortCmd_0, 14:8, scratch74, 13:7); - s(EmcPmacroDdllShortCmd_0, 22:16, scratch74, 20:14); - s(EmcPmacroDdllShortCmd_0, 30:24, scratch74, 27:21); - s(EmcPmacroDdllShortCmd_1, 6:0, scratch75, 6:0); - s(EmcPmacroDdllShortCmd_1, 14:8, scratch75, 13:7); - s(EmcPmacroDdllShortCmd_1, 22:16, scratch75, 20:14); - s(EmcPmacroDdllShortCmd_1, 30:24, scratch75, 27:21); - s(EmcPmacroDllCfg0, 29:4, scratch76, 25:0); - s(EmcRp, 5:0, scratch76, 31:26); - s(EmcPmacroTxPwrd0, 10:0, scratch77, 10:0); - s(EmcPmacroTxPwrd0, 13:12, scratch77, 12:11); - s(EmcPmacroTxPwrd0, 26:16, scratch77, 23:13); - s(EmcPmacroTxPwrd0, 29:28, scratch77, 25:24); - s(EmcR2w, 5:0, scratch77, 31:26); - s(EmcPmacroTxPwrd1, 10:0, scratch78, 10:0); - s(EmcPmacroTxPwrd1, 13:12, scratch78, 12:11); - s(EmcPmacroTxPwrd1, 26:16, scratch78, 23:13); - s(EmcPmacroTxPwrd1, 29:28, scratch78, 25:24); - s(EmcW2r, 5:0, scratch78, 31:26); - s(EmcPmacroTxPwrd2, 10:0, scratch79, 10:0); - s(EmcPmacroTxPwrd2, 13:12, scratch79, 12:11); - s(EmcPmacroTxPwrd2, 26:16, scratch79, 23:13); - s(EmcPmacroTxPwrd2, 29:28, scratch79, 25:24); - s(EmcR2p, 5:0, scratch79, 31:26); - s(EmcPmacroTxPwrd3, 10:0, scratch80, 10:0); - s(EmcPmacroTxPwrd3, 13:12, scratch80, 12:11); - s(EmcPmacroTxPwrd3, 26:16, scratch80, 23:13); - s(EmcPmacroTxPwrd3, 29:28, scratch80, 25:24); - s(EmcCcdmw, 5:0, scratch80, 31:26); - s(EmcPmacroTxPwrd4, 10:0, scratch81, 10:0); - s(EmcPmacroTxPwrd4, 13:12, scratch81, 12:11); - s(EmcPmacroTxPwrd4, 26:16, scratch81, 23:13); - s(EmcPmacroTxPwrd4, 29:28, scratch81, 25:24); - s(EmcRdRcd, 5:0, scratch81, 31:26); - s(EmcPmacroTxPwrd5, 10:0, scratch82, 10:0); - s(EmcPmacroTxPwrd5, 13:12, scratch82, 12:11); - s(EmcPmacroTxPwrd5, 26:16, scratch82, 23:13); - s(EmcPmacroTxPwrd5, 29:28, scratch82, 25:24); - s(EmcWrRcd, 5:0, scratch82, 31:26); - s(EmcAutoCalChannel, 5:0, scratch83, 5:0); - s(EmcAutoCalChannel, 11:8, scratch83, 9:6); - s(EmcAutoCalChannel, 27:16, scratch83, 21:10); - s(EmcAutoCalChannel, 31:29, scratch83, 24:22); - s(EmcConfigSampleDelay, 6:0, scratch83, 31:25); - s(EmcPmacroRxTerm, 5:0, scratch84, 5:0); - s(EmcPmacroRxTerm, 13:8, scratch84, 11:6); - s(EmcPmacroRxTerm, 21:16, scratch84, 17:12); - s(EmcPmacroRxTerm, 29:24, scratch84, 23:18); - s(EmcSelDpdCtrl, 5:2, scratch84, 27:24); - s(EmcSelDpdCtrl, 8:8, scratch84, 28:28); - s(EmcSelDpdCtrl, 18:16, scratch84, 31:29); - s(EmcPmacroDqTxDrv, 5:0, scratch85, 5:0); - s(EmcPmacroDqTxDrv, 13:8, scratch85, 11:6); - s(EmcPmacroDqTxDrv, 21:16, scratch85, 17:12); - s(EmcPmacroDqTxDrv, 29:24, scratch85, 23:18); - s(EmcObdly, 5:0, scratch85, 29:24); - s(EmcObdly, 29:28, scratch85, 31:30); - s(EmcPmacroCaTxDrv, 5:0, scratch86, 5:0); - s(EmcPmacroCaTxDrv, 13:8, scratch86, 11:6); - s(EmcPmacroCaTxDrv, 21:16, scratch86, 17:12); - s(EmcPmacroCaTxDrv, 29:24, scratch86, 23:18); - s(EmcPmacroVttgenCtrl1, 15:10, scratch86, 29:24); - s(EmcPmacroVttgenCtrl1, 21:20, scratch86, 31:30); - s(EmcPmacroZctrl, 27:4, scratch87, 23:0); - s(EmcPmacroVttgenCtrl2, 23:16, scratch87, 31:24); - s(EmcZcalInterval, 23:10, scratch88, 13:0); - s(EmcZcalInterval, 9:0, scratch88, 23:14); - s(McEmemArbTimingRc, 7:0, scratch88, 31:24); - s(EmcDataBrlshft0, 23:0, scratch89, 23:0); - s(McEmemArbRsv, 7:0, scratch89, 31:24); - s(EmcDataBrlshft1, 23:0, scratch90, 23:0); - s(EmcDqsBrlshft0, 23:0, scratch91, 23:0); - s(EmcDqsBrlshft1, 23:0, scratch92, 23:0); - s(EmcSwizzleRank0Byte0, 2:0, scratch93, 2:0); - s(EmcSwizzleRank0Byte0, 6:4, scratch93, 5:3); - s(EmcSwizzleRank0Byte0, 10:8, scratch93, 8:6); - s(EmcSwizzleRank0Byte0, 14:12, scratch93, 11:9); - s(EmcSwizzleRank0Byte0, 18:16, scratch93, 14:12); - s(EmcSwizzleRank0Byte0, 22:20, scratch93, 17:15); - s(EmcSwizzleRank0Byte0, 26:24, scratch93, 20:18); - s(EmcSwizzleRank0Byte0, 30:28, scratch93, 23:21); - s(EmcSwizzleRank0Byte1, 2:0, scratch94, 2:0); - s(EmcSwizzleRank0Byte1, 6:4, scratch94, 5:3); - s(EmcSwizzleRank0Byte1, 10:8, scratch94, 8:6); - s(EmcSwizzleRank0Byte1, 14:12, scratch94, 11:9); - s(EmcSwizzleRank0Byte1, 18:16, scratch94, 14:12); - s(EmcSwizzleRank0Byte1, 22:20, scratch94, 17:15); - s(EmcSwizzleRank0Byte1, 26:24, scratch94, 20:18); - s(EmcSwizzleRank0Byte1, 30:28, scratch94, 23:21); - s(EmcRas, 6:0, scratch94, 30:24); - s(EmcCfg, 4:4, scratch94, 31:31); - s(EmcSwizzleRank0Byte2, 2:0, scratch95, 2:0); - s(EmcSwizzleRank0Byte2, 6:4, scratch95, 5:3); - s(EmcSwizzleRank0Byte2, 10:8, scratch95, 8:6); - s(EmcSwizzleRank0Byte2, 14:12, scratch95, 11:9); - s(EmcSwizzleRank0Byte2, 18:16, scratch95, 14:12); - s(EmcSwizzleRank0Byte2, 22:20, scratch95, 17:15); - s(EmcSwizzleRank0Byte2, 26:24, scratch95, 20:18); - s(EmcSwizzleRank0Byte2, 30:28, scratch95, 23:21); - s(EmcW2p, 6:0, scratch95, 30:24); - s(EmcCfg, 5:5, scratch95, 31:31); - s(EmcSwizzleRank0Byte3, 2:0, scratch96, 2:0); - s(EmcSwizzleRank0Byte3, 6:4, scratch96, 5:3); - s(EmcSwizzleRank0Byte3, 10:8, scratch96, 8:6); - s(EmcSwizzleRank0Byte3, 14:12, scratch96, 11:9); - s(EmcSwizzleRank0Byte3, 18:16, scratch96, 14:12); - s(EmcSwizzleRank0Byte3, 22:20, scratch96, 17:15); - s(EmcSwizzleRank0Byte3, 26:24, scratch96, 20:18); - s(EmcSwizzleRank0Byte3, 30:28, scratch96, 23:21); - s(EmcQSafe, 6:0, scratch96, 30:24); - s(EmcCfg, 6:6, scratch96, 31:31); - s(EmcSwizzleRank1Byte0, 2:0, scratch97, 2:0); - s(EmcSwizzleRank1Byte0, 6:4, scratch97, 5:3); - s(EmcSwizzleRank1Byte0, 10:8, scratch97, 8:6); - s(EmcSwizzleRank1Byte0, 14:12, scratch97, 11:9); - s(EmcSwizzleRank1Byte0, 18:16, scratch97, 14:12); - s(EmcSwizzleRank1Byte0, 22:20, scratch97, 17:15); - s(EmcSwizzleRank1Byte0, 26:24, scratch97, 20:18); - s(EmcSwizzleRank1Byte0, 30:28, scratch97, 23:21); - s(EmcRdv, 6:0, scratch97, 30:24); - s(EmcCfg, 7:7, scratch97, 31:31); - s(EmcSwizzleRank1Byte1, 2:0, scratch98, 2:0); - s(EmcSwizzleRank1Byte1, 6:4, scratch98, 5:3); - s(EmcSwizzleRank1Byte1, 10:8, scratch98, 8:6); - s(EmcSwizzleRank1Byte1, 14:12, scratch98, 11:9); - s(EmcSwizzleRank1Byte1, 18:16, scratch98, 14:12); - s(EmcSwizzleRank1Byte1, 22:20, scratch98, 17:15); - s(EmcSwizzleRank1Byte1, 26:24, scratch98, 20:18); - s(EmcSwizzleRank1Byte1, 30:28, scratch98, 23:21); - s(EmcRw2Pden, 6:0, scratch98, 30:24); - s(EmcCfg, 8:8, scratch98, 31:31); - s(EmcSwizzleRank1Byte2, 2:0, scratch99, 2:0); - s(EmcSwizzleRank1Byte2, 6:4, scratch99, 5:3); - s(EmcSwizzleRank1Byte2, 10:8, scratch99, 8:6); - s(EmcSwizzleRank1Byte2, 14:12, scratch99, 11:9); - s(EmcSwizzleRank1Byte2, 18:16, scratch99, 14:12); - s(EmcSwizzleRank1Byte2, 22:20, scratch99, 17:15); - s(EmcSwizzleRank1Byte2, 26:24, scratch99, 20:18); - s(EmcSwizzleRank1Byte2, 30:28, scratch99, 23:21); - s(EmcTfaw, 6:0, scratch99, 30:24); - s(EmcCfg, 9:9, scratch99, 31:31); - s(EmcSwizzleRank1Byte3, 2:0, scratch100, 2:0); - s(EmcSwizzleRank1Byte3, 6:4, scratch100, 5:3); - s(EmcSwizzleRank1Byte3, 10:8, scratch100, 8:6); - s(EmcSwizzleRank1Byte3, 14:12, scratch100, 11:9); - s(EmcSwizzleRank1Byte3, 18:16, scratch100, 14:12); - s(EmcSwizzleRank1Byte3, 22:20, scratch100, 17:15); - s(EmcSwizzleRank1Byte3, 26:24, scratch100, 20:18); - s(EmcSwizzleRank1Byte3, 30:28, scratch100, 23:21); - s(EmcTClkStable, 6:0, scratch100, 30:24); - s(EmcCfg, 18:18, scratch100, 31:31); - s(EmcCfgPipe2, 11:0, scratch101, 11:0); - s(EmcCfgPipe2, 27:16, scratch101, 23:12); - s(EmcTrtm, 6:0, scratch101, 30:24); - s(EmcCfg, 21:21, scratch101, 31:31); - s(EmcCfgPipe1, 11:0, scratch102, 11:0); - s(EmcCfgPipe1, 27:16, scratch102, 23:12); - s(EmcTwtm, 6:0, scratch102, 30:24); - s(EmcCfg, 22:22, scratch102, 31:31); - s(EmcPmacroDdllPwrd0, 4:1, scratch103, 3:0); - s(EmcPmacroDdllPwrd0, 7:6, scratch103, 5:4); - s(EmcPmacroDdllPwrd0, 12:9, scratch103, 9:6); - s(EmcPmacroDdllPwrd0, 15:14, scratch103, 11:10); - s(EmcPmacroDdllPwrd0, 20:17, scratch103, 15:12); - s(EmcPmacroDdllPwrd0, 23:22, scratch103, 17:16); - s(EmcPmacroDdllPwrd0, 28:25, scratch103, 21:18); - s(EmcPmacroDdllPwrd0, 31:30, scratch103, 23:22); - s(EmcTratm, 6:0, scratch103, 30:24); - s(EmcCfg, 23:23, scratch103, 31:31); - s(EmcPmacroDdllPwrd1, 4:1, scratch104, 3:0); - s(EmcPmacroDdllPwrd1, 7:6, scratch104, 5:4); - s(EmcPmacroDdllPwrd1, 12:9, scratch104, 9:6); - s(EmcPmacroDdllPwrd1, 15:14, scratch104, 11:10); - s(EmcPmacroDdllPwrd1, 20:17, scratch104, 15:12); - s(EmcPmacroDdllPwrd1, 23:22, scratch104, 17:16); - s(EmcPmacroDdllPwrd1, 28:25, scratch104, 21:18); - s(EmcPmacroDdllPwrd1, 31:30, scratch104, 23:22); - s(EmcTwatm, 6:0, scratch104, 30:24); - s(EmcCfg, 24:24, scratch104, 31:31); - s(EmcPmacroDdllPwrd2, 4:1, scratch105, 3:0); - s(EmcPmacroDdllPwrd2, 7:6, scratch105, 5:4); - s(EmcPmacroDdllPwrd2, 12:9, scratch105, 9:6); - s(EmcPmacroDdllPwrd2, 15:14, scratch105, 11:10); - s(EmcPmacroDdllPwrd2, 20:17, scratch105, 15:12); - s(EmcPmacroDdllPwrd2, 23:22, scratch105, 17:16); - s(EmcPmacroDdllPwrd2, 28:25, scratch105, 21:18); - s(EmcPmacroDdllPwrd2, 31:30, scratch105, 23:22); - s(EmcTr2ref, 6:0, scratch105, 30:24); - s(EmcCfg, 25:25, scratch105, 31:31); - s(EmcPmacroDdllPeriodicOffset, 5:0, scratch106, 5:0); - s(EmcPmacroDdllPeriodicOffset, 16:8, scratch106, 14:6); - s(EmcPmacroDdllPeriodicOffset, 28:20, scratch106, 23:15); - s(EmcPdex2Mrr, 6:0, scratch106, 30:24); - s(EmcCfg, 26:26, scratch106, 31:31); - s(McEmemArbDaCovers, 23:0, scratch107, 23:0); - s(EmcClkenOverride, 3:1, scratch107, 26:24); - s(EmcClkenOverride, 8:6, scratch107, 29:27); - s(EmcClkenOverride, 16:16, scratch107, 30:30); - s(EmcCfg, 28:28, scratch107, 31:31); - s(EmcXm2CompPadCtrl, 1:0, scratch108, 1:0); - s(EmcXm2CompPadCtrl, 6:4, scratch108, 4:2); - s(EmcXm2CompPadCtrl, 9:9, scratch108, 5:5); - s(EmcXm2CompPadCtrl, 19:11, scratch108, 14:6); - s(EmcXm2CompPadCtrl, 31:24, scratch108, 22:15); - s(EmcRfcPb, 8:0, scratch108, 31:23); - s(EmcAutoCalConfig3, 6:0, scratch109, 6:0); - s(EmcAutoCalConfig3, 14:8, scratch109, 13:7); - s(EmcAutoCalConfig3, 23:16, scratch109, 21:14); - s(EmcCfgUpdate, 2:0, scratch109, 24:22); - s(EmcCfgUpdate, 10:8, scratch109, 27:25); - s(EmcCfgUpdate, 31:28, scratch109, 31:28); - s(EmcAutoCalConfig4, 6:0, scratch110, 6:0); - s(EmcAutoCalConfig4, 14:8, scratch110, 13:7); - s(EmcAutoCalConfig4, 23:16, scratch110, 21:14); - s(EmcRfc, 9:0, scratch110, 31:22); - s(EmcAutoCalConfig5, 6:0, scratch111, 6:0); - s(EmcAutoCalConfig5, 14:8, scratch111, 13:7); - s(EmcAutoCalConfig5, 23:16, scratch111, 21:14); - s(EmcTxsr, 9:0, scratch111, 31:22); - s(EmcAutoCalConfig6, 6:0, scratch112, 6:0); - s(EmcAutoCalConfig6, 14:8, scratch112, 13:7); - s(EmcAutoCalConfig6, 23:16, scratch112, 21:14); - s(EmcMc2EmcQ, 2:0, scratch112, 24:22); - s(EmcMc2EmcQ, 10:8, scratch112, 27:25); - s(EmcMc2EmcQ, 27:24, scratch112, 31:28); - s(EmcAutoCalConfig7, 6:0, scratch113, 6:0); - s(EmcAutoCalConfig7, 14:8, scratch113, 13:7); - s(EmcAutoCalConfig7, 23:16, scratch113, 21:14); - s(McEmemArbRing1Throttle, 4:0, scratch113, 26:22); - s(McEmemArbRing1Throttle, 20:16, scratch113, 31:27); - s(EmcAutoCalConfig8, 6:0, scratch114, 6:0); - s(EmcAutoCalConfig8, 14:8, scratch114, 13:7); - s(EmcAutoCalConfig8, 23:16, scratch114, 21:14); - s(EmcFbioCfg7, 21:0, scratch115, 21:0); - s(EmcAr2Pden, 8:0, scratch115, 30:22); - s(EmcCfg, 29:29, scratch115, 31:31); - s(EmcPmacroQuseDdllRank0_0, 10:0, scratch123, 10:0); - s(EmcPmacroQuseDdllRank0_0, 26:16, scratch123, 21:11); - s(EmcRfcSlr, 8:0, scratch123, 30:22); - s(EmcCfg, 30:30, scratch123, 31:31); - s(EmcPmacroQuseDdllRank0_1, 10:0, scratch124, 10:0); - s(EmcPmacroQuseDdllRank0_1, 26:16, scratch124, 21:11); - s(EmcIbdly, 6:0, scratch124, 28:22); - s(EmcIbdly, 29:28, scratch124, 30:29); - s(EmcCfg, 31:31, scratch124, 31:31); - s(EmcPmacroQuseDdllRank0_2, 10:0, scratch125, 10:0); - s(EmcPmacroQuseDdllRank0_2, 26:16, scratch125, 21:11); - s(McEmemArbTimingRFCPB, 8:0, scratch125, 30:22); - s(EmcFbioCfg5, 4:4, scratch125, 31:31); - s(EmcPmacroQuseDdllRank0_3, 10:0, scratch126, 10:0); - s(EmcPmacroQuseDdllRank0_3, 26:16, scratch126, 21:11); - s(EmcAutoCalConfig9, 6:0, scratch126, 28:22); - s(EmcFbioCfg5, 15:13, scratch126, 31:29); - s(EmcPmacroQuseDdllRank0_4, 10:0, scratch127, 10:0); - s(EmcPmacroQuseDdllRank0_4, 26:16, scratch127, 21:11); - s(EmcRdvMask, 6:0, scratch127, 28:22); - s(EmcCfg2, 5:3, scratch127, 31:29); - s(EmcPmacroQuseDdllRank0_5, 10:0, scratch128, 10:0); - s(EmcPmacroQuseDdllRank0_5, 26:16, scratch128, 21:11); - s(EmcRdvEarlyMask, 6:0, scratch128, 28:22); - s(EmcPmacroCmdPadTxCtrl, 4:2, scratch128, 31:29); - s(EmcPmacroQuseDdllRank0_5, 10:0, scratch129, 10:0); - s(EmcPmacroQuseDdllRank0_5, 26:16, scratch129, 21:11); - s(EmcRdvEarly, 6:0, scratch129, 28:22); - s(EmcPmacroCmdPadTxCtrl, 9:7, scratch129, 31:29); - s(EmcPmacroQuseDdllRank1_1, 10:0, scratch130, 10:0); - s(EmcPmacroQuseDdllRank1_1, 26:16, scratch130, 21:11); - s(EmcQuseWidth, 4:0, scratch130, 26:22); - s(EmcQuseWidth, 29:28, scratch130, 28:27); - s(EmcPmacroCmdPadTxCtrl, 14:12, scratch130, 31:29); - s(EmcPmacroQuseDdllRank1_2, 10:0, scratch131, 10:0); - s(EmcPmacroQuseDdllRank1_2, 26:16, scratch131, 21:11); - s(EmcPmacroDdllShortCmd_2, 6:0, scratch131, 28:22); - s(EmcPmacroCmdPadTxCtrl, 19:17, scratch131, 31:29); - s(EmcPmacroQuseDdllRank1_3, 10:0, scratch132, 10:0); - s(EmcPmacroQuseDdllRank1_3, 26:16, scratch132, 21:11); - s(EmcPmacroCmdRxTermMode, 1:0, scratch132, 23:22); - s(EmcPmacroCmdRxTermMode, 5:4, scratch132, 25:24); - s(EmcPmacroCmdRxTermMode, 9:8, scratch132, 27:26); - s(EmcPmacroCmdRxTermMode, 13:13, scratch132, 28:28); - s(EmcPmacroDataPadTxCtrl, 4:2, scratch132, 31:29); - s(EmcPmacroQuseDdllRank1_4, 10:0, scratch133, 10:0); - s(EmcPmacroQuseDdllRank1_4, 26:16, scratch133, 21:11); - s(EmcPmacroDataRxTermMode, 1:0, scratch133, 23:22); - s(EmcPmacroDataRxTermMode, 5:4, scratch133, 25:24); - s(EmcPmacroDataRxTermMode, 9:8, scratch133, 27:26); - s(EmcPmacroDataRxTermMode, 13:13, scratch133, 28:28); - s(EmcPmacroDataPadTxCtrl, 9:7, scratch133, 31:29); - s(EmcPmacroQuseDdllRank1_5, 10:0, scratch134, 10:0); - s(EmcPmacroQuseDdllRank1_5, 26:16, scratch134, 21:11); - s(McEmemArbTimingRp, 6:0, scratch134, 28:22); - s(EmcPmacroDataPadTxCtrl, 14:12, scratch134, 31:29); - s(EmcPmacroObDdllLongDqRank0_0, 10:0, scratch135, 10:0); - s(EmcPmacroObDdllLongDqRank0_0, 26:16, scratch135, 21:11); - s(McEmemArbTimingRas, 6:0, scratch135, 28:22); - s(EmcPmacroDataPadTxCtrl, 19:17, scratch135, 31:29); - s(EmcPmacroObDdllLongDqRank0_1, 10:0, scratch136, 10:0); - s(EmcPmacroObDdllLongDqRank0_1, 26:16, scratch136, 21:11); - s(McEmemArbTimingFaw, 6:0, scratch136, 28:22); - s(EmcCfg, 17:16, scratch136, 30:29); - s(EmcFbioCfg5, 8:8, scratch136, 31:31); - s(EmcPmacroObDdllLongDqRank0_2, 10:0, scratch137, 10:0); - s(EmcPmacroObDdllLongDqRank0_2, 26:16, scratch137, 21:11); - s(McEmemArbTimingRap2Pre, 6:0, scratch137, 28:22); - s(EmcFbioCfg5, 1:0, scratch137, 30:29); - s(EmcFbioCfg5, 10:10, scratch137, 31:31); - s(EmcPmacroObDdllLongDqRank0_3, 10:0, scratch138, 10:0); - s(EmcPmacroObDdllLongDqRank0_3, 26:16, scratch138, 21:11); - s(McEmemArbTimingWap2Pre, 6:0, scratch138, 28:22); - s(EmcFbioCfg5, 3:2, scratch138, 30:29); - s(EmcFbioCfg5, 12:12, scratch138, 31:31); - s(EmcPmacroObDdllLongDqRank0_4, 10:0, scratch139, 10:0); - s(EmcPmacroObDdllLongDqRank0_4, 26:16, scratch139, 21:11); - s(McEmemArbTimingR2W, 6:0, scratch139, 28:22); - s(EmcCfg2, 27:26, scratch139, 30:29); - s(EmcFbioCfg5, 24:24, scratch139, 31:31); - s(EmcPmacroObDdllLongDqRank0_5, 10:0, scratch140, 10:0); - s(EmcPmacroObDdllLongDqRank0_5, 26:16, scratch140, 21:11); - s(McEmemArbTimingW2R, 6:0, scratch140, 28:22); - s(EmcFbioCfg5, 27:25, scratch140, 31:29); - s(EmcPmacroObDdllLongDqRank1_0, 10:0, scratch141, 10:0); - s(EmcPmacroObDdllLongDqRank1_0, 26:16, scratch141, 21:11); - s(EmcWdv, 5:0, scratch141, 27:22); - s(EmcFbioCfg5, 23:20, scratch141, 31:28); - s(EmcPmacroObDdllLongDqRank1_1, 10:0, scratch142, 10:0); - s(EmcPmacroObDdllLongDqRank1_1, 26:16, scratch142, 21:11); - s(EmcQUse, 4:0, scratch142, 27:22); - s(EmcFbioCfg5, 28:28, scratch142, 28:28); - s(EmcFbioCfg5, 31:30, scratch142, 30:29); - s(EmcCfg2, 0:0, scratch142, 31:31); - s(EmcPmacroObDdllLongDqRank1_2, 10:0, scratch143, 10:0); - s(EmcPmacroObDdllLongDqRank1_2, 26:16, scratch143, 21:11); - s(EmcPdEx2Wr, 5:0, scratch143, 27:22); - s(EmcCfg2, 2:1, scratch143, 29:28); - s(EmcCfg2, 7:7, scratch143, 30:30); - s(EmcCfg2, 10:10, scratch143, 31:31); - s(EmcPmacroObDdllLongDqRank1_3, 10:0, scratch144, 10:0); - s(EmcPmacroObDdllLongDqRank1_3, 26:16, scratch144, 21:11); - s(EmcPdEx2Rd, 5:0, scratch144, 27:22); - s(EmcCfg2, 11:11, scratch144, 28:28); - s(EmcCfg2, 16:14, scratch144, 31:29); - s(EmcPmacroObDdllLongDqRank1_4, 10:0, scratch145, 10:0); - s(EmcPmacroObDdllLongDqRank1_4, 26:16, scratch145, 21:11); - s(EmcPdex2Cke, 5:0, scratch145, 27:22); - s(EmcCfg2, 20:20, scratch145, 28:28); - s(EmcCfg2, 24:22, scratch145, 31:29); - s(EmcPmacroObDdllLongDqRank1_5, 10:0, scratch146, 10:0); - s(EmcPmacroObDdllLongDqRank1_5, 26:16, scratch146, 21:11); - s(EmcPChg2Pden, 5:0, scratch146, 27:22); - s(EmcCfg2, 25:25, scratch146, 28:28); - s(EmcCfg2, 30:28, scratch146, 31:29); - s(EmcPmacroObDdllLongDqsRank0_0, 10:0, scratch147, 10:0); - s(EmcPmacroObDdllLongDqsRank0_0, 26:16, scratch147, 21:11); - s(EmcAct2Pden, 5:0, scratch147, 27:22); - s(EmcCfg2, 31:31, scratch147, 28:28); - s(EmcCfgPipe, 2:0, scratch147, 31:29); - s(EmcPmacroObDdllLongDqsRank0_1, 10:0, scratch148, 10:0); - s(EmcPmacroObDdllLongDqsRank0_1, 26:16, scratch148, 21:11); - s(EmcCke2Pden, 5:0, scratch148, 27:22); - s(EmcCfgPipe, 6:3, scratch148, 31:28); - s(EmcPmacroObDdllLongDqsRank0_2, 10:0, scratch149, 10:0); - s(EmcPmacroObDdllLongDqsRank0_2, 26:16, scratch149, 21:11); - s(EmcTcke, 5:0, scratch149, 27:22); - s(EmcCfgPipe, 10:7, scratch149, 31:28); - s(EmcPmacroObDdllLongDqsRank0_3, 10:0, scratch150, 10:0); - s(EmcPmacroObDdllLongDqsRank0_3, 26:16, scratch150, 21:11); - s(EmcTrpab, 5:0, scratch150, 27:22); - s(EmcCfgPipe, 11:11, scratch150, 28:28); - s(EmcCfgPipe, 18:16, scratch150, 31:29); - s(EmcPmacroObDdllLongDqsRank0_4, 10:0, scratch151, 10:0); - s(EmcPmacroObDdllLongDqsRank0_4, 26:16, scratch151, 21:11); - s(EmcEInput, 5:0, scratch151, 27:22); - s(EmcCfgPipe, 22:19, scratch151, 31:28); - s(EmcPmacroObDdllLongDqsRank0_5, 10:0, scratch152, 10:0); - s(EmcPmacroObDdllLongDqsRank0_5, 26:16, scratch152, 21:11); - s(EmcEInputDuration, 5:0, scratch152, 27:22); - s(EmcCfgPipe, 26:23, scratch152, 31:28); - s(EmcPmacroObDdllLongDqsRank1_0, 10:0, scratch153, 10:0); - s(EmcPmacroObDdllLongDqsRank1_0, 26:16, scratch153, 21:11); - s(EmcPutermExtra, 5:0, scratch153, 27:22); - s(EmcCfgPipe, 27:27, scratch153, 28:28); - s(EmcPmacroTxSelClkSrc0, 2:0, scratch153, 31:29); - s(EmcPmacroObDdllLongDqsRank1_1, 10:0, scratch154, 10:0); - s(EmcPmacroObDdllLongDqsRank1_1, 26:16, scratch154, 21:11); - s(EmcTckesr, 5:0, scratch154, 27:22); - s(EmcPmacroTxSelClkSrc0, 6:3, scratch154, 31:28); - s(EmcPmacroObDdllLongDqsRank1_2, 10:0, scratch155, 10:0); - s(EmcPmacroObDdllLongDqsRank1_2, 26:16, scratch155, 21:11); - s(EmcTpd, 5:0, scratch155, 27:22); - s(EmcPmacroTxSelClkSrc0, 10:7, scratch155, 31:28); - s(EmcPmacroObDdllLongDqsRank1_3, 10:0, scratch156, 10:0); - s(EmcPmacroObDdllLongDqsRank1_3, 26:16, scratch156, 21:11); - s(EmcWdvMask, 5:0, scratch156, 27:22); - s(EmcPmacroTxSelClkSrc0, 19:16, scratch156, 31:28); - s(EmcPmacroObDdllLongDqsRank1_4, 10:0, scratch157, 10:0); - s(EmcPmacroObDdllLongDqsRank1_4, 26:16, scratch157, 21:11); - s(EmcWdvChk, 5:0, scratch157, 27:22); - s(EmcPmacroTxSelClkSrc0, 23:20, scratch157, 31:28); - s(EmcPmacroObDdllLongDqsRank1_5, 10:0, scratch158, 10:0); - s(EmcPmacroObDdllLongDqsRank1_5, 26:16, scratch158, 21:11); - s(EmcCmdBrlshft0, 5:0, scratch158, 27:22); - s(EmcPmacroTxSelClkSrc0, 26:24, scratch158, 30:28); - s(EmcPmacroTxSelClkSrc1, 0:0, scratch158, 31:31); - s(EmcPmacroIbDdllLongDqsRank0_0, 10:0, scratch159, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_0, 26:16, scratch159, 21:11); - s(EmcCmdBrlshft1, 5:0, scratch159, 27:22); - s(EmcPmacroTxSelClkSrc1, 4:1, scratch159, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_1, 10:0, scratch160, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_1, 26:16, scratch160, 21:11); - s(EmcCmdBrlshft2, 5:0, scratch160, 27:22); - s(EmcPmacroTxSelClkSrc1, 8:5, scratch160, 31:28); - s(EmcPmacroIbDdllLongDqsRank0_2, 10:0, scratch161, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_2, 26:16, scratch161, 21:11); - s(EmcCmdBrlshft3, 5:0, scratch161, 27:22); - s(EmcPmacroTxSelClkSrc1, 10:9, scratch161, 29:28); - s(EmcPmacroTxSelClkSrc1, 17:16, scratch161, 31:30); - s(EmcPmacroIbDdllLongDqsRank0_3, 10:0, scratch162, 10:0); - s(EmcPmacroIbDdllLongDqsRank0_3, 26:16, scratch162, 21:11); - s(EmcWev, 5:0, scratch162, 27:22); - s(EmcPmacroTxSelClkSrc1, 21:18, scratch162, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_0, 10:0, scratch163, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_0, 26:16, scratch163, 21:11); - s(EmcWsv, 5:0, scratch163, 27:22); - s(EmcPmacroTxSelClkSrc1, 25:22, scratch163, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_1, 10:0, scratch164, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_1, 26:16, scratch164, 21:11); - s(EmcCfg3, 2:0, scratch164, 24:22); - s(EmcCfg3, 6:4, scratch164, 27:25); - s(EmcPmacroTxSelClkSrc1, 26:26, scratch164, 28:28); - s(EmcPmacroTxSelClkSrc3, 2:0, scratch164, 31:29); - s(EmcPmacroIbDdllLongDqsRank1_2, 10:0, scratch165, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_2, 26:16, scratch165, 21:11); - s(EmcPutermWidth, 31:31, scratch165, 22:22); - s(EmcPutermWidth, 4:0, scratch165, 27:23); - s(EmcPmacroTxSelClkSrc3, 6:3, scratch165, 31:28); - s(EmcPmacroIbDdllLongDqsRank1_3, 10:0, scratch166, 10:0); - s(EmcPmacroIbDdllLongDqsRank1_3, 26:16, scratch166, 21:11); - s(McEmemArbTimingRcd, 5:0, scratch166, 27:22); - s(EmcPmacroTxSelClkSrc3, 10:7, scratch166, 31:28); - s(EmcPmacroDdllLongCmd_0, 10:0, scratch167, 10:0); - s(EmcPmacroDdllLongCmd_0, 26:16, scratch167, 21:11); - s(McEmemArbTimingCcdmw, 5:0, scratch167, 27:22); - s(EmcPmacroTxSelClkSrc3, 19:16, scratch167, 31:28); - s(EmcPmacroDdllLongCmd_1, 10:0, scratch168, 10:0); - s(EmcPmacroDdllLongCmd_1, 26:16, scratch168, 21:11); - s(McEmemArbOverride, 27:26, scratch168, 23:22); - s(McEmemArbOverride, 16:16, scratch168, 24:24); - s(McEmemArbOverride, 10:10, scratch168, 25:25); - s(McEmemArbOverride, 4:3, scratch168, 27:26); - s(EmcPmacroTxSelClkSrc3, 23:20, scratch168, 31:28); - s(EmcPmacroDdllLongCmd_2, 10:0, scratch169, 10:0); - s(EmcPmacroDdllLongCmd_2, 26:16, scratch169, 21:11); - s(EmcRrd, 4:0, scratch169, 26:22); - s(EmcRext, 4:0, scratch169, 31:27); - s(EmcPmacroDdllLongCmd_3, 10:0, scratch170, 10:0); - s(EmcPmacroDdllLongCmd_3, 26:16, scratch170, 21:11); - s(EmcTClkStop, 4:0, scratch170, 26:22); - s(EmcWext, 4:0, scratch170, 31:27); - s(EmcPmacroPerbitFgcgCtrl0, 10:0, scratch171, 10:0); - s(EmcPmacroPerbitFgcgCtrl0, 26:16, scratch171, 21:11); - s(EmcRefctrl2, 0:0, scratch171, 22:22); - s(EmcRefctrl2, 26:24, scratch171, 25:23); - s(EmcRefctrl2, 31:31, scratch171, 26:26); - s(EmcWeDuration, 4:0, scratch171, 31:27); - s(EmcPmacroPerbitFgcgCtrl1, 10:0, scratch172, 10:0); - s(EmcPmacroPerbitFgcgCtrl1, 26:16, scratch172, 21:11); - s(EmcWsDuration, 4:0, scratch172, 26:22); - s(EmcPmacroPadCfgCtrl, 0:0, scratch172, 27:27); - s(EmcPmacroPadCfgCtrl, 9:9, scratch172, 28:28); - s(EmcPmacroPadCfgCtrl, 13:13, scratch172, 29:29); - s(EmcPmacroPadCfgCtrl, 17:16, scratch172, 31:30); - s(EmcPmacroPerbitFgcgCtrl2, 10:0, scratch173, 10:0); - s(EmcPmacroPerbitFgcgCtrl2, 26:16, scratch173, 21:11); - s(McEmemArbTimingRrd, 4:0, scratch173, 26:22); - s(McEmemArbTimingR2R, 4:0, scratch173, 31:27); - s(EmcPmacroPerbitFgcgCtrl3, 10:0, scratch174, 10:0); - s(EmcPmacroPerbitFgcgCtrl3, 26:16, scratch174, 21:11); - s(McEmemArbTimingW2W, 4:0, scratch174, 26:22); - s(EmcPmacroTxSelClkSrc3, 26:24, scratch174, 29:27); - s(EmcPmacroTxSelClkSrc2, 1:0, scratch174, 31:30); - s(EmcPmacroPerbitFgcgCtrl4, 10:0, scratch175, 10:0); - s(EmcPmacroPerbitFgcgCtrl4, 26:16, scratch175, 21:11); - s(EmcPmacroTxSelClkSrc2, 10:2, scratch175, 30:22); - s(EmcPmacroTxSelClkSrc2, 16:16, scratch175, 31:31); - s(EmcPmacroPerbitFgcgCtrl5, 10:0, scratch176, 10:0); - s(EmcPmacroPerbitFgcgCtrl5, 26:16, scratch176, 21:11); - s(EmcPmacroTxSelClkSrc2, 26:17, scratch176, 31:22); - s(McEmemArbCfg, 8:0, scratch177, 8:0); - s(McEmemArbCfg, 20:16, scratch177, 13:9); - s(McEmemArbCfg, 31:24, scratch177, 21:14); - s(EmcPmacroTxSelClkSrc4, 9:0, scratch177, 31:22); - s(McEmemArbMisc1, 12:0, scratch178, 12:0); - s(McEmemArbMisc1, 25:21, scratch178, 17:13); - s(McEmemArbMisc1, 31:28, scratch178, 21:18); - s(EmcPmacroTxSelClkSrc4, 10:10, scratch178, 22:22); - s(EmcPmacroTxSelClkSrc4, 24:16, scratch178, 31:23); - s(EmcMrsWaitCnt2, 9:0, scratch179, 9:0); - s(EmcMrsWaitCnt2, 26:16, scratch179, 20:10); - s(EmcOdtWrite, 5:0, scratch179, 26:21); - s(EmcOdtWrite, 11:8, scratch179, 30:27); - s(EmcOdtWrite, 31:31, scratch179, 31:31); - s(EmcMrsWaitCnt, 9:0, scratch180, 9:0); - s(EmcMrsWaitCnt, 26:16, scratch180, 20:10); - s(EmcPmacroIbRxrt, 10:0, scratch180, 31:21); - s(EmcAutoCalInterval, 20:0, scratch181, 20:0); - s(EmcPmacroDdllLongCmd_4, 10:0, scratch181, 31:21); - s(McEmemArbRefpbHpCtrl, 6:0, scratch182, 6:0); - s(McEmemArbRefpbHpCtrl, 14:8, scratch182, 13:7); - s(McEmemArbRefpbHpCtrl, 22:16, scratch182, 20:14); - s(McEmemArbOutstandingReq, 8:0, scratch182, 29:21); - s(McEmemArbOutstandingReq, 31:30, scratch182, 31:30); - s(EmcXm2CompPadCtrl2, 5:0, scratch183, 5:0); - s(EmcXm2CompPadCtrl2, 17:12, scratch183, 11:6); - s(EmcXm2CompPadCtrl2, 21:20, scratch183, 13:12); - s(EmcXm2CompPadCtrl2, 29:24, scratch183, 19:14); - s(EmcPmacroCmdCtrl0, 0:0, scratch183, 20:20); - s(EmcPmacroCmdCtrl0, 5:4, scratch183, 22:21); - s(EmcPmacroCmdCtrl0, 8:8, scratch183, 23:23); - s(EmcPmacroCmdCtrl0, 13:12, scratch183, 25:24); - s(EmcPmacroCmdCtrl0, 16:16, scratch183, 26:26); - s(EmcPmacroCmdCtrl0, 21:20, scratch183, 28:27); - s(EmcPmacroCmdCtrl0, 24:24, scratch183, 29:29); - s(EmcPmacroCmdCtrl0, 29:28, scratch183, 31:30); - s(EmcCfgDigDll_1, 19:0, scratch184, 19:0); - s(EmcPmacroCmdCtrl1, 0:0, scratch184, 20:20); - s(EmcPmacroCmdCtrl1, 5:4, scratch184, 22:21); - s(EmcPmacroCmdCtrl1, 8:8, scratch184, 23:23); - s(EmcPmacroCmdCtrl1, 13:12, scratch184, 25:24); - s(EmcPmacroCmdCtrl1, 16:16, scratch184, 26:26); - s(EmcPmacroCmdCtrl1, 21:20, scratch184, 28:27); - s(EmcPmacroCmdCtrl1, 24:24, scratch184, 29:29); - s(EmcPmacroCmdCtrl1, 29:28, scratch184, 31:30); - s(EmcQuseBrlshft0, 19:0, scratch185, 19:0); - s(EmcPmacroCmdCtrl2, 0:0, scratch185, 20:20); - s(EmcPmacroCmdCtrl2, 5:4, scratch185, 22:21); - s(EmcPmacroCmdCtrl2, 8:8, scratch185, 23:23); - s(EmcPmacroCmdCtrl2, 13:12, scratch185, 25:24); - s(EmcPmacroCmdCtrl2, 16:16, scratch185, 26:26); - s(EmcPmacroCmdCtrl2, 21:20, scratch185, 28:27); - s(EmcPmacroCmdCtrl2, 24:24, scratch185, 29:29); - s(EmcPmacroCmdCtrl2, 29:28, scratch185, 31:30); - s(EmcQuseBrlshft1, 19:0, scratch186, 19:0); - s(EmcPmacroDsrVttgenCtrl0, 3:0, scratch186, 23:20); - s(EmcPmacroDsrVttgenCtrl0, 15:8, scratch186, 31:24); - s(EmcQuseBrlshft2, 19:0, scratch187, 19:0); - s(EmcPmacroPerbitRfu1Ctrl0, 5:0, scratch187, 25:20); - s(EmcPmacroPerbitRfu1Ctrl0, 21:20, scratch187, 31:26); - s(EmcQuseBrlshft3, 19:0, scratch188, 19:0); - s(EmcPmacroPerbitRfu1Ctrl1, 5:0, scratch188, 25:20); - s(EmcPmacroPerbitRfu1Ctrl1, 21:20, scratch188, 31:26); - s(EmcDbg, 4:0, scratch189, 4:0); - s(EmcDbg, 13:9, scratch189, 9:5); - s(EmcDbg, 31:24, scratch189, 17:10); - s(EmcTRefBw, 13:0, scratch189, 31:18); - s(EmcZcalWaitCnt, 10:0, scratch191, 10:0); - s(EmcZcalWaitCnt, 21:16, scratch191, 16:11); - s(EmcZcalWaitCnt, 31:31, scratch191, 17:17); - s(EmcQpop, 6:0, scratch191, 24:18); - s(EmcQpop, 22:16, scratch191, 31:25); - s(EmcZcalMrwCmd, 7:0, scratch192, 7:0); - s(EmcZcalMrwCmd, 23:16, scratch192, 15:8); - s(EmcZcalMrwCmd, 31:30, scratch192, 17:16); - s(EmcPmacroAutocalCfgCommon, 5:0, scratch192, 23:18); - s(EmcPmacroAutocalCfgCommon, 13:8, scratch192, 29:24); - s(EmcPmacroAutocalCfgCommon, 16:16, scratch192, 30:30); - s(EmcPmacroTxSelClkSrc4, 25:25, scratch192, 31:31); - s(EmcPmacroDllCfg1, 10:0, scratch193, 10:0); - s(EmcPmacroDllCfg1, 13:12, scratch193, 12:11); - s(EmcPmacroDllCfg1, 17:16, scratch193, 14:13); - s(EmcPmacroDllCfg1, 21:20, scratch193, 16:15); - s(EmcPmacroDllCfg1, 24:24, scratch193, 17:17); - s(EmcPmacroPerbitRfu1Ctrl2, 5:0, scratch193, 23:18); - s(EmcPmacroPerbitRfu1Ctrl2, 21:16, scratch193, 29:24); - s(EmcPmacroTxSelClkSrc4, 26:26, scratch193, 30:30); - s(EmcPmacroTxSelClkSrc5, 0:0, scratch193, 31:31); - s(EmcPmacroCmdBrickCtrlFdpd, 17:0, scratch194, 17:0); - s(EmcPmacroPerbitRfu1Ctrl3, 5:0, scratch194, 23:18); - s(EmcPmacroPerbitRfu1Ctrl3, 21:16, scratch194, 29:24); - s(EmcPmacroTxSelClkSrc5, 2:1, scratch194, 31:30); - s(EmcPmacroDataBrickCtrlFdpd, 17:0, scratch195, 17:0); - s(EmcPmacroPerbitRfu1Ctrl4, 5:0, scratch195, 23:18); - s(EmcPmacroPerbitRfu1Ctrl4, 21:16, scratch195, 29:24); - s(EmcPmacroTxSelClkSrc5, 4:3, scratch195, 31:30); - s(EmcDynSelfRefControl, 15:0, scratch196, 15:0); - s(EmcDynSelfRefControl, 31:31, scratch196, 16:16); - s(McEmemArbRefpbBankCtrl, 6:0, scratch196, 23:17); - s(McEmemArbRefpbBankCtrl, 14:8, scratch196, 30:24); - s(McEmemArbRefpbBankCtrl, 31:31, scratch196, 31:31); - s(EmcPmacroCmdPadRxCtrl, 1:0, scratch197, 1:0); - s(EmcPmacroCmdPadRxCtrl, 5:4, scratch197, 3:2); - s(EmcPmacroCmdPadRxCtrl, 12:12, scratch197, 4:4); - s(EmcPmacroCmdPadRxCtrl, 19:15, scratch197, 9:5); - s(EmcPmacroCmdPadRxCtrl, 27:21, scratch197, 16:10); - s(EmcPmacroPerbitRfu1Ctrl5, 5:0, scratch197, 22:17); - s(EmcPmacroPerbitRfu1Ctrl5, 21:16, scratch197, 28:23); - s(EmcPmacroTxSelClkSrc5, 7:5, scratch197, 31:29); - s(EmcPmacroDataPadRxCtrl, 1:0, scratch198, 1:0); - s(EmcPmacroDataPadRxCtrl, 5:4, scratch198, 3:2); - s(EmcPmacroDataPadRxCtrl, 12:12, scratch198, 4:4); - s(EmcPmacroDataPadRxCtrl, 19:15, scratch198, 9:5); - s(EmcPmacroDataPadRxCtrl, 27:21, scratch198, 16:10); - s(EmcPmacroTxSelClkSrc5, 10:8, scratch198, 19:17); - s(EmcPmacroTxSelClkSrc5, 26:16, scratch198, 30:20); - s(EmcPmacroCmdPadTxCtrl, 0:0, scratch198, 31:31); - s(EmcRefresh, 15:0, scratch199, 15:0); - s(EmcCmdQ, 4:0, scratch199, 20:16); - s(EmcCmdQ, 10:8, scratch199, 23:21); - s(EmcCmdQ, 14:12, scratch199, 26:24); - s(EmcCmdQ, 28:24, scratch199, 31:27); - s(EmcAcpdControl, 15:0, scratch210, 15:0); - s(EmcAutoCalVrefSel1, 15:0, scratch210, 31:16); - s(EmcPmacroAutocalCfg0, 3:0, scratch211, 3:0); - s(EmcPmacroAutocalCfg0, 11:8, scratch211, 7:4); - s(EmcPmacroAutocalCfg0, 19:16, scratch211, 11:8); - s(EmcPmacroAutocalCfg0, 27:24, scratch211, 15:12); - s(EmcPmacroAutocalCfg1, 3:0, scratch211, 19:16); - s(EmcPmacroAutocalCfg1, 11:8, scratch211, 23:20); - s(EmcPmacroAutocalCfg1, 19:16, scratch211, 27:24); - s(EmcPmacroAutocalCfg1, 27:24, scratch211, 31:28); - s(EmcPmacroAutocalCfg2, 3:0, scratch212, 3:0); - s(EmcPmacroAutocalCfg2, 11:8, scratch212, 7:4); - s(EmcPmacroAutocalCfg2, 19:16, scratch212, 11:8); - s(EmcPmacroAutocalCfg2, 27:24, scratch212, 15:12); - s(EmcXm2CompPadCtrl3, 5:0, scratch212, 21:16); - s(EmcXm2CompPadCtrl3, 17:12, scratch212, 27:22); - s(EmcXm2CompPadCtrl3, 23:20, scratch212, 31:28); - s(EmcCfgDigDllPeriod, 15:0, scratch213, 15:0); - s(EmcPreRefreshReqCnt, 15:0, scratch213, 31:16); - s(EmcPmacroDdllBypass, 0:0, scratch214, 0:0); - s(EmcPmacroDdllBypass, 11:8, scratch214, 4:1); - s(EmcPmacroDdllBypass, 16:13, scratch214, 8:5); - s(EmcPmacroDdllBypass, 27:24, scratch214, 12:9); - s(EmcPmacroDdllBypass, 31:29, scratch214, 15:13); - s(EmcPmacroDataPiCtrl, 4:0, scratch214, 20:16); - s(EmcPmacroDataPiCtrl, 12:8, scratch214, 26:21); - s(EmcPmacroDataPiCtrl, 21:16, scratch214, 31:26); - s(EmcPmacroCmdPiCtrl, 4:0, scratch215, 4:0); - s(EmcPmacroCmdPiCtrl, 12:8, scratch215, 9:5); - s(EmcPmacroCmdPiCtrl, 21:16, scratch215, 15:10); - s(EmcPmacroCmdPadTxCtrl, 6:5, scratch216, 1:0); - s(EmcPmacroCmdPadTxCtrl, 10:10, scratch216, 2:2); - s(EmcPmacroCmdPadTxCtrl, 16:15, scratch216, 4:3); - s(EmcPmacroCmdPadTxCtrl, 30:21, scratch216, 14:5); - s(EmcPmacroDataPadTxCtrl, 0:0, scratch216, 15:15); - s(EmcPmacroDataPadTxCtrl, 6:5, scratch216, 17:16); - s(EmcPmacroDataPadTxCtrl, 10:10, scratch216, 18:18); - s(EmcPmacroDataPadTxCtrl, 16:15, scratch216, 20:19); - s(EmcPmacroDataPadTxCtrl, 30:21, scratch216, 30:21); - - s(EmcPinGpio, 1:0, scratch9, 31:30); - s(EmcPinGpioEn, 1:0, scratch10, 31:30); - s(EmcDevSelect, 1:0, scratch11, 31:30); - s(EmcZcalWarmColdBootEnables, 1:0, scratch12, 31:30); - s(EmcCfgDigDllPeriodWarmBoot, 1:0, scratch13, 31:30); - s32(EmcBctSpare13, scratch45); - s32(EmcBctSpare12, scratch46); - s32(EmcBctSpare7, scratch47); - s32(EmcBctSpare6, scratch48); - s32(EmcBctSpare5, scratch50); - s32(EmcBctSpare4, scratch51); - s32(EmcBctSpare3, scratch56); - s32(EmcBctSpare2, scratch57); - s32(EmcBctSpare1, scratch58); - s32(EmcBctSpare0, scratch59); - s32(EmcBctSpare9, scratch60); - s32(EmcBctSpare8, scratch61); - s32(BootRomPatchData, scratch62); - s32(BootRomPatchControl, scratch63); - s(McClkenOverrideAllWarmBoot, 0:0, scratch65, 31:31); - s(EmcExtraRefreshNum, 2:0, scratch66, 31:29); - s(PmcIoDpd3ReqWait, 2:0, scratch72, 30:28); - s(EmcClkenOverrideAllWarmBoot, 0:0, scratch72, 31:31); - s(MemoryType, 2:0, scratch73, 30:28); - s(EmcMrsWarmBootEnable, 0:0, scratch73, 31:31); - s(PmcIoDpd4ReqWait, 2:0, scratch74, 30:28); - s(ClearClk2Mc1, 0:0, scratch74, 31:31); - s(EmcWarmBootExtraModeRegWriteEnable, 0:0, scratch75, 28:28); - s(ClkRstControllerPllmMisc2OverrideEnable, 0:0, scratch75, 29:29); - s(EmcDbgWriteMux, 0:0, scratch75, 30:30); - s(AhbArbitrationXbarCtrlMemInitDone, 0:0, scratch75, 31:31); - s(EmcTimingControlWait, 7:0, scratch90, 31:24); - s(EmcZcalWarmBootWait, 7:0, scratch91, 31:24); - s(WarmBootWait, 7:0, scratch92, 31:24); - s(EmcPinProgramWait, 7:0, scratch93, 31:24); - s(EmcAutoCalWait, 9:0, scratch114, 31:22); - s(SwizzleRankByteEncode, 15:0, scratch215, 31:16); - - switch (params->MemoryType) { - case NvBootMemoryType_LpDdr2: - case NvBootMemoryType_LpDdr4: - s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0); - s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8); - s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16); - s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24); - s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0); - s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2); - s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4); - s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6); - s(EmcMrw6, 27:0, scratch8, 27:0); - s(EmcMrw6, 31:30, scratch8, 29:28); - s(EmcMrw8, 27:0, scratch9, 27:0); - s(EmcMrw8, 31:30, scratch9, 29:28); - s(EmcMrw9, 27:0, scratch10, 27:0); - s(EmcMrw9, 31:30, scratch10, 29:28); - s(EmcMrw10, 27:0, scratch11, 27:0); - s(EmcMrw10, 31:30, scratch11, 29:28); - s(EmcMrw12, 27:0, scratch12, 27:0); - s(EmcMrw12, 31:30, scratch12, 29:28); - s(EmcMrw13, 27:0, scratch13, 27:0); - s(EmcMrw13, 31:30, scratch13, 29:28); - s(EmcMrw14, 27:0, scratch14, 27:0); - s(EmcMrw14, 31:30, scratch14, 29:28); - s(EmcMrw1, 7:0, scratch15, 7:0); - s(EmcMrw1, 23:16, scratch15, 15:8); - s(EmcMrw1, 27:26, scratch15, 17:16); - s(EmcMrw1, 31:30, scratch15, 19:18); - s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0); - s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8); - s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16); - s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18); - s(EmcMrw2, 7:0, scratch17, 7:0); - s(EmcMrw2, 23:16, scratch17, 15:8); - s(EmcMrw2, 27:26, scratch17, 17:16); - s(EmcMrw2, 31:30, scratch17, 19:18); - s(EmcMrw3, 7:0, scratch18, 7:0); - s(EmcMrw3, 23:16, scratch18, 15:8); - s(EmcMrw3, 27:26, scratch18, 17:16); - s(EmcMrw3, 31:30, scratch18, 19:18); - s(EmcMrw4, 7:0, scratch19, 7:0); - s(EmcMrw4, 23:16, scratch19, 15:8); - s(EmcMrw4, 27:26, scratch19, 17:16); - s(EmcMrw4, 31:30, scratch19, 19:18); - break; - case NvBootMemoryType_Ddr3: - s(EmcMrs, 13:0, scratch5, 13:0); - s(EmcEmrs, 13:0, scratch5, 27:14); - s(EmcMrs, 21:20, scratch5, 29:28); - s(EmcMrs, 31:30, scratch5, 31:30); - s(EmcEmrs2, 13:0, scratch8, 13:0); - s(EmcEmrs3, 13:0, scratch8, 27:14); - s(EmcEmrs, 21:20, scratch8, 29:28); - s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0); - s(EmcEmrs, 31:30, scratch9, 15:14); - s(EmcEmrs2, 21:20, scratch9, 17:16); - s(EmcEmrs2, 31:30, scratch9, 19:18); - s(EmcEmrs3, 21:20, scratch9, 21:20); - s(EmcEmrs3, 31:30, scratch9, 23:22); - s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24); - s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26); - s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28); - s(EmcMrs, 27:26, scratch10, 1:0); - s(EmcEmrs, 27:26, scratch10, 3:2); - s(EmcEmrs2, 27:26, scratch10, 5:4); - s(EmcEmrs3, 27:26, scratch10, 7:6); - s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8); - s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9); - s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10); - s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11); - break; - default: break; - } - - s32(EmcCmdMappingByte, secure_scratch8); - s32(EmcPmacroBrickMapping0, secure_scratch9); - s32(EmcPmacroBrickMapping1, secure_scratch10); - s32(EmcPmacroBrickMapping2, secure_scratch11); - s32(McVideoProtectGpuOverride0, secure_scratch12); - s(EmcCmdMappingCmd0_0, 6:0, secure_scratch13, 6:0); - s(EmcCmdMappingCmd0_0, 14:8, secure_scratch13, 13:7); - s(EmcCmdMappingCmd0_0, 22:16, secure_scratch13, 20:14); - s(EmcCmdMappingCmd0_0, 30:24, secure_scratch13, 27:21); - s(McUntranslatedRegionCheck, 0:0, secure_scratch13, 28:28); - s(McUntranslatedRegionCheck, 9:8, secure_scratch13, 30:29); - s(EmcAdrCfg, 0:0, secure_scratch13, 31:31); - s(EmcCmdMappingCmd0_1, 6:0, secure_scratch14, 6:0); - s(EmcCmdMappingCmd0_1, 14:8, secure_scratch14, 13:7); - s(EmcCmdMappingCmd0_1, 22:16, secure_scratch14, 20:14); - s(EmcCmdMappingCmd0_1, 30:24, secure_scratch14, 27:21); - s(McVideoProtectBomAdrHi, 1:0, secure_scratch14, 29:28); - s(McVideoProtectWriteAccess, 1:0, secure_scratch14, 31:30); - s(EmcCmdMappingCmd1_0, 6:0, secure_scratch15, 6:0); - s(EmcCmdMappingCmd1_0, 14:8, secure_scratch15, 13:7); - s(EmcCmdMappingCmd1_0, 22:16, secure_scratch15, 20:14); - s(EmcCmdMappingCmd1_0, 30:24, secure_scratch15, 27:21); - s(McSecCarveoutAdrHi, 1:0, secure_scratch15, 29:28); - s(McMtsCarveoutAdrHi, 1:0, secure_scratch15, 31:30); - s(EmcCmdMappingCmd1_1, 6:0, secure_scratch16, 6:0); - s(EmcCmdMappingCmd1_1, 14:8, secure_scratch16, 13:7); - s(EmcCmdMappingCmd1_1, 22:16, secure_scratch16, 20:14); - s(EmcCmdMappingCmd1_1, 30:24, secure_scratch16, 27:21); - s(McGeneralizedCarveout5BomHi, 1:0, secure_scratch16, 29:28); - s(McGeneralizedCarveout3BomHi, 1:0, secure_scratch16, 31:30); - s(EmcCmdMappingCmd2_0, 6:0, secure_scratch17, 6:0); - s(EmcCmdMappingCmd2_0, 14:8, secure_scratch17, 13:7); - s(EmcCmdMappingCmd2_0, 22:16, secure_scratch17, 20:14); - s(EmcCmdMappingCmd2_0, 30:24, secure_scratch17, 27:21); - s(McGeneralizedCarveout2BomHi, 1:0, secure_scratch17, 29:28); - s(McGeneralizedCarveout4BomHi, 1:0, secure_scratch17, 31:30); - s(EmcCmdMappingCmd2_1, 6:0, secure_scratch18, 6:0); - s(EmcCmdMappingCmd2_1, 14:8, secure_scratch18, 13:7); - s(EmcCmdMappingCmd2_1, 22:16, secure_scratch18, 20:14); - s(EmcCmdMappingCmd2_1, 30:24, secure_scratch18, 27:21); - s(McGeneralizedCarveout1BomHi, 1:0, secure_scratch18, 29:28); - s(EmcFbioSpare, 1:1, secure_scratch18, 30:30); - s(EmcFbioCfg8, 15:15, secure_scratch18, 31:31); - s(EmcCmdMappingCmd3_0, 6:0, secure_scratch19, 6:0); - s(EmcCmdMappingCmd3_0, 14:8, secure_scratch19, 13:7); - s(EmcCmdMappingCmd3_0, 22:16, secure_scratch19, 20:14); - s(EmcCmdMappingCmd3_0, 30:24, secure_scratch19, 27:21); - s(McEmemAdrCfg, 0:0, secure_scratch19, 28:28); - s(McSecCarveoutProtectWriteAccess, 0:0, secure_scratch19, 29:29); - s(McMtsCarveoutRegCtrl, 0:0, secure_scratch19, 30:30); - s(McVideoProtectVprOverride, 0:0, secure_scratch19, 31:31); - s(EmcCmdMappingCmd3_1, 6:0, secure_scratch20, 6:0); - s(EmcCmdMappingCmd3_1, 14:8, secure_scratch20, 13:7); - s(EmcCmdMappingCmd3_1, 22:16, secure_scratch20, 20:14); - s(EmcCmdMappingCmd3_1, 30:24, secure_scratch20, 27:21); - s(McGeneralizedCarveout2Cfg0, 6:3, secure_scratch20, 31:28); - s(McGeneralizedCarveout4Cfg0, 26:0, secure_scratch39, 26:0); - s(McGeneralizedCarveout2Cfg0, 10:7, secure_scratch39, 30:27); - s(McVideoProtectVprOverride, 1:1, secure_scratch39, 31:31); - s(McGeneralizedCarveout5Cfg0, 26:0, secure_scratch40, 26:0); - s(McGeneralizedCarveout2Cfg0, 17:14, secure_scratch40, 30:27); - s(McVideoProtectVprOverride, 2:2, secure_scratch40, 31:31); - s(EmcCmdMappingCmd0_2, 6:0, secure_scratch41, 6:0); - s(EmcCmdMappingCmd0_2, 14:8, secure_scratch41, 13:7); - s(EmcCmdMappingCmd0_2, 22:16, secure_scratch41, 20:14); - s(EmcCmdMappingCmd0_2, 27:24, secure_scratch41, 24:21); - s(McGeneralizedCarveout2Cfg0, 21:18, secure_scratch41, 28:25); - s(McGeneralizedCarveout2Cfg0, 13:11, secure_scratch41, 31:29); - s(EmcCmdMappingCmd1_2, 6:0, secure_scratch42, 6:0); - s(EmcCmdMappingCmd1_2, 14:8, secure_scratch42, 13:7); - s(EmcCmdMappingCmd1_2, 22:16, secure_scratch42, 20:14); - s(EmcCmdMappingCmd1_2, 27:24, secure_scratch42, 24:21); - s(McGeneralizedCarveout1Cfg0, 6:3, secure_scratch42, 28:25); - s(McGeneralizedCarveout1Cfg0, 13:11, secure_scratch42, 31:29); - s(EmcCmdMappingCmd2_2, 6:0, secure_scratch43, 6:0); - s(EmcCmdMappingCmd2_2, 14:8, secure_scratch43, 13:7); - s(EmcCmdMappingCmd2_2, 22:16, secure_scratch43, 20:14); - s(EmcCmdMappingCmd2_2, 27:24, secure_scratch43, 24:21); - s(McGeneralizedCarveout1Cfg0, 10:7, secure_scratch43, 28:25); - s(McGeneralizedCarveout3Cfg0, 13:11, secure_scratch43, 31:29); - s(EmcCmdMappingCmd3_2, 6:0, secure_scratch44, 6:0); - s(EmcCmdMappingCmd3_2, 14:8, secure_scratch44, 13:7); - s(EmcCmdMappingCmd3_2, 22:16, secure_scratch44, 20:14); - s(EmcCmdMappingCmd3_2, 27:24, secure_scratch44, 24:21); - s(McGeneralizedCarveout1Cfg0, 17:14, secure_scratch44, 28:25); - s(McVideoProtectVprOverride, 3:3, secure_scratch44, 29:29); - s(McVideoProtectVprOverride, 7:6, secure_scratch44, 31:30); - s(McEmemAdrCfgChannelMask, 31:9, secure_scratch45, 22:0); - s(McEmemAdrCfgDev0, 2:0, secure_scratch45, 25:23); - s(McEmemAdrCfgDev0, 9:8, secure_scratch45, 27:26); - s(McEmemAdrCfgDev0, 19:16, secure_scratch45, 31:28); - s(McEmemAdrCfgBankMask0, 31:10, secure_scratch46, 21:0); - s(McEmemAdrCfgDev1, 2:0, secure_scratch46, 24:22); - s(McEmemAdrCfgDev1, 9:8, secure_scratch46, 26:25); - s(McEmemAdrCfgDev1, 19:16, secure_scratch46, 30:27); - s(McVideoProtectVprOverride, 8:8, secure_scratch46, 31:31); - s(McEmemAdrCfgBankMask1, 31:10, secure_scratch47, 21:0); - s(McGeneralizedCarveout1Cfg0, 21:18, secure_scratch47, 25:22); - s(McGeneralizedCarveout3Cfg0, 6:3, secure_scratch47, 29:26); - s(McVideoProtectVprOverride, 9:9, secure_scratch47, 30:30); - s(McVideoProtectVprOverride, 11:11, secure_scratch47, 31:31); - s(McEmemAdrCfgBankMask2, 31:10, secure_scratch48, 21:0); - s(McGeneralizedCarveout3Cfg0, 10:7, secure_scratch48, 25:22); - s(McGeneralizedCarveout3Cfg0, 17:14, secure_scratch48, 29:26); - s(McVideoProtectVprOverride, 15:14, secure_scratch48, 31:30); - s(McVideoProtectGpuOverride1, 15:0, secure_scratch49, 15:0); - s(McEmemCfg, 13:0, secure_scratch49, 29:16); - s(McEmemCfg, 31:31, secure_scratch49, 30:30); - s(McVideoProtectVprOverride, 17:17, secure_scratch49, 31:31); - s(McGeneralizedCarveout3Bom, 31:17, secure_scratch50, 14:0); - s(McGeneralizedCarveout1Bom, 31:17, secure_scratch50, 29:15); - s(McVideoProtectVprOverride, 19:18, secure_scratch50, 31:30); - s(McGeneralizedCarveout4Bom, 31:17, secure_scratch51, 14:0); - s(McGeneralizedCarveout2Bom, 31:17, secure_scratch51, 29:15); - s(McVideoProtectVprOverride, 21:20, secure_scratch51, 31:30); - s(McGeneralizedCarveout5Bom, 31:17, secure_scratch52, 14:0); - s(McVideoProtectBom, 31:20, secure_scratch52, 26:15); - s(McGeneralizedCarveout3Cfg0, 21:18, secure_scratch52, 30:27); - s(McVideoProtectVprOverride, 22:22, secure_scratch52, 31:31); - s(McVideoProtectSizeMb, 11:0, secure_scratch53, 11:0); - s(McSecCarveoutBom, 31:20, secure_scratch53, 23:12); - s(McVideoProtectVprOverride, 23:23, secure_scratch53, 24:24); - s(McVideoProtectVprOverride, 26:26, secure_scratch53, 25:25); - s(McVideoProtectVprOverride, 31:29, secure_scratch53, 28:26); - s(McVideoProtectVprOverride1, 1:0, secure_scratch53, 30:29); - s(McVideoProtectVprOverride1, 4:4, secure_scratch53, 31:31); - s(McSecCarveoutSizeMb, 11:0, secure_scratch54, 11:0); - s(McMtsCarveoutBom, 31:20, secure_scratch54, 23:12); - s(McVideoProtectVprOverride1, 12:5, secure_scratch54, 31:24); - s(McMtsCarveoutSizeMb, 11:0, secure_scratch55, 11:0); - s(McGeneralizedCarveout4Size128kb, 11:0, secure_scratch55, 23:12); - s(McVideoProtectVprOverride1, 16:13, secure_scratch55, 27:24); - s(McVideoProtectVprOverride1, 26:25, secure_scratch55, 29:28); - s(McGeneralizedCarveout2Cfg0, 1:0, secure_scratch55, 31:30); - s(McGeneralizedCarveout3Size128kb, 11:0, secure_scratch56, 11:0); - s(McGeneralizedCarveout2Size128kb, 11:0, secure_scratch56, 23:12); - s(McGeneralizedCarveout2Cfg0, 2:2, secure_scratch56, 24:24); - s(McGeneralizedCarveout2Cfg0, 26:22, secure_scratch56, 29:25); - s(McGeneralizedCarveout1Cfg0, 1:0, secure_scratch56, 31:30); - s(McGeneralizedCarveout1Size128kb, 11:0, secure_scratch57, 11:0); - s(McGeneralizedCarveout5Size128kb, 11:0, secure_scratch57, 23:12); - s(McGeneralizedCarveout1Cfg0, 2:2, secure_scratch57, 24:24); - s(McGeneralizedCarveout1Cfg0, 26:22, secure_scratch57, 29:25); - s(McGeneralizedCarveout3Cfg0, 1:0, secure_scratch57, 31:30); - s(McGeneralizedCarveout3Cfg0, 2:2, secure_scratch58, 0:0); - s(McGeneralizedCarveout3Cfg0, 26:22, secure_scratch58, 5:1); - - s32(McGeneralizedCarveout1Access0, secure_scratch59); - s32(McGeneralizedCarveout1Access1, secure_scratch60); - s32(McGeneralizedCarveout1Access2, secure_scratch61); - s32(McGeneralizedCarveout1Access3, secure_scratch62); - s32(McGeneralizedCarveout1Access4, secure_scratch63); - s32(McGeneralizedCarveout2Access0, secure_scratch64); - s32(McGeneralizedCarveout2Access1, secure_scratch65); - s32(McGeneralizedCarveout2Access2, secure_scratch66); - s32(McGeneralizedCarveout2Access3, secure_scratch67); - s32(McGeneralizedCarveout2Access4, secure_scratch68); - s32(McGeneralizedCarveout3Access0, secure_scratch69); - s32(McGeneralizedCarveout3Access1, secure_scratch70); - s32(McGeneralizedCarveout3Access2, secure_scratch71); - s32(McGeneralizedCarveout3Access3, secure_scratch72); - s32(McGeneralizedCarveout3Access4, secure_scratch73); - s32(McGeneralizedCarveout4Access0, secure_scratch74); - s32(McGeneralizedCarveout4Access1, secure_scratch75); - s32(McGeneralizedCarveout4Access2, secure_scratch76); - s32(McGeneralizedCarveout4Access3, secure_scratch77); - s32(McGeneralizedCarveout4Access4, secure_scratch78); - s32(McGeneralizedCarveout5Access0, secure_scratch79); - s32(McGeneralizedCarveout5Access1, secure_scratch80); - s32(McGeneralizedCarveout5Access2, secure_scratch81); - s32(McGeneralizedCarveout5Access3, secure_scratch82); - s32(McGeneralizedCarveout1ForceInternalAccess0, secure_scratch84); - s32(McGeneralizedCarveout1ForceInternalAccess1, secure_scratch85); - s32(McGeneralizedCarveout1ForceInternalAccess2, secure_scratch86); - s32(McGeneralizedCarveout1ForceInternalAccess3, secure_scratch87); - s32(McGeneralizedCarveout1ForceInternalAccess4, secure_scratch88); - s32(McGeneralizedCarveout2ForceInternalAccess0, secure_scratch89); - s32(McGeneralizedCarveout2ForceInternalAccess1, secure_scratch90); - s32(McGeneralizedCarveout2ForceInternalAccess2, secure_scratch91); - s32(McGeneralizedCarveout2ForceInternalAccess3, secure_scratch92); - s32(McGeneralizedCarveout2ForceInternalAccess4, secure_scratch93); - s32(McGeneralizedCarveout3ForceInternalAccess0, secure_scratch94); - s32(McGeneralizedCarveout3ForceInternalAccess1, secure_scratch95); - s32(McGeneralizedCarveout3ForceInternalAccess2, secure_scratch96); - s32(McGeneralizedCarveout3ForceInternalAccess3, secure_scratch97); - s32(McGeneralizedCarveout3ForceInternalAccess4, secure_scratch98); - s32(McGeneralizedCarveout4ForceInternalAccess0, secure_scratch99); - s32(McGeneralizedCarveout4ForceInternalAccess1, secure_scratch100); - s32(McGeneralizedCarveout4ForceInternalAccess2, secure_scratch101); - s32(McGeneralizedCarveout4ForceInternalAccess3, secure_scratch102); - s32(McGeneralizedCarveout4ForceInternalAccess4, secure_scratch103); - s32(McGeneralizedCarveout5ForceInternalAccess0, secure_scratch104); - s32(McGeneralizedCarveout5ForceInternalAccess1, secure_scratch105); - s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106); - s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107); - - c32(0, scratch2); - s(PllMInputDivider, 7:0, scratch2, 7:0); - s(PllMFeedbackDivider, 7:0, scratch2, 15:8); - s(PllMPostDivider, 0:0, scratch2, 16:16); - s(PllMKVCO, 0:0, scratch2, 17:17); - s(PllMKCP, 1:0, scratch2, 19:18); - - c32(0, scratch35); - s(PllMSetupControl, 27:0, scratch35, 27:0); - - c32(0, scratch3); - s(PllMInputDivider, 7:0, scratch3, 7:0); - c(0x3e, scratch3, 15:8); - c(0, scratch3, 20:16); - s(PllMKVCO, 0:0, scratch3, 21:21); - s(PllMKCP, 1:0, scratch3, 23:22); - - c32(0, scratch36); - s(PllMSetupControl, 23:0, scratch36, 23:0); - - c32(0, scratch4); - s(PllMStableTime, 9:0, scratch4, 9:0); - s(PllMStableTime, 31:0, scratch4, 31:10); -} - -void sdram_init(void) { - if (is_soc_mariko()) { - sdram_init_mariko(); - } else { - sdram_init_erista(); - } -} - -const void *sdram_get_params(uint32_t dram_id) { - if (is_soc_mariko()) { - return sdram_get_params_mariko(dram_id); - } else { - return sdram_get_params_erista(dram_id); - } -} - -void sdram_save_params(const void *save_params) { - if (is_soc_mariko()) { - sdram_save_params_mariko(save_params); - } else { - sdram_save_params_erista(save_params); - } -} \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/sdram.h b/fusee/fusee-primary/fusee-primary-main/src/sdram.h deleted file mode 100644 index 38f725579..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sdram.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SDRAM_H_ -#define FUSEE_SDRAM_H_ - -void sdram_init(void); -const void *sdram_get_params(uint32_t dram_id); -void sdram_save_params(const void *save_params); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/sdram.inl b/fusee/fusee-primary/fusee-primary-main/src/sdram.inl deleted file mode 100644 index dd68f6bf0..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sdram.inl +++ /dev/null @@ -1,3560 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -static const uint8_t sdram_params_erista_0[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, 0x00, 0x04, 0xB4, 0x01, 0x70, - 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, 0x00, 0x00, 0x00, 0x40, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0x1F, 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, - 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, - 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, - 0xA6, 0xA6, 0xAF, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x03, 0x03, 0xE0, 0xC1, - 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, - 0x1F, 0x1F, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x50, 0x05, 0x00, 0x00, - 0xA1, 0x01, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, - 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x2C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_erista_1[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, 0x00, 0x04, 0xB4, 0x01, 0x70, - 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, 0x00, 0x00, 0x00, 0x40, - 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0xFF, 0xFF, 0xAF, 0x4F, 0xFF, 0xFF, 0xFF, 0x7F, 0x0B, 0xD7, 0x06, 0x40, - 0x00, 0x00, 0x02, 0x00, 0x08, 0x08, 0x03, 0x00, 0x00, 0x5C, 0x01, 0x00, - 0x10, 0x10, 0x10, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x30, 0x00, 0x00, 0x11, 0x01, 0x00, 0x02, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x0A, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, - 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x81, 0x10, 0x09, 0x28, 0x93, 0x32, 0xA5, 0x44, 0x5B, 0x8A, 0x67, 0x76, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xEF, 0xFF, 0xEF, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, 0xC0, - 0xDC, 0xDC, 0xDC, 0xDC, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, - 0x0A, 0x0A, 0x0A, 0x0A, 0x01, 0x00, 0x00, 0x00, 0x02, 0x03, 0x07, 0x00, - 0x02, 0x03, 0x07, 0x00, 0x00, 0x24, 0xFF, 0xFF, 0x00, 0x44, 0x57, 0x6E, - 0x00, 0x28, 0x72, 0x39, 0x00, 0x10, 0x9C, 0x4B, 0x00, 0x10, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x08, 0x4C, 0x00, 0x00, 0x80, 0x20, 0x10, 0x0A, 0x00, - 0x28, 0x10, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x02, 0x02, - 0x01, 0x02, 0x03, 0x00, 0x04, 0x05, 0xC3, 0x71, 0x0F, 0x0F, 0x00, 0x70, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x10, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x01, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x43, 0xC3, 0xBA, 0xE4, 0xD3, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x76, 0x0C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x7E, 0x16, 0x40, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x1E, 0x40, 0x04, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x2C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_erista_3[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, 0x00, 0x04, 0xB4, 0x01, 0x70, - 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, 0x00, 0x00, 0x00, 0x40, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0x1F, 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, - 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, - 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, - 0xA6, 0xA6, 0xAF, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x03, 0x03, 0xE0, 0xC1, - 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, - 0x1F, 0x1F, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x50, 0x05, 0x00, 0x00, - 0xA1, 0x01, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, - 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x2C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_erista_4[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, 0x00, 0x04, 0xB4, 0x01, 0x70, - 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x2C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_erista_5[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x03, 0x04, 0x07, 0x05, 0x06, 0x25, 0x25, 0x02, 0x0A, 0x0B, 0x1D, 0x0D, - 0x08, 0x0C, 0x09, 0x1E, 0x24, 0x26, 0x26, 0x08, 0x24, 0x06, 0x07, 0x9A, - 0x12, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x01, 0x08, 0x00, 0x00, 0x02, 0x08, 0x00, 0x00, 0x0D, 0x08, - 0x00, 0x00, 0x00, 0xC0, 0x71, 0x71, 0x03, 0x08, 0x00, 0x00, 0x0B, 0x08, - 0x72, 0x72, 0x0E, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x0D, 0x0C, - 0x00, 0x00, 0x0D, 0x0C, 0x14, 0x14, 0x16, 0x08, 0x04, 0x00, 0x01, 0x08, - 0x00, 0x00, 0x11, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0xCC, 0x00, - 0x0A, 0x00, 0x33, 0x00, 0x00, 0x00, 0x20, 0xF3, 0x05, 0x08, 0x11, 0x00, - 0xFF, 0x0F, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x03, 0x00, 0x70, 0x00, 0x0C, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, - 0x08, 0x44, 0x00, 0x10, 0x04, 0x04, 0x00, 0x06, 0x13, 0x07, 0x00, 0x80, - 0x01, 0x00, 0x00, 0x00, 0xA0, 0x00, 0x2C, 0x00, 0x01, 0x37, 0x00, 0x00, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x04, 0x00, - 0x1F, 0x22, 0x20, 0x80, 0x0F, 0xF4, 0x20, 0x02, 0x28, 0x28, 0x28, 0x28, - 0x28, 0x28, 0x28, 0x28, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, - 0xBE, 0x00, 0x00, 0x00, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, 0xFF, 0x0F, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x12, 0x00, 0x12, 0x00, 0x16, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x12, 0x00, 0x12, 0x00, 0x16, 0x00, - 0x32, 0x00, 0x2F, 0x00, 0x32, 0x00, 0x31, 0x00, 0x34, 0x00, 0x36, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x1E, 0x40, 0x04, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x2C, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_erista_6[1896] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, 0x00, 0x04, 0xB4, 0x01, 0x70, - 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, 0x00, 0x00, 0x00, 0x40, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0x1F, 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, - 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, 0x77, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_mariko_1[2104] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x03, 0x04, 0x07, 0x05, 0x06, 0x25, 0x25, 0x02, 0x0A, 0x0B, 0x1D, 0x0D, - 0x08, 0x0C, 0x09, 0x1E, 0x24, 0x26, 0x26, 0x08, 0x24, 0x06, 0x07, 0x9A, - 0x12, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x01, 0x88, 0x00, 0x00, 0x02, 0x88, 0x00, 0x00, 0x0D, 0x88, - 0x00, 0x00, 0x00, 0xC0, 0x31, 0x31, 0x03, 0x88, 0x00, 0x00, 0x0B, 0x88, - 0x5D, 0x5D, 0x0E, 0x8C, 0x5D, 0x5D, 0x0C, 0x88, 0x08, 0x08, 0x0D, 0x8C, - 0x00, 0x00, 0x0D, 0x8C, 0x16, 0x16, 0x16, 0x88, 0x04, 0x00, 0x01, 0x88, - 0x00, 0x00, 0x11, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0xCC, 0x00, - 0x0A, 0x00, 0x33, 0x00, 0x00, 0x00, 0x20, 0xF3, 0x25, 0x08, 0x11, 0x00, - 0x00, 0x00, 0xFF, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x03, 0x00, 0x70, 0x00, 0x0C, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, - 0x08, 0x44, 0x00, 0x10, 0x04, 0x04, 0x00, 0x06, 0x13, 0x07, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x2C, 0x00, 0x04, - 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_mariko_2[2104] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_mariko_3[2104] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_mariko_8[2104] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x16, 0x40, 0x04, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x7E, 0x1E, 0x40, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x2C, 0x00, 0x04, - 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint8_t sdram_params_mariko_12[2104] = { - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, - 0x2C, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x10, 0x9C, 0x4B, 0x00, 0x10, 0x00, 0x00, 0x01, 0x00, 0x00, 0x08, - 0x4C, 0x00, 0x00, 0x80, 0x20, 0x10, 0x0A, 0x00, 0x28, 0x10, 0x00, 0x80, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x02, 0x01, 0x02, 0x03, 0x00, - 0x04, 0x05, 0xA3, 0x72, 0x0F, 0x0F, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, - 0x00, 0xFF, 0x00, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, 0xCB, 0xFA, 0xE4, - 0xD3, 0xFE, 0x00, 0x06, 0x00, 0x00, 0x80, 0x2A, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x7E, 0x1E, 0x40, 0x04, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x24, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x2C, 0x00, 0x04, - 0x00, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00 -}; - -static const uint32_t sdram_params_index_table_erista[29] = { - 0, - 1, - 2, - 3, - 4, - 5, - 6, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, -}; - -static const uint32_t *sdram_params_erista[7] = { - (const uint32_t *)sdram_params_erista_0, - (const uint32_t *)sdram_params_erista_1, - (const uint32_t *)sdram_params_erista_2, - (const uint32_t *)sdram_params_erista_3, - (const uint32_t *)sdram_params_erista_4, - (const uint32_t *)sdram_params_erista_5, - (const uint32_t *)sdram_params_erista_6, -}; - -static const uint32_t sdram_params_index_table_mariko[29] = { - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xC, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0, - 1, - 2, - 3, - 4, - 1, - 2, - 3, - 4, - 5, - 6, - 7, - 6, - 8, - 9, - 0xA, - 7, - 6, - 0xB, - 0xB, - 0xB, - 7, -}; - -static const uint32_t *sdram_params_mariko[12] = { - (const uint32_t *)sdram_params_mariko_0, - (const uint32_t *)sdram_params_mariko_1, - (const uint32_t *)sdram_params_mariko_2, - (const uint32_t *)sdram_params_mariko_3, - (const uint32_t *)sdram_params_mariko_4, - (const uint32_t *)sdram_params_mariko_5, - (const uint32_t *)sdram_params_mariko_6, - (const uint32_t *)sdram_params_mariko_7, - (const uint32_t *)sdram_params_mariko_8, - (const uint32_t *)sdram_params_mariko_9, - (const uint32_t *)sdram_params_mariko_10, - (const uint32_t *)sdram_params_mariko_11, - (const uint32_t *)sdram_params_mariko_12, -}; diff --git a/fusee/fusee-primary/fusee-primary-main/src/sdram_lz.inl b/fusee/fusee-primary/fusee-primary-main/src/sdram_lz.inl deleted file mode 100644 index 4e29d890f..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sdram_lz.inl +++ /dev/null @@ -1,338 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -static const uint8_t sdram_params_erista_lz[1262] = { - 0x17, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, - 0x00, 0x2C, 0x17, 0x04, 0x09, 0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08, - 0x17, 0x10, 0x10, 0x00, 0x00, 0x68, 0xBC, 0x01, 0x70, 0x0A, 0x00, 0x00, - 0x00, 0x04, 0xB4, 0x01, 0x70, 0x01, 0x32, 0x54, 0x76, 0xC8, 0xE6, 0x00, - 0x70, 0x17, 0x10, 0x24, 0x34, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, - 0x00, 0x00, 0x00, 0x17, 0x04, 0x04, 0x17, 0x09, 0x18, 0xFF, 0xFF, 0x1F, - 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x00, 0x00, 0x50, 0x05, 0x00, 0x00, 0x77, - 0x00, 0x17, 0x04, 0x04, 0x17, 0x08, 0x08, 0x17, 0x08, 0x08, 0xA6, 0xA6, - 0xAF, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x03, 0x03, 0xE0, 0xC1, 0x04, 0x04, - 0x04, 0x04, 0x17, 0x04, 0x04, 0x17, 0x04, 0x3C, 0x1F, 0x1F, 0x1F, 0x1F, - 0x17, 0x04, 0x04, 0x17, 0x06, 0x06, 0x00, 0x00, 0x04, 0x08, 0x17, 0x06, - 0x46, 0xA1, 0x01, 0x00, 0x00, 0x32, 0x17, 0x0B, 0x64, 0x01, 0x17, 0x04, - 0x7C, 0x17, 0x07, 0x0C, 0x03, 0x17, 0x04, 0x04, 0x00, 0x00, 0x00, 0x1E, - 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x25, 0x00, 0x00, 0x00, 0x13, - 0x17, 0x0B, 0x2C, 0x09, 0x00, 0x00, 0x00, 0x17, 0x05, 0x5D, 0x17, 0x07, - 0x10, 0x0B, 0x17, 0x07, 0x28, 0x08, 0x17, 0x07, 0x0C, 0x17, 0x04, 0x1C, - 0x20, 0x00, 0x00, 0x00, 0x06, 0x17, 0x04, 0x04, 0x17, 0x07, 0x08, 0x17, - 0x04, 0x50, 0x17, 0x04, 0x2C, 0x17, 0x04, 0x1C, 0x17, 0x04, 0x10, 0x17, - 0x08, 0x6C, 0x17, 0x04, 0x10, 0x17, 0x04, 0x38, 0x17, 0x04, 0x40, 0x05, - 0x17, 0x07, 0x1C, 0x17, 0x08, 0x58, 0x17, 0x04, 0x24, 0x17, 0x04, 0x18, - 0x17, 0x08, 0x64, 0x00, 0x00, 0x01, 0x00, 0x12, 0x00, 0x00, 0x00, 0x14, - 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x17, 0x09, 0x0C, 0x17, 0x05, 0x82, - 0x58, 0x17, 0x07, 0x61, 0xC1, 0x17, 0x07, 0x50, 0x17, 0x04, 0x04, 0x17, - 0x08, 0x81, 0x48, 0x17, 0x04, 0x04, 0x17, 0x04, 0x28, 0x17, 0x04, 0x60, - 0x17, 0x08, 0x54, 0x27, 0x17, 0x04, 0x04, 0x17, 0x07, 0x14, 0x17, 0x04, - 0x04, 0x04, 0x17, 0x07, 0x81, 0x58, 0x17, 0x0C, 0x0C, 0x1C, 0x03, 0x00, - 0x00, 0x0D, 0xA0, 0x60, 0x91, 0xBF, 0x3B, 0x17, 0x04, 0x5A, 0xF3, 0x0C, - 0x04, 0x05, 0x1B, 0x06, 0x02, 0x03, 0x07, 0x1C, 0x23, 0x25, 0x25, 0x05, - 0x08, 0x1D, 0x09, 0x0A, 0x24, 0x0B, 0x1E, 0x0D, 0x0C, 0x26, 0x26, 0x03, - 0x02, 0x1B, 0x1C, 0x23, 0x03, 0x04, 0x07, 0x05, 0x06, 0x25, 0x25, 0x02, - 0x0A, 0x0B, 0x1D, 0x0D, 0x08, 0x0C, 0x09, 0x1E, 0x24, 0x26, 0x26, 0x08, - 0x24, 0x06, 0x07, 0x9A, 0x12, 0x17, 0x05, 0x83, 0x41, 0x00, 0xFF, 0x17, - 0x10, 0x83, 0x6C, 0x04, 0x00, 0x01, 0x08, 0x00, 0x00, 0x02, 0x08, 0x00, - 0x00, 0x0D, 0x08, 0x00, 0x00, 0x00, 0xC0, 0x71, 0x71, 0x03, 0x08, 0x00, - 0x00, 0x0B, 0x08, 0x72, 0x72, 0x0E, 0x0C, 0x17, 0x04, 0x20, 0x08, 0x08, - 0x0D, 0x0C, 0x00, 0x00, 0x0D, 0x0C, 0x14, 0x14, 0x16, 0x08, 0x17, 0x06, - 0x2C, 0x11, 0x08, 0x17, 0x10, 0x84, 0x67, 0x15, 0x00, 0xCC, 0x00, 0x0A, - 0x00, 0x33, 0x00, 0x00, 0x00, 0x20, 0xF3, 0x05, 0x08, 0x11, 0x00, 0xFF, - 0x0F, 0xFF, 0x0F, 0x17, 0x08, 0x83, 0x4C, 0x01, 0x03, 0x00, 0x70, 0x00, - 0x0C, 0x00, 0x01, 0x17, 0x04, 0x0C, 0x08, 0x44, 0x00, 0x10, 0x04, 0x04, - 0x00, 0x06, 0x13, 0x07, 0x00, 0x80, 0x17, 0x04, 0x10, 0xA0, 0x00, 0x2C, - 0x00, 0x01, 0x37, 0x00, 0x00, 0x00, 0x80, 0x17, 0x06, 0x48, 0x08, 0x00, - 0x04, 0x00, 0x1F, 0x22, 0x20, 0x80, 0x0F, 0xF4, 0x20, 0x02, 0x28, 0x28, - 0x28, 0x28, 0x17, 0x04, 0x04, 0x11, 0x11, 0x11, 0x11, 0x17, 0x04, 0x04, - 0xBE, 0x00, 0x00, 0x17, 0x05, 0x58, 0x17, 0x08, 0x5C, 0x17, 0x22, 0x85, - 0x6A, 0x17, 0x1A, 0x1A, 0x14, 0x00, 0x12, 0x00, 0x10, 0x17, 0x05, 0x83, - 0x0A, 0x17, 0x16, 0x18, 0x30, 0x00, 0x2E, 0x00, 0x33, 0x00, 0x30, 0x00, - 0x33, 0x00, 0x35, 0x00, 0x30, 0x00, 0x32, 0x17, 0x05, 0x83, 0x0C, 0x17, - 0x04, 0x20, 0x17, 0x18, 0x18, 0x28, 0x00, 0x28, 0x17, 0x04, 0x04, 0x17, - 0x08, 0x08, 0x17, 0x10, 0x10, 0x00, 0x14, 0x17, 0x05, 0x5A, 0x17, 0x04, - 0x5C, 0x17, 0x04, 0x5E, 0x17, 0x04, 0x0E, 0x17, 0x0E, 0x78, 0x17, 0x09, - 0x82, 0x50, 0x40, 0x06, 0x00, 0xCC, 0x00, 0x09, 0x00, 0x4F, 0x00, 0x51, - 0x17, 0x08, 0x18, 0x80, 0x01, 0x00, 0x00, 0x40, 0x17, 0x04, 0x20, 0x03, - 0x00, 0x00, 0x00, 0xAB, 0x00, 0x0A, 0x04, 0x11, 0x17, 0x08, 0x82, 0x58, - 0x17, 0x0C, 0x38, 0x17, 0x1B, 0x81, 0x6C, 0x17, 0x08, 0x85, 0x60, 0x17, - 0x08, 0x86, 0x50, 0x17, 0x08, 0x86, 0x60, 0x17, 0x06, 0x83, 0x21, 0x22, - 0x04, 0xFF, 0xFF, 0xAF, 0x4F, 0x17, 0x0C, 0x86, 0x74, 0x17, 0x08, 0x2C, - 0x8B, 0xFF, 0x07, 0x17, 0x06, 0x81, 0x04, 0x32, 0x54, 0x76, 0x10, 0x47, - 0x32, 0x65, 0x10, 0x34, 0x76, 0x25, 0x01, 0x34, 0x67, 0x25, 0x01, 0x75, - 0x64, 0x32, 0x01, 0x72, 0x56, 0x34, 0x10, 0x23, 0x74, 0x56, 0x01, 0x45, - 0x32, 0x67, 0x17, 0x04, 0x24, 0x49, 0x92, 0x24, 0x17, 0x04, 0x04, 0x17, - 0x11, 0x7C, 0x1B, 0x17, 0x04, 0x04, 0x17, 0x13, 0x81, 0x14, 0x2F, 0x41, - 0x13, 0x1F, 0x14, 0x00, 0x01, 0x00, 0x17, 0x04, 0x7C, 0xFF, 0xFF, 0xFF, - 0x7F, 0x0B, 0xD7, 0x06, 0x40, 0x00, 0x00, 0x02, 0x00, 0x08, 0x08, 0x03, - 0x00, 0x00, 0x5C, 0x01, 0x00, 0x10, 0x10, 0x10, 0x17, 0x06, 0x86, 0x59, - 0x17, 0x0F, 0x89, 0x14, 0x37, 0x17, 0x07, 0x82, 0x72, 0x10, 0x17, 0x06, - 0x83, 0x0D, 0x00, 0x11, 0x01, 0x17, 0x05, 0x85, 0x39, 0x17, 0x04, 0x0E, - 0x0A, 0x17, 0x07, 0x89, 0x29, 0x17, 0x04, 0x1B, 0x17, 0x08, 0x86, 0x77, - 0x17, 0x09, 0x12, 0x20, 0x00, 0x00, 0x00, 0x81, 0x10, 0x09, 0x28, 0x93, - 0x32, 0xA5, 0x44, 0x5B, 0x8A, 0x67, 0x76, 0x17, 0x18, 0x82, 0x2C, 0xFF, - 0xEF, 0xFF, 0xEF, 0xC0, 0xC0, 0xC0, 0xC0, 0x17, 0x04, 0x04, 0xDC, 0xDC, - 0xDC, 0xDC, 0x0A, 0x0A, 0x0A, 0x0A, 0x17, 0x04, 0x04, 0x17, 0x04, 0x04, - 0x17, 0x05, 0x82, 0x24, 0x03, 0x07, 0x17, 0x04, 0x04, 0x00, 0x00, 0x24, - 0xFF, 0xFF, 0x00, 0x44, 0x57, 0x6E, 0x00, 0x28, 0x72, 0x39, 0x00, 0x10, - 0x9C, 0x4B, 0x17, 0x04, 0x64, 0x01, 0x00, 0x00, 0x08, 0x4C, 0x00, 0x00, - 0x80, 0x20, 0x10, 0x0A, 0x00, 0x28, 0x10, 0x17, 0x06, 0x85, 0x60, 0x17, - 0x10, 0x82, 0x74, 0x17, 0x08, 0x08, 0x17, 0x08, 0x88, 0x00, 0x17, 0x04, - 0x10, 0x04, 0x17, 0x0B, 0x87, 0x6C, 0x01, 0x00, 0x02, 0x02, 0x01, 0x02, - 0x03, 0x00, 0x04, 0x05, 0xC3, 0x71, 0x0F, 0x0F, 0x17, 0x08, 0x8B, 0x18, - 0x1F, 0x17, 0x09, 0x81, 0x73, 0x00, 0xFF, 0x00, 0xFF, 0x17, 0x05, 0x86, - 0x48, 0x17, 0x04, 0x0C, 0x17, 0x07, 0x86, 0x34, 0x00, 0x00, 0xF0, 0x17, - 0x09, 0x87, 0x54, 0x43, 0xC3, 0xBA, 0xE4, 0xD3, 0x1E, 0x17, 0x0C, 0x81, - 0x52, 0x17, 0x0A, 0x1C, 0x17, 0x10, 0x81, 0x6C, 0x17, 0x0A, 0x82, 0x21, - 0x17, 0x07, 0x82, 0x4D, 0x17, 0x0A, 0x8A, 0x1B, 0x17, 0x11, 0x2C, 0x76, - 0x0C, 0x17, 0x0A, 0x8A, 0x67, 0x17, 0x0F, 0x84, 0x28, 0x17, 0x06, 0x34, - 0x17, 0x17, 0x3A, 0x7E, 0x16, 0x40, 0x17, 0x0C, 0x8B, 0x1F, 0x17, 0x2A, - 0x38, 0x1E, 0x17, 0x0A, 0x38, 0x17, 0x13, 0x81, 0x28, 0x00, 0xC0, 0x17, - 0x17, 0x55, 0x46, 0x24, 0x17, 0x0A, 0x81, 0x28, 0x17, 0x14, 0x38, 0x17, - 0x18, 0x81, 0x60, 0x46, 0x2C, 0x17, 0x06, 0x38, 0xEC, 0x17, 0x0D, 0x16, - 0x17, 0x0E, 0x82, 0x3C, 0x17, 0x82, 0x0C, 0x8E, 0x68, 0x17, 0x04, 0x24, - 0x17, 0x5C, 0x8E, 0x68, 0x17, 0x07, 0x82, 0x5F, 0x80, 0x17, 0x87, 0x01, - 0x8E, 0x68, 0x02, 0x17, 0x81, 0x4A, 0x8E, 0x68, 0x17, 0x0C, 0x87, 0x78, - 0x17, 0x85, 0x28, 0x8E, 0x68, 0x17, 0x8E, 0x68, 0x9D, 0x50, 0x17, 0x81, - 0x24, 0x8E, 0x68, 0x17, 0x04, 0x2C, 0x17, 0x28, 0x8E, 0x68, 0x17, 0x04, - 0x30, 0x17, 0x85, 0x3C, 0x8E, 0x68, 0x12, 0x17, 0x07, 0x85, 0x70, 0x17, - 0x88, 0x74, 0x8E, 0x68, 0x17, 0x87, 0x3E, 0x9D, 0x50, 0x0C, 0x17, 0x04, - 0x04, 0x17, 0x12, 0x8E, 0x68, 0x18, 0x17, 0x87, 0x12, 0xBB, 0x20, 0x17, - 0x83, 0x04, 0x9D, 0x50, 0x15, 0x17, 0x05, 0x8D, 0x76, 0x17, 0x0F, 0x8B, - 0x49, 0x17, 0x0B, 0x18, 0x32, 0x00, 0x2F, 0x00, 0x32, 0x00, 0x31, 0x00, - 0x34, 0x00, 0x36, 0x00, 0x2F, 0x00, 0x33, 0x17, 0x09, 0x84, 0x0C, 0x17, - 0x18, 0x18, 0x17, 0x20, 0x8E, 0x68, 0x15, 0x17, 0x07, 0x5A, 0x17, 0x06, - 0x5E, 0x16, 0x00, 0x15, 0x17, 0x82, 0x40, 0x9D, 0x50, 0x17, 0x86, 0x5F, - 0xBB, 0x20, 0x3A, 0x00, 0x00, 0x00, 0x1D, 0x17, 0x81, 0x4F, 0xAC, 0x38, - 0x3B, 0x17, 0x04, 0x04, 0x17, 0x86, 0x30, 0x8E, 0x68, 0x17, 0x81, 0x53, - 0xAC, 0x38, 0x07, 0x17, 0x0D, 0x8E, 0x68, 0xA3, 0x72, 0x17, 0x83, 0x10, - 0x8E, 0x68 -}; - -static const uint8_t sdram_params_mariko_lz[1741] = { - 0x19, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, - 0x00, 0x2C, 0x19, 0x04, 0x09, 0x00, 0x19, 0x04, 0x04, 0x19, 0x08, 0x08, - 0x19, 0x10, 0x10, 0x19, 0x20, 0x20, 0x19, 0x40, 0x40, 0x19, 0x2A, 0x2A, - 0x02, 0x80, 0x18, 0x40, 0x00, 0x00, 0x00, 0x19, 0x04, 0x04, 0x19, 0x09, - 0x14, 0xFF, 0xFF, 0x1F, 0x00, 0xD8, 0x51, 0x1A, 0xA0, 0x19, 0x06, 0x0E, - 0x88, 0x19, 0x04, 0x04, 0x00, 0x20, 0x12, 0x19, 0x0A, 0x0C, 0x19, 0x06, - 0x08, 0x00, 0x00, 0xBC, 0xBC, 0xC5, 0xB3, 0x3C, 0x9E, 0x00, 0x00, 0x02, - 0x03, 0xE0, 0xC1, 0x04, 0x04, 0x04, 0x04, 0x19, 0x04, 0x04, 0x19, 0x04, - 0x04, 0x3F, 0x3F, 0x3F, 0x3F, 0x19, 0x04, 0x04, 0x19, 0x04, 0x04, 0x19, - 0x04, 0x38, 0x04, 0x08, 0x00, 0x00, 0x50, 0x50, 0x50, 0x00, 0xA1, 0x01, - 0x00, 0x00, 0x30, 0x19, 0x04, 0x39, 0x10, 0x00, 0x16, 0x00, 0x10, 0x90, - 0x19, 0x06, 0x81, 0x00, 0x19, 0x07, 0x74, 0x03, 0x19, 0x04, 0x04, 0x00, - 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x3A, 0x00, - 0x00, 0x00, 0x1D, 0x19, 0x0B, 0x81, 0x14, 0x09, 0x00, 0x00, 0x00, 0x04, - 0x19, 0x0B, 0x10, 0x0B, 0x19, 0x07, 0x28, 0x08, 0x19, 0x07, 0x0C, 0x19, - 0x04, 0x1C, 0x17, 0x00, 0x00, 0x00, 0x15, 0x19, 0x07, 0x08, 0x1B, 0x19, - 0x07, 0x28, 0x20, 0x00, 0x00, 0x00, 0x06, 0x19, 0x04, 0x04, 0x19, 0x07, - 0x08, 0x19, 0x04, 0x64, 0x19, 0x04, 0x18, 0x19, 0x04, 0x30, 0x19, 0x04, - 0x10, 0x19, 0x08, 0x81, 0x00, 0x19, 0x04, 0x10, 0x19, 0x04, 0x4C, 0x0E, - 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0x38 -}; - -static const uint32_t sdram_params_index_table_erista[29] = { - 0, - 1, - 2, - 3, - 4, - 5, - 6, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, -}; - -static const uint32_t sdram_params_index_table_mariko[29] = { - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xC, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0xFFFFFFFF, - 0, - 1, - 2, - 3, - 4, - 1, - 2, - 3, - 4, - 5, - 6, - 7, - 6, - 8, - 9, - 0xA, - 7, - 6, - 0xB, - 0xB, - 0xB, - 7, -}; diff --git a/fusee/fusee-primary/fusee-primary-main/src/sdram_params.h b/fusee/fusee-primary/fusee-primary-main/src/sdram_params.h deleted file mode 100644 index 72e34d4bd..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sdram_params.h +++ /dev/null @@ -1,1041 +0,0 @@ -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SDRAM_PARAMS_H_ -#define FUSEE_SDRAM_PARAMS_H_ - -#include - -typedef enum { - NvBootMemoryType_None = 0, - NvBootMemoryType_Ddr = 0, - NvBootMemoryType_LpDdr = 0, - NvBootMemoryType_Ddr2 = 0, - NvBootMemoryType_LpDdr2, - NvBootMemoryType_Ddr3, - NvBootMemoryType_LpDdr4, - NvBootMemoryType_Num, - NvBootMemoryType_Unused = 0X7FFFFFF, -} NvBootMemoryType; - -typedef struct { - NvBootMemoryType MemoryType; - uint32_t PllMInputDivider; - uint32_t PllMFeedbackDivider; - uint32_t PllMStableTime; - uint32_t PllMSetupControl; - uint32_t PllMPostDivider; - uint32_t PllMKCP; - uint32_t PllMKVCO; - uint32_t EmcBctSpare0; - uint32_t EmcBctSpare1; - uint32_t EmcBctSpare2; - uint32_t EmcBctSpare3; - uint32_t EmcBctSpare4; - uint32_t EmcBctSpare5; - uint32_t EmcBctSpare6; - uint32_t EmcBctSpare7; - uint32_t EmcBctSpare8; - uint32_t EmcBctSpare9; - uint32_t EmcBctSpare10; - uint32_t EmcBctSpare11; - uint32_t EmcBctSpare12; - uint32_t EmcBctSpare13; - uint32_t EmcClockSource; - uint32_t EmcClockSourceDll; - uint32_t ClkRstControllerPllmMisc2Override; - uint32_t ClkRstControllerPllmMisc2OverrideEnable; - uint32_t ClearClk2Mc1; - uint32_t EmcAutoCalInterval; - uint32_t EmcAutoCalConfig; - uint32_t EmcAutoCalConfig2; - uint32_t EmcAutoCalConfig3; - uint32_t EmcAutoCalConfig4; - uint32_t EmcAutoCalConfig5; - uint32_t EmcAutoCalConfig6; - uint32_t EmcAutoCalConfig7; - uint32_t EmcAutoCalConfig8; - uint32_t EmcAutoCalVrefSel0; - uint32_t EmcAutoCalVrefSel1; - uint32_t EmcAutoCalChannel; - uint32_t EmcPmacroAutocalCfg0; - uint32_t EmcPmacroAutocalCfg1; - uint32_t EmcPmacroAutocalCfg2; - uint32_t EmcPmacroRxTerm; - uint32_t EmcPmacroDqTxDrv; - uint32_t EmcPmacroCaTxDrv; - uint32_t EmcPmacroCmdTxDrv; - uint32_t EmcPmacroAutocalCfgCommon; - uint32_t EmcPmacroZctrl; - uint32_t EmcAutoCalWait; - uint32_t EmcXm2CompPadCtrl; - uint32_t EmcXm2CompPadCtrl2; - uint32_t EmcXm2CompPadCtrl3; - uint32_t EmcAdrCfg; - uint32_t EmcPinProgramWait; - uint32_t EmcPinExtraWait; - uint32_t EmcPinGpioEn; - uint32_t EmcPinGpio; - uint32_t EmcTimingControlWait; - uint32_t EmcRc; - uint32_t EmcRfc; - uint32_t EmcRfcPb; - uint32_t EmcRefctrl2; - uint32_t EmcRfcSlr; - uint32_t EmcRas; - uint32_t EmcRp; - uint32_t EmcR2r; - uint32_t EmcW2w; - uint32_t EmcR2w; - uint32_t EmcW2r; - uint32_t EmcR2p; - uint32_t EmcW2p; - uint32_t EmcTppd; - uint32_t EmcCcdmw; - uint32_t EmcRdRcd; - uint32_t EmcWrRcd; - uint32_t EmcRrd; - uint32_t EmcRext; - uint32_t EmcWext; - uint32_t EmcWdv; - uint32_t EmcWdvChk; - uint32_t EmcWsv; - uint32_t EmcWev; - uint32_t EmcWdvMask; - uint32_t EmcWsDuration; - uint32_t EmcWeDuration; - uint32_t EmcQUse; - uint32_t EmcQuseWidth; - uint32_t EmcIbdly; - uint32_t EmcObdly; - uint32_t EmcEInput; - uint32_t EmcEInputDuration; - uint32_t EmcPutermExtra; - uint32_t EmcPutermWidth; - uint32_t EmcQRst; - uint32_t EmcQSafe; - uint32_t EmcRdv; - uint32_t EmcRdvMask; - uint32_t EmcRdvEarly; - uint32_t EmcRdvEarlyMask; - uint32_t EmcQpop; - uint32_t EmcRefresh; - uint32_t EmcBurstRefreshNum; - uint32_t EmcPreRefreshReqCnt; - uint32_t EmcPdEx2Wr; - uint32_t EmcPdEx2Rd; - uint32_t EmcPChg2Pden; - uint32_t EmcAct2Pden; - uint32_t EmcAr2Pden; - uint32_t EmcRw2Pden; - uint32_t EmcCke2Pden; - uint32_t EmcPdex2Cke; - uint32_t EmcPdex2Mrr; - uint32_t EmcTxsr; - uint32_t EmcTxsrDll; - uint32_t EmcTcke; - uint32_t EmcTckesr; - uint32_t EmcTpd; - uint32_t EmcTfaw; - uint32_t EmcTrpab; - uint32_t EmcTClkStable; - uint32_t EmcTClkStop; - uint32_t EmcTRefBw; - uint32_t EmcFbioCfg5; - uint32_t EmcFbioCfg7; - uint32_t EmcFbioCfg8; - uint32_t EmcCmdMappingCmd0_0; - uint32_t EmcCmdMappingCmd0_1; - uint32_t EmcCmdMappingCmd0_2; - uint32_t EmcCmdMappingCmd1_0; - uint32_t EmcCmdMappingCmd1_1; - uint32_t EmcCmdMappingCmd1_2; - uint32_t EmcCmdMappingCmd2_0; - uint32_t EmcCmdMappingCmd2_1; - uint32_t EmcCmdMappingCmd2_2; - uint32_t EmcCmdMappingCmd3_0; - uint32_t EmcCmdMappingCmd3_1; - uint32_t EmcCmdMappingCmd3_2; - uint32_t EmcCmdMappingByte; - uint32_t EmcFbioSpare; - uint32_t EmcCfgRsv; - uint32_t EmcMrs; - uint32_t EmcEmrs; - uint32_t EmcEmrs2; - uint32_t EmcEmrs3; - uint32_t EmcMrw1; - uint32_t EmcMrw2; - uint32_t EmcMrw3; - uint32_t EmcMrw4; - uint32_t EmcMrw6; - uint32_t EmcMrw8; - uint32_t EmcMrw9; - uint32_t EmcMrw10; - uint32_t EmcMrw12; - uint32_t EmcMrw13; - uint32_t EmcMrw14; - uint32_t EmcMrwExtra; - uint32_t EmcWarmBootMrwExtra; - uint32_t EmcWarmBootExtraModeRegWriteEnable; - uint32_t EmcExtraModeRegWriteEnable; - uint32_t EmcMrwResetCommand; - uint32_t EmcMrwResetNInitWait; - uint32_t EmcMrsWaitCnt; - uint32_t EmcMrsWaitCnt2; - uint32_t EmcCfg; - uint32_t EmcCfg2; - uint32_t EmcCfgPipe; - uint32_t EmcCfgPipeClk; - uint32_t EmcFdpdCtrlCmdNoRamp; - uint32_t EmcCfgUpdate; - uint32_t EmcDbg; - uint32_t EmcDbgWriteMux; - uint32_t EmcCmdQ; - uint32_t EmcMc2EmcQ; - uint32_t EmcDynSelfRefControl; - uint32_t AhbArbitrationXbarCtrlMemInitDone; - uint32_t EmcCfgDigDll; - uint32_t EmcCfgDigDll_1; - uint32_t EmcCfgDigDllPeriod; - uint32_t EmcDevSelect; - uint32_t EmcSelDpdCtrl; - uint32_t EmcFdpdCtrlDq; - uint32_t EmcFdpdCtrlCmd; - uint32_t EmcPmacroIbVrefDq_0; - uint32_t EmcPmacroIbVrefDq_1; - uint32_t EmcPmacroIbVrefDqs_0; - uint32_t EmcPmacroIbVrefDqs_1; - uint32_t EmcPmacroIbRxrt; - uint32_t EmcCfgPipe1; - uint32_t EmcCfgPipe2; - uint32_t EmcPmacroQuseDdllRank0_0; - uint32_t EmcPmacroQuseDdllRank0_1; - uint32_t EmcPmacroQuseDdllRank0_2; - uint32_t EmcPmacroQuseDdllRank0_3; - uint32_t EmcPmacroQuseDdllRank0_4; - uint32_t EmcPmacroQuseDdllRank0_5; - uint32_t EmcPmacroQuseDdllRank1_0; - uint32_t EmcPmacroQuseDdllRank1_1; - uint32_t EmcPmacroQuseDdllRank1_2; - uint32_t EmcPmacroQuseDdllRank1_3; - uint32_t EmcPmacroQuseDdllRank1_4; - uint32_t EmcPmacroQuseDdllRank1_5; - uint32_t EmcPmacroObDdllLongDqRank0_0; - uint32_t EmcPmacroObDdllLongDqRank0_1; - uint32_t EmcPmacroObDdllLongDqRank0_2; - uint32_t EmcPmacroObDdllLongDqRank0_3; - uint32_t EmcPmacroObDdllLongDqRank0_4; - uint32_t EmcPmacroObDdllLongDqRank0_5; - uint32_t EmcPmacroObDdllLongDqRank1_0; - uint32_t EmcPmacroObDdllLongDqRank1_1; - uint32_t EmcPmacroObDdllLongDqRank1_2; - uint32_t EmcPmacroObDdllLongDqRank1_3; - uint32_t EmcPmacroObDdllLongDqRank1_4; - uint32_t EmcPmacroObDdllLongDqRank1_5; - uint32_t EmcPmacroObDdllLongDqsRank0_0; - uint32_t EmcPmacroObDdllLongDqsRank0_1; - uint32_t EmcPmacroObDdllLongDqsRank0_2; - uint32_t EmcPmacroObDdllLongDqsRank0_3; - uint32_t EmcPmacroObDdllLongDqsRank0_4; - uint32_t EmcPmacroObDdllLongDqsRank0_5; - uint32_t EmcPmacroObDdllLongDqsRank1_0; - uint32_t EmcPmacroObDdllLongDqsRank1_1; - uint32_t EmcPmacroObDdllLongDqsRank1_2; - uint32_t EmcPmacroObDdllLongDqsRank1_3; - uint32_t EmcPmacroObDdllLongDqsRank1_4; - uint32_t EmcPmacroObDdllLongDqsRank1_5; - uint32_t EmcPmacroIbDdllLongDqsRank0_0; - uint32_t EmcPmacroIbDdllLongDqsRank0_1; - uint32_t EmcPmacroIbDdllLongDqsRank0_2; - uint32_t EmcPmacroIbDdllLongDqsRank0_3; - uint32_t EmcPmacroIbDdllLongDqsRank1_0; - uint32_t EmcPmacroIbDdllLongDqsRank1_1; - uint32_t EmcPmacroIbDdllLongDqsRank1_2; - uint32_t EmcPmacroIbDdllLongDqsRank1_3; - uint32_t EmcPmacroDdllLongCmd_0; - uint32_t EmcPmacroDdllLongCmd_1; - uint32_t EmcPmacroDdllLongCmd_2; - uint32_t EmcPmacroDdllLongCmd_3; - uint32_t EmcPmacroDdllLongCmd_4; - uint32_t EmcPmacroDdllShortCmd_0; - uint32_t EmcPmacroDdllShortCmd_1; - uint32_t EmcPmacroDdllShortCmd_2; - uint32_t WarmBootWait; - uint32_t EmcOdtWrite; - uint32_t EmcZcalInterval; - uint32_t EmcZcalWaitCnt; - uint32_t EmcZcalMrwCmd; - uint32_t EmcMrsResetDll; - uint32_t EmcZcalInitDev0; - uint32_t EmcZcalInitDev1; - uint32_t EmcZcalInitWait; - uint32_t EmcZcalWarmColdBootEnables; - uint32_t EmcMrwLpddr2ZcalWarmBoot; - uint32_t EmcZqCalDdr3WarmBoot; - uint32_t EmcZqCalLpDdr4WarmBoot; - uint32_t EmcZcalWarmBootWait; - uint32_t EmcMrsWarmBootEnable; - uint32_t EmcMrsResetDllWait; - uint32_t EmcMrsExtra; - uint32_t EmcWarmBootMrsExtra; - uint32_t EmcEmrsDdr2DllEnable; - uint32_t EmcMrsDdr2DllReset; - uint32_t EmcEmrsDdr2OcdCalib; - uint32_t EmcDdr2Wait; - uint32_t EmcClkenOverride; - uint32_t EmcExtraRefreshNum; - uint32_t EmcClkenOverrideAllWarmBoot; - uint32_t McClkenOverrideAllWarmBoot; - uint32_t EmcCfgDigDllPeriodWarmBoot; - uint32_t PmcVddpSel; - uint32_t PmcVddpSelWait; - uint32_t PmcDdrPwr; - uint32_t PmcDdrCfg; - uint32_t PmcIoDpd3Req; - uint32_t PmcIoDpd3ReqWait; - uint32_t PmcIoDpd4ReqWait; - uint32_t PmcRegShort; - uint32_t PmcNoIoPower; - uint32_t PmcDdrCntrlWait; - uint32_t PmcDdrCntrl; - uint32_t EmcAcpdControl; - uint32_t EmcSwizzleRank0Byte0; - uint32_t EmcSwizzleRank0Byte1; - uint32_t EmcSwizzleRank0Byte2; - uint32_t EmcSwizzleRank0Byte3; - uint32_t EmcSwizzleRank1Byte0; - uint32_t EmcSwizzleRank1Byte1; - uint32_t EmcSwizzleRank1Byte2; - uint32_t EmcSwizzleRank1Byte3; - uint32_t EmcTxdsrvttgen; - uint32_t EmcDataBrlshft0; - uint32_t EmcDataBrlshft1; - uint32_t EmcDqsBrlshft0; - uint32_t EmcDqsBrlshft1; - uint32_t EmcCmdBrlshft0; - uint32_t EmcCmdBrlshft1; - uint32_t EmcCmdBrlshft2; - uint32_t EmcCmdBrlshft3; - uint32_t EmcQuseBrlshft0; - uint32_t EmcQuseBrlshft1; - uint32_t EmcQuseBrlshft2; - uint32_t EmcQuseBrlshft3; - uint32_t EmcDllCfg0; - uint32_t EmcDllCfg1; - uint32_t EmcPmcScratch1; - uint32_t EmcPmcScratch2; - uint32_t EmcPmcScratch3; - uint32_t EmcPmacroPadCfgCtrl; - uint32_t EmcPmacroVttgenCtrl0; - uint32_t EmcPmacroVttgenCtrl1; - uint32_t EmcPmacroVttgenCtrl2; - uint32_t EmcPmacroBrickCtrlRfu1; - uint32_t EmcPmacroCmdBrickCtrlFdpd; - uint32_t EmcPmacroBrickCtrlRfu2; - uint32_t EmcPmacroDataBrickCtrlFdpd; - uint32_t EmcPmacroBgBiasCtrl0; - uint32_t EmcPmacroDataPadRxCtrl; - uint32_t EmcPmacroCmdPadRxCtrl; - uint32_t EmcPmacroDataRxTermMode; - uint32_t EmcPmacroCmdRxTermMode; - uint32_t EmcPmacroDataPadTxCtrl; - uint32_t EmcPmacroCommonPadTxCtrl; - uint32_t EmcPmacroCmdPadTxCtrl; - uint32_t EmcCfg3; - uint32_t EmcPmacroTxPwrd0; - uint32_t EmcPmacroTxPwrd1; - uint32_t EmcPmacroTxPwrd2; - uint32_t EmcPmacroTxPwrd3; - uint32_t EmcPmacroTxPwrd4; - uint32_t EmcPmacroTxPwrd5; - uint32_t EmcConfigSampleDelay; - uint32_t EmcPmacroBrickMapping0; - uint32_t EmcPmacroBrickMapping1; - uint32_t EmcPmacroBrickMapping2; - uint32_t EmcPmacroTxSelClkSrc0; - uint32_t EmcPmacroTxSelClkSrc1; - uint32_t EmcPmacroTxSelClkSrc2; - uint32_t EmcPmacroTxSelClkSrc3; - uint32_t EmcPmacroTxSelClkSrc4; - uint32_t EmcPmacroTxSelClkSrc5; - uint32_t EmcPmacroDdllBypass; - uint32_t EmcPmacroDdllPwrd0; - uint32_t EmcPmacroDdllPwrd1; - uint32_t EmcPmacroDdllPwrd2; - uint32_t EmcPmacroCmdCtrl0; - uint32_t EmcPmacroCmdCtrl1; - uint32_t EmcPmacroCmdCtrl2; - uint32_t McEmemAdrCfg; - uint32_t McEmemAdrCfgDev0; - uint32_t McEmemAdrCfgDev1; - uint32_t McEmemAdrCfgChannelMask; - uint32_t McEmemAdrCfgBankMask0; - uint32_t McEmemAdrCfgBankMask1; - uint32_t McEmemAdrCfgBankMask2; - uint32_t McEmemCfg; - uint32_t McEmemArbCfg; - uint32_t McEmemArbOutstandingReq; - uint32_t McEmemArbRefpbHpCtrl; - uint32_t McEmemArbRefpbBankCtrl; - uint32_t McEmemArbTimingRcd; - uint32_t McEmemArbTimingRp; - uint32_t McEmemArbTimingRc; - uint32_t McEmemArbTimingRas; - uint32_t McEmemArbTimingFaw; - uint32_t McEmemArbTimingRrd; - uint32_t McEmemArbTimingRap2Pre; - uint32_t McEmemArbTimingWap2Pre; - uint32_t McEmemArbTimingR2R; - uint32_t McEmemArbTimingW2W; - uint32_t McEmemArbTimingR2W; - uint32_t McEmemArbTimingW2R; - uint32_t McEmemArbTimingRFCPB; - uint32_t McEmemArbDaTurns; - uint32_t McEmemArbDaCovers; - uint32_t McEmemArbMisc0; - uint32_t McEmemArbMisc1; - uint32_t McEmemArbMisc2; - uint32_t McEmemArbRing1Throttle; - uint32_t McEmemArbOverride; - uint32_t McEmemArbOverride1; - uint32_t McEmemArbRsv; - uint32_t McDaCfg0; - uint32_t McEmemArbTimingCcdmw; - uint32_t McClkenOverride; - uint32_t McStatControl; - uint32_t McVideoProtectBom; - uint32_t McVideoProtectBomAdrHi; - uint32_t McVideoProtectSizeMb; - uint32_t McVideoProtectVprOverride; - uint32_t McVideoProtectVprOverride1; - uint32_t McVideoProtectGpuOverride0; - uint32_t McVideoProtectGpuOverride1; - uint32_t McSecCarveoutBom; - uint32_t McSecCarveoutAdrHi; - uint32_t McSecCarveoutSizeMb; - uint32_t McVideoProtectWriteAccess; - uint32_t McSecCarveoutProtectWriteAccess; - uint32_t McGeneralizedCarveout1Bom; - uint32_t McGeneralizedCarveout1BomHi; - uint32_t McGeneralizedCarveout1Size128kb; - uint32_t McGeneralizedCarveout1Access0; - uint32_t McGeneralizedCarveout1Access1; - uint32_t McGeneralizedCarveout1Access2; - uint32_t McGeneralizedCarveout1Access3; - uint32_t McGeneralizedCarveout1Access4; - uint32_t McGeneralizedCarveout1ForceInternalAccess0; - uint32_t McGeneralizedCarveout1ForceInternalAccess1; - uint32_t McGeneralizedCarveout1ForceInternalAccess2; - uint32_t McGeneralizedCarveout1ForceInternalAccess3; - uint32_t McGeneralizedCarveout1ForceInternalAccess4; - uint32_t McGeneralizedCarveout1Cfg0; - uint32_t McGeneralizedCarveout2Bom; - uint32_t McGeneralizedCarveout2BomHi; - uint32_t McGeneralizedCarveout2Size128kb; - uint32_t McGeneralizedCarveout2Access0; - uint32_t McGeneralizedCarveout2Access1; - uint32_t McGeneralizedCarveout2Access2; - uint32_t McGeneralizedCarveout2Access3; - uint32_t McGeneralizedCarveout2Access4; - uint32_t McGeneralizedCarveout2ForceInternalAccess0; - uint32_t McGeneralizedCarveout2ForceInternalAccess1; - uint32_t McGeneralizedCarveout2ForceInternalAccess2; - uint32_t McGeneralizedCarveout2ForceInternalAccess3; - uint32_t McGeneralizedCarveout2ForceInternalAccess4; - uint32_t McGeneralizedCarveout2Cfg0; - uint32_t McGeneralizedCarveout3Bom; - uint32_t McGeneralizedCarveout3BomHi; - uint32_t McGeneralizedCarveout3Size128kb; - uint32_t McGeneralizedCarveout3Access0; - uint32_t McGeneralizedCarveout3Access1; - uint32_t McGeneralizedCarveout3Access2; - uint32_t McGeneralizedCarveout3Access3; - uint32_t McGeneralizedCarveout3Access4; - uint32_t McGeneralizedCarveout3ForceInternalAccess0; - uint32_t McGeneralizedCarveout3ForceInternalAccess1; - uint32_t McGeneralizedCarveout3ForceInternalAccess2; - uint32_t McGeneralizedCarveout3ForceInternalAccess3; - uint32_t McGeneralizedCarveout3ForceInternalAccess4; - uint32_t McGeneralizedCarveout3Cfg0; - uint32_t McGeneralizedCarveout4Bom; - uint32_t McGeneralizedCarveout4BomHi; - uint32_t McGeneralizedCarveout4Size128kb; - uint32_t McGeneralizedCarveout4Access0; - uint32_t McGeneralizedCarveout4Access1; - uint32_t McGeneralizedCarveout4Access2; - uint32_t McGeneralizedCarveout4Access3; - uint32_t McGeneralizedCarveout4Access4; - uint32_t McGeneralizedCarveout4ForceInternalAccess0; - uint32_t McGeneralizedCarveout4ForceInternalAccess1; - uint32_t McGeneralizedCarveout4ForceInternalAccess2; - uint32_t McGeneralizedCarveout4ForceInternalAccess3; - uint32_t McGeneralizedCarveout4ForceInternalAccess4; - uint32_t McGeneralizedCarveout4Cfg0; - uint32_t McGeneralizedCarveout5Bom; - uint32_t McGeneralizedCarveout5BomHi; - uint32_t McGeneralizedCarveout5Size128kb; - uint32_t McGeneralizedCarveout5Access0; - uint32_t McGeneralizedCarveout5Access1; - uint32_t McGeneralizedCarveout5Access2; - uint32_t McGeneralizedCarveout5Access3; - uint32_t McGeneralizedCarveout5Access4; - uint32_t McGeneralizedCarveout5ForceInternalAccess0; - uint32_t McGeneralizedCarveout5ForceInternalAccess1; - uint32_t McGeneralizedCarveout5ForceInternalAccess2; - uint32_t McGeneralizedCarveout5ForceInternalAccess3; - uint32_t McGeneralizedCarveout5ForceInternalAccess4; - uint32_t McGeneralizedCarveout5Cfg0; - uint32_t EmcCaTrainingEnable; - uint32_t SwizzleRankByteEncode; - uint32_t BootRomPatchControl; - uint32_t BootRomPatchData; - uint32_t McMtsCarveoutBom; - uint32_t McMtsCarveoutAdrHi; - uint32_t McMtsCarveoutSizeMb; - uint32_t McMtsCarveoutRegCtrl; -} sdram_params_erista_t; - -typedef struct { - NvBootMemoryType MemoryType; - uint32_t PllMInputDivider; - uint32_t PllMFeedbackDivider; - uint32_t PllMStableTime; - uint32_t PllMSetupControl; - uint32_t PllMPostDivider; - uint32_t PllMKCP; - uint32_t PllMKVCO; - uint32_t EmcBctSpare0; - uint32_t EmcBctSpare1; - uint32_t EmcBctSpare2; - uint32_t EmcBctSpare3; - uint32_t EmcBctSpare4; - uint32_t EmcBctSpare5; - uint32_t EmcBctSpare6; - uint32_t EmcBctSpare7; - uint32_t EmcBctSpare8; - uint32_t EmcBctSpare9; - uint32_t EmcBctSpare10; - uint32_t EmcBctSpare11; - uint32_t EmcBctSpare12; - uint32_t EmcBctSpare13; - uint32_t EmcBctSpareSecure0; - uint32_t EmcBctSpareSecure1; - uint32_t EmcBctSpareSecure2; - uint32_t EmcBctSpareSecure3; - uint32_t EmcBctSpareSecure4; - uint32_t EmcBctSpareSecure5; - uint32_t EmcBctSpareSecure6; - uint32_t EmcBctSpareSecure7; - uint32_t EmcBctSpareSecure8; - uint32_t EmcBctSpareSecure9; - uint32_t EmcBctSpareSecure10; - uint32_t EmcBctSpareSecure11; - uint32_t EmcBctSpareSecure12; - uint32_t EmcBctSpareSecure13; - uint32_t EmcBctSpareSecure14; - uint32_t EmcBctSpareSecure15; - uint32_t EmcBctSpareSecure16; - uint32_t EmcBctSpareSecure17; - uint32_t EmcBctSpareSecure18; - uint32_t EmcBctSpareSecure19; - uint32_t EmcBctSpareSecure20; - uint32_t EmcBctSpareSecure21; - uint32_t EmcBctSpareSecure22; - uint32_t EmcBctSpareSecure23; - uint32_t EmcClockSource; - uint32_t EmcClockSourceDll; - uint32_t ClkRstControllerPllmMisc2Override; - uint32_t ClkRstControllerPllmMisc2OverrideEnable; - uint32_t ClearClk2Mc1; - uint32_t EmcAutoCalInterval; - uint32_t EmcAutoCalConfig; - uint32_t EmcAutoCalConfig2; - uint32_t EmcAutoCalConfig3; - uint32_t EmcAutoCalConfig4; - uint32_t EmcAutoCalConfig5; - uint32_t EmcAutoCalConfig6; - uint32_t EmcAutoCalConfig7; - uint32_t EmcAutoCalConfig8; - uint32_t EmcAutoCalConfig9; - uint32_t EmcAutoCalVrefSel0; - uint32_t EmcAutoCalVrefSel1; - uint32_t EmcAutoCalChannel; - uint32_t EmcPmacroAutocalCfg0; - uint32_t EmcPmacroAutocalCfg1; - uint32_t EmcPmacroAutocalCfg2; - uint32_t EmcPmacroRxTerm; - uint32_t EmcPmacroDqTxDrv; - uint32_t EmcPmacroCaTxDrv; - uint32_t EmcPmacroCmdTxDrv; - uint32_t EmcPmacroAutocalCfgCommon; - uint32_t EmcPmacroZctrl; - uint32_t EmcAutoCalWait; - uint32_t EmcXm2CompPadCtrl; - uint32_t EmcXm2CompPadCtrl2; - uint32_t EmcXm2CompPadCtrl3; - uint32_t EmcAdrCfg; - uint32_t EmcPinProgramWait; - uint32_t EmcPinExtraWait; - uint32_t EmcPinGpioEn; - uint32_t EmcPinGpio; - uint32_t EmcTimingControlWait; - uint32_t EmcRc; - uint32_t EmcRfc; - uint32_t EmcRfcPb; - uint32_t EmcRefctrl2; - uint32_t EmcRfcSlr; - uint32_t EmcRas; - uint32_t EmcRp; - uint32_t EmcR2r; - uint32_t EmcW2w; - uint32_t EmcR2w; - uint32_t EmcW2r; - uint32_t EmcR2p; - uint32_t EmcW2p; - uint32_t EmcTppd; - uint32_t EmcTrtm; - uint32_t EmcTwtm; - uint32_t EmcTratm; - uint32_t EmcTwatm; - uint32_t EmcTr2ref; - uint32_t EmcCcdmw; - uint32_t EmcRdRcd; - uint32_t EmcWrRcd; - uint32_t EmcRrd; - uint32_t EmcRext; - uint32_t EmcWext; - uint32_t EmcWdv; - uint32_t EmcWdvChk; - uint32_t EmcWsv; - uint32_t EmcWev; - uint32_t EmcWdvMask; - uint32_t EmcWsDuration; - uint32_t EmcWeDuration; - uint32_t EmcQUse; - uint32_t EmcQuseWidth; - uint32_t EmcIbdly; - uint32_t EmcObdly; - uint32_t EmcEInput; - uint32_t EmcEInputDuration; - uint32_t EmcPutermExtra; - uint32_t EmcPutermWidth; - uint32_t EmcQRst; - uint32_t EmcQSafe; - uint32_t EmcRdv; - uint32_t EmcRdvMask; - uint32_t EmcRdvEarly; - uint32_t EmcRdvEarlyMask; - uint32_t EmcQpop; - uint32_t EmcRefresh; - uint32_t EmcBurstRefreshNum; - uint32_t EmcPreRefreshReqCnt; - uint32_t EmcPdEx2Wr; - uint32_t EmcPdEx2Rd; - uint32_t EmcPChg2Pden; - uint32_t EmcAct2Pden; - uint32_t EmcAr2Pden; - uint32_t EmcRw2Pden; - uint32_t EmcCke2Pden; - uint32_t EmcPdex2Cke; - uint32_t EmcPdex2Mrr; - uint32_t EmcTxsr; - uint32_t EmcTxsrDll; - uint32_t EmcTcke; - uint32_t EmcTckesr; - uint32_t EmcTpd; - uint32_t EmcTfaw; - uint32_t EmcTrpab; - uint32_t EmcTClkStable; - uint32_t EmcTClkStop; - uint32_t EmcTRefBw; - uint32_t EmcFbioCfg5; - uint32_t EmcFbioCfg7; - uint32_t EmcFbioCfg8; - uint32_t EmcCmdMappingCmd0_0; - uint32_t EmcCmdMappingCmd0_1; - uint32_t EmcCmdMappingCmd0_2; - uint32_t EmcCmdMappingCmd1_0; - uint32_t EmcCmdMappingCmd1_1; - uint32_t EmcCmdMappingCmd1_2; - uint32_t EmcCmdMappingCmd2_0; - uint32_t EmcCmdMappingCmd2_1; - uint32_t EmcCmdMappingCmd2_2; - uint32_t EmcCmdMappingCmd3_0; - uint32_t EmcCmdMappingCmd3_1; - uint32_t EmcCmdMappingCmd3_2; - uint32_t EmcCmdMappingByte; - uint32_t EmcFbioSpare; - uint32_t EmcCfgRsv; - uint32_t EmcMrs; - uint32_t EmcEmrs; - uint32_t EmcEmrs2; - uint32_t EmcEmrs3; - uint32_t EmcMrw1; - uint32_t EmcMrw2; - uint32_t EmcMrw3; - uint32_t EmcMrw4; - uint32_t EmcMrw6; - uint32_t EmcMrw8; - uint32_t EmcMrw9; - uint32_t EmcMrw10; - uint32_t EmcMrw12; - uint32_t EmcMrw13; - uint32_t EmcMrw14; - uint32_t EmcMrwExtra; - uint32_t EmcWarmBootMrwExtra; - uint32_t EmcWarmBootExtraModeRegWriteEnable; - uint32_t EmcExtraModeRegWriteEnable; - uint32_t EmcMrwResetCommand; - uint32_t EmcMrwResetNInitWait; - uint32_t EmcMrsWaitCnt; - uint32_t EmcMrsWaitCnt2; - uint32_t EmcCfg; - uint32_t EmcCfg2; - uint32_t EmcCfgPipe; - uint32_t EmcCfgPipeClk; - uint32_t EmcFdpdCtrlCmdNoRamp; - uint32_t EmcCfgUpdate; - uint32_t EmcDbg; - uint32_t EmcDbgWriteMux; - uint32_t EmcCmdQ; - uint32_t EmcMc2EmcQ; - uint32_t EmcDynSelfRefControl; - uint32_t AhbArbitrationXbarCtrlMemInitDone; - uint32_t EmcCfgDigDll; - uint32_t EmcCfgDigDll_1; - uint32_t EmcCfgDigDllPeriod; - uint32_t EmcDevSelect; - uint32_t EmcSelDpdCtrl; - uint32_t EmcFdpdCtrlDq; - uint32_t EmcFdpdCtrlCmd; - uint32_t EmcPmacroIbVrefDq_0; - uint32_t EmcPmacroIbVrefDq_1; - uint32_t EmcPmacroIbVrefDqs_0; - uint32_t EmcPmacroIbVrefDqs_1; - uint32_t EmcPmacroIbRxrt; - uint32_t EmcCfgPipe1; - uint32_t EmcCfgPipe2; - uint32_t EmcPmacroQuseDdllRank0_0; - uint32_t EmcPmacroQuseDdllRank0_1; - uint32_t EmcPmacroQuseDdllRank0_2; - uint32_t EmcPmacroQuseDdllRank0_3; - uint32_t EmcPmacroQuseDdllRank0_4; - uint32_t EmcPmacroQuseDdllRank0_5; - uint32_t EmcPmacroQuseDdllRank1_0; - uint32_t EmcPmacroQuseDdllRank1_1; - uint32_t EmcPmacroQuseDdllRank1_2; - uint32_t EmcPmacroQuseDdllRank1_3; - uint32_t EmcPmacroQuseDdllRank1_4; - uint32_t EmcPmacroQuseDdllRank1_5; - uint32_t EmcPmacroObDdllLongDqRank0_0; - uint32_t EmcPmacroObDdllLongDqRank0_1; - uint32_t EmcPmacroObDdllLongDqRank0_2; - uint32_t EmcPmacroObDdllLongDqRank0_3; - uint32_t EmcPmacroObDdllLongDqRank0_4; - uint32_t EmcPmacroObDdllLongDqRank0_5; - uint32_t EmcPmacroObDdllLongDqRank1_0; - uint32_t EmcPmacroObDdllLongDqRank1_1; - uint32_t EmcPmacroObDdllLongDqRank1_2; - uint32_t EmcPmacroObDdllLongDqRank1_3; - uint32_t EmcPmacroObDdllLongDqRank1_4; - uint32_t EmcPmacroObDdllLongDqRank1_5; - uint32_t EmcPmacroObDdllLongDqsRank0_0; - uint32_t EmcPmacroObDdllLongDqsRank0_1; - uint32_t EmcPmacroObDdllLongDqsRank0_2; - uint32_t EmcPmacroObDdllLongDqsRank0_3; - uint32_t EmcPmacroObDdllLongDqsRank0_4; - uint32_t EmcPmacroObDdllLongDqsRank0_5; - uint32_t EmcPmacroObDdllLongDqsRank1_0; - uint32_t EmcPmacroObDdllLongDqsRank1_1; - uint32_t EmcPmacroObDdllLongDqsRank1_2; - uint32_t EmcPmacroObDdllLongDqsRank1_3; - uint32_t EmcPmacroObDdllLongDqsRank1_4; - uint32_t EmcPmacroObDdllLongDqsRank1_5; - uint32_t EmcPmacroIbDdllLongDqsRank0_0; - uint32_t EmcPmacroIbDdllLongDqsRank0_1; - uint32_t EmcPmacroIbDdllLongDqsRank0_2; - uint32_t EmcPmacroIbDdllLongDqsRank0_3; - uint32_t EmcPmacroIbDdllLongDqsRank1_0; - uint32_t EmcPmacroIbDdllLongDqsRank1_1; - uint32_t EmcPmacroIbDdllLongDqsRank1_2; - uint32_t EmcPmacroIbDdllLongDqsRank1_3; - uint32_t EmcPmacroDdllLongCmd_0; - uint32_t EmcPmacroDdllLongCmd_1; - uint32_t EmcPmacroDdllLongCmd_2; - uint32_t EmcPmacroDdllLongCmd_3; - uint32_t EmcPmacroDdllLongCmd_4; - uint32_t EmcPmacroDdllShortCmd_0; - uint32_t EmcPmacroDdllShortCmd_1; - uint32_t EmcPmacroDdllShortCmd_2; - uint32_t EmcPmacroDdllPeriodicOffset; - uint32_t WarmBootWait; - uint32_t EmcOdtWrite; - uint32_t EmcZcalInterval; - uint32_t EmcZcalWaitCnt; - uint32_t EmcZcalMrwCmd; - uint32_t EmcMrsResetDll; - uint32_t EmcZcalInitDev0; - uint32_t EmcZcalInitDev1; - uint32_t EmcZcalInitWait; - uint32_t EmcZcalWarmColdBootEnables; - uint32_t EmcMrwLpddr2ZcalWarmBoot; - uint32_t EmcZqCalDdr3WarmBoot; - uint32_t EmcZqCalLpDdr4WarmBoot; - uint32_t EmcZcalWarmBootWait; - uint32_t EmcMrsWarmBootEnable; - uint32_t EmcMrsResetDllWait; - uint32_t EmcMrsExtra; - uint32_t EmcWarmBootMrsExtra; - uint32_t EmcEmrsDdr2DllEnable; - uint32_t EmcMrsDdr2DllReset; - uint32_t EmcEmrsDdr2OcdCalib; - uint32_t EmcDdr2Wait; - uint32_t EmcClkenOverride; - uint32_t EmcExtraRefreshNum; - uint32_t EmcClkenOverrideAllWarmBoot; - uint32_t McClkenOverrideAllWarmBoot; - uint32_t EmcCfgDigDllPeriodWarmBoot; - uint32_t PmcVddpSel; - uint32_t PmcVddpSelWait; - uint32_t PmcDdrCfg; - uint32_t PmcIoDpd3Req; - uint32_t PmcIoDpd3ReqWait; - uint32_t PmcIoDpd4ReqWait; - uint32_t PmcRegShort; - uint32_t PmcNoIoPower; - uint32_t PmcDdrCntrlWait; - uint32_t PmcDdrCntrl; - uint32_t EmcAcpdControl; - uint32_t EmcSwizzleRank0Byte0; - uint32_t EmcSwizzleRank0Byte1; - uint32_t EmcSwizzleRank0Byte2; - uint32_t EmcSwizzleRank0Byte3; - uint32_t EmcSwizzleRank1Byte0; - uint32_t EmcSwizzleRank1Byte1; - uint32_t EmcSwizzleRank1Byte2; - uint32_t EmcSwizzleRank1Byte3; - uint32_t EmcTxdsrvttgen; - uint32_t EmcDataBrlshft0; - uint32_t EmcDataBrlshft1; - uint32_t EmcDqsBrlshft0; - uint32_t EmcDqsBrlshft1; - uint32_t EmcCmdBrlshft0; - uint32_t EmcCmdBrlshft1; - uint32_t EmcCmdBrlshft2; - uint32_t EmcCmdBrlshft3; - uint32_t EmcQuseBrlshft0; - uint32_t EmcQuseBrlshft1; - uint32_t EmcQuseBrlshft2; - uint32_t EmcQuseBrlshft3; - uint32_t EmcPmacroDllCfg0; - uint32_t EmcPmacroDllCfg1; - uint32_t EmcPmcScratch1; - uint32_t EmcPmcScratch2; - uint32_t EmcPmcScratch3; - uint32_t EmcPmacroPadCfgCtrl; - uint32_t EmcPmacroVttgenCtrl0; - uint32_t EmcPmacroVttgenCtrl1; - uint32_t EmcPmacroVttgenCtrl2; - uint32_t EmcPmacroDsrVttgenCtrl0; - uint32_t EmcPmacroBrickCtrlRfu1; - uint32_t EmcPmacroCmdBrickCtrlFdpd; - uint32_t EmcPmacroBrickCtrlRfu2; - uint32_t EmcPmacroDataBrickCtrlFdpd; - uint32_t EmcPmacroBgBiasCtrl0; - uint32_t EmcPmacroDataPadRxCtrl; - uint32_t EmcPmacroCmdPadRxCtrl; - uint32_t EmcPmacroDataRxTermMode; - uint32_t EmcPmacroCmdRxTermMode; - uint32_t EmcPmacroDataPadTxCtrl; - uint32_t EmcPmacroCmdPadTxCtrl; - uint32_t EmcCfg3; - uint32_t EmcPmacroTxPwrd0; - uint32_t EmcPmacroTxPwrd1; - uint32_t EmcPmacroTxPwrd2; - uint32_t EmcPmacroTxPwrd3; - uint32_t EmcPmacroTxPwrd4; - uint32_t EmcPmacroTxPwrd5; - uint32_t EmcConfigSampleDelay; - uint32_t EmcPmacroBrickMapping0; - uint32_t EmcPmacroBrickMapping1; - uint32_t EmcPmacroBrickMapping2; - uint32_t EmcPmacroTxSelClkSrc0; - uint32_t EmcPmacroTxSelClkSrc1; - uint32_t EmcPmacroTxSelClkSrc2; - uint32_t EmcPmacroTxSelClkSrc3; - uint32_t EmcPmacroTxSelClkSrc4; - uint32_t EmcPmacroTxSelClkSrc5; - uint32_t EmcPmacroPerbitFgcgCtrl0; - uint32_t EmcPmacroPerbitFgcgCtrl1; - uint32_t EmcPmacroPerbitFgcgCtrl2; - uint32_t EmcPmacroPerbitFgcgCtrl3; - uint32_t EmcPmacroPerbitFgcgCtrl4; - uint32_t EmcPmacroPerbitFgcgCtrl5; - uint32_t EmcPmacroPerbitRfuCtrl0; - uint32_t EmcPmacroPerbitRfuCtrl1; - uint32_t EmcPmacroPerbitRfuCtrl2; - uint32_t EmcPmacroPerbitRfuCtrl3; - uint32_t EmcPmacroPerbitRfuCtrl4; - uint32_t EmcPmacroPerbitRfuCtrl5; - uint32_t EmcPmacroPerbitRfu1Ctrl0; - uint32_t EmcPmacroPerbitRfu1Ctrl1; - uint32_t EmcPmacroPerbitRfu1Ctrl2; - uint32_t EmcPmacroPerbitRfu1Ctrl3; - uint32_t EmcPmacroPerbitRfu1Ctrl4; - uint32_t EmcPmacroPerbitRfu1Ctrl5; - uint32_t EmcPmacroDataPiCtrl; - uint32_t EmcPmacroCmdPiCtrl; - uint32_t EmcPmacroDdllBypass; - uint32_t EmcPmacroDdllPwrd0; - uint32_t EmcPmacroDdllPwrd1; - uint32_t EmcPmacroDdllPwrd2; - uint32_t EmcPmacroCmdCtrl0; - uint32_t EmcPmacroCmdCtrl1; - uint32_t EmcPmacroCmdCtrl2; - uint32_t McEmemAdrCfg; - uint32_t McEmemAdrCfgDev0; - uint32_t McEmemAdrCfgDev1; - uint32_t McEmemAdrCfgChannelMask; - uint32_t McEmemAdrCfgBankMask0; - uint32_t McEmemAdrCfgBankMask1; - uint32_t McEmemAdrCfgBankMask2; - uint32_t McEmemCfg; - uint32_t McEmemArbCfg; - uint32_t McEmemArbOutstandingReq; - uint32_t McEmemArbRefpbHpCtrl; - uint32_t McEmemArbRefpbBankCtrl; - uint32_t McEmemArbTimingRcd; - uint32_t McEmemArbTimingRp; - uint32_t McEmemArbTimingRc; - uint32_t McEmemArbTimingRas; - uint32_t McEmemArbTimingFaw; - uint32_t McEmemArbTimingRrd; - uint32_t McEmemArbTimingRap2Pre; - uint32_t McEmemArbTimingWap2Pre; - uint32_t McEmemArbTimingR2R; - uint32_t McEmemArbTimingW2W; - uint32_t McEmemArbTimingR2W; - uint32_t McEmemArbTimingW2R; - uint32_t McEmemArbTimingRFCPB; - uint32_t McEmemArbDaTurns; - uint32_t McEmemArbDaCovers; - uint32_t McEmemArbMisc0; - uint32_t McEmemArbMisc1; - uint32_t McEmemArbMisc2; - uint32_t McEmemArbRing1Throttle; - uint32_t McEmemArbOverride; - uint32_t McEmemArbOverride1; - uint32_t McEmemArbRsv; - uint32_t McDaCfg0; - uint32_t McEmemArbTimingCcdmw; - uint32_t McClkenOverride; - uint32_t McStatControl; - uint32_t McVideoProtectBom; - uint32_t McVideoProtectBomAdrHi; - uint32_t McVideoProtectSizeMb; - uint32_t McVideoProtectVprOverride; - uint32_t McVideoProtectVprOverride1; - uint32_t McVideoProtectGpuOverride0; - uint32_t McVideoProtectGpuOverride1; - uint32_t McSecCarveoutBom; - uint32_t McSecCarveoutAdrHi; - uint32_t McSecCarveoutSizeMb; - uint32_t McVideoProtectWriteAccess; - uint32_t McSecCarveoutProtectWriteAccess; - uint32_t McGeneralizedCarveout1Bom; - uint32_t McGeneralizedCarveout1BomHi; - uint32_t McGeneralizedCarveout1Size128kb; - uint32_t McGeneralizedCarveout1Access0; - uint32_t McGeneralizedCarveout1Access1; - uint32_t McGeneralizedCarveout1Access2; - uint32_t McGeneralizedCarveout1Access3; - uint32_t McGeneralizedCarveout1Access4; - uint32_t McGeneralizedCarveout1ForceInternalAccess0; - uint32_t McGeneralizedCarveout1ForceInternalAccess1; - uint32_t McGeneralizedCarveout1ForceInternalAccess2; - uint32_t McGeneralizedCarveout1ForceInternalAccess3; - uint32_t McGeneralizedCarveout1ForceInternalAccess4; - uint32_t McGeneralizedCarveout1Cfg0; - uint32_t McGeneralizedCarveout2Bom; - uint32_t McGeneralizedCarveout2BomHi; - uint32_t McGeneralizedCarveout2Size128kb; - uint32_t McGeneralizedCarveout2Access0; - uint32_t McGeneralizedCarveout2Access1; - uint32_t McGeneralizedCarveout2Access2; - uint32_t McGeneralizedCarveout2Access3; - uint32_t McGeneralizedCarveout2Access4; - uint32_t McGeneralizedCarveout2ForceInternalAccess0; - uint32_t McGeneralizedCarveout2ForceInternalAccess1; - uint32_t McGeneralizedCarveout2ForceInternalAccess2; - uint32_t McGeneralizedCarveout2ForceInternalAccess3; - uint32_t McGeneralizedCarveout2ForceInternalAccess4; - uint32_t McGeneralizedCarveout2Cfg0; - uint32_t McGeneralizedCarveout3Bom; - uint32_t McGeneralizedCarveout3BomHi; - uint32_t McGeneralizedCarveout3Size128kb; - uint32_t McGeneralizedCarveout3Access0; - uint32_t McGeneralizedCarveout3Access1; - uint32_t McGeneralizedCarveout3Access2; - uint32_t McGeneralizedCarveout3Access3; - uint32_t McGeneralizedCarveout3Access4; - uint32_t McGeneralizedCarveout3ForceInternalAccess0; - uint32_t McGeneralizedCarveout3ForceInternalAccess1; - uint32_t McGeneralizedCarveout3ForceInternalAccess2; - uint32_t McGeneralizedCarveout3ForceInternalAccess3; - uint32_t McGeneralizedCarveout3ForceInternalAccess4; - uint32_t McGeneralizedCarveout3Cfg0; - uint32_t McGeneralizedCarveout4Bom; - uint32_t McGeneralizedCarveout4BomHi; - uint32_t McGeneralizedCarveout4Size128kb; - uint32_t McGeneralizedCarveout4Access0; - uint32_t McGeneralizedCarveout4Access1; - uint32_t McGeneralizedCarveout4Access2; - uint32_t McGeneralizedCarveout4Access3; - uint32_t McGeneralizedCarveout4Access4; - uint32_t McGeneralizedCarveout4ForceInternalAccess0; - uint32_t McGeneralizedCarveout4ForceInternalAccess1; - uint32_t McGeneralizedCarveout4ForceInternalAccess2; - uint32_t McGeneralizedCarveout4ForceInternalAccess3; - uint32_t McGeneralizedCarveout4ForceInternalAccess4; - uint32_t McGeneralizedCarveout4Cfg0; - uint32_t McGeneralizedCarveout5Bom; - uint32_t McGeneralizedCarveout5BomHi; - uint32_t McGeneralizedCarveout5Size128kb; - uint32_t McGeneralizedCarveout5Access0; - uint32_t McGeneralizedCarveout5Access1; - uint32_t McGeneralizedCarveout5Access2; - uint32_t McGeneralizedCarveout5Access3; - uint32_t McGeneralizedCarveout5Access4; - uint32_t McGeneralizedCarveout5ForceInternalAccess0; - uint32_t McGeneralizedCarveout5ForceInternalAccess1; - uint32_t McGeneralizedCarveout5ForceInternalAccess2; - uint32_t McGeneralizedCarveout5ForceInternalAccess3; - uint32_t McGeneralizedCarveout5ForceInternalAccess4; - uint32_t McGeneralizedCarveout5Cfg0; - uint32_t EmcCaTrainingEnable; - uint32_t SwizzleRankByteEncode; - uint32_t BootRomPatchControl; - uint32_t BootRomPatchData; - uint32_t McMtsCarveoutBom; - uint32_t McMtsCarveoutAdrHi; - uint32_t McMtsCarveoutSizeMb; - uint32_t McMtsCarveoutRegCtrl; - uint32_t McUntranslatedRegionCheck; - uint32_t BCT_NA; -} sdram_params_mariko_t; - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/se.c b/fusee/fusee-primary/fusee-primary-main/src/se.c deleted file mode 100644 index 4f82ed568..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/se.c +++ /dev/null @@ -1,649 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "utils.h" -#include "se.h" - -void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size); - -/* Globals for driver. */ -static unsigned int g_se_modulus_sizes[KEYSLOT_RSA_MAX]; -static unsigned int g_se_exp_sizes[KEYSLOT_RSA_MAX]; - -/* Initialize a SE linked list. */ -void NOINLINE ll_init(volatile se_ll_t *ll, void *buffer, size_t size) { - ll->num_entries = 0; /* 1 Entry. */ - - if (buffer != NULL) { - ll->addr_info.address = (uint32_t) get_physical_address(buffer); - ll->addr_info.size = (uint32_t) size; - } else { - ll->addr_info.address = 0; - ll->addr_info.size = 0; - } -} - -void se_check_error_status_reg(void) { - if (se_get_regs()->SE_ERR_STATUS) { - generic_panic(); - } -} - -void se_check_for_error(void) { - volatile tegra_se_t *se = se_get_regs(); - if (se->SE_INT_STATUS & 0x10000 || se->SE_STATUS & 3 || se->SE_ERR_STATUS) { - generic_panic(); - } -} - -void se_verify_flags_cleared(void) { - if (se_get_regs()->SE_STATUS & 3) { - generic_panic(); - } -} - -/* Set the flags for an AES keyslot. */ -void set_aes_keyslot_flags(unsigned int keyslot, unsigned int flags) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Misc flags. */ - if (flags & ~0x80) { - se->SE_CRYPTO_KEYTABLE_ACCESS[keyslot] = ~flags; - } - - /* Disable keyslot reads. */ - if (flags & 0x80) { - se->SE_CRYPTO_SECURITY_PERKEY &= ~(1 << keyslot); - } -} - -/* Set the flags for an RSA keyslot. */ -void set_rsa_keyslot_flags(unsigned int keyslot, unsigned int flags) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX) { - generic_panic(); - } - - /* Misc flags. */ - if (flags & ~0x80) { - /* TODO: Why are flags assigned this way? */ - se->SE_RSA_KEYTABLE_ACCESS[keyslot] = (((flags >> 4) & 4) | (flags & 3)) ^ 7; - } - - /* Disable keyslot reads. */ - if (flags & 0x80) { - se->SE_RSA_SECURITY_PERKEY &= ~(1 << keyslot); - } -} - -void clear_aes_keyslot(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Zero out the whole keyslot and IV. */ - for (unsigned int i = 0; i < 0x10; i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | i; - se->SE_CRYPTO_KEYTABLE_DATA = 0; - } -} - -void clear_rsa_keyslot(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX) { - generic_panic(); - } - - /* Zero out the whole keyslot. */ - for (unsigned int i = 0; i < 0x40; i++) { - /* Select Keyslot Modulus[i] */ - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40; - se->SE_RSA_KEYTABLE_DATA = 0; - } - for (unsigned int i = 0; i < 0x40; i++) { - /* Select Keyslot Expontent[i] */ - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i; - se->SE_RSA_KEYTABLE_DATA = 0; - } -} - -void set_aes_keyslot(unsigned int keyslot, const void *key, size_t key_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || key_size > KEYSIZE_AES_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (key_size >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | i; - se->SE_CRYPTO_KEYTABLE_DATA = read32le(key, 4 * i); - } -} - -void set_rsa_keyslot(unsigned int keyslot, const void *modulus, size_t modulus_size, const void *exponent, size_t exp_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX || modulus_size > KEYSIZE_RSA_MAX || exp_size > KEYSIZE_RSA_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (modulus_size >> 2); i++) { - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | 0x40 | i; - se->SE_RSA_KEYTABLE_DATA = read32be(modulus, (4 * (modulus_size >> 2)) - (4 * i) - 4); - } - - for (size_t i = 0; i < (exp_size >> 2); i++) { - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i; - se->SE_RSA_KEYTABLE_DATA = read32be(exponent, (4 * (exp_size >> 2)) - (4 * i) - 4); - } - - g_se_modulus_sizes[keyslot] = modulus_size; - g_se_exp_sizes[keyslot] = exp_size; -} - -void set_aes_keyslot_iv(unsigned int keyslot, const void *iv, size_t iv_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || iv_size > 0x10) { - generic_panic(); - } - - for (size_t i = 0; i < (iv_size >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | 8 | i; - se->SE_CRYPTO_KEYTABLE_DATA = read32le(iv, 4 * i); - } -} - -void clear_aes_keyslot_iv(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (0x10 >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | 8 | i; - se->SE_CRYPTO_KEYTABLE_DATA = 0; - } -} - -void set_se_ctr(const void *ctr) { - for (unsigned int i = 0; i < 4; i++) { - se_get_regs()->SE_CRYPTO_LINEAR_CTR[i] = read32le(ctr, i * 4); - } -} - -void decrypt_data_into_keyslot(unsigned int keyslot_dst, unsigned int keyslot_src, const void *wrapped_key, size_t wrapped_key_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot_dst >= KEYSLOT_AES_MAX || keyslot_src >= KEYSLOT_AES_MAX || wrapped_key_size > KEYSIZE_AES_MAX) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_DEC | DST_KEYTAB); - se->SE_CRYPTO_CONFIG = keyslot_src << 24; - se->SE_CRYPTO_LAST_BLOCK = 0; - se->SE_CRYPTO_KEYTABLE_DST = keyslot_dst << 8; - - trigger_se_blocking_op(OP_START, NULL, 0, wrapped_key, wrapped_key_size); -} - -void se_synchronous_exp_mod(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - uint8_t ALIGN(16) stack_buf[KEYSIZE_RSA_MAX]; - - if (keyslot >= KEYSLOT_RSA_MAX || src_size > KEYSIZE_RSA_MAX || dst_size > KEYSIZE_RSA_MAX) { - generic_panic(); - } - - /* Endian swap the input. */ - for (size_t i = 0; i < src_size; i++) { - stack_buf[i] = *((uint8_t *)src + src_size - i - 1); - } - - se->SE_CONFIG = (ALG_RSA | DST_RSAREG); - se->SE_RSA_CONFIG = keyslot << 24; - se->SE_RSA_KEY_SIZE = (g_se_modulus_sizes[keyslot] >> 6) - 1; - se->SE_RSA_EXP_SIZE = g_se_exp_sizes[keyslot] >> 2; - - trigger_se_blocking_op(OP_START, NULL, 0, stack_buf, src_size); - se_get_exp_mod_output(dst, dst_size); -} - -void se_get_exp_mod_output(void *buf, size_t size) { - size_t num_dwords = (size >> 2); - - if (num_dwords < 1) { - return; - } - - uint32_t *p_out = ((uint32_t *)buf) + num_dwords - 1; - uint32_t offset = 0; - - /* Copy endian swapped output. */ - while (num_dwords) { - *p_out = read32be(se_get_regs()->SE_RSA_OUTPUT, offset); - offset += 4; - p_out--; - num_dwords--; - } -} - -bool se_rsa2048_pss_verify(const void *signature, size_t signature_size, const void *modulus, size_t modulus_size, const void *data, size_t data_size) { - uint8_t message[RSA_2048_BYTES]; - uint8_t h_buf[0x24]; - - /* Hardcode RSA with keyslot 0. */ - const uint8_t public_exponent[4] = {0x00, 0x01, 0x00, 0x01}; - set_rsa_keyslot(0, modulus, modulus_size, public_exponent, sizeof(public_exponent)); - se_synchronous_exp_mod(0, message, sizeof(message), signature, signature_size); - - /* Validate sanity byte. */ - if (message[RSA_2048_BYTES - 1] != 0xBC) { - return false; - } - - /* Copy Salt into MGF1 Hash Buffer. */ - memset(h_buf, 0, sizeof(h_buf)); - memcpy(h_buf, message + RSA_2048_BYTES - 0x20 - 0x1, 0x20); - - /* Decrypt maskedDB (via inline MGF1). */ - uint8_t seed = 0; - uint8_t mgf1_buf[0x20]; - for (unsigned int ofs = 0; ofs < RSA_2048_BYTES - 0x20 - 1; ofs += 0x20) { - h_buf[sizeof(h_buf) - 1] = seed++; - se_calculate_sha256(mgf1_buf, h_buf, sizeof(h_buf)); - for (unsigned int i = ofs; i < ofs + 0x20 && i < RSA_2048_BYTES - 0x20 - 1; i++) { - message[i] ^= mgf1_buf[i - ofs]; - } - } - - /* Constant lmask for rsa-2048-pss. */ - message[0] &= 0x7F; - - /* Validate DB is of the form 0000...0001. */ - for (unsigned int i = 0; i < RSA_2048_BYTES - 0x20 - 0x20 - 1 - 1; i++) { - if (message[i] != 0) { - return false; - } - } - if (message[RSA_2048_BYTES - 0x20 - 0x20 - 1 - 1] != 1) { - return false; - } - - /* Check hash correctness. */ - uint8_t validate_buf[8 + 0x20 + 0x20]; - uint8_t validate_hash[0x20]; - - memset(validate_buf, 0, sizeof(validate_buf)); - se_calculate_sha256(&validate_buf[8], data, data_size); - memcpy(&validate_buf[0x28], &message[RSA_2048_BYTES - 0x20 - 0x20 - 1], 0x20); - se_calculate_sha256(validate_hash, validate_buf, sizeof(validate_buf)); - return memcmp(h_buf, validate_hash, 0x20) == 0; -} - -void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - se_ll_t in_ll; - se_ll_t out_ll; - - ll_init(&in_ll, (void *)src, src_size); - ll_init(&out_ll, dst, dst_size); - - /* Set the LLs. */ - se->SE_IN_LL_ADDR = (uint32_t) get_physical_address(&in_ll); - se->SE_OUT_LL_ADDR = (uint32_t) get_physical_address(&out_ll); - - /* Set registers for operation. */ - se->SE_ERR_STATUS = se->SE_ERR_STATUS; - se->SE_INT_STATUS = se->SE_INT_STATUS; - se->SE_OPERATION = op; - - while (!(se->SE_INT_STATUS & 0x10)) { /* Wait a while */ } - se_check_for_error(); -} - -/* Secure AES Functionality. */ -void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src, size_t src_size) { - uint8_t block[0x10] = {0}; - - if (src_size > sizeof(block) || dst_size > sizeof(block)) { - generic_panic(); - } - - /* Load src data into block. */ - if (src_size != 0) { - memcpy(block, src, src_size); - } - - /* Trigger AES operation. */ - se_get_regs()->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block)); - - /* Copy output data into dst. */ - if (dst_size != 0) { - memcpy(dst, block, dst_size); - } -} - -void se_aes_ctr_crypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *ctr, size_t ctr_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || ctr_size != 0x10) { - generic_panic(); - } - unsigned int num_blocks = src_size >> 4; - - /* Unknown what this write does, but official code writes it for CTR mode. */ - se->SE_SPARE = 1; - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x91E; - set_se_ctr(ctr); - - /* Handle any aligned blocks. */ - size_t aligned_size = (size_t)num_blocks << 4; - if (aligned_size) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 1; - trigger_se_blocking_op(OP_START, dst, dst_size, src, aligned_size); - } - - /* Handle final, unaligned block. */ - if (aligned_size < dst_size && aligned_size < src_size) { - size_t last_block_size = dst_size - aligned_size; - if (src_size < dst_size) { - last_block_size = src_size - aligned_size; - } - se_perform_aes_block_operation(dst + aligned_size, last_block_size, (uint8_t *)src + aligned_size, src_size - aligned_size); - } -} - -void se_aes_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, unsigned int config_high) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) { - generic_panic(); - } - - /* Set configuration high (256-bit vs 128-bit) based on parameter. */ - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16); - se->SE_CRYPTO_CONFIG = keyslot << 24 | 0x100; - se_perform_aes_block_operation(dst, 0x10, src, 0x10); -} - -void se_aes_128_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - se_aes_ecb_encrypt_block(keyslot, dst, dst_size, src, src_size, 0); -} - -void se_aes_256_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - se_aes_ecb_encrypt_block(keyslot, dst, dst_size, src, src_size, 0x202); -} - -void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot << 24; - se_perform_aes_block_operation(dst, 0x10, src, 0x10); -} - -void shift_left_xor_rb(uint8_t *key) { - uint8_t prev_high_bit = 0; - for (unsigned int i = 0; i < 0x10; i++) { - uint8_t cur_byte = key[0xF - i]; - key[0xF - i] = (cur_byte << 1) | (prev_high_bit); - prev_high_bit = cur_byte >> 7; - } - if (prev_high_bit) { - key[0xF] ^= 0x87; - } -} - -void shift_left_xor_rb_le(uint8_t *key) { - uint8_t prev_high_bit = 0; - for (unsigned int i = 0; i < 0x10; i++) { - uint8_t cur_byte = key[i]; - key[i] = (cur_byte << 1) | (prev_high_bit); - prev_high_bit = cur_byte >> 7; - } - if (prev_high_bit) { - key[0x0] ^= 0x87; - } -} - -void aes_128_xts_nintendo_get_tweak(uint8_t *tweak, size_t sector) { - for (int i = 0xF; i >= 0; i--) { /* Nintendo LE custom tweak... */ - tweak[i] = (unsigned char)(sector & 0xFF); - sector >>= 8; - } -} - -void aes_128_xts_nintendo_xor_with_tweak(unsigned int keyslot, size_t sector, uint8_t *dst, const uint8_t *src, size_t size) { - if ((size & 0xF) || size == 0) { - generic_panic(); - } - uint8_t tweak[0x10]; - aes_128_xts_nintendo_get_tweak(tweak, sector); - se_aes_128_ecb_encrypt_block(keyslot, tweak, sizeof(tweak), tweak, sizeof(tweak)); - - for (unsigned int block = 0; block < (size >> 4); block++) { - for (unsigned int i = 0; i < 0x10; i++) { - dst[(block << 4) | i] = src[(block << 4) | i] ^ tweak[i]; - } - shift_left_xor_rb_le(tweak); - } -} - -void aes_128_xts_nintendo_crypt_sector(unsigned int keyslot_1, unsigned int keyslot_2, size_t sector, bool encrypt, void *dst, const void *src, size_t size) { - volatile tegra_se_t *se = se_get_regs(); - - if ((size & 0xF) || size == 0) { - generic_panic(); - } - - /* XOR. */ - aes_128_xts_nintendo_xor_with_tweak(keyslot_2, sector, dst, src, size); - - /* Encrypt/Decrypt. */ - if (encrypt) { - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot_1 << 24 | 0x100; - } else { - se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot_1 << 24; - } - se->SE_CRYPTO_LAST_BLOCK = (size >> 4) - 1; - trigger_se_blocking_op(OP_START, dst, size, src, size); - - /* XOR. */ - aes_128_xts_nintendo_xor_with_tweak(keyslot_2, sector, dst, dst, size); -} - -/* Encrypt with AES-XTS (Nintendo's custom tweak). */ -void se_aes_128_xts_nintendo_encrypt(unsigned int keyslot_1, unsigned int keyslot_2, size_t base_sector, void *dst, const void *src, size_t size, unsigned int sector_size) { - if ((size & 0xF) || size == 0) { - generic_panic(); - } - size_t sector = base_sector; - for (size_t ofs = 0; ofs < size; ofs += sector_size) { - aes_128_xts_nintendo_crypt_sector(keyslot_1, keyslot_2, sector, true, dst + ofs, src + ofs, sector_size); - sector++; - } -} - -/* Decrypt with AES-XTS (Nintendo's custom tweak). */ -void se_aes_128_xts_nintendo_decrypt(unsigned int keyslot_1, unsigned int keyslot_2, size_t base_sector, void *dst, const void *src, size_t size, unsigned int sector_size) { - if ((size & 0xF) || size == 0) { - generic_panic(); - } - size_t sector = base_sector; - for (size_t ofs = 0; ofs < size; ofs += sector_size) { - aes_128_xts_nintendo_crypt_sector(keyslot_1, keyslot_2, sector, false, dst + ofs, src + ofs, sector_size); - sector++; - } -} - -void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size, unsigned int config_high) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Generate the derived key, to be XOR'd with final output block. */ - uint8_t ALIGN(16) derived_key[0x10] = {0}; - se_aes_ecb_encrypt_block(keyslot, derived_key, sizeof(derived_key), derived_key, sizeof(derived_key), config_high); - shift_left_xor_rb(derived_key); - if (data_size & 0xF) { - shift_left_xor_rb(derived_key); - } - - se->SE_CONFIG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | (0x145); - clear_aes_keyslot_iv(keyslot); - - unsigned int num_blocks = (data_size + 0xF) >> 4; - /* Handle aligned blocks. */ - if (num_blocks > 1) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 2; - trigger_se_blocking_op(OP_START, NULL, 0, data, data_size); - se->SE_CRYPTO_CONFIG |= 0x80; - } - - /* Create final block. */ - uint8_t ALIGN(16) last_block[0x10] = {0}; - if (data_size & 0xF) { - memcpy(last_block, data + (data_size & ~0xF), data_size & 0xF); - last_block[data_size & 0xF] = 0x80; /* Last block = data || 100...0 */ - } else if (data_size >= 0x10) { - memcpy(last_block, data + data_size - 0x10, 0x10); - } - - for (unsigned int i = 0; i < 0x10; i++) { - last_block[i] ^= derived_key[i]; - } - - /* Perform last operation. */ - se->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, NULL, 0, last_block, sizeof(last_block)); - - /* Copy output CMAC. */ - for (unsigned int i = 0; i < (cmac_size >> 2); i++) { - ((uint32_t *)cmac)[i] = read32le(se->SE_HASH_RESULT, i << 2); - } -} - -void se_compute_aes_128_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) { - se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0); -} -void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) { - se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0x202); -} - -void se_aes_256_cbc_encrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || src_size < 0x10) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY) | (0x202 << 16); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x144; - set_aes_keyslot_iv(keyslot, iv, 0x10); - se->SE_CRYPTO_LAST_BLOCK = (src_size >> 4) - 1; - trigger_se_blocking_op(OP_START, dst, dst_size, src, src_size); -} - -/* SHA256 Implementation. */ -void se_calculate_sha256(void *dst, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - - /* Setup config for SHA256, size = BITS(src_size) */ - se->SE_CONFIG = (ENCMODE_SHA256 | ALG_SHA | DST_HASHREG); - se->SE_SHA_CONFIG = 1; - se->SE_SHA_MSG_LENGTH[0] = (uint32_t)(src_size << 3); - se->SE_SHA_MSG_LENGTH[1] = 0; - se->SE_SHA_MSG_LENGTH[2] = 0; - se->SE_SHA_MSG_LENGTH[3] = 0; - se->SE_SHA_MSG_LEFT[0] = (uint32_t)(src_size << 3); - se->SE_SHA_MSG_LEFT[1] = 0; - se->SE_SHA_MSG_LEFT[2] = 0; - se->SE_SHA_MSG_LEFT[3] = 0; - - /* Trigger the operation. */ - trigger_se_blocking_op(OP_START, NULL, 0, src, src_size); - - /* Copy output hash. */ - for (unsigned int i = 0; i < (0x20 >> 2); i++) { - ((uint32_t *)dst)[i] = read32be(se->SE_HASH_RESULT, i << 2); - } -} - -/* RNG API */ -void se_initialize_rng(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* To initialize the RNG, we'll perform an RNG operation into an output buffer. */ - /* This will be discarded, when done. */ - uint8_t ALIGN(16) output_buf[0x10]; - - se->SE_RNG_SRC_CONFIG = 3; /* Entropy enable + Entropy lock enable */ - se->SE_RNG_RESEED_INTERVAL = 70001; - se->SE_CONFIG = (ALG_RNG | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x108; - se->SE_RNG_CONFIG = 5; - se->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, output_buf, 0x10, NULL, 0); -} - -void se_generate_random(unsigned int keyslot, void *dst, size_t size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - uint32_t num_blocks = size >> 4; - size_t aligned_size = num_blocks << 4; - se->SE_CONFIG = (ALG_RNG | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x108; - se->SE_RNG_CONFIG = 4; - - if (num_blocks >= 1) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 1; - trigger_se_blocking_op(OP_START, dst, aligned_size, NULL, 0); - } - if (size > aligned_size) { - se_perform_aes_block_operation(dst + aligned_size, size - aligned_size, NULL, 0); - } -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/se.h b/fusee/fusee-primary/fusee-primary-main/src/se.h deleted file mode 100644 index 2cc97f8ec..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/se.h +++ /dev/null @@ -1,210 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SE_H -#define FUSEE_SE_H - -#define SE_BASE 0x70012000 -#define MAKE_SE_REG(n) MAKE_REG32(SE_BASE + n) - -#define KEYSLOT_SWITCH_LP0TZRAMKEY 0x2 -#define KEYSLOT_SWITCH_SRKGENKEY 0x8 -#define KEYSLOT_SWITCH_PACKAGE2KEY 0x8 -#define KEYSLOT_SWITCH_TEMPKEY 0x9 -#define KEYSLOT_SWITCH_SESSIONKEY 0xA -#define KEYSLOT_SWITCH_RNGKEY 0xB -#define KEYSLOT_SWITCH_MASTERKEY 0xC -#define KEYSLOT_SWITCH_DEVICEKEY 0xD - -/* This keyslot was added in 4.0.0. */ -#define KEYSLOT_SWITCH_4XNEWDEVICEKEYGENKEY 0xD -#define KEYSLOT_SWITCH_4XNEWCONSOLEKEYGENKEY 0xE -#define KEYSLOT_SWITCH_4XOLDDEVICEKEY 0xF - -/* This keyslot was added in 5.0.0. */ -#define KEYSLOT_SWITCH_5XNEWDEVICEKEYGENKEY 0xA - -/* Mariko keyslots. */ -#define KEYSLOT_SWITCH_MASTERKEY_MARIKO 0x7 - -#define KEYSLOT_AES_MAX 0x10 -#define KEYSLOT_RSA_MAX 0x2 - -#define KEYSIZE_AES_MAX 0x20 -#define KEYSIZE_RSA_MAX 0x100 - -#define ALG_SHIFT (12) -#define ALG_DEC_SHIFT (8) -#define ALG_NOP (0 << ALG_SHIFT) -#define ALG_AES_ENC (1 << ALG_SHIFT) -#define ALG_AES_DEC ((1 << ALG_DEC_SHIFT) | ALG_NOP) -#define ALG_RNG (2 << ALG_SHIFT) -#define ALG_SHA (3 << ALG_SHIFT) -#define ALG_RSA (4 << ALG_SHIFT) - -#define DST_SHIFT (2) -#define DST_MEMORY (0 << DST_SHIFT) -#define DST_HASHREG (1 << DST_SHIFT) -#define DST_KEYTAB (2 << DST_SHIFT) -#define DST_SRK (3 << DST_SHIFT) -#define DST_RSAREG (4 << DST_SHIFT) - -#define ENCMODE_SHIFT (24) -#define DECMODE_SHIFT (16) -#define ENCMODE_SHA256 (5 << ENCMODE_SHIFT) - -#define HASH_DISABLE (0x0) -#define HASH_ENABLE (0x1) - -#define OP_ABORT 0 -#define OP_START 1 -#define OP_RESTART 2 -#define OP_CTX_SAVE 3 -#define OP_RESTART_IN 4 - -#define CTX_SAVE_SRC_SHIFT 29 -#define CTX_SAVE_SRC_STICKY_BITS (0 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_KEYTABLE_AES (2 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_KEYTABLE_RSA (1 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_MEM (4 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_SRK (6 << CTX_SAVE_SRC_SHIFT) - -#define CTX_SAVE_KEY_LOW_BITS 0 -#define CTX_SAVE_KEY_HIGH_BITS 1 -#define CTX_SAVE_KEY_ORIGINAL_IV 2 -#define CTX_SAVE_KEY_UPDATED_IV 3 - -#define CTX_SAVE_STICKY_BIT_INDEX_SHIFT 24 -#define CTX_SAVE_KEY_INDEX_SHIFT 8 -#define CTX_SAVE_RSA_KEY_INDEX_SHIFT 16 -#define CTX_SAVE_RSA_KEY_BLOCK_INDEX_SHIFT 12 - -#define RSA_2048_BYTES 0x100 - -typedef struct { - uint32_t SE_SE_SECURITY; - uint32_t SE_TZRAM_SECURITY; - uint32_t SE_OPERATION; - uint32_t SE_INT_ENABLE; - uint32_t SE_INT_STATUS; - uint32_t SE_CONFIG; - uint32_t SE_IN_LL_ADDR; - uint32_t SE_IN_CUR_BYTE_ADDR; - uint32_t SE_IN_CUR_LL_ID; - uint32_t SE_OUT_LL_ADDR; - uint32_t SE_OUT_CUR_BYTE_ADDR; - uint32_t SE_OUT_CUR_LL_ID; - uint32_t SE_HASH_RESULT[0x10]; - uint32_t SE_CTX_SAVE_CONFIG; - uint32_t _0x74[0x63]; - uint32_t SE_SHA_CONFIG; - uint32_t SE_SHA_MSG_LENGTH[0x4]; - uint32_t SE_SHA_MSG_LEFT[0x4]; - uint32_t _0x224[0x17]; - uint32_t SE_CRYPTO_SECURITY_PERKEY; - uint32_t SE_CRYPTO_KEYTABLE_ACCESS[0x10]; - uint32_t _0x2C4[0x10]; - uint32_t SE_CRYPTO_CONFIG; - uint32_t SE_CRYPTO_LINEAR_CTR[0x4]; - uint32_t SE_CRYPTO_LAST_BLOCK; - uint32_t SE_CRYPTO_KEYTABLE_ADDR; - uint32_t SE_CRYPTO_KEYTABLE_DATA; - uint32_t _0x324[0x3]; - uint32_t SE_CRYPTO_KEYTABLE_DST; - uint32_t _0x334[0x3]; - uint32_t SE_RNG_CONFIG; - uint32_t SE_RNG_SRC_CONFIG; - uint32_t SE_RNG_RESEED_INTERVAL; - uint32_t _0x34C[0x2D]; - uint32_t SE_RSA_CONFIG; - uint32_t SE_RSA_KEY_SIZE; - uint32_t SE_RSA_EXP_SIZE; - uint32_t SE_RSA_SECURITY_PERKEY; - uint32_t SE_RSA_KEYTABLE_ACCESS[0x2]; - uint32_t _0x418[0x2]; - uint32_t SE_RSA_KEYTABLE_ADDR; - uint32_t SE_RSA_KEYTABLE_DATA; - uint32_t SE_RSA_OUTPUT[0x40]; - uint32_t _0x528[0xB6]; - uint32_t SE_STATUS; - uint32_t SE_ERR_STATUS; - uint32_t SE_MISC; - uint32_t SE_SPARE; - uint32_t SE_ENTROPY_DEBUG_COUNTER; - uint32_t _0x814; - uint32_t _0x818; - uint32_t _0x81C; - uint32_t _0x820[0x5F8]; -} tegra_se_t; - -typedef struct { - uint32_t address; - uint32_t size; -} se_addr_info_t; - -typedef struct { - uint32_t num_entries; /* Set to total entries - 1 */ - se_addr_info_t addr_info; /* This should really be an array...but for our use case it works. */ -} se_ll_t; - -static inline volatile tegra_se_t *se_get_regs(void) { - return (volatile tegra_se_t *)SE_BASE; -} - -void se_check_error_status_reg(void); -void se_check_for_error(void); -void se_trigger_interrupt(void); - -void se_validate_stored_vector(void); -void se_generate_stored_vector(void); - -void se_verify_flags_cleared(void); - -void set_aes_keyslot_flags(unsigned int keyslot, unsigned int flags); -void set_rsa_keyslot_flags(unsigned int keyslot, unsigned int flags); -void clear_aes_keyslot(unsigned int keyslot); -void clear_rsa_keyslot(unsigned int keyslot); - -void set_aes_keyslot(unsigned int keyslot, const void *key, size_t key_size); -void decrypt_data_into_keyslot(unsigned int keyslot_dst, unsigned int keyslot_src, const void *wrapped_key, size_t wrapped_key_size); -void set_rsa_keyslot(unsigned int keyslot, const void *modulus, size_t modulus_size, const void *exponent, size_t exp_size); -void set_aes_keyslot_iv(unsigned int keyslot, const void *iv, size_t iv_size); -void set_se_ctr(const void *ctr); - -/* Secure AES API */ -void se_aes_128_xts_nintendo_decrypt(unsigned int keyslot_1, unsigned int keyslot_2, unsigned int base_sector, void *dst, const void *src, size_t size, unsigned int sector_size); -void se_aes_128_xts_nintendo_encrypt(unsigned int keyslot_1, unsigned int keyslot_2, unsigned int base_sector, void *dst, const void *src, size_t size, unsigned int sector_size); -void se_compute_aes_128_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size); -void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size); -void se_aes_128_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_256_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_ctr_crypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *ctr, size_t ctr_size); -void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_256_cbc_encrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv); - -/* Hash API */ -void se_calculate_sha256(void *dst, const void *src, size_t src_size); - -/* RSA API */ -void se_get_exp_mod_output(void *buf, size_t size); -void se_synchronous_exp_mod(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -bool se_rsa2048_pss_verify(const void *signature, size_t signature_size, const void *modulus, size_t modulus_size, const void *data, size_t data_size); - -/* RNG API */ -void se_initialize_rng(unsigned int keyslot); -void se_generate_random(unsigned int keyslot, void *dst, size_t size); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/stage2.c b/fusee/fusee-primary/fusee-primary-main/src/stage2.c deleted file mode 100644 index 4fb5ad864..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/stage2.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "stage2.h" -#include "chainloader.h" -#include "fs_utils.h" -#include "utils.h" - -char g_stage2_path[0x100] = {0}; - -const char *stage2_get_program_path(void) { - return g_stage2_path; -} - -static int stage2_ini_handler(void *user, const char *section, const char *name, const char *value) { - stage2_config_t *config = (stage2_config_t *)user; - uintptr_t x = 0; - if (strcmp(section, "stage1") == 0) { - if (strcmp(name, STAGE2_NAME_KEY) == 0) { - strncpy(config->path, value, sizeof(config->path) - 1); - config->path[sizeof(config->path) - 1] = '\0'; - } else if (strcmp(name, STAGE2_MTC_NAME_KEY) == 0) { - strncpy(config->mtc_path, value, sizeof(config->mtc_path) - 1); - config->mtc_path[sizeof(config->mtc_path) - 1] = '\0'; - } else if (strcmp(name, STAGE2_ADDRESS_KEY) == 0) { - /* Read in load address as a hex string. */ - sscanf(value, "%x", &x); - config->load_address = x; - if (config->entrypoint == 0) { - config->entrypoint = config->load_address; - } - } else if (strcmp(name, STAGE2_ENTRYPOINT_KEY) == 0) { - /* Read in entrypoint as a hex string. */ - sscanf(value, "%x", &x); - config->entrypoint = x; - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -void load_stage2(const char *bct0) { - stage2_config_t config = {0}; - FILINFO info; - size_t size; - uintptr_t tmp_addr; - - if (ini_parse_string(bct0, stage2_ini_handler, &config) < 0) { - fatal_error("Failed to parse BCT.ini!\n"); - } - - if (config.load_address == 0 || config.path[0] == '\x00') { - fatal_error("Failed to determine where to load stage2!\n"); - } - - if (strlen(config.path) + 1 + sizeof(stage2_args_t) > CHAINLOADER_ARG_DATA_MAX_SIZE) { - fatal_error("Stage2's path name is too big!\n"); - } - - if (!check_32bit_address_loadable(config.entrypoint)) { - fatal_error("Stage2's entrypoint is invalid!\n"); - } - - if (!check_32bit_address_loadable(config.load_address)) { - fatal_error("Stage2's load address is invalid!\n"); - } - - print(SCREEN_LOG_LEVEL_DEBUG, "Stage 2 Config:\n"); - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, " File Path: %s\n", config.path); - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, " MTC File Path: %s\n", config.mtc_path); - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, " Load Address: 0x%08x\n", config.load_address); - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, " Entrypoint: 0x%p\n", config.entrypoint); - - if (f_stat(config.path, &info) != FR_OK) { - fatal_error("Failed to stat stage2 (%s)!\n", config.path); - } - - size = (size_t)info.fsize; - - /* the LFB is located at 0xC0000000 atm */ - if (size > 0xC0000000u - 0x80000000u) { - fatal_error("Stage2 is way too big!\n"); - } - - if (!check_32bit_address_range_loadable(config.load_address, size)) { - fatal_error("Stage2 has an invalid load address & size combination (0x%08x 0x%08x)!\n", config.load_address, size); - } - - if (config.entrypoint < config.load_address || config.entrypoint >= config.load_address + size) { - fatal_error("Stage2's entrypoint is outside Stage2!\n"); - } - - if (check_32bit_address_range_in_program(config.load_address, size)) { - tmp_addr = 0x80000000u; - } else { - tmp_addr = config.load_address; - } - - /* Try to read stage2. */ - if (read_from_file((void *)tmp_addr, size, config.path) != size) { - fatal_error("Failed to read stage2 (%s)!\n", config.path); - } - - g_chainloader_num_entries = 1; - g_chainloader_entries[0].load_address = config.load_address; - g_chainloader_entries[0].src_address = tmp_addr; - g_chainloader_entries[0].size = size; - g_chainloader_entries[0].num = 0; - g_chainloader_entrypoint = config.entrypoint; - - strncpy(g_stage2_path, config.path, sizeof(g_stage2_path) - 1); - g_stage2_path[sizeof(g_stage2_path) - 1] = '\0'; -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/stage2.h b/fusee/fusee-primary/fusee-primary-main/src/stage2.h deleted file mode 100644 index 39d5f8ccc..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/stage2.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_STAGE2_H -#define FUSEE_STAGE2_H - -#include -#include - -#include "../../../fusee/common/display/video_fb.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/vsprintf.h" -#include "../../../fusee/common/ini.h" -#include "../../../fusee/common/fatfs/ff.h" - -/* TODO: Is there a more concise way to do this? */ -#define STAGE2_ARGV_PROGRAM_PATH 0 -#define STAGE2_ARGV_ARGUMENT_STRUCT 1 -#define STAGE2_ARGC 2 - -#define STAGE2_NAME_KEY "stage2_path" -#define STAGE2_MTC_NAME_KEY "stage2_mtc_path" -#define STAGE2_ADDRESS_KEY "stage2_addr" -#define STAGE2_ENTRYPOINT_KEY "stage2_entrypoint" - -#define BCTO_MAX_SIZE 0x5000 - -typedef struct { - char path[0x100]; - char mtc_path[0x100]; - uintptr_t load_address; - uintptr_t entrypoint; -} stage2_config_t; - -typedef struct { - uint32_t version; - ScreenLogLevel log_level; - char bct0[BCTO_MAX_SIZE]; -} stage2_args_t; - -typedef struct { - ScreenLogLevel log_level; -} stage2_mtc_args_t; - -const char *stage2_get_program_path(void); -void load_stage2(const char *bct0); - -#endif \ No newline at end of file diff --git a/fusee/fusee-primary/fusee-primary-main/src/start.s b/fusee/fusee-primary/fusee-primary-main/src/start.s deleted file mode 100644 index aae9f7950..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/start.s +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -.macro CLEAR_GPR_REG_ITER - mov r\@, #0 -.endm - -.section .text.start, "ax", %progbits -.arm -.align 5 -.global _start -.type _start, %function -_start: - /* Switch to system mode, mask all interrupts, clear all flags */ - msr cpsr_cxsf, #0xDF - - /* Set the stack pointer */ - ldr sp, =__stack_top__ - mov fp, #0 - bl __program_init - - /* Set r0 to r12 to 0 (for debugging) & call main */ - .rept 13 - CLEAR_GPR_REG_ITER - .endr - ldr r0, =__program_argc - ldr r1, =__program_argv - ldr lr, =__program_exit - ldr r0, [r0] - ldr r1, [r1] - b main - -/* No need to include this in normal programs: */ -.section .chainloader.text.start, "ax", %progbits -.arm -.align 5 -.global relocate_and_chainload -.type relocate_and_chainload, %function -relocate_and_chainload: - ldr sp, =__stack_top__ - b relocate_and_chainload_main diff --git a/fusee/fusee-primary/fusee-primary-main/src/sysctr0.h b/fusee/fusee-primary/fusee-primary-main/src/sysctr0.h deleted file mode 100644 index 39a0196b3..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sysctr0.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SYSCTR0_H -#define FUSEE_SYSCTR0_H - -#include - -#define SYSCTR0_BASE 0x700F0000 -#define MAKE_SYSCTR0_REG(n) MAKE_REG32(SYSCTR0_BASE + n) - -#define SYSCTR0_CNTCR_0 MAKE_SYSCTR0_REG(0x00) -#define SYSCTR0_CNTSR_0 MAKE_SYSCTR0_REG(0x04) -#define SYSCTR0_CNTCV0_0 MAKE_SYSCTR0_REG(0x08) -#define SYSCTR0_CNTCV1_0 MAKE_SYSCTR0_REG(0x0C) -#define SYSCTR0_CNTFID0_0 MAKE_SYSCTR0_REG(0x20) -#define SYSCTR0_CNTFID1_0 MAKE_SYSCTR0_REG(0x24) -#define SYSCTR0_COUNTERID4_0 MAKE_SYSCTR0_REG(0xFD0) -#define SYSCTR0_COUNTERID5_0 MAKE_SYSCTR0_REG(0xFD4) -#define SYSCTR0_COUNTERID6_0 MAKE_SYSCTR0_REG(0xFD8) -#define SYSCTR0_COUNTERID7_0 MAKE_SYSCTR0_REG(0xFDC) -#define SYSCTR0_COUNTERID0_0 MAKE_SYSCTR0_REG(0xFE0) -#define SYSCTR0_COUNTERID1_0 MAKE_SYSCTR0_REG(0xFE4) -#define SYSCTR0_COUNTERID2_0 MAKE_SYSCTR0_REG(0xFE8) -#define SYSCTR0_COUNTERID3_0 MAKE_SYSCTR0_REG(0xFEC) -#define SYSCTR0_COUNTERID8_0 MAKE_SYSCTR0_REG(0xFF0) -#define SYSCTR0_COUNTERID9_0 MAKE_SYSCTR0_REG(0xFF4) -#define SYSCTR0_COUNTERID10_0 MAKE_SYSCTR0_REG(0xFF8) -#define SYSCTR0_COUNTERID11_0 MAKE_SYSCTR0_REG(0xFFC) - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/sysreg.h b/fusee/fusee-primary/fusee-primary-main/src/sysreg.h deleted file mode 100644 index 311945b4e..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/sysreg.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SYSREG_H -#define FUSEE_SYSREG_H - -#include - -#define SYSREG_BASE 0x6000C000 -#define SB_BASE (SYSREG_BASE + 0x200) -#define EXCP_VEC_BASE 0x6000F000 - -#define MAKE_SYSREG(n) MAKE_REG32(SYSREG_BASE + n) -#define MAKE_SB_REG(n) MAKE_REG32(SB_BASE + n) -#define MAKE_EXCP_VEC_REG(n) MAKE_REG32(EXCP_VEC_BASE + n) - -#define AHB_ARBITRATION_DISABLE_0 MAKE_SYSREG(0x004) -#define AHB_ARBITRATION_XBAR_CTRL_0 MAKE_SYSREG(0x0E0) -#define AHB_AHB_SPARE_REG_0 MAKE_SYSREG(0x110) - -#define SB_CSR_0 MAKE_SB_REG(0x00) -#define SB_PIROM_START_0 MAKE_SB_REG(0x04) -#define SB_PFCFG_0 MAKE_SB_REG(0x08) -#define SB_SECURE_SPAREREG_0_0 MAKE_SB_REG(0x0C) -#define SB_SECURE_SPAREREG_1_0 MAKE_SB_REG(0x10) -#define SB_SECURE_SPAREREG_2_0 MAKE_SB_REG(0x14) -#define SB_SECURE_SPAREREG_3_0 MAKE_SB_REG(0x18) -#define SB_SECURE_SPAREREG_4_0 MAKE_SB_REG(0x1C) -#define SB_SECURE_SPAREREG_5_0 MAKE_SB_REG(0x20) -#define SB_SECURE_SPAREREG_6_0 MAKE_SB_REG(0x24) -#define SB_SECURE_SPAREREG_7_0 MAKE_SB_REG(0x28) -#define SB_AA64_RESET_LOW_0 MAKE_SB_REG(0x30) -#define SB_AA64_RESET_HIGH_0 MAKE_SB_REG(0x34) - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/timers.h b/fusee/fusee-primary/fusee-primary-main/src/timers.h deleted file mode 100644 index 7d5ce4781..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/timers.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_TIMERS_H -#define FUSEE_TIMERS_H - -#include "utils.h" - -#define TIMERS_BASE 0x60005000 -#define MAKE_TIMERS_REG(n) MAKE_REG32(TIMERS_BASE + n) - -#define TIMERUS_CNTR_1US_0 MAKE_TIMERS_REG(0x10) -#define TIMERUS_USEC_CFG_0 MAKE_TIMERS_REG(0x14) -#define SHARED_INTR_STATUS_0 MAKE_TIMERS_REG(0x1A0) -#define SHARED_TIMER_SECURE_CFG_0 MAKE_TIMERS_REG(0x1A4) - -#define RTC_BASE 0x7000E000 -#define MAKE_RTC_REG(n) MAKE_REG32(RTC_BASE + n) - -#define RTC_SECONDS MAKE_RTC_REG(0x08) -#define RTC_SHADOW_SECONDS MAKE_RTC_REG(0x0C) -#define RTC_MILLI_SECONDS MAKE_RTC_REG(0x10) - -typedef struct { - uint32_t CONFIG; - uint32_t STATUS; - uint32_t COMMAND; - uint32_t PATTERN; -} watchdog_timers_t; - -#define GET_WDT(n) ((volatile watchdog_timers_t *)(TIMERS_BASE + 0x100 + 0x20 * n)) -#define WDT_REBOOT_PATTERN 0xC45A -#define GET_WDT_REBOOT_CFG_REG(n) MAKE_REG32(TIMERS_BASE + 0x60 + 0x8 * n) - -void wait(uint32_t microseconds); - -static inline uint32_t get_time_s(void) { - return RTC_SECONDS; -} - -static inline uint32_t get_time_ms(void) { - return (RTC_MILLI_SECONDS | (RTC_SHADOW_SECONDS << 10)); -} - -static inline uint32_t get_time_us(void) { - return TIMERUS_CNTR_1US_0; -} - -/** - * Returns the time in microseconds. - */ -static inline uint32_t get_time(void) { - return get_time_us(); -} - -/** - * Returns the number of microseconds that have passed since a given get_time(). - */ -static inline uint32_t get_time_since(uint32_t base) { - return get_time_us() - base; -} - -/** - * Delays for a given number of microseconds. - */ -static inline void udelay(uint32_t usecs) { - uint32_t start = get_time_us(); - while (get_time_us() - start < usecs); -} - -/** - * Delays for a given number of milliseconds. - */ -static inline void mdelay(uint32_t msecs) { - uint32_t start = get_time_ms(); - while (get_time_ms() - start < msecs); -} - -__attribute__ ((noreturn)) void watchdog_reboot(void); - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/uart.c b/fusee/fusee-primary/fusee-primary-main/src/uart.c deleted file mode 100644 index 020dbd583..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/uart.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "uart.h" -#include "timers.h" -#include "pinmux.h" - -static inline void uart_wait_cycles(uint32_t baud, uint32_t num) -{ - udelay((num * 1000000 + 16 * baud - 1) / (16 * baud)); -} - -static inline void uart_wait_syms(uint32_t baud, uint32_t num) -{ - udelay((num * 1000000 + baud - 1) / baud); -} - -void uart_config(UartDevice dev) { - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - - switch (dev) { - case UART_A: - pinmux->uart1_tx = (0 | 0 | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart1_rx = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_UP | PINMUX_SELECT_FUNCTION0); - pinmux->uart1_rts = (0 | 0 | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart1_cts = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - break; - case UART_B: - pinmux->uart2_tx = (0 | 0 | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart2_rx = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart2_rts = (0 | 0 | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - pinmux->uart2_cts = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - break; - case UART_C: - pinmux->uart3_tx = (0 | 0 | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart3_rx = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - pinmux->uart3_rts = (0 | 0 | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - pinmux->uart3_cts = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_NONE | PINMUX_SELECT_FUNCTION0); - break; - case UART_D: - pinmux->uart4_tx = (0 | 0 | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - pinmux->uart4_rx = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - pinmux->uart4_rts = (0 | 0 | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - pinmux->uart4_cts = (PINMUX_INPUT | PINMUX_TRISTATE | PINMUX_PULL_DOWN | PINMUX_SELECT_FUNCTION0); - break; - case UART_E: - /* Unused. */ - break; - default: break; - } -} - -void uart_init(UartDevice dev, uint32_t baud) { - volatile tegra_uart_t *uart = uart_get_regs(dev); - - /* Wait for idle state. */ - uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE); - - /* Calculate baud rate, round to nearest. */ - uint32_t rate = (8 * baud + 408000000) / (16 * baud); - - /* Setup UART in FIFO mode. */ - uart->UART_IER_DLAB = 0; - uart->UART_MCR = 0; - uart->UART_LCR = (UART_LCR_DLAB | UART_LCR_WD_LENGTH_8); /* Enable DLAB and set word length 8. */ - uart->UART_THR_DLAB = (uint8_t)rate; /* Divisor latch LSB. */ - uart->UART_IER_DLAB = (uint8_t)(rate >> 8); /* Divisor latch MSB. */ - uart->UART_LCR &= ~(UART_LCR_DLAB); /* Disable DLAB. */ - uart->UART_SPR; /* Dummy read. */ - uart_wait_syms(baud, 3); /* Wait for 3 symbols at the new baudrate. */ - - /* Enable FIFO with default settings. */ - uart->UART_IIR_FCR = UART_FCR_FCR_EN_FIFO; - uart->UART_SPR; /* Dummy read as mandated by TRM. */ - uart_wait_cycles(baud, 3); /* Wait for 3 baud cycles, as mandated by TRM (erratum). */ - - /* Flush FIFO. */ - uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE); /* Make sure there's no data being written in TX FIFO (TRM). */ - uart->UART_IIR_FCR |= UART_FCR_RX_CLR | UART_FCR_TX_CLR; /* Clear TX and RX FIFOs. */ - uart_wait_cycles(baud, 32); /* Wait for 32 baud cycles (TRM, erratum). */ - /* Wait for idle state (TRM). */ - uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE | UART_VENDOR_STATE_RX_IDLE); -} - -/* This function blocks until the UART device is in the desired state. */ -void uart_wait_idle(UartDevice dev, UartVendorStatus status) { - volatile tegra_uart_t *uart = uart_get_regs(dev); - - if (status & UART_VENDOR_STATE_TX_IDLE) { - while (!(uart->UART_LSR & UART_LSR_TMTY)) { - /* Wait */ - } - } - if (status & UART_VENDOR_STATE_RX_IDLE) { - while (uart->UART_LSR & UART_LSR_RDR) { - /* Wait */ - } - } -} - -void uart_send(UartDevice dev, const void *buf, size_t len) { - volatile tegra_uart_t *uart = uart_get_regs(dev); - - for (size_t i = 0; i < len; i++) { - while (!(uart->UART_LSR & UART_LSR_THRE)) { - /* Wait until it's possible to send data. */ - } - uart->UART_THR_DLAB = *((const uint8_t *)buf + i); - } -} - -void uart_recv(UartDevice dev, void *buf, size_t len) { - volatile tegra_uart_t *uart = uart_get_regs(dev); - - for (size_t i = 0; i < len; i++) { - while (!(uart->UART_LSR & UART_LSR_RDR)) { - /* Wait until it's possible to receive data. */ - } - *((uint8_t *)buf + i) = uart->UART_THR_DLAB; - } -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/uart.h b/fusee/fusee-primary/fusee-primary-main/src/uart.h deleted file mode 100644 index bf843abab..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/uart.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_UART_H -#define FUSEE_UART_H - -#include - -#define UART_BASE 0x70006000 - -#define BAUD_115200 115200 - -/* UART devices */ -typedef enum { - UART_A = 0, - UART_B = 1, - UART_C = 2, - UART_D = 3, - UART_E = 4, -} UartDevice; - -/* 36.3.12 UART_VENDOR_STATUS_0_0 */ -typedef enum { - UART_VENDOR_STATE_TX_IDLE = 1 << 0, - UART_VENDOR_STATE_RX_IDLE = 1 << 1, - - /* This bit is set to 1 when a read is issued to an empty FIFO and gets cleared on register read (sticky bit until read) - 0 = NO_UNDERRUN - 1 = UNDERRUN - */ - UART_VENDOR_STATE_RX_UNDERRUN = 1 << 2, - - /* This bit is set to 1 when write data is issued to the TX FIFO when it is already full and gets cleared on register read (sticky bit until read) - 0 = NO_OVERRUN - 1 = OVERRUN - */ - UART_VENDOR_STATE_TX_OVERRUN = 1 << 3, - - UART_VENDOR_STATE_RX_FIFO_COUNTER = 0b111111 << 16, /* reflects number of current entries in RX FIFO */ - UART_VENDOR_STATE_TX_FIFO_COUNTER = 0b111111 << 24 /* reflects number of current entries in TX FIFO */ -} UartVendorStatus; - -/* 36.3.6 UART_LSR_0 */ -typedef enum { - UART_LSR_RDR = 1 << 0, /* Receiver Data Ready */ - UART_LSR_OVRF = 1 << 1, /* Receiver Overrun Error */ - UART_LSR_PERR = 1 << 2, /* Parity Error */ - UART_LSR_FERR = 1 << 3, /* Framing Error */ - UART_LSR_BRK = 1 << 4, /* BREAK condition detected on line */ - UART_LSR_THRE = 1 << 5, /* Transmit Holding Register is Empty -- OK to write data */ - UART_LSR_TMTY = 1 << 6, /* Transmit Shift Register empty status */ - UART_LSR_FIFOE = 1 << 7, /* Receive FIFO Error */ - UART_LSR_TX_FIFO_FULL = 1 << 8, /* Transmitter FIFO full status */ - UART_LSR_RX_FIFO_EMPTY = 1 << 9, /* Receiver FIFO empty status */ -} UartLineStatus; - -/* 36.3.4 UART_LCR_0 */ -typedef enum { - UART_LCR_WD_LENGTH_5 = 0, /* word length 5 */ - UART_LCR_WD_LENGTH_6 = 1, /* word length 6 */ - UART_LCR_WD_LENGTH_7 = 2, /* word length 7 */ - UART_LCR_WD_LENGTH_8 = 3, /* word length 8 */ - - /* STOP: - 0 = Transmit 1 stop bit - 1 = Transmit 2 stop bits (receiver always checks for 1 stop bit) - */ - UART_LCR_STOP = 1 << 2, - UART_LCR_PAR = 1 << 3, /* Parity enabled */ - UART_LCR_EVEN = 1 << 4, /* Even parity format. There will always be an even number of 1s in the binary representation (PAR = 1) */ - UART_LCR_SET_P = 1 << 5, /* Set (force) parity to value in LCR[4] */ - UART_LCR_SET_B = 1 << 6, /* Set BREAK condition -- Transmitter sends all zeroes to indicate BREAK */ - UART_LCR_DLAB = 1 << 7, /* Divisor Latch Access Bit (set to allow programming of the DLH, DLM Divisors) */ -} UartLineControl; - -/* 36.3.3 UART_IIR_FCR_0 */ -typedef enum { - UART_FCR_FCR_EN_FIFO = 1 << 0, /* Enable the transmit and receive FIFOs. This bit should be enabled */ - UART_FCR_RX_CLR = 1 << 1, /* Clears the contents of the receive FIFO and resets its counter logic to 0 (the receive shift register is not cleared or altered). This bit returns to 0 after clearing the FIFOs */ - UART_FCR_TX_CLR = 1 << 2, /* Clears the contents of the transmit FIFO and resets its counter logic to 0 (the transmit shift register is not cleared or altered). This bit returns to 0 after clearing the FIFOs */ - - /* DMA: - 0 = DMA_MODE_0 - 1 = DMA_MODE_1 - */ - UART_FCR_DMA = 1 << 3, - - /* TX_TRIG - 0 = FIFO_COUNT_GREATER_16 - 1 = FIFO_COUNT_GREATER_8 - 2 = FIFO_COUNT_GREATER_4 - 3 = FIFO_COUNT_GREATER_1 - */ - UART_FCR_TX_TRIG = 3 << 4, - UART_FCR_TX_TRIG_FIFO_COUNT_GREATER_16 = 0 << 4, - UART_FCR_TX_TRIG_FIFO_COUNT_GREATER_8 = 1 << 4, - UART_FCR_TX_TRIG_FIFO_COUNT_GREATER_4 = 2 << 4, - UART_FCR_TX_TRIG_FIFO_COUNT_GREATER_1 = 3 << 4, - - /* RX_TRIG - 0 = FIFO_COUNT_GREATER_1 - 1 = FIFO_COUNT_GREATER_4 - 2 = FIFO_COUNT_GREATER_8 - 3 = FIFO_COUNT_GREATER_16 - */ - UART_FCR_RX_TRIG = 3 << 6, - UART_FCR_RX_TRIG_FIFO_COUNT_GREATER_1 = 0 << 6, - UART_FCR_RX_TRIG_FIFO_COUNT_GREATER_4 = 1 << 6, - UART_FCR_RX_TRIG_FIFO_COUNT_GREATER_8 = 2 << 6, - UART_FCR_RX_TRIG_FIFO_COUNT_GREATER_16 = 3 << 6, -} UartFifoControl; - -/* 36.3.3 UART_IIR_FCR_0 */ -typedef enum { - UART_IIR_IS_STA = 1 << 0, /* Interrupt Pending if ZERO */ - UART_IIR_IS_PRI0 = 1 << 1, /* Encoded Interrupt ID Refer to IIR[3:0] table [36.3.3] */ - UART_IIR_IS_PRI1 = 1 << 2, /* Encoded Interrupt ID Refer to IIR[3:0] table */ - UART_IIR_IS_PRI2 = 1 << 3, /* Encoded Interrupt ID Refer to IIR[3:0] table */ - - /* FIFO Mode Status - 0 = 16450 mode (no FIFO) - 1 = 16550 mode (FIFO) - */ - UART_IIR_EN_FIFO = 3 << 6, - UART_IIR_MODE_16450 = 0 << 6, - UART_IIR_MODE_16550 = 1 << 6, -} UartInterruptIdentification; - -typedef struct { - uint32_t UART_THR_DLAB; - uint32_t UART_IER_DLAB; - uint32_t UART_IIR_FCR; - uint32_t UART_LCR; - uint32_t UART_MCR; - uint32_t UART_LSR; - uint32_t UART_MSR; - uint32_t UART_SPR; - uint32_t UART_IRDA_CSR; - uint32_t UART_RX_FIFO_CFG; - uint32_t UART_MIE; - uint32_t UART_VENDOR_STATUS; - uint8_t _0x30[0x0C]; - uint32_t UART_ASR; -} tegra_uart_t; - -void uart_config(UartDevice dev); -void uart_init(UartDevice dev, uint32_t baud); -void uart_wait_idle(UartDevice dev, UartVendorStatus status); -void uart_send(UartDevice dev, const void *buf, size_t len); -void uart_recv(UartDevice dev, void *buf, size_t len); - -static inline volatile tegra_uart_t *uart_get_regs(UartDevice dev) { - static const size_t offsets[] = {0, 0x40, 0x200, 0x300, 0x400}; - return (volatile tegra_uart_t *)(UART_BASE + offsets[dev]); -} - -#endif diff --git a/fusee/fusee-primary/fusee-primary-main/src/utils.c b/fusee/fusee-primary/fusee-primary-main/src/utils.c deleted file mode 100644 index 6dd69314e..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/utils.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "utils.h" -#include "di.h" -#include "se.h" -#include "fuse.h" -#include "pmc.h" -#include "timers.h" -#include "i2c.h" -#include "panic.h" -#include "car.h" -#include "btn.h" -#include "max77620.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/vsprintf.h" -#include "../../../fusee/common/display/video_fb.h" - -#include - -#define u8 uint8_t -#define u32 uint32_t -#include "rebootstub_bin.h" -#undef u8 -#undef u32 - -static bool is_soc_mariko(void) { - return fuse_get_soc_type() == 1; -} - -__attribute__((noreturn)) static void shutdown_system(bool reboot) { - /* Ensure that i2c5 is in a coherent state. */ - i2c_config(I2C_5); - clkrst_reboot(CARDEVICE_I2C5); - i2c_init(I2C_5); - - /* Get value, set or clear software reset mask. */ - uint8_t on_off_2_val = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, &on_off_2_val, 1); - if (reboot) { - on_off_2_val |= MAX77620_ONOFFCNFG2_SFT_RST_WK; - } else { - on_off_2_val &= ~(MAX77620_ONOFFCNFG2_SFT_RST_WK); - } - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, &on_off_2_val, 1); - - /* Set software reset mask. */ - uint8_t on_off_1_val = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &on_off_1_val, 1); - on_off_1_val |= MAX77620_ONOFFCNFG1_SFT_RST; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &on_off_1_val, 1); - - while (true) { - /* Wait for reboot. */ - } -} - -extern uint8_t __reboot_start__[], __reboot_end__[]; - -void wait(uint32_t microseconds) { - uint32_t old_time = TIMERUS_CNTR_1US_0; - while (TIMERUS_CNTR_1US_0 - old_time <= microseconds) { - /* Spin-lock. */ - } -} - -__attribute__((noreturn)) void watchdog_reboot(void) { - volatile watchdog_timers_t *wdt = GET_WDT(4); - wdt->PATTERN = WDT_REBOOT_PATTERN; - wdt->COMMAND = 2; /* Disable Counter. */ - GET_WDT_REBOOT_CFG_REG(4) = 0xC0000000; - wdt->CONFIG = 0x8019; /* Full System Reset after Fourth Counter expires, using TIMER(9). */ - wdt->COMMAND = 1; /* Enable Counter. */ - while (true) { - /* Wait for reboot. */ - } -} - -__attribute__((noreturn)) void pmc_reboot(uint32_t scratch0) { - APBDEV_PMC_SCRATCH0_0 = scratch0; - - /* Reset the processor. */ - APBDEV_PMC_CONTROL = BIT(4); - - while (true) { - /* Wait for reboot. */ - } -} - -__attribute__((noreturn)) void reboot_to_self(void) { - if (is_soc_mariko()) { - /* If mariko, we can't reboot to self/payload, so just reboot. */ - shutdown_system(true); - } else { - /* Patch SDRAM init to perform an SVC immediately after second write */ - APBDEV_PMC_SCRATCH45_0 = 0x2E38DFFF; - APBDEV_PMC_SCRATCH46_0 = 0x6001DC28; - /* Set SVC handler to jump to reboot stub in IRAM. */ - APBDEV_PMC_SCRATCH33_0 = 0x4003F000; - APBDEV_PMC_SCRATCH40_0 = 0x6000F208; - - /* Copy reboot stub into IRAM high. */ - for (size_t i = 0; i < rebootstub_bin_size; i += sizeof(uint32_t)) { - write32le((void *)0x4003F000, i, read32le(rebootstub_bin, i)); - } - - /* Copy our low part into safe IRAM. */ - for (size_t i = 0; i < 0x8000; i += sizeof(uint32_t)) { - write32le((void *)0x40030000, i, read32le((void *)0x40008000, i)); - } - - /* Copy our start page into fatal IRAM. */ - for (size_t i = 0; i < 0x1000; i += sizeof(uint32_t)) { - write32le((void *)0x4003D000, i, read32le((void *)0x40010000, i)); - } - - /* Copy our reboot handler to the rebootstub target. */ - for (size_t i = 0; i < (__reboot_end__ - __reboot_start__); i += sizeof(uint32_t)) { - write32le((void *)0x40010000, i, read32le(__reboot_start__, i)); - } - - /* Trigger warm reboot. */ - APBDEV_PMC_SCRATCH0_0 = (1 << 0); - - /* Reset the processor. */ - APBDEV_PMC_CONTROL = BIT(4); - - while (true) { - /* Wait for reboot. */ - } - } -} - -__attribute__((noreturn)) void wait_for_button_and_reboot(void) { - uint32_t button; - while (true) { - button = btn_read(); - if (button & BTN_POWER) { - reboot_to_self(); - } - } -} - -__attribute__ ((noreturn)) void generic_panic(void) { - panic(0xFF000006); -} - -__attribute__((noreturn)) void fatal_error(const char *fmt, ...) { - /* Forcefully initialize the screen if logging is disabled. */ - if (log_get_log_level() == SCREEN_LOG_LEVEL_NONE) { - /* Zero-fill the framebuffer and register it as printk provider. */ - video_init((void *)0xC0000000); - - /* Initialize the display. */ - display_init(); - - /* Set the framebuffer. */ - display_init_framebuffer((void *)0xC0000000); - - /* Turn on the backlight after initializing the lfb */ - /* to avoid flickering. */ - display_backlight(true); - } - - /* Override the global logging level. */ - log_set_log_level(SCREEN_LOG_LEVEL_ERROR); - - /* Display fatal error. */ - va_list args; - print(SCREEN_LOG_LEVEL_ERROR, "Fatal error: "); - va_start(args, fmt); - vprint(SCREEN_LOG_LEVEL_ERROR, fmt, args); - va_end(args); - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX,"\nPress POWER to reboot\n"); - - /* Wait for button and reboot. */ - wait_for_button_and_reboot(); -} - -__attribute__((noinline)) bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be) -{ - if(as <= bs && bs <= ae) - return true; - if(bs <= as && as <= be) - return true; - return false; -} diff --git a/fusee/fusee-primary/fusee-primary-main/src/utils.h b/fusee/fusee-primary/fusee-primary-main/src/utils.h deleted file mode 100644 index d3eaea88e..000000000 --- a/fusee/fusee-primary/fusee-primary-main/src/utils.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_UTILS_H -#define FUSEE_UTILS_H - -#include -#include -#include -#include - -#define BIT(n) (1u << (n)) -#define BITL(n) (1ull << (n)) -#define MASK(n) (BIT(n) - 1) -#define MASKL(n) (BITL(n) - 1) -#define MASK2(a,b) (MASK(a) & ~MASK(b)) -#define MASK2L(a,b) (MASKL(a) & ~MASKL(b)) - -#define MAKE_REG32(a) (*(volatile uint32_t *)(a)) - -#define ALIGN(m) __attribute__((aligned(m))) -#define PACKED __attribute__((packed)) - -#define ALINLINE __attribute__((always_inline)) -#define NOINLINE __attribute__((noinline)) - -#define SET_SYSREG(reg, val) do { temp_reg = (val); __asm__ __volatile__ ("msr " #reg ", %0" :: "r"(temp_reg) : "memory"); } while(false) - -static inline uintptr_t get_physical_address(const void *addr) { - return (uintptr_t)addr; -} - -static inline uint32_t read32le(const volatile void *dword, size_t offset) { - uintptr_t addr = (uintptr_t)dword + offset; - volatile uint32_t *target = (uint32_t *)addr; - return *target; -} - -static inline uint32_t read32be(const volatile void *dword, size_t offset) { - return __builtin_bswap32(read32le(dword, offset)); -} - -static inline uint64_t read64le(const volatile void *qword, size_t offset) { - uintptr_t addr = (uintptr_t)qword + offset; - volatile uint64_t *target = (uint64_t *)addr; - return *target; -} - -static inline uint64_t read64be(const volatile void *qword, size_t offset) { - return __builtin_bswap64(read64le(qword, offset)); -} - -static inline void write32le(volatile void *dword, size_t offset, uint32_t value) { - uintptr_t addr = (uintptr_t)dword + offset; - volatile uint32_t *target = (uint32_t *)addr; - *target = value; -} - -static inline void write32be(volatile void *dword, size_t offset, uint32_t value) { - write32le(dword, offset, __builtin_bswap32(value)); -} - -static inline void write64le(volatile void *qword, size_t offset, uint64_t value) { - uintptr_t addr = (uintptr_t)qword + offset; - volatile uint64_t *target = (uint64_t *)addr; - *target = value; -} - -static inline void write64be(volatile void *qword, size_t offset, uint64_t value) { - write64le(qword, offset, __builtin_bswap64(value)); -} - -static inline bool check_32bit_additive_overflow(uint32_t a, uint32_t b) { - return __builtin_add_overflow_p(a, b, (uint32_t)0); -} - -static inline bool check_32bit_address_loadable(uintptr_t addr) { - /* FWIW the bootROM forbids loading anything between 0x40000000 and 0x40010000, using it for itself... */ - return (addr >= 0x40010000u && addr < 0x40040000u) || addr >= 0x80000000u; -} - -static inline bool check_32bit_address_range_loadable(uintptr_t addr, size_t size) { - return - !__builtin_add_overflow_p(addr, size, (uintptr_t)0) && /* the range doesn't overflow */ - check_32bit_address_loadable(addr) && check_32bit_address_loadable(addr + size) && /* bounds are valid */ - !(addr >= 0x40010000u && addr < 0x40040000u && addr + size >= 0x40040000u) /* the range doesn't cross MMIO */ - ; -} - -bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be); -static inline bool overlaps_a(const void *as, const void *ae, const void *bs, const void *be) { - return overlaps((uint64_t)(uintptr_t)as, (uint64_t)(uintptr_t)ae, (uint64_t)(uintptr_t)bs, (uint64_t)(uintptr_t)be); -} - -static inline bool check_32bit_address_range_in_program(uintptr_t addr, size_t size) { - extern uint8_t __chainloader_start__[], __chainloader_end__[]; - extern uint8_t __stack_bottom__[], __stack_top__[]; - extern uint8_t __start__[], __end__[]; - uint8_t *start = (uint8_t *)addr, *end = start + size; - - return overlaps_a(start, end, __chainloader_start__, __chainloader_end__) || - overlaps_a(start, end, __stack_bottom__, __stack_top__) || - overlaps_a(start, end, (void *)0xC0000000, (void *)0xC03C0000) || /* framebuffer */ - overlaps_a(start, end, __start__, __end__); -} - -__attribute__((noreturn)) void watchdog_reboot(void); -__attribute__((noreturn)) void pmc_reboot(uint32_t scratch0); -__attribute__((noreturn)) void reboot_to_self(void); -__attribute__((noreturn)) void wait_for_button_and_reboot(void); - -__attribute__((noreturn)) void generic_panic(void); -__attribute__((noreturn)) void fatal_error(const char *fmt, ...); - -#endif diff --git a/fusee/fusee-primary/linker.ld b/fusee/fusee-primary/linker.ld deleted file mode 100644 index e241a3807..000000000 --- a/fusee/fusee-primary/linker.ld +++ /dev/null @@ -1,158 +0,0 @@ -OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) - -PHDRS -{ - crt0 PT_LOAD; - main PT_LOAD; - loader_stub PT_LOAD; -} - -/* Mostly copied from https://github.com/devkitPro/buildscripts/blob/master/dkarm-eabi/crtls/3dsx.ld */ -MEMORY -{ - NULL : ORIGIN = 0x00000000, LENGTH = 0x1000 - main : ORIGIN = 0x40010000, LENGTH = 0x20000 - loader_stub : ORIGIN = 0x40030000, LENGTH = 0x4000 -} - -SECTIONS -{ - PROVIDE(__start__ = 0x40008000); - PROVIDE(__stack_top__ = 0x40038000); - PROVIDE(__stack_bottom__ = 0x40034000); - PROVIDE(__heap_start__ = 0); - PROVIDE(__heap_end__ = 0); - - . = __start__; - - .crt0 : - { - KEEP( *(.text.start) ) - KEEP( *(.init) ) - . = ALIGN(32); - } >main :crt0 - - .rodata : - { - *(.rodata) - *(.roda) - *(.rodata.*) - *all.rodata*(*) - *(.gnu.linkonce.r*) - SORT(CONSTRUCTORS) - . = ALIGN(8); - } >main - - .fini_array ALIGN(4) : - { - PROVIDE (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE (__fini_array_end = .); - } >main - - .ctors ALIGN(4) : - { - KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */ - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .dtors ALIGN(4) : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) __exidx_start = ABSOLUTE(.);} >main - ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) __exidx_end = ABSOLUTE(.);} >main - - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - CONSTRUCTORS - . = ALIGN(32); - } >main - - .bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__bss_start__ = ABSOLUTE(.)); - *(.dynbss) - *(.bss) - *(.bss.*) - *(.gnu.linkonce.b*) - *(COMMON) - . = ALIGN(32); - PROVIDE (__bss_end__ = ABSOLUTE(.)); - } >main :NONE - - .loader_stub : - { - . = ALIGN(32); - PROVIDE (__loader_stub_start__ = ABSOLUTE(.)); - PROVIDE (__loader_stub_lma__ = LOADADDR(.loader_stub)); - loader_stub.o(.text*) - lz4.o(.text*) - utils.o(.text*) - loader_stub.o(.rodata*) - lz4.o(.rodata*) - utils.o(.rodata*) - loader_stub.o(.data*) - lz4.o(.data*) - utils.o(data) - . = ALIGN(32); - PROVIDE (__loader_stub_end__ = ABSOLUTE(.)); - } >loader_stub AT>main : loader_stub - - __end__ = ABSOLUTE(.) ; - - /* ================== - ==== Metadata ==== - ================== */ - - /* Discard sections that difficult post-processing */ - /DISCARD/ : { *(.group .comment .note) } - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } -} diff --git a/fusee/fusee-primary/linker.specs b/fusee/fusee-primary/linker.specs deleted file mode 100644 index 300990418..000000000 --- a/fusee/fusee-primary/linker.specs +++ /dev/null @@ -1,7 +0,0 @@ -%rename link old_link - -*link: -%(old_link) -T %:getenv(TOPDIR /linker.ld) --nmagic --gc-sections - -*startfile: -crti%O%s crtbegin%O%s diff --git a/fusee/fusee-primary/src/loader_stub.c b/fusee/fusee-primary/src/loader_stub.c deleted file mode 100644 index 96000e076..000000000 --- a/fusee/fusee-primary/src/loader_stub.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#include -#include -#include -#include "lz4.h" -#include "utils.h" - -#define PRIMARY_START (0x40008000) -#define PRIMARY_SIZE_MAX (0x28000) -#define PRIMARY_END (PRIMARY_START + PRIMARY_SIZE_MAX) - -void load_fusee_primary_main(void *compressed_main, size_t main_size) { - /* Relocate the compressed binary to a place where we can safely decompress it. */ - void *relocated_main = (void *)(PRIMARY_END - main_size); - loader_memmove(relocated_main, compressed_main, main_size); - - /* Uncompress the compressed binary. */ - lz4_uncompress((void *)PRIMARY_START, PRIMARY_SIZE_MAX, relocated_main, main_size); - - /* Jump to the newly uncompressed binary. */ - ((void (*)(void))(PRIMARY_START))(); - - /* We will never reach this point. */ - __builtin_unreachable(); -} \ No newline at end of file diff --git a/fusee/fusee-primary/src/lz4.c b/fusee/fusee-primary/src/lz4.c deleted file mode 100644 index eafc2d481..000000000 --- a/fusee/fusee-primary/src/lz4.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#include -#include -#include -#include "lz4.h" -#include "utils.h" - -typedef struct { - const uint8_t *src; - size_t src_size; - size_t src_offset; - uint8_t *dst; - size_t dst_size; - size_t dst_offset; -} lz4_ctx; - -static uint8_t lz4_ctx_read_byte(lz4_ctx *ctx) { - return ctx->src[ctx->src_offset++]; -} - -static bool lz4_ctx_can_read(const lz4_ctx *ctx) { - return ctx->src_offset < ctx->src_size; -} - -static size_t lz4_ctx_get_copy_size(lz4_ctx *ctx, uint8_t ctrl) { - size_t size = ctrl; - - if (ctrl >= 0xF) { - do { - while (!lz4_ctx_can_read(ctx)); - ctrl = lz4_ctx_read_byte(ctx); - size += ctrl; - } while (ctrl == 0xFF); - } - - return size; -} - -static void lz4_ctx_copy(lz4_ctx *ctx, size_t size) { - /* Perform the copy. */ - loader_memcpy(ctx->dst + ctx->dst_offset, ctx->src + ctx->src_offset, size); - - ctx->dst_offset += size; - ctx->src_offset += size; -} - -static void lz4_ctx_uncompress(lz4_ctx *ctx) { - while (true) { - /* Read a control byte. */ - const uint8_t control = lz4_ctx_read_byte(ctx); - - /* Copy what it specifies we should copy. */ - lz4_ctx_copy(ctx, lz4_ctx_get_copy_size(ctx, control >> 4)); - - /* If we've exceeded size, we're done. */ - if (ctx->src_offset >= ctx->src_size) { - break; - } - - /* Read the wide copy offset. */ - uint16_t wide_offset = lz4_ctx_read_byte(ctx); - while (!lz4_ctx_can_read(ctx)); - wide_offset |= (lz4_ctx_read_byte(ctx) << 8); - - /* Determine the copy size. */ - const size_t wide_copy_size = lz4_ctx_get_copy_size(ctx, control & 0xF); - - /* Copy bytes. */ - const size_t end_offset = ctx->dst_offset + wide_copy_size + 4; - for (size_t cur_offset = ctx->dst_offset; cur_offset < end_offset; ctx->dst_offset = (++cur_offset)) { - while (!(wide_offset <= cur_offset)); - - ctx->dst[cur_offset] = ctx->dst[cur_offset - wide_offset]; - } - } -} - -void lz4_uncompress(void *dst, size_t dst_size, const void *src, size_t src_size) { - /* Create and execute a decompressor. */ - lz4_ctx ctx = { src, src_size, 0, dst, dst_size, 0 }; - lz4_ctx_uncompress(&ctx); -} diff --git a/fusee/fusee-primary/src/lz4.h b/fusee/fusee-primary/src/lz4.h deleted file mode 100644 index 72606c208..000000000 --- a/fusee/fusee-primary/src/lz4.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#pragma once - -void lz4_uncompress(void *dst, size_t dst_size, const void *src, size_t src_size); diff --git a/fusee/fusee-primary/src/start.s b/fusee/fusee-primary/src/start.s deleted file mode 100644 index af7b0abd3..000000000 --- a/fusee/fusee-primary/src/start.s +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -.macro CLEAR_GPR_REG_ITER - mov r\@, #0 -.endm - -.section .text.start, "ax", %progbits -.arm -.align 5 -.global _start -.type _start, %function -_start: - /* Switch to system mode, mask all interrupts, clear all flags */ - msr cpsr_cxsf, #0xDF - - /* Relocate loader stub. */ - ldr r0, =_start - adr r1, _start - ldr r2, =__loader_stub_lma__ - sub r2, r2, r0 - add r2, r2, r1 - - ldr r3, =__loader_stub_start__ - ldr r4, =__loader_stub_end__ - sub r4, r4, r3 - _relocation_loop: - ldmia r2!, {r5-r12} - stmia r3!, {r5-r12} - subs r4, #0x20 - bne _relocation_loop - - /* Set the stack pointer */ - ldr sp, =__stack_top__ - mov fp, #0 - - /* Generate arguments. */ - ldr r3, =fusee_primary_main_lz4 - ldr r4, =fusee_primary_main_lz4_end - sub r4, r4, r3 - sub r3, r3, r0 - add r3, r3, r1 - mov r0, r3 - mov r1, r4 - - /* Jump to the loader stub. */ - ldr r3, =load_fusee_primary_main - bx r3 diff --git a/fusee/fusee-primary/src/utils.c b/fusee/fusee-primary/src/utils.c deleted file mode 100644 index 852a4904e..000000000 --- a/fusee/fusee-primary/src/utils.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#include -#include -#include -#include "utils.h" - -static void copy_forwards(uint8_t *dst, const uint8_t *src, size_t size) { - for (int i = 0; i < size; ++i) { - dst[i] = src[i]; - } -} - -static void copy_backwards(uint8_t *dst, const uint8_t *src, size_t size) { - for (int i = size - 1; i >= 0; --i) { - dst[i] = src[i]; - } -} - -void loader_memcpy(void *dst, const void *src, size_t size) { - copy_forwards(dst, src, size); -} - -void loader_memmove(void *dst, const void *src, size_t size) { - const uintptr_t dst_u = (uintptr_t)dst; - const uintptr_t src_u = (uintptr_t)src; - - if (dst_u < src_u) { - copy_forwards(dst, src, size); - } else if (dst_u > src_u) { - copy_backwards(dst, src, size); - } else { - /* Nothing to do */ - } -} \ No newline at end of file diff --git a/fusee/fusee-primary/src/utils.h b/fusee/fusee-primary/src/utils.h deleted file mode 100644 index 2275ea3e5..000000000 --- a/fusee/fusee-primary/src/utils.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#pragma once - -void loader_memcpy(void *dst, const void *src, size_t size); -void loader_memmove(void *dst, const void *src, size_t size); diff --git a/fusee/fusee-secondary/Makefile b/fusee/fusee-secondary/Makefile deleted file mode 100644 index e49f556a3..000000000 --- a/fusee/fusee-secondary/Makefile +++ /dev/null @@ -1,232 +0,0 @@ -#--------------------------------------------------------------------------------- -.SUFFIXES: -#--------------------------------------------------------------------------------- - -ifeq ($(strip $(DEVKITARM)),) -$(error "Please set DEVKITARM in your environment. export DEVKITARM=devkitARM") -endif - -TOPDIR ?= $(CURDIR) - -AMS := $(TOPDIR)/../../ - -include $(DEVKITARM)/base_rules - -AMSBRANCH := $(shell git symbolic-ref --short HEAD) -AMSHASH := $(shell git rev-parse --short HEAD) -AMSREV := $(AMSBRANCH)-$(AMSHASH) - -ifneq (, $(strip $(shell git status --porcelain 2>/dev/null))) - AMSREV := $(AMSREV)-dirty -endif - -define _bin2o - bin2s $< | $(AS) -o $(@) - echo "extern const u8" `(echo $( `(echo $(> `(echo $(> `(echo $( $(notdir $*.lst) - -$(OFILES_SRC) : $(HFILES_BIN) - -#--------------------------------------------------------------------------------- -# you need a rule like this for each extension you use as binary data -#--------------------------------------------------------------------------------- -fusee_primary.bin.o fusee_primary_bin.h: fusee-primary.bin -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(_bin2o) - -%.bin.o %_bin.h: %.bin -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(bin2o) - -%.bmp.o %_bmp.h: %.bmp -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(bin2o) - -%.kip.o %_kip.h: %.kip -#--------------------------------------------------------------------------------- - @echo $(notdir $<) - @$(bin2o) - --include $(DEPENDS) - -#--------------------------------------------------------------------------------------- -endif -#--------------------------------------------------------------------------------------- diff --git a/fusee/fusee-secondary/data/tsec_keygen.bin b/fusee/fusee-secondary/data/tsec_keygen.bin deleted file mode 100644 index b27cdaf40..000000000 Binary files a/fusee/fusee-secondary/data/tsec_keygen.bin and /dev/null differ diff --git a/fusee/fusee-secondary/fusee_make_standard.py b/fusee/fusee-secondary/fusee_make_standard.py deleted file mode 100644 index f921d76bb..000000000 --- a/fusee/fusee-secondary/fusee_make_standard.py +++ /dev/null @@ -1,37 +0,0 @@ -#!/usr/bin/env python -import sys, os -from struct import pack as pk, unpack as up - -def make_standard(exp): - std = exp[:] - _, metadata_offset, is_exp = up('main :crt0 - - .chainloader_loadable : - { - . = ALIGN(32); - PROVIDE (__chainloader_start__ = ABSOLUTE(.)); - PROVIDE (__chainloader_lma__ = LOADADDR(.chainloader_loadable)); - KEEP(*(.chainloader.text.start)) - chainloader.o(.text*) - chainloader.o(.rodata*) - chainloader.o(.data*) - . = ALIGN(32); - } >low_iram AT>main :chainloader - - .chainloader_bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__chainloader_bss_start__ = ABSOLUTE(.)); - chainloader.o(.bss* COMMON) - . = ALIGN(32); - PROVIDE (__chainloader_end__ = ABSOLUTE(.)); - } >low_iram :NONE - - .nxboot_loadable : - { - . = ALIGN(32); - PROVIDE (__nxboot_start__ = ABSOLUTE(.)); - PROVIDE (__nxboot_lma__ = LOADADDR(.nxboot_loadable)); - KEEP(*(.nxboot.text.start)) - nxboot_iram.o(.text*) - cluster.o(.text*) - car.o(.text*) - nxboot_iram.o(.rodata*) - cluster.o(.rodata*) - car.o(.rodata*) - nxboot_iram.o(.data*) - cluster.o(.data*) - car.o(.data*) - . = ALIGN(32); - } >high_iram AT>main :nxboot - - .nxboot_bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__nxboot_bss_start__ = ABSOLUTE(.)); - nxboot_iram.o(.bss* COMMON) - cluster.o(.bss* COMMON) - car.o(.bss* COMMON) - . = ALIGN(32); - PROVIDE (__nxboot_end__ = ABSOLUTE(.)); - } >high_iram :NONE - - .text : - { - . = ALIGN(32); - /* .text */ - *(.text) - *(.text.*) - *(.glue_7) - *(.glue_7t) - *(.stub) - *(.gnu.warning) - *(.gnu.linkonce.t*) - - /* .fini */ - KEEP( *(.fini) ) - . = ALIGN(8); - } >main :main - - .rodata : - { - *(.rodata) - *(.roda) - *(.rodata.*) - *all.rodata*(*) - *(.gnu.linkonce.r*) - SORT(CONSTRUCTORS) - . = ALIGN(8); - } >main - - .preinit_array : - { - PROVIDE (__preinit_array_start = .); - KEEP (*(.preinit_array)) - PROVIDE (__preinit_array_end = .); - } >main - - .init_array ALIGN(4) : - { - PROVIDE (__init_array_start = .); - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - PROVIDE (__init_array_end = .); - } >main - - .fini_array ALIGN(4) : - { - PROVIDE (__fini_array_start = .); - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - PROVIDE (__fini_array_end = .); - } >main - - .ctors ALIGN(4) : - { - KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */ - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .dtors ALIGN(4) : - { - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - . = ALIGN(4); /* REQUIRED. LD is flaky without it. */ - } >main - - .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) __exidx_start = ABSOLUTE(.);} >main - ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) __exidx_end = ABSOLUTE(.);} >main - - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - CONSTRUCTORS - . = ALIGN(32); - } >main - - __data_end__ = ABSOLUTE(.); - PROVIDE (__total_size__ = (__data_end__ - __start__)); - - .bss (NOLOAD) : - { - . = ALIGN(32); - PROVIDE (__bss_start__ = ABSOLUTE(.)); - *(.dynbss) - *(.bss) - *(.bss.*) - *(.gnu.linkonce.b*) - *(COMMON) - . = ALIGN(32); - PROVIDE (__bss_end__ = ABSOLUTE(.)); - } >main :NONE - __end__ = ABSOLUTE(.) ; - - /* ================== - ==== Metadata ==== - ================== */ - - /* Discard sections that difficult post-processing */ - /DISCARD/ : { *(.group .comment .note) } - - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - - /* ======================= - ==== Embedded Data ==== - ======================= */ - PROVIDE(__ams_mitm_kip_start__ = ams_mitm_kip - __start__); - PROVIDE(__ams_mitm_kip_size__ = ams_mitm_kip_end - ams_mitm_kip); - PROVIDE(__boot_kip_start__ = boot_kip - __start__); - PROVIDE(__boot_kip_size__ = boot_kip_end - boot_kip); - PROVIDE(__exosphere_bin_start__ = exosphere_bin - __start__); - PROVIDE(__exosphere_bin_size__ = exosphere_bin_end - exosphere_bin); - PROVIDE(__fusee_primary_bin_start__ = fusee_primary_bin - __start__); - PROVIDE(__fusee_primary_bin_size__ = fusee_primary_bin_end - fusee_primary_bin); - PROVIDE(__loader_kip_start__ = loader_kip - __start__); - PROVIDE(__loader_kip_size__ = loader_kip_end - loader_kip); - PROVIDE(__warmboot_bin_start__ = warmboot_bin - __start__); - PROVIDE(__warmboot_bin_size__ = warmboot_bin_end - warmboot_bin); - PROVIDE(__ncm_kip_start__ = ncm_kip - __start__); - PROVIDE(__ncm_kip_size__ = ncm_kip_end - ncm_kip); - PROVIDE(__pm_kip_start__ = pm_kip - __start__); - PROVIDE(__pm_kip_size__ = pm_kip_end - pm_kip); - PROVIDE(__rebootstub_bin_start__ = rebootstub_bin - __start__); - PROVIDE(__rebootstub_bin_size__ = rebootstub_bin_end - rebootstub_bin); - PROVIDE(__sm_kip_start__ = sm_kip - __start__); - PROVIDE(__sm_kip_size__ = sm_kip_end - sm_kip); - PROVIDE(__spl_kip_start__ = spl_kip - __start__); - PROVIDE(__spl_kip_size__ = spl_kip_end - spl_kip); - PROVIDE(__splash_screen_bin_start__ = splash_screen_bin - __start__); - PROVIDE(__splash_screen_bin_size__ = splash_screen_bin_end - splash_screen_bin); - PROVIDE(__thermosphere_bin_start__ = thermosphere_bin - __start__); - PROVIDE(__thermosphere_bin_size__ = thermosphere_bin_end - thermosphere_bin); - PROVIDE(__emummc_kip_start__ = emummc_kip - __start__); - PROVIDE(__emummc_kip_size__ = emummc_kip_end - emummc_kip); - PROVIDE(__kernel_ldr_bin_start__ = kernel_ldr_bin - __start__); - PROVIDE(__kernel_ldr_bin_size__ = kernel_ldr_bin_end - kernel_ldr_bin); - PROVIDE(__mesosphere_bin_start__ = mesosphere_bin - __start__); - PROVIDE(__mesosphere_bin_size__ = mesosphere_bin_end - mesosphere_bin); - PROVIDE(__mariko_fatal_bin_start__ = mariko_fatal_bin - __start__); - PROVIDE(__mariko_fatal_bin_size__ = mariko_fatal_bin_end - mariko_fatal_bin); - PROVIDE(__tsec_keygen_bin_start__ = tsec_keygen_bin - __start__); - PROVIDE(__tsec_keygen_bin_size__ = tsec_keygen_bin_end - tsec_keygen_bin); -} diff --git a/fusee/fusee-secondary/linker.specs b/fusee/fusee-secondary/linker.specs deleted file mode 100644 index 300990418..000000000 --- a/fusee/fusee-secondary/linker.specs +++ /dev/null @@ -1,7 +0,0 @@ -%rename link old_link - -*link: -%(old_link) -T %:getenv(TOPDIR /linker.ld) --nmagic --gc-sections - -*startfile: -crti%O%s crtbegin%O%s diff --git a/fusee/fusee-secondary/src/apb_misc.h b/fusee/fusee-secondary/src/apb_misc.h deleted file mode 100644 index 3cac3c5f8..000000000 --- a/fusee/fusee-secondary/src/apb_misc.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_APB_MISC_H -#define FUSEE_APB_MISC_H - -#include - -#define APB_MISC_BASE 0x70000000 -#define APB_PADCTL_BASE 0x70000810 -#define MAKE_APB_MISC_REG(n) MAKE_REG32(APB_MISC_BASE + n) -#define MAKE_APB_PADCTL_REG(n) MAKE_REG32(APB_PADCTL_BASE + n) - -#define APB_MISC_PP_PINMUX_GLOBAL_0 MAKE_APB_MISC_REG(0x40) -#define APB_MISC_GP_DSI_PAD_CONTROL_0 MAKE_APB_MISC_REG(0xAC0) -#define APB_MISC_GP_WIFI_EN_CFGPADCTRL_0 MAKE_APB_MISC_REG(0xB64) -#define APB_MISC_GP_WIFI_RST_CFGPADCTRL_0 MAKE_APB_MISC_REG(0xB68) - -#define SDMMC1_PAD_CAL_DRVUP_SHIFT (20) -#define SDMMC1_PAD_CAL_DRVDN_SHIFT (12) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_SHIFT (28) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_SHIFT (30) -#define SDMMC1_PAD_CAL_DRVUP_MASK (0x7Fu << SDMMC1_PAD_CAL_DRVUP_SHIFT) -#define SDMMC1_PAD_CAL_DRVDN_MASK (0x7Fu << SDMMC1_PAD_CAL_DRVDN_SHIFT) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_MASK (0x03u << SDMMC1_CLK_CFG_CAL_DRVDN_SLWR_SHIFT) -#define SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_MASK (0x03u << SDMMC1_CLK_CFG_CAL_DRVDN_SLWF_SHIFT) - -#define EMMC2_PAD_DRVUP_COMP_SHIFT (8) -#define EMMC2_PAD_DRVDN_COMP_SHIFT (2) -#define EMMC2_PAD_DRVUP_COMP_MASK (0x3Fu << EMMC2_PAD_DRVUP_COMP_SHIFT) -#define EMMC2_PAD_DRVDN_COMP_MASK (0x3Fu << EMMC2_PAD_DRVDN_COMP_SHIFT) - -#define SDMMC2_PAD_CAL_DRVUP_SHIFT (20) -#define SDMMC2_PAD_CAL_DRVDN_SHIFT (12) -#define SDMMC2_PAD_CAL_DRVUP_MASK (0x7Fu << SDMMC2_PAD_CAL_DRVUP_SHIFT) -#define SDMMC2_PAD_CAL_DRVDN_MASK (0x7Fu << SDMMC2_PAD_CAL_DRVDN_SHIFT) - -#define EMMC4_PAD_DRVUP_COMP_SHIFT (8) -#define EMMC4_PAD_DRVDN_COMP_SHIFT (2) -#define EMMC4_PAD_DRVUP_COMP_MASK (0x3Fu << EMMC4_PAD_DRVUP_COMP_SHIFT) -#define EMMC4_PAD_DRVDN_COMP_MASK (0x3Fu << EMMC4_PAD_DRVDN_COMP_SHIFT) - -#define PADCTL_SDMMC1_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC3_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC2_ENABLE_DATA_IN (0xFF << 8) -#define PADCTL_SDMMC2_ENABLE_CLK_IN (0x3 << 4) -#define PADCTL_SDMMC2_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC4_ENABLE_DATA_IN (0xFF << 8) -#define PADCTL_SDMMC4_ENABLE_CLK_IN (0x3 << 4) -#define PADCTL_SDMMC4_DEEP_LOOPBACK (1 << 0) -#define PADCTL_SDMMC1_CD_SOURCE (1 << 0) -#define PADCTL_SDMMC1_WP_SOURCE (1 << 1) -#define PADCTL_SDMMC3_CD_SOURCE (1 << 2) -#define PADCTL_SDMMC3_WP_SOURCE (1 << 3) - -typedef struct { - uint32_t asdbgreg; /* 0x810 */ - uint32_t _0x814[0x31]; - uint32_t sdmmc1_clk_lpbk_control; /* 0x8D4 */ - uint32_t sdmmc3_clk_lpbk_control; /* 0x8D8 */ - uint32_t emmc2_pad_cfg_control; /* 0x8DC */ - uint32_t emmc4_pad_cfg_control; /* 0x8E0 */ - uint32_t _0x8E4[0x6E]; - uint32_t sdmmc1_pad_cfgpadctrl; /* 0xA98 */ - uint32_t emmc2_pad_cfgpadctrl; /* 0xA9C */ - uint32_t emmc2_pad_drv_type_cfgpadctrl; /* 0xAA0 */ - uint32_t emmc2_pad_pupd_cfgpadctrl; /* 0xAA4 */ - uint32_t _0xAA8[0x03]; - uint32_t sdmmc3_pad_cfgpadctrl; /* 0xAB0 */ - uint32_t emmc4_pad_cfgpadctrl; /* 0xAB4 */ - uint32_t emmc4_pad_drv_type_cfgpadctrl; /* 0xAB8 */ - uint32_t emmc4_pad_pupd_cfgpadctrl; /* 0xABC */ - uint32_t _0xAC0[0x2E]; - uint32_t vgpio_gpio_mux_sel; /* 0xB74 */ - uint32_t qspi_sck_lpbk_control; /* 0xB78 */ -} tegra_padctl_t; - -static inline volatile tegra_padctl_t *padctl_get_regs(void) -{ - return (volatile tegra_padctl_t *)APB_PADCTL_BASE; -} - -#endif diff --git a/fusee/fusee-secondary/src/bct.h b/fusee/fusee-secondary/src/bct.h deleted file mode 100644 index 98e41b66b..000000000 --- a/fusee/fusee-secondary/src/bct.h +++ /dev/null @@ -1,1358 +0,0 @@ -/* Some changes were made (types, include guard, etc.) */ - -#ifndef FUSEE_BCT_H -#define FUSEE_BCT_H - -#include - -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - * See file CREDITS for list of people who contributed to this - * project. - */ - -/** - * Defines the SDRAM parameter structure. - * - * Note that PLLM is used by EMC. - */ - -#define NVBOOT_BCT_SDRAM_ARB_CONFIG_WORDS 27 - -typedef enum { - /* Specifies the memory type to be undefined */ - nvboot_memory_type_none = 0, - - /* Specifies the memory type to be DDR SDRAM */ - nvboot_memory_type_ddr = 0, - - /* Specifies the memory type to be LPDDR SDRAM */ - nvboot_memory_type_lpddr = 0, - - /* Specifies the memory type to be DDR2 SDRAM */ - nvboot_memory_type_ddr2 = 0, - - /* Specifies the memory type to be LPDDR2 SDRAM */ - nvboot_memory_type_lpddr2, - - /* Specifies the memory type to be DDR3 SDRAM */ - nvboot_memory_type_ddr3, - - /* Specifies the memory type to be LPDDR4 SDRAM */ - nvboot_memory_type_lpddr4, - - nvboot_memory_type_num, - nvboot_memory_type_force32 = 0x7FFFFFF -} nvboot_memory_type; - -/** - * Defines the SDRAM parameter structure - */ -typedef struct nvboot_sdram_params_rec { - /* sdram data structure generated by tool warmboot_code_gen */ - - /* Specifies the type of memory device */ - nvboot_memory_type memory_type; - - /* MC/EMC clock source configuration */ - - /* Specifies the M value for PllM */ - uint32_t pllm_input_divider; - /* Specifies the N value for PllM */ - uint32_t pllm_feedback_divider; - /* Specifies the time to wait for PLLM to lock (in microseconds) */ - uint32_t pllm_stable_time; - /* Specifies misc. control bits */ - uint32_t pllm_setup_control; - /* Specifies the P value for PLLM */ - uint32_t pllm_post_divider; - /* Specifies value for Charge Pump Gain Control */ - uint32_t pllm_kcp; - /* Specifies VCO gain */ - uint32_t pllm_kvco; - /* Spare BCT param */ - uint32_t emc_bct_spare0; - /* Spare BCT param */ - uint32_t emc_bct_spare1; - /* Spare BCT param */ - uint32_t emc_bct_spare2; - /* Spare BCT param */ - uint32_t emc_bct_spare3; - /* Spare BCT param */ - uint32_t emc_bct_spare4; - /* Spare BCT param */ - uint32_t emc_bct_spare5; - /* Spare BCT param */ - uint32_t emc_bct_spare6; - /* Spare BCT param */ - uint32_t emc_bct_spare7; - /* Spare BCT param */ - uint32_t emc_bct_spare8; - /* Spare BCT param */ - uint32_t emc_bct_spare9; - /* Spare BCT param */ - uint32_t emc_bct_spare10; - /* Spare BCT param */ - uint32_t emc_bct_spare11; - /* Spare BCT param */ - uint32_t emc_bct_spare12; - /* Spare BCT param */ - uint32_t emc_bct_spare13; - - /* Defines EMC_2X_CLK_SRC, EMC_2X_CLK_DIVISOR, EMC_INVERT_DCD */ - uint32_t emc_clock_source; - uint32_t emc_clock_source_dll; - - /* Defines possible override for PLLLM_MISC2 */ - uint32_t clk_rst_pllm_misc20_override; - /* enables override for PLLLM_MISC2 */ - uint32_t clk_rst_pllm_misc20_override_enable; - /* defines CLK_ENB_MC1 in register clk_rst_controller_clk_enb_w_clr */ - uint32_t clear_clock2_mc1; - - /* Auto-calibration of EMC pads */ - - /* Specifies the value for EMC_AUTO_CAL_INTERVAL */ - uint32_t emc_auto_cal_interval; - /* - * Specifies the value for EMC_AUTO_CAL_CONFIG - * Note: Trigger bits are set by the SDRAM code. - */ - uint32_t emc_auto_cal_config; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG2 */ - uint32_t emc_auto_cal_config2; - - /* Specifies the value for EMC_AUTO_CAL_CONFIG3 */ - uint32_t emc_auto_cal_config3; - - uint32_t emc_auto_cal_config4; - uint32_t emc_auto_cal_config5; - uint32_t emc_auto_cal_config6; - uint32_t emc_auto_cal_config7; - uint32_t emc_auto_cal_config8; - /* Specifies the value for EMC_AUTO_CAL_VREF_SEL_0 */ - uint32_t emc_auto_cal_vref_sel0; - uint32_t emc_auto_cal_vref_sel1; - - /* Specifies the value for EMC_AUTO_CAL_CHANNEL */ - uint32_t emc_auto_cal_channel; - - /* Specifies the value for EMC_PMACRO_AUTOCAL_CFG_0 */ - uint32_t emc_pmacro_auto_cal_cfg0; - uint32_t emc_pmacro_auto_cal_cfg1; - uint32_t emc_pmacro_auto_cal_cfg2; - - uint32_t emc_pmacro_rx_term; - uint32_t emc_pmacro_dq_tx_drive; - uint32_t emc_pmacro_ca_tx_drive; - uint32_t emc_pmacro_cmd_tx_drive; - uint32_t emc_pmacro_auto_cal_common; - uint32_t emc_pmacro_zcrtl; - - /* - * Specifies the time for the calibration - * to stabilize (in microseconds) - */ - uint32_t emc_auto_cal_wait; - - uint32_t emc_xm2_comp_pad_ctrl; - uint32_t emc_xm2_comp_pad_ctrl2; - uint32_t emc_xm2_comp_pad_ctrl3; - - /* - * DRAM size information - * Specifies the value for EMC_ADR_CFG - */ - uint32_t emc_adr_cfg; - - /* - * Specifies the time to wait after asserting pin - * CKE (in microseconds) - */ - uint32_t emc_pin_program_wait; - /* Specifies the extra delay before/after pin RESET/CKE command */ - uint32_t emc_pin_extra_wait; - - uint32_t emc_pin_gpio_enable; - uint32_t emc_pin_gpio; - - /* - * Specifies the extra delay after the first writing - * of EMC_TIMING_CONTROL - */ - uint32_t emc_timing_control_wait; - - /* Timing parameters required for the SDRAM */ - - /* Specifies the value for EMC_RC */ - uint32_t emc_rc; - /* Specifies the value for EMC_RFC */ - uint32_t emc_rfc; - - uint32_t emc_rfc_pb; - uint32_t emc_ref_ctrl2; - - /* Specifies the value for EMC_RFC_SLR */ - uint32_t emc_rfc_slr; - /* Specifies the value for EMC_RAS */ - uint32_t emc_ras; - /* Specifies the value for EMC_RP */ - uint32_t emc_rp; - /* Specifies the value for EMC_R2R */ - uint32_t emc_r2r; - /* Specifies the value for EMC_W2W */ - uint32_t emc_w2w; - /* Specifies the value for EMC_R2W */ - uint32_t emc_r2w; - /* Specifies the value for EMC_W2R */ - uint32_t emc_w2r; - /* Specifies the value for EMC_R2P */ - uint32_t emc_r2p; - /* Specifies the value for EMC_W2P */ - uint32_t emc_w2p; - /* Specifies the value for EMC_RD_RCD */ - - uint32_t emc_tppd; - uint32_t emc_ccdmw; - - uint32_t emc_rd_rcd; - /* Specifies the value for EMC_WR_RCD */ - uint32_t emc_wr_rcd; - /* Specifies the value for EMC_RRD */ - uint32_t emc_rrd; - /* Specifies the value for EMC_REXT */ - uint32_t emc_rext; - /* Specifies the value for EMC_WEXT */ - uint32_t emc_wext; - /* Specifies the value for EMC_WDV */ - uint32_t emc_wdv; - - uint32_t emc_wdv_chk; - uint32_t emc_wsv; - uint32_t emc_wev; - - /* Specifies the value for EMC_WDV_MASK */ - uint32_t emc_wdv_mask; - - uint32_t emc_ws_duration; - uint32_t emc_we_duration; - - /* Specifies the value for EMC_QUSE */ - uint32_t emc_quse; - /* Specifies the value for EMC_QUSE_WIDTH */ - uint32_t emc_quse_width; - /* Specifies the value for EMC_IBDLY */ - uint32_t emc_ibdly; - - uint32_t emc_obdly; - - /* Specifies the value for EMC_EINPUT */ - uint32_t emc_einput; - /* Specifies the value for EMC_EINPUT_DURATION */ - uint32_t emc_einput_duration; - /* Specifies the value for EMC_PUTERM_EXTRA */ - uint32_t emc_puterm_extra; - /* Specifies the value for EMC_PUTERM_WIDTH */ - uint32_t emc_puterm_width; - - uint32_t emc_qrst; - uint32_t emc_qsafe; - uint32_t emc_rdv; - uint32_t emc_rdv_mask; - - uint32_t emc_rdv_early; - uint32_t emc_rdv_early_mask; - - /* Specifies the value for EMC_QPOP */ - uint32_t emc_qpop; - - /* Specifies the value for EMC_REFRESH */ - uint32_t emc_refresh; - /* Specifies the value for EMC_BURST_REFRESH_NUM */ - uint32_t emc_burst_refresh_num; - /* Specifies the value for EMC_PRE_REFRESH_REQ_CNT */ - uint32_t emc_prerefresh_req_cnt; - /* Specifies the value for EMC_PDEX2WR */ - uint32_t emc_pdex2wr; - /* Specifies the value for EMC_PDEX2RD */ - uint32_t emc_pdex2rd; - /* Specifies the value for EMC_PCHG2PDEN */ - uint32_t emc_pchg2pden; - /* Specifies the value for EMC_ACT2PDEN */ - uint32_t emc_act2pden; - /* Specifies the value for EMC_AR2PDEN */ - uint32_t emc_ar2pden; - /* Specifies the value for EMC_RW2PDEN */ - uint32_t emc_rw2pden; - - uint32_t emc_cke2pden; - uint32_t emc_pdex2che; - uint32_t emc_pdex2mrr; - - /* Specifies the value for EMC_TXSR */ - uint32_t emc_txsr; - /* Specifies the value for EMC_TXSRDLL */ - uint32_t emc_txsr_dll; - /* Specifies the value for EMC_TCKE */ - uint32_t emc_tcke; - /* Specifies the value for EMC_TCKESR */ - uint32_t emc_tckesr; - /* Specifies the value for EMC_TPD */ - uint32_t emc_tpd; - /* Specifies the value for EMC_TFAW */ - uint32_t emc_tfaw; - /* Specifies the value for EMC_TRPAB */ - uint32_t emc_trpab; - /* Specifies the value for EMC_TCLKSTABLE */ - uint32_t emc_tclkstable; - /* Specifies the value for EMC_TCLKSTOP */ - uint32_t emc_tclkstop; - /* Specifies the value for EMC_TREFBW */ - uint32_t emc_trefbw; - - /* FBIO configuration values */ - - /* Specifies the value for EMC_FBIO_CFG5 */ - uint32_t emc_fbio_cfg5; - /* Specifies the value for EMC_FBIO_CFG7 */ - uint32_t emc_fbio_cfg7; - uint32_t emc_fbio_cfg8; - - /* Command mapping for CMD brick 0 */ - uint32_t emc_cmd_mapping_cmd0_0; - uint32_t emc_cmd_mapping_cmd0_1; - uint32_t emc_cmd_mapping_cmd0_2; - uint32_t emc_cmd_mapping_cmd1_0; - uint32_t emc_cmd_mapping_cmd1_1; - uint32_t emc_cmd_mapping_cmd1_2; - uint32_t emc_cmd_mapping_cmd2_0; - uint32_t emc_cmd_mapping_cmd2_1; - uint32_t emc_cmd_mapping_cmd2_2; - uint32_t emc_cmd_mapping_cmd3_0; - uint32_t emc_cmd_mapping_cmd3_1; - uint32_t emc_cmd_mapping_cmd3_2; - uint32_t emc_cmd_mapping_byte; - - /* Specifies the value for EMC_FBIO_SPARE */ - uint32_t emc_fbio_spare; - - /* Specifies the value for EMC_CFG_RSV */ - uint32_t emc_cfg_rsv; - - /* MRS command values */ - - /* Specifies the value for EMC_MRS */ - uint32_t emc_mrs; - /* Specifies the MP0 command to initialize mode registers */ - uint32_t emc_emrs; - /* Specifies the MP2 command to initialize mode registers */ - uint32_t emc_emrs2; - /* Specifies the MP3 command to initialize mode registers */ - uint32_t emc_emrs3; - /* Specifies the programming to LPDDR2 Mode Register 1 at cold boot */ - uint32_t emc_mrw1; - /* Specifies the programming to LPDDR2 Mode Register 2 at cold boot */ - uint32_t emc_mrw2; - /* Specifies the programming to LPDDR2 Mode Register 3 at cold boot */ - uint32_t emc_mrw3; - /* Specifies the programming to LPDDR2 Mode Register 11 at cold boot */ - uint32_t emc_mrw4; - - /* Specifies the programming to LPDDR4 Mode Register 3 at cold boot */ - uint32_t emc_mrw6; - /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */ - uint32_t emc_mrw8; - /* Specifies the programming to LPDDR4 Mode Register 11 at cold boot */ - uint32_t emc_mrw9; - /* Specifies the programming to LPDDR4 Mode Register 12 at cold boot */ - uint32_t emc_mrw10; - /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */ - uint32_t emc_mrw12; - /* Specifies the programming to LPDDR4 Mode Register 14 at cold boot */ - uint32_t emc_mrw13; - /* Specifies the programming to LPDDR4 Mode Register 22 at cold boot */ - uint32_t emc_mrw14; - - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at cold boot - */ - uint32_t emc_mrw_extra; - /* - * Specifies the programming to extra LPDDR2 Mode Register - * at warm boot - */ - uint32_t emc_warm_boot_mrw_extra; - /* - * Specify the enable of extra Mode Register programming at - * warm boot - */ - uint32_t emc_warm_boot_extramode_reg_write_enable; - /* - * Specify the enable of extra Mode Register programming at - * cold boot - */ - uint32_t emc_extramode_reg_write_enable; - - /* Specifies the EMC_MRW reset command value */ - uint32_t emc_mrw_reset_command; - /* Specifies the EMC Reset wait time (in microseconds) */ - uint32_t emc_mrw_reset_ninit_wait; - /* Specifies the value for EMC_MRS_WAIT_CNT */ - uint32_t emc_mrs_wait_cnt; - /* Specifies the value for EMC_MRS_WAIT_CNT2 */ - uint32_t emc_mrs_wait_cnt2; - - /* EMC miscellaneous configurations */ - - /* Specifies the value for EMC_CFG */ - uint32_t emc_cfg; - /* Specifies the value for EMC_CFG_2 */ - uint32_t emc_cfg2; - /* Specifies the pipe bypass controls */ - uint32_t emc_cfg_pipe; - - uint32_t emc_cfg_pipe_clk; - uint32_t emc_fdpd_ctrl_cmd_no_ramp; - uint32_t emc_cfg_update; - - /* Specifies the value for EMC_DBG */ - uint32_t emc_dbg; - - uint32_t emc_dbg_write_mux; - - /* Specifies the value for EMC_CMDQ */ - uint32_t emc_cmd_q; - /* Specifies the value for EMC_MC2EMCQ */ - uint32_t emc_mc2emc_q; - /* Specifies the value for EMC_DYN_SELF_REF_CONTROL */ - uint32_t emc_dyn_self_ref_control; - - /* Specifies the value for MEM_INIT_DONE */ - uint32_t ahb_arbitration_xbar_ctrl_meminit_done; - - /* Specifies the value for EMC_CFG_DIG_DLL */ - uint32_t emc_cfg_dig_dll; - uint32_t emc_cfg_dig_dll_1; - - /* Specifies the value for EMC_CFG_DIG_DLL_PERIOD */ - uint32_t emc_cfg_dig_dll_period; - /* Specifies the value of *DEV_SELECTN of various EMC registers */ - uint32_t emc_dev_select; - - /* Specifies the value for EMC_SEL_DPD_CTRL */ - uint32_t emc_sel_dpd_ctrl; - - /* Pads trimmer delays */ - uint32_t emc_fdpd_ctrl_dq; - uint32_t emc_fdpd_ctrl_cmd; - uint32_t emc_pmacro_ib_vref_dq_0; - uint32_t emc_pmacro_ib_vref_dq_1; - uint32_t emc_pmacro_ib_vref_dqs_0; - uint32_t emc_pmacro_ib_vref_dqs_1; - uint32_t emc_pmacro_ib_rxrt; - uint32_t emc_cfg_pipe1; - uint32_t emc_cfg_pipe2; - - /* Specifies the value for EMC_PMACRO_QUSE_DDLL_RANK0_0 */ - uint32_t emc_pmacro_quse_ddll_rank0_0; - uint32_t emc_pmacro_quse_ddll_rank0_1; - uint32_t emc_pmacro_quse_ddll_rank0_2; - uint32_t emc_pmacro_quse_ddll_rank0_3; - uint32_t emc_pmacro_quse_ddll_rank0_4; - uint32_t emc_pmacro_quse_ddll_rank0_5; - uint32_t emc_pmacro_quse_ddll_rank1_0; - uint32_t emc_pmacro_quse_ddll_rank1_1; - uint32_t emc_pmacro_quse_ddll_rank1_2; - uint32_t emc_pmacro_quse_ddll_rank1_3; - uint32_t emc_pmacro_quse_ddll_rank1_4; - uint32_t emc_pmacro_quse_ddll_rank1_5; - - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_0; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_1; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_2; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_3; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_4; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_5; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_0; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_1; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_2; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_3; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_4; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_5; - - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_0; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_1; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_2; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_3; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_4; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_5; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_0; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_1; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_2; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_3; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_4; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_5; - - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_0; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_1; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_2; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_3; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_0; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_1; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_2; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_3; - - uint32_t emc_pmacro_ddll_long_cmd_0; - uint32_t emc_pmacro_ddll_long_cmd_1; - uint32_t emc_pmacro_ddll_long_cmd_2; - uint32_t emc_pmacro_ddll_long_cmd_3; - uint32_t emc_pmacro_ddll_long_cmd_4; - uint32_t emc_pmacro_ddll_short_cmd_0; - uint32_t emc_pmacro_ddll_short_cmd_1; - uint32_t emc_pmacro_ddll_short_cmd_2; - - /* - * Specifies the delay after asserting CKE pin during a WarmBoot0 - * sequence (in microseconds) - */ - uint32_t warm_boot_wait; - - /* Specifies the value for EMC_ODT_WRITE */ - uint32_t emc_odt_write; - - /* Periodic ZQ calibration */ - - /* - * Specifies the value for EMC_ZCAL_INTERVAL - * Value 0 disables ZQ calibration - */ - uint32_t emc_zcal_interval; - /* Specifies the value for EMC_ZCAL_WAIT_CNT */ - uint32_t emc_zcal_wait_cnt; - /* Specifies the value for EMC_ZCAL_MRW_CMD */ - uint32_t emc_zcal_mrw_cmd; - - /* DRAM initialization sequence flow control */ - - /* Specifies the MRS command value for resetting DLL */ - uint32_t emc_mrs_reset_dll; - /* Specifies the command for ZQ initialization of device 0 */ - uint32_t emc_zcal_init_dev0; - /* Specifies the command for ZQ initialization of device 1 */ - uint32_t emc_zcal_init_dev1; - /* - * Specifies the wait time after programming a ZQ initialization - * command (in microseconds) - */ - uint32_t emc_zcal_init_wait; - /* - * Specifies the enable for ZQ calibration at cold boot [bit 0] - * and warm boot [bit 1] - */ - uint32_t emc_zcal_warm_cold_boot_enables; - - /* - * Specifies the MRW command to LPDDR2 for ZQ calibration - * on warmboot - */ - /* Is issued to both devices separately */ - uint32_t emc_mrw_lpddr2zcal_warm_boot; - /* - * Specifies the ZQ command to DDR3 for ZQ calibration on warmboot - * Is issued to both devices separately - */ - uint32_t emc_zqcal_ddr3_warm_boot; - - uint32_t emc_zqcal_lpddr4_warm_boot; - - /* - * Specifies the wait time for ZQ calibration on warmboot - * (in microseconds) - */ - uint32_t emc_zcal_warm_boot_wait; - /* - * Specifies the enable for DRAM Mode Register programming - * at warm boot - */ - uint32_t emc_mrs_warm_boot_enable; - /* - * Specifies the wait time after sending an MRS DLL reset command - * in microseconds) - */ - uint32_t emc_mrs_reset_dll_wait; - /* Specifies the extra MRS command to initialize mode registers */ - uint32_t emc_mrs_extra; - /* Specifies the extra MRS command at warm boot */ - uint32_t emc_warm_boot_mrs_extra; - /* Specifies the EMRS command to enable the DDR2 DLL */ - uint32_t emc_emrs_ddr2_dll_enable; - /* Specifies the MRS command to reset the DDR2 DLL */ - uint32_t emc_mrs_ddr2_dll_reset; - /* Specifies the EMRS command to set OCD calibration */ - uint32_t emc_emrs_ddr2_ocd_calib; - /* - * Specifies the wait between initializing DDR and setting OCD - * calibration (in microseconds) - */ - uint32_t emc_ddr2_wait; - /* Specifies the value for EMC_CLKEN_OVERRIDE */ - uint32_t emc_clken_override; - /* - * Specifies LOG2 of the extra refresh numbers after booting - * Program 0 to disable - */ - uint32_t emc_extra_refresh_num; - /* Specifies the master override for all EMC clocks */ - uint32_t emc_clken_override_allwarm_boot; - /* Specifies the master override for all MC clocks */ - uint32_t mc_clken_override_allwarm_boot; - /* Specifies digital dll period, choosing between 4 to 64 ms */ - uint32_t emc_cfg_dig_dll_period_warm_boot; - - /* Pad controls */ - - /* Specifies the value for PMC_VDDP_SEL */ - uint32_t pmc_vddp_sel; - /* Specifies the wait time after programming PMC_VDDP_SEL */ - uint32_t pmc_vddp_sel_wait; - /* Specifies the value for PMC_DDR_PWR */ - uint32_t pmc_ddr_pwr; - /* Specifies the value for PMC_DDR_CFG */ - uint32_t pmc_ddr_cfg; - /* Specifies the value for PMC_IO_DPD3_REQ */ - uint32_t pmc_io_dpd3_req; - /* Specifies the wait time after programming PMC_IO_DPD3_REQ */ - uint32_t pmc_io_dpd3_req_wait; - - uint32_t pmc_io_dpd4_req_wait; - - /* Specifies the value for PMC_REG_SHORT */ - uint32_t pmc_reg_short; - /* Specifies the value for PMC_NO_IOPOWER */ - uint32_t pmc_no_io_power; - - uint32_t pmc_ddr_ctrl_wait; - uint32_t pmc_ddr_ctrl; - - /* Specifies the value for EMC_ACPD_CONTROL */ - uint32_t emc_acpd_control; - - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE0 */ - uint32_t emc_swizzle_rank0_byte0; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE1 */ - uint32_t emc_swizzle_rank0_byte1; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE2 */ - uint32_t emc_swizzle_rank0_byte2; - /* Specifies the value for EMC_SWIZZLE_RANK0_BYTE3 */ - uint32_t emc_swizzle_rank0_byte3; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE0 */ - uint32_t emc_swizzle_rank1_byte0; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE1 */ - uint32_t emc_swizzle_rank1_byte1; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE2 */ - uint32_t emc_swizzle_rank1_byte2; - /* Specifies the value for EMC_SWIZZLE_RANK1_BYTE3 */ - uint32_t emc_swizzle_rank1_byte3; - - /* Specifies the value for EMC_TXDSRVTTGEN */ - uint32_t emc_txdsrvttgen; - - /* Specifies the value for EMC_DATA_BRLSHFT_0 */ - uint32_t emc_data_brlshft0; - uint32_t emc_data_brlshft1; - - uint32_t emc_dqs_brlshft0; - uint32_t emc_dqs_brlshft1; - - uint32_t emc_cmd_brlshft0; - uint32_t emc_cmd_brlshft1; - uint32_t emc_cmd_brlshft2; - uint32_t emc_cmd_brlshft3; - - uint32_t emc_quse_brlshft0; - uint32_t emc_quse_brlshft1; - uint32_t emc_quse_brlshft2; - uint32_t emc_quse_brlshft3; - - uint32_t emc_dll_cfg0; - uint32_t emc_dll_cfg1; - - uint32_t emc_pmc_scratch1; - uint32_t emc_pmc_scratch2; - uint32_t emc_pmc_scratch3; - - uint32_t emc_pmacro_pad_cfg_ctrl; - - uint32_t emc_pmacro_vttgen_ctrl0; - uint32_t emc_pmacro_vttgen_ctrl1; - uint32_t emc_pmacro_vttgen_ctrl2; - - uint32_t emc_pmacro_brick_ctrl_rfu1; - uint32_t emc_pmacro_cmd_brick_ctrl_fdpd; - uint32_t emc_pmacro_brick_ctrl_rfu2; - uint32_t emc_pmacro_data_brick_ctrl_fdpd; - uint32_t emc_pmacro_bg_bias_ctrl0; - uint32_t emc_pmacro_data_pad_rx_ctrl; - uint32_t emc_pmacro_cmd_pad_rx_ctrl; - uint32_t emc_pmacro_data_rx_term_mode; - uint32_t emc_pmacro_cmd_rx_term_mode; - uint32_t emc_pmacro_data_pad_tx_ctrl; - uint32_t emc_pmacro_common_pad_tx_ctrl; - uint32_t emc_pmacro_cmd_pad_tx_ctrl; - uint32_t emc_cfg3; - - uint32_t emc_pmacro_tx_pwrd0; - uint32_t emc_pmacro_tx_pwrd1; - uint32_t emc_pmacro_tx_pwrd2; - uint32_t emc_pmacro_tx_pwrd3; - uint32_t emc_pmacro_tx_pwrd4; - uint32_t emc_pmacro_tx_pwrd5; - - uint32_t emc_config_sample_delay; - - uint32_t emc_pmacro_brick_mapping0; - uint32_t emc_pmacro_brick_mapping1; - uint32_t emc_pmacro_brick_mapping2; - - uint32_t emc_pmacro_tx_sel_clk_src0; - uint32_t emc_pmacro_tx_sel_clk_src1; - uint32_t emc_pmacro_tx_sel_clk_src2; - uint32_t emc_pmacro_tx_sel_clk_src3; - uint32_t emc_pmacro_tx_sel_clk_src4; - uint32_t emc_pmacro_tx_sel_clk_src5; - - uint32_t emc_pmacro_ddll_bypass; - - uint32_t emc_pmacro_ddll_pwrd0; - uint32_t emc_pmacro_ddll_pwrd1; - uint32_t emc_pmacro_ddll_pwrd2; - - uint32_t emc_pmacro_cmd_ctrl0; - uint32_t emc_pmacro_cmd_ctrl1; - uint32_t emc_pmacro_cmd_ctrl2; - - /* DRAM size information */ - - /* Specifies the value for MC_EMEM_ADR_CFG */ - uint32_t mc_emem_adr_cfg; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV0 */ - uint32_t mc_emem_adr_cfg_dev0; - /* Specifies the value for MC_EMEM_ADR_CFG_DEV1 */ - uint32_t mc_emem_adr_cfg_dev1; - - uint32_t mc_emem_adr_cfg_channel_mask; - - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG0 */ - uint32_t mc_emem_adr_cfg_bank_mask0; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG1 */ - uint32_t mc_emem_adr_cfg_bank_mask1; - /* Specifies the value for MC_EMEM_BANK_SWIZZLE_CFG2 */ - uint32_t mc_emem_adr_cfg_bank_mask2; - - /* - * Specifies the value for MC_EMEM_CFG which holds the external memory - * size (in KBytes) - */ - uint32_t mc_emem_cfg; - - /* MC arbitration configuration */ - - /* Specifies the value for MC_EMEM_ARB_CFG */ - uint32_t mc_emem_arb_cfg; - /* Specifies the value for MC_EMEM_ARB_OUTSTANDING_REQ */ - uint32_t mc_emem_arb_outstanding_req; - - uint32_t emc_emem_arb_refpb_hp_ctrl; - uint32_t emc_emem_arb_refpb_bank_ctrl; - - /* Specifies the value for MC_EMEM_ARB_TIMING_RCD */ - uint32_t mc_emem_arb_timing_rcd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RP */ - uint32_t mc_emem_arb_timing_rp; - /* Specifies the value for MC_EMEM_ARB_TIMING_RC */ - uint32_t mc_emem_arb_timing_rc; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAS */ - uint32_t mc_emem_arb_timing_ras; - /* Specifies the value for MC_EMEM_ARB_TIMING_FAW */ - uint32_t mc_emem_arb_timing_faw; - /* Specifies the value for MC_EMEM_ARB_TIMING_RRD */ - uint32_t mc_emem_arb_timing_rrd; - /* Specifies the value for MC_EMEM_ARB_TIMING_RAP2PRE */ - uint32_t mc_emem_arb_timing_rap2pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_WAP2PRE */ - uint32_t mc_emem_arb_timing_wap2pre; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2R */ - uint32_t mc_emem_arb_timing_r2r; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2W */ - uint32_t mc_emem_arb_timing_w2w; - /* Specifies the value for MC_EMEM_ARB_TIMING_R2W */ - uint32_t mc_emem_arb_timing_r2w; - /* Specifies the value for MC_EMEM_ARB_TIMING_W2R */ - uint32_t mc_emem_arb_timing_w2r; - - uint32_t mc_emem_arb_timing_rfcpb; - - /* Specifies the value for MC_EMEM_ARB_DA_TURNS */ - uint32_t mc_emem_arb_da_turns; - /* Specifies the value for MC_EMEM_ARB_DA_COVERS */ - uint32_t mc_emem_arb_da_covers; - /* Specifies the value for MC_EMEM_ARB_MISC0 */ - uint32_t mc_emem_arb_misc0; - /* Specifies the value for MC_EMEM_ARB_MISC1 */ - uint32_t mc_emem_arb_misc1; - uint32_t mc_emem_arb_misc2; - - /* Specifies the value for MC_EMEM_ARB_RING1_THROTTLE */ - uint32_t mc_emem_arb_ring1_throttle; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE */ - uint32_t mc_emem_arb_override; - /* Specifies the value for MC_EMEM_ARB_OVERRIDE_1 */ - uint32_t mc_emem_arb_override1; - /* Specifies the value for MC_EMEM_ARB_RSV */ - uint32_t mc_emem_arb_rsv; - - uint32_t mc_da_cfg0; - uint32_t mc_emem_arb_timing_ccdmw; - - /* Specifies the value for MC_CLKEN_OVERRIDE */ - uint32_t mc_clken_override; - - /* Specifies the value for MC_STAT_CONTROL */ - uint32_t mc_stat_control; - /* Specifies the value for MC_VIDEO_PROTECT_BOM */ - uint32_t mc_video_protect_bom; - /* Specifies the value for MC_VIDEO_PROTECT_BOM_ADR_HI */ - uint32_t mc_video_protect_bom_adr_hi; - /* Specifies the value for MC_VIDEO_PROTECT_SIZE_MB */ - uint32_t mc_video_protect_size_mb; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE */ - uint32_t mc_video_protect_vpr_override; - /* Specifies the value for MC_VIDEO_PROTECT_VPR_OVERRIDE1 */ - uint32_t mc_video_protect_vpr_override1; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_0 */ - uint32_t mc_video_protect_gpu_override0; - /* Specifies the value for MC_VIDEO_PROTECT_GPU_OVERRIDE_1 */ - uint32_t mc_video_protect_gpu_override1; - /* Specifies the value for MC_SEC_CARVEOUT_BOM */ - uint32_t mc_sec_carveout_bom; - /* Specifies the value for MC_SEC_CARVEOUT_ADR_HI */ - uint32_t mc_sec_carveout_adr_hi; - /* Specifies the value for MC_SEC_CARVEOUT_SIZE_MB */ - uint32_t mc_sec_carveout_size_mb; - /* Specifies the value for MC_VIDEO_PROTECT_REG_CTRL.VIDEO_PROTECT_WRITE_ACCESS */ - uint32_t mc_video_protect_write_access; - /* Specifies the value for MC_SEC_CARVEOUT_REG_CTRL.SEC_CARVEOUT_WRITE_ACCESS */ - uint32_t mc_sec_carveout_protect_write_access; - - uint32_t mc_generalized_carveout1_bom; - uint32_t mc_generalized_carveout1_bom_hi; - uint32_t mc_generalized_carveout1_size_128kb; - uint32_t mc_generalized_carveout1_access0; - uint32_t mc_generalized_carveout1_access1; - uint32_t mc_generalized_carveout1_access2; - uint32_t mc_generalized_carveout1_access3; - uint32_t mc_generalized_carveout1_access4; - uint32_t mc_generalized_carveout1_force_internal_access0; - uint32_t mc_generalized_carveout1_force_internal_access1; - uint32_t mc_generalized_carveout1_force_internal_access2; - uint32_t mc_generalized_carveout1_force_internal_access3; - uint32_t mc_generalized_carveout1_force_internal_access4; - uint32_t mc_generalized_carveout1_cfg0; - - uint32_t mc_generalized_carveout2_bom; - uint32_t mc_generalized_carveout2_bom_hi; - uint32_t mc_generalized_carveout2_size_128kb; - uint32_t mc_generalized_carveout2_access0; - uint32_t mc_generalized_carveout2_access1; - uint32_t mc_generalized_carveout2_access2; - uint32_t mc_generalized_carveout2_access3; - uint32_t mc_generalized_carveout2_access4; - uint32_t mc_generalized_carveout2_force_internal_access0; - uint32_t mc_generalized_carveout2_force_internal_access1; - uint32_t mc_generalized_carveout2_force_internal_access2; - uint32_t mc_generalized_carveout2_force_internal_access3; - uint32_t mc_generalized_carveout2_force_internal_access4; - uint32_t mc_generalized_carveout2_cfg0; - - uint32_t mc_generalized_carveout3_bom; - uint32_t mc_generalized_carveout3_bom_hi; - uint32_t mc_generalized_carveout3_size_128kb; - uint32_t mc_generalized_carveout3_access0; - uint32_t mc_generalized_carveout3_access1; - uint32_t mc_generalized_carveout3_access2; - uint32_t mc_generalized_carveout3_access3; - uint32_t mc_generalized_carveout3_access4; - uint32_t mc_generalized_carveout3_force_internal_access0; - uint32_t mc_generalized_carveout3_force_internal_access1; - uint32_t mc_generalized_carveout3_force_internal_access2; - uint32_t mc_generalized_carveout3_force_internal_access3; - uint32_t mc_generalized_carveout3_force_internal_access4; - uint32_t mc_generalized_carveout3_cfg0; - - uint32_t mc_generalized_carveout4_bom; - uint32_t mc_generalized_carveout4_bom_hi; - uint32_t mc_generalized_carveout4_size_128kb; - uint32_t mc_generalized_carveout4_access0; - uint32_t mc_generalized_carveout4_access1; - uint32_t mc_generalized_carveout4_access2; - uint32_t mc_generalized_carveout4_access3; - uint32_t mc_generalized_carveout4_access4; - uint32_t mc_generalized_carveout4_force_internal_access0; - uint32_t mc_generalized_carveout4_force_internal_access1; - uint32_t mc_generalized_carveout4_force_internal_access2; - uint32_t mc_generalized_carveout4_force_internal_access3; - uint32_t mc_generalized_carveout4_force_internal_access4; - uint32_t mc_generalized_carveout4_cfg0; - - uint32_t mc_generalized_carveout5_bom; - uint32_t mc_generalized_carveout5_bom_hi; - uint32_t mc_generalized_carveout5_size_128kb; - uint32_t mc_generalized_carveout5_access0; - uint32_t mc_generalized_carveout5_access1; - uint32_t mc_generalized_carveout5_access2; - uint32_t mc_generalized_carveout5_access3; - uint32_t mc_generalized_carveout5_access4; - uint32_t mc_generalized_carveout5_force_internal_access0; - uint32_t mc_generalized_carveout5_force_internal_access1; - uint32_t mc_generalized_carveout5_force_internal_access2; - uint32_t mc_generalized_carveout5_force_internal_access3; - uint32_t mc_generalized_carveout5_force_internal_access4; - uint32_t mc_generalized_carveout5_cfg0; - - /* Specifies enable for CA training */ - uint32_t emc_ca_training_enable; - /* Set if bit 6 select is greater than bit 7 select; uses aremc.spec packet SWIZZLE_BIT6_GT_BIT7 */ - uint32_t swizzle_rank_byte_encode; - /* Specifies enable and offset for patched boot rom write */ - uint32_t boot_rom_patch_control; - /* Specifies data for patched boot rom write */ - uint32_t boot_rom_patch_data; - - /* Specifies the value for MC_MTS_CARVEOUT_BOM */ - uint32_t mc_mts_carveout_bom; - /* Specifies the value for MC_MTS_CARVEOUT_ADR_HI */ - uint32_t mc_mts_carveout_adr_hi; - /* Specifies the value for MC_MTS_CARVEOUT_SIZE_MB */ - uint32_t mc_mts_carveout_size_mb; - /* Specifies the value for MC_MTS_CARVEOUT_REG_CTRL */ - uint32_t mc_mts_carveout_reg_ctrl; - /* End of generated code by warmboot_code_gen */ - -} nvboot_sdram_params; - -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - * See file CREDITS for list of people who contributed to this - * project. - */ - -/** - * Defines the number of 32-bit words in the customer_data area of the BCT. - */ -#define NVBOOT_BCT_CUSTOMER_DATA_WORDS 49 - -/** - * Defines the number of bytes in the customer_data area of the BCT. - */ -#define NVBOOT_BCT_CUSTOMER_DATA_SIZE \ - (NVBOOT_BCT_CUSTOMER_DATA_WORDS * 4) - -/** - * Defines the number of bytes in the reserved area of the BCT. - */ -#define NVBOOT_BCT_RESERVED_SIZE 18 - -/** - * Defines the maximum number of bootloader descriptions in the BCT. - */ -#define NVBOOT_MAX_BOOTLOADERS 4 - -/** - * Defines the maximum number of device parameter sets in the BCT. - * The value must be equal to (1 << # of device straps) - */ -#define NVBOOT_BCT_MAX_PARAM_SETS 1 - -/** - * Defines the maximum number of SDRAM parameter sets in the BCT. - * The value must be equal to (1 << # of SDRAM straps) - */ -#define NVBOOT_BCT_MAX_SDRAM_SETS 4 - -/** - * Defines the number of entries (bits) in the bad block table. - * The consequences of changing its value are as follows. Using P as the - * # of physical blocks in the boot loader and B as the value of this - * constant: - * B > P: There will be unused storage in the bad block table. - * B < P: The virtual block size will be greater than the physical block - * size, so the granularity of the bad block table will be less than - * one bit per physical block. - * - * 4096 bits is enough to represent an 8MiB partition of 2KiB blocks with one - * bit per block (1 virtual block = 1 physical block). This occupies 512 bytes - * of storage. - */ -#define NVBOOT_BAD_BLOCK_TABLE_SIZE 4096 - -/** - * Defines the amount of padding needed to pad the bad block table to a - * multiple of AES block size. - */ -#define NVBOOT_BAD_BLOCK_TABLE_PADDING 10 - -/** - * Defines the maximum number of blocks to search for BCTs. - * - * This value covers the initial block and a set of journal blocks. - * - * Ideally, this number will span several erase units for reliable updates - * and tolerance for blocks to become bad with use. Safe updates require - * a minimum of 2 erase units in which BCTs can appear. - * - * To ensure that the BCT search spans a sufficient range of configurations, - * the search block count has been set to 64. This allows for redundancy with - * a wide range of parts and provides room for greater problems in this - * region of the device. - */ -#define NVBOOT_MAX_BCT_SEARCH_BLOCKS 64 - -#define ARSE_RSA_MAX_MODULUS_SIZE 2048 - -/** - * Defines the RSA modulus length in bits and bytes used for PKC secure boot. - */ -enum {NVBOOT_SE_RSA_MODULUS_LENGTH_BITS = ARSE_RSA_MAX_MODULUS_SIZE}; - -/* - * Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words) - */ -enum {NVBOOT_CMAC_AES_HASH_LENGTH = 4}; - -/** - * Defines the storage for a hash value (128 bits). - */ -typedef struct nvboot_hash_rec { - uint32_t hash[NVBOOT_CMAC_AES_HASH_LENGTH]; -} nvboot_hash; - -/* - * Defines the storage for the RSA public key's modulus - * in the BCT - */ -typedef struct nvboot_rsa_key_modulus_rec { - /* The modulus size is 2048-bits. */ - uint32_t modulus[NVBOOT_SE_RSA_MODULUS_LENGTH_BITS / 8 / 4]; -} nvboot_rsa_key_modulus; - -typedef struct nvboot_rsa_pss_sig_rec { - /* - * The RSA-PSS signature length is equal to the - * length in octets of the RSA modulus. - * In our case, it's 2048-bits. - */ - uint32_t signature[NVBOOT_SE_RSA_MODULUS_LENGTH_BITS / 8 / 4]; -} nvboot_rsa_pss_sig; - -typedef struct nvboot_object_signature_rec { - /* - * Specifies the AES-CMAC signature for the rest of the BCT structure - * if symmetric key encryption secure boot scheme is used. - */ - nvboot_hash crypto_hash; - - /* - * Specifies the RSASSA-PSS signature for the rest of the BCT structure - * if public key cryptography secure boot scheme is used. - */ - nvboot_rsa_pss_sig rsa_pss_sig; -} nvboot_object_signature; - -typedef struct nvboot_ecid_rec { - uint32_t ecid_0; - uint32_t ecid_1; - uint32_t ecid_2; - uint32_t ecid_3; -} nvboot_ecid; - -/* Defines various data widths supported. */ -typedef enum { - /** - * Specifies a 1 bit interface to eMMC. - * Note that 1-bit data width is only for the driver's internal use. - * Fuses doesn't provide option to select 1-bit data width. - * The driver selects 1-bit internally based on need. - * It is used for reading Extended CSD and when the power class - * requirements of a card for 4-bit or 8-bit transfers are not - * supported by the target board. - */ - nvboot_sdmmc_data_width_1bit = 0, - - /* Specifies a 4 bit interface to eMMC. */ - nvboot_sdmmc_data_width_4bit = 1, - - /* Specifies a 8 bit interface to eMMC. */ - nvboot_sdmmc_data_width_8bit = 2, - /* Specifies a 4 bit Ddr interface to eMMC. */ - nvboot_sdmmc_data_width_ddr_4bit = 5, - /* Specifies a 8 bit Ddr interface to eMMC. */ - nvboot_sdmmc_data_width_ddr_8bit = 6, - - nvboot_sdmmc_data_width_num, - nvboot_sdmmc_data_width_force32 = 0x7FFFFFFF -} nvboot_sdmmc_data_width; - -/* Defines the parameters that can be changed after BCT is read. */ -typedef struct nvboot_sdmmc_params_rec { - /** - * Specifies the clock divider for the SDMMC controller's clock source, - * which is PLLP running at 216MHz. If it is set to 9, then the SDMMC - * controller runs at 216/9 = 24MHz. - */ - uint8_t clock_divider; - - /* Specifies the data bus width. Supported data widths are 4/8 bits. */ - nvboot_sdmmc_data_width data_width; - - /** - * Max Power class supported by the target board. - * The driver determines the best data width and clock frequency - * supported within the power class range (0 to Max) if the selected - * data width cannot be used at the chosen clock frequency. - */ - uint8_t max_power_class_supported; - - /* Specifies the max page size supported by driver */ - uint8_t multi_page_support; -} nvboot_sdmmc_params; - -typedef enum { - /* Specifies SPI clock source to be PLLP. */ - nvboot_spi_clock_source_pllp_out0 = 0, - - /* Specifies SPI clock source to be ClockM. */ - nvboot_spi_clock_source_clockm = 6, - - nvboot_spi_clock_source_num, - nvboot_spi_clock_source_force32 = 0x7FFFFFF -} nvboot_spi_clock_source; - -/** - * Defines the parameters SPI FLASH devices. - */ -typedef struct nvboot_spiflash_params_rec { - /** - * Specifies the clock source to use. - */ - uint32_t clock_source; - - /** - * Specifes the clock divider to use. - * The value is a 7-bit value based on an input clock of 432Mhz. - * Divider = (432+ DesiredFrequency-1)/DesiredFrequency; - * Typical values: - * NORMAL_READ at 20MHz: 22 - * FAST_READ at 33MHz: 14 - * FAST_READ at 40MHz: 11 - * FAST_READ at 50MHz: 9 - */ - uint8_t clock_divider; - - /** - * Specifies the type of command for read operations. - * NV_FALSE specifies a NORMAL_READ Command - * NV_TRUE specifies a FAST_READ Command - */ - uint8_t read_command_type_fast; - - /* 0 = 2k page size, 1 = 16K page size */ - uint8_t page_size_2k_or_16k; -} nvboot_spiflash_params; - -/** -* Defines the union of the parameters required by each device. -*/ -typedef union { - uint8_t size[64]; - /* Specifies optimized parameters for eMMC and eSD */ - nvboot_sdmmc_params sdmmc_params; - /* Specifies optimized parameters for SPI NOR */ - nvboot_spiflash_params spiflash_params; -} nvboot_dev_params; - -/** - * Identifies the types of devices from which the system booted. - * Used to identify primary and secondary boot devices. - * @note These no longer match the fuse API device values (for - * backward compatibility with AP15). - */ -typedef enum { - /* Specifies a default (unset) value. */ - nvboot_dev_type_none = 0, - - /* Specifies SPI NOR. */ - nvboot_dev_type_spi = 3, - - /* Specifies SDMMC (either eMMC or eSD). */ - nvboot_dev_type_sdmmc = 4, - - nvboot_dev_type_max, - - /* Ignore -- Forces compilers to make 32-bit enums. */ - nvboot_dev_type_force32 = 0x7FFFFFFF -} nvboot_dev_type; - -/** - * Stores information needed to locate and verify a boot loader. - * - * There is one \c nv_bootloader_info structure for each copy of a BL stored on - * the device. - */ -typedef struct nv_bootloader_info_rec { - uint32_t version; - uint32_t start_blk; - uint32_t start_page; - uint32_t length; - uint32_t load_addr; - uint32_t entry_point; - uint32_t attribute; - - /* Specifies the AES-CMAC MAC or RSASSA-PSS signature of the BL. */ - nvboot_object_signature signature; -} nv_bootloader_info; - -/** - * Defines the bad block table structure stored in the BCT. - */ -typedef struct nvboot_badblock_table_rec { - uint32_t entries_used; - uint8_t virtual_blk_size_log2; - uint8_t block_size_log2; - uint8_t bad_blks[NVBOOT_BAD_BLOCK_TABLE_SIZE / 8]; - /* - * Add a reserved field as padding to make the bad block table structure - * a multiple of 16 bytes (AES block size). - */ - uint8_t reserved[NVBOOT_BAD_BLOCK_TABLE_PADDING]; -} nvboot_badblock_table; - -enum {NVBOOT_SE_AES_KEY256_LENGTH_BYTES = 32}; -/** - * Contains the information needed to load BLs from the secondary boot device. - * - * - Supplying NumParamSets = 0 indicates not to load any of them. - * - Supplying NumDramSets = 0 indicates not to load any of them. - * - The \c random_aes_blk member exists to increase the difficulty of - * key attacks based on knowledge of this structure. - */ -typedef struct nvboot_config_table_rec { - nvboot_badblock_table badblock_table; - nvboot_rsa_key_modulus key; - nvboot_object_signature signature; /* 310 */ - - /** - * Specifies the Factory Secure Provisioning number to be used. - * Only valid and consumed by BR in NvProduction Mode. - * Because the key number is specified in the BCT, BR needs to read in - * the BCT first to know the key number to validate against. - * This field must match SecProvisioningKeyNum_Secure to be a valid - * BCT for use in the Factory Secure Provisioning mode. - */ - uint32_t secure_provisioning_key_number_insecure; /* 420 */ - - /** - * A 256-bit AES key encrypted by a reserved 256-bit AES "key wrap" - * key. Only used in Factory Secure Provisioning mode. - */ - uint8_t aes_key[NVBOOT_SE_AES_KEY256_LENGTH_BYTES]; /* 424 */ - - uint8_t customer_data[NVBOOT_BCT_CUSTOMER_DATA_SIZE]; /* 444 */ - uint32_t odm_data; /* 508 */ - uint32_t reserved1; - - /* START OF SIGNED SECTION OF THE BCT */ - nvboot_hash random_aes_blk; /* 0x510 */ - nvboot_ecid unique_chip_id; /* 0x520 */ - uint32_t boot_data_version; /* 0x530 */ - uint32_t block_size_log2; - uint32_t page_size_log2; - uint32_t partition_size; - uint32_t num_param_sets; - nvboot_dev_type dev_type[NVBOOT_BCT_MAX_PARAM_SETS]; - nvboot_dev_params dev_params[NVBOOT_BCT_MAX_PARAM_SETS]; - uint32_t num_sdram_sets; /* 0x588 */ - nvboot_sdram_params sdram_params[NVBOOT_BCT_MAX_SDRAM_SETS]; /* 0x58c */ - - uint32_t bootloader_used; /* 0x232c */ - nv_bootloader_info bootloader[NVBOOT_MAX_BOOTLOADERS]; /* 0x2330 */ - - uint8_t enable_fail_back; - - /** - * Specifies which debug features to be enabled or disabled. - * Maps directly to APBDEV_PMC_DEBUG_AUTHENTICATION_0. Must specify - * the ECID of the chip in UniqueChipId on production systems. - * 0x1 = ENABLED. 0x0 = DISABLED. - * DBGEN - bit 5 - * NIDEN - bit 4 - * SPIDEN - bit 3 - * SPNIDEN - bit 2 - * DEVICEEN - bit 1 - * JTAG_ENABLE - bit 0 - */ - uint32_t secure_debug_control; - - /** - * Specifies the factory secure provisioning key number to use. - * There are 64 such 256-bit AES keys. - * - * Specifying a key number of 0 will cause Boot ROM to default to - * NvProduction mode boot (i.e. Factory Secure Provisioning mode - * disabled). - * - * Specifying a key number of 1 to 15 is invalid. These are - * anti-cloning keys numbers and BR will ignore these values. - * BR will ignore this field if the secure_provision_index fuse is - * burned. - * - * Key number 64 (index [63]) is reserved for NVIDIA debug use. - * So, this field will only be used if the chip is in NvProductionMode, - * and when secure_provision_index is zero, and when - * SecProvisioningKeyNum is not 0 to 15. - * - * This key number must match SecProvisioningKeyNum_Insecure. - */ - uint32_t secure_provisioning_key_number_secure; - - uint8_t reserved[NVBOOT_BCT_RESERVED_SIZE]; -} nvboot_config_table; - -#endif diff --git a/fusee/fusee-secondary/src/btn.c b/fusee/fusee-secondary/src/btn.c deleted file mode 100644 index fb410c1b2..000000000 --- a/fusee/fusee-secondary/src/btn.c +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "btn.h" -#include "i2c.h" -#include "gpio.h" -#include "timers.h" - -uint32_t btn_read() -{ - uint32_t res = 0; - - if (!gpio_read(GPIO_BUTTON_VOL_DOWN)) - res |= BTN_VOL_DOWN; - - if (!gpio_read(GPIO_BUTTON_VOL_UP)) - res |= BTN_VOL_UP; - - uint32_t val = 0; - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, 0x15, &val, 1)) - { - if (val & 0x4) - res |= BTN_POWER; - } - - return res; -} - -uint32_t btn_wait() -{ - uint32_t res = 0, btn = btn_read(); - int pwr = 0; - - if (btn & BTN_POWER) - { - pwr = 1; - btn &= ~BTN_POWER; - } - - do - { - res = btn_read(); - - if (!(res & BTN_POWER) && pwr) - pwr = 0; - else if (pwr) - res &= ~BTN_POWER; - } while (btn == res); - - return res; -} - -uint32_t btn_wait_timeout(uint32_t time_ms, uint32_t mask) -{ - uint32_t timeout = get_time_ms() + time_ms; - uint32_t res = btn_read() & mask; - - do - { - if (!(res & mask)) - res = btn_read() & mask; - } while (get_time_ms() < timeout); - - return res; -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/btn.h b/fusee/fusee-secondary/src/btn.h deleted file mode 100644 index a9a018eae..000000000 --- a/fusee/fusee-secondary/src/btn.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_BTN_H_ -#define FUSEE_BTN_H_ - -#define BTN_POWER 0x1 -#define BTN_VOL_DOWN 0x2 -#define BTN_VOL_UP 0x4 - -uint32_t btn_read(); -uint32_t btn_wait(); -uint32_t btn_wait_timeout(uint32_t time_ms, uint32_t mask); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/car.c b/fusee/fusee-secondary/src/car.c deleted file mode 100644 index 30c2d86aa..000000000 --- a/fusee/fusee-secondary/src/car.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "car.h" -#include "timers.h" -#include "utils.h" - -static inline uint32_t get_clk_source_reg(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0x178; - case CARDEVICE_UARTB: return 0x17C; - case CARDEVICE_UARTC: return 0x1A0; - case CARDEVICE_I2C1: return 0x124; - case CARDEVICE_I2C5: return 0x128; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0x42C; - case CARDEVICE_HOST1X: return 0x180; - case CARDEVICE_TSEC: return 0x1F4; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 0x410; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 0x1D4; - case CARDEVICE_MSELECT: return 0x3B4; - case CARDEVICE_ACTMON: return 0x3E8; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static inline uint32_t get_clk_source_val(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0; - case CARDEVICE_UARTB: return 0; - case CARDEVICE_UARTC: return 0; - case CARDEVICE_I2C1: return 6; - case CARDEVICE_I2C5: return 6; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0; - case CARDEVICE_HOST1X: return 4; - case CARDEVICE_TSEC: return 0; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 0; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 0; - case CARDEVICE_MSELECT: return 0; - case CARDEVICE_ACTMON: return 6; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static inline uint32_t get_clk_source_div(CarDevice dev) { - switch (dev) { - case CARDEVICE_UARTA: return 0; - case CARDEVICE_UARTB: return 0; - case CARDEVICE_UARTC: return 0; - case CARDEVICE_I2C1: return 0; - case CARDEVICE_I2C5: return 0; - case CARDEVICE_TZRAM: return 0; - case CARDEVICE_SE: return 0; - case CARDEVICE_HOST1X: return 3; - case CARDEVICE_TSEC: return 2; - case CARDEVICE_SOR_SAFE: return 0; - case CARDEVICE_SOR0: return 0; - case CARDEVICE_SOR1: return 2; - case CARDEVICE_KFUSE: return 0; - case CARDEVICE_CL_DVFS: return 0; - case CARDEVICE_CORESIGHT: return 4; - case CARDEVICE_MSELECT: return 6; - case CARDEVICE_ACTMON: return 0; - case CARDEVICE_BPMP: return 0; - default: generic_panic(); - } -} - -static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298}; -static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4}; - -void clk_enable(CarDevice dev) { - uint32_t clk_source_reg; - if ((clk_source_reg = get_clk_source_reg(dev))) { - MAKE_CAR_REG(clk_source_reg) = (get_clk_source_val(dev) << 29) | get_clk_source_div(dev); - } - MAKE_CAR_REG(g_clk_reg_offsets[dev >> 5]) |= BIT(dev & 0x1F); -} - -void clk_disable(CarDevice dev) { - MAKE_CAR_REG(g_clk_reg_offsets[dev >> 5]) &= ~(BIT(dev & 0x1F)); -} - -void rst_enable(CarDevice dev) { - MAKE_CAR_REG(g_rst_reg_offsets[dev >> 5]) |= BIT(dev & 0x1F); -} - -void rst_disable(CarDevice dev) { - MAKE_CAR_REG(g_rst_reg_offsets[dev >> 5]) &= ~(BIT(dev & 0x1F)); -} - -void clkrst_enable(CarDevice dev) { - clk_enable(dev); - rst_disable(dev); -} - -void clkrst_disable(CarDevice dev) { - rst_enable(dev); - clk_disable(dev); -} - -void clkrst_reboot(CarDevice dev) { - clkrst_disable(dev); - if (dev == CARDEVICE_KFUSE) { - /* Workaround for KFUSE clock. */ - clk_enable(dev); - udelay(100); - rst_disable(dev); - udelay(200); - } else { - clkrst_enable(dev); - } -} - -void clkrst_enable_fuse_regs(bool enable) { - volatile tegra_car_t *car = car_get_regs(); - car->misc_clk_enb = ((car->misc_clk_enb & 0xEFFFFFFF) | ((enable & 1) << 28)); -} diff --git a/fusee/fusee-secondary/src/car.h b/fusee/fusee-secondary/src/car.h deleted file mode 100644 index 99bb6e270..000000000 --- a/fusee/fusee-secondary/src/car.h +++ /dev/null @@ -1,519 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CAR_H -#define FUSEE_CAR_H - -#include -#include - -#define CAR_BASE 0x60006000 -#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n) - -#define CLK_L_SDMMC1 (1 << 14) -#define CLK_L_SDMMC2 (1 << 9) -#define CLK_U_SDMMC3 (1 << 5) -#define CLK_L_SDMMC4 (1 << 15) - -#define CLK_SOURCE_MASK (0b111 << 29) -#define CLK_SOURCE_FIRST (0b000 << 29) -#define CLK_DIVIDER_MASK (0xff << 0) -#define CLK_DIVIDER_UNITY (0x00 << 0) - -#define NUM_CAR_BANKS 7 - -/* Clock and reset devices. */ -typedef enum { - CARDEVICE_BPMP = ((0 << 5) | 0x1), - CARDEVICE_UARTA = ((0 << 5) | 0x6), - CARDEVICE_UARTB = ((0 << 5) | 0x7), - CARDEVICE_I2C1 = ((0 << 5) | 0xC), - CARDEVICE_USBD = ((0 << 5) | 0x16), - CARDEVICE_HOST1X = ((0 << 5) | 0x1C), - CARDEVICE_AHBDMA = ((1 << 5) | 0x1), - CARDEVICE_APBDMA = ((1 << 5) | 0x2), - CARDEVICE_KFUSE = ((1 << 5) | 0x8), - CARDEVICE_I2C5 = ((1 << 5) | 0xF), - CARDEVICE_UARTC = ((1 << 5) | 0x17), - CARDEVICE_USB2 = ((1 << 5) | 0x1A), - CARDEVICE_CORESIGHT = ((2 << 5) | 0x9), - CARDEVICE_TSEC = ((2 << 5) | 0x13), - CARDEVICE_MSELECT = ((3 << 5) | 0x3), - CARDEVICE_ACTMON = ((3 << 5) | 0x17), - CARDEVICE_TZRAM = ((3 << 5) | 0x1E), - CARDEVICE_SE = ((3 << 5) | 0x1F), - CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B), - CARDEVICE_SOR0 = ((5 << 5) | 0x16), - CARDEVICE_SOR1 = ((5 << 5) | 0x17), - CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E), -} CarDevice; - -/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ -typedef struct { - uint32_t rst_src; /* _RST_SOURCE_0, 0x00 */ - - /* _RST_DEVICES_L/H/U_0 0x4-0xc */ - uint32_t rst_dev_l; - uint32_t rst_dev_h; - uint32_t rst_dev_u; - - /* _CLK_OUT_ENB_L/H/U_0 0x10-0x18 */ - uint32_t clk_out_enb_l; - uint32_t clk_out_enb_h; - uint32_t clk_out_enb_u; - - uint32_t _0x1C; - uint32_t cclk_brst_pol; /* _CCLK_BURST_POLICY_0, 0x20 */ - uint32_t super_cclk_div; /* _SUPER_CCLK_DIVIDER_0, 0x24 */ - uint32_t sclk_brst_pol; /* _SCLK_BURST_POLICY_0, 0x28 */ - uint32_t super_sclk_div; /* _SUPER_SCLK_DIVIDER_0, 0x2c */ - uint32_t clk_sys_rate; /* _CLK_SYSTEM_RATE_0, 0x30 */ - uint32_t prog_dly_clk; /* _PROG_DLY_CLK_0, 0x34 */ - uint32_t aud_sync_clk_rate; /* _AUDIO_SYNC_CLK_RATE_0, 0x38 */ - uint32_t _0x3C; - uint32_t cop_clk_skip_plcy; /* _COP_CLK_SKIP_POLICY_0, 0x40 */ - uint32_t clk_mask_arm; /* _CLK_MASK_ARM_0, 0x44 */ - uint32_t misc_clk_enb; /* _MISC_CLK_ENB_0, 0x48 */ - uint32_t clk_cpu_cmplx; /* _CLK_CPU_CMPLX_0, 0x4c */ - uint32_t osc_ctrl; /* _OSC_CTRL_0, 0x50 */ - uint32_t pll_lfsr; /* _PLL_LFSR_0, 0x54 */ - uint32_t osc_freq_det; /* _OSC_FREQ_DET_0, 0x58 */ - uint32_t osc_freq_det_stat; /* _OSC_FREQ_DET_STATUS_0, 0x5c */ - uint32_t _0x60[2]; - uint32_t plle_ss_cntl; /* _PLLE_SS_CNTL_0, 0x68 */ - uint32_t plle_misc1; /* _PLLE_MISC1_0, 0x6c */ - uint32_t _0x70[4]; - - /* PLLC 0x80-0x8c */ - uint32_t pllc_base; - uint32_t pllc_out; - uint32_t pllc_misc0; - uint32_t pllc_misc1; - - /* PLLM 0x90-0x9c */ - uint32_t pllm_base; - uint32_t pllm_out; - uint32_t pllm_misc1; - uint32_t pllm_misc2; - - /* PLLP 0xa0-0xac */ - uint32_t pllp_base; - uint32_t pllp_outa; - uint32_t pllp_outb; - uint32_t pllp_misc; - - /* PLLA 0xb0-0xbc */ - uint32_t plla_base; - uint32_t plla_out; - uint32_t plla_misc0; - uint32_t plla_misc1; - - /* PLLU 0xc0-0xcc */ - uint32_t pllu_base; - uint32_t pllu_out; - uint32_t pllu_misc1; - uint32_t pllu_misc2; - - /* PLLD 0xd0-0xdc */ - uint32_t plld_base; - uint32_t plld_out; - uint32_t plld_misc1; - uint32_t plld_misc2; - - /* PLLX 0xe0-0xe4 */ - uint32_t pllx_base; - uint32_t pllx_misc; - - /* PLLE 0xe8-0xf4 */ - uint32_t plle_base; - uint32_t plle_misc; - uint32_t plle_ss_cntl1; - uint32_t plle_ss_cntl2; - - uint32_t lvl2_clk_gate_ovra; /* _LVL2_CLK_GATE_OVRA_0, 0xf8 */ - uint32_t lvl2_clk_gate_ovrb; /* _LVL2_CLK_GATE_OVRB_0, 0xfc */ - - uint32_t clk_source_i2s2; /* _CLK_SOURCE_I2S2_0, 0x100 */ - uint32_t clk_source_i2s3; /* _CLK_SOURCE_I2S3_0, 0x104 */ - uint32_t clk_source_spdif_out; /* _CLK_SOURCE_SPDIF_OUT_0, 0x108 */ - uint32_t clk_source_spdif_in; /* _CLK_SOURCE_SPDIF_IN_0, 0x10c */ - uint32_t clk_source_pwm; /* _CLK_SOURCE_PWM_0, 0x110 */ - uint32_t _0x114; - uint32_t clk_source_spi2; /* _CLK_SOURCE_SPI2_0, 0x118 */ - uint32_t clk_source_spi3; /* _CLK_SOURCE_SPI3_0, 0x11c */ - uint32_t _0x120; - uint32_t clk_source_i2c1; /* _CLK_SOURCE_I2C1_0, 0x124 */ - uint32_t clk_source_i2c5; /* _CLK_SOURCE_I2C5_0, 0x128 */ - uint32_t _0x12c[2]; - uint32_t clk_source_spi1; /* _CLK_SOURCE_SPI1_0, 0x134 */ - uint32_t clk_source_disp1; /* _CLK_SOURCE_DISP1_0, 0x138 */ - uint32_t clk_source_disp2; /* _CLK_SOURCE_DISP2_0, 0x13c */ - uint32_t _0x140; - uint32_t clk_source_isp; /* _CLK_SOURCE_ISP_0, 0x144 */ - uint32_t clk_source_vi; /* _CLK_SOURCE_VI_0, 0x148 */ - uint32_t _0x14c; - uint32_t clk_source_sdmmc1; /* _CLK_SOURCE_SDMMC1_0, 0x150 */ - uint32_t clk_source_sdmmc2; /* _CLK_SOURCE_SDMMC2_0, 0x154 */ - uint32_t _0x158[3]; - uint32_t clk_source_sdmmc4; /* _CLK_SOURCE_SDMMC4_0, 0x164 */ - uint32_t _0x168[4]; - uint32_t clk_source_uarta; /* _CLK_SOURCE_UARTA_0, 0x178 */ - uint32_t clk_source_uartb; /* _CLK_SOURCE_UARTB_0, 0x17c */ - uint32_t clk_source_host1x; /* _CLK_SOURCE_HOST1X_0, 0x180 */ - uint32_t _0x184[5]; - uint32_t clk_source_i2c2; /* _CLK_SOURCE_I2C2_0, 0x198 */ - uint32_t clk_source_emc; /* _CLK_SOURCE_EMC_0, 0x19c */ - uint32_t clk_source_uartc; /* _CLK_SOURCE_UARTC_0, 0x1a0 */ - uint32_t _0x1a4; - uint32_t clk_source_vi_sensor; /* _CLK_SOURCE_VI_SENSOR_0, 0x1a8 */ - uint32_t _0x1ac[2]; - uint32_t clk_source_spi4; /* _CLK_SOURCE_SPI4_0, 0x1b4 */ - uint32_t clk_source_i2c3; /* _CLK_SOURCE_I2C3_0, 0x1b8 */ - uint32_t clk_source_sdmmc3; /* _CLK_SOURCE_SDMMC3_0, 0x1bc */ - uint32_t clk_source_uartd; /* _CLK_SOURCE_UARTD_0, 0x1c0 */ - uint32_t _0x1c4[2]; - uint32_t clk_source_owr; /* _CLK_SOURCE_OWR_0, 0x1cc */ - uint32_t _0x1d0; - uint32_t clk_source_csite; /* _CLK_SOURCE_CSITE_0, 0x1d4 */ - uint32_t clk_source_i2s1; /* _CLK_SOURCE_I2S1_0, 0x1d8 */ - uint32_t clk_source_dtv; /* _CLK_SOURCE_DTV_0, 0x1dc */ - uint32_t _0x1e0[5]; - uint32_t clk_source_tsec; /* _CLK_SOURCE_TSEC_0, 0x1f4 */ - uint32_t _0x1f8; - - uint32_t clk_spare2; /* _CLK_SPARE2_0, 0x1fc */ - uint32_t _0x200[32]; - - uint32_t clk_out_enb_x; /* _CLK_OUT_ENB_X_0, 0x280 */ - uint32_t clk_enb_x_set; /* _CLK_ENB_X_SET_0, 0x284 */ - uint32_t clk_enb_x_clr; /* _CLK_ENB_X_CLR_0, 0x288 */ - - uint32_t rst_devices_x; /* _RST_DEVICES_X_0, 0x28c */ - uint32_t rst_dev_x_set; /* _RST_DEV_X_SET_0, 0x290 */ - uint32_t rst_dev_x_clr; /* _RST_DEV_X_CLR_0, 0x294 */ - - uint32_t clk_out_enb_y; /* _CLK_OUT_ENB_Y_0, 0x298 */ - uint32_t clk_enb_y_set; /* _CLK_ENB_Y_SET_0, 0x29c */ - uint32_t clk_enb_y_clr; /* _CLK_ENB_Y_CLR_0, 0x2a0 */ - - uint32_t rst_devices_y; /* _RST_DEVICES_Y_0, 0x2a4 */ - uint32_t rst_dev_y_set; /* _RST_DEV_Y_SET_0, 0x2a8 */ - uint32_t rst_dev_y_clr; /* _RST_DEV_Y_CLR_0, 0x2ac */ - - uint32_t _0x2b0[17]; - uint32_t dfll_base; /* _DFLL_BASE_0, 0x2f4 */ - uint32_t _0x2f8[2]; - - /* _RST_DEV_L/H/U_SET_0 0x300-0x314 */ - uint32_t rst_dev_l_set; - uint32_t rst_dev_l_clr; - uint32_t rst_dev_h_set; - uint32_t rst_dev_h_clr; - uint32_t rst_dev_u_set; - uint32_t rst_dev_u_clr; - - uint32_t _0x318[2]; - - /* _CLK_ENB_L/H/U_CLR_0 0x320-0x334 */ - uint32_t clk_enb_l_set; - uint32_t clk_enb_l_clr; - uint32_t clk_enb_h_set; - uint32_t clk_enb_h_clr; - uint32_t clk_enb_u_set; - uint32_t clk_enb_u_clr; - - uint32_t _0x338; - uint32_t ccplex_pg_sm_ovrd; /* _CCPLEX_PG_SM_OVRD_0, 0x33c */ - uint32_t rst_cpu_cmplx_set; /* _RST_CPU_CMPLX_SET_0, 0x340 */ - uint32_t rst_cpu_cmplx_clr; /* _RST_CPU_CMPLX_CLR_0, 0x344 */ - - /* Additional (T30) registers */ - uint32_t clk_cpu_cmplx_set; /* _CLK_CPU_CMPLX_SET_0, 0x348 */ - uint32_t clk_cpu_cmplx_clr; /* _CLK_CPU_CMPLX_SET_0, 0x34c */ - - uint32_t _0x350[2]; - uint32_t rst_dev_v; /* _RST_DEVICES_V_0, 0x358 */ - uint32_t rst_dev_w; /* _RST_DEVICES_W_0, 0x35c */ - uint32_t clk_out_enb_v; /* _CLK_OUT_ENB_V_0, 0x360 */ - uint32_t clk_out_enb_w; /* _CLK_OUT_ENB_W_0, 0x364 */ - uint32_t cclkg_brst_pol; /* _CCLKG_BURST_POLICY_0, 0x368 */ - uint32_t super_cclkg_div; /* _SUPER_CCLKG_DIVIDER_0, 0x36c */ - uint32_t cclklp_brst_pol; /* _CCLKLP_BURST_POLICY_0, 0x370 */ - uint32_t super_cclkp_div; /* _SUPER_CCLKLP_DIVIDER_0, 0x374 */ - uint32_t clk_cpug_cmplx; /* _CLK_CPUG_CMPLX_0, 0x378 */ - uint32_t clk_cpulp_cmplx; /* _CLK_CPULP_CMPLX_0, 0x37c */ - uint32_t cpu_softrst_ctrl; /* _CPU_SOFTRST_CTRL_0, 0x380 */ - uint32_t cpu_softrst_ctrl1; /* _CPU_SOFTRST_CTRL1_0, 0x384 */ - uint32_t cpu_softrst_ctrl2; /* _CPU_SOFTRST_CTRL2_0, 0x388 */ - uint32_t _0x38c[5]; - uint32_t lvl2_clk_gate_ovrc; /* _LVL2_CLK_GATE_OVRC, 0x3a0 */ - uint32_t lvl2_clk_gate_ovrd; /* _LVL2_CLK_GATE_OVRD, 0x3a4 */ - uint32_t _0x3a8[2]; - - uint32_t _0x3b0; - uint32_t clk_source_mselect; /* _CLK_SOURCE_MSELECT_0, 0x3b4 */ - uint32_t clk_source_tsensor; /* _CLK_SOURCE_TSENSOR_0, 0x3b8 */ - uint32_t clk_source_i2s4; /* _CLK_SOURCE_I2S4_0, 0x3bc */ - uint32_t clk_source_i2s5; /* _CLK_SOURCE_I2S5_0, 0x3c0 */ - uint32_t clk_source_i2c4; /* _CLK_SOURCE_I2C4_0, 0x3c4 */ - uint32_t _0x3c8[2]; - uint32_t clk_source_ahub; /* _CLK_SOURCE_AHUB_0, 0x3d0 */ - uint32_t _0x3d4[4]; - uint32_t clk_source_hda2codec_2x; /* _CLK_SOURCE_HDA2CODEC_2X_0, 0x3e4 */ - uint32_t clk_source_actmon; /* _CLK_SOURCE_ACTMON_0, 0x3e8 */ - uint32_t clk_source_extperiph1; /* _CLK_SOURCE_EXTPERIPH1_0, 0x3ec */ - uint32_t clk_source_extperiph2; /* _CLK_SOURCE_EXTPERIPH2_0, 0x3f0 */ - uint32_t clk_source_extperiph3; /* _CLK_SOURCE_EXTPERIPH3_0, 0x3f4 */ - uint32_t _0x3f8; - uint32_t clk_source_i2c_slow; /* _CLK_SOURCE_I2C_SLOW_0, 0x3fc */ - uint32_t clk_source_sys; /* _CLK_SOURCE_SYS_0, 0x400 */ - uint32_t clk_source_ispb; /* _CLK_SOURCE_ISPB_0, 0x404 */ - uint32_t _0x408[2]; - uint32_t clk_source_sor1; /* _CLK_SOURCE_SOR1_0, 0x410 */ - uint32_t clk_source_sor0; /* _CLK_SOURCE_SOR0_0, 0x414 */ - uint32_t _0x418[2]; - uint32_t clk_source_sata_oob; /* _CLK_SOURCE_SATA_OOB_0, 0x420 */ - uint32_t clk_source_sata; /* _CLK_SOURCE_SATA_0, 0x424 */ - uint32_t clk_source_hda; /* _CLK_SOURCE_HDA_0, 0x428 */ - uint32_t clk_source_se; /* _CLK_SOURCE_SE_0, 0x42c */ - - /* _RST_DEV_V/W_SET_0 0x430-0x43c */ - uint32_t rst_dev_v_set; - uint32_t rst_dev_v_clr; - uint32_t rst_dev_w_set; - uint32_t rst_dev_w_clr; - - /* _CLK_ENB_V/W_CLR_0 0x440-0x44c */ - uint32_t clk_enb_v_set; - uint32_t clk_enb_v_clr; - uint32_t clk_enb_w_set; - uint32_t clk_enb_w_clr; - - /* Additional (T114+) registers */ - uint32_t rst_cpug_cmplx_set; /* _RST_CPUG_CMPLX_SET_0, 0x450 */ - uint32_t rst_cpug_cmplx_clr; /* _RST_CPUG_CMPLX_CLR_0, 0x454 */ - uint32_t rst_cpulp_cmplx_set; /* _RST_CPULP_CMPLX_SET_0, 0x458 */ - uint32_t rst_cpulp_cmplx_clr; /* _RST_CPULP_CMPLX_CLR_0, 0x45c */ - uint32_t clk_cpug_cmplx_set; /* _CLK_CPUG_CMPLX_SET_0, 0x460 */ - uint32_t clk_cpug_cmplx_clr; /* _CLK_CPUG_CMPLX_CLR_0, 0x464 */ - uint32_t clk_cpulp_cmplx_set; /* _CLK_CPULP_CMPLX_SET_0, 0x468 */ - uint32_t clk_cpulp_cmplx_clr; /* _CLK_CPULP_CMPLX_CLR_0, 0x46c */ - uint32_t cpu_cmplx_status; /* _CPU_CMPLX_STATUS_0, 0x470 */ - uint32_t _0x474; - uint32_t intstatus; /* _INTSTATUS_0, 0x478 */ - uint32_t intmask; /* _INTMASK_0, 0x47c */ - uint32_t utmip_pll_cfg0; /* _UTMIP_PLL_CFG0_0, 0x480 */ - uint32_t utmip_pll_cfg1; /* _UTMIP_PLL_CFG1_0, 0x484 */ - uint32_t utmip_pll_cfg2; /* _UTMIP_PLL_CFG2_0, 0x488 */ - - uint32_t plle_aux; /* _PLLE_AUX_0, 0x48c */ - uint32_t sata_pll_cfg0; /* _SATA_PLL_CFG0_0, 0x490 */ - uint32_t sata_pll_cfg1; /* _SATA_PLL_CFG1_0, 0x494 */ - uint32_t pcie_pll_cfg0; /* _PCIE_PLL_CFG0_0, 0x498 */ - - uint32_t prog_audio_dly_clk; /* _PROG_AUDIO_DLY_CLK_0, 0x49c */ - uint32_t audio_sync_clk_i2s0; /* _AUDIO_SYNC_CLK_I2S0_0, 0x4a0 */ - uint32_t audio_sync_clk_i2s1; /* _AUDIO_SYNC_CLK_I2S1_0, 0x4a4 */ - uint32_t audio_sync_clk_i2s2; /* _AUDIO_SYNC_CLK_I2S2_0, 0x4a8 */ - uint32_t audio_sync_clk_i2s3; /* _AUDIO_SYNC_CLK_I2S3_0, 0x4ac */ - uint32_t audio_sync_clk_i2s4; /* _AUDIO_SYNC_CLK_I2S4_0, 0x4b0 */ - uint32_t audio_sync_clk_spdif; /* _AUDIO_SYNC_CLK_SPDIF_0, 0x4b4 */ - - uint32_t plld2_base; /* _PLLD2_BASE_0, 0x4b8 */ - uint32_t plld2_misc; /* _PLLD2_MISC_0, 0x4bc */ - uint32_t utmip_pll_cfg3; /* _UTMIP_PLL_CFG3_0, 0x4c0 */ - uint32_t pllrefe_base; /* _PLLREFE_BASE_0, 0x4c4 */ - uint32_t pllrefe_misc; /* _PLLREFE_MISC_0, 0x4c8 */ - uint32_t pllrefe_out; /* _PLLREFE_OUT_0, 0x4cc */ - uint32_t cpu_finetrim_byp; /* _CPU_FINETRIM_BYP_0, 0x4d0 */ - uint32_t cpu_finetrim_select; /* _CPU_FINETRIM_SELECT_0, 0x4d4 */ - uint32_t cpu_finetrim_dr; /* _CPU_FINETRIM_DR_0, 0x4d8 */ - uint32_t cpu_finetrim_df; /* _CPU_FINETRIM_DF_0, 0x4dc */ - uint32_t cpu_finetrim_f; /* _CPU_FINETRIM_F_0, 0x4e0 */ - uint32_t cpu_finetrim_r; /* _CPU_FINETRIM_R_0, 0x4e4 */ - uint32_t pllc2_base; /* _PLLC2_BASE_0, 0x4e8 */ - uint32_t pllc2_misc0; /* _PLLC2_MISC_0_0, 0x4ec */ - uint32_t pllc2_misc1; /* _PLLC2_MISC_1_0, 0x4f0 */ - uint32_t pllc2_misc2; /* _PLLC2_MISC_2_0, 0x4f4 */ - uint32_t pllc2_misc3; /* _PLLC2_MISC_3_0, 0x4f8 */ - uint32_t pllc3_base; /* _PLLC3_BASE_0, 0x4fc */ - uint32_t pllc3_misc0; /* _PLLC3_MISC_0_0, 0x500 */ - uint32_t pllc3_misc1; /* _PLLC3_MISC_1_0, 0x504 */ - uint32_t pllc3_misc2; /* _PLLC3_MISC_2_0, 0x508 */ - uint32_t pllc3_misc3; /* _PLLC3_MISC_3_0, 0x50c */ - uint32_t pllx_misc1; /* _PLLX_MISC_1_0, 0x510 */ - uint32_t pllx_misc2; /* _PLLX_MISC_2_0, 0x514 */ - uint32_t pllx_misc3; /* _PLLX_MISC_3_0, 0x518 */ - uint32_t xusbio_pll_cfg0; /* _XUSBIO_PLL_CFG0_0, 0x51c */ - uint32_t xusbio_pll_cfg1; /* _XUSBIO_PLL_CFG0_1, 0x520 */ - uint32_t plle_aux1; /* _PLLE_AUX1_0, 0x524 */ - uint32_t pllp_reshift; /* _PLLP_RESHIFT_0, 0x528 */ - uint32_t utmipll_hw_pwrdn_cfg0; /* _UTMIPLL_HW_PWRDN_CFG0_0, 0x52c */ - uint32_t pllu_hw_pwrdn_cfg0; /* _PLLU_HW_PWRDN_CFG0_0, 0x530 */ - uint32_t xusb_pll_cfg0; /* _XUSB_PLL_CFG0_0, 0x534 */ - uint32_t _0x538; - uint32_t clk_cpu_misc; /* _CLK_CPU_MISC_0, 0x53c */ - uint32_t clk_cpug_misc; /* _CLK_CPUG_MISC_0, 0x540 */ - uint32_t clk_cpulp_misc; /* _CLK_CPULP_MISC_0, 0x544 */ - uint32_t pllx_hw_ctrl_cfg; /* _PLLX_HW_CTRL_CFG_0, 0x548 */ - uint32_t pllx_sw_ramp_cfg; /* _PLLX_SW_RAMP_CFG_0, 0x54c */ - uint32_t pllx_hw_ctrl_status; /* _PLLX_HW_CTRL_STATUS_0, 0x550 */ - uint32_t lvl2_clk_gate_ovre; /* _LVL2_CLK_GATE_OVRE, 0x554 */ - uint32_t super_gr3d_clk_div; /* _SUPER_GR3D_CLK_DIVIDER_0, 0x558 */ - uint32_t spare_reg0; /* _SPARE_REG0_0, 0x55c */ - uint32_t audio_sync_clk_dmic1; /* _AUDIO_SYNC_CLK_DMIC1_0, 0x560 */ - uint32_t audio_sync_clk_dmic2; /* _AUDIO_SYNC_CLK_DMIC2_0, 0x564 */ - - uint32_t _0x568[2]; - uint32_t plld2_ss_cfg; /* _PLLD2_SS_CFG, 0x570 */ - uint32_t plld2_ss_ctrl1; /* _PLLD2_SS_CTRL1_0, 0x574 */ - uint32_t plld2_ss_ctrl2; /* _PLLD2_SS_CTRL2_0, 0x578 */ - uint32_t _0x57c[5]; - - uint32_t plldp_base; /* _PLLDP_BASE, 0x590*/ - uint32_t plldp_misc; /* _PLLDP_MISC, 0x594 */ - uint32_t plldp_ss_cfg; /* _PLLDP_SS_CFG, 0x598 */ - uint32_t plldp_ss_ctrl1; /* _PLLDP_SS_CTRL1_0, 0x59c */ - uint32_t plldp_ss_ctrl2; /* _PLLDP_SS_CTRL2_0, 0x5a0 */ - uint32_t pllc4_base; /* _PLLC4_BASE_0, 0x5a4 */ - uint32_t pllc4_misc; /* _PLLC4_MISC_0, 0x5a8 */ - uint32_t _0x5ac[6]; - uint32_t clk_spare0; /* _CLK_SPARE0_0, 0x5c4 */ - uint32_t clk_spare1; /* _CLK_SPARE1_0, 0x5c8 */ - uint32_t gpu_isob_ctrl; /* _GPU_ISOB_CTRL_0, 0x5cc */ - uint32_t pllc_misc2; /* _PLLC_MISC_2_0, 0x5d0 */ - uint32_t pllc_misc3; /* _PLLC_MISC_3_0, 0x5d4 */ - uint32_t plla_misc2; /* _PLLA_MISC2_0, 0x5d8 */ - uint32_t _0x5dc[2]; - uint32_t pllc4_out; /* _PLLC4_OUT_0, 0x5e4 */ - uint32_t pllmb_base; /* _PLLMB_BASE_0, 0x5e8 */ - uint32_t pllmb_misc1; /* _PLLMB_MISC1_0, 0x5ec */ - uint32_t pllx_misc4; /* _PLLX_MISC_4_0, 0x5f0 */ - uint32_t pllx_misc5; /* _PLLX_MISC_5_0, 0x5f4 */ - uint32_t _0x5f8[2]; - - uint32_t clk_source_xusb_core_host; /* _CLK_SOURCE_XUSB_CORE_HOST_0, 0x600 */ - uint32_t clk_source_xusb_falcon; /* _CLK_SOURCE_XUSB_FALCON_0, 0x604 */ - uint32_t clk_source_xusb_fs; /* _CLK_SOURCE_XUSB_FS_0, 0x608 */ - uint32_t clk_source_xusb_core_dev; /* _CLK_SOURCE_XUSB_CORE_DEV_0, 0x60c */ - uint32_t clk_source_xusb_ss; /* _CLK_SOURCE_XUSB_SS_0, 0x610 */ - uint32_t clk_source_cilab; /* _CLK_SOURCE_CILAB_0, 0x614 */ - uint32_t clk_source_cilcd; /* _CLK_SOURCE_CILCD_0, 0x618 */ - uint32_t clk_source_cilef; /* _CLK_SOURCE_CILEF_0, 0x61c */ - uint32_t clk_source_dsia_lp; /* _CLK_SOURCE_DSIA_LP_0, 0x620 */ - uint32_t clk_source_dsib_lp; /* _CLK_SOURCE_DSIB_LP_0, 0x624 */ - uint32_t clk_source_entropy; /* _CLK_SOURCE_ENTROPY_0, 0x628 */ - uint32_t clk_source_dvfs_ref; /* _CLK_SOURCE_DVFS_REF_0, 0x62c */ - uint32_t clk_source_dvfs_soc; /* _CLK_SOURCE_DVFS_SOC_0, 0x630 */ - uint32_t _0x634[3]; - uint32_t clk_source_emc_latency; /* _CLK_SOURCE_EMC_LATENCY_0, 0x640 */ - uint32_t clk_source_soc_therm; /* _CLK_SOURCE_SOC_THERM_0, 0x644 */ - uint32_t _0x648; - uint32_t clk_source_dmic1; /* _CLK_SOURCE_DMIC1_0, 0x64c */ - uint32_t clk_source_dmic2; /* _CLK_SOURCE_DMIC2_0, 0x650 */ - uint32_t _0x654; - uint32_t clk_source_vi_sensor2; /* _CLK_SOURCE_VI_SENSOR2_0, 0x658 */ - uint32_t clk_source_i2c6; /* _CLK_SOURCE_I2C6_0, 0x65c */ - uint32_t clk_source_mipibif; /* _CLK_SOURCE_MIPIBIF_0, 0x660 */ - uint32_t clk_source_emc_dll; /* _CLK_SOURCE_EMC_DLL_0, 0x664 */ - uint32_t _0x668; - uint32_t clk_source_uart_fst_mipi_cal; /* _CLK_SOURCE_UART_FST_MIPI_CAL_0, 0x66c */ - uint32_t _0x670[2]; - uint32_t clk_source_vic; /* _CLK_SOURCE_VIC_0, 0x678 */ - - uint32_t pllp_outc; /* _PLLP_OUTC_0, 0x67c */ - uint32_t pllp_misc1; /* _PLLP_MISC1_0, 0x680 */ - uint32_t _0x684[2]; - uint32_t emc_div_clk_shaper_ctrl; /* _EMC_DIV_CLK_SHAPER_CTRL_0, 0x68c */ - uint32_t emc_pllc_shaper_ctrl; /* _EMC_PLLC_SHAPER_CTRL_0, 0x690 */ - - uint32_t clk_source_sdmmc_legacy_tm; /* _CLK_SOURCE_SDMMC_LEGACY_TM_0, 0x694 */ - uint32_t clk_source_nvdec; /* _CLK_SOURCE_NVDEC_0, 0x698 */ - uint32_t clk_source_nvjpg; /* _CLK_SOURCE_NVJPG_0, 0x69c */ - uint32_t clk_source_nvenc; /* _CLK_SOURCE_NVENC_0, 0x6a0 */ - - uint32_t plla1_base; /* _PLLA1_BASE_0, 0x6a4 */ - uint32_t plla1_misc0; /* _PLLA1_MISC_0_0, 0x6a8 */ - uint32_t plla1_misc1; /* _PLLA1_MISC_1_0, 0x6ac */ - uint32_t plla1_misc2; /* _PLLA1_MISC_2_0, 0x6b0 */ - uint32_t plla1_misc3; /* _PLLA1_MISC_3_0, 0x6b4 */ - uint32_t audio_sync_clk_dmic3; /* _AUDIO_SYNC_CLK_DMIC3_0, 0x6b8 */ - - uint32_t clk_source_dmic3; /* _CLK_SOURCE_DMIC3_0, 0x6bc */ - uint32_t clk_source_ape; /* _CLK_SOURCE_APE_0, 0x6c0 */ - uint32_t clk_source_qspi; /* _CLK_SOURCE_QSPI_0, 0x6c4 */ - uint32_t clk_source_vi_i2c; /* _CLK_SOURCE_VI_I2C_0, 0x6c8 */ - uint32_t clk_source_usb2_hsic_trk; /* _CLK_SOURCE_USB2_HSIC_TRK_0, 0x6cc */ - uint32_t clk_source_pex_sata_usb_rx_byp; /* _CLK_SOURCE_PEX_SATA_USB_RX_BYP_0, 0x6d0 */ - uint32_t clk_source_maud; /* _CLK_SOURCE_MAUD_0, 0x6d4 */ - uint32_t clk_source_tsecb; /* _CLK_SOURCE_TSECB_0, 0x6d8 */ - - uint32_t clk_cpug_misc1; /* _CLK_CPUG_MISC1_0, 0x6dc */ - uint32_t aclk_burst_policy; /* _ACLK_BURST_POLICY_0, 0x6e0 */ - uint32_t super_aclk_divider; /* _SUPER_ACLK_DIVIDER_0, 0x6e4 */ - - uint32_t nvenc_super_clk_divider; /* _NVENC_SUPER_CLK_DIVIDER_0, 0x6e8 */ - uint32_t vi_super_clk_divider; /* _VI_SUPER_CLK_DIVIDER_0, 0x6ec */ - uint32_t vic_super_clk_divider; /* _VIC_SUPER_CLK_DIVIDER_0, 0x6f0 */ - uint32_t nvdec_super_clk_divider; /* _NVDEC_SUPER_CLK_DIVIDER_0, 0x6f4 */ - uint32_t isp_super_clk_divider; /* _ISP_SUPER_CLK_DIVIDER_0, 0x6f8 */ - uint32_t ispb_super_clk_divider; /* _ISPB_SUPER_CLK_DIVIDER_0, 0x6fc */ - uint32_t nvjpg_super_clk_divider; /* _NVJPG_SUPER_CLK_DIVIDER_0, 0x700 */ - uint32_t se_super_clk_divider; /* _SE_SUPER_CLK_DIVIDER_0, 0x704 */ - uint32_t tsec_super_clk_divider; /* _TSEC_SUPER_CLK_DIVIDER_0, 0x708 */ - uint32_t tsecb_super_clk_divider; /* _TSECB_SUPER_CLK_DIVIDER_0, 0x70c */ - - uint32_t clk_source_uartape; /* _CLK_SOURCE_UARTAPE_0, 0x710 */ - uint32_t clk_cpug_misc2; /* _CLK_CPUG_MISC2_0, 0x714 */ - uint32_t clk_source_dbgapb; /* _CLK_SOURCE_DBGAPB_0, 0x718 */ - uint32_t clk_ccplex_cc4_ret_clk_enb; /* _CLK_CCPLEX_CC4_RET_CLK_ENB_0, 0x71c */ - uint32_t actmon_cpu_clk; /* _ACTMON_CPU_CLK_0, 0x720 */ - uint32_t clk_source_emc_safe; /* _CLK_SOURCE_EMC_SAFE_0, 0x724 */ - uint32_t sdmmc2_pllc4_out0_shaper_ctrl; /* _SDMMC2_PLLC4_OUT0_SHAPER_CTRL_0, 0x728 */ - uint32_t sdmmc2_pllc4_out1_shaper_ctrl; /* _SDMMC2_PLLC4_OUT1_SHAPER_CTRL_0, 0x72c */ - uint32_t sdmmc2_pllc4_out2_shaper_ctrl; /* _SDMMC2_PLLC4_OUT2_SHAPER_CTRL_0, 0x730 */ - uint32_t sdmmc2_div_clk_shaper_ctrl; /* _SDMMC2_DIV_CLK_SHAPER_CTRL_0, 0x734 */ - uint32_t sdmmc4_pllc4_out0_shaper_ctrl; /* _SDMMC4_PLLC4_OUT0_SHAPER_CTRL_0, 0x738 */ - uint32_t sdmmc4_pllc4_out1_shaper_ctrl; /* _SDMMC4_PLLC4_OUT1_SHAPER_CTRL_0, 0x73c */ - uint32_t sdmmc4_pllc4_out2_shaper_ctrl; /* _SDMMC4_PLLC4_OUT2_SHAPER_CTRL_0, 0x740 */ - uint32_t sdmmc4_div_clk_shaper_ctrl; /* _SDMMC4_DIV_CLK_SHAPER_CTRL_0, 0x744 */ - - uint32_t _0x748[(0x774-0x748) / sizeof(uint32_t)]; // TODO - - uint32_t pllm_ss_cfg; /* _PLLM_SS_CFG_0, 0x744 */ - uint32_t pllm_ss_ctrl1; /* _PLLM_SS_CTRL1_0, 0x778 */ - uint32_t pllm_ss_ctrl2; /* _PLLM_SS_CTRL2_0, 0x77C */ - uint32_t pllmb_ss_cfg; /* _PLLMB_SS_CFG_0, 0x780 */ - uint32_t pllmb_ss_ctrl1; /* _PLLMB_SS_CTRL1_0, 0x784 */ - uint32_t pllmb_ss_ctrl2; /* _PLLMB_SS_CTRL2_0, 0x788 */ -} tegra_car_t; - -static inline volatile tegra_car_t *car_get_regs(void) { - return (volatile tegra_car_t *)CAR_BASE; -} - -void clk_enable(CarDevice dev); -void clk_disable(CarDevice dev); -void rst_enable(CarDevice dev); -void rst_disable(CarDevice dev); - -void clkrst_enable(CarDevice dev); -void clkrst_disable(CarDevice dev); -void clkrst_reboot(CarDevice dev); - -void clkrst_enable_fuse_regs(bool enable); - -#endif diff --git a/fusee/fusee-secondary/src/chainloader.c b/fusee/fusee-secondary/src/chainloader.c deleted file mode 100644 index aa9979982..000000000 --- a/fusee/fusee-secondary/src/chainloader.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "chainloader.h" - -int g_chainloader_argc = 0; -char g_chainloader_arg_data[CHAINLOADER_ARG_DATA_MAX_SIZE] = {0}; -chainloader_entry_t g_chainloader_entries[CHAINLOADER_MAX_ENTRIES] = {0}; /* keep them sorted */ -size_t g_chainloader_num_entries = 0; -uintptr_t g_chainloader_entrypoint = 0; - -#pragma GCC optimize (3) - -static void *xmemmove(void *dst, const void *src, size_t len) -{ - const uint8_t *src8 = (const uint8_t *)src; - uint8_t *dst8 = (uint8_t *)dst; - - if (dst8 < src8) { - for (size_t i = 0; i < len; i++) { - dst8[i] = src8[i]; - } - } else if (dst8 > src8) { - for (size_t i = len; len > 0; len--) - dst8[i - 1] = src8[i - 1]; - } - - return dst; -} - -void relocate_and_chainload_main(void) { - for(size_t i = 0; i < g_chainloader_num_entries; i++) { - chainloader_entry_t *entry = &g_chainloader_entries[i]; - xmemmove((void *)entry->load_address, (const void *)entry->src_address, entry->size); - } - - ((void (*)(int, void *))g_chainloader_entrypoint)(g_chainloader_argc, g_chainloader_arg_data); -} diff --git a/fusee/fusee-secondary/src/chainloader.h b/fusee/fusee-secondary/src/chainloader.h deleted file mode 100644 index f08bf6396..000000000 --- a/fusee/fusee-secondary/src/chainloader.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CHAINLOADER_H -#define FUSEE_CHAINLOADER_H - -#include -#include - -#define CHAINLOADER_ARG_DATA_MAX_SIZE 0x5400 -#define CHAINLOADER_MAX_ENTRIES 128 - -typedef struct chainloader_entry_t { - uintptr_t load_address; - uintptr_t src_address; - size_t size; - size_t num; -} chainloader_entry_t; - -extern int g_chainloader_argc; -extern chainloader_entry_t g_chainloader_entries[CHAINLOADER_MAX_ENTRIES]; /* keep them sorted */ -extern size_t g_chainloader_num_entries; -extern uintptr_t g_chainloader_entrypoint; - -extern char g_chainloader_arg_data[CHAINLOADER_ARG_DATA_MAX_SIZE]; - -void relocate_and_chainload(void); - -#endif diff --git a/fusee/fusee-secondary/src/cluster.c b/fusee/fusee-secondary/src/cluster.c deleted file mode 100644 index 250326f09..000000000 --- a/fusee/fusee-secondary/src/cluster.c +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "cluster.h" -#include "flow.h" -#include "sysreg.h" -#include "i2c.h" -#include "car.h" -#include "fuse.h" -#include "mc.h" -#include "timers.h" -#include "pmc.h" -#include "max77620.h" -#include "max77812.h" - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static void cluster_enable_power(uint32_t regulator) { - switch (regulator) { - case 0: /* Regulator_Max77621 */ - { - uint8_t val = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_AME_GPIO, &val, 1); - val &= 0xDF; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_AME_GPIO, &val, 1); - val = 0x09; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_GPIO5, &val, 1); - val = 0xB0; - i2c_send(I2C_5, MAX77621_CPU_I2C_ADDR, 0x02, &val, 1); - val = 0xC1; - i2c_send(I2C_5, MAX77621_CPU_I2C_ADDR, 0x03, &val, 1); - val = 0xB7; - i2c_send(I2C_5, MAX77621_CPU_I2C_ADDR, 0x00, &val, 1); - val = 0xB7; - i2c_send(I2C_5, MAX77621_CPU_I2C_ADDR, 0x01, &val, 1); - } - break; - case 1: /* Regulator_Max77812PhaseConfiguration31 */ - { - uint8_t val = 0; - i2c_query(I2C_5, MAX77812_PHASE31_CPU_I2C_ADDR, MAX77812_REG_EN_CTRL, &val, 1); - val |= 0x40; - i2c_send(I2C_5, MAX77812_PHASE31_CPU_I2C_ADDR, MAX77812_REG_EN_CTRL, &val, 1); - val = 0x6E; - i2c_send(I2C_5, MAX77812_PHASE31_CPU_I2C_ADDR, MAX77812_REG_M4_VOUT, &val, 1); - } - break; - case 2: /* Regulator_Max77812PhaseConfiguration211 */ - { - uint8_t val = 0; - i2c_query(I2C_5, MAX77812_PHASE211_CPU_I2C_ADDR, MAX77812_REG_EN_CTRL, &val, 1); - val |= 0x40; - i2c_send(I2C_5, MAX77812_PHASE211_CPU_I2C_ADDR, MAX77812_REG_EN_CTRL, &val, 1); - val = 0x6E; - i2c_send(I2C_5, MAX77812_PHASE211_CPU_I2C_ADDR, MAX77812_REG_M4_VOUT, &val, 1); - } - break; - default: return; - } -} - -static bool cluster_is_partition_powered(volatile tegra_pmc_t *pmc, uint32_t status) { - return (pmc->pwrgate_status & status) == status; -} - -static void cluster_pmc_enable_partition(uint32_t part, uint32_t toggle) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - const uint32_t status = (toggle << part); - - /* Check if the partition has already been turned on. */ - if (cluster_is_partition_powered(pmc, status)) { - return; - } - - int timeout = 5000; - while (true) { - if ((pmc->pwrgate_toggle & 0x100) == 0) { - break; - } - udelay(1); - if ((--timeout) < 0) { - return; - } - } - - /* Turn the partition on. */ - pmc->pwrgate_toggle = (part | 0x100); - - timeout = 5000; - while (true) { - if (cluster_is_partition_powered(pmc, status)) { - break; - } - udelay(1); - if ((--timeout) < 0) { - return; - } - } -} - -void cluster_boot_cpu0(uint32_t entry) { - volatile tegra_car_t *car = car_get_regs(); - bool is_mariko = is_soc_mariko(); - - /* Set ACTIVE_CLUSER to FAST. */ - FLOW_CTLR_BPMP_CLUSTER_CONTROL_0 &= 0xFFFFFFFE; - - /* Enable VddCpu. */ - cluster_enable_power(is_mariko ? fuse_get_regulator() : 0); - - if (!(car->pllx_base & 0x40000000)) { - car->pllx_misc3 &= 0xFFFFFFF7; - udelay(2); - car->pllx_base = 0x80404E02; - car->pllx_base = 0x404E02; - car->pllx_misc = ((car->pllx_misc & 0xFFFBFFFF) | 0x40000); - car->pllx_base = 0x40404E02; - } - - while (!(car->pllx_base & 0x8000000)) { - /* Wait. */ - } - - /* Set MSELECT clock. */ - clk_enable(CARDEVICE_MSELECT); - - /* Configure initial CPU clock frequency and enable clock. */ - car->cclk_brst_pol = 0x20008888; - car->super_cclk_div = 0x80000000; - car->clk_enb_v_set = 1; - - /* Reboot CORESIGHT. */ - clkrst_reboot(CARDEVICE_CORESIGHT); - - /* Set CAR2PMC_CPU_ACK_WIDTH to 0. */ - car->cpu_softrst_ctrl2 &= 0xFFFFF000; - - /* Enable CPU rail. */ - cluster_pmc_enable_partition(0, 1); - - /* Enable cluster 0 non-CPU. */ - cluster_pmc_enable_partition(15, 1); - - /* Enable CE0. */ - cluster_pmc_enable_partition(14, 1); - - /* Request and wait for RAM repair. */ - FLOW_CTLR_RAM_REPAIR_0 = 1; - while (!(FLOW_CTLR_RAM_REPAIR_0 & 2)) { - /* Wait. */ - } - - MAKE_EXCP_VEC_REG(0x100) = 0; - - /* Set reset vector. */ - SB_AA64_RESET_LOW_0 = (entry | 1); - SB_AA64_RESET_HIGH_0 = 0; - - /* Non-secure reset vector write disable. */ - SB_CSR_0 = 2; - (void)SB_CSR_0; - - /* Set CPU_STRICT_TZ_APERTURE_CHECK. */ - /* NOTE: This breaks Exosphère. */ - /* MAKE_MC_REG(MC_TZ_SECURITY_CTRL) = 1; */ - - /* Clear MSELECT reset. */ - rst_disable(CARDEVICE_MSELECT); - - /* Clear NONCPU reset. */ - car->rst_cpug_cmplx_clr = 0x20000000; - - /* Clear CPU{0} POR and CORE, CX0, L2, and DBG reset.*/ - car->rst_cpug_cmplx_clr = 0x41010001; -} diff --git a/fusee/fusee-secondary/src/cluster.h b/fusee/fusee-secondary/src/cluster.h deleted file mode 100644 index 802b54396..000000000 --- a/fusee/fusee-secondary/src/cluster.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CLUSTER_H_ -#define FUSEE_CLUSTER_H_ - -void cluster_boot_cpu0(uint32_t entry); - -#endif diff --git a/fusee/fusee-secondary/src/console.c b/fusee/fusee-secondary/src/console.c deleted file mode 100644 index b3d8f0d18..000000000 --- a/fusee/fusee-secondary/src/console.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "console.h" -#include "di.h" -#include "../../../fusee/common/display/video_fb.h" - -static void *g_framebuffer = NULL; -static bool g_display_initialized = false; - -static ssize_t console_write(struct _reent *r, void *fd, const char *ptr, size_t len); -static void console_init_display(void); - -static const devoptab_t dotab_stdout = { - .name = "con", - .write_r = console_write, -}; - -/* https://github.com/switchbrew/libnx/blob/master/nx/source/runtime/util/utf/decode_utf8.c */ -static ssize_t decode_utf8(uint32_t *out, const uint8_t *in) { - uint8_t code1, code2, code3, code4; - - code1 = *in++; - if(code1 < 0x80) { - /* 1-byte sequence */ - *out = code1; - return 1; - } else if(code1 < 0xC2) { - return -1; - } else if(code1 < 0xE0) { - /* 2-byte sequence */ - code2 = *in++; - if((code2 & 0xC0) != 0x80) { - return -1; - } - - *out = (code1 << 6) + code2 - 0x3080; - return 2; - } else if(code1 < 0xF0) { - /* 3-byte sequence */ - code2 = *in++; - if((code2 & 0xC0) != 0x80) { - return -1; - } - if(code1 == 0xE0 && code2 < 0xA0) { - return -1; - } - - code3 = *in++; - if((code3 & 0xC0) != 0x80) { - return -1; - } - - *out = (code1 << 12) + (code2 << 6) + code3 - 0xE2080; - return 3; - } else if(code1 < 0xF5) { - /* 4-byte sequence */ - code2 = *in++; - if((code2 & 0xC0) != 0x80) { - return -1; - } - if(code1 == 0xF0 && code2 < 0x90) { - return -1; - } - if(code1 == 0xF4 && code2 >= 0x90) { - return -1; - } - - code3 = *in++; - if((code3 & 0xC0) != 0x80) { - return -1; - } - - code4 = *in++; - if((code4 & 0xC0) != 0x80) { - return -1; - } - - *out = (code1 << 18) + (code2 << 12) + (code3 << 6) + code4 - 0x3C82080; - return 4; - } - - return -1; -} - -static void console_init_display(void) { - /* Initialize the display. */ - display_init(); - - /* Set the framebuffer. */ - display_init_framebuffer(g_framebuffer); - - /* Turn on the backlight after initializing the lfb */ - /* to avoid flickering. */ - display_backlight(true); - - /* Display is initialized. */ - g_display_initialized = true; -} - -static ssize_t console_write(struct _reent *r, void *fd, const char *ptr, size_t len) { - size_t i = 0; - if (!g_display_initialized && (g_framebuffer != NULL)) { - console_init_display(); - } - while (i < len) { - uint32_t chr; - ssize_t n = decode_utf8(&chr, (uint8_t *)(ptr + i)); - if (n == -1) { - break; - } else { - i += (size_t)n; - video_putc(chr > 0xFF ? '?' : (char)chr); - } - } - - return i; -} - -static int console_create(void) { - if (g_framebuffer != NULL) { - errno = EEXIST; - return -1; - } - - /* Allocate memory for the framebuffer. */ - g_framebuffer = memalign(0x1000, CONFIG_VIDEO_VISIBLE_ROWS * CONFIG_VIDEO_COLS * CONFIG_VIDEO_PIXEL_SIZE); - - if (g_framebuffer == NULL) { - errno = ENOMEM; - return -1; - } - - devoptab_list[STD_OUT] = &dotab_stdout; - devoptab_list[STD_ERR] = &dotab_stdout; - - setvbuf(stdout, NULL , _IOLBF, 4096); - setvbuf(stderr, NULL , _IONBF, 0); - - return 0; -} - -int console_init(void) { - if (console_create() == -1) { - return -1; - } - - /* Zero-fill the framebuffer, etc. */ - if (video_init(g_framebuffer) == -1) { - errno = EIO; - console_end(); - return -1; - } - - return 0; -} - -void *console_get_framebuffer(void) { - if (!g_display_initialized && (g_framebuffer != NULL)) { - console_init_display(); - } - return g_framebuffer; -} - -int console_display(const void *framebuffer) { - if (!g_display_initialized && (g_framebuffer != NULL)) { - console_init_display(); - } - display_init_framebuffer((void *)framebuffer); - return 0; -} - -int console_resume(void) { - if (!g_display_initialized && (g_framebuffer != NULL)) { - console_init_display(); - } else { - display_init_framebuffer(g_framebuffer); - } - return 0; -} - -int console_end(void) { - if (g_display_initialized) { - /* Turn off the backlight. */ - display_backlight(false); - - /* Terminate the display. */ - display_end(); - - /* Display is terminated. */ - g_display_initialized = false; - } - free(g_framebuffer); - g_framebuffer = NULL; - return 0; -} diff --git a/fusee/fusee-secondary/src/console.h b/fusee/fusee-secondary/src/console.h deleted file mode 100644 index c3160a4b5..000000000 --- a/fusee/fusee-secondary/src/console.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_CONSOLE_H -#define FUSEE_CONSOLE_H - -#include -#include -#include -#include -#include -#include - -int console_init(void); -void *console_get_framebuffer(void); -int console_display(const void *framebuffer); /* Must be page-aligned */ -int console_resume(void); -int console_end(void); - -#endif diff --git a/fusee/fusee-secondary/src/device_partition.c b/fusee/fusee-secondary/src/device_partition.c deleted file mode 100644 index 0cbbc8e35..000000000 --- a/fusee/fusee-secondary/src/device_partition.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "device_partition.h" - -int device_partition_read_data(device_partition_t *devpart, void *dst, uint64_t sector, uint64_t num_sectors) { - int rc = 0; - uint64_t target_sector = sector; - - /* Perform initialization steps, if necessary. */ - if (!devpart->initialized) { - rc = devpart->initializer(devpart); - if (rc != 0) { - return rc; - } - } - - /* Handle emulation. */ - if (devpart->is_emulated) { - /* Prepare the right file path if using file mode. */ - if (devpart->emu_use_file) { - int num_parts = devpart->emu_num_parts; - uint64_t part_limit = devpart->emu_part_limit; - - /* Handle data in multiple parts, if necessary. */ - if (num_parts > 0) { - int target_part = 0; - char target_path[0x300 + 1] = {0}; - uint64_t data_offset = sector * devpart->sector_size; - - if (data_offset >= part_limit) { - uint64_t data_offset_aligned = (data_offset + (part_limit - 1)) & ~(part_limit - 1); - target_part = (data_offset_aligned == data_offset) ? (data_offset / part_limit) : (data_offset_aligned / part_limit) - 1; - target_sector = (data_offset - (target_part * part_limit)) / devpart->sector_size; - - /* Target part is invalid. */ - if (target_part > num_parts) { - return -1; - } - } - - /* Treat the path as a folder with each part inside. */ - snprintf(target_path, sizeof(target_path) - 1, "%s/%02d", devpart->emu_root_path, target_part); - - /* Update the target file path. */ - strcpy(devpart->emu_file_path, target_path); - } - } - } - - /* Read the partition data. */ - if ((devpart->read_cipher != NULL) && (devpart->crypto_mode != DevicePartitionCryptoMode_None)) { - for (uint64_t i = 0; i < num_sectors; i += devpart->crypto_work_buffer_num_sectors) { - uint64_t n = (i + devpart->crypto_work_buffer_num_sectors > num_sectors) ? (num_sectors - i) : devpart->crypto_work_buffer_num_sectors; - - /* Read partition data. */ - rc = devpart->reader(devpart, devpart->crypto_work_buffer, target_sector + i, n); - - if (rc != 0) { - return rc; - } - - /* Decrypt partition data. */ - rc = devpart->read_cipher(devpart, target_sector + i, n); - - if (rc != 0) { - return rc; - } - - /* Copy partition data to destination. */ - memcpy(dst + (size_t)(devpart->sector_size * i), devpart->crypto_work_buffer, (size_t)(devpart->sector_size * n)); - } - } else { - /* Read partition data. */ - rc = devpart->reader(devpart, dst, target_sector, num_sectors); - } - - return rc; -} - -int device_partition_write_data(device_partition_t *devpart, const void *src, uint64_t sector, uint64_t num_sectors) { - int rc = 0; - uint64_t target_sector = sector; - - /* Perform initialization steps, if necessary. */ - if (!devpart->initialized) { - rc = devpart->initializer(devpart); - if (rc != 0) { - return rc; - } - } - - /* Handle emulation. */ - if (devpart->is_emulated) { - /* Prepare the right file path if using file mode. */ - if (devpart->emu_use_file) { - int num_parts = devpart->emu_num_parts; - uint64_t part_limit = devpart->emu_part_limit; - - /* Handle data in multiple parts, if necessary. */ - if (num_parts > 0) { - int target_part = 0; - char target_path[0x300 + 1] = {0}; - uint64_t data_offset = sector * devpart->sector_size; - - if (data_offset >= part_limit) { - uint64_t data_offset_aligned = (data_offset + (part_limit - 1)) & ~(part_limit - 1); - target_part = (data_offset_aligned == data_offset) ? (data_offset / part_limit) : (data_offset_aligned / part_limit) - 1; - target_sector = (data_offset - (target_part * part_limit)) / devpart->sector_size; - - /* Target part is invalid. */ - if (target_part > num_parts) { - return -1; - } - } - - /* Treat the path as a folder with each part inside. */ - snprintf(target_path, sizeof(target_path) - 1, "%s/%02d", devpart->emu_root_path, target_part); - - /* Update the target file path. */ - strcpy(devpart->emu_file_path, target_path); - } - } - } - - /* Write the partition data. */ - if ((devpart->write_cipher != NULL) && (devpart->crypto_mode != DevicePartitionCryptoMode_None)) { - for (uint64_t i = 0; i < num_sectors; i += devpart->crypto_work_buffer_num_sectors) { - uint64_t n = (i + devpart->crypto_work_buffer_num_sectors > num_sectors) ? (num_sectors - i) : devpart->crypto_work_buffer_num_sectors; - - /* Copy partition data from source. */ - memcpy(devpart->crypto_work_buffer, src + (size_t)(devpart->sector_size * i), (size_t)(devpart->sector_size * n)); - - /* Encrypt data. */ - rc = devpart->write_cipher(devpart, target_sector + i, n); - - if (rc != 0) { - return rc; - } - - /* Write partition data. */ - rc = devpart->writer(devpart, devpart->crypto_work_buffer, target_sector + i, n); - - if (rc != 0) { - return rc; - } - } - } else { - /* Write partition data. */ - rc = devpart->writer(devpart, src, target_sector, num_sectors); - } - - return rc; -} diff --git a/fusee/fusee-secondary/src/device_partition.h b/fusee/fusee-secondary/src/device_partition.h deleted file mode 100644 index a4a5df86e..000000000 --- a/fusee/fusee-secondary/src/device_partition.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_DEVICE_PARTITION_H -#define FUSEE_DEVICE_PARTITION_H - -#include -#include -#include - -#define DEVPART_IV_MAX_SIZE 16 -#define DEVPART_KEY_MAX 2 -#define DEVPART_KEY_MAX_SIZE 16 - -struct device_partition_t; - -typedef int (*device_partition_initializer_t)(struct device_partition_t *devpart); -typedef void (*device_partition_finalizer_t)(struct device_partition_t *devpart); - -/* Note: only random-access ciphers supporting in-place encryption/decryption are supported */ -typedef int (*device_partition_cipher_t)(struct device_partition_t *devpart, uint64_t sector, uint64_t num_sectors); - -typedef int (*device_partition_reader_t)(struct device_partition_t *devpart, void *dst, uint64_t sector, uint64_t num_sectors); -typedef int (*device_partition_writer_t)(struct device_partition_t *devpart, const void *src, uint64_t sector, uint64_t num_sectors); - -typedef enum DevicePartitionCryptoMode { - DevicePartitionCryptoMode_None, - DevicePartitionCryptoMode_Ctr, - DevicePartitionCryptoMode_Xts, -} DevicePartitionCryptoMode; - -typedef struct device_partition_t { - size_t sector_size; /* The size of a sector */ - uint64_t start_sector; /* Offset in the parent device, in sectors. */ - uint64_t num_sectors; /* Maximum size of the partition, in sectors (optional). */ - - device_partition_cipher_t read_cipher; /* Cipher for read operations. */ - device_partition_cipher_t write_cipher; /* Cipher for write operations. */ - DevicePartitionCryptoMode crypto_mode; /* Mode to use for cryptographic operations. */ - size_t crypto_sector_size; - - device_partition_initializer_t initializer; /* Initializer. */ - device_partition_finalizer_t finalizer; /* Finalizer. */ - - device_partition_reader_t reader; /* Reader. */ - device_partition_writer_t writer; /* Writer. */ - - void *device_struct; /* Pointer to struct for additional info. */ - - void *crypto_work_buffer; /* Work buffer for crypto. */ - uint64_t crypto_work_buffer_num_sectors; /* Size of the crypto work buffer in sectors. */ - - uint8_t __attribute__((aligned(16))) keys[DEVPART_KEY_MAX][DEVPART_KEY_MAX_SIZE]; /* Key. */ - uint8_t __attribute__((aligned(16))) iv[DEVPART_IV_MAX_SIZE]; /* IV. */ - bool initialized; - - /* Emulation only. */ - bool is_emulated; - bool emu_use_file; - char emu_root_path[0x100 + 1]; - char emu_file_path[0x300 + 1]; - int emu_num_parts; - uint64_t emu_part_limit; -} device_partition_t; - -int device_partition_read_data(device_partition_t *devpart, void *dst, uint64_t sector, uint64_t num_sectors); -int device_partition_write_data(device_partition_t *devpart, const void *src, uint64_t sector, uint64_t num_sectors); - -#endif diff --git a/fusee/fusee-secondary/src/di.c b/fusee/fusee-secondary/src/di.c deleted file mode 100644 index 12c547621..000000000 --- a/fusee/fusee-secondary/src/di.c +++ /dev/null @@ -1,469 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "di.h" -#include "fuse.h" -#include "timers.h" -#include "i2c.h" -#include "pmc.h" -#include "max77620.h" -#include "gpio.h" -#include "pinmux.h" -#include "car.h" -#include "apb_misc.h" - -#include "di.inl" - -static uint32_t g_lcd_vendor = 0; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static void do_dsi_sleep_or_register_writes(const dsi_sleep_or_register_write_t *writes, uint32_t num_writes) { - for (uint32_t i = 0; i < num_writes; i++) { - if (writes[i].kind == 1) { - udelay(1000 * writes[i].offset); - } else { - *(volatile uint32_t *)(DSI_BASE + sizeof(uint32_t) * writes[i].offset) = writes[i].value; - } - } -} - -static void do_register_writes(uint32_t base_address, const register_write_t *writes, uint32_t num_writes) { - for (uint32_t i = 0; i < num_writes; i++) { - *(volatile uint32_t *)(base_address + writes[i].offset) = writes[i].value; - } -} - -static void dsi_wait(uint32_t timeout, uint32_t offset, uint32_t mask, uint32_t delay) { - uint32_t end = get_time_us() + timeout; - while ((get_time_us() < end) && (MAKE_DSI_REG(offset) & mask)) { - /* Wait. */ - } - udelay(delay); -} - -uint16_t display_get_lcd_vendor(void) { - return g_lcd_vendor; -} - -void display_init(void) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pmc_t *pmc = pmc_get_regs(); - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - bool is_mariko = is_soc_mariko(); - uint32_t hardware_type = fuse_get_hardware_type(); - - /* Power on. */ - if (is_mariko) { - uint8_t val = 0x3A; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD2, &val, 1); - val = 0x71; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD2_CFG, &val, 1); - val = 0xD0; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_LDO0_CFG, &val, 1); - } else { - uint8_t val = 0xD0; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_LDO0_CFG, &val, 1); - } - - /* Enable MIPI CAL, DSI, DISP1, HOST1X, UART_FST_MIPI_CAL, DSIA LP clocks. */ - car->rst_dev_h_clr = 0x1010000; - car->clk_enb_h_set = 0x1010000; - car->rst_dev_l_clr = 0x18000000; - car->clk_enb_l_set = 0x18000000; - car->clk_enb_x_set = 0x20000; - car->clk_source_uart_fst_mipi_cal = 0xA; - car->clk_enb_w_set = 0x80000; - car->clk_source_dsia_lp = 0xA; - - /* DPD idle. */ - pmc->io_dpd_req = 0x40000000; - pmc->io_dpd2_req = 0x40000000; - - /* Configure pins. */ - pinmux->nfc_en &= ~PINMUX_TRISTATE; - pinmux->nfc_int &= ~PINMUX_TRISTATE; - pinmux->lcd_bl_pwm &= ~PINMUX_TRISTATE; - pinmux->lcd_bl_en &= ~PINMUX_TRISTATE; - pinmux->lcd_rst &= ~PINMUX_TRISTATE; - - if (is_mariko && (hardware_type == 5)) { - /* HardwareType_Five only configures GPIO_LCD_BL_RST. */ - gpio_configure_mode(GPIO_LCD_BL_RST, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_RST, GPIO_DIRECTION_OUTPUT); - } else { - /* Configure Backlight +-5V GPIOs. */ - gpio_configure_mode(GPIO_LCD_BL_P5V, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_N5V, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_P5V, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_N5V, GPIO_DIRECTION_OUTPUT); - - /* Enable Backlight +5V. */ - gpio_write(GPIO_LCD_BL_P5V, GPIO_LEVEL_HIGH); - - udelay(10000); - - /* Enable Backlight -5V. */ - gpio_write(GPIO_LCD_BL_N5V, GPIO_LEVEL_HIGH); - - udelay(10000); - - /* Configure Backlight PWM, EN and RST GPIOs. */ - gpio_configure_mode(GPIO_LCD_BL_PWM, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_EN, GPIO_MODE_GPIO); - gpio_configure_mode(GPIO_LCD_BL_RST, GPIO_MODE_GPIO); - gpio_configure_direction(GPIO_LCD_BL_PWM, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_EN, GPIO_DIRECTION_OUTPUT); - gpio_configure_direction(GPIO_LCD_BL_RST, GPIO_DIRECTION_OUTPUT); - - /* Enable Backlight EN. */ - gpio_write(GPIO_LCD_BL_EN, GPIO_LEVEL_HIGH); - } - - /* Configure display interface and display. */ - MAKE_MIPI_CAL_REG(MIPI_CAL_MIPI_BIAS_PAD_CFG2) = 0; - if (is_mariko) { - MAKE_MIPI_CAL_REG(MIPI_CAL_MIPI_BIAS_PAD_CFG0) = 0; - APB_MISC_GP_DSI_PAD_CONTROL_0 = 0; - } - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_01_mariko, 4); - } else { - do_register_writes(CAR_BASE, display_config_plld_01_erista, 4); - } - do_register_writes(DI_BASE, display_config_dc_01, 94); - do_register_writes(DSI_BASE, display_config_dsi_01_init_01, 8); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_01_init_02_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_01_init_02_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_03, 14); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_01_init_04_mariko, 7); - } else { - do_register_writes(DSI_BASE, display_config_dsi_01_init_04_erista, 0); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_05, 10); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_06, 12); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_07, 14); - - udelay(10000); - - /* Enable Backlight RST. */ - gpio_write(GPIO_LCD_BL_RST, GPIO_LEVEL_HIGH); - - udelay(60000); - - if (is_mariko && (hardware_type == 5)) { - MAKE_DSI_REG(DSI_BTA_TIMING) = 0x40103; - } else { - MAKE_DSI_REG(DSI_BTA_TIMING) = 0x50204; - } - MAKE_DSI_REG(DSI_WR_DATA) = 0x337; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - dsi_wait(250000, DSI_TRIGGER, (DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO), 5); - - MAKE_DSI_REG(DSI_WR_DATA) = 0x406; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - dsi_wait(250000, DSI_TRIGGER, (DSI_TRIGGER_HOST | DSI_TRIGGER_VIDEO), 5); - - MAKE_DSI_REG(DSI_HOST_CONTROL) = (DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_IMM_BTA | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC); - dsi_wait(150000, DSI_HOST_CONTROL, DSI_HOST_CONTROL_IMM_BTA, 5000); - - /* Parse LCD vendor. */ - uint32_t host_response[3]; - for (uint32_t i = 0; i < 3; i++) { - host_response[i] = MAKE_DSI_REG(DSI_RD_DATA); - } - - /* The last word from host response is: - Bits 0-7: FAB - Bits 8-15: REV - Bits 16-23: Minor REV - */ - if ((host_response[2] & 0xFF) == 0x10) { - g_lcd_vendor = 0; - } else { - g_lcd_vendor = (host_response[2] >> 8) & 0xFF00; - } - g_lcd_vendor = (g_lcd_vendor & 0xFFFFFF00) | (host_response[2] & 0xFF); - - /* LCD vendor specific configuration. */ - switch (g_lcd_vendor) { - case 0x10: /* Japan Display Inc screens. */ - do_dsi_sleep_or_register_writes(display_config_jdi_specific_init_01, 48); - break; - case 0xF20: /* Innolux nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_innolux_nx_abca2_specific_init_01, 14); - break; - case 0xF30: /* AUO nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abca2_specific_init_01, 14); - break; - case 0x2050: /* Unknown nx-abcd screens. */ - do_dsi_sleep_or_register_writes(display_config_50_nx_abcd_specific_init_01, 13); - break; - case 0x1020: /* Innolux nx-abcc screens. */ - case 0x1030: /* AUO nx-abcc screens. */ - case 0x1040: /* Unknown nx-abcc screens. */ - default: - do_dsi_sleep_or_register_writes(display_config_innolux_auo_40_nx_abcc_specific_init_01, 5); - break; - } - - udelay(20000); - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_02_mariko, 3); - } else { - do_register_writes(CAR_BASE, display_config_plld_02_erista, 3); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_08, 1); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_init_09, 19); - MAKE_DI_REG(DC_DISP_DISP_CLOCK_CONTROL) = 4; - do_register_writes(DSI_BASE, display_config_dsi_01_init_10, 10); - - udelay(10000); - - if (is_mariko) { - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_01, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_mariko, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_mariko, 7); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_mariko, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_mariko, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_mariko, 7); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_mariko, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - } else { - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_01, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_02_erista, 2); - do_register_writes(DSI_BASE, display_config_dsi_01_init_11_erista, 4); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_03_erista, 6); - do_register_writes(MIPI_CAL_BASE, display_config_mipi_cal_04, 10); - } - - udelay(10000); - - do_register_writes(DI_BASE, display_config_dc_02, 113); -} - -void display_end(void) { - volatile tegra_car_t *car = car_get_regs(); - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - bool is_mariko = is_soc_mariko(); - - /* Disable Backlight. */ - display_backlight(false); - - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 1; - MAKE_DSI_REG(DSI_WR_DATA) = 0x2805; - - /* Wait 5 frames. */ - uint32_t start_val = MAKE_HOST1X_REG(0x30A4); - while (MAKE_HOST1X_REG(0x30A4) < start_val + 5) { - /* Wait. */ - } - - MAKE_DI_REG(DC_CMD_STATE_ACCESS) = (READ_MUX | WRITE_MUX); - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 0; - - do_register_writes(DI_BASE, display_config_dc_01_fini_01, 13); - udelay(40000); - - if (is_mariko) { - do_register_writes(CAR_BASE, display_config_plld_01_mariko, 4); - } else { - do_register_writes(CAR_BASE, display_config_plld_01_erista, 4); - } - do_register_writes(DSI_BASE, display_config_dsi_01_fini_01, 2); - if (is_mariko) { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_mariko, 1); - } else { - do_register_writes(DSI_BASE, display_config_dsi_phy_timing_erista, 1); - } - do_register_writes(DSI_BASE, display_config_dsi_01_fini_02, 13); - - if (g_lcd_vendor != 0x2050) { - udelay(10000); - } - - /* LCD vendor specific shutdown. */ - switch (g_lcd_vendor) { - case 0x10: /* Japan Display Inc screens. */ - do_dsi_sleep_or_register_writes(display_config_jdi_specific_fini_01, 22); - break; - case 0xF30: /* AUO nx-abca2 screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abca2_specific_fini_01, 38); - break; - case 0x1020: /* Innolux nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_innolux_nx_abcc_specific_fini_01, 10); - break; - case 0x1030: /* AUO nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_auo_nx_abcc_specific_fini_01, 10); - break; - case 0x1040: /* Unknown nx-abcc screens. */ - do_dsi_sleep_or_register_writes(display_config_40_nx_abcc_specific_fini_01, 10); - break; - default: - break; - } - - MAKE_DSI_REG(DSI_WR_DATA) = 0x1005; - MAKE_DSI_REG(DSI_TRIGGER) = DSI_TRIGGER_HOST; - udelay((g_lcd_vendor == 0x2050) ? 120000 : 50000); - - /* Disable Backlight RST. */ - gpio_write(GPIO_LCD_BL_RST, GPIO_LEVEL_LOW); - - if (g_lcd_vendor == 0x2050) { - udelay(30000); - } else { - udelay(10000); - - /* Disable Backlight -5V. */ - gpio_write(GPIO_LCD_BL_N5V, GPIO_LEVEL_LOW); - - udelay(10000); - - /* Disable Backlight +5V. */ - gpio_write(GPIO_LCD_BL_P5V, GPIO_LEVEL_LOW); - - udelay(10000); - } - - /* Disable clocks. */ - car->rst_dev_h_set = 0x1010000; - car->clk_enb_h_clr = 0x1010000; - car->rst_dev_l_set = 0x18000000; - car->clk_enb_l_clr = 0x18000000; - - MAKE_DSI_REG(DSI_PAD_CONTROL_0) = (DSI_PAD_CONTROL_VS1_PULLDN_CLK | DSI_PAD_CONTROL_VS1_PULLDN(0xF) | DSI_PAD_CONTROL_VS1_PDIO_CLK | DSI_PAD_CONTROL_VS1_PDIO(0xF)); - MAKE_DSI_REG(DSI_POWER_CONTROL) = 0; - - if (!is_mariko) { - /* Backlight PWM. */ - gpio_configure_mode(GPIO_LCD_BL_PWM, GPIO_MODE_SFIO); - - pinmux->lcd_bl_pwm = ((pinmux->lcd_bl_pwm & ~PINMUX_TRISTATE) | PINMUX_TRISTATE); - pinmux->lcd_bl_pwm = (((pinmux->lcd_bl_pwm >> 2) << 2) | 1); - } -} - -void display_backlight(bool enable) { - if (g_lcd_vendor == 0x2050) { - int brightness = enable ? 100 : 0; - - /* Enable FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_ENABLE) = 2; - - /* Configure DSI_LINE_TYPE as FOUR */ - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 1; - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 9; - - /* Set and wait for FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - while ((MAKE_DI_REG(DC_CMD_INT_STATUS) & 2) != 0) { - /* Wait */ - } - - /* Configure display brightness. */ - const uint32_t brightness_val = ((0x7FF * brightness) / 100); - MAKE_DSI_REG(DSI_WR_DATA) = 0x339; - MAKE_DSI_REG(DSI_WR_DATA) = (brightness_val & 0x700) | ((brightness_val & 0xFF) << 16) | 0x51; - - /* Set and wait for FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - while ((MAKE_DI_REG(DC_CMD_INT_STATUS) & 2) != 0) { - /* Wait */ - } - - /* Set client sync point block reset. */ - MAKE_DSI_REG(DSI_INCR_SYNCPT_CNTRL) = 1; - udelay(300000); - - /* Clear client sync point block resest. */ - MAKE_DSI_REG(DSI_INCR_SYNCPT_CNTRL) = 0; - udelay(300000); - - /* Clear DSI_LINE_TYPE config. */ - MAKE_DSI_REG(DSI_VIDEO_MODE_CONTROL) = 0; - - /* Disable FRAME_END_INT */ - MAKE_DI_REG(DC_CMD_INT_ENABLE) = 0; - MAKE_DI_REG(DC_CMD_INT_STATUS) = 2; - } else { - /* Enable Backlight PWM. */ - gpio_write(GPIO_LCD_BL_PWM, enable ? GPIO_LEVEL_HIGH : GPIO_LEVEL_LOW); - } -} - -void display_color_screen(uint32_t color) { - do_register_writes(DI_BASE, display_config_solid_color, 8); - - /* Configure display to show single color. */ - MAKE_DI_REG(DC_WIN_AD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_WIN_BD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_WIN_CD_WIN_OPTIONS) = 0; - MAKE_DI_REG(DC_DISP_BLEND_BACKGROUND_COLOR) = color; - MAKE_DI_REG(DC_CMD_STATE_CONTROL) = ((MAKE_DI_REG(DC_CMD_STATE_CONTROL) & 0xFFFFFFFE) | GENERAL_ACT_REQ); - - udelay(35000); - - display_backlight(true); -} - -uint32_t *display_init_framebuffer(void *address) { - static register_write_t conf[sizeof(display_config_frame_buffer)/sizeof(register_write_t)] = {0}; - if (conf[0].value == 0) { - for (uint32_t i = 0; i < sizeof(display_config_frame_buffer)/sizeof(register_write_t); i++) { - conf[i] = display_config_frame_buffer[i]; - } - } - - uint32_t *lfb_addr = (uint32_t *)address; - conf[19].value = (uint32_t)address; - - /* This configures the framebuffer @ address with a resolution of 1280x720 (line stride 768). */ - do_register_writes(DI_BASE, conf, 32); - - udelay(35000); - - return lfb_addr; -} diff --git a/fusee/fusee-secondary/src/di.h b/fusee/fusee-secondary/src/di.h deleted file mode 100644 index 7bb62a1f3..000000000 --- a/fusee/fusee-secondary/src/di.h +++ /dev/null @@ -1,402 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_DI_H_ -#define FUSEE_DI_H_ - -#include -#include - -#define HOST1X_BASE 0x50000000 -#define DI_BASE 0x54200000 -#define DSI_BASE 0x54300000 -#define VIC_BASE 0x54340000 -#define MIPI_CAL_BASE 0x700E3000 -#define MAKE_HOST1X_REG(n) MAKE_REG32(HOST1X_BASE + n) -#define MAKE_DI_REG(n) MAKE_REG32(DI_BASE + n * 4) -#define MAKE_DSI_REG(n) MAKE_REG32(DSI_BASE + n * 4) -#define MAKE_MIPI_CAL_REG(n) MAKE_REG32(MIPI_CAL_BASE + n) -#define MAKE_VIC_REG(n) MAKE_REG32(VIC_BASE + n) - -/* Clock and reset registers. */ -#define CLK_RST_CONTROLLER_CLK_SOURCE_DISP1 0x138 -#define CLK_RST_CONTROLLER_PLLD_BASE 0xD0 -#define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8 -#define CLK_RST_CONTROLLER_PLLD_MISC 0xDC - -/* Display registers. */ -#define DC_CMD_GENERAL_INCR_SYNCPT 0x00 - -#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x01 -#define SYNCPT_CNTRL_NO_STALL (1 << 8) -#define SYNCPT_CNTRL_SOFT_RESET (1 << 0) - -#define DC_CMD_CONT_SYNCPT_VSYNC 0x28 -#define SYNCPT_VSYNC_ENABLE (1 << 8) - -#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031 - -#define DC_CMD_DISPLAY_COMMAND 0x32 -#define DISP_CTRL_MODE_STOP (0 << 5) -#define DISP_CTRL_MODE_C_DISPLAY (1 << 5) -#define DISP_CTRL_MODE_NC_DISPLAY (2 << 5) -#define DISP_CTRL_MODE_MASK (3 << 5) - -#define DC_CMD_DISPLAY_POWER_CONTROL 0x36 -#define PW0_ENABLE (1 << 0) -#define PW1_ENABLE (1 << 2) -#define PW2_ENABLE (1 << 4) -#define PW3_ENABLE (1 << 6) -#define PW4_ENABLE (1 << 8) -#define PM0_ENABLE (1 << 16) -#define PM1_ENABLE (1 << 18) - -#define DC_CMD_INT_STATUS 0x37 -#define DC_CMD_INT_MASK 0x38 -#define DC_CMD_INT_ENABLE 0x39 - -#define DC_CMD_STATE_ACCESS 0x40 -#define READ_MUX (1 << 0) -#define WRITE_MUX (1 << 2) - -#define DC_CMD_STATE_CONTROL 0x41 -#define GENERAL_ACT_REQ (1 << 0) -#define WIN_A_ACT_REQ (1 << 1) -#define WIN_B_ACT_REQ (1 << 2) -#define WIN_C_ACT_REQ (1 << 3) -#define CURSOR_ACT_REQ (1 << 7) -#define GENERAL_UPDATE (1 << 8) -#define WIN_A_UPDATE (1 << 9) -#define WIN_B_UPDATE (1 << 10) -#define WIN_C_UPDATE (1 << 11) -#define CURSOR_UPDATE (1 << 15) -#define NC_HOST_TRIG (1 << 24) - -#define DC_CMD_DISPLAY_WINDOW_HEADER 0x42 -#define WINDOW_A_SELECT (1 << 4) -#define WINDOW_B_SELECT (1 << 5) -#define WINDOW_C_SELECT (1 << 6) - -#define DC_CMD_REG_ACT_CONTROL 0x043 - -#define DC_COM_CRC_CONTROL 0x300 -#define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x)) -#define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) - -#define DC_COM_DSC_TOP_CTL 0x33E - -#define DC_DISP_DISP_WIN_OPTIONS 0x402 -#define HDMI_ENABLE (1 << 30) -#define DSI_ENABLE (1 << 29) -#define SOR1_TIMING_CYA (1 << 27) -#define SOR1_ENABLE (1 << 26) -#define SOR_ENABLE (1 << 25) -#define CURSOR_ENABLE (1 << 16) - -#define DC_DISP_DISP_MEM_HIGH_PRIORITY 0x403 -#define DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER 0x404 -#define DC_DISP_DISP_TIMING_OPTIONS 0x405 -#define DC_DISP_REF_TO_SYNC 0x406 -#define DC_DISP_SYNC_WIDTH 0x407 -#define DC_DISP_BACK_PORCH 0x408 -#define DC_DISP_ACTIVE 0x409 -#define DC_DISP_FRONT_PORCH 0x40A - -#define DC_DISP_DISP_CLOCK_CONTROL 0x42E -#define PIXEL_CLK_DIVIDER_PCD1 (0 << 8) -#define PIXEL_CLK_DIVIDER_PCD1H (1 << 8) -#define PIXEL_CLK_DIVIDER_PCD2 (2 << 8) -#define PIXEL_CLK_DIVIDER_PCD3 (3 << 8) -#define PIXEL_CLK_DIVIDER_PCD4 (4 << 8) -#define PIXEL_CLK_DIVIDER_PCD6 (5 << 8) -#define PIXEL_CLK_DIVIDER_PCD8 (6 << 8) -#define PIXEL_CLK_DIVIDER_PCD9 (7 << 8) -#define PIXEL_CLK_DIVIDER_PCD12 (8 << 8) -#define PIXEL_CLK_DIVIDER_PCD16 (9 << 8) -#define PIXEL_CLK_DIVIDER_PCD18 (10 << 8) -#define PIXEL_CLK_DIVIDER_PCD24 (11 << 8) -#define PIXEL_CLK_DIVIDER_PCD13 (12 << 8) -#define SHIFT_CLK_DIVIDER(x) ((x) & 0xff) - -#define DC_DISP_DISP_INTERFACE_CONTROL 0x42F -#define DISP_DATA_FORMAT_DF1P1C (0 << 0) -#define DISP_DATA_FORMAT_DF1P2C24B (1 << 0) -#define DISP_DATA_FORMAT_DF1P2C18B (2 << 0) -#define DISP_DATA_FORMAT_DF1P2C16B (3 << 0) -#define DISP_DATA_FORMAT_DF2S (4 << 0) -#define DISP_DATA_FORMAT_DF3S (5 << 0) -#define DISP_DATA_FORMAT_DFSPI (6 << 0) -#define DISP_DATA_FORMAT_DF1P3C24B (7 << 0) -#define DISP_DATA_FORMAT_DF1P3C18B (8 << 0) -#define DISP_ALIGNMENT_MSB (0 << 8) -#define DISP_ALIGNMENT_LSB (1 << 8) -#define DISP_ORDER_RED_BLUE (0 << 9) -#define DISP_ORDER_BLUE_RED (1 << 9) - -#define DC_DISP_DISP_COLOR_CONTROL 0x430 -#define DITHER_CONTROL_MASK (3 << 8) -#define DITHER_CONTROL_DISABLE (0 << 8) -#define DITHER_CONTROL_ORDERED (2 << 8) -#define DITHER_CONTROL_ERRDIFF (3 << 8) -#define BASE_COLOR_SIZE_MASK (0xf << 0) -#define BASE_COLOR_SIZE_666 (0 << 0) -#define BASE_COLOR_SIZE_111 (1 << 0) -#define BASE_COLOR_SIZE_222 (2 << 0) -#define BASE_COLOR_SIZE_333 (3 << 0) -#define BASE_COLOR_SIZE_444 (4 << 0) -#define BASE_COLOR_SIZE_555 (5 << 0) -#define BASE_COLOR_SIZE_565 (6 << 0) -#define BASE_COLOR_SIZE_332 (7 << 0) -#define BASE_COLOR_SIZE_888 (8 << 0) - -#define DC_DISP_SHIFT_CLOCK_OPTIONS 0x431 -#define SC1_H_QUALIFIER_NONE (1 << 16) -#define SC0_H_QUALIFIER_NONE (1 << 0) - -#define DC_DISP_DATA_ENABLE_OPTIONS 0x432 -#define DE_SELECT_ACTIVE_BLANK (0 << 0) -#define DE_SELECT_ACTIVE (1 << 0) -#define DE_SELECT_ACTIVE_IS (2 << 0) -#define DE_CONTROL_ONECLK (0 << 2) -#define DE_CONTROL_NORMAL (1 << 2) -#define DE_CONTROL_EARLY_EXT (2 << 2) -#define DE_CONTROL_EARLY (3 << 2) -#define DE_CONTROL_ACTIVE_BLANK (4 << 2) - -#define DC_DISP_DC_MCCIF_FIFOCTRL 0x480 -#define DC_DISP_BLEND_BACKGROUND_COLOR 0x4E4 - -#define DC_WIN_CSC_YOF 0x611 -#define DC_WIN_CSC_KYRGB 0x612 -#define DC_WIN_CSC_KUR 0x613 -#define DC_WIN_CSC_KVR 0x614 -#define DC_WIN_CSC_KUG 0x615 -#define DC_WIN_CSC_KVG 0x616 -#define DC_WIN_CSC_KUB 0x617 -#define DC_WIN_CSC_KVB 0x618 -#define DC_WIN_AD_WIN_OPTIONS 0xB80 -#define DC_WIN_BD_WIN_OPTIONS 0xD80 -#define DC_WIN_CD_WIN_OPTIONS 0xF80 - -/* The following registers are A/B/C shadows of the 0xB80/0xD80/0xF80 registers (see DISPLAY_WINDOW_HEADER). */ -#define DC_WIN_WIN_OPTIONS 0x700 -#define H_DIRECTION (1 << 0) -#define V_DIRECTION (1 << 2) -#define COLOR_EXPAND (1 << 6) -#define CSC_ENABLE (1 << 18) -#define WIN_ENABLE (1 << 30) - -#define DC_WIN_COLOR_DEPTH 0x703 -#define WIN_COLOR_DEPTH_P1 0x0 -#define WIN_COLOR_DEPTH_P2 0x1 -#define WIN_COLOR_DEPTH_P4 0x2 -#define WIN_COLOR_DEPTH_P8 0x3 -#define WIN_COLOR_DEPTH_B4G4R4A4 0x4 -#define WIN_COLOR_DEPTH_B5G5R5A 0x5 -#define WIN_COLOR_DEPTH_B5G6R5 0x6 -#define WIN_COLOR_DEPTH_AB5G5R5 0x7 -#define WIN_COLOR_DEPTH_B8G8R8A8 0xC -#define WIN_COLOR_DEPTH_R8G8B8A8 0xD -#define WIN_COLOR_DEPTH_B6x2G6x2R6x2A8 0xE -#define WIN_COLOR_DEPTH_R6x2G6x2B6x2A8 0xF -#define WIN_COLOR_DEPTH_YCbCr422 0x10 -#define WIN_COLOR_DEPTH_YUV422 0x11 -#define WIN_COLOR_DEPTH_YCbCr420P 0x12 -#define WIN_COLOR_DEPTH_YUV420P 0x13 -#define WIN_COLOR_DEPTH_YCbCr422P 0x14 -#define WIN_COLOR_DEPTH_YUV422P 0x15 -#define WIN_COLOR_DEPTH_YCbCr422R 0x16 -#define WIN_COLOR_DEPTH_YUV422R 0x17 -#define WIN_COLOR_DEPTH_YCbCr422RA 0x18 -#define WIN_COLOR_DEPTH_YUV422RA 0x19 - -#define DC_WIN_BUFFER_CONTROL 0x702 -#define DC_WIN_POSITION 0x704 - -#define DC_WIN_SIZE 0x705 -#define H_SIZE(x) (((x) & 0x1fff) << 0) -#define V_SIZE(x) (((x) & 0x1fff) << 16) - -#define DC_WIN_PRESCALED_SIZE 0x706 -#define H_PRESCALED_SIZE(x) (((x) & 0x7fff) << 0) -#define V_PRESCALED_SIZE(x) (((x) & 0x1fff) << 16) - -#define DC_WIN_H_INITIAL_DDA 0x707 -#define DC_WIN_V_INITIAL_DDA 0x708 - -#define DC_WIN_DDA_INC 0x709 -#define H_DDA_INC(x) (((x) & 0xffff) << 0) -#define V_DDA_INC(x) (((x) & 0xffff) << 16) - -#define DC_WIN_LINE_STRIDE 0x70A -#define DC_WIN_DV_CONTROL 0x70E -#define DC_WINBUF_BLEND_LAYER_CONTROL 0x716 - -/* The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER). */ -#define DC_WINBUF_START_ADDR 0x800 -#define DC_WINBUF_ADDR_H_OFFSET 0x806 -#define DC_WINBUF_ADDR_V_OFFSET 0x808 -#define DC_WINBUF_SURFACE_KIND 0x80B - -/* Display serial interface registers. */ -#define DSI_INCR_SYNCPT_CNTRL 0x1 - -#define DSI_RD_DATA 0x9 -#define DSI_WR_DATA 0xA - -#define DSI_POWER_CONTROL 0xB -#define DSI_POWER_CONTROL_ENABLE 1 - -#define DSI_INT_ENABLE 0xC -#define DSI_INT_STATUS 0xD -#define DSI_INT_MASK 0xE - -#define DSI_HOST_CONTROL 0xF -#define DSI_HOST_CONTROL_FIFO_RESET (1 << 21) -#define DSI_HOST_CONTROL_CRC_RESET (1 << 20) -#define DSI_HOST_CONTROL_TX_TRIG_SOL (0 << 12) -#define DSI_HOST_CONTROL_TX_TRIG_FIFO (1 << 12) -#define DSI_HOST_CONTROL_TX_TRIG_HOST (2 << 12) -#define DSI_HOST_CONTROL_RAW (1 << 6) -#define DSI_HOST_CONTROL_HS (1 << 5) -#define DSI_HOST_CONTROL_FIFO_SEL (1 << 4) -#define DSI_HOST_CONTROL_IMM_BTA (1 << 3) -#define DSI_HOST_CONTROL_PKT_BTA (1 << 2) -#define DSI_HOST_CONTROL_CS (1 << 1) -#define DSI_HOST_CONTROL_ECC (1 << 0) - -#define DSI_CONTROL 0x10 -#define DSI_CONTROL_HS_CLK_CTRL (1 << 20) -#define DSI_CONTROL_CHANNEL(c) (((c) & 0x3) << 16) -#define DSI_CONTROL_FORMAT(f) (((f) & 0x3) << 12) -#define DSI_CONTROL_TX_TRIG(x) (((x) & 0x3) << 8) -#define DSI_CONTROL_LANES(n) (((n) & 0x3) << 4) -#define DSI_CONTROL_DCS_ENABLE (1 << 3) -#define DSI_CONTROL_SOURCE(s) (((s) & 0x1) << 2) -#define DSI_CONTROL_VIDEO_ENABLE (1 << 1) -#define DSI_CONTROL_HOST_ENABLE (1 << 0) - -#define DSI_SOL_DELAY 0x11 -#define DSI_MAX_THRESHOLD 0x12 - -#define DSI_TRIGGER 0x13 -#define DSI_TRIGGER_HOST (1 << 1) -#define DSI_TRIGGER_VIDEO (1 << 0) - -#define DSI_TX_CRC 0x14 -#define DSI_STATUS 0x15 -#define DSI_INIT_SEQ_CONTROL 0x1A -#define DSI_INIT_SEQ_DATA_0 0x1B -#define DSI_INIT_SEQ_DATA_1 0x1C -#define DSI_INIT_SEQ_DATA_2 0x1D -#define DSI_INIT_SEQ_DATA_3 0x1E -#define DSI_PKT_SEQ_0_LO 0x23 -#define DSI_PKT_SEQ_0_HI 0x24 -#define DSI_PKT_SEQ_1_LO 0x25 -#define DSI_PKT_SEQ_1_HI 0x26 -#define DSI_PKT_SEQ_2_LO 0x27 -#define DSI_PKT_SEQ_2_HI 0x28 -#define DSI_PKT_SEQ_3_LO 0x29 -#define DSI_PKT_SEQ_3_HI 0x2A -#define DSI_PKT_SEQ_4_LO 0x2B -#define DSI_PKT_SEQ_4_HI 0x2C -#define DSI_PKT_SEQ_5_LO 0x2D -#define DSI_PKT_SEQ_5_HI 0x2E -#define DSI_DCS_CMDS 0x33 -#define DSI_PKT_LEN_0_1 0x34 -#define DSI_PKT_LEN_2_3 0x35 -#define DSI_PKT_LEN_4_5 0x36 -#define DSI_PKT_LEN_6_7 0x37 -#define DSI_PHY_TIMING_0 0x3C -#define DSI_PHY_TIMING_1 0x3D -#define DSI_PHY_TIMING_2 0x3E -#define DSI_BTA_TIMING 0x3F - -#define DSI_TIMEOUT_0 0x44 -#define DSI_TIMEOUT_LRX(x) (((x) & 0xffff) << 16) -#define DSI_TIMEOUT_HTX(x) (((x) & 0xffff) << 0) - -#define DSI_TIMEOUT_1 0x45 -#define DSI_TIMEOUT_PR(x) (((x) & 0xffff) << 16) -#define DSI_TIMEOUT_TA(x) (((x) & 0xffff) << 0) - -#define DSI_TO_TALLY 0x46 - -#define DSI_PAD_CONTROL_0 0x4B -#define DSI_PAD_CONTROL_VS1_PULLDN_CLK (1 << 24) -#define DSI_PAD_CONTROL_VS1_PULLDN(x) (((x) & 0xf) << 16) -#define DSI_PAD_CONTROL_VS1_PDIO_CLK (1 << 8) -#define DSI_PAD_CONTROL_VS1_PDIO(x) (((x) & 0xf) << 0) - -#define DSI_PAD_CONTROL_CD 0x4C -#define DSI_VIDEO_MODE_CONTROL 0x4E - -#define DSI_PAD_CONTROL_1 0x4F -#define DSI_PAD_CONTROL_2 0x50 - -#define DSI_PAD_CONTROL_3 0x51 -#define DSI_PAD_PREEMP_PD_CLK(x) (((x) & 0x3) << 12) -#define DSI_PAD_PREEMP_PU_CLK(x) (((x) & 0x3) << 8) -#define DSI_PAD_PREEMP_PD(x) (((x) & 0x3) << 4) -#define DSI_PAD_PREEMP_PU(x) (((x) & 0x3) << 0) - -#define DSI_PAD_CONTROL_4 0x52 -#define DSI_PAD_CONTROL_5_MARIKO 0x53 -#define DSI_PAD_CONTROL_6_MARIKO 0x54 -#define DSI_PAD_CONTROL_7_MARIKO 0x55 -#define DSI_INIT_SEQ_DATA_15 0x5F -#define DSI_INIT_SEQ_DATA_15_MARIKO 0x62 - -/* MIPI calibration registers. */ -#define MIPI_CAL_MIPI_CAL_CTRL 0x0 -#define MIPI_CAL_MIPI_CAL_AUTOCAL_CTRL0 0x4 -#define MIPI_CAL_CIL_MIPI_CAL_STATUS 0x8 -#define MIPI_CAL_CIL_MIPI_CAL_STATUS_2 0xC -#define MIPI_CAL_CILA_MIPI_CAL_CONFIG 0x14 -#define MIPI_CAL_CILB_MIPI_CAL_CONFIG 0x18 -#define MIPI_CAL_CILC_MIPI_CAL_CONFIG 0x1C -#define MIPI_CAL_CILD_MIPI_CAL_CONFIG 0x20 -#define MIPI_CAL_CILE_MIPI_CAL_CONFIG 0x24 -#define MIPI_CAL_CILF_MIPI_CAL_CONFIG 0x28 -#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG 0x38 -#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG 0x3C -#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG 0x40 -#define MIPI_CAL_DSID_MIPI_CAL_CONFIG 0x44 -#define MIPI_CAL_MIPI_BIAS_PAD_CFG0 0x58 -#define MIPI_CAL_MIPI_BIAS_PAD_CFG1 0x5C -#define MIPI_CAL_MIPI_BIAS_PAD_CFG2 0x60 -#define MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2 0x64 -#define MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2 0x68 -#define MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2 0x70 -#define MIPI_CAL_DSID_MIPI_CAL_CONFIG_2 0x74 - -void display_init(void); -void display_end(void); - -uint16_t display_get_lcd_vendor(void); - -/* Switches screen backlight ON/OFF. */ -void display_backlight(bool enable); - -/* Show one single color on the display. */ -void display_color_screen(uint32_t color); - -/* Init display in full 1280x720 resolution (B8G8R8A8, line stride 768, framebuffer size = 1280*768*4 bytes). */ -uint32_t *display_init_framebuffer(void *address); - -#endif diff --git a/fusee/fusee-secondary/src/di.inl b/fusee/fusee-secondary/src/di.inl deleted file mode 100644 index 3ea8dc5df..000000000 --- a/fusee/fusee-secondary/src/di.inl +++ /dev/null @@ -1,773 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -typedef struct { - uint32_t offset; - uint32_t value; -} register_write_t; - -typedef struct { - uint16_t kind; - uint16_t offset; - uint32_t value; -} dsi_sleep_or_register_write_t; - -static const uint32_t display_config_frame_buffer_address = 0xC0000000; - -static const register_write_t display_config_plld_01_erista[4] = { - {CLK_RST_CONTROLLER_CLK_SOURCE_DISP1, 0x40000000}, - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4830A001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000020}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002D0AAA}, -}; - -static const register_write_t display_config_plld_01_mariko[4] = { - {CLK_RST_CONTROLLER_CLK_SOURCE_DISP1, 0x40000000}, - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4830A001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000000}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002DFC00}, -}; - -static const register_write_t display_config_dc_01[94] = { - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_REG_ACT_CONTROL, 0x54}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_DISP_DC_MCCIF_FIFOCTRL, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_MEM_HIGH_PRIORITY, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_POWER_CONTROL, PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | PW4_ENABLE | PM0_ENABLE | PM1_ENABLE}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT_CNTRL, SYNCPT_CNTRL_NO_STALL}, - {sizeof(uint32_t) * DC_CMD_CONT_SYNCPT_VSYNC, SYNCPT_VSYNC_ENABLE | 0x9}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(3), 0}, - {sizeof(uint32_t) * DC_DISP_BLEND_BACKGROUND_COLOR, 0}, - {sizeof(uint32_t) * DC_COM_CRC_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, -}; - -static const register_write_t display_config_dsi_01_init_01[8] = { - {sizeof(uint32_t) * DSI_WR_DATA, 0x0}, - {sizeof(uint32_t) * DSI_INT_ENABLE, 0x0}, - {sizeof(uint32_t) * DSI_INT_STATUS, 0x0}, - {sizeof(uint32_t) * DSI_INT_MASK, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_0, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_1, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_2, 0x0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_3, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_02_erista[1] = { - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_02_mariko[1] = { - {sizeof(uint32_t) * DSI_INIT_SEQ_DATA_15_MARIKO, 0x0}, -}; - -static const register_write_t display_config_dsi_01_init_03[14] = { - {sizeof(uint32_t) * DSI_DCS_CMDS, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_LO, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_HI, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0}, - {sizeof(uint32_t) * DSI_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_01_init_04_erista[0] = { - /* No register writes. */ -}; - -static const register_write_t display_config_dsi_01_init_04_mariko[7] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_5_MARIKO, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_6_MARIKO, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0}, -}; - -static const register_write_t display_config_dsi_01_init_05[10] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_CD, 0}, - {sizeof(uint32_t) * DSI_SOL_DELAY, 0x18}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_0_1, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_2_3, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_4_5, 0}, - {sizeof(uint32_t) * DSI_PKT_LEN_6_7, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_06[12] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30109}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_0, DSI_PAD_CONTROL_VS1_PULLDN(0) | DSI_PAD_CONTROL_VS1_PDIO(0)}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_07[14] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30118}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x1343) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x40}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_TX_CRC, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_phy_timing_erista[1] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_0, 0x6070601}, -}; - -static const register_write_t display_config_dsi_phy_timing_mariko[1] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_0, 0x6070603}, -}; - -static const dsi_sleep_or_register_write_t display_config_jdi_specific_init_01[48] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xBD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1939}, - {0, DSI_WR_DATA, 0xAAAAAAD8}, - {0, DSI_WR_DATA, 0xAAAAAAEB}, - {0, DSI_WR_DATA, 0xAAEBAAAA}, - {0, DSI_WR_DATA, 0xAAAAAAAA}, - {0, DSI_WR_DATA, 0xAAAAAAEB}, - {0, DSI_WR_DATA, 0xAAEBAAAA}, - {0, DSI_WR_DATA, 0xAA}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1BD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2739}, - {0, DSI_WR_DATA, 0xFFFFFFD8}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFF}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2BD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xF39}, - {0, DSI_WR_DATA, 0xFFFFFFD8}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFFFF}, - {0, DSI_WR_DATA, 0xFFFFFF}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xBD15}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x6D915}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_nx_abca2_specific_init_01[14] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x739}, - {0, DSI_WR_DATA, 0x751548B1}, - {0, DSI_WR_DATA, 0x143209}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abca2_specific_init_01[14] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x739}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x143209}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_auo_40_nx_abcc_specific_init_01[5] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x78, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_50_nx_abcd_specific_init_01[13] = { - {0, DSI_WR_DATA, 0x1105}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0xB4, 0}, - {0, DSI_WR_DATA, 0xA015}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x205315}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x339}, - {0, DSI_WR_DATA, 0xFF0751}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0x2905}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const register_write_t display_config_plld_02_erista[3] = { - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4810c001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000020}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002D0AAA}, -}; - -static const register_write_t display_config_plld_02_mariko[3] = { - {CLK_RST_CONTROLLER_PLLD_BASE, 0x4810c001}, - {CLK_RST_CONTROLLER_PLLD_MISC1, 0x00000000}, - {CLK_RST_CONTROLLER_PLLD_MISC, 0x002DFC00}, -}; - -static const register_write_t display_config_dsi_01_init_08[1] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_init_09[19] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30172}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xA40)}, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x5A2F) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_PKT_SEQ_0_LO, 0x40000208}, - {sizeof(uint32_t) * DSI_PKT_SEQ_2_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_4_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_1_LO, 0x40000308}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_LO, 0x3F3B2B08}, - {sizeof(uint32_t) * DSI_PKT_SEQ_3_HI, 0x2CC}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_LO, 0x3F3B2B08}, - {sizeof(uint32_t) * DSI_PKT_SEQ_5_HI, 0x2CC}, - {sizeof(uint32_t) * DSI_PKT_LEN_0_1, 0xCE0000}, - {sizeof(uint32_t) * DSI_PKT_LEN_2_3, 0x87001A2}, - {sizeof(uint32_t) * DSI_PKT_LEN_4_5, 0x190}, - {sizeof(uint32_t) * DSI_PKT_LEN_6_7, 0x190}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, 0}, -}; - -static const register_write_t display_config_dsi_01_init_10[10] = { - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_CONTROL, 0}, - {sizeof(uint32_t) * DSI_SOL_DELAY, 6}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x1E0}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_FIFO_SEL| DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_HS_CLK_CTRL | DSI_CONTROL_FORMAT(3) | DSI_CONTROL_LANES(3) | DSI_CONTROL_VIDEO_ENABLE}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC} -}; - -static const register_write_t display_config_dsi_01_init_11_erista[4] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, DSI_PAD_PREEMP_PD_CLK(0x3) | DSI_PAD_PREEMP_PU_CLK(0x3) | DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3)}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0} -}; - -static const register_write_t display_config_dsi_01_init_11_mariko[7] = { - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_2, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_3, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_4, 0x77777}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_5_MARIKO, 0x77777}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_6_MARIKO, DSI_PAD_PREEMP_PD_CLK(0x1) | DSI_PAD_PREEMP_PU_CLK(0x1) | DSI_PAD_PREEMP_PD(0x01) | DSI_PAD_PREEMP_PU(0x1)}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_7_MARIKO, 0}, -}; - -static const register_write_t display_config_mipi_cal_01[4] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0}, - {MIPI_CAL_CIL_MIPI_CAL_STATUS, 0xF3F10000}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG0, 1}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0}, -}; - -static const register_write_t display_config_mipi_cal_02_erista[2] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0x10010}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG1, 0x300}, -}; - -static const register_write_t display_config_mipi_cal_02_mariko[2] = { - {MIPI_CAL_MIPI_BIAS_PAD_CFG2, 0x10010}, - {MIPI_CAL_MIPI_BIAS_PAD_CFG1, 0}, -}; - -static const register_write_t display_config_mipi_cal_03_erista[6] = { - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200200}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200200}, - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x200002}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x200002}, - {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, -}; - -static const register_write_t display_config_mipi_cal_03_mariko[6] = { - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG, 0x200006}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG, 0x200006}, - {MIPI_CAL_DSIA_MIPI_CAL_CONFIG_2, 0x260000}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0x260000}, - {MIPI_CAL_CILA_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILB_MIPI_CAL_CONFIG, 0}, -}; - -static const register_write_t display_config_mipi_cal_04[10] = { - {MIPI_CAL_CILC_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILD_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILE_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_CILF_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSIC_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSID_MIPI_CAL_CONFIG, 0}, - {MIPI_CAL_DSIB_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_DSIC_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_DSID_MIPI_CAL_CONFIG_2, 0}, - {MIPI_CAL_MIPI_CAL_CTRL, 0x2A000001}, -}; - -static const register_write_t display_config_dc_02[113] = { - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_DV_CONTROL, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_CSC_YOF, 0xF0}, - {sizeof(uint32_t) * DC_WIN_CSC_KYRGB, 0x12A}, - {sizeof(uint32_t) * DC_WIN_CSC_KUR, 0}, - {sizeof(uint32_t) * DC_WIN_CSC_KVR, 0x198}, - {sizeof(uint32_t) * DC_WIN_CSC_KUG, 0x39B}, - {sizeof(uint32_t) * DC_WIN_CSC_KVG, 0x32F}, - {sizeof(uint32_t) * DC_WIN_CSC_KUB, 0x204}, - {sizeof(uint32_t) * DC_WIN_CSC_KVB, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(1), 0x1000000}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_POLARITY(3), 0}, - {sizeof(uint32_t) * DC_DISP_BLEND_BACKGROUND_COLOR, 0}, - {sizeof(uint32_t) * DC_COM_CRC_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WINBUF_BLEND_LAYER_CONTROL, 0x10000FF}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE | WIN_B_UPDATE | WIN_C_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ | WIN_B_ACT_REQ | WIN_C_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_TIMING_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_REF_TO_SYNC, (1 << 16)}, - {sizeof(uint32_t) * DC_DISP_SYNC_WIDTH, 0x10048}, - {sizeof(uint32_t) * DC_DISP_BACK_PORCH, 0x90048}, - {sizeof(uint32_t) * DC_DISP_ACTIVE, 0x50002D0}, - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_DISP_SHIFT_CLOCK_OPTIONS, SC1_H_QUALIFIER_NONE | SC0_H_QUALIFIER_NONE}, - {sizeof(uint32_t) * DC_COM_PIN_OUTPUT_ENABLE(1), 0}, - {sizeof(uint32_t) * DC_DISP_DATA_ENABLE_OPTIONS, DE_SELECT_ACTIVE | DE_CONTROL_NORMAL}, - {sizeof(uint32_t) * DC_DISP_DISP_INTERFACE_CONTROL, DISP_DATA_FORMAT_DF1P1C}, - {sizeof(uint32_t) * DC_DISP_DISP_CLOCK_CONTROL, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, READ_MUX | WRITE_MUX}, - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_CLOCK_CONTROL, PIXEL_CLK_DIVIDER_PCD1 | SHIFT_CLK_DIVIDER(4)}, - {sizeof(uint32_t) * DC_DISP_DISP_COLOR_CONTROL, BASE_COLOR_SIZE_888}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND_OPTION0, 0}, -}; - -static const register_write_t display_config_frame_buffer[32] = { - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_COLOR_DEPTH, WIN_COLOR_DEPTH_B8G8R8A8}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_WIN_POSITION, 0}, - {sizeof(uint32_t) * DC_WIN_H_INITIAL_DDA, 0}, - {sizeof(uint32_t) * DC_WIN_V_INITIAL_DDA, 0}, - {sizeof(uint32_t) * DC_WIN_PRESCALED_SIZE, V_PRESCALED_SIZE(1280) | H_PRESCALED_SIZE(2880)}, - {sizeof(uint32_t) * DC_WIN_DDA_INC, V_DDA_INC(0x1000) | H_DDA_INC(0x1000)}, - {sizeof(uint32_t) * DC_WIN_SIZE, V_SIZE(1280) | H_SIZE(720)}, - {sizeof(uint32_t) * DC_WIN_LINE_STRIDE, 0x6000C00}, - {sizeof(uint32_t) * DC_WIN_BUFFER_CONTROL, 0}, - {sizeof(uint32_t) * DC_WINBUF_SURFACE_KIND, 0}, - {sizeof(uint32_t) * DC_WINBUF_START_ADDR, display_config_frame_buffer_address}, - {sizeof(uint32_t) * DC_WINBUF_ADDR_H_OFFSET, 0}, - {sizeof(uint32_t) * DC_WINBUF_ADDR_V_OFFSET, 0}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, WIN_ENABLE}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE | WIN_A_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ | WIN_A_ACT_REQ}, -}; - -static const register_write_t display_config_solid_color[8] = { - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_A_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_B_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_WINDOW_HEADER, WINDOW_C_SELECT}, - {sizeof(uint32_t) * DC_WIN_WIN_OPTIONS, 0}, - {sizeof(uint32_t) * DC_DISP_DISP_WIN_OPTIONS, DSI_ENABLE}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_C_DISPLAY}, -}; - -static const register_write_t display_config_dc_01_fini_01[13] = { - {sizeof(uint32_t) * DC_DISP_FRONT_PORCH, 0xA0088}, - {sizeof(uint32_t) * DC_CMD_INT_MASK, 0}, - {sizeof(uint32_t) * DC_CMD_STATE_ACCESS, 0}, - {sizeof(uint32_t) * DC_CMD_INT_ENABLE, 0}, - {sizeof(uint32_t) * DC_CMD_CONT_SYNCPT_VSYNC, 0}, - {sizeof(uint32_t) * DC_CMD_DISPLAY_COMMAND, DISP_CTRL_MODE_STOP}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_GENERAL_INCR_SYNCPT, 0x301}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_UPDATE}, - {sizeof(uint32_t) * DC_CMD_STATE_CONTROL, GENERAL_ACT_REQ}, -}; - -static const register_write_t display_config_dsi_01_fini_01[2] = { - {sizeof(uint32_t) * DSI_POWER_CONTROL, 0}, - {sizeof(uint32_t) * DSI_PAD_CONTROL_1, 0}, -}; - -static const register_write_t display_config_dsi_01_fini_02[13] = { - {sizeof(uint32_t) * DSI_PHY_TIMING_1, 0x40A0E05}, - {sizeof(uint32_t) * DSI_PHY_TIMING_2, 0x30109}, - {sizeof(uint32_t) * DSI_BTA_TIMING, 0x190A14}, - {sizeof(uint32_t) * DSI_TIMEOUT_0, DSI_TIMEOUT_LRX(0x2000) | DSI_TIMEOUT_HTX(0xFFFF) }, - {sizeof(uint32_t) * DSI_TIMEOUT_1, DSI_TIMEOUT_PR(0x765) | DSI_TIMEOUT_TA(0x2000)}, - {sizeof(uint32_t) * DSI_TO_TALLY, 0}, - {sizeof(uint32_t) * DSI_HOST_CONTROL, DSI_HOST_CONTROL_CRC_RESET | DSI_HOST_CONTROL_TX_TRIG_HOST | DSI_HOST_CONTROL_CS | DSI_HOST_CONTROL_ECC}, - {sizeof(uint32_t) * DSI_CONTROL, DSI_CONTROL_LANES(3) | DSI_CONTROL_HOST_ENABLE}, - {sizeof(uint32_t) * DSI_POWER_CONTROL, DSI_POWER_CONTROL_ENABLE}, - {sizeof(uint32_t) * DSI_MAX_THRESHOLD, 0x40}, - {sizeof(uint32_t) * DSI_TRIGGER, 0}, - {sizeof(uint32_t) * DSI_TX_CRC, 0}, - {sizeof(uint32_t) * DSI_INIT_SEQ_CONTROL, 0} -}; - -static const dsi_sleep_or_register_write_t display_config_jdi_specific_fini_01[22] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2139}, - {0, DSI_WR_DATA, 0x191919D5}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x4F0F41B1}, - {0, DSI_WR_DATA, 0xF179A433}, - {0, DSI_WR_DATA, 0x2D81}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abca2_specific_fini_01[38] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2C39}, - {0, DSI_WR_DATA, 0x191919D5}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x2C39}, - {0, DSI_WR_DATA, 0x191919D6}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_WR_DATA, 0x19191919}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x114D31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0xB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_innolux_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x751548B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x115631}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_auo_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x711148B1}, - {0, DSI_WR_DATA, 0x71143209}, - {0, DSI_WR_DATA, 0x114D31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; - -static const dsi_sleep_or_register_write_t display_config_40_nx_abcc_specific_fini_01[10] = { - {0, DSI_WR_DATA, 0x439}, - {0, DSI_WR_DATA, 0x9483FFB9}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, - {0, DSI_WR_DATA, 0xB39}, - {0, DSI_WR_DATA, 0x731348B1}, - {0, DSI_WR_DATA, 0x71243209}, - {0, DSI_WR_DATA, 0x4C31}, - {0, DSI_TRIGGER, DSI_TRIGGER_HOST}, - {1, 0x5, 0}, -}; \ No newline at end of file diff --git a/fusee/fusee-secondary/src/emc.h b/fusee/fusee-secondary/src/emc.h deleted file mode 100644 index dbf61c716..000000000 --- a/fusee/fusee-secondary/src/emc.h +++ /dev/null @@ -1,1138 +0,0 @@ -/* - * arch/arm/mach-tegra/tegra21_emc.h - * - * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - */ - -#ifndef FUSEE_EMC_H_ -#define FUSEE_EMC_H_ - -#define EMC_BASE 0x7001B000 -#define EMC0_BASE 0x7001E000 -#define EMC1_BASE 0x7001F000 -#define MAKE_EMC_REG(n) MAKE_REG32(EMC_BASE + n) -#define MAKE_EMC0_REG(n) MAKE_REG32(EMC0_BASE + n) -#define MAKE_EMC1_REG(n) MAKE_REG32(EMC1_BASE + n) - -#define EMC_INTSTATUS 0x0 -#define EMC_INTSTATUS_MRR_DIVLD (0x1 << 5) -#define EMC_INTSTATUS_CLKCHANGE_COMPLETE (0x1 << 4) - -#define EMC_INTMASK 0x4 -#define EMC_DBG 0x8 -#define EMC_DBG_WRITE_MUX_ACTIVE (1 << 1) -#define EMC_DBG_CFG_SWAP_SHIFT 26 -#define EMC_DBG_CFG_SWAP_MASK \ - (0x3 << EMC_DBG_CFG_SWAP_SHIFT) -#define EMC_DBG_WRITE_ACTIVE_ONLY (1 << 30) - -#define EMC_CONFIG_SAMPLE_DELAY 0x5f0 -#define EMC_CFG_UPDATE 0x5f4 -#define EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_SHIFT 9 -#define EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_MASK \ - (0x3 << EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_SHIFT) -#define EMC_CFG 0xc -#define EMC_CFG_DRAM_CLKSTOP_PD (1 << 31) -#define EMC_CFG_DRAM_CLKSTOP_SR (1 << 30) -#define EMC_CFG_DRAM_ACPD (1 << 29) -#define EMC_CFG_DYN_SELF_REF (1 << 28) -#define EMC_CFG_REQACT_ASYNC (1 << 26) -#define EMC_CFG_AUTO_PRE_WR (1 << 25) -#define EMC_CFG_AUTO_PRE_RD (1 << 24) -#define EMC_CFG_MAM_PRE_WR (1 << 23) -#define EMC_CFG_MAN_PRE_RD (1 << 22) -#define EMC_CFG_PERIODIC_QRST (1 << 21) -#define EMC_CFG_PERIODIC_QRST_SHIFT (21) -#define EMC_CFG_EN_DYNAMIC_PUTERM (1 << 20) -#define EMC_CFG_DLY_WR_DQ_HALF_CLOCK (1 << 19) -#define EMC_CFG_DSR_VTTGEN_DRV_EN (1 << 18) -#define EMC_CFG_EMC2MC_CLK_RATIO (3 << 16) -#define EMC_CFG_WAIT_FOR_ISP2B_READY_B4_CC (1 << 9) -#define EMC_CFG_WAIT_FOR_VI2_READY_B4_CC (1 << 8) -#define EMC_CFG_WAIT_FOR_ISP2_READY_B4_CC (1 << 7) -#define EMC_CFG_INVERT_DQM (1 << 6) -#define EMC_CFG_WAIT_FOR_DISPLAYB_READY_B4_CC (1 << 5) -#define EMC_CFG_WAIT_FOR_DISPLAY_READY_B4_CC (1 << 4) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_DATAPIPE2 (1 << 3) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_DATAPIPE1 (1 << 2) -#define EMC_CFG_EMC2PMACRO_CFG_BYPASS_ADDRPIPE (1 << 1) - -#define EMC_ADR_CFG 0x10 -#define EMC_REFCTRL 0x20 -#define EMC_REFCTRL_DEV_SEL_SHIFT 0 -#define EMC_REFCTRL_DEV_SEL_MASK \ - (0x3 << EMC_REFCTRL_DEV_SEL_SHIFT) -#define EMC_REFCTRL_ENABLE (0x1 << 31) -#define EMC_REFCTRL_ENABLE_ALL(num) \ - (((((num) > 1) ? 0 : 2) << EMC_REFCTRL_DEV_SEL_SHIFT) \ - | EMC_REFCTRL_ENABLE) -#define EMC_REFCTRL_DISABLE_ALL(num) \ - ((((num) > 1) ? 0 : 2) << EMC_REFCTRL_DEV_SEL_SHIFT) - -#define EMC_PIN 0x24 -#define EMC_PIN_PIN_CKE_PER_DEV (1 << 2) -#define EMC_PIN_PIN_CKEB (1 << 1) -#define EMC_PIN_PIN_CKE (1 << 0) - -#define EMC_CLK_FORCE_CC_TRIGGER (1 << 27) - -#define EMC_TIMING_CONTROL 0x28 -#define EMC_RC 0x2c -#define EMC_RFC 0x30 -#define EMC_RFCPB 0x590 -#define EMC_RAS 0x34 -#define EMC_RP 0x38 -#define EMC_R2W 0x3c -#define EMC_W2R 0x40 -#define EMC_R2P 0x44 -#define EMC_W2P 0x48 -#define EMC_CCDMW 0x5c0 -#define EMC_RD_RCD 0x4c -#define EMC_WR_RCD 0x50 -#define EMC_RRD 0x54 -#define EMC_REXT 0x58 -#define EMC_WDV 0x5c -#define EMC_QUSE 0x60 -#define EMC_QRST 0x64 -#define EMC_ISSUE_QRST 0x428 -#define EMC_QSAFE 0x68 -#define EMC_RDV 0x6c -#define EMC_REFRESH 0x70 -#define EMC_BURST_REFRESH_NUM 0x74 -#define EMC_PDEX2WR 0x78 -#define EMC_PDEX2RD 0x7c -#define EMC_PDEX2CKE 0x118 -#define EMC_PCHG2PDEN 0x80 -#define EMC_ACT2PDEN 0x84 -#define EMC_AR2PDEN 0x88 -#define EMC_RW2PDEN 0x8c -#define EMC_CKE2PDEN 0x11c -#define EMC_TXSR 0x90 -#define EMC_TCKE 0x94 -#define EMC_TFAW 0x98 -#define EMC_TRPAB 0x9c -#define EMC_TCLKSTABLE 0xa0 -#define EMC_TCLKSTOP 0xa4 -#define EMC_TREFBW 0xa8 -#define EMC_TPPD 0xac -#define EMC_PDEX2MRR 0xb4 -#define EMC_ODT_WRITE 0xb0 -#define EMC_WEXT 0xb8 -#define EMC_RFC_SLR 0xc0 -#define EMC_MRS_WAIT_CNT2 0xc4 -#define EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_SHIFT 16 -#define EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_MASK \ - (0x7ff << EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_SHIFT) -#define EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_SHIFT 0 -#define EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_MASK \ - (0x3ff << EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_SHIFT) - -#define EMC_MRS_WAIT_CNT 0xc8 -#define EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT 0 -#define EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK \ - (0x3FF << EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT) -#define EMC_MRS_WAIT_CNT_LONG_WAIT_SHIFT 16 -#define EMC_MRS_WAIT_CNT_LONG_WAIT_MASK \ - (0x3FF << EMC_MRS_WAIT_CNT_LONG_WAIT_SHIFT) - -#define EMC_MRS 0xcc -#define EMC_MODE_SET_DLL_RESET (1 << 8) -#define EMC_MRS_USE_MRS_LONG_CNT (1 << 26) - -#define EMC_EMRS 0xd0 -#define EMC_EMRS_USE_EMRS_LONG_CNT (1 << 26) - -#define EMC_REF 0xd4 -#define EMC_REF_FORCE_CMD 1 - -#define EMC_PRE 0xd8 -#define EMC_NOP 0xdc -#define EMC_SELF_REF 0xe0 -#define EMC_SELF_REF_CMD_ENABLED (1 << 0) -#define EMC_SELF_REF_ACTIVE_SELF_REF (1 << 8) -#define EMC_SELF_REF_DEV_SEL_SHIFT 30 -#define EMC_SELF_REF_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) - -#define EMC_DPD 0xe4 -#define EMC_MRW 0xe8 -#define EMC_MRW_MRW_OP_SHIFT 0 -#define EMC_MRW_MRW_OP_MASK \ - (0xff << EMC_MRW_MRW_OP_SHIFT) -#define EMC_MRW_MRW_MA_SHIFT 16 -#define EMC_MRW_MRW_MA_MASK \ - (0xff << EMC_MRW_MRW_MA_SHIFT) -#define EMC_MRW_USE_MRW_LONG_CNT 26 -#define EMC_MRW_USE_MRW_EXT_CNT 27 -#define EMC_MRW_MRW_DEV_SELECTN_SHIFT 30 -#define EMC_MRW_MRW_DEV_SELECTN_MASK \ - (0x3 << EMC_MRW_MRW_DEV_SELECTN_SHIFT) - -#define EMC_MRR 0xec -#define EMC_MRR_DEV_SEL_SHIFT 30 -#define EMC_MRR_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) -#define EMC_MRR_MA_SHIFT 16 -#define EMC_MRR_MA_MASK \ - (0xff << EMC_MRR_MA_SHIFT) -#define EMC_MRR_DATA_SHIFT 0 -#define EMC_MRR_DATA_MASK \ - (0xffff << EMC_MRR_DATA_SHIFT) -#define LPDDR2_MR4_TEMP_SHIFT 0 -#define LPDDR2_MR4_TEMP_MASK \ - (0x7 << LPDDR2_MR4_TEMP_SHIFT) - -#define EMC_CMDQ 0xf0 -#define EMC_MC2EMCQ 0xf4 -#define EMC_FBIO_SPARE 0x100 -#define EMC_FBIO_CFG5 0x104 -#define EMC_FBIO_CFG5_DRAM_TYPE_SHIFT 0 -#define EMC_FBIO_CFG5_DRAM_TYPE_MASK \ - (0x3 << EMC_FBIO_CFG5_DRAM_TYPE_SHIFT) -#define EMC_FBIO_CFG5_CMD_TX_DIS (1 << 8) -#define EMC_FBIO_CFG5_CMD_BUS_RETURN_TO_ZERO (1 << 27) - -#define EMC_CFG5_QUSE_MODE_SHIFT 13 -#define EMC_CFG5_QUSE_MODE_MASK \ - (0x7 << EMC_CFG5_QUSE_MODE_SHIFT) - -#define EMC_CFG_RSV 0x120 -#define EMC_ACPD_CONTROL 0x124 -#define EMC_MPC 0x128 -#define EMC_EMRS2 0x12c -#define EMC_EMRS2_USE_EMRS2_LONG_CNT (1 << 26) - -#define EMC_EMRS3 0x130 -#define EMC_MRW2 0x134 -#define EMC_MRW3 0x138 -#define EMC_MRW4 0x13c -#define EMC_MRW5 0x4a0 -#define EMC_MRW6 0x4a4 -#define EMC_MRW7 0x4a8 -#define EMC_MRW8 0x4ac -#define EMC_MRW9 0x4b0 -#define EMC_MRW10 0x4b4 -#define EMC_MRW11 0x4b8 -#define EMC_MRW12 0x4bc -#define EMC_MRW13 0x4c0 -#define EMC_MRW14 0x4c4 -#define EMC_MRW15 0x4d0 -#define EMC_CFG_SYNC 0x4d4 -#define EMC_CLKEN_OVERRIDE 0x140 -#define EMC_R2R 0x144 -#define EMC_W2W 0x148 -#define EMC_EINPUT 0x14c -#define EMC_EINPUT_DURATION 0x150 -#define EMC_PUTERM_EXTRA 0x154 -#define EMC_TCKESR 0x158 -#define EMC_TPD 0x15c -#define EMC_STAT_CONTROL 0x160 -#define EMC_STAT_STATUS 0x164 -#define EMC_STAT_DRAM_CLOCK_LIMIT_LO 0x19c -#define EMC_STAT_DRAM_CLOCK_LIMIT_HI 0x1a0 -#define EMC_STAT_DRAM_CLOCKS_LO 0x1a4 -#define EMC_STAT_DRAM_CLOCKS_HI 0x1a8 -#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_LO 0x1ac -#define EMC_STAT_DRAM_DEV0_ACTIVATE_CNT_HI 0x1b0 -#define EMC_STAT_DRAM_DEV0_READ_CNT_LO 0x1b4 -#define EMC_STAT_DRAM_DEV0_READ_CNT_HI 0x1b8 -#define EMC_STAT_DRAM_DEV0_READ8_CNT_LO 0x1bc -#define EMC_STAT_DRAM_DEV0_READ8_CNT_HI 0x1c0 -#define EMC_STAT_DRAM_DEV0_WRITE_CNT_LO 0x1c4 -#define EMC_STAT_DRAM_DEV0_WRITE_CNT_HI 0x1c8 -#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_LO 0x1cc -#define EMC_STAT_DRAM_DEV0_WRITE8_CNT_HI 0x1d0 -#define EMC_STAT_DRAM_DEV0_REF_CNT_LO 0x1d4 -#define EMC_STAT_DRAM_DEV0_REF_CNT_HI 0x1d8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1dc -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e0 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x1e4 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x1e8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1ec -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f0 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x1f4 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x1f8 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x1fc -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x200 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x204 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x208 -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x20c -#define EMC_STAT_DRAM_DEV0_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x210 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x214 -#define EMC_STAT_DRAM_DEV0_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x218 -#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_LO 0x21c -#define EMC_STAT_DRAM_DEV0_SR_CKE_EQ0_CLKS_HI 0x220 -#define EMC_STAT_DRAM_DEV0_DSR 0x224 -#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_LO 0x228 -#define EMC_STAT_DRAM_DEV1_ACTIVATE_CNT_HI 0x22c -#define EMC_STAT_DRAM_DEV1_READ_CNT_LO 0x230 -#define EMC_STAT_DRAM_DEV1_READ_CNT_HI 0x234 -#define EMC_STAT_DRAM_DEV1_READ8_CNT_LO 0x238 -#define EMC_STAT_DRAM_DEV1_READ8_CNT_HI 0x23c -#define EMC_STAT_DRAM_DEV1_WRITE_CNT_LO 0x240 -#define EMC_STAT_DRAM_DEV1_WRITE_CNT_HI 0x244 -#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_LO 0x248 -#define EMC_STAT_DRAM_DEV1_WRITE8_CNT_HI 0x24c -#define EMC_STAT_DRAM_DEV1_REF_CNT_LO 0x250 -#define EMC_STAT_DRAM_DEV1_REF_CNT_HI 0x254 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x258 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x25c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0x260 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0x264 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x268 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x26c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0x270 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0x274 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x278 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x27c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0x280 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0x284 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x288 -#define EMC_STAT_DRAM_DEV1_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x28c -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0x290 -#define EMC_STAT_DRAM_DEV1_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0x294 -#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_LO 0x298 -#define EMC_STAT_DRAM_DEV1_SR_CKE_EQ0_CLKS_HI 0x29c -#define EMC_STAT_DRAM_DEV1_DSR 0x2a0 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc8c -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc90 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_LO 0xc94 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_NO_BANKS_ACTIVE_CLKS_HI 0xc98 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xc9c -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_LO 0xca4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_NO_BANKS_ACTIVE_CLKS_HI 0xca8 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcac -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_LO 0xcb4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ0_SOME_BANKS_ACTIVE_CLKS_HI 0xcb8 -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcbc -#define EMC_STAT_DRAM_IO_EXTCLKS_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc0 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_LO 0xcc4 -#define EMC_STAT_DRAM_IO_CLKSTOP_CKE_EQ1_SOME_BANKS_ACTIVE_CLKS_HI 0xcc8 -#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_LO 0xccc -#define EMC_STAT_DRAM_IO_SR_CKE_EQ0_CLKS_HI 0xcd0 -#define EMC_STAT_DRAM_IO_DSR 0xcd4 -#define EMC_AUTO_CAL_CONFIG 0x2a4 -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_COMPUTE_START (1 << 0) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_MEASURE_STALL (1 << 9) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_UPDATE_STALL (1 << 10) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE (1 << 29) -#define EMC_AUTO_CAL_CONFIG_AUTO_CAL_START (1 << 31) - -#define EMC_AUTO_CAL_CONFIG2 0x458 -#define EMC_AUTO_CAL_CONFIG3 0x45c -#define EMC_AUTO_CAL_CONFIG4 0x5b0 -#define EMC_AUTO_CAL_CONFIG5 0x5b4 -#define EMC_AUTO_CAL_CONFIG6 0x5cc -#define EMC_AUTO_CAL_CONFIG7 0x574 -#define EMC_AUTO_CAL_CONFIG8 0x2dc -#define EMC_AUTO_CAL_VREF_SEL_0 0x2f8 -#define EMC_AUTO_CAL_VREF_SEL_1 0x300 -#define EMC_AUTO_CAL_INTERVAL 0x2a8 -#define EMC_AUTO_CAL_STATUS 0x2ac -#define EMC_AUTO_CAL_STATUS2 0x3d4 -#define EMC_AUTO_CAL_CHANNEL 0x464 -#define EMC_PMACRO_RX_TERM 0xc48 -#define EMC_PMACRO_DQ_TX_DRV 0xc70 -#define EMC_PMACRO_CA_TX_DRV 0xc74 -#define EMC_PMACRO_CMD_TX_DRV 0xc4c -#define EMC_PMACRO_AUTOCAL_CFG_0 0x700 -#define EMC_PMACRO_AUTOCAL_CFG_1 0x704 -#define EMC_PMACRO_AUTOCAL_CFG_2 0x708 -#define EMC_PMACRO_AUTOCAL_CFG_COMMON 0xc78 -#define EMC_PMACRO_AUTOCAL_CFG_COMMON_E_CAL_BYPASS_DVFS (1 << 16) - -#define EMC_PMACRO_ZCTRL 0xc44 -#define EMC_XM2COMPPADCTRL 0x30c -#define EMC_XM2COMPPADCTRL_VREF_CAL_ENABLE (1 << 10) - -#define EMC_XM2COMPPADCTRL2 0x578 -#define EMC_XM2COMPPADCTRL3 0x2f4 -#define EMC_COMP_PAD_SW_CTRL 0x57c -#define EMC_REQ_CTRL 0x2b0 -#define EMC_EMC_STATUS 0x2b4 -#define EMC_EMC_STATUS_MRR_DIVLD (1 << 20) -#define EMC_EMC_STATUS_TIMING_UPDATE_STALLED (1 << 23) -#define EMC_EMC_STATUS_DRAM_IN_POWERDOWN_SHIFT 4 -#define EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK \ - (0x3 << EMC_EMC_STATUS_DRAM_IN_POWERDOWN_SHIFT) -#define EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_SHIFT 8 -#define EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK \ - (0x3 << EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_SHIFT) - -#define EMC_CFG_2 0x2b8 -#define EMC_CFG_DIG_DLL 0x2bc -#define EMC_CFG_DIG_DLL_CFG_DLL_EN (1 << 0) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_UNTIL_LOCK (1 << 1) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_TRAFFIC (1 << 3) -#define EMC_CFG_DIG_DLL_CFG_DLL_STALL_RW_UNTIL_LOCK (1 << 4) -#define EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT 6 -#define EMC_CFG_DIG_DLL_CFG_DLL_MODE_MASK \ - (0x3 << EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT) -#define EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_SHIFT 8 -#define EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_MASK \ - (0x7 << EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_SHIFT) - -#define EMC_CFG_DIG_DLL_PERIOD 0x2c0 -#define EMC_DIG_DLL_STATUS 0x2c4 -#define EMC_DIG_DLL_STATUS_DLL_LOCK (1 << 15) -#define EMC_DIG_DLL_STATUS_DLL_LOCK_B01 (1 << 2) -#define EMC_DIG_DLL_STATUS_DLL_PRIV_UPDATED (1 << 17) -#define EMC_DIG_DLL_STATUS_DLL_OUT_SHIFT 0 -#define EMC_DIG_DLL_STATUS_DLL_OUT_MASK \ - (0x7ff << EMC_DIG_DLL_STATUS_DLL_OUT_SHIFT) - -#define EMC_CFG_DIG_DLL_1 0x2c8 -#define EMC_RDV_MASK 0x2cc -#define EMC_WDV_MASK 0x2d0 -#define EMC_RDV_EARLY_MASK 0x2d4 -#define EMC_RDV_EARLY 0x2d8 -#define EMC_WDV_CHK 0x4e0 -#define EMC_ZCAL_INTERVAL 0x2e0 -#define EMC_ZCAL_WAIT_CNT 0x2e4 -#define EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK 0x7ff -#define EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_SHIFT 0 - -#define EMC_ZCAL_MRW_CMD 0x2e8 -#define EMC_ZQ_CAL 0x2ec -#define EMC_ZQ_CAL_DEV_SEL_SHIFT 30 -#define EMC_ZQ_CAL_DEV_SEL_MASK \ - (0x3 << EMC_SELF_REF_DEV_SEL_SHIFT) -#define EMC_ZQ_CAL_LONG (1 << 4) -#define EMC_ZQ_CAL_ZQ_LATCH_CMD (1 << 1) -#define EMC_ZQ_CAL_ZQ_CAL_CMD (1 << 0) -#define EMC_ZQ_CAL_LONG_CMD_DEV0 \ - (DRAM_DEV_SEL_0 | EMC_ZQ_CAL_LONG | EMC_ZQ_CAL_CMD) -#define EMC_ZQ_CAL_LONG_CMD_DEV1 \ - (DRAM_DEV_SEL_1 | EMC_ZQ_CAL_LONG | EMC_ZQ_CAL_CMD) - -#define EMC_SCRATCH0 0x324 -#define EMC_STALL_THEN_EXE_BEFORE_CLKCHANGE 0x3c8 -#define EMC_STALL_THEN_EXE_AFTER_CLKCHANGE 0x3cc -#define EMC_UNSTALL_RW_AFTER_CLKCHANGE 0x3d0 -#define EMC_FDPD_CTRL_CMD_NO_RAMP 0x4d8 -#define EMC_FDPD_CTRL_CMD_NO_RAMP_CMD_DPD_NO_RAMP_ENABLE (1 << 0) - -#define EMC_SEL_DPD_CTRL 0x3d8 -#define EMC_SEL_DPD_CTRL_DATA_SEL_DPD_EN (1 << 8) -#define EMC_SEL_DPD_CTRL_ODT_SEL_DPD_EN (1 << 5) -#define EMC_SEL_DPD_CTRL_RESET_SEL_DPD_EN (1 << 4) -#define EMC_SEL_DPD_CTRL_CA_SEL_DPD_EN (1 << 3) -#define EMC_SEL_DPD_CTRL_CLK_SEL_DPD_EN (1 << 2) -#define EMC_SEL_DPD_CTRL_DDR3_MASK \ - ((0xf << 2) | (0x1 << 8)) -#define EMC_SEL_DPD_CTRL_MAS \ - ((0x3 << 2) | (0x1 << 5) | (0x1 << 8)) - -#define EMC_FDPD_CTRL_DQ 0x310 -#define EMC_FDPD_CTRL_CMD 0x314 -#define EMC_PRE_REFRESH_REQ_CNT 0x3dc -#define EMC_REFCTRL2 0x580 -#define EMC_FBIO_CFG7 0x584 -#define EMC_FBIO_CFG7_CH0_ENABLE (1 << 1) -#define EMC_FBIO_CFG7_CH1_ENABLE (1 << 2) - -#define EMC_DATA_BRLSHFT_0 0x588 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_SHIFT 21 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_SHIFT 18 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_SHIFT 15 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_SHIFT 12 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_SHIFT 9 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_SHIFT 6 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT 3 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT 0 -#define EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT) - -#define EMC_DATA_BRLSHFT_1 0x58c -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_SHIFT 21 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_SHIFT 18 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_SHIFT 15 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_SHIFT 12 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_SHIFT 9 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_SHIFT 6 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_SHIFT 3 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_SHIFT) -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_SHIFT 0 -#define EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_MASK \ - (0x7 << EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_SHIFT) - -#define EMC_DQS_BRLSHFT_0 0x594 -#define EMC_DQS_BRLSHFT_1 0x598 -#define EMC_CMD_BRLSHFT_0 0x59c -#define EMC_CMD_BRLSHFT_1 0x5a0 -#define EMC_CMD_BRLSHFT_2 0x5a4 -#define EMC_CMD_BRLSHFT_3 0x5a8 -#define EMC_QUSE_BRLSHFT_0 0x5ac -#define EMC_QUSE_BRLSHFT_1 0x5b8 -#define EMC_QUSE_BRLSHFT_2 0x5bc -#define EMC_QUSE_BRLSHFT_3 0x5c4 -#define EMC_FBIO_CFG8 0x5c8 -#define EMC_CMD_MAPPING_CMD0_0 0x380 -#define EMC_CMD_MAPPING_CMD0_1 0x384 -#define EMC_CMD_MAPPING_CMD0_2 0x388 -#define EMC_CMD_MAPPING_CMD1_0 0x38c -#define EMC_CMD_MAPPING_CMD1_1 0x390 -#define EMC_CMD_MAPPING_CMD1_2 0x394 -#define EMC_CMD_MAPPING_CMD2_0 0x398 -#define EMC_CMD_MAPPING_CMD2_1 0x39c -#define EMC_CMD_MAPPING_CMD2_2 0x3a0 -#define EMC_CMD_MAPPING_CMD3_0 0x3a4 -#define EMC_CMD_MAPPING_CMD3_1 0x3a8 -#define EMC_CMD_MAPPING_CMD3_2 0x3ac -#define EMC_CMD_MAPPING_BYTE 0x3b0 -#define EMC_DYN_SELF_REF_CONTROL 0x3e0 -#define EMC_TXSRDLL 0x3e4 -#define EMC_CCFIFO_ADDR 0x3e8 -#define EMC_CCFIFO_DATA 0x3ec -#define EMC_CCFIFO_STATUS 0x3f0 -#define EMC_SWIZZLE_RANK0_BYTE0 0x404 -#define EMC_SWIZZLE_RANK0_BYTE1 0x408 -#define EMC_SWIZZLE_RANK0_BYTE2 0x40c -#define EMC_SWIZZLE_RANK0_BYTE3 0x410 -#define EMC_SWIZZLE_RANK1_BYTE0 0x418 -#define EMC_SWIZZLE_RANK1_BYTE1 0x41c -#define EMC_SWIZZLE_RANK1_BYTE2 0x420 -#define EMC_SWIZZLE_RANK1_BYTE3 0x424 -#define EMC_TR_TIMING_0 0x3b4 -#define EMC_TR_CTRL_0 0x3b8 -#define EMC_TR_CTRL_1 0x3bc -#define EMC_TR_DVFS 0x460 -#define EMC_TR_DVFS_TRAINING_DVFS (1 << 0) - -#define EMC_SWITCH_BACK_CTRL 0x3c0 -#define EMC_TR_RDV 0x3c4 -#define EMC_TR_QPOP 0x3f4 -#define EMC_TR_RDV_MASK 0x3f8 -#define EMC_TR_QSAFE 0x3fc -#define EMC_TR_QRST 0x400 -#define EMC_IBDLY 0x468 -#define EMC_OBDLY 0x46c -#define EMC_TXDSRVTTGEN 0x480 -#define EMC_WE_DURATION 0x48c -#define EMC_WS_DURATION 0x490 -#define EMC_WEV 0x494 -#define EMC_WSV 0x498 -#define EMC_CFG_3 0x49c -#define EMC_CFG_PIPE_2 0x554 -#define EMC_CFG_PIPE_CLK 0x558 -#define EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON (1 << 0) - -#define EMC_CFG_PIPE_1 0x55c -#define EMC_CFG_PIPE 0x560 -#define EMC_QPOP 0x564 -#define EMC_QUSE_WIDTH 0x568 -#define EMC_PUTERM_WIDTH 0x56c -#define EMC_PROTOBIST_CONFIG_ADR_1 0x5d0 -#define EMC_PROTOBIST_CONFIG_ADR_2 0x5d4 -#define EMC_PROTOBIST_MISC 0x5d8 -#define EMC_PROTOBIST_WDATA_LOWER 0x5dc -#define EMC_PROTOBIST_WDATA_UPPER 0x5e0 -#define EMC_PROTOBIST_RDATA 0x5ec -#define EMC_DLL_CFG_0 0x5e4 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_IGNORE_START (1 << 29) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_DUAL_PASS_LOCK (1 << 28) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_SHIFT 24 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_STEP_SIZE_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_SHIFT 20 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_END_COUNT_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_SHIFT 16 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_FILTER_BITS_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_SHIFT 12 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_COUNT_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_SHIFT 4 -#define EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_MASK \ - (0xff << EMC_DLL_CFG_0_DDLLCAL_CTRL_SAMPLE_DELAY_SHIFT) -#define EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_SHIFT 0 -#define EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_MASK \ - (0xf << EMC_DLL_CFG_0_DDLLCAL_UPDATE_CNT_LIMIT_SHIFT) - -#define EMC_DLL_CFG_1 0x5e8 -#define EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_SHIFT 10 -#define EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_MASK \ - (0x7ff << EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_SHIFT) - -#define EMC_TRAINING_CMD 0xe00 -#define EMC_TRAINING_CMD_PRIME (1 << 0) -#define EMC_TRAINING_CMD_CA (1 << 1) -#define EMC_TRAINING_CMD_RD (1 << 2) -#define EMC_TRAINING_CMD_WR (1 << 3) -#define EMC_TRAINING_CMD_QUSE (1 << 4) -#define EMC_TRAINING_CMD_CA_VREF (1 << 5) -#define EMC_TRAINING_CMD_RD_VREF (1 << 6) -#define EMC_TRAINING_CMD_WR_VREF (1 << 7) -#define EMC_TRAINING_CMD_QUSE_VREF (1 << 8) -#define EMC_TRAINING_CMD_GO (1 << 31) - -#define EMC_TRAINING_CTRL 0xe04 -#define EMC_TRAINING_CTRL_SWAP_RANK (1 << 14) - -#define EMC_TRAINING_STATUS 0xe08 -#define EMC_TRAINING_QUSE_CORS_CTRL 0xe0c -#define EMC_TRAINING_QUSE_FINE_CTRL 0xe10 -#define EMC_TRAINING_QUSE_CTRL_MISC 0xe14 -#define EMC_TRAINING_WRITE_FINE_CTRL 0xe18 -#define EMC_TRAINING_WRITE_CTRL_MISC 0xe1c -#define EMC_TRAINING_WRITE_VREF_CTRL 0xe20 -#define EMC_TRAINING_READ_FINE_CTRL 0xe24 -#define EMC_TRAINING_READ_CTRL_MISC 0xe28 -#define EMC_TRAINING_READ_VREF_CTRL 0xe2c -#define EMC_TRAINING_CA_FINE_CTRL 0xe30 -#define EMC_TRAINING_CA_CTRL_MISC 0xe34 -#define EMC_TRAINING_CA_CTRL_MISC1 0xe38 -#define EMC_TRAINING_CA_VREF_CTRL 0xe3c -#define EMC_TRAINING_CA_TADR_CTRL 0xe40 -#define EMC_TRAINING_SETTLE 0xe44 -#define EMC_TRAINING_DEBUG_CTRL 0xe48 -#define EMC_TRAINING_DEBUG_DQ0 0xe4c -#define EMC_TRAINING_DEBUG_DQ1 0xe50 -#define EMC_TRAINING_DEBUG_DQ2 0xe54 -#define EMC_TRAINING_DEBUG_DQ3 0xe58 -#define EMC_TRAINING_MPC 0xe5c -#define EMC_TRAINING_PATRAM_CTRL 0xe60 -#define EMC_TRAINING_PATRAM_DQ 0xe64 -#define EMC_TRAINING_PATRAM_DMI 0xe68 -#define EMC_TRAINING_VREF_SETTLE 0xe6c -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE0 0xe70 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE1 0xe74 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE2 0xe78 -#define EMC_TRAINING_RW_EYE_CENTER_IB_BYTE3 0xe7c -#define EMC_TRAINING_RW_EYE_CENTER_IB_MISC 0xe80 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE0 0xe84 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE1 0xe88 -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE2 0xe8c -#define EMC_TRAINING_RW_EYE_CENTER_OB_BYTE3 0xe90 -#define EMC_TRAINING_RW_EYE_CENTER_OB_MISC 0xe94 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE0 0xe98 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE1 0xe9c -#define EMC_TRAINING_RW_OFFSET_IB_BYTE2 0xea0 -#define EMC_TRAINING_RW_OFFSET_IB_BYTE3 0xea4 -#define EMC_TRAINING_RW_OFFSET_IB_MISC 0xea8 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE0 0xeac -#define EMC_TRAINING_RW_OFFSET_OB_BYTE1 0xeb0 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE2 0xeb4 -#define EMC_TRAINING_RW_OFFSET_OB_BYTE3 0xeb8 -#define EMC_TRAINING_RW_OFFSET_OB_MISC 0xebc -#define EMC_TRAINING_OPT_CA_VREF 0xec0 -#define EMC_TRAINING_OPT_DQ_OB_VREF 0xec4 -#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK0 0xec8 -#define EMC_TRAINING_OPT_DQ_IB_VREF_RANK1 0xecc -#define EMC_TRAINING_QUSE_VREF_CTRL 0xed0 -#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK0 0xed4 -#define EMC_TRAINING_OPT_DQS_IB_VREF_RANK1 0xed8 -#define EMC_TRAINING_DRAMC_TIMING 0xedc -#define EMC_PMACRO_QUSE_DDLL_RANK0_0 0x600 -#define EMC_PMACRO_QUSE_DDLL_RANK0_1 0x604 -#define EMC_PMACRO_QUSE_DDLL_RANK0_2 0x608 -#define EMC_PMACRO_QUSE_DDLL_RANK0_3 0x60c -#define EMC_PMACRO_QUSE_DDLL_RANK0_4 0x610 -#define EMC_PMACRO_QUSE_DDLL_RANK0_5 0x614 -#define EMC_PMACRO_QUSE_DDLL_RANK1_0 0x620 -#define EMC_PMACRO_QUSE_DDLL_RANK1_1 0x624 -#define EMC_PMACRO_QUSE_DDLL_RANK1_2 0x628 -#define EMC_PMACRO_QUSE_DDLL_RANK1_3 0x62c -#define EMC_PMACRO_QUSE_DDLL_RANK1_4 0x630 -#define EMC_PMACRO_QUSE_DDLL_RANK1_5 0x634 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 0x640 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE1_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_OB_DDLL_LONG_DQ_RANK0_BYTE0_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 0x644 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE3_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_OB_DDLL_LONG_DQ_RANK0_BYTE2_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 0x648 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE5_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_OB_DDLL_LONG_DQ_RANK0_BYTE4_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 0x64c -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE7_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_OB_DDLL_LONG_DQ_RANK0_BYTE6_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4 0x650 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5 0x654 - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 0x660 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE1_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_OB_DDLL_LONG_DQ_RANK1_BYTE0_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 0x664 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE3_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_OB_DDLL_LONG_DQ_RANK1_BYTE2_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 0x668 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE5_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_OB_DDLL_LONG_DQ_RANK1_BYTE4_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 0x66c -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_SHIFT \ - 16 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE7_SHIFT -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_SHIFT \ - 0 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_MASK \ - 0x3ff << \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_OB_DDLL_LONG_DQ_RANK1_BYTE6_SHIFT - -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4 0x670 -#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5 0x674 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0 0x680 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1 0x684 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2 0x688 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3 0x68c -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4 0x690 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5 0x694 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0 0x6a0 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1 0x6a4 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2 0x6a8 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3 0x6ac -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4 0x6b0 -#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5 0x6b4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0 0x6c0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1 0x6c4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2 0x6c8 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3 0x6cc -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_4 0x6d0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_5 0x6d4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0 0x6e0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1 0x6e4 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2 0x6e8 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3 0x6ec -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_4 0x6f0 -#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_5 0x6f4 -#define EMC_PMACRO_TX_PWRD_0 0x720 -#define EMC_PMACRO_TX_PWRD_1 0x724 -#define EMC_PMACRO_TX_PWRD_2 0x728 -#define EMC_PMACRO_TX_PWRD_3 0x72c -#define EMC_PMACRO_TX_PWRD_4 0x730 -#define EMC_PMACRO_TX_PWRD_5 0x734 -#define EMC_PMACRO_TX_SEL_CLK_SRC_0 0x740 -#define EMC_PMACRO_TX_SEL_CLK_SRC_1 0x744 -#define EMC_PMACRO_TX_SEL_CLK_SRC_3 0x74c -#define EMC_PMACRO_TX_SEL_CLK_SRC_2 0x748 -#define EMC_PMACRO_TX_SEL_CLK_SRC_4 0x750 -#define EMC_PMACRO_TX_SEL_CLK_SRC_5 0x754 -#define EMC_PMACRO_DDLL_BYPASS 0x760 -#define EMC_PMACRO_DDLL_PWRD_0 0x770 -#define EMC_PMACRO_DDLL_PWRD_1 0x774 -#define EMC_PMACRO_DDLL_PWRD_2 0x778 -#define EMC_PMACRO_CMD_CTRL_0 0x780 -#define EMC_PMACRO_CMD_CTRL_1 0x784 -#define EMC_PMACRO_CMD_CTRL_2 0x788 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0x800 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0x804 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0x808 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_3 0x80c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0x810 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0x814 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0x818 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_3 0x81c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0x820 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0x824 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0x828 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_3 0x82c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0x830 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0x834 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0x838 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_3 0x83c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0x840 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0x844 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0x848 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_3 0x84c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0x850 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0x854 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0x858 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_3 0x85c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0x860 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0x864 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0x868 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_3 0x86c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0x870 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0x874 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0x878 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_3 0x87c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0 0x880 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1 0x884 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2 0x888 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_3 0x88c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0 0x890 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1 0x894 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2 0x898 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_3 0x89c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0 0x8a0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1 0x8a4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2 0x8a8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_3 0x8ac -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0 0x8b0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1 0x8b4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2 0x8b8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_3 0x8bc -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0x900 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0x904 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0x908 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_3 0x90c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0x910 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0x914 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0x918 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_3 0x91c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0x920 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0x924 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0x928 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_3 0x92c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0x930 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0x934 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0x938 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_3 0x93c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0x940 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0x944 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0x948 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_3 0x94c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0x950 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0x954 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0x958 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_3 0x95c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0x960 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0x964 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0x968 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_3 0x96c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0x970 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0x974 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0x978 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_3 0x97c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_0 0x980 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_1 0x984 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_2 0x988 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_3 0x98c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_0 0x990 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_1 0x994 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_2 0x998 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_3 0x99c -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_0 0x9a0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_1 0x9a4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_2 0x9a8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_3 0x9ac -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_0 0x9b0 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_1 0x9b4 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_2 0x9b8 -#define EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_3 0x9bc -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0 0xa00 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1 0xa04 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2 0xa08 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0 0xa10 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1 0xa14 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2 0xa18 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0 0xa20 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1 0xa24 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2 0xa28 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0 0xa30 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1 0xa34 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2 0xa38 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0 0xa40 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1 0xa44 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2 0xa48 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0 0xa50 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1 0xa54 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2 0xa58 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0 0xa60 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1 0xa64 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2 0xa68 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0 0xa70 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1 0xa74 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2 0xa78 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_0 0xa80 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_1 0xa84 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD0_2 0xa88 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_0 0xa90 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_1 0xa94 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD1_2 0xa98 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_0 0xaa0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_1 0xaa4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD2_2 0xaa8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_0 0xab0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_1 0xab4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_CMD3_2 0xab8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0 0xb00 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1 0xb04 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2 0xb08 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0 0xb10 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1 0xb14 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2 0xb18 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0 0xb20 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1 0xb24 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2 0xb28 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0 0xb30 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1 0xb34 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2 0xb38 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0 0xb40 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1 0xb44 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2 0xb48 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0 0xb50 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1 0xb54 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2 0xb58 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0 0xb60 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1 0xb64 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2 0xb68 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0 0xb70 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1 0xb74 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2 0xb78 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_0 0xb80 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_1 0xb84 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD0_2 0xb88 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_0 0xb90 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_1 0xb94 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD1_2 0xb98 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_0 0xba0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_1 0xba4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD2_2 0xba8 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_0 0xbb0 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_1 0xbb4 -#define EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_CMD3_2 0xbb8 -#define EMC_PMACRO_IB_VREF_DQ_0 0xbe0 -#define EMC_PMACRO_IB_VREF_DQ_1 0xbe4 -#define EMC_PMACRO_IB_VREF_DQ_2 0xbe8 -#define EMC_PMACRO_IB_VREF_DQS_0 0xbf0 -#define EMC_PMACRO_IB_VREF_DQS_1 0xbf4 -#define EMC_PMACRO_IB_VREF_DQS_2 0xbf8 -#define EMC_PMACRO_IB_RXRT 0xcf4 -#define EMC_PMACRO_DDLL_LONG_CMD_0 0xc00 -#define EMC_PMACRO_DDLL_LONG_CMD_1 0xc04 -#define EMC_PMACRO_DDLL_LONG_CMD_2 0xc08 -#define EMC_PMACRO_DDLL_LONG_CMD_3 0xc0c -#define EMC_PMACRO_DDLL_LONG_CMD_4 0xc10 -#define EMC_PMACRO_DDLL_LONG_CMD_5 0xc14 -#define EMC_PMACRO_DDLL_SHORT_CMD_0 0xc20 -#define EMC_PMACRO_DDLL_SHORT_CMD_1 0xc24 -#define EMC_PMACRO_DDLL_SHORT_CMD_2 0xc28 -#define EMC_PMACRO_CFG_PM_GLOBAL_0 0xc30 -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0 (1 << 16) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE1 (1 << 17) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE2 (1 << 18) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE3 (1 << 19) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE4 (1 << 20) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE5 (1 << 21) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE6 (1 << 22) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE7 (1 << 23) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD0 (1 << 24) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD1 (1 << 25) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD2 (1 << 26) -#define EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_CMD3 (1 << 27) - -#define EMC_PMACRO_VTTGEN_CTRL_0 0xc34 -#define EMC_PMACRO_VTTGEN_CTRL_1 0xc38 -#define EMC_PMACRO_VTTGEN_CTRL_2 0xcf0 -#define EMC_PMACRO_BG_BIAS_CTRL_0 0xc3c -#define EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD (1 << 0) -#define EMC_PMACRO_BG_BIAS_CTRL_0_BG_MODE (1 << 1) -#define EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD (1 << 2) - -#define EMC_PMACRO_PAD_CFG_CTRL 0xc40 -#define EMC_PMACRO_CMD_PAD_RX_CTRL 0xc50 -#define EMC_PMACRO_DATA_PAD_RX_CTRL 0xc54 -#define EMC_PMACRO_CMD_RX_TERM_MODE 0xc58 -#define EMC_PMACRO_DATA_RX_TERM_MODE 0xc5c -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_SHIFT 8 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_SHIFT) -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_SHIFT 4 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_SHIFT) -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_SHIFT 0 -#define EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_MASK (0x3 << \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_SHIFT) - -#define RX_TERM_MODE \ - ~(EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSN_RX_TERM_MODE_MASK | \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQSP_RX_TERM_MODE_MASK | \ - EMC_PMACRO_DATA_RX_TERM_MODE_DATA_DQ_RX_TERM_MODE_MASK) - -#define EMC_PMACRO_CMD_PAD_TX_CTRL 0xc60 -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC (1 << 1) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC (1 << 9) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC (1 << 16) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC (1 << 24) -#define EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON (1 << 26) - -#define EMC_PMACRO_DATA_PAD_TX_CTRL 0xc64 -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF (1 << 0) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC (1 << 1) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF (1 << 8) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC (1 << 9) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC (1 << 16) -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC (1 << 24) - -#define EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF_B01 (1 << 10) - - - -#define EMC_PMACRO_COMMON_PAD_TX_CTRL 0xc68 -#define EMC_PMACRO_BRICK_MAPPING_0 0xc80 -#define EMC_PMACRO_BRICK_MAPPING_1 0xc84 -#define EMC_PMACRO_BRICK_MAPPING_2 0xc88 -#define EMC_PMACRO_DDLLCAL_CAL 0xce0 -#define EMC_PMACRO_DDLL_OFFSET 0xce4 -#define EMC_PMACRO_DDLL_PERIODIC_OFFSET 0xce8 -#define EMC_PMACRO_BRICK_CTRL_RFU1 0x330 -#define EMC_PMACRO_BRICK_CTRL_RFU2 0x334 -#define EMC_PMACRO_CMD_BRICK_CTRL_FDPD 0x318 -#define EMC_PMACRO_DATA_BRICK_CTRL_FDPD 0x31c -#define EMC_PMACRO_TRAINING_CTRL_0 0xcf8 -#define EMC_PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR (1 << 3) - -#define EMC_PMACRO_TRAINING_CTRL_1 0xcfc -#define EMC_PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR (1 << 3) - -#define EMC_PMC_SCRATCH1 0x440 -#define EMC_PMC_SCRATCH2 0x444 -#define EMC_PMC_SCRATCH3 0x448 - -#define EMC_PMACRO_PERBIT_FGCG_CTRL_0 0xd40 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_1 0xd44 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_2 0xd48 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_3 0xd4c -#define EMC_PMACRO_PERBIT_FGCG_CTRL_4 0xd50 -#define EMC_PMACRO_PERBIT_FGCG_CTRL_5 0xd54 -#define EMC_PMACRO_PERBIT_RFU_CTRL_0 0xd60 -#define EMC_PMACRO_PERBIT_RFU_CTRL_1 0xd64 -#define EMC_PMACRO_PERBIT_RFU_CTRL_2 0xd68 -#define EMC_PMACRO_PERBIT_RFU_CTRL_3 0xd6c -#define EMC_PMACRO_PERBIT_RFU_CTRL_4 0xd70 -#define EMC_PMACRO_PERBIT_RFU_CTRL_5 0xd74 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_0 0xd80 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_1 0xd84 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_2 0xd88 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_3 0xd8c -#define EMC_PMACRO_PERBIT_RFU1_CTRL_4 0xd90 -#define EMC_PMACRO_PERBIT_RFU1_CTRL_5 0xd94 - -#define EMC_PMACRO_PMU_OUT_EOFF1_0 0xda0 -#define EMC_PMACRO_PMU_OUT_EOFF1_1 0xda4 -#define EMC_PMACRO_PMU_OUT_EOFF1_2 0xda8 -#define EMC_PMACRO_PMU_OUT_EOFF1_3 0xdac -#define EMC_PMACRO_PMU_OUT_EOFF1_4 0xdb0 -#define EMC_PMACRO_PMU_OUT_EOFF1_5 0xdb4 - -#define EMC_PMACRO_COMP_PMU_OUT 0xdc0 -#define EMC_PMACRO_DATA_PI_CTRL 0x110 -#define EMC_PMACRO_CMD_PI_CTRL 0x114 - -#define EMC_AUTO_CAL_CONFIG9 0x42c - -#define EMC_TRTM 0xbc -#define EMC_TWTM 0xf8 -#define EMC_TRATM 0xfc -#define EMC_TWATM 0x108 -#define EMC_TR2REF 0x10c - -#define EMC_PMACRO_DSR_VTTGEN_CTRL_0 0xc6c - -// B01 -#define EMC_PMACRO_DLL_CFG_0 0x5E4 -#define EMC_PMACRO_DLL_CFG_1 0x5E8 - -#endif diff --git a/fusee/fusee-secondary/src/emummc_cfg.h b/fusee/fusee-secondary/src/emummc_cfg.h deleted file mode 100644 index e4a8013fa..000000000 --- a/fusee/fusee-secondary/src/emummc_cfg.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef EXOSPHERE_EMUMMC_CONFIG_H -#define EXOSPHERE_EMUMMC_CONFIG_H - -#include -#include - -/* "EFS0" */ -#define MAGIC_EMUMMC_CONFIG (0x30534645) - -#define EMUMMC_FILE_PATH_MAX (0x80) - -typedef enum { - EMUMMC_TYPE_NONE = 0, - EMUMMC_TYPE_PARTITION = 1, - EMUMMC_TYPE_FILES = 2, -} emummc_type_t; - -typedef enum { - EMUMMC_MMC_NAND = 0, - EMUMMC_MMC_SD = 1, - EMUMMC_MMC_GC = 2, -} emummc_mmc_t; - -typedef enum { - FS_VER_1_0_0 = 0, - - FS_VER_2_0_0, - FS_VER_2_0_0_EXFAT, - - FS_VER_2_1_0, - FS_VER_2_1_0_EXFAT, - - FS_VER_3_0_0, - FS_VER_3_0_0_EXFAT, - - FS_VER_3_0_1, - FS_VER_3_0_1_EXFAT, - - FS_VER_4_0_0, - FS_VER_4_0_0_EXFAT, - - FS_VER_4_1_0, - FS_VER_4_1_0_EXFAT, - - FS_VER_5_0_0, - FS_VER_5_0_0_EXFAT, - - FS_VER_5_1_0, - FS_VER_5_1_0_EXFAT, - - FS_VER_6_0_0, - FS_VER_6_0_0_EXFAT, - - FS_VER_7_0_0, - FS_VER_7_0_0_EXFAT, - - FS_VER_8_0_0, - FS_VER_8_0_0_EXFAT, - - FS_VER_8_1_0, - FS_VER_8_1_0_EXFAT, - - FS_VER_9_0_0, - FS_VER_9_0_0_EXFAT, - - FS_VER_9_1_0, - FS_VER_9_1_0_EXFAT, - - FS_VER_10_0_0, - FS_VER_10_0_0_EXFAT, - - FS_VER_10_2_0, - FS_VER_10_2_0_EXFAT, - - FS_VER_11_0_0, - FS_VER_11_0_0_EXFAT, - - FS_VER_12_0_0, - FS_VER_12_0_0_EXFAT, - - FS_VER_12_0_3, - FS_VER_12_0_3_EXFAT, - - FS_VER_MAX, -} emummc_fs_ver_t; - - -typedef struct { - uint32_t magic; - uint32_t type; - uint32_t id; - uint32_t fs_version; -} emummc_base_config_t; - -typedef struct { - uint64_t start_sector; -} emummc_partition_config_t; - -typedef struct { - char path[EMUMMC_FILE_PATH_MAX]; -} emummc_file_config_t; - -typedef struct { - emummc_base_config_t base_cfg; - union { - emummc_partition_config_t partition_cfg; - emummc_file_config_t file_cfg; - }; - char emu_dir_path[EMUMMC_FILE_PATH_MAX]; -} exo_emummc_config_t; - -_Static_assert(sizeof(exo_emummc_config_t) == 0x110, "exo_emummc_config_t definition!"); - -#endif diff --git a/fusee/fusee-secondary/src/exception_handlers.c b/fusee/fusee-secondary/src/exception_handlers.c deleted file mode 100644 index f88e50396..000000000 --- a/fusee/fusee-secondary/src/exception_handlers.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include - -#include "exception_handlers.h" -#include "utils.h" -#include "../../../fusee/common/display/video_fb.h" -#include "../../../fusee/common/log.h" - -#define CODE_DUMP_SIZE 0x30 -#define STACK_DUMP_SIZE 0x30 - -extern const uint32_t exception_handler_table[]; - -static const char *exception_names[] = { - "Reset", "Undefined instruction", "SWI", "Prefetch abort", "Data abort", "Reserved", "IRQ", "FIQ", -}; - -static const char *register_names[] = { - "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "R8", "R9", "R10", "R11", "R12", - "SP", "LR", "PC", "CPSR", -}; - -/* Adapted from https://gist.github.com/ccbrown/9722406 */ -static void hexdump(const void* data, size_t size, uintptr_t addrbase, char* strbuf) { - const uint8_t *d = (const uint8_t *)data; - char ascii[17] = {0}; - ascii[16] = '\0'; - - for (size_t i = 0; i < size; i++) { - if (i % 16 == 0) { - strbuf += sprintf(strbuf, "%0*" PRIXPTR ": | ", 2 * sizeof(addrbase), addrbase + i); - } - strbuf += sprintf(strbuf, "%02X ", d[i]); - if (d[i] >= ' ' && d[i] <= '~') { - ascii[i % 16] = d[i]; - } else { - ascii[i % 16] = '.'; - } - if ((i+1) % 8 == 0 || i+1 == size) { - strbuf += sprintf(strbuf, " "); - if ((i+1) % 16 == 0) { - strbuf += sprintf(strbuf, "| %s \n", ascii); - } else if (i+1 == size) { - ascii[(i+1) % 16] = '\0'; - if ((i+1) % 16 <= 8) { - strbuf += sprintf(strbuf, " "); - } - for (size_t j = (i+1) % 16; j < 16; j++) { - strbuf += sprintf(strbuf, " "); - } - strbuf += sprintf(strbuf, "| %s \n", ascii); - } - } - } -} - -void setup_exception_handlers(void) { - volatile uint32_t *bpmp_exception_handler_table = (volatile uint32_t *)0x6000F200; - for (int i = 0; i < 8; i++) { - if (exception_handler_table[i] != 0) { - bpmp_exception_handler_table[i] = exception_handler_table[i]; - } - } -} - -void exception_handler_main(uint32_t *registers, unsigned int exception_type) { - char exception_log[0x400] = {0}; - uint8_t code_dump[CODE_DUMP_SIZE] = {0}; - uint8_t stack_dump[STACK_DUMP_SIZE] = {0}; - size_t code_dump_size = 0; - size_t stack_dump_size = 0; - - uint32_t pc = registers[15]; - uint32_t cpsr = registers[16]; - uint32_t instr_addr = pc + ((cpsr & 0x20) ? 2 : 4) - CODE_DUMP_SIZE; - - sprintf(exception_log, "An exception occurred!\n"); - - code_dump_size = safecpy(code_dump, (const void *)instr_addr, CODE_DUMP_SIZE); - stack_dump_size = safecpy(stack_dump, (const void *)registers[13], STACK_DUMP_SIZE); - - sprintf(exception_log + strlen(exception_log), "\nException type: %s\n", exception_names[exception_type]); - sprintf(exception_log + strlen(exception_log), "\nRegisters:\n"); - - /* Print r0 to pc. */ - for (int i = 0; i < 16; i += 2) { - sprintf(exception_log + strlen(exception_log), "%-7s%08"PRIX32" %-7s%08"PRIX32"\n", - register_names[i], registers[i], register_names[i+1], registers[i+1]); - } - - /* Print cpsr. */ - sprintf(exception_log + strlen(exception_log), "%-7s%08"PRIX32"\n", register_names[16], registers[16]); - - /* Print code and stack regions. */ - sprintf(exception_log + strlen(exception_log), "\nCode dump:\n"); - hexdump(code_dump, code_dump_size, instr_addr, exception_log + strlen(exception_log)); - sprintf(exception_log + strlen(exception_log), "\nStack dump:\n"); - hexdump(stack_dump, stack_dump_size, registers[13], exception_log + strlen(exception_log)); - sprintf(exception_log + strlen(exception_log), "\n"); - - /* Throw fatal error with the full exception log. */ - fatal_error(exception_log); -} diff --git a/fusee/fusee-secondary/src/exception_handlers.h b/fusee/fusee-secondary/src/exception_handlers.h deleted file mode 100644 index 8cbd1c07f..000000000 --- a/fusee/fusee-secondary/src/exception_handlers.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_EXCEPTION_HANDLERS_H -#define FUSEE_EXCEPTION_HANDLERS_H - -#include -#include - -/* Copies up to len bytes, stops and returns the read length on data fault. */ -size_t safecpy(void *dst, const void *src, size_t len); - -void setup_exception_handlers(void); - -#endif diff --git a/fusee/fusee-secondary/src/exception_handlers_asm.s b/fusee/fusee-secondary/src/exception_handlers_asm.s deleted file mode 100644 index 4404c565a..000000000 --- a/fusee/fusee-secondary/src/exception_handlers_asm.s +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -.macro GEN_USUAL_HANDLER name, index, lr_arm_displ, lr_thumb_displ - _exception_handler_\name: - ldr sp, =_regs - stmia sp!, {r0-r7} - - /* Adjust lr to make it point to the location where the exception occured. */ - mrs r1, spsr - tst r1, #0x20 - subeq lr, lr, #\lr_arm_displ - subne lr, lr, #\lr_thumb_displ - - mov r0, sp - mov r1, #\index - b _exception_handler_common -.endm - -.section .text.exception_handlers_asm, "ax", %progbits -.arm -.align 5 - -_exception_handler_common: - mrs r2, spsr - mrs r3, cpsr - - /* Mask interrupts. */ - orr r3, #0xC0 - msr cpsr_cx, r3 - - /* Switch to the mode that triggered the interrupt, get the remaining regs, switch back. */ - ands r4, r2, #0xF - moveq r4, #0xF /* usr => sys */ - bic r5, r3, #0xF - orr r5, r4 - msr cpsr_c, r5 - stmia r0!, {r8-lr} - msr cpsr_c, r3 - - str lr, [r0], #4 - str r2, [r0] - - /* Finally, switch to system mode, setting interrupts and clearing the flags; set sp as well. */ - msr cpsr_cxsf, #0xDF - ldr sp, =(_exception_handler_stack + 0x1000) - ldr r0, =_regs - bl exception_handler_main - b . - -GEN_USUAL_HANDLER undefined_instruction, 1, 4, 2 -GEN_USUAL_HANDLER swi, 2, 4, 2 -GEN_USUAL_HANDLER prefetch_abort, 3, 4, 4 -GEN_USUAL_HANDLER data_abort_normal, 4, 8, 8 -GEN_USUAL_HANDLER fiq, 7, 4, 4 - -_exception_handler_data_abort: - /* Mask interrupts (abort mode). */ - msr cpsr_cx, #0xD7 - - adr sp, safecpy+8 - cmp lr, sp - blo _exception_handler_data_abort_normal - adr sp, _safecpy_end+8 - cmp lr, sp - bhs _exception_handler_data_abort_normal - - /* Set the flags, set r12 to 0 for safecpy, return from exception. */ - msr spsr_f, #(1 << 30) - mov r12, #0 - subs pc, lr, #4 - -.global safecpy -.type safecpy, %function -safecpy: - push {r4, lr} - mov r3, #0 - movs r12, #1 - - _safecpy_loop: - ldrb r4, [r1, r3] - cmp r12, #0 - beq _safecpy_loop_end - strb r4, [r0, r3] - add r3, #1 - cmp r3, r2 - blo _safecpy_loop - - _safecpy_loop_end: - mov r0, r3 - pop {r4, lr} - bx lr /* Need to do that separately on ARMv4. */ - -_safecpy_end: - -.section .rodata.exception_handlers_asm, "a", %progbits -.align 2 -.global exception_handler_table -exception_handler_table: - .word 0 /* Reset */ - .word _exception_handler_undefined_instruction - .word _exception_handler_swi - .word _exception_handler_prefetch_abort - .word _exception_handler_data_abort - .word 0 /* Reserved */ - .word 0 /* IRQ */ - .word _exception_handler_fiq - -.section .bss.exception_handlers_asm, "w", %nobits -.align 4 -_exception_handler_stack: .skip 0x1000 -_regs: .skip (4 * 17) diff --git a/fusee/fusee-secondary/src/exocfg.h b/fusee/fusee-secondary/src/exocfg.h deleted file mode 100644 index 42885f8ec..000000000 --- a/fusee/fusee-secondary/src/exocfg.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_EXOSPHERE_CONFIG_H -#define FUSEE_EXOSPHERE_CONFIG_H - -#include -#include -#include "emummc_cfg.h" - -/* This serves to set configuration for *exosphere itself*, separate from the SecMon Exosphere mimics. */ - -/* "EXO0" */ -#define MAGIC_EXOSPHERE_CONFIG (0x304F5845) - -#define EXOSPHERE_FLAG_PERFORM_620_KEYGEN (1 << 0u) -#define EXOSPHERE_FLAG_IS_DEBUGMODE_PRIV (1 << 1u) -#define EXOSPHERE_FLAG_IS_DEBUGMODE_USER (1 << 2u) -#define EXOSPHERE_FLAG_DISABLE_USERMODE_EXCEPTION_HANDLERS (1 << 3u) -#define EXOSPHERE_FLAG_ENABLE_USERMODE_PMU_ACCESS (1 << 4u) -#define EXOSPHERE_FLAG_BLANK_PRODINFO (1 << 5u) -#define EXOSPHERE_FLAG_ALLOW_WRITING_TO_CAL_SYSMMC (1 << 6u) -#define EXOSPHERE_FLAG_FORCE_ENABLE_USB_30 (1 << 7u) - -#define EXOSPHERE_LOG_FLAG_INVERTED (1 << 0u) - -typedef struct { - uint32_t magic; - uint32_t target_firmware; - uint32_t flags[2]; - uint16_t lcd_vendor; - uint8_t log_port; - uint8_t log_flags; - uint32_t log_baud_rate; - uint32_t reserved1[2]; - exo_emummc_config_t emummc_cfg; -} exosphere_config_t; - -_Static_assert(sizeof(exosphere_config_t) == 0x20 + sizeof(exo_emummc_config_t), "exosphere config definition"); - -#define MAILBOX_EXOSPHERE_CONFIGURATION ((volatile exosphere_config_t *)(0x8000F000ull)) - -#define EXOSPHERE_TARGETFW_KEY "target_firmware" -#define EXOSPHERE_DEBUGMODE_PRIV_KEY "debugmode" -#define EXOSPHERE_DEBUGMODE_USER_KEY "debugmode_user" -#define EXOSPHERE_DISABLE_USERMODE_EXCEPTION_HANDLERS_KEY "disable_user_exception_handlers" -#define EXOSPHERE_ENABLE_USERMODE_PMU_ACCESS_KEY "enable_user_pmu_access" -#define EXOSPHERE_BLANK_PRODINFO_SYSMMC_KEY "blank_prodinfo_sysmmc" -#define EXOSPHERE_BLANK_PRODINFO_EMUMMC_KEY "blank_prodinfo_emummc" -#define EXOSPHERE_ALLOW_WRITING_TO_CAL_SYSMMC_KEY "allow_writing_to_cal_sysmmc" -#define EXOSPHERE_LOG_PORT_KEY "log_port" -#define EXOSPHERE_LOG_BAUD_RATE_KEY "log_baud_rate" -#define EXOSPHERE_LOG_INVERTED_KEY "log_inverted" - -typedef struct { - int debugmode; - int debugmode_user; - int disable_user_exception_handlers; - int enable_user_pmu_access; - int blank_prodinfo_sysmmc; - int blank_prodinfo_emummc; - int allow_writing_to_cal_sysmmc; - int log_port; - int log_baud_rate; - int log_inverted; -} exosphere_parse_cfg_t; - -#endif diff --git a/fusee/fusee-secondary/src/extkeys.c b/fusee/fusee-secondary/src/extkeys.c deleted file mode 100644 index 75e692496..000000000 --- a/fusee/fusee-secondary/src/extkeys.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include "extkeys.h" - -/** - * Reads a line from file f and parses out the key and value from it. - * The format of a line must match /^ *[A-Za-z0-9_] *[,=] *.+$/. - * If a line ends in \r, the final \r is stripped. - * The input file is assumed to have been opened with the 'b' flag. - * The input file is assumed to contain only ASCII. - * - * A line cannot exceed 512 bytes in length. - * Lines that are excessively long will be silently truncated. - * - * On success, *key and *value will be set to point to the key and value in - * the input line, respectively. - * *key and *value may also be NULL in case of empty lines. - * On failure, *key and *value will be set to NULL. - * End of file is considered failure. - * - * Because *key and *value will point to a static buffer, their contents must be - * copied before calling this function again. - * For the same reason, this function is not thread-safe. - * - * The key will be converted to lowercase. - * An empty key is considered a parse error, but an empty value is returned as - * success. - * - * This function assumes that the file can be trusted not to contain any NUL in - * the contents. - * - * Whitespace (' ', ASCII 0x20, as well as '\t', ASCII 0x09) at the beginning of - * the line, at the end of the line as well as around = (or ,) will be ignored. - * - * @param f the file to read - * @param key pointer to change to point to the key - * @param value pointer to change to point to the value - * @return 0 on success, - * 1 on end of file, - * -1 on parse error (line too long, line malformed) - * -2 on I/O error - */ -static int get_kv(FILE *f, char **key, char **value) { -#define SKIP_SPACE(p) do {\ - for (; *p == ' ' || *p == '\t'; ++p)\ - ;\ -} while(0); - static char line[1024]; - char *k, *v, *p, *end; - - *key = *value = NULL; - - errno = 0; - if (fgets(line, (int)sizeof(line), f) == NULL) { - if (feof(f)) - return 1; - else - return -2; - } - if (errno != 0) - return -2; - - if (*line == '\n' || *line == '\r' || *line == '\0') - return 0; - - /* Not finding \r or \n is not a problem. - * The line might just be exactly 512 characters long, we have no way to - * tell. - * Additionally, it's possible that the last line of a file is not actually - * a line (i.e., does not end in '\n'); we do want to handle those. - */ - if ((p = strchr(line, '\r')) != NULL || (p = strchr(line, '\n')) != NULL) { - end = p; - *p = '\0'; - } else { - end = line + strlen(line) + 1; - } - - p = line; - SKIP_SPACE(p); - k = p; - - /* Validate key and convert to lower case. */ - for (; *p != ' ' && *p != ',' && *p != '\t' && *p != '='; ++p) { - if (*p == '\0') - return -1; - - if (*p >= 'A' && *p <= 'Z') { - *p = 'a' + (*p - 'A'); - continue; - } - - if (*p != '_' && - (*p < '0' || *p > '9') && - (*p < 'a' || *p > 'z')) { - return -1; - } - } - - /* Bail if the final ++p put us at the end of string */ - if (*p == '\0') - return -1; - - /* We should be at the end of key now and either whitespace or [,=] - * follows. - */ - if (*p == '=' || *p == ',') { - *p++ = '\0'; - } else { - *p++ = '\0'; - SKIP_SPACE(p); - if (*p != '=' && *p != ',') - return -1; - *p++ = '\0'; - } - - /* Empty key is an error. */ - if (*k == '\0') - return -1; - - SKIP_SPACE(p); - v = p; - - /* Skip trailing whitespace */ - for (p = end - 1; *p == '\t' || *p == ' '; --p) - ; - - *(p + 1) = '\0'; - - *key = k; - *value = v; - - return 0; -#undef SKIP_SPACE -} - -static int ishex(char c) { - if ('a' <= c && c <= 'f') return 1; - if ('A' <= c && c <= 'F') return 1; - if ('0' <= c && c <= '9') return 1; - return 0; -} - -static char hextoi(char c) { - if ('a' <= c && c <= 'f') return c - 'a' + 0xA; - if ('A' <= c && c <= 'F') return c - 'A' + 0xA; - if ('0' <= c && c <= '9') return c - '0'; - return 0; -} - -void parse_hex_key(unsigned char *key, const char *hex, unsigned int len) { - if (strlen(hex) != 2 * len) { - fatal_error("Key (%s) must be %x hex digits!\n", hex, 2 * len); - } - - for (unsigned int i = 0; i < 2 * len; i++) { - if (!ishex(hex[i])) { - fatal_error("Key (%s) must be %x hex digits!\n", hex, 2 * len); - } - } - - memset(key, 0, len); - - for (unsigned int i = 0; i < 2 * len; i++) { - char val = hextoi(hex[i]); - if ((i & 1) == 0) { - val <<= 4; - } - key[i >> 1] |= val; - } -} - -void extkeys_initialize_keyset(fusee_extkeys_t *keyset, FILE *f) { - char *key, *value; - int ret; - - while ((ret = get_kv(f, &key, &value)) != 1 && ret != -2) { - if (ret == 0) { - if (key == NULL || value == NULL) { - continue; - } - int matched_key = 0; - char test_name[0x100] = {0}; - for (unsigned int i = 0; i < 0x20 && !matched_key; i++) { - snprintf(test_name, sizeof(test_name), "tsec_root_key_%02x", i); - if (strcmp(key, test_name) == 0) { - parse_hex_key(keyset->tsec_root_keys[i], value, sizeof(keyset->tsec_root_keys[i])); - matched_key = 1; - break; - } - snprintf(test_name, sizeof(test_name), "master_kek_%02x", i); - if (strcmp(key, test_name) == 0) { - parse_hex_key(keyset->master_keks[i], value, sizeof(keyset->master_keks[i])); - matched_key = 1; - break; - } - } - } - } -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/extkeys.h b/fusee/fusee-secondary/src/extkeys.h deleted file mode 100644 index be9250618..000000000 --- a/fusee/fusee-secondary/src/extkeys.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_EXTKEYS_H -#define FUSEE_EXTKEYS_H - -#include -#include "utils.h" -#include "masterkey.h" - -typedef struct { - unsigned char tsec_root_keys[0x20][0x10]; - unsigned char master_keks[0x20][0x10]; -} fusee_extkeys_t; - -void parse_hex_key(unsigned char *key, const char *hex, unsigned int len); -void extkeys_initialize_keyset(fusee_extkeys_t *keyset, FILE *f); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/flow.h b/fusee/fusee-secondary/src/flow.h deleted file mode 100644 index 3b083bf1e..000000000 --- a/fusee/fusee-secondary/src/flow.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FLOW_CTLR_H -#define FUSEE_FLOW_CTLR_H - -#include - -#define FLOW_CTLR_BASE 0x60007000 -#define MAKE_FLOW_REG(n) MAKE_REG32(FLOW_CTLR_BASE + n) - -#define FLOW_CTLR_HALT_COP_EVENTS_0 MAKE_FLOW_REG(0x004) -#define FLOW_CTLR_RAM_REPAIR_0 MAKE_FLOW_REG(0x040) -#define FLOW_CTLR_FLOW_DBG_QUAL_0 MAKE_FLOW_REG(0x050) -#define FLOW_CTLR_L2FLUSH_CONTROL_0 MAKE_FLOW_REG(0x094) -#define FLOW_CTLR_BPMP_CLUSTER_CONTROL_0 MAKE_FLOW_REG(0x098) - -#endif diff --git a/fusee/fusee-secondary/src/fs_dev.c b/fusee/fusee-secondary/src/fs_dev.c deleted file mode 100644 index 6237a871a..000000000 --- a/fusee/fusee-secondary/src/fs_dev.c +++ /dev/null @@ -1,681 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "../../../fusee/common/fatfs/ff.h" - -#if FF_VOLUMES != 10 -#error "FatFs misconfigured, expected FF_VOLUMES == 10" -#endif - -#include "fs_dev.h" -/* Quite a bit of code comes from https://github.com/switchbrew/libnx/blob/master/nx/source/runtime/devices/fs_dev.c */ - -static int fsdev_convert_rc(struct _reent *r, FRESULT rc); -static void fsdev_filinfo_to_st(struct stat *st, const FILINFO *info); - -static int fsdev_open(struct _reent *r, void *fileStruct, const char *path, int flags, int mode); -static int fsdev_close(struct _reent *r, void *fd); -static ssize_t fsdev_write(struct _reent *r, void *fd, const char *ptr, size_t len); -static ssize_t fsdev_read(struct _reent *r, void *fd, char *ptr, size_t len); -static off_t fsdev_seek(struct _reent *r, void *fd, off_t pos, int dir); -static int fsdev_fstat(struct _reent *r, void *fd, struct stat *st); -static int fsdev_stat(struct _reent *r, const char *file, struct stat *st); -static int fsdev_link(struct _reent *r, const char *existing, const char *newLink); -static int fsdev_unlink(struct _reent *r, const char *name); -static int fsdev_chdir(struct _reent *r, const char *name); -static int fsdev_rename(struct _reent *r, const char *oldName, const char *newName); -static int fsdev_mkdir(struct _reent *r, const char *path, int mode); -static DIR_ITER* fsdev_diropen(struct _reent *r, DIR_ITER *dirState, const char *path); -static int fsdev_dirreset(struct _reent *r, DIR_ITER *dirState); -static int fsdev_dirnext(struct _reent *r, DIR_ITER *dirState, char *filename, struct stat *filestat); -static int fsdev_dirclose(struct _reent *r, DIR_ITER *dirState); -static int fsdev_statvfs(struct _reent *r, const char *path, struct statvfs *buf); -static int fsdev_ftruncate(struct _reent *r, void *fd, off_t len); -static int fsdev_fsync(struct _reent *r, void *fd); -static int fsdev_chmod(struct _reent *r, const char *path, mode_t mode); -static int fsdev_fchmod(struct _reent *r, void *fd, mode_t mode); -static int fsdev_rmdir(struct _reent *r, const char *name); - -static devoptab_t g_fsdev_devoptab = { - .structSize = sizeof(FIL), - .open_r = fsdev_open, - .close_r = fsdev_close, - .write_r = fsdev_write, - .read_r = fsdev_read, - .seek_r = fsdev_seek, - .fstat_r = fsdev_fstat, - .stat_r = fsdev_stat, - .link_r = fsdev_link, - .unlink_r = fsdev_unlink, - .chdir_r = fsdev_chdir, - .rename_r = fsdev_rename, - .mkdir_r = fsdev_mkdir, - .dirStateSize = sizeof(DIR), - .diropen_r = fsdev_diropen, - .dirreset_r = fsdev_dirreset, - .dirnext_r = fsdev_dirnext, - .dirclose_r = fsdev_dirclose, - .statvfs_r = fsdev_statvfs, - .ftruncate_r = fsdev_ftruncate, - .fsync_r = fsdev_fsync, - .deviceData = NULL, - .chmod_r = fsdev_chmod, - .fchmod_r = fsdev_fchmod, - .rmdir_r = fsdev_rmdir, -}; - -typedef struct fsdev_device_t { - devoptab_t devoptab; - device_partition_t devpart; - FATFS fatfs; - char name[32+1]; - bool setup, registered; -} fsdev_device_t; - -static fsdev_device_t g_fsdev_devices[FF_VOLUMES] = { 0 }; - -/* Required by ff.c */ -/* FF_VOLUMES = 10 */ -#define FKNAM "\xff$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$" /* Workaround for fatfs. */ - -const char *VolumeStr[FF_VOLUMES] = { FKNAM, FKNAM, FKNAM, FKNAM, FKNAM, FKNAM, FKNAM, FKNAM, FKNAM, FKNAM }; - -/* For diskio.c code */ -device_partition_t *g_volume_to_devparts[FF_VOLUMES] = { NULL }; - -static fsdev_device_t *fsdev_find_device(const char *name) { - for (size_t i = 0; i < FF_VOLUMES; i++) { - if (g_fsdev_devices[i].setup && strcmp(g_fsdev_devices[i].name, name) == 0) { - return &g_fsdev_devices[i]; - } - } - - return NULL; -} - -int fsdev_mount_device(const char *name, const device_partition_t *devpart, bool initialize_immediately) { - fsdev_device_t *device = fsdev_find_device(name); - FRESULT rc; - char drname[40]; - - if (device != NULL) { - errno = EEXIST; /* Device already exists */ - return -1; - } - - strcpy(drname, name); - strcat(drname, ":"); - - if (name[0] == '\0' || strcmp(name, FKNAM) == 0 || devpart == NULL) { - errno = EINVAL; - return -1; - } - if (strlen(name) > 32) { - errno = ENAMETOOLONG; - return -1; - } - - /* Find an unused slot. */ - for(size_t i = 0; i < FF_VOLUMES; i++) { - if (!g_fsdev_devices[i].setup) { - device = &g_fsdev_devices[i]; - break; - } - } - if (device == NULL) { - errno = ENOMEM; - return -1; - } - - memset(device, 0, sizeof(fsdev_device_t)); - strcpy(device->name, name); - - device->devoptab = g_fsdev_devoptab; - device->devpart = *devpart; - - device->devoptab.name = device->name; - device->devoptab.deviceData = device; - - VolumeStr[device - g_fsdev_devices] = device->name; - g_volume_to_devparts[device - g_fsdev_devices] = &device->devpart; - - rc = f_mount(&device->fatfs, drname, initialize_immediately ? 1 : 0); - - if (rc != FR_OK) { - g_volume_to_devparts[device - g_fsdev_devices] = NULL; - VolumeStr[device - g_fsdev_devices] = FKNAM; - return fsdev_convert_rc(NULL, rc); - } - - device->setup = true; - device->registered = false; - - return 0; -} - -int fsdev_register_device(const char *name) { - fsdev_device_t *device = fsdev_find_device(name); - if (device == NULL) { - errno = ENOENT; - return -1; - } - - if (device->registered) { - /* Do nothing if the device is already registered. */ - return 0; - } - - if (AddDevice(&device->devoptab) == -1) { - errno = ENOMEM; - return -1; - } else { - device->registered = true; - return 0; - } -} - -int fsdev_unregister_device(const char *name) { - fsdev_device_t *device = fsdev_find_device(name); - char drname[40]; - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - if (!device->registered) { - /* Do nothing if the device is not registered. */ - return 0; - } - - strcpy(drname, name); - strcat(drname, ":"); - - if (RemoveDevice(drname) == -1) { - errno = ENOENT; - return -1; - } else { - device->registered = false; - return 0; - } -} - -int fsdev_set_default_device(const char *name) { - int ret = 0; - int devid; - char drname[40]; - - strcpy(drname, name); - strcat(drname, ":"); - devid = FindDevice(drname); - - if (devid == -1 || fsdev_find_device(name) == NULL) { - errno = ENOENT; - return -1; - } - - ret = fsdev_convert_rc(NULL, f_chdrive(drname)); - if (ret == 0) { - setDefaultDevice(devid); - } - - return ret; -} - -int fsdev_is_exfat(const char *name) { - fsdev_device_t *device = fsdev_find_device(name); - - if (device != NULL) { - if (device->registered) { - return ((device->fatfs.fs_type == FS_EXFAT) ? 1 : 0); - } - } - - errno = ENOENT; - return -1; -} - -int fsdev_unmount_device(const char *name) { - int ret; - char drname[40]; - fsdev_device_t *device = fsdev_find_device(name); - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - ret = fsdev_unregister_device(name); - if (ret == -1) { - return -1; - } - - strcpy(drname, name); - strcat(drname, ":"); - - ret = fsdev_convert_rc(NULL, f_unmount(drname)); - - if (ret == 0) { - VolumeStr[device - g_fsdev_devices] = FKNAM; - g_volume_to_devparts[device - g_fsdev_devices] = NULL; - device->devpart.finalizer(&device->devpart); - memset(device, 0, sizeof(fsdev_device_t)); - } - - return ret; -} - -int fsdev_register_keys(const char *name, unsigned int target_firmware, BisPartition part) { - fsdev_device_t *device = fsdev_find_device(name); - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - derive_bis_key(device->devpart.keys, part, target_firmware); - - return 0; -} - -int fsdev_unmount_all(void) { - for (size_t i = 0; i < FF_VOLUMES; i++) { - int ret = fsdev_unmount_device(g_fsdev_devices[i].name); - if (ret != 0) { - return ret; - } - } - - return 0; -} - -int fsdev_set_attr(const char *file, int attr, int mask) { - return fsdev_convert_rc(NULL, f_chmod(file, (BYTE)attr, (BYTE)mask)); -} - -int fsdev_get_attr(const char *file) { - FILINFO info; - FRESULT rc = f_stat(file, &info); - - if (rc == FR_OK) { - return info.fattrib; - } - - return fsdev_convert_rc(NULL, rc); -} - -/* Adapted from https://github.com/benemorius/openOBC-devboard/blob/bf0a4a33e22d24e7c299f921d185da27377310e0/lib/fatfs/FatFS.cpp#L173 */ -static int fsdev_convert_rc(struct _reent *r, FRESULT rc) { - int errornumber; - switch(rc) { - case FR_OK: /* (0) Succeeded */ - errornumber = 0; - break; - case FR_DISK_ERR: /* (1) A hard error occurred in the low level disk I/O layer */ - errornumber = EIO; - break; - case FR_INT_ERR: /* (2) Assertion failed */ - errornumber = EINVAL; - break; - case FR_NOT_READY: /* (3) The physical drive cannot work */ - errornumber = EIO; - break; - case FR_NO_FILE: /* (4) Could not find the file */ - errornumber = ENOENT; - break; - case FR_NO_PATH: /* (5) Could not find the path */ - errornumber = ENOENT; - break; - case FR_INVALID_NAME: /* (6) The path name format is invalid */ - errornumber = EINVAL; - break; - case FR_DENIED: /* (7) Access denied due to prohibited access or directory full */ - errornumber = EACCES; - break; - case FR_EXIST: /* (8) Access denied due to prohibited access */ - errornumber = EEXIST; - break; - case FR_INVALID_OBJECT: /* (9) The file/directory object is invalid */ - errornumber = EFAULT; - break; - case FR_WRITE_PROTECTED: /* (10) The physical drive is write protected */ - errornumber = EROFS; - break; - case FR_INVALID_DRIVE: /* (11) The logical drive number is invalid */ - errornumber = ENODEV; - break; - case FR_NOT_ENABLED: /* (12) The volume has no work area */ - errornumber = ENOEXEC; - break; - case FR_NO_FILESYSTEM: /* (13) There is no valid FAT volume */ - errornumber = ENFILE; - break; - case FR_MKFS_ABORTED: /* (14) The f_mkfs() aborted due to any parameter error */ - errornumber = ENOEXEC; - break; - case FR_TIMEOUT: /* (15) Could not get a grant to access the volume within defined period */ - errornumber = EAGAIN; - break; - case FR_LOCKED: /* (16) The operation is rejected according to the file sharing policy */ - errornumber = EBUSY; - break; - case FR_NOT_ENOUGH_CORE: /* (17) LFN working buffer could not be allocated */ - errornumber = ENOMEM; - break; - case FR_TOO_MANY_OPEN_FILES: /* (18) Number of open files > _FS_SHARE */ - errornumber = EMFILE; - break; - case FR_INVALID_PARAMETER: /* (19) Given parameter is invalid */ - errornumber = EINVAL; - break; - default: - errornumber = EPERM; - break; - } - - if (r != NULL) { - r->_errno = errornumber; - } else { - errno = errornumber; - } - return errornumber == 0 ? 0 : -1; -} - -static void fsdev_filinfo_to_st(struct stat *st, const FILINFO *info) { - /* Date of last modification */ - struct tm date; - memset(st, 0, sizeof(struct stat)); - date.tm_mday = info->fdate & 31; - date.tm_mon = ((info->fdate >> 5) & 15) - 1; - date.tm_year = ((info->fdate >> 9) & 127) - 1980 + 1900; - - date.tm_sec = (info->ftime << 1) & 63; - date.tm_min = (info->ftime >> 5) & 63; - date.tm_hour = (info->ftime >> 11) & 31; - - date.tm_isdst = 0; - - st->st_atime = st->st_mtime = st->st_ctime = mktime(&date); - st->st_size = (off_t)info->fsize; - st->st_nlink = 1; - - if (info->fattrib & AM_DIR) { - st->st_mode = S_IFDIR | S_IRWXU | S_IRWXG | S_IRWXO; - } else { - st->st_mode = S_IFREG | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH; - } - - st->st_blksize = 512; - st->st_blocks = st->st_size / st->st_blksize; -} - -static int fsdev_open(struct _reent *r, void *fileStruct, const char *path, int flags, int mode) { - (void)mode; - FIL *f = (FIL *)fileStruct; - - BYTE ff_flags = 0; - static const struct { - int posix_flag; - BYTE ff_flag; - } flag_mappings[] = { - { O_APPEND, FA_OPEN_APPEND }, - { O_CREAT , FA_OPEN_ALWAYS }, - { O_EXCL , FA_CREATE_NEW }, - { O_TRUNC , FA_CREATE_ALWAYS }, - /*{ O_RDONLY, FA_READ }, O_RDONLY is 0*/ - { O_WRONLY, FA_WRITE }, - { O_RDWR , FA_READ | FA_WRITE }, - }; - - if ((flags & O_RDWR) & (O_RDONLY | O_WRONLY)) { - r->_errno = EINVAL; - return -1; - } - if ((flags & O_APPEND) && (flags & O_ACCMODE) == O_RDONLY) { - r->_errno = EINVAL; - return -1; - } - - for (size_t i = 0; i < sizeof(flag_mappings)/sizeof(flag_mappings[0]); i++) { - if (flags & flag_mappings[i].posix_flag) { - ff_flags |= flag_mappings[i].ff_flag; - } - } - if ((flags & O_ACCMODE) == O_RDONLY) { - ff_flags |= FA_READ; - } - - /* Normalize O_CREAT|O_TRUNC */ - if ((ff_flags & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS)) == (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS)) { - ff_flags &= ~FA_OPEN_ALWAYS; - } - - return fsdev_convert_rc(r, f_open(f, path, ff_flags)); -} - -static int fsdev_close(struct _reent *r, void *fd) { - FIL *f = (FIL *)fd; - return fsdev_convert_rc(r, f_close(f)); -} - -static ssize_t fsdev_write(struct _reent *r, void *fd, const char *ptr, size_t len) { - FIL *f = (FIL *)fd; - UINT wr; - - int ret = fsdev_convert_rc(r, f_write(f, ptr, (UINT)len, &wr)); - return ret == -1 ? -1 : (ssize_t)wr; -} - -static ssize_t fsdev_read(struct _reent *r, void *fd, char *ptr, size_t len) { - FIL *f = (FIL *)fd; - UINT rd; - - int ret = fsdev_convert_rc(r, f_read(f, ptr, (UINT)len, &rd)); - return ret == -1 ? -1 : (ssize_t)rd; -} - -static off_t fsdev_seek(struct _reent *r, void *fd, off_t pos, int whence) { - FIL *f = (FIL *)fd; - FSIZE_t off; - int ret; - - switch (whence) { - case SEEK_SET: - off = 0; - break; - case SEEK_CUR: - off = f_tell(f); - break; - case SEEK_END: - off = f_size(f); - break; - default: - r->_errno = EINVAL; - return -1; - } - - if ((FSIZE_t)pos < 0 && (FSIZE_t)pos + off < 0) { - /* don't allow seek to before the beginning of the file */ - r->_errno = EINVAL; - return -1; - } - - ret = fsdev_convert_rc(r, f_lseek(f, off + (FSIZE_t)pos)); - return ret == -1 ? -1 : (off_t)(off + (FSIZE_t)pos); -} - -static int fsdev_fstat(struct _reent *r, void *fd, struct stat *st) { - (void)fd; - (void)st; - - r->_errno = ENOSYS; - return -1; -} - -static int fsdev_stat(struct _reent *r, const char *file, struct stat *st) { - FILINFO info; - FRESULT rc = f_stat(file, &info); - - if (rc == FR_OK) { - fsdev_filinfo_to_st(st, &info); - return 0; - } - - return fsdev_convert_rc(r, rc); -} - -static int fsdev_link(struct _reent *r, const char *existing, const char *newLink) { - (void)existing; - (void)newLink; - r->_errno = ENOSYS; - return -1; -} - -static int fsdev_unlink(struct _reent *r, const char *name) { - return fsdev_convert_rc(r, f_unlink(name)); -} - -static int fsdev_chdir(struct _reent *r, const char *name) { - return fsdev_convert_rc(r, f_chdir(name)); -} - -static int fsdev_rename(struct _reent *r, const char *oldName, const char *newName) { - return fsdev_convert_rc(r, f_rename(oldName, newName)); -} - -static int fsdev_mkdir(struct _reent *r, const char *path, int mode) { - (void)mode; - return fsdev_convert_rc(r, f_mkdir(path)); -} - -static DIR_ITER* fsdev_diropen(struct _reent *r, DIR_ITER *dirState, const char *path) { - DIR *d = (DIR *)(dirState->dirStruct); - return fsdev_convert_rc(r, f_opendir(d, path)) == -1 ? NULL : dirState; -} - -static int fsdev_dirreset(struct _reent *r, DIR_ITER *dirState) { - (void)dirState; - r->_errno = ENOSYS; - return -1; -} - -static int fsdev_dirnext(struct _reent *r, DIR_ITER *dirState, char *filename, struct stat *filestat) { - FILINFO info; - DIR *d = (DIR *)(dirState->dirStruct); - FRESULT rc = f_readdir(d, &info); - - if (rc == FR_OK) { - fsdev_filinfo_to_st(filestat, &info); - - if(info.fname[0] == '\0') { - /* End of directory */ - r->_errno = ENOENT; - return -1; - } - - strcpy(filename, info.fname); - return 0; - } else { - return fsdev_convert_rc(r, rc); - } -} - -static int fsdev_dirclose(struct _reent *r, DIR_ITER *dirState) { - DIR *d = (DIR *)(dirState->dirStruct); - return fsdev_convert_rc(r, f_closedir(d)); -} - -static int fsdev_statvfs(struct _reent *r, const char *path, struct statvfs *buf) { - (void)path; - - DWORD nclust; - FATFS *fatfs; - FRESULT rc; - - rc = f_getfree(path, &nclust, &fatfs); - - if (rc == FR_OK) { -#if FF_MAX_SS != FF_MIN_SS - buf->f_bsize = fatfs->ssize; -#else - buf->f_bsize = FF_MAX_SS; -#endif - buf->f_frsize = buf->f_bsize; - buf->f_blocks = (fatfs->n_fatent - 2) * fatfs->csize; - buf->f_bfree = nclust * fatfs->csize; - buf->f_bavail = buf->f_bfree; - buf->f_files = 0; - buf->f_ffree = 0; - buf->f_favail = 0; - buf->f_fsid = 0; - buf->f_flag = ST_NOSUID; - buf->f_namemax = FF_LFN_BUF; - - return 0; - } else { - return fsdev_convert_rc(r, rc); - } -} - -static int fsdev_ftruncate(struct _reent *r, void *fd, off_t len) { - FIL *f = (FIL *)fd; - FSIZE_t off = f_tell(f); /* No need to validate this */ - FRESULT rc = f_lseek(f, (FSIZE_t)len); - - off = off > (FSIZE_t)len ? (FSIZE_t)len : off; - if (rc == FR_OK) { - rc = f_truncate(f); - /* Ignore errors while attempting restore the position */ - f_lseek(f, off); - return fsdev_convert_rc(r, rc); - } else { - return fsdev_convert_rc(r, rc); - } -} - -static int fsdev_fsync(struct _reent *r, void *fd) { - FIL *f = (FIL *)fd; - return fsdev_convert_rc(r, f_sync(f)); -} - -static int fsdev_chmod(struct _reent *r, const char *path, mode_t mode) { - (void)path; - (void)mode; - r->_errno = ENOSYS; - return -1; -} - -static int fsdev_fchmod(struct _reent *r, void *fd, mode_t mode) { - (void)fd; - (void)mode; - r->_errno = ENOSYS; - return -1; -} - -static int fsdev_rmdir(struct _reent *r, const char *name) { - return fsdev_convert_rc(r, f_unlink(name)); -} diff --git a/fusee/fusee-secondary/src/fs_dev.h b/fusee/fusee-secondary/src/fs_dev.h deleted file mode 100644 index dfac3cf22..000000000 --- a/fusee/fusee-secondary/src/fs_dev.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FS_DEV_H -#define FUSEE_FS_DEV_H - -#include -#include -#include -#include "device_partition.h" -#include "key_derivation.h" - -int fsdev_mount_device(const char *name, const device_partition_t *devpart, bool initialize_immediately); -int fsdev_register_device(const char *name); -int fsdev_unregister_device(const char *name); -int fsdev_unmount_device(const char *name); /* also unregisters. */ - -int fsdev_register_keys(const char *name, unsigned int target_firmware, BisPartition part); - -int fsdev_set_attr(const char *file, int attr, int mask); /* Non-standard function to set file DOS attributes. */ -int fsdev_get_attr(const char *file); /* Non-standard function to get file DOS attributes. */ - -int fsdev_set_default_device(const char *name); /* must be registered. */ -int fsdev_is_exfat(const char *name); /* must be registered. */ - -int fsdev_unmount_all(void); - -#endif diff --git a/fusee/fusee-secondary/src/fs_utils.c b/fusee/fusee-secondary/src/fs_utils.c deleted file mode 100644 index 3337a573d..000000000 --- a/fusee/fusee-secondary/src/fs_utils.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "../../../fusee/common/fatfs/ff.h" -#include "fs_utils.h" -#include "fs_dev.h" - -size_t get_file_size(const char *filename) { - struct stat st; - if (stat(filename, &st) == -1) { - return 0; - } - - return (size_t)st.st_size; -} - -size_t read_from_file(void *dst, size_t dst_size, const char *filename) { - FILE *file = fopen(filename, "rb"); - if (file == NULL) { - return 0; - } else { - size_t sz = fread(dst, 1, dst_size, file); - fclose(file); - return sz; - } -} - -size_t dump_to_file(const void *src, size_t src_size, const char *filename) { - FILE *file = fopen(filename, "wb+"); - if (file == NULL) { - return 0; - } else { - size_t sz = fwrite(src, 1, src_size, file); - fclose(file); - return sz; - } -} - -bool is_valid_folder(const char *path) { - struct stat st; - if (stat(path, &st) == 0 && S_ISDIR(st.st_mode)) { - return true; - } - - return false; -} - -bool is_valid_file(const char *path) { - struct stat st; - if (stat(path, &st) == 0 && S_ISREG(st.st_mode)) { - return true; - } - - return false; -} - -bool is_valid_concatenation_file(const char *path) { - if (is_valid_file(path)) { - return true; - } else if (is_valid_folder(path)) { - /* Check if the archive bit is set. */ - int rc = fsdev_get_attr(path); - - /* Failed to get file DOS attributes. */ - if (rc == -1) { - return false; - } - - /* Check if our path is not a directory (it should be if we're in this code, though...). */ - if (!(rc & AM_DIR)) { - return false; - } - - return (rc & AM_ARC) != 0; - } else { - return false; - } -} diff --git a/fusee/fusee-secondary/src/fs_utils.h b/fusee/fusee-secondary/src/fs_utils.h deleted file mode 100644 index 761632431..000000000 --- a/fusee/fusee-secondary/src/fs_utils.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FS_UTILS_H -#define FUSEE_FS_UTILS_H - -#include "utils.h" - -size_t get_file_size(const char *filename); -size_t read_from_file(void *dst, size_t dst_size, const char *filename); -size_t dump_to_file(const void *src, size_t src_size, const char *filename); -bool is_valid_folder(const char *path); -bool is_valid_file(const char *path); - -bool is_valid_concatenation_file(const char *path); - -#endif diff --git a/fusee/fusee-secondary/src/fuse.c b/fusee/fusee-secondary/src/fuse.c deleted file mode 100644 index 25fac1025..000000000 --- a/fusee/fusee-secondary/src/fuse.c +++ /dev/null @@ -1,388 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include - -#include "car.h" -#include "fuse.h" -#include "pmc.h" -#include "timers.h" - -/* Initialize the fuse driver */ -void fuse_init(void) { - /* Make all fuse registers visible, disable the private key and disable programming. */ - clkrst_enable_fuse_regs(true); - fuse_disable_private_key(); - fuse_disable_programming(); -} - -/* Disable access to the private key and set the TZ sticky bit. */ -void fuse_disable_private_key(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - fuse->FUSE_PRIVATEKEYDISABLE = 0x10; -} - -/* Disable all fuse programming. */ -void fuse_disable_programming(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - fuse->FUSE_DISABLEREGPROGRAM = 1; -} - -/* Enable power to the fuse hardware array. */ -void fuse_enable_power(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - pmc->fuse_control &= ~(0x200); /* Clear PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */ - mdelay(1); - pmc->fuse_control |= 0x100; /* Set PMC_FUSE_CTRL_PS18_LATCH_SET. */ - mdelay(1); -} - -/* Disable power to the fuse hardware array. */ -void fuse_disable_power(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - pmc->fuse_control &= ~(0x100); /* Clear PMC_FUSE_CTRL_PS18_LATCH_SET. */ - mdelay(1); - pmc->fuse_control |= 0x200; /* Set PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */ - mdelay(1); -} - -/* Wait for the fuse driver to go idle. */ -static void fuse_wait_idle(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - uint32_t ctrl_val = 0; - - /* Wait for STATE_IDLE */ - while ((ctrl_val & (0xF0000)) != 0x40000) { - ctrl_val = fuse->FUSE_FUSECTRL; - } -} - -/* Read a fuse from the hardware array. */ -uint32_t fuse_hw_read(uint32_t addr) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Program the target address. */ - fuse->FUSE_FUSEADDR = addr; - - /* Enable read operation in control register. */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x1; /* Set READ command. */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); - - return fuse->FUSE_FUSERDATA; -} - -/* Write a fuse in the hardware array. */ -void fuse_hw_write(uint32_t value, uint32_t addr) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Program the target address and value. */ - fuse->FUSE_FUSEADDR = addr; - fuse->FUSE_FUSEWDATA = value; - - /* Enable write operation in control register. */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x2; /* Set WRITE command. */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); -} - -/* Sense the fuse hardware array into the fuse cache. */ -void fuse_hw_sense(void) { - volatile tegra_fuse_t *fuse = fuse_get_regs(); - - /* Wait for idle state. */ - fuse_wait_idle(); - - /* Enable sense operation in control register */ - uint32_t ctrl_val = fuse->FUSE_FUSECTRL; - ctrl_val &= ~0x3; - ctrl_val |= 0x3; /* Set SENSE_CTRL command */ - fuse->FUSE_FUSECTRL = ctrl_val; - - /* Wait for idle state. */ - fuse_wait_idle(); -} - -/* Read the SKU info register. */ -uint32_t fuse_get_sku_info(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_SKU_INFO; -} - -/* Read the bootrom patch version. */ -uint32_t fuse_get_bootrom_patch_version(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_SOC_SPEEDO_1_CALIB; -} - -/* Read a spare bit register. */ -uint32_t fuse_get_spare_bit(uint32_t index) { - uint32_t soc_type = fuse_get_soc_type(); - if (soc_type == 0) { - if (index < 32) { - volatile tegra_fuse_chip_erista_t *fuse_chip = fuse_chip_erista_get_regs(); - return fuse_chip->FUSE_SPARE_BIT[index]; - } - } else if (soc_type == 1) { - if (index < 30) { - volatile tegra_fuse_chip_mariko_t *fuse_chip = fuse_chip_mariko_get_regs(); - return fuse_chip->FUSE_SPARE_BIT[index]; - } - } - return 0; -} - -/* Read a reserved ODM register. */ -uint32_t fuse_get_reserved_odm(uint32_t index) { - if (index < 8) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - return fuse_chip->FUSE_RESERVED_ODM0[index]; - } else { - uint32_t soc_type = fuse_get_soc_type(); - if (soc_type == 1) { - volatile tegra_fuse_chip_mariko_t *fuse_chip = fuse_chip_mariko_get_regs(); - if (index < 22) { - return fuse_chip->FUSE_RESERVED_ODM8[index - 8]; - } else if (index < 25) { - return fuse_chip->FUSE_RESERVED_ODM22[index - 22]; - } else if (index < 26) { - return fuse_chip->FUSE_RESERVED_ODM25; - } else if (index < 29) { - return fuse_chip->FUSE_RESERVED_ODM26[index - 26]; - } else if (index < 30) { - return fuse_chip->FUSE_RESERVED_ODM29; - } - } - } - return 0; -} - -/* Get the DramId. */ -uint32_t fuse_get_dram_id(void) { - return ((fuse_get_reserved_odm(4) >> 3) & 0x1F); -} - -/* Derive the DeviceId. */ -uint64_t fuse_get_device_id(void) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - - uint64_t device_id = 0; - uint64_t y_coord = fuse_chip->FUSE_OPT_Y_COORDINATE & 0x1FF; - uint64_t x_coord = fuse_chip->FUSE_OPT_X_COORDINATE & 0x1FF; - uint64_t wafer_id = fuse_chip->FUSE_OPT_WAFER_ID & 0x3F; - uint32_t lot_code = fuse_chip->FUSE_OPT_LOT_CODE_0; - uint64_t fab_code = fuse_chip->FUSE_OPT_FAB_CODE & 0x3F; - - uint64_t derived_lot_code = 0; - for (unsigned int i = 0; i < 5; i++) { - derived_lot_code = (derived_lot_code * 0x24) + ((lot_code >> (24 - 6*i)) & 0x3F); - } - derived_lot_code &= 0x03FFFFFF; - - device_id |= y_coord << 0; - device_id |= x_coord << 9; - device_id |= wafer_id << 18; - device_id |= derived_lot_code << 24; - device_id |= fab_code << 50; - - return device_id; -} - -/* Derive the HardwareType with firmware specific checks. */ -uint32_t fuse_get_hardware_type_with_firmware_check(uint32_t target_firmware) { - uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4); - uint32_t hardware_type = (((fuse_reserved_odm4 >> 7) & 2) | ((fuse_reserved_odm4 >> 2) & 1)); - - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_4_0_0) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - uint32_t fuse_spare_bit9 = (fuse_chip->FUSE_SPARE_BIT[9] & 1); - - switch (hardware_type) { - case 0x00: return (fuse_spare_bit9 == 0) ? 0 : 3; - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 1; /* HardwareType_Copper */ - default: return 3; /* HardwareType_Undefined */ - } - } else { - hardware_type |= ((fuse_reserved_odm4 >> 14) & 0x3C); - - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_7_0_0) { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 1; /* HardwareType_Copper */ - case 0x04: return 3; /* HardwareType_Iowa */ - default: return 4; /* HardwareType_Undefined */ - } - } else { - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_10_0_0) { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 4; /* HardwareType_Calcio */ - case 0x04: return 3; /* HardwareType_Iowa */ - case 0x08: return 2; /* HardwareType_Hoag */ - default: return 0xF; /* HardwareType_Undefined */ - } - } else { - switch (hardware_type) { - case 0x01: return 0; /* HardwareType_Icosa */ - case 0x02: return 4; /* HardwareType_Calcio */ - case 0x04: return 3; /* HardwareType_Iowa */ - case 0x08: return 2; /* HardwareType_Hoag */ - case 0x10: return 5; /* HardwareType_Five */ - default: return 0xF; /* HardwareType_Undefined */ - } - } - } - } -} - -/* Derive the HardwareType. */ -uint32_t fuse_get_hardware_type(void) { - return fuse_get_hardware_type_with_firmware_check(ATMOSPHERE_TARGET_FIRMWARE_CURRENT); -} - -/* Derive the HardwareState. */ -uint32_t fuse_get_hardware_state(void) { - uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4); - uint32_t hardware_state = (((fuse_reserved_odm4 >> 7) & 4) | (fuse_reserved_odm4 & 3)); - - switch (hardware_state) { - case 0x03: return 0; /* HardwareState_Development */ - case 0x04: return 1; /* HardwareState_Production */ - default: return 2; /* HardwareState_Undefined */ - } -} - -/* Derive the 16-byte HardwareInfo and copy to output buffer. */ -void fuse_get_hardware_info(void *dst) { - volatile tegra_fuse_chip_common_t *fuse_chip = fuse_chip_common_get_regs(); - uint32_t hw_info[0x4]; - - uint32_t ops_reserved = fuse_chip->FUSE_OPT_OPS_RESERVED & 0x3F; - uint32_t y_coord = fuse_chip->FUSE_OPT_Y_COORDINATE & 0x1FF; - uint32_t x_coord = fuse_chip->FUSE_OPT_X_COORDINATE & 0x1FF; - uint32_t wafer_id = fuse_chip->FUSE_OPT_WAFER_ID & 0x3F; - uint32_t lot_code_0 = fuse_chip->FUSE_OPT_LOT_CODE_0; - uint32_t lot_code_1 = fuse_chip->FUSE_OPT_LOT_CODE_1 & 0x0FFFFFFF; - uint32_t fab_code = fuse_chip->FUSE_OPT_FAB_CODE & 0x3F; - uint32_t vendor_code = fuse_chip->FUSE_OPT_VENDOR_CODE & 0xF; - - /* Hardware Info = OPS_RESERVED || Y_COORD || X_COORD || WAFER_ID || LOT_CODE || FAB_CODE || VENDOR_ID */ - hw_info[0] = (uint32_t)((lot_code_1 << 30) | (wafer_id << 24) | (x_coord << 15) | (y_coord << 6) | (ops_reserved)); - hw_info[1] = (uint32_t)((lot_code_0 << 26) | (lot_code_1 >> 2)); - hw_info[2] = (uint32_t)((fab_code << 26) | (lot_code_0 >> 6)); - hw_info[3] = (uint32_t)(vendor_code); - - memcpy(dst, hw_info, 0x10); -} -/* Get the SocType from the HardwareType. */ -uint32_t fuse_get_soc_type(void) { - switch (fuse_get_hardware_type()) { - case 0: - case 1: - return 0; /* SocType_Erista */ - case 3: - case 2: - case 4: - case 5: - return 1; /* SocType_Mariko */ - default: - return 0xF; /* SocType_Undefined */ - } -} - -/* Check if have a new ODM fuse format. */ -bool fuse_is_new_format(void) { - return ((fuse_get_reserved_odm(4) & 0x800) && (fuse_get_reserved_odm(0) == 0x8E61ECAE) && (fuse_get_reserved_odm(1) == 0xF2BA3BB2)); -} - -/* Get the DeviceUniqueKeyGeneration. */ -uint32_t fuse_get_device_unique_key_generation(void) { - if (fuse_get_soc_type() != 0 || fuse_is_new_format()) { - return (fuse_get_reserved_odm(2) & 0x1F); - } else { - return 0; - } -} - - -/* Get the Regulator type. */ -uint32_t fuse_get_regulator(void) { - if (fuse_get_soc_type() == 1) { - return ((fuse_get_reserved_odm(28) & 1) + 1); /* Regulator_Mariko_Max77812_A or Regulator_Mariko_Max77812_B */ - } else { - return 0; /* Regulator_Erista_Max77621 */ - } -} - - -static const uint32_t fuse_version_increment_firmwares[] = { - ATMOSPHERE_TARGET_FIRMWARE_12_0_2, - ATMOSPHERE_TARGET_FIRMWARE_11_0_0, - ATMOSPHERE_TARGET_FIRMWARE_10_0_0, - ATMOSPHERE_TARGET_FIRMWARE_9_1_0, - ATMOSPHERE_TARGET_FIRMWARE_9_0_0, - ATMOSPHERE_TARGET_FIRMWARE_8_1_0, - ATMOSPHERE_TARGET_FIRMWARE_7_0_0, - ATMOSPHERE_TARGET_FIRMWARE_6_2_0, - ATMOSPHERE_TARGET_FIRMWARE_6_0_0, - ATMOSPHERE_TARGET_FIRMWARE_5_0_0, - ATMOSPHERE_TARGET_FIRMWARE_4_0_0, - ATMOSPHERE_TARGET_FIRMWARE_3_0_2, - ATMOSPHERE_TARGET_FIRMWARE_3_0_0, - ATMOSPHERE_TARGET_FIRMWARE_2_0_0, - ATMOSPHERE_TARGET_FIRMWARE_1_0_0, -}; - -static const uint32_t num_fuse_increments = sizeof(fuse_version_increment_firmwares) / sizeof(fuse_version_increment_firmwares[0]); - -uint32_t fuse_get_expected_fuse_count(uint32_t target_firmware) { - for (uint32_t i = 0; i < num_fuse_increments; ++i) { - if (target_firmware >= fuse_version_increment_firmwares[i]) { - return num_fuse_increments - i; - } - } - return 0; -} - -uint32_t fuse_get_burnt_fuse_count(void) { - const uint32_t val = fuse_get_reserved_odm(7); - uint32_t count = 0; - for (uint32_t i = 0; i < sizeof(uint32_t) * CHAR_BIT; ++i) { - if (((val >> i) & 1) != 0) { - ++count; - } - } - return count; -} diff --git a/fusee/fusee-secondary/src/fuse.h b/fusee/fusee-secondary/src/fuse.h deleted file mode 100644 index afd5cf60e..000000000 --- a/fusee/fusee-secondary/src/fuse.h +++ /dev/null @@ -1,487 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_FUSE_H -#define FUSEE_FUSE_H - -#define FUSE_BASE 0x7000F800 -#define FUSE_CHIP_BASE (FUSE_BASE + 0x98) -#define MAKE_FUSE_REG(n) MAKE_REG32(FUSE_BASE + n) -#define MAKE_FUSE_CHIP_REG(n) MAKE_REG32(FUSE_CHIP_BASE + n) - -typedef struct { - uint32_t FUSE_FUSECTRL; - uint32_t FUSE_FUSEADDR; - uint32_t FUSE_FUSERDATA; - uint32_t FUSE_FUSEWDATA; - uint32_t FUSE_FUSETIME_RD1; - uint32_t FUSE_FUSETIME_RD2; - uint32_t FUSE_FUSETIME_PGM1; - uint32_t FUSE_FUSETIME_PGM2; - uint32_t FUSE_PRIV2INTFC_START; - uint32_t FUSE_FUSEBYPASS; - uint32_t FUSE_PRIVATEKEYDISABLE; - uint32_t FUSE_DISABLEREGPROGRAM; - uint32_t FUSE_WRITE_ACCESS_SW; - uint32_t FUSE_PWR_GOOD_SW; - uint32_t _0x38; - uint32_t FUSE_PRIV2RESHIFT; - uint32_t _0x40[0x3]; - uint32_t FUSE_FUSETIME_RD3; - uint32_t _0x50[0xC]; - uint32_t FUSE_PRIVATE_KEY0_NONZERO; - uint32_t FUSE_PRIVATE_KEY1_NONZERO; - uint32_t FUSE_PRIVATE_KEY2_NONZERO; - uint32_t FUSE_PRIVATE_KEY3_NONZERO; - uint32_t FUSE_PRIVATE_KEY4_NONZERO; - uint32_t _0x94; -} tegra_fuse_t; - -typedef struct { - uint32_t _0x98[0x1A]; - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t _0x11C[0x3]; - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t _0x144; - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t _0x18C; - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t _0x224; - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t _0x238[0x3]; - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t _0x268[0x5]; - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t _0x294; - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC[0x5]; - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t _0x324[0x5]; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x20]; -} tegra_fuse_chip_common_t; - -typedef struct { - uint32_t _0x98[0x1A]; - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t _0x11C[0x3]; - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t _0x144; - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t _0x18C; - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t FUSE_SATA_CALIB; /* Erista only. */ - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t _0x238[0x3]; - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t FUSE_PKC_DISABLE; /* Erista only. */ - uint32_t _0x26C[0x4]; - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t _0x294; - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC[0x5]; - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t FUSE_OPT_RAM_SVOP_DP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_PDP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_REG; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_SP; /* Erista only. */ - uint32_t FUSE_OPT_RAM_SVOP_SMPDP; /* Erista only. */ - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x20]; -} tegra_fuse_chip_erista_t; - -typedef struct { - uint32_t FUSE_RESERVED_ODM8[0xE]; /* Mariko only. */ - uint32_t FUSE_KEK[0x4]; /* Mariko only. */ - uint32_t FUSE_BEK[0x4]; /* Mariko only. */ - uint32_t _0xF0; /* Mariko only. */ - uint32_t _0xF4; /* Mariko only. */ - uint32_t _0xF8; /* Mariko only. */ - uint32_t _0xFC; /* Mariko only. */ - uint32_t FUSE_PRODUCTION_MODE; - uint32_t FUSE_JTAG_SECUREID_VALID; - uint32_t FUSE_ODM_LOCK; - uint32_t FUSE_OPT_OPENGL_EN; - uint32_t FUSE_SKU_INFO; - uint32_t FUSE_CPU_SPEEDO_0_CALIB; - uint32_t FUSE_CPU_IDDQ_CALIB; - uint32_t FUSE_RESERVED_ODM22[0x3]; /* Mariko only. */ - uint32_t FUSE_OPT_FT_REV; - uint32_t FUSE_CPU_SPEEDO_1_CALIB; - uint32_t FUSE_CPU_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_SPEEDO_0_CALIB; - uint32_t FUSE_SOC_SPEEDO_1_CALIB; - uint32_t FUSE_SOC_SPEEDO_2_CALIB; - uint32_t FUSE_SOC_IDDQ_CALIB; - uint32_t FUSE_RESERVED_ODM25; /* Mariko only. */ - uint32_t FUSE_FA; - uint32_t FUSE_RESERVED_PRODUCTION; - uint32_t FUSE_HDMI_LANE0_CALIB; - uint32_t FUSE_HDMI_LANE1_CALIB; - uint32_t FUSE_HDMI_LANE2_CALIB; - uint32_t FUSE_HDMI_LANE3_CALIB; - uint32_t FUSE_ENCRYPTION_RATE; - uint32_t FUSE_PUBLIC_KEY[0x8]; - uint32_t FUSE_TSENSOR1_CALIB; - uint32_t FUSE_TSENSOR2_CALIB; - uint32_t FUSE_OPT_SECURE_SCC_DIS; /* Mariko only. */ - uint32_t FUSE_OPT_CP_REV; - uint32_t FUSE_OPT_PFG; - uint32_t FUSE_TSENSOR0_CALIB; - uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE; - uint32_t FUSE_SECURITY_MODE; - uint32_t FUSE_PRIVATE_KEY[0x5]; - uint32_t FUSE_ARM_JTAG_DIS; - uint32_t FUSE_BOOT_DEVICE_INFO; - uint32_t FUSE_RESERVED_SW; - uint32_t FUSE_OPT_VP9_DISABLE; - uint32_t FUSE_RESERVED_ODM0[0x8]; - uint32_t FUSE_OBS_DIS; - uint32_t _0x1EC; /* Mariko only. */ - uint32_t FUSE_USB_CALIB; - uint32_t FUSE_SKU_DIRECT_CONFIG; - uint32_t FUSE_KFUSE_PRIVKEY_CTRL; - uint32_t FUSE_PACKAGE_INFO; - uint32_t FUSE_OPT_VENDOR_CODE; - uint32_t FUSE_OPT_FAB_CODE; - uint32_t FUSE_OPT_LOT_CODE_0; - uint32_t FUSE_OPT_LOT_CODE_1; - uint32_t FUSE_OPT_WAFER_ID; - uint32_t FUSE_OPT_X_COORDINATE; - uint32_t FUSE_OPT_Y_COORDINATE; - uint32_t FUSE_OPT_SEC_DEBUG_EN; - uint32_t FUSE_OPT_OPS_RESERVED; - uint32_t _0x224; /* Mariko only. */ - uint32_t FUSE_GPU_IDDQ_CALIB; - uint32_t FUSE_TSENSOR3_CALIB; - uint32_t FUSE_CLOCK_BOUNDOUT0; - uint32_t FUSE_CLOCK_BOUNDOUT1; - uint32_t FUSE_RESERVED_ODM26[0x3]; /* Mariko only. */ - uint32_t FUSE_OPT_SAMPLE_TYPE; - uint32_t FUSE_OPT_SUBREVISION; - uint32_t FUSE_OPT_SW_RESERVED_0; - uint32_t FUSE_OPT_SW_RESERVED_1; - uint32_t FUSE_TSENSOR4_CALIB; - uint32_t FUSE_TSENSOR5_CALIB; - uint32_t FUSE_TSENSOR6_CALIB; - uint32_t FUSE_TSENSOR7_CALIB; - uint32_t FUSE_OPT_PRIV_SEC_EN; - uint32_t FUSE_BOOT_SECURITY_INFO; /* Mariko only. */ - uint32_t _0x26C; /* Mariko only. */ - uint32_t _0x270; /* Mariko only. */ - uint32_t _0x274; /* Mariko only. */ - uint32_t _0x278; /* Mariko only. */ - uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE; - uint32_t FUSE_TSENSOR_COMMON; - uint32_t FUSE_OPT_CP_BIN; - uint32_t FUSE_OPT_GPU_DISABLE; - uint32_t FUSE_OPT_FT_BIN; - uint32_t FUSE_OPT_DONE_MAP; - uint32_t FUSE_RESERVED_ODM29; /* Mariko only. */ - uint32_t FUSE_APB2JTAG_DISABLE; - uint32_t FUSE_ODM_INFO; - uint32_t _0x2A0[0x2]; - uint32_t FUSE_ARM_CRYPT_DE_FEATURE; - uint32_t _0x2AC; - uint32_t _0x2B0; /* Mariko only. */ - uint32_t _0x2B4; /* Mariko only. */ - uint32_t _0x2B8; /* Mariko only. */ - uint32_t _0x2BC; /* Mariko only. */ - uint32_t FUSE_WOA_SKU_FLAG; - uint32_t FUSE_ECO_RESERVE_1; - uint32_t FUSE_GCPLEX_CONFIG_FUSE; - uint32_t FUSE_PRODUCTION_MONTH; - uint32_t FUSE_RAM_REPAIR_INDICATOR; - uint32_t FUSE_TSENSOR9_CALIB; - uint32_t _0x2D8; - uint32_t FUSE_VMIN_CALIBRATION; - uint32_t FUSE_AGING_SENSOR_CALIBRATION; - uint32_t FUSE_DEBUG_AUTHENTICATION; - uint32_t FUSE_SECURE_PROVISION_INDEX; - uint32_t FUSE_SECURE_PROVISION_INFO; - uint32_t FUSE_OPT_GPU_DISABLE_CP1; - uint32_t FUSE_SPARE_ENDIS; - uint32_t FUSE_ECO_RESERVE_0; - uint32_t _0x2FC[0x2]; - uint32_t FUSE_RESERVED_CALIB0; - uint32_t FUSE_RESERVED_CALIB1; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE; - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1; - uint32_t FUSE_OPT_CPU_DISABLE; - uint32_t FUSE_OPT_CPU_DISABLE_CP1; - uint32_t FUSE_TSENSOR10_CALIB; - uint32_t FUSE_TSENSOR10_CALIB_AUX; - uint32_t _0x324; /* Mariko only. */ - uint32_t _0x328; /* Mariko only. */ - uint32_t _0x32C; /* Mariko only. */ - uint32_t _0x330; /* Mariko only. */ - uint32_t _0x334; /* Mariko only. */ - uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1; - uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2; - uint32_t FUSE_OPT_CPU_DISABLE_CP2; - uint32_t FUSE_OPT_GPU_DISABLE_CP2; - uint32_t FUSE_USB_CALIB_EXT; - uint32_t FUSE_RESERVED_FIELD; - uint32_t _0x358[0x9]; - uint32_t FUSE_SPARE_REALIGNMENT_REG; - uint32_t FUSE_SPARE_BIT[0x1E]; -} tegra_fuse_chip_mariko_t; - -static inline volatile tegra_fuse_t *fuse_get_regs(void) -{ - return (volatile tegra_fuse_t *)FUSE_BASE; -} - -static inline volatile tegra_fuse_chip_common_t *fuse_chip_common_get_regs(void) -{ - return (volatile tegra_fuse_chip_common_t *)FUSE_CHIP_BASE; -} - -static inline volatile tegra_fuse_chip_erista_t *fuse_chip_erista_get_regs(void) -{ - return (volatile tegra_fuse_chip_erista_t *)FUSE_CHIP_BASE; -} - -static inline volatile tegra_fuse_chip_mariko_t *fuse_chip_mariko_get_regs(void) -{ - return (volatile tegra_fuse_chip_mariko_t *)FUSE_CHIP_BASE; -} - -void fuse_init(void); -void fuse_disable_programming(void); -void fuse_disable_private_key(void); -void fuse_enable_power(void); -void fuse_disable_power(void); - -uint32_t fuse_get_sku_info(void); -uint32_t fuse_get_spare_bit(uint32_t index); -uint32_t fuse_get_reserved_odm(uint32_t index); -uint32_t fuse_get_bootrom_patch_version(void); -uint64_t fuse_get_device_id(void); -uint32_t fuse_get_dram_id(void); -uint32_t fuse_get_hardware_type_with_firmware_check(uint32_t target_firmware); -uint32_t fuse_get_hardware_type(void); -uint32_t fuse_get_hardware_state(void); -void fuse_get_hardware_info(void *dst); -bool fuse_is_new_format(void); -uint32_t fuse_get_device_unique_key_generation(void); -uint32_t fuse_get_soc_type(void); -uint32_t fuse_get_regulator(void); - -uint32_t fuse_get_expected_fuse_count(uint32_t target_firmware); -uint32_t fuse_get_burnt_fuse_count(void); - -uint32_t fuse_hw_read(uint32_t addr); -void fuse_hw_write(uint32_t value, uint32_t addr); -void fuse_hw_sense(void); - -#endif diff --git a/fusee/fusee-secondary/src/gpio.c b/fusee/fusee-secondary/src/gpio.c deleted file mode 100644 index 76dbb87ce..000000000 --- a/fusee/fusee-secondary/src/gpio.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include - -#include "gpio.h" -#include "utils.h" - -/* Set GPIO's value. */ -static void gpio_register_set(uint32_t pin, bool do_set, uint32_t offset) { - volatile tegra_gpio_t *gpio = gpio_get_regs(); - - /* Retrieve the register set that corresponds to the given pin and offset. */ - volatile uint32_t *cluster = (uint32_t *)((uintptr_t)&gpio->bank[(pin >> GPIO_BANK_SHIFT)] + offset); - - /* Figure out the offset into the cluster, and the mask to be used. */ - uint32_t port = ((pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK); - uint32_t mask = (1 << (pin & GPIO_PIN_MASK)); - - /* Set or clear the bit, as appropriate. */ - if (do_set) - cluster[port] |= mask; - else - cluster[port] &= ~mask; - - /* Dummy read. */ - cluster[port]; -} - -/* Get GPIO's value. */ -static bool gpio_register_get(uint32_t pin, uint32_t offset) { - volatile tegra_gpio_t *gpio = gpio_get_regs(); - - /* Retrieve the register set that corresponds to the given pin and offset. */ - volatile uint32_t *cluster = (uint32_t *)((uintptr_t)&gpio->bank[(pin >> GPIO_BANK_SHIFT)] + offset); - - /* Figure out the offset into the cluster, and the mask to be used. */ - uint32_t port = ((pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK); - uint32_t mask = (1 << (pin & GPIO_PIN_MASK)); - - /* Convert the given value to a boolean. */ - return !!(cluster[port] & mask); -} - -/* Configure GPIO's mode. */ -void gpio_configure_mode(uint32_t pin, uint32_t mode) { - gpio_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(tegra_gpio_bank_t, config)); -} - -/* Configure GPIO's direction. */ -void gpio_configure_direction(uint32_t pin, uint32_t dir) { - gpio_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(tegra_gpio_bank_t, direction)); -} - -/* Write to GPIO. */ -void gpio_write(uint32_t pin, uint32_t value) { - gpio_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(tegra_gpio_bank_t, out)); -} - -/* Read from GPIO. */ -uint32_t gpio_read(uint32_t pin) { - return gpio_register_get(pin, offsetof(tegra_gpio_bank_t, in)); -} diff --git a/fusee/fusee-secondary/src/gpio.h b/fusee/fusee-secondary/src/gpio.h deleted file mode 100644 index b187ed618..000000000 --- a/fusee/fusee-secondary/src/gpio.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_GPIO_H -#define FUSEE_GPIO_H - -#include - -#define GPIO_BASE 0x6000D000 -#define MAKE_GPIO_REG(n) MAKE_REG32(GPIO_BASE + n) - -#define TEGRA_GPIO_PORTS 4 -#define TEGRA_GPIO_BANKS 8 -#define GPIO_BANK_SHIFT 5 -#define GPIO_PORT_SHIFT 3 -#define GPIO_PORT_MASK 0x03 -#define GPIO_PIN_MASK 0x07 - -typedef enum { - TEGRA_GPIO_PORT_A = 0, - TEGRA_GPIO_PORT_B = 1, - TEGRA_GPIO_PORT_C = 2, - TEGRA_GPIO_PORT_D = 3, - TEGRA_GPIO_PORT_E = 4, - TEGRA_GPIO_PORT_F = 5, - TEGRA_GPIO_PORT_G = 6, - TEGRA_GPIO_PORT_H = 7, - TEGRA_GPIO_PORT_I = 8, - TEGRA_GPIO_PORT_J = 9, - TEGRA_GPIO_PORT_K = 10, - TEGRA_GPIO_PORT_L = 11, - TEGRA_GPIO_PORT_M = 12, - TEGRA_GPIO_PORT_N = 13, - TEGRA_GPIO_PORT_O = 14, - TEGRA_GPIO_PORT_P = 15, - TEGRA_GPIO_PORT_Q = 16, - TEGRA_GPIO_PORT_R = 17, - TEGRA_GPIO_PORT_S = 18, - TEGRA_GPIO_PORT_T = 19, - TEGRA_GPIO_PORT_U = 20, - TEGRA_GPIO_PORT_V = 21, - TEGRA_GPIO_PORT_W = 22, - TEGRA_GPIO_PORT_X = 23, - TEGRA_GPIO_PORT_Y = 24, - TEGRA_GPIO_PORT_Z = 25, - TEGRA_GPIO_PORT_AA = 26, - TEGRA_GPIO_PORT_BB = 27, - TEGRA_GPIO_PORT_CC = 28, - TEGRA_GPIO_PORT_DD = 29, - TEGRA_GPIO_PORT_EE = 30, - TEGRA_GPIO_PORT_FF = 31, -} tegra_gpio_port; - -typedef struct { - uint32_t config[TEGRA_GPIO_PORTS]; - uint32_t direction[TEGRA_GPIO_PORTS]; - uint32_t out[TEGRA_GPIO_PORTS]; - uint32_t in[TEGRA_GPIO_PORTS]; - uint32_t int_status[TEGRA_GPIO_PORTS]; - uint32_t int_enable[TEGRA_GPIO_PORTS]; - uint32_t int_level[TEGRA_GPIO_PORTS]; - uint32_t int_clear[TEGRA_GPIO_PORTS]; - uint32_t masked_config[TEGRA_GPIO_PORTS]; - uint32_t masked_dir_out[TEGRA_GPIO_PORTS]; - uint32_t masked_out[TEGRA_GPIO_PORTS]; - uint32_t masked_in[TEGRA_GPIO_PORTS]; - uint32_t masked_int_status[TEGRA_GPIO_PORTS]; - uint32_t masked_int_enable[TEGRA_GPIO_PORTS]; - uint32_t masked_int_level[TEGRA_GPIO_PORTS]; - uint32_t masked_int_clear[TEGRA_GPIO_PORTS]; -} tegra_gpio_bank_t; - -typedef struct { - tegra_gpio_bank_t bank[TEGRA_GPIO_BANKS]; -} tegra_gpio_t; - -static inline volatile tegra_gpio_t *gpio_get_regs(void) -{ - return (volatile tegra_gpio_t *)GPIO_BASE; -} - -#define TEGRA_GPIO(port, offset) \ - ((TEGRA_GPIO_PORT_##port * 8) + offset) - -/* Mode select */ -#define GPIO_MODE_SFIO 0 -#define GPIO_MODE_GPIO 1 - -/* Direction */ -#define GPIO_DIRECTION_INPUT 0 -#define GPIO_DIRECTION_OUTPUT 1 - -/* Level */ -#define GPIO_LEVEL_LOW 0 -#define GPIO_LEVEL_HIGH 1 - -/* Named GPIOs */ -#define GPIO_BUTTON_VOL_DOWN TEGRA_GPIO(X, 7) -#define GPIO_BUTTON_VOL_UP TEGRA_GPIO(X, 6) -#define GPIO_MICROSD_CARD_DETECT TEGRA_GPIO(Z, 1) -#define GPIO_MICROSD_WRITE_PROTECT TEGRA_GPIO(Z, 4) -#define GPIO_MICROSD_SUPPLY_ENABLE TEGRA_GPIO(E, 4) -#define GPIO_LCD_BL_P5V TEGRA_GPIO(I, 0) -#define GPIO_LCD_BL_N5V TEGRA_GPIO(I, 1) -#define GPIO_LCD_BL_PWM TEGRA_GPIO(V, 0) -#define GPIO_LCD_BL_EN TEGRA_GPIO(V, 1) -#define GPIO_LCD_BL_RST TEGRA_GPIO(V, 2) - -void gpio_configure_mode(uint32_t pin, uint32_t mode); -void gpio_configure_direction(uint32_t pin, uint32_t dir); -void gpio_write(uint32_t pin, uint32_t value); -uint32_t gpio_read(uint32_t pin); - -#endif diff --git a/fusee/fusee-secondary/src/gpt.c b/fusee/fusee-secondary/src/gpt.c deleted file mode 100644 index 5f4183b12..000000000 --- a/fusee/fusee-secondary/src/gpt.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "gpt.h" - -int gpt_get_header(efi_header_t *out, FILE *disk, size_t sector_size) { - union { - uint8_t sector[512]; - efi_header_t hdr; - } d; - - if (disk == NULL || out == NULL) { - errno = EINVAL; - return -1; - } - - /* Read and check the protective MBR. */ - if (fread(d.sector, 512, 1, disk) == 0) { - return -1; - } - if (fseek(disk, sector_size - 512, SEEK_CUR) != 0) { - return -1; - } - - if (d.sector[0x1FE] != 0x55 || d.sector[0x1FF] != 0xAA) { - errno = EILSEQ; - return -1; - } - - /* We only allow for the GPT header to be at sector 1 (like nx-bootloader). */ - if (fread(d.sector, 512, 1, disk) == 0) { - return -1; - } - if (fseek(disk, sector_size - 512, SEEK_CUR) != 0) { - return -1; - } - /* Check for "EFI PART". */ - if (memcmp(d.hdr.magic, "EFI PART", 8) != 0) { - errno = EILSEQ; - return -1; - } - /* Check whether we're really at sector 1, etc. (we won't check backup_lba). */ - if (d.hdr.header_lba != 1 || d.hdr.entries_first_lba < 2 || d.hdr.partitions_last_lba < d.hdr.partitions_first_lba) { - errno = EILSEQ; - return -1; - } - if (d.hdr.header_size < sizeof(efi_header_t) || d.hdr.entry_size < sizeof(efi_entry_t)) { - errno = EILSEQ; - return -1; - } - /* Some more checks: */ - if(d.hdr.header_size > sector_size || d.hdr.revision != 0x10000) { - errno = ENOTSUP; - return -1; - } - - memcpy(out, &d.hdr, sizeof(efi_header_t)); - - return 0; -} - -int gpt_iterate_through_entries(FILE *disk, size_t sector_size, gpt_entry_iterator_t callback, void *param) { - efi_header_t hdr; - efi_entry_t entry; - size_t offset = 2 * 512; /* Sector #2. */ - size_t delta; - - /* Get the header. */ - if (gpt_get_header(&hdr, disk, sector_size) == -1) { - return -1; - } - - /* Seek to the entry table. */ - if (fseek(disk, sector_size * hdr.entries_first_lba - offset, SEEK_CUR) != 0) { - return -1; - } - - offset = sector_size * hdr.entries_first_lba; - delta = hdr.entry_size - sizeof(efi_entry_t); - - /* Iterate through the entries. */ - for (uint32_t i = 0; i < hdr.entry_count; i++) { - if (!fread(&entry, sizeof(efi_entry_t), 1, disk)) { - return -1; - } - - if (callback(&entry, param, offset, disk) != 0) { - return -1; - } - - if (delta != 0 && fseek(disk, delta, SEEK_CUR) != 0) { - return -1; - } - - offset += hdr.entry_size; - } - - return 0; -} diff --git a/fusee/fusee-secondary/src/gpt.h b/fusee/fusee-secondary/src/gpt.h deleted file mode 100644 index 491dae4f6..000000000 --- a/fusee/fusee-secondary/src/gpt.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_GPT_H -#define FUSEE_GPT_H - -#include -#include -#include - -typedef struct efi_entry_t { - uint8_t type_uuid[16]; - uint8_t unique_uuid[16]; - uint64_t first_lba; - uint64_t last_lba; /* Inclusive */ - uint64_t attributes; - uint16_t name[36]; -} efi_entry_t; - -typedef struct efi_header { - uint8_t magic[8]; /* Must be "EFI PART" */ - uint32_t revision; - - uint32_t header_size; /* Usually and at most 92 bytes. */ - uint32_t header_crc32; /* 0 during the computation */ - uint32_t reserved; /* Must be 0. */ - - uint64_t header_lba; - uint64_t backup_lba; - uint64_t partitions_first_lba; - uint64_t partitions_last_lba; - - uint8_t disk_guid[16]; - - uint64_t entries_first_lba; - uint32_t entry_count; - uint32_t entry_size; - uint32_t entries_crc32; -} __attribute__((packed, aligned(4))) efi_header_t; - -typedef int (*gpt_entry_iterator_t)(const efi_entry_t *entry, void *param, size_t entry_offset, FILE *disk); -typedef int (*gpt_emu_entry_iterator_t)(const efi_entry_t *entry, void *param, size_t entry_offset, FILE *disk, const char *origin_path, int num_parts, uint64_t part_limit); - -int gpt_get_header(efi_header_t *out, FILE *disk, size_t sector_size); -int gpt_iterate_through_entries(FILE *disk, size_t sector_size, gpt_entry_iterator_t callback, void *param); - -#endif diff --git a/fusee/fusee-secondary/src/i2c.c b/fusee/fusee-secondary/src/i2c.c deleted file mode 100644 index e8a9d3e1b..000000000 --- a/fusee/fusee-secondary/src/i2c.c +++ /dev/null @@ -1,252 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "i2c.h" -#include "utils.h" -#include "timers.h" -#include "pinmux.h" - -/* Prototypes for internal commands. */ -volatile tegra_i2c_t *i2c_get_registers_from_id(I2CDevice id); -void i2c_load_config(volatile tegra_i2c_t *regs); - -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size); -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size); - -bool i2c_write(volatile tegra_i2c_t *regs, uint8_t device, void *src, size_t src_size); -bool i2c_read(volatile tegra_i2c_t *regs, uint8_t device, void *dst, size_t dst_size); - -/* Configure I2C pinmux. */ -void i2c_config(I2CDevice id) { - volatile tegra_pinmux_t *pinmux = pinmux_get_regs(); - - switch (id) { - case I2C_1: - pinmux->gen1_i2c_scl = PINMUX_INPUT; - pinmux->gen1_i2c_sda = PINMUX_INPUT; - break; - case I2C_2: - pinmux->gen2_i2c_scl = PINMUX_INPUT; - pinmux->gen2_i2c_sda = PINMUX_INPUT; - break; - case I2C_3: - pinmux->gen3_i2c_scl = PINMUX_INPUT; - pinmux->gen3_i2c_sda = PINMUX_INPUT; - break; - case I2C_4: - pinmux->cam_i2c_scl = PINMUX_INPUT; - pinmux->cam_i2c_sda = PINMUX_INPUT; - break; - case I2C_5: - pinmux->pwr_i2c_scl = PINMUX_INPUT; - pinmux->pwr_i2c_sda = PINMUX_INPUT; - break; - case I2C_6: - /* Unused. */ - break; - default: break; - } -} - -/* Initialize I2C based on registers. */ -void i2c_init(I2CDevice id) { - volatile tegra_i2c_t *regs = i2c_get_registers_from_id(id); - - /* Setup divisor, and clear the bus. */ - regs->I2C_I2C_CLK_DIVISOR_REGISTER_0 = 0x50001; - regs->I2C_I2C_BUS_CLEAR_CONFIG_0 = 0x90003; - - /* Load hardware configuration. */ - i2c_load_config(regs); - - /* Wait a while until BUS_CLEAR_DONE is set. */ - for (unsigned int i = 0; i < 10; i++) { - udelay(20000); - if (regs->I2C_INTERRUPT_STATUS_REGISTER_0 & 0x800) { - break; - } - } - - /* Read the BUS_CLEAR_STATUS. Result doesn't matter. */ - regs->I2C_I2C_BUS_CLEAR_STATUS_0; - - /* Read and set the Interrupt Status. */ - uint32_t int_status = regs->I2C_INTERRUPT_STATUS_REGISTER_0; - regs->I2C_INTERRUPT_STATUS_REGISTER_0 = int_status; -} - -/* Sets a bit in a PMIC register over I2C during CPU shutdown. */ -void i2c_send_pmic_cpu_shutdown_cmd(void) { - uint32_t val = 0; - /* PMIC == Device 4:3C. */ - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, 0x41, &val, 1); - val |= 4; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, 0x41, &val, 1); -} - -/* Queries the value of TI charger bit over I2C. */ -bool i2c_query_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - return (val & 0x80) != 0; -} - -/* Clears TI charger bit over I2C. */ -void i2c_clear_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - val &= 0x7F; - i2c_send(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); -} - -/* Sets TI charger bit over I2C. */ -void i2c_set_ti_charger_bit_7(void) { - uint32_t val = 0; - /* TI Charger = Device 0:6B. */ - i2c_query(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); - val |= 0x80; - i2c_send(I2C_1, BQ24193_I2C_ADDR, 0, &val, 1); -} - -/* Get registers pointer based on I2C ID. */ -volatile tegra_i2c_t *i2c_get_registers_from_id(I2CDevice id) { - switch (id) { - case I2C_1: - return I2C1_REGS; - case I2C_2: - return I2C2_REGS; - case I2C_3: - return I2C3_REGS; - case I2C_4: - return I2C4_REGS; - case I2C_5: - return I2C5_REGS; - case I2C_6: - return I2C6_REGS; - default: - generic_panic(); - } - return NULL; -} - -/* Load hardware config for I2C4. */ -void i2c_load_config(volatile tegra_i2c_t *regs) { - /* Set MSTR_CONFIG_LOAD, TIMEOUT_CONFIG_LOAD, undocumented bit. */ - regs->I2C_I2C_CONFIG_LOAD_0 = 0x25; - - /* Wait a bit for master config to be loaded. */ - for (unsigned int i = 0; i < 20; i++) { - udelay(1); - if (!(regs->I2C_I2C_CONFIG_LOAD_0 & 1)) { - break; - } - } -} - -/* Reads a register from a device over I2C, writes result to output. */ -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size) { - volatile tegra_i2c_t *regs = i2c_get_registers_from_id(id); - uint32_t val = r; - - /* Write single byte register ID to device. */ - if (!i2c_write(regs, device, &val, 1)) { - return false; - } - /* Limit output size to 32-bits. */ - if (dst_size > 4) { - return false; - } - - return i2c_read(regs, device, dst, dst_size); -} - -/* Writes a value to a register over I2C. */ -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size) { - uint32_t val = r; - if (src_size == 0) { - return true; - } else if (src_size <= 3) { - memcpy(((uint8_t *)&val) + 1, src, src_size); - return i2c_write(i2c_get_registers_from_id(id), device, &val, src_size + 1); - } else { - return false; - } -} - -/* Writes bytes to device over I2C. */ -bool i2c_write(volatile tegra_i2c_t *regs, uint8_t device, void *src, size_t src_size) { - if (src_size > 4) { - return false; - } else if (src_size == 0) { - return true; - } - - /* Set device for 7-bit write mode. */ - regs->I2C_I2C_CMD_ADDR0_0 = device << 1; - - /* Load in data to write. */ - regs->I2C_I2C_CMD_DATA1_0 = read32le(src, 0); - - /* Set config with LENGTH = src_size, NEW_MASTER_FSM, DEBOUNCE_CNT = 4T. */ - regs->I2C_I2C_CNFG_0 = ((src_size << 1) - 2) | 0x2800; - - i2c_load_config(regs); - - /* Config |= SEND; */ - regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200); - - while (regs->I2C_I2C_STATUS_0 & 0x100) { - /* Wait until not busy. */ - } - - /* Return CMD1_STAT == SL1_XFER_SUCCESSFUL. */ - return (regs->I2C_I2C_STATUS_0 & 0xF) == 0; -} - -/* Reads bytes from device over I2C. */ -bool i2c_read(volatile tegra_i2c_t *regs, uint8_t device, void *dst, size_t dst_size) { - if (dst_size > 4) { - return false; - } else if (dst_size == 0) { - return true; - } - - /* Set device for 7-bit read mode. */ - regs->I2C_I2C_CMD_ADDR0_0 = (device << 1) | 1; - - /* Set config with LENGTH = dst_size, NEW_MASTER_FSM, DEBOUNCE_CNT = 4T. */ - regs->I2C_I2C_CNFG_0 = ((dst_size << 1) - 2) | 0x2840; - - i2c_load_config(regs); - - /* Config |= SEND; */ - regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200); - - while (regs->I2C_I2C_STATUS_0 & 0x100) { - /* Wait until not busy. */ - } - - /* Ensure success. */ - if ((regs->I2C_I2C_STATUS_0 & 0xF) != 0) { - return false; - } - - uint32_t val = regs->I2C_I2C_CMD_DATA1_0; - memcpy(dst, &val, dst_size); - return true; -} diff --git a/fusee/fusee-secondary/src/i2c.h b/fusee/fusee-secondary/src/i2c.h deleted file mode 100644 index 4d3254333..000000000 --- a/fusee/fusee-secondary/src/i2c.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_I2C_H -#define FUSEE_I2C_H - -#include -#include -#include - -#define I2C1234_BASE 0x7000C000 -#define I2C56_BASE 0x7000D000 - -#define MAX77621_CPU_I2C_ADDR 0x1B -#define MAX77621_GPU_I2C_ADDR 0x1C -#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31 -#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33 -#define MAX17050_I2C_ADDR 0x36 -#define MAX77620_PWR_I2C_ADDR 0x3C -#define MAX77620_RTC_I2C_ADDR 0x68 -#define BQ24193_I2C_ADDR 0x6B - -typedef enum { - I2C_1 = 0, - I2C_2 = 1, - I2C_3 = 2, - I2C_4 = 3, - I2C_5 = 4, - I2C_6 = 5, -} I2CDevice; - -typedef struct { - uint32_t I2C_I2C_CNFG_0; - uint32_t I2C_I2C_CMD_ADDR0_0; - uint32_t I2C_I2C_CMD_ADDR1_0; - uint32_t I2C_I2C_CMD_DATA1_0; - uint32_t I2C_I2C_CMD_DATA2_0; - uint32_t _0x14; - uint32_t _0x18; - uint32_t I2C_I2C_STATUS_0; - uint32_t I2C_I2C_SL_CNFG_0; - uint32_t I2C_I2C_SL_RCVD_0; - uint32_t I2C_I2C_SL_STATUS_0; - uint32_t I2C_I2C_SL_ADDR1_0; - uint32_t I2C_I2C_SL_ADDR2_0; - uint32_t I2C_I2C_TLOW_SEXT_0; - uint32_t _0x38; - uint32_t I2C_I2C_SL_DELAY_COUNT_0; - uint32_t I2C_I2C_SL_INT_MASK_0; - uint32_t I2C_I2C_SL_INT_SOURCE_0; - uint32_t I2C_I2C_SL_INT_SET_0; - uint32_t _0x4C; - uint32_t I2C_I2C_TX_PACKET_FIFO_0; - uint32_t I2C_I2C_RX_FIFO_0; - uint32_t I2C_PACKET_TRANSFER_STATUS_0; - uint32_t I2C_FIFO_CONTROL_0; - uint32_t I2C_FIFO_STATUS_0; - uint32_t I2C_INTERRUPT_MASK_REGISTER_0; - uint32_t I2C_INTERRUPT_STATUS_REGISTER_0; - uint32_t I2C_I2C_CLK_DIVISOR_REGISTER_0; - uint32_t I2C_I2C_INTERRUPT_SOURCE_REGISTER_0; - uint32_t I2C_I2C_INTERRUPT_SET_REGISTER_0; - uint32_t I2C_I2C_SLV_TX_PACKET_FIFO_0; - uint32_t I2C_I2C_SLV_RX_FIFO_0; - uint32_t I2C_I2C_SLV_PACKET_STATUS_0; - uint32_t I2C_I2C_BUS_CLEAR_CONFIG_0; - uint32_t I2C_I2C_BUS_CLEAR_STATUS_0; - uint32_t I2C_I2C_CONFIG_LOAD_0; - uint32_t _0x90; - uint32_t I2C_I2C_INTERFACE_TIMING_0_0; - uint32_t I2C_I2C_INTERFACE_TIMING_1_0; - uint32_t I2C_I2C_HS_INTERFACE_TIMING_0_0; - uint32_t I2C_I2C_HS_INTERFACE_TIMING_1_0; -} tegra_i2c_t; - -#define I2C1_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x000)) -#define I2C2_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x400)) -#define I2C3_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x500)) -#define I2C4_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x700)) -#define I2C5_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x000)) -#define I2C6_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x100)) - -void i2c_config(I2CDevice id); - -void i2c_init(I2CDevice id); -bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size); -bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size); - -void i2c_send_pmic_cpu_shutdown_cmd(void); -bool i2c_query_ti_charger_bit_7(void); -void i2c_clear_ti_charger_bit_7(void); -void i2c_set_ti_charger_bit_7(void); - -#endif diff --git a/fusee/fusee-secondary/src/init.c b/fusee/fusee-secondary/src/init.c deleted file mode 100644 index a2c799890..000000000 --- a/fusee/fusee-secondary/src/init.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include "utils.h" - -void __libc_init_array(void); -void __libc_fini_array(void); - -extern uint8_t __bss_start__[], __bss_end__[]; -extern uint8_t __heap_start__[], __heap_end__[]; - -extern char *fake_heap_start; -extern char *fake_heap_end; - -int __program_argc; -void **__program_argv; - -void __attribute__((noreturn)) __program_exit(int rc); -void __attribute__((noreturn)) (*__program_exit_callback)(int rc) = NULL; - -static void __program_parse_argc_argv(int argc, char *argdata); -static void __program_cleanup_argv(void); - -static void __program_init_heap(void) { - fake_heap_start = (char*)__heap_start__; - fake_heap_end = (char*)__heap_end__; -} - -static void __program_init_newlib_hooks(void) { - __syscalls.exit = __program_exit; /* For exit, etc. */ -} - -static void __program_move_additional_sections(void) { -#if defined(FUSEE_STAGE1_SRC) || defined(FUSEE_STAGE2_SRC) - extern uint8_t __chainloader_lma__[], __chainloader_start__[], __chainloader_bss_start__[], __chainloader_end__[]; - extern uint8_t __nxboot_lma__[], __nxboot_start__[], __nxboot_bss_start__[], __nxboot_end__[]; - memcpy(__chainloader_start__, __chainloader_lma__, __chainloader_bss_start__ - __chainloader_start__); - memset(__chainloader_bss_start__, 0, __chainloader_end__ - __chainloader_bss_start__); - memcpy(__nxboot_start__, __nxboot_lma__, __nxboot_bss_start__ - __nxboot_start__); - memset(__nxboot_bss_start__, 0, __nxboot_end__ - __nxboot_bss_start__); -#endif -} - -void __program_init(int argc, char *argdata) { - /* Zero-fill the .bss section */ - memset(__bss_start__, 0, __bss_end__ - __bss_start__); - - __program_init_heap(); - __program_init_newlib_hooks(); - __program_parse_argc_argv(argc, argdata); - - /* Once argv is parsed, we can discard the low IRAM region */ - __program_move_additional_sections(); - __libc_init_array(); -} - -void __program_exit(int rc) { - __libc_fini_array(); - __program_cleanup_argv(); - if (__program_exit_callback == NULL) { - /* Default callback */ - generic_panic(); - } else { - __program_exit_callback(rc); - } - for (;;); -} - -#ifdef FUSEE_STAGE1_SRC -static void __program_parse_argc_argv(int argc, char *argdata) { - __program_argc = 0; - __program_argv = NULL; -} -#elif defined(FUSEE_STAGE2_SRC) -#include "stage2.h" -static void __program_parse_argc_argv(int argc, char *argdata) { - size_t pos = 0, len; - - __program_argc = argc; - - __program_argv = malloc(argc * sizeof(void **)); - if (__program_argv == NULL) { - generic_panic(); - } - - len = strlen(argdata); - __program_argv[0] = malloc(len + 1); - if (__program_argv[0] == NULL) { - generic_panic(); - } - strcpy((char *)__program_argv[0], argdata); - pos += len + 1; - - __program_argv[1] = malloc(sizeof(stage2_args_t)); - if (__program_argv[1] == NULL) { - generic_panic(); - } - memcpy(__program_argv[1], argdata + pos, sizeof(stage2_args_t)); -} -#else -static void __program_parse_argc_argv(int argc, char *argdata) { - size_t pos = 0, len; - - __program_argc = argc; - - __program_argv = malloc(argc * sizeof(void **)); - if (__program_argv == NULL) { - generic_panic(); - } - - for (int i = 0; i < argc; i++) { - len = strlen(argdata + pos); - __program_argv[i] = malloc(len + 1); - if (__program_argv[i] == NULL) { - generic_panic(); - } - strcpy((char *)__program_argv[i], argdata + pos); - pos += len + 1; - } -} -#endif - -static void __program_cleanup_argv(void) { -#ifndef FUSEE_STAGE1_SRC - for (int i = 0; i < __program_argc; i++) { - free(__program_argv[i]); - __program_argv[i] = NULL; - } - free(__program_argv); -#endif -} diff --git a/fusee/fusee-secondary/src/ips.c b/fusee/fusee-secondary/src/ips.c deleted file mode 100644 index 5b19c03b8..000000000 --- a/fusee/fusee-secondary/src/ips.c +++ /dev/null @@ -1,473 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include -#include "utils.h" -#include "exocfg.h" -#include "se.h" -#include "../../../fusee/common/log.h" -#include "ips.h" - -/* IPS Patching adapted from Luma3DS (https://github.com/AuroraWright/Luma3DS/blob/master/sysmodules/loader/source/patcher.c) */ - -#define IPS_MAGIC "PATCH" -#define IPS_TAIL "EOF" - -#define IPS32_MAGIC "IPS32" -#define IPS32_TAIL "EEOF" - -#define NOGC_PATCH_DIR "default_nogc" -static bool g_enable_nogc_patches = false; - -void kip_patches_set_enable_nogc(void) { - g_enable_nogc_patches = true; -} - -static bool should_ignore_default_patch(const char *patch_dir) { - /* This function will ensure that select default patches only get loaded if enabled. */ - if (!g_enable_nogc_patches && strcmp(patch_dir, NOGC_PATCH_DIR) == 0) { - return true; - } - - return false; -} - -static bool has_patch(const char *dir, const char *subdir, const void *hash, size_t hash_size) { - char path[0x301] = {0}; - int cur_len = 0; - cur_len += snprintf(path + cur_len, sizeof(path) - cur_len, "%s/", dir); - if (subdir != NULL) { - cur_len += snprintf(path + cur_len, sizeof(path) - cur_len, "%s/", subdir); - } - for (size_t i = 0; i < hash_size; i++) { - cur_len += snprintf(path + cur_len, sizeof(path) - cur_len, "%02X", ((const uint8_t *)hash)[i]); - } - cur_len += snprintf(path + cur_len, sizeof(path) - cur_len, ".ips"); - if (cur_len >= sizeof(path)) { - return false; - } - - FILE *f = fopen(path, "rb"); - if (f != NULL) { - fclose(f); - return true; - } - return false; -} - -static bool has_needed_default_kip_patches(uint64_t title_id, const void *hash, size_t hash_size) { - if (title_id == 0x0100000000000000ULL && g_enable_nogc_patches) { - return has_patch("atmosphere/kip_patches", NOGC_PATCH_DIR, hash, hash_size); - } - - return true; -} - -/* Applies an IPS/IPS32 patch to memory, disregarding writes to the first prot_size bytes. */ -static void apply_ips_patch(uint8_t *mem, size_t mem_size, size_t prot_size, bool is_ips32, FILE *f_ips) { - uint8_t buffer[4]; - while (fread(buffer, is_ips32 ? 4 : 3, 1, f_ips) == 1) { - if (is_ips32 && memcmp(buffer, IPS32_TAIL, 4) == 0) { - break; - } else if (!is_ips32 && memcmp(buffer, IPS_TAIL, 3) == 0) { - break; - } - - /* Offset of patch. */ - uint32_t patch_offset; - if (is_ips32) { - patch_offset = (buffer[0] << 24) | (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]; - } else { - patch_offset = (buffer[0] << 16) | (buffer[1] << 8) | (buffer[2]); - } - - /* Size of patch. */ - if (fread(buffer, 2, 1, f_ips) != 1) { - break; - } - uint32_t patch_size = (buffer[0] << 8) | (buffer[1]); - - /* Check for RLE encoding. */ - if (patch_size == 0) { - /* Size of RLE. */ - if (fread(buffer, 2, 1, f_ips) != 1) { - break; - } - - uint32_t rle_size = (buffer[0] << 8) | (buffer[1]); - - /* Value for RLE. */ - if (fread(buffer, 1, 1, f_ips) != 1) { - break; - } - - if (patch_offset < prot_size) { - if (patch_offset + rle_size > prot_size) { - uint32_t diff = prot_size - patch_offset; - patch_offset += diff; - rle_size -= diff; - goto IPS_RLE_PATCH_OFFSET_WITHIN_BOUNDS; - } - } else { - IPS_RLE_PATCH_OFFSET_WITHIN_BOUNDS: - if (patch_offset + rle_size > mem_size) { - rle_size = mem_size - patch_offset; - } - memset(mem + patch_offset, buffer[0], rle_size); - } - } else { - uint32_t read_size; - if (patch_offset < prot_size) { - if (patch_offset + patch_size > prot_size) { - uint32_t diff = prot_size - patch_offset; - patch_offset += diff; - patch_size -= diff; - fseek(f_ips, diff, SEEK_CUR); - goto IPS_DATA_PATCH_OFFSET_WITHIN_BOUNDS; - } else { - fseek(f_ips, patch_size, SEEK_CUR); - } - } else { - IPS_DATA_PATCH_OFFSET_WITHIN_BOUNDS: - read_size = patch_size; - if (patch_offset + read_size > mem_size) { - read_size = mem_size - patch_offset; - } - if (fread(mem + patch_offset, read_size, 1, f_ips) != 1) { - break; - } - if (patch_size > read_size) { - fseek(f_ips, patch_size - read_size, SEEK_CUR); - } - } - } - } -} - - -static inline uint8_t hex_nybble_to_u8(const char nybble) { - if ('0' <= nybble && nybble <= '9') { - return nybble - '0'; - } else if ('a' <= nybble && nybble <= 'f') { - return nybble - 'a' + 0xa; - } else { - return nybble - 'A' + 0xA; - } -} - -static bool name_matches_hash(const char *name, size_t name_len, const void *hash, size_t hash_size) { - /* Validate name is hex build id. */ - for (unsigned int i = 0; i < name_len - 4; i++) { - if (isxdigit((unsigned char)name[i]) == 0) { - return false; - } - } - - /* Read hash from name. */ - uint8_t hash_from_name[0x20] = {0}; - for (unsigned int name_ofs = 0, id_ofs = 0; name_ofs < name_len - 4; id_ofs++) { - hash_from_name[id_ofs] |= hex_nybble_to_u8(name[name_ofs++]) << 4; - hash_from_name[id_ofs] |= hex_nybble_to_u8(name[name_ofs++]); - } - - return memcmp(hash, hash_from_name, hash_size) == 0; - -} - -static bool has_ips_patches(const char *dir, const void *hash, size_t hash_size) { - bool any_patches = false; - char path[0x301] = {0}; - snprintf(path, sizeof(path) - 1, "%s", dir); - DIR *patches_dir = opendir(path); - struct dirent *pdir_ent; - if (patches_dir != NULL) { - /* Iterate over the patches directory to find patch subdirectories. */ - while ((pdir_ent = readdir(patches_dir)) != NULL && !any_patches) { - if (strcmp(pdir_ent->d_name, ".") == 0 || strcmp(pdir_ent->d_name, "..") == 0) { - continue; - } - - if (should_ignore_default_patch(pdir_ent->d_name)) { - continue; - } - - snprintf(path, sizeof(path) - 1, "%s/%s", dir, pdir_ent->d_name); - DIR *patch_dir = opendir(path); - struct dirent *ent; - if (patch_dir != NULL) { - /* Iterate over the patch subdirectory to find .ips patches. */ - while ((ent = readdir(patch_dir)) != NULL && !any_patches) { - if (strcmp(ent->d_name, ".") == 0 || strcmp(ent->d_name, "..") == 0) { - continue; - } - - size_t name_len = strlen(ent->d_name); - if ((4 < name_len && name_len <= 0x44) && ((name_len & 1) == 0) && strcmp(ent->d_name + name_len - 4, ".ips") == 0 && name_matches_hash(ent->d_name, name_len, hash, hash_size)) { - snprintf(path, sizeof(path) - 1, "%s/%s/%s", dir, pdir_ent->d_name, ent->d_name); - FILE *f_ips = fopen(path, "rb"); - if (f_ips != NULL) { - uint8_t header[5]; - if (fread(header, 5, 1, f_ips) == 1) { - if (memcmp(header, IPS_MAGIC, 5) == 0 || memcmp(header, IPS32_MAGIC, 5) == 0) { - any_patches = true; - } - } - fclose(f_ips); - } - } - } - closedir(patch_dir); - } - } - closedir(patches_dir); - } - - return any_patches; -} - -static void apply_ips_patches(const char *dir, void *mem, size_t mem_size, size_t prot_size, const void *hash, size_t hash_size) { - char path[0x301] = {0}; - snprintf(path, sizeof(path) - 1, "%s", dir); - DIR *patches_dir = opendir(path); - struct dirent *pdir_ent; - if (patches_dir != NULL) { - /* Iterate over the patches directory to find patch subdirectories. */ - while ((pdir_ent = readdir(patches_dir)) != NULL) { - if (strcmp(pdir_ent->d_name, ".") == 0 || strcmp(pdir_ent->d_name, "..") == 0) { - continue; - } - - if (should_ignore_default_patch(pdir_ent->d_name)) { - continue; - } - - snprintf(path, sizeof(path) - 1, "%s/%s", dir, pdir_ent->d_name); - DIR *patch_dir = opendir(path); - struct dirent *ent; - if (patch_dir != NULL) { - /* Iterate over the patch subdirectory to find .ips patches. */ - while ((ent = readdir(patch_dir)) != NULL) { - if (strcmp(ent->d_name, ".") == 0 || strcmp(ent->d_name, "..") == 0) { - continue; - } - - size_t name_len = strlen(ent->d_name); - if ((4 < name_len && name_len <= 0x44) && ((name_len & 1) == 0) && strcmp(ent->d_name + name_len - 4, ".ips") == 0 && name_matches_hash(ent->d_name, name_len, hash, hash_size)) { - snprintf(path, sizeof(path) - 1, "%s/%s/%s", dir, pdir_ent->d_name, ent->d_name); - FILE *f_ips = fopen(path, "rb"); - if (f_ips != NULL) { - uint8_t header[5]; - if (fread(header, 5, 1, f_ips) == 1) { - if (memcmp(header, IPS_MAGIC, 5) == 0) { - apply_ips_patch(mem, mem_size, prot_size, false, f_ips); - } else if (memcmp(header, IPS32_MAGIC, 5) == 0) { - apply_ips_patch(mem, mem_size, prot_size, true, f_ips); - } - } - fclose(f_ips); - } - } - } - closedir(patch_dir); - } - } - closedir(patches_dir); - } -} - -void apply_kernel_ips_patches(void *kernel, size_t kernel_size) { - uint8_t hash[0x20]; - se_calculate_sha256(hash, kernel, kernel_size); - apply_ips_patches("atmosphere/kernel_patches", kernel, kernel_size, 0, hash, sizeof(hash)); -} - -static void kip1_blz_uncompress(void *hdr_end) { - uint8_t *u8_hdr_end = (uint8_t *)hdr_end; - uint32_t addl_size = ((u8_hdr_end[-4]) << 0) | ((u8_hdr_end[-3]) << 8) | ((u8_hdr_end[-2]) << 16) | ((u8_hdr_end[-1]) << 24); - uint32_t header_size = ((u8_hdr_end[-8]) << 0) | ((u8_hdr_end[-7]) << 8) | ((u8_hdr_end[-6]) << 16) | ((u8_hdr_end[-5]) << 24); - uint32_t cmp_and_hdr_size = ((u8_hdr_end[-12]) << 0) | ((u8_hdr_end[-11]) << 8) | ((u8_hdr_end[-10]) << 16) | ((u8_hdr_end[-9]) << 24); - - unsigned char *cmp_start = (unsigned char *)(((uintptr_t)hdr_end) - cmp_and_hdr_size); - uint32_t cmp_ofs = cmp_and_hdr_size - header_size; - uint32_t out_ofs = cmp_and_hdr_size + addl_size; - - while (out_ofs) { - unsigned char control = cmp_start[--cmp_ofs]; - for (unsigned int i = 0; i < 8; i++) { - if (control & 0x80) { - if (cmp_ofs < 2) { - fatal_error("KIP1 decompression out of bounds!\n"); - } - cmp_ofs -= 2; - uint16_t seg_val = ((unsigned int)cmp_start[cmp_ofs+1] << 8) | cmp_start[cmp_ofs]; - uint32_t seg_size = ((seg_val >> 12) & 0xF) + 3; - uint32_t seg_ofs = (seg_val & 0x0FFF) + 3; - if (out_ofs < seg_size) { - /* Kernel restricts segment copy to stay in bounds. */ - seg_size = out_ofs; - } - out_ofs -= seg_size; - - for (unsigned int j = 0; j < seg_size; j++) { - cmp_start[out_ofs + j] = cmp_start[out_ofs + j + seg_ofs]; - } - } else { - /* Copy directly. */ - if (cmp_ofs < 1) { - fatal_error("KIP1 decompression out of bounds!\n"); - } - cmp_start[--out_ofs] = cmp_start[--cmp_ofs]; - } - control <<= 1; - if (out_ofs == 0) { - return; - } - } - } -} - -kip1_header_t *kip1_uncompress(kip1_header_t *kip, size_t *size) { - kip1_header_t new_header = *kip; - for (unsigned int i = 0; i < 3; i++) { - new_header.section_headers[i].compressed_size = new_header.section_headers[i].out_size; - } - new_header.flags &= 0xF8; - - *size = kip1_get_size_from_header(&new_header); - - unsigned char *new_kip = calloc(1, *size); - if (new_kip == NULL) { - return NULL; - } - *((kip1_header_t *)new_kip) = new_header; - - size_t new_offset = 0x100; - size_t old_offset = 0x100; - for (unsigned int i = 0; i < 3; i++) { - memcpy(new_kip + new_offset, (unsigned char *)kip + old_offset, kip->section_headers[i].compressed_size); - if (kip->flags & (1 << i)) { - kip1_blz_uncompress(new_kip + new_offset + kip->section_headers[i].compressed_size); - } - new_offset += kip->section_headers[i].out_size; - old_offset += kip->section_headers[i].compressed_size; - } - - return (kip1_header_t *)new_kip; -} - -static const uint8_t g_fs_hashes[FS_VER_MAX][0x8] = { - "\xde\x9f\xdd\xa4\x08\x5d\xd5\xfe", /* FS_VER_1_0_0 */ - - "\xcd\x7b\xbe\x18\xd6\x13\x0b\x28", /* FS_VER_2_0_0 */ - "\xe7\x66\x92\xdf\xaa\x04\x20\xe9", /* FS_VER_2_0_0_EXFAT */ - - "\x0d\x70\x05\x62\x7b\x07\x76\x7c", /* FS_VER_2_1_0 */ - "\xdb\xd8\x5f\xca\xcc\x19\x3d\xa8", /* FS_VER_2_1_0_EXFAT */ - - "\xa8\x6d\xa5\xe8\x7e\xf1\x09\x7b", /* FS_VER_3_0_0 */ - "\x98\x1c\x57\xe7\xf0\x2f\x70\xf7", /* FS_VER_3_0_0_EXFAT */ - - "\x57\x39\x7c\x06\x3f\x10\xb6\x31", /* FS_VER_3_0_1 */ - "\x07\x30\x99\xd7\xc6\xad\x7d\x89", /* FS_VER_3_0_1_EXFAT */ - - "\x06\xe9\x07\x19\x59\x5a\x01\x0c", /* FS_VER_4_0_0 */ - "\x54\x9b\x0f\x8d\x6f\x72\xc4\xe9", /* FS_VER_4_0_0_EXFAT */ - - "\x80\x96\xaf\x7c\x6a\x35\xaa\x82", /* FS_VER_4_1_0 */ - "\x02\xd5\xab\xaa\xfd\x20\xc8\xb0", /* FS_VER_4_1_0_EXFAT */ - - "\xa6\xf2\x7a\xd9\xac\x7c\x73\xad", /* FS_VER_5_0_0 */ - "\xce\x3e\xcb\xa2\xf2\xf0\x62\xf5", /* FS_VER_5_0_0_EXFAT */ - - "\x76\xf8\x74\x02\xc9\x38\x7c\x0f", /* FS_VER_5_1_0 */ - "\x10\xb2\xd8\x16\x05\x48\x85\x99", /* FS_VER_5_1_0_EXFAT */ - - "\x3a\x57\x4d\x43\x61\x86\x19\x1d", /* FS_VER_6_0_0 */ - "\x33\x05\x53\xf6\xb5\xfb\x55\xc4", /* FS_VER_6_0_0_EXFAT */ - - "\x2A\xDB\xE9\x7E\x9B\x5F\x41\x77", /* FS_VER_7_0_0 */ - "\x2C\xCE\x65\x9C\xEC\x53\x6A\x8E", /* FS_VER_7_0_0_EXFAT */ - - "\xB2\xF5\x17\x6B\x35\x48\x36\x4D", /* FS_VER_8_0_0 */ - "\xDB\xD9\x41\xC0\xC5\x3C\x52\xCC", /* FS_VER_8_0_0_EXFAT */ - - "\x6B\x09\xB6\x7B\x29\xC0\x20\x24", /* FS_VER_8_1_0 */ - "\xB4\xCA\xE1\xF2\x49\x65\xD9\x2E", /* FS_VER_8_1_0_EXFAT */ - - "\x46\x87\x40\x76\x1E\x19\x3E\xB7", /* FS_VER_9_0_0 */ - "\x7C\x95\x13\x76\xE5\xC1\x2D\xF8", /* FS_VER_9_0_0_EXFAT */ - - "\xB5\xE7\xA6\x4C\x6F\x5C\x4F\xE3", /* FS_VER_9_1_0 */ - "\xF1\x96\xD1\x44\xD0\x44\x45\xB6", /* FS_VER_9_1_0_EXFAT */ - - "\x3E\xEB\xD9\xB7\xBC\xD1\xB5\xE0", /* FS_VER_10_0_0 */ - "\x81\x7E\xA2\xB0\xB7\x02\xC1\xF3", /* FS_VER_10_0_0_EXFAT */ - - "\xA9\x52\xB6\x57\xAD\xF9\xC2\xBA", /* FS_VER_10_2_0 */ - "\x16\x0D\x3E\x10\x4E\xAD\x61\x76", /* FS_VER_10_2_0_EXFAT */ - - "\xE3\x99\x15\x6E\x84\x4E\xB0\xAA", /* FS_VER_11_0_0 */ - "\x0B\xA1\x5B\xB3\x04\xB5\x05\x63", /* FS_VER_11_0_0_EXFAT */ - - "\xDC\x2A\x08\x49\x96\xBB\x3C\x01", /* FS_VER_12_0_0 */ - "\xD5\xA5\xBF\x36\x64\x0C\x49\xEA", /* FS_VER_12_0_0_EXFAT */ - - "\xC8\x67\x62\xBE\x19\xA5\x1F\xA0", /* FS_VER_12_0_3 */ - "\xE1\xE8\xD3\xD6\xA2\xFE\x0B\x10", /* FS_VER_12_0_3_EXFAT */ -}; - -kip1_header_t *apply_kip_ips_patches(kip1_header_t *kip, size_t kip_size, emummc_fs_ver_t *out_fs_ver) { - uint8_t hash[0x20]; - se_calculate_sha256(hash, kip, kip_size); - - if (kip->title_id == FS_TITLE_ID) { - bool found = false; - for (size_t i = 0; i < FS_VER_MAX; i++) { - if (memcmp(hash, g_fs_hashes[i], 0x8) == 0) { - found = true; - *out_fs_ver = (emummc_fs_ver_t)i; - } - } - if (!found) { - fatal_error("[NXBOOT]: Failed to identify FS version..."); - } - } - - if (!has_needed_default_kip_patches(kip->title_id, hash, sizeof(hash))) { - fatal_error("[NXBOOT]: Missing default patch for KIP %08x%08x...\n", (uint32_t)(kip->title_id >> 32), (uint32_t)kip->title_id); - } - - if (!has_ips_patches("atmosphere/kip_patches", hash, sizeof(hash))) { - return NULL; - } - - print(SCREEN_LOG_LEVEL_MANDATORY, "[NXBOOT]: Patching KIP %08x%08x...\n", (uint32_t)(kip->title_id >> 32), (uint32_t)kip->title_id); - - - size_t uncompressed_kip_size; - kip1_header_t *uncompressed_kip = kip1_uncompress(kip, &uncompressed_kip_size); - if (uncompressed_kip == NULL) { - return NULL; - } - - apply_ips_patches("atmosphere/kip_patches", uncompressed_kip, uncompressed_kip_size, 0x100, hash, sizeof(hash)); - return uncompressed_kip; -} diff --git a/fusee/fusee-secondary/src/ips.h b/fusee/fusee-secondary/src/ips.h deleted file mode 100644 index 927eb1fe5..000000000 --- a/fusee/fusee-secondary/src/ips.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_IPS_H -#define FUSEE_IPS_H - -#include -#include "utils.h" -#include "kip.h" -#include "exocfg.h" - -#define FS_TITLE_ID 0x0100000000000000ull - -void apply_kernel_ips_patches(void *kernel, size_t kernel_size); -kip1_header_t *apply_kip_ips_patches(kip1_header_t *kip, size_t kip_size, emummc_fs_ver_t *out_fs_ver); -kip1_header_t *kip1_uncompress(kip1_header_t *kip, size_t *size); - -void kip_patches_set_enable_nogc(void); - -#endif diff --git a/fusee/fusee-secondary/src/kernel_patches.c b/fusee/fusee-secondary/src/kernel_patches.c deleted file mode 100644 index dbaf9e090..000000000 --- a/fusee/fusee-secondary/src/kernel_patches.c +++ /dev/null @@ -1,1242 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * Copyright (c) 2019 m4xw - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include "utils.h" -#include "se.h" -#include "kernel_patches.h" -#include "ips.h" - -#define MAKE_BRANCH(a, o) 0x14000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF) -#define MAKE_NOP 0xD503201F - -#define MAKE_KERNEL_PATTERN_NAME(vers, name) g_kernel_pattern_##vers##_##name -#define MAKE_KERNEL_PATCH_NAME(vers, name) g_kernel_patch_##vers##_##name - -typedef uint32_t instruction_t; - -typedef struct { - size_t pattern_size; - const uint8_t *pattern; - size_t pattern_hook_offset; - size_t payload_num_instructions; - size_t branch_back_offset; - size_t patch_offset; - const instruction_t *payload; -} kernel_patch_t; - -typedef struct { - uint8_t hash[0x20]; /* TODO: Come up with a better way to identify kernels, that doesn't rely on hashing them. */ - size_t hash_offset; /* Start hashing at offset N, if this is set. */ - size_t hash_size; /* Only hash the first N bytes of the kernel, if this is set. */ - size_t embedded_ini_offset; /* 8.0.0+ embeds the INI in kernel section. */ - size_t embedded_ini_ptr; /* 8.0.0+ embeds the INI in kernel section. */ - size_t free_code_space_offset; - unsigned int num_patches; - const kernel_patch_t *patches; -} kernel_info_t; - -/* Patch definitions. */ -/* - stp x10, x11, [sp, #-0x10]! - mov w11, w14 - lsl x11, x11, #2 - ldr x11, [x28, x11] - mov x9, #0x0000ffffffffffff - and x8, x11, x9 - mov x9, #0xffff000000000000 - and x11, x11, x9 - mov x9, #0xfffe000000000000 - cmp x11, x9 - beq #8 - ldr x8, [x10,#0x250] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(100, proc_id_send)[] = {0x48, 0x29, 0x41, 0xF9, 0xC9, 0xF5, 0x7E, 0xD3, 0xCE, 0x09, 0x00, 0x11, 0x48, 0x6A, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(100, proc_id_send)[] = {0xA9BF2FEA, 0x2A0E03EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9412948, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w10, w28 - lsl x10, x10, #2 - ldr x10, [x13, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x11,#0x250] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(100, proc_id_recv)[] = {0x68, 0x29, 0x41, 0xF9, 0x89, 0xF7, 0x7E, 0xD3, 0x9C, 0x0B, 0x00, 0x11, 0x48, 0x69, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(100, proc_id_recv)[] = {0xA9BF2FEA, 0x2A1C03EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9412968, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w11, w24 - lsl x11, x11, #2 - ldr x11, [x28, x11] - mov x9, #0x0000ffffffffffff - and x8, x11, x9 - mov x9, #0xffff000000000000 - and x11, x11, x9 - mov x9, #0xfffe000000000000 - cmp x11, x9 - beq #8 - ldr x8, [x10,#0x260] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(200, proc_id_send)[] = {0x48, 0x31, 0x41, 0xF9, 0xE9, 0x03, 0x18, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0xC8, 0x6A, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(200, proc_id_send)[] = {0xA9BF2FEA, 0x2A1803EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9413148, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w10, w15 - lsl x10, x10, #2 - ldr x11, [sp, #0xB8] - ldr x10, [x11, x10] - ldr x11, [sp, #0xF0] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x11,#0x260] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(200, proc_id_recv)[] = {0x08, 0x31, 0x41, 0xF9, 0xE9, 0x03, 0x0F, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0x48, 0x6B, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(200, proc_id_recv)[] = {0xA9BF2FEA, 0x2A0F03EA, 0xD37EF54A, 0xF9405FEB, 0xF86A696A, 0xF9407BEB, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9413168, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w11, w24 - lsl x11, x11, #2 - ldr x11, [x28, x11] - mov x9, #0x0000ffffffffffff - and x8, x11, x9 - mov x9, #0xffff000000000000 - and x11, x11, x9 - mov x9, #0xfffe000000000000 - cmp x11, x9 - beq #8 - ldr x8, [x10,#0x2A8] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(300, proc_id_send)[] = {0x48, 0x55, 0x41, 0xF9, 0xE9, 0x03, 0x18, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0xC8, 0x6A, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(300, proc_id_send)[] = {0xA9BF2FEA, 0x2A1803EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9415548, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w10, w15 - lsl x10, x10, #2 - ldr x11, [sp, #0xB8] - ldr x10, [x11, x10] - ldr x11, [sp, #0xF0] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x11,#0x2A8] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(300, proc_id_recv)[] = {0x08, 0x55, 0x41, 0xF9, 0xE9, 0x03, 0x0F, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0x48, 0x6B, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(300, proc_id_recv)[] = {0xA9BF2FEA, 0x2A0F03EA, 0xD37EF54A, 0xF9405FEB, 0xF86A696A, 0xF9407BEB, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415568, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w11, w24 - lsl x11, x11, #2 - ldr x11, [x28, x11] - mov x9, #0x0000ffffffffffff - and x8, x11, x9 - mov x9, #0xffff000000000000 - and x11, x11, x9 - mov x9, #0xfffe000000000000 - cmp x11, x9 - beq #8 - ldr x8, [x10,#0x2A8] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(302, proc_id_send)[] = {0x48, 0x55, 0x41, 0xF9, 0xE9, 0x03, 0x18, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0xC8, 0x6A, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(302, proc_id_send)[] = {0xA9BF2FEA, 0x2A1803EB, 0xD37EF56B, 0xF86B6B8B, 0x92FFFFE9, 0x8A090168, 0xD2FFFFE9, 0x8A09016B, 0xD2FFFFC9, 0xEB09017F, 0x54000040, 0xF9415548, 0xA8C12FEA}; -/* - stp x10, x11, [sp, #-0x10]! - mov w10, w15 - lsl x10, x10, #2 - ldr x11, [sp, #0xB8] - ldr x10, [x11, x10] - ldr x11, [sp, #0xF0] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x11,#0x2A8] - ldp x10, x11, [sp],#0x10 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(302, proc_id_recv)[] = {0x08, 0x55, 0x41, 0xF9, 0xE9, 0x03, 0x0F, 0x2A, 0x29, 0xF5, 0x7E, 0xD3, 0x48, 0x6B, 0x29, 0xF8}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(302, proc_id_recv)[] = {0xA9BF2FEA, 0x2A0F03EA, 0xD37EF54A, 0xF9405FEB, 0xF86A696A, 0xF9407BEB, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415568, 0xA8C12FEA}; -/* - mov w10, w23 - lsl x10, x10, #2 - ldr x10, [x28, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #12 - ldr x10, [sp,#0xa0] - ldr x8, [x10,#0x2b0] - ldr x10, [sp,#0xa0] -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(400, proc_id_send)[] = {0xEA, 0x53, 0x40, 0xF9, 0x48, 0x59, 0x41, 0xF9, 0xE9, 0x03, 0x17, 0x2A, 0x29, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(400, proc_id_send)[] = {0x2A1703EA, 0xD37EF54A, 0xF86A6B8A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000060, 0xF94053EA, 0xF9415948, 0xF94053EA}; -/* - ldr x13, [sp,#0x70] - mov w10, w14 - lsl x10, x10, #2 - ldr x10, [x13, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x25,#0x2b0] - nop -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(400, proc_id_recv)[] = {0x28, 0x5B, 0x41, 0xF9, 0xE9, 0x03, 0x0E, 0x2A, 0xCE, 0x09, 0x00, 0x11, 0x29, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(400, proc_id_recv)[] = {0xF9403BED, 0x2A0E03EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415B28, 0xD503201F}; -/* - mov w10, w23 - lsl x10, x10, #2 - ldr x10, [x27, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #12 - ldr x10, [sp,#0x80] - ldr x8, [x10,#0x2b0] - ldr x10, [sp,#0x80] -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(500, proc_id_send)[] = {0xEA, 0x43, 0x40, 0xF9, 0x48, 0x59, 0x41, 0xF9, 0xE9, 0x03, 0x17, 0x2A, 0x29, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(500, proc_id_send)[] = {0x2A1703EA, 0xD37EF54A, 0xF86A6B6A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000060, 0xF94043EA, 0xF9415948, 0xF94043EA}; -/* - ldr x13, [sp, #0x70] - mov w10, w21 - lsl x10, x10, #2 - ldr x10, [x13, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #8 - ldr x8, [x24,#0x2b0] - ldr x10, [sp,#0xd8] -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(500, proc_id_recv)[] = {0x08, 0x5B, 0x41, 0xF9, 0xEA, 0x6F, 0x40, 0xF9, 0xE9, 0x03, 0x15, 0x2A, 0x29, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(500, proc_id_recv)[] = {0xF9403BED, 0x2A1503EA, 0xD37EF54A, 0xF86A69AA, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000040, 0xF9415B08, 0xF9406FEA}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x68] - mov w10, w21 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x24] - ldr x8, [x8, #0x38] - mov x0, x24 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(600, proc_id_send)[] = {0x08, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x18, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x03, 0x15, 0x2A, 0xB5, 0x0A, 0x00, 0x11, 0x08, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(600, proc_id_send)[] = {0xA9BF2FEA, 0xF94037EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x80] - mov w10, w21 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x24] - ldr x8, [x8, #0x38] - mov x0, x24 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(600, proc_id_recv)[] = {0x08, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x18, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE9, 0x6F, 0x40, 0xF9, 0xE8, 0x03, 0x15, 0x2A, 0xB5, 0x0A, 0x00, 0x11}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(600, proc_id_recv)[] = {0xA9BF2FEA, 0xF94043EB, 0x2A1503EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x70] - mov w10, w25 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x21] - ldr x8, [x8, #0x38] - mov x0, x21 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(700, proc_id_send)[] = {0xA8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x15, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x03, 0x19, 0x2A, 0x39, 0x0B, 0x00, 0x11, 0x08, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(700, proc_id_send)[] = {0xA9BF2FEA, 0xF9403BEB, 0x2A1903EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002A8, 0xF9401D08, 0xAA1503E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x98] - mov w10, w22 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x27] - ldr x8, [x8, #0x38] - mov x0, x27 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(700, proc_id_recv)[] = {0x68, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x1B, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xA9, 0x83, 0x50, 0xF8, 0xE8, 0x03, 0x16, 0x2A, 0xD6, 0x0A, 0x00, 0x11}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(700, proc_id_recv)[] = {0xA9BF2FEA, 0xF9404FEB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400368, 0xF9401D08, 0xAA1B03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x70] - mov w10, w25 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x21] - ldr x8, [x8, #0x38] - mov x0, x21 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(800, proc_id_send)[] = {0xA8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x15, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x03, 0x19, 0x2A, 0x39, 0x0B, 0x00, 0x11, 0x08, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(800, proc_id_send)[] = {0xA9BF2FEA, 0xF9403BEB, 0x2A1903EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002A8, 0xF9401D08, 0xAA1503E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x98] - mov w10, w22 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x27] - ldr x8, [x8, #0x38] - mov x0, x27 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(800, proc_id_recv)[] = {0x68, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x1B, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xA9, 0x83, 0x50, 0xF8, 0xE8, 0x03, 0x16, 0x2A, 0xD6, 0x0A, 0x00, 0x11}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(800, proc_id_recv)[] = {0xA9BF2FEA, 0xF9404FEB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400368, 0xF9401D08, 0xAA1B03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x68] - mov w10, w22 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x23] - ldr x8, [x8, #0x38] - mov x0, x23 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(900, proc_id_send)[] = {0xE8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x17, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x03, 0x16, 0x2A, 0xD6, 0x0A, 0x00, 0x11, 0x08, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(900, proc_id_send)[] = {0xA9BF2FEA, 0xF94037EB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002E8, 0xF9401D08, 0xAA1703E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x90] - mov w10, w23 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x27] - ldr x8, [x8, #0x38] - mov x0, x27 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(900, proc_id_recv)[] = {0x68, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x1B, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x03, 0x17, 0x2A, 0xF7, 0x0A, 0x00, 0x11, 0x08, 0xF5, 0x7E, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(900, proc_id_recv)[] = {0xA9BF2FEA, 0xF9404BEB, 0x2A1703EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400368, 0xF9401D08, 0xAA1B03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0xC0] - mov w10, w22 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x23] - ldr x8, [x8, #0x38] - mov x0, x23 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1000, proc_id_send)[] = {0xE8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x17, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0x08, 0x4B, 0x36, 0x8B, 0x09, 0xFC, 0x60, 0xD3, 0x00, 0x25, 0x00, 0x29}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1000, proc_id_send)[] = {0xA9BF2FEA, 0xF94063EB, 0x2A1603EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002E8, 0xF9401D08, 0xAA1703E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0xC8] - mov w10, w26 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x28] - ldr x8, [x8, #0x38] - mov x0, x28 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1000, proc_id_recv)[] = {0x88, 0x03, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0xE0, 0x03, 0x1C, 0xAA, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x87, 0x40, 0xF9, 0x08, 0x49, 0x3A, 0x8B, 0x09, 0xFC, 0x60, 0xD3}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1000, proc_id_recv)[] = {0xA9BF2FEA, 0xF94067EB, 0x2A1A03EA, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400388, 0xF9401D08, 0xAA1C03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x80] - mov w10, #3 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x21] - ldr x8, [x8, #0x38] - mov x0, x21 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1100, proc_id_send)[] = {0xE0, 0x03, 0x15, 0xAA, 0xA8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0x00, 0x01, 0x3F, 0xD6, 0x88, 0x4A, 0x3C, 0x8B, 0x09, 0xFC, 0x60, 0xD3, 0x00, 0x25, 0x00, 0x29}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1100, proc_id_send)[] = {0xA9BF2FEA, 0xF94043EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002A8, 0xF9401D08, 0xAA1503E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0xE0] - mov w10, #3 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x24] - ldr x8, [x8, #0x38] - mov x0, x24 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1100, proc_id_recv)[] = {0x08, 0x03, 0x40, 0xF9, 0xE0, 0x03, 0x18, 0xAA, 0x08, 0x1D, 0x40, 0xF9, 0x00, 0x01, 0x3F, 0xD6, 0xE8, 0x7F, 0x40, 0xF9, 0x09, 0xFC, 0x60, 0xD3, 0xEA, 0x5B, 0x40, 0xF9}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1100, proc_id_recv)[] = {0xA9BF2FEA, 0xF94073EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400308, 0xF9401D08, 0xAA1803E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0x98] - mov w10, #3 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x22] - ldr x8, [x8, #0x38] - mov x0, x22 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1200, proc_id_send)[] = {0xE0, 0x03, 0x16, 0xAA, 0xC8, 0x02, 0x40, 0xF9, 0x08, 0x1D, 0x40, 0xF9, 0x00, 0x01, 0x3F, 0xD6, 0xA8, 0x4A, 0x3B, 0x8B, 0x09, 0xFC, 0x60, 0xD3, 0x00, 0x25, 0x00, 0x29}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1200, proc_id_send)[] = {0xA9BF2FEA, 0xF9404FEB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF94002C8, 0xF9401D08, 0xAA1603E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - -/* - stp x10, x11, [sp, #-0x10]! - ldr x11, [sp, #0xE0] - mov w10, #3 - lsl x10, x10, #2 - ldr x10, [x11, x10] - mov x9, #0x0000ffffffffffff - and x8, x10, x9 - mov x9, #0xffff000000000000 - and x10, x10, x9 - mov x9, #0xfffe000000000000 - cmp x10, x9 - beq #0x20 - - stp x8, x9, [sp, #-0x10]! - ldr x8, [x28] - ldr x8, [x8, #0x38] - mov x0, x28 - blr x8 - ldp x8, x9, [sp],#0x10 - mov x8, x0 - - ldp x10, x11, [sp],#0x10 - mov x0, x8 -*/ -static const uint8_t MAKE_KERNEL_PATTERN_NAME(1200, proc_id_recv)[] = {0x88, 0x03, 0x40, 0xF9, 0xE0, 0x03, 0x1C, 0xAA, 0x08, 0x1D, 0x40, 0xF9, 0x00, 0x01, 0x3F, 0xD6, 0x08, 0x4B, 0x3A, 0x8B, 0x09, 0xFC, 0x60, 0xD3, 0x00, 0x25, 0x00, 0x29}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1200, proc_id_recv)[] = {0xA9BF2FEA, 0xF94073EB, 0x5280006A, 0xD37EF54A, 0xF86A696A, 0x92FFFFE9, 0x8A090148, 0xD2FFFFE9, 0x8A09014A, 0xD2FFFFC9, 0xEB09015F, 0x54000100, 0xA9BF27E8, 0xF9400388, 0xF9401D08, 0xAA1C03E0, 0xD63F0100, 0xA8C127E8, 0xAA0003E8, 0xA8C12FEA, 0xAA0803E0}; - - -/* svcControlCodeMemory Patches */ -/* b.eq -> nop */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(500, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(600, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(700, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(800, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(900, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1000, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1100, svc_control_codememory)[] = {MAKE_NOP}; -static const instruction_t MAKE_KERNEL_PATCH_NAME(1200, svc_control_codememory)[] = {MAKE_NOP}; - -static const instruction_t MAKE_KERNEL_PATCH_NAME(500, system_memory_increase)[] = {0x52A3C008}; /* MOV W8, #0x1E000000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(600, system_memory_increase)[] = {0x52A3B008}; /* MOV W8, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(700, system_memory_increase)[] = {0x52A3B008}; /* MOV W8, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(800, system_memory_increase)[] = {0x52A3B013}; /* MOV W19, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(900, system_memory_increase)[] = {0x52A3B013}; /* MOV W19, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(1000, system_memory_increase)[] = {0x52A3B013}; /* MOV W19, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(1100, system_memory_increase)[] = {0x52A3B015}; /* MOV W21, #0x1D800000 */ -static const instruction_t MAKE_KERNEL_PATCH_NAME(1200, system_memory_increase)[] = {0x52A3B015}; /* MOV W21, #0x1D800000 */ - -/* Hook Definitions. */ -static const kernel_patch_t g_kernel_patches_100[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(100, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(100, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(100, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(100, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(100, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(100, proc_id_recv) - } -}; -static const kernel_patch_t g_kernel_patches_200[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(200, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(200, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(200, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(200, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(200, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(200, proc_id_recv) - } -}; -static const kernel_patch_t g_kernel_patches_300[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(300, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(300, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(300, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(300, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(300, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(300, proc_id_recv) - } -}; -static const kernel_patch_t g_kernel_patches_302[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(302, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(302, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(302, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(302, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(302, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(302, proc_id_recv) - } -}; -static const kernel_patch_t g_kernel_patches_400[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(400, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(400, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x8, - .payload = MAKE_KERNEL_PATCH_NAME(400, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(400, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(400, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x4, - .payload = MAKE_KERNEL_PATCH_NAME(400, proc_id_recv) - } -}; -static const kernel_patch_t g_kernel_patches_500[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(500, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(500, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x8, - .payload = MAKE_KERNEL_PATCH_NAME(500, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x10, - .pattern = MAKE_KERNEL_PATTERN_NAME(500, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(500, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x8, - .payload = MAKE_KERNEL_PATCH_NAME(500, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(500, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(500, svc_control_codememory), - .patch_offset = 0x38C2C, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(500, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(500, system_memory_increase), - .patch_offset = 0x54E30, - } -}; -static const kernel_patch_t g_kernel_patches_600[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(600, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(600, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(600, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(600, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(600, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(600, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(600, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(600, svc_control_codememory), - .patch_offset = 0x3A8CC, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(600, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(600, system_memory_increase), - .patch_offset = 0x57330, - } -}; -static const kernel_patch_t g_kernel_patches_700[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(700, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(700, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(700, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(700, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(700, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(700, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(700, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(700, svc_control_codememory), - .patch_offset = 0x3C6E0, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(700, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(700, system_memory_increase), - .patch_offset = 0x57F98, - } -}; - -static const kernel_patch_t g_kernel_patches_800[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(800, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(800, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(800, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(800, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(800, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(800, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(800, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(800, svc_control_codememory), - .patch_offset = 0x3FAD0, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(800, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(800, system_memory_increase), - .patch_offset = 0x5F9A4, - } -}; - -static const kernel_patch_t g_kernel_patches_900[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(900, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(900, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(900, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(900, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(900, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(900, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(900, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(900, svc_control_codememory), - .patch_offset = 0x43DFC, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(900, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(900, system_memory_increase), - .patch_offset = 0x6493C, - } -}; - -static const kernel_patch_t g_kernel_patches_1000[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1000, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1000, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1000, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1000, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1000, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1000, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1000, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1000, svc_control_codememory), - .patch_offset = 0x45DAC, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1000, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1000, system_memory_increase), - .patch_offset = 0x66950, - } -}; - -static const kernel_patch_t g_kernel_patches_1100[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1100, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1100, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1100, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1100, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1100, svc_control_codememory), - .patch_offset = 0x2FCE0, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1100, system_memory_increase), - .patch_offset = 0x490C4, - } -}; - -static const kernel_patch_t g_kernel_patches_1101[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1100, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1100, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1100, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1100, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1100, svc_control_codememory), - .patch_offset = 0x2FD04, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1100, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1100, system_memory_increase), - .patch_offset = 0x490C4, - } -}; - -static const kernel_patch_t g_kernel_patches_1200[] = { - { /* Send Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1200, proc_id_send), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1200, proc_id_send))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1200, proc_id_send) - }, - { /* Receive Message Process ID Patch. */ - .pattern_size = 0x1C, - .pattern = MAKE_KERNEL_PATTERN_NAME(1200, proc_id_recv), - .pattern_hook_offset = 0x0, - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1200, proc_id_recv))/sizeof(instruction_t), - .branch_back_offset = 0x10, - .payload = MAKE_KERNEL_PATCH_NAME(1200, proc_id_recv) - }, - { /* svcControlCodeMemory Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1200, svc_control_codememory))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1200, svc_control_codememory), - .patch_offset = 0x2FCB4, - }, - { /* System Memory Increase Patch. */ - .payload_num_instructions = sizeof(MAKE_KERNEL_PATCH_NAME(1200, system_memory_increase))/sizeof(instruction_t), - .payload = MAKE_KERNEL_PATCH_NAME(1200, system_memory_increase), - .patch_offset = 0x4809C, - } -}; - -#define KERNEL_PATCHES(vers) .num_patches = sizeof(g_kernel_patches_##vers)/sizeof(kernel_patch_t), .patches = g_kernel_patches_##vers, - -/* Kernel Infos. */ -static const kernel_info_t g_kernel_infos[] = { - { /* 1.0.0-7. */ - .hash = {0x64, 0x44, 0x07, 0x2F, 0x56, 0x44, 0x73, 0xDD, 0xD5, 0x46, 0x1B, 0x8C, 0xDC, 0xEF, 0x54, 0x98, 0x16, 0xDA, 0x81, 0xDE, 0x5B, 0x1C, 0x9D, 0xD7, 0x5A, 0x13, 0x91, 0xD9, 0x53, 0xAB, 0x8D, 0x8D}, - .free_code_space_offset = 0x4797C, - KERNEL_PATCHES(100) - }, - { /* 1.0.0. */ - .hash = {0xB8, 0xC5, 0x0C, 0x68, 0x25, 0xA9, 0xB9, 0x5B, 0xD2, 0x4D, 0x2C, 0x7C, 0x81, 0x7F, 0xE6, 0x96, 0xF2, 0x42, 0x4E, 0x1D, 0x78, 0xDF, 0x3B, 0xCA, 0x3D, 0x6B, 0x68, 0x12, 0xDD, 0xA9, 0xCB, 0x9C}, - .free_code_space_offset = 0x4797C, - KERNEL_PATCHES(100) - }, - { /* 2.0.0. */ - .hash = {0x64, 0x0B, 0x51, 0xFF, 0x28, 0x01, 0xB8, 0x30, 0xA7, 0xA3, 0x60, 0x47, 0x86, 0x0D, 0x68, 0xAA, 0x9A, 0x92, 0x10, 0x0D, 0xB9, 0xCC, 0xEC, 0x8B, 0x05, 0x80, 0x73, 0xBD, 0x33, 0xB4, 0x2C, 0x6C}, - .free_code_space_offset = 0x6486C, - KERNEL_PATCHES(200) - }, - { /* 3.0.0. */ - .hash = {0x50, 0x84, 0x23, 0xAC, 0x6F, 0xA1, 0x5D, 0x3B, 0x56, 0xC2, 0xFC, 0x95, 0x22, 0xCC, 0xD5, 0xA8, 0x15, 0xD3, 0xB4, 0x6B, 0xA1, 0x2C, 0xF2, 0x93, 0xD3, 0x02, 0x05, 0xAB, 0x52, 0xEF, 0x73, 0xC5}, - .free_code_space_offset = 0x494A4, - KERNEL_PATCHES(300) - }, - { /* 3.0.2. */ - .hash = {0x81, 0x9D, 0x08, 0xBE, 0xE4, 0x5E, 0x1F, 0xBB, 0x45, 0x5A, 0x6D, 0x70, 0x4B, 0xB2, 0x17, 0xA6, 0x12, 0x69, 0xF8, 0xB8, 0x75, 0x1C, 0x71, 0x16, 0xF0, 0xE9, 0x79, 0x7F, 0xB0, 0xD1, 0x78, 0xB2}, - .free_code_space_offset = 0x494BC, - KERNEL_PATCHES(302) - }, - { /* 4.0.0. */ - .hash = {0xE6, 0xC0, 0xB7, 0xE3, 0x2F, 0xF9, 0x44, 0x51, 0xEC, 0xD5, 0x95, 0x79, 0xE3, 0x46, 0xB1, 0xDA, 0x2E, 0xD9, 0x28, 0xC6, 0xF2, 0x31, 0x4F, 0x95, 0xD8, 0xC7, 0xD5, 0xBD, 0x15, 0xD5, 0xE2, 0x5A}, - .free_code_space_offset = 0x52890, - KERNEL_PATCHES(400) - }, - { /* 5.0.0. */ - .hash = {0xB2, 0x38, 0x61, 0xA8, 0xE1, 0xE2, 0xE4, 0xE4, 0x17, 0x28, 0xED, 0xA9, 0xF6, 0xF6, 0xBD, 0xD2, 0x59, 0xDB, 0x1F, 0xEF, 0x4A, 0x8B, 0x2F, 0x1C, 0x64, 0x46, 0x06, 0x40, 0xF5, 0x05, 0x9C, 0x43}, - .free_code_space_offset = 0x5C020, - KERNEL_PATCHES(500) - }, - { /* 6.0.0. */ - .hash = {0x85, 0x97, 0x40, 0xF6, 0xC0, 0x3E, 0x3D, 0x44, 0xDE, 0xA4, 0xA0, 0x35, 0xFD, 0x12, 0x9C, 0xD4, 0x4F, 0x9C, 0x36, 0x53, 0x74, 0x54, 0x2C, 0x9C, 0x55, 0x47, 0xC4, 0x25, 0xF1, 0x42, 0xFB, 0x97}, - .free_code_space_offset = 0x5EE00, - KERNEL_PATCHES(600) - }, - { /* 7.0.0. */ - .hash = {0xA2, 0x5E, 0x47, 0x0C, 0x8E, 0x6D, 0x2F, 0xD7, 0x5D, 0xAD, 0x24, 0xD7, 0xD8, 0x24, 0x34, 0xFB, 0xCD, 0x77, 0xBB, 0xE6, 0x66, 0x03, 0xCB, 0xAF, 0xAB, 0x85, 0x45, 0xA0, 0x91, 0xAF, 0x34, 0x25}, - .free_code_space_offset = 0x5FEC0, - KERNEL_PATCHES(700) - }, - { /* 8.0.0. */ - .hash = {0xA6, 0xAD, 0x5D, 0x7F, 0xCF, 0x25, 0x80, 0xAE, 0xE6, 0x57, 0x9F, 0x6F, 0xC5, 0xC5, 0xF6, 0x13, 0x77, 0x23, 0xAC, 0x88, 0x79, 0x76, 0xF7, 0x25, 0x06, 0x16, 0x35, 0x3B, 0x3F, 0xA7, 0x59, 0x49}, - .hash_offset = 0x1A8, - .hash_size = 0x95000 - 0x1A8, - .embedded_ini_offset = 0x95000, - .embedded_ini_ptr = 0x168, - .free_code_space_offset = 0x607F0, - KERNEL_PATCHES(800) - }, - { /* 9.0.0. */ - .hash = {0xD7, 0x95, 0x65, 0x3A, 0x49, 0x4C, 0x5A, 0x9E, 0x2E, 0x04, 0xD6, 0x30, 0x7D, 0x79, 0xE1, 0xEE, 0x10, 0x2B, 0x30, 0xE0, 0x3E, 0xDD, 0x9F, 0xB3, 0x8A, 0x3C, 0x5E, 0xD3, 0x9B, 0x30, 0x11, 0x9B}, - .hash_offset = 0x1C0, - .hash_size = 0x90000 - 0x1C0, - .embedded_ini_offset = 0x90000, - .embedded_ini_ptr = 0x180, - .free_code_space_offset = 0x65780, - KERNEL_PATCHES(900) - }, - { /* 9.2.0. */ - /* NOTE: 9.2.0 has identical kernel layout to 9.0.0, so patches may be reused. */ - .hash = {0x66, 0xE7, 0x73, 0xE7, 0xF5, 0xCB, 0x9B, 0xB8, 0x66, 0xB7, 0xB1, 0x26, 0x23, 0x02, 0x76, 0xF2, 0xD1, 0x60, 0x3E, 0x09, 0x14, 0x19, 0xC2, 0x84, 0xFA, 0x5D, 0x0F, 0x16, 0xA3, 0x65, 0xFA, 0x17}, - .hash_offset = 0x1C0, - .hash_size = 0x90000 - 0x1C0, - .embedded_ini_offset = 0x90000, - .embedded_ini_ptr = 0x180, - .free_code_space_offset = 0x65780, - KERNEL_PATCHES(900) - }, - { /* 10.0.0. */ - .hash = {0x59, 0x31, 0xE6, 0x46, 0xF7, 0xAA, 0x15, 0x59, 0x78, 0xC7, 0xB3, 0xA5, 0xFA, 0x80, 0xE2, 0xC0, 0xCA, 0x6F, 0x31, 0x97, 0x3D, 0x86, 0x8A, 0x69, 0xF3, 0xBF, 0xE6, 0xE5, 0x61, 0xA7, 0x1B, 0x5B, }, - .hash_offset = 0x1B8, - .hash_size = 0x93000 - 0x1B8, - .embedded_ini_offset = 0x93000, - .embedded_ini_ptr = 0x178, - .free_code_space_offset = 0x67790, - KERNEL_PATCHES(1000) - }, - { /* 11.0.0. */ - .hash = {0xC2, 0x0E, 0xB3, 0x1B, 0xBF, 0x0B, 0x82, 0xF3, 0x3D, 0xFD, 0x47, 0x04, 0xB4, 0x44, 0x38, 0x47, 0x64, 0xAB, 0xD8, 0x70, 0x2F, 0x0E, 0x0C, 0x37, 0x82, 0x28, 0x02, 0x24, 0xB8, 0x6E, 0xCE, 0x05, }, - .hash_offset = 0x1C4, - .hash_size = 0x69000 - 0x1C4, - .embedded_ini_offset = 0x69000, - .embedded_ini_ptr = 0x180, - .free_code_space_offset = 0x49EE8, - KERNEL_PATCHES(1100) - }, - { /* 11.0.1. */ - .hash = {0x68, 0xB9, 0x72, 0xB7, 0x97, 0x55, 0x87, 0x5E, 0x24, 0x95, 0x8D, 0x99, 0x0A, 0x77, 0xAB, 0xF1, 0xC5, 0xC1, 0x32, 0x80, 0x67, 0xF0, 0xA2, 0xEC, 0x9C, 0xEF, 0xC3, 0x22, 0xE3, 0x42, 0xC0, 0x4D, }, - .hash_offset = 0x1C4, - .hash_size = 0x69000 - 0x1C4, - .embedded_ini_offset = 0x69000, - .embedded_ini_ptr = 0x180, - .free_code_space_offset = 0x49EE8, - KERNEL_PATCHES(1101) - }, - { /* 12.0.0. */ - .hash = {0x8D, 0x4A, 0x1E, 0xFC, 0xCC, 0x6C, 0xFE, 0x6C, 0x45, 0x14, 0x13, 0xA1, 0x7F, 0xF6, 0xDF, 0xFD, 0x7E, 0x5D, 0xD1, 0x38, 0xCE, 0x86, 0x11, 0x8B, 0x58, 0x5F, 0x89, 0x67, 0x84, 0x48, 0xA8, 0x17, }, - .hash_offset = 0x1C4, - .hash_size = 0x68000 - 0x1C4, - .embedded_ini_offset = 0x68000, - .embedded_ini_ptr = 0x180, - .free_code_space_offset = 0x48810, - KERNEL_PATCHES(1200) - } -}; - -/* Adapted from https://github.com/AuroraWright/Luma3DS/blob/master/sysmodules/loader/source/memory.c:35. */ -uint8_t *search_pattern(void *_mem, size_t mem_size, const void *_pattern, size_t pattern_size) { - const uint8_t *pattern = (const uint8_t *)_pattern; - uint8_t *mem = (uint8_t *)_mem; - - uint32_t table[0x100]; - for (unsigned int i = 0; i < sizeof(table)/sizeof(uint32_t); i++) { - table[i] = (uint32_t)pattern_size; - } - for (unsigned int i = 0; i < pattern_size - 1; i++) { - table[pattern[i]] = (uint32_t)pattern_size - i - 1; - } - - for (unsigned int i = 0; i <= mem_size - pattern_size; i += table[mem[i + pattern_size - 1]]) { - if (pattern[pattern_size - 1] == mem[i + pattern_size - 1] && memcmp(pattern, mem + i, pattern_size - 1) == 0) { - return mem + i; - } - } - return NULL; -} - -const kernel_info_t *get_kernel_info(void *kernel, size_t size) { - uint8_t calculated_hash[0x20]; - uint8_t calculated_partial_hash[0x20]; - se_calculate_sha256(calculated_hash, kernel, size); - - for (unsigned int i = 0; i < sizeof(g_kernel_infos)/sizeof(kernel_info_t); i++) { - if (g_kernel_infos[i].hash_size == 0 || size <= g_kernel_infos[i].hash_size) { - if (memcmp(calculated_hash, g_kernel_infos[i].hash, sizeof(calculated_hash)) == 0) { - return &g_kernel_infos[i]; - } - } else { - se_calculate_sha256(calculated_partial_hash, (void *)((uintptr_t)kernel + g_kernel_infos[i].hash_offset), g_kernel_infos[i].hash_size); - if (memcmp(calculated_partial_hash, g_kernel_infos[i].hash, sizeof(calculated_partial_hash)) == 0) { - return &g_kernel_infos[i]; - } - } - } - return NULL; -} - -void package2_patch_kernel(void *_kernel, size_t *kernel_size, bool is_sd_kernel, void **out_ini1, uint32_t target_firmware) { - const kernel_info_t *kernel_info = get_kernel_info(_kernel, *kernel_size); - *out_ini1 = NULL; - - /* Apply IPS patches. */ - apply_kernel_ips_patches(_kernel, *kernel_size); - - if (kernel_info == NULL && !is_sd_kernel) { - /* Should this be fatal? */ - fatal_error("kernel_patcher: unable to identify kernel!\n"); - } - - if (kernel_info == NULL && is_sd_kernel) { - return; - } - - if (kernel_info->embedded_ini_offset != 0) { - /* Set output INI ptr. */ - *out_ini1 = (void *)((uintptr_t)_kernel + kernel_info->embedded_ini_offset); - *((volatile uint64_t *)((uintptr_t)_kernel + kernel_info->embedded_ini_ptr)) = (uint64_t)*kernel_size; - } - - /* Apply hooks and patches. */ - uint8_t *kernel = (uint8_t *)_kernel; - size_t free_space_offset = kernel_info->free_code_space_offset; - size_t free_space_size = ((free_space_offset + 0xFFFULL) & ~0xFFFULL) - free_space_offset; - for (unsigned int i = 0; i < kernel_info->num_patches; i++) { - if (kernel_info->patches[i].patch_offset) { - for (unsigned int p = 0; p < kernel_info->patches[i].payload_num_instructions; p++) { - *(volatile instruction_t*)(_kernel + kernel_info->patches[i].patch_offset) = kernel_info->patches[i].payload[p]; - } - continue; - } - - size_t hook_size = sizeof(instruction_t) * kernel_info->patches[i].payload_num_instructions; - - if (kernel_info->patches[i].branch_back_offset) { - hook_size += sizeof(instruction_t); - } - if (free_space_size < hook_size) { - /* TODO: What should be done in this case? */ - fatal_error("kernel_patcher: insufficient space to apply patches!\n"); - } - - uint8_t *pattern_loc = search_pattern(kernel, *kernel_size, kernel_info->patches[i].pattern, kernel_info->patches[i].pattern_size); - if (pattern_loc == NULL) { - fatal_error("kernel_patcher: failed to identify patch location!\n"); - continue; - } - /* Patch kernel to branch to our hook at the desired place. */ - volatile instruction_t *hook_start = (instruction_t *)(pattern_loc + kernel_info->patches[i].pattern_hook_offset); - *hook_start = MAKE_BRANCH((uint32_t)((uintptr_t)hook_start - (uintptr_t)kernel), free_space_offset); - - /* Insert hook into free space. */ - volatile instruction_t *payload = (instruction_t *)(kernel + free_space_offset); - for (unsigned int p = 0; p < kernel_info->patches[i].payload_num_instructions; p++) { - payload[p] = kernel_info->patches[i].payload[p]; - } - if (kernel_info->patches[i].branch_back_offset) { - payload[kernel_info->patches[i].payload_num_instructions] = MAKE_BRANCH(free_space_offset + sizeof(instruction_t) * kernel_info->patches[i].payload_num_instructions, (uint32_t)(kernel_info->patches[i].branch_back_offset + (uintptr_t)hook_start - (uintptr_t)kernel)); - } - - free_space_offset += hook_size; - free_space_size -= hook_size; - } -} diff --git a/fusee/fusee-secondary/src/kernel_patches.h b/fusee/fusee-secondary/src/kernel_patches.h deleted file mode 100644 index ccc298e1a..000000000 --- a/fusee/fusee-secondary/src/kernel_patches.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_KERNEL_PATCHES_H -#define FUSEE_KERNEL_PATCHES_H - -#include "utils.h" - -void package2_patch_kernel(void *kernel, size_t *kernel_size, bool is_sd_kernel, void **out_ini1, uint32_t target_firmware); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/key_derivation.c b/fusee/fusee-secondary/src/key_derivation.c deleted file mode 100644 index 8f81fd1c0..000000000 --- a/fusee/fusee-secondary/src/key_derivation.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include "../../../fusee/common/log.h" -#include "key_derivation.h" -#include "masterkey.h" -#include "se.h" -#include "exocfg.h" -#include "fuse.h" -#include "extkeys.h" -#include "utils.h" - -#define AL16 ALIGN(16) - -static const uint8_t AL16 masterkey_seed[0x10] = { - 0xD8, 0xA2, 0x41, 0x0A, 0xC6, 0xC5, 0x90, 0x01, 0xC6, 0x1D, 0x6A, 0x26, 0x7C, 0x51, 0x3F, 0x3C -}; - -static const uint8_t AL16 devicekey_seed[0x10] = { - 0x4F, 0x02, 0x5F, 0x0E, 0xB6, 0x6D, 0x11, 0x0E, 0xDC, 0x32, 0x7D, 0x41, 0x86, 0xC2, 0xF4, 0x78 -}; - -static const uint8_t AL16 devicekey_4x_seed[0x10] = { - 0x0C, 0x91, 0x09, 0xDB, 0x93, 0x93, 0x07, 0x81, 0x07, 0x3C, 0xC4, 0x16, 0x22, 0x7C, 0x6C, 0x28 -}; - -static const uint8_t AL16 masterkey_4x_seed[0x10] = { - 0x2D, 0xC1, 0xF4, 0x8D, 0xF3, 0x5B, 0x69, 0x33, 0x42, 0x10, 0xAC, 0x65, 0xDA, 0x90, 0x46, 0x66 -}; - -static const uint8_t AL16 keyblob_seed_00[0x10] = { - 0xDF, 0x20, 0x6F, 0x59, 0x44, 0x54, 0xEF, 0xDC, 0x70, 0x74, 0x48, 0x3B, 0x0D, 0xED, 0x9F, 0xD3 -}; - -static const uint8_t AL16 master_kek_seed_erista[0x10] = { /* TODO: Update on next change of keys. */ - 0x84, 0x67, 0xB6, 0x7F, 0x13, 0x11, 0xAE, 0xE6, 0x58, 0x9B, 0x19, 0xAF, 0x13, 0x6C, 0x80, 0x7A /* Erista MasterKek seed 0B. */ -}; - -static const uint8_t AL16 master_devkey_seed_erista[0x10] = { - 0xAA, 0xFD, 0xBC, 0xBB, 0x25, 0xC3, 0xA4, 0xEF, 0xE3, 0xEE, 0x58, 0x53, 0xB7, 0xF8, 0xDD, 0xD6 -}; - -static const uint8_t AL16 master_kek_seed_mariko[0x10] = { /* TODO: Update on next change of keys. */ - 0xE5, 0x41, 0xAC, 0xEC, 0xD1, 0xA7, 0xD1, 0xAB, 0xED, 0x03, 0x77, 0xF1, 0x27, 0xCA, 0xF8, 0xF1, /* Mariko MasterKek seed 0B. */ -}; - -/* Derive all Switch keys. */ -int derive_nx_keydata_erista(uint32_t target_firmware) { - uint8_t AL16 work_buffer[0x10]; - - /* Get whether we're using dev keys. */ - const bool is_retail = fuse_get_hardware_state() != 0; - - /* Derive Keyblob Key 00. */ - se_aes_ecb_decrypt_block(0xC, work_buffer, 0x10, keyblob_seed_00, 0x10); - decrypt_data_into_keyslot(0xF, 0xE, work_buffer, 0x10); - - /* Derive master kek. */ - decrypt_data_into_keyslot(0xE, is_retail ? 0xD : 0xB, master_kek_seed_erista, 0x10); - - /* Derive master key, device master key. */ - decrypt_data_into_keyslot(0xD, 0xE, masterkey_seed, 0x10); - decrypt_data_into_keyslot(0xE, 0xE, masterkey_4x_seed, 0x10); - - /* Derive device keys. */ - decrypt_data_into_keyslot(0xA, 0xF, devicekey_4x_seed, 0x10); - decrypt_data_into_keyslot(0xF, 0xF, devicekey_seed, 0x10); - - /* Derive firmware specific device key. */ - se_aes_ecb_decrypt_block(0xA, work_buffer, 0x10, master_devkey_seed_erista, 0x10); - decrypt_data_into_keyslot(0xC, 0xE, work_buffer, 0x10); - - /* Clear keyslots 0xB/0xE. */ - clear_aes_keyslot(0xB); - clear_aes_keyslot(0xE); - - /* Setup master key revision, derive older master keys for use. */ - return mkey_detect_revision(fuse_get_hardware_state() != 0); -} - -int derive_nx_keydata_mariko(uint32_t target_firmware) { - /* Derive the device and master keys. */ - /* NOTE: Keyslots 7 and 10 are chosen here so we don't overwrite critical key material (KEK, BEK, SBK and SSK). */ - decrypt_data_into_keyslot(0xA, 0xE, devicekey_4x_seed, 0x10); - decrypt_data_into_keyslot(0x7, 0xC, master_kek_seed_mariko, 0x10); - decrypt_data_into_keyslot(0x7, 0x7, masterkey_seed, 0x10); - - /* Setup master key revision, derive older master keys for use. */ - return mkey_detect_revision(fuse_get_hardware_state() != 0); -} - -static void generate_specific_aes_key(void *dst, const void *wrapped_key, bool should_mask, uint32_t target_firmware, uint32_t generation) { - unsigned int keyslot = devkey_get_keyslot(generation); - - if (fuse_get_soc_type() == 0 && fuse_get_bootrom_patch_version() < 0x7F) { - /* On dev units, use a fixed "all-zeroes" seed. */ - /* Yes, this data really is all-zero in actual TrustZone .rodata. */ - static const uint8_t AL16 dev_specific_aes_key_source[0x10] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; - static const uint8_t AL16 dev_specific_aes_key_ctr[0x10] = {0x3C, 0xD5, 0x92, 0xEC, 0x68, 0x31, 0x4A, 0x06, 0xD4, 0x1B, 0x0C, 0xD9, 0xF6, 0x2E, 0xD9, 0xE9}; - static const uint8_t AL16 dev_specific_aes_key_mask[0x10] = {0xAC, 0xCA, 0x9A, 0xCA, 0xFF, 0x2E, 0xB9, 0x22, 0xCC, 0x1F, 0x4F, 0xAD, 0xDD, 0x77, 0x21, 0x1E}; - - se_aes_ctr_crypt(keyslot, dst, 0x10, dev_specific_aes_key_source, 0x10, dev_specific_aes_key_ctr, 0x10); - - if (should_mask) { - for (unsigned int i = 0; i < 0x10; i++) { - ((uint8_t *)dst)[i] ^= dev_specific_aes_key_mask[i]; - } - } - } else { - /* On retail, standard kek->key decryption. */ - static const uint8_t AL16 retail_specific_aes_key_source[0x10] = {0xE2, 0xD6, 0xB8, 0x7A, 0x11, 0x9C, 0xB8, 0x80, 0xE8, 0x22, 0x88, 0x8A, 0x46, 0xFB, 0xA1, 0x95}; - decrypt_data_into_keyslot(KEYSLOT_SWITCH_TEMPKEY, keyslot, retail_specific_aes_key_source, 0x10); - se_aes_ecb_decrypt_block(KEYSLOT_SWITCH_TEMPKEY, dst, 0x10, wrapped_key, 0x10); - } -} - -static void generate_personalized_aes_key_for_bis(void *dst, const void *wrapped_kek, const void *wrapped_key, uint32_t target_firmware, uint32_t generation) { - static const uint8_t AL16 kek_source[0x10] = { - 0x4D, 0x87, 0x09, 0x86, 0xC4, 0x5D, 0x20, 0x72, 0x2F, 0xBA, 0x10, 0x53, 0xDA, 0x92, 0xE8, 0xA9 - }; - static const uint8_t AL16 key_source[0x10] = { - 0x89, 0x61, 0x5E, 0xE0, 0x5C, 0x31, 0xB6, 0x80, 0x5F, 0xE5, 0x8F, 0x3D, 0xA2, 0x4F, 0x7A, 0xA8 - }; - - unsigned int keyslot = devkey_get_keyslot(generation); - /* Derive kek. */ - decrypt_data_into_keyslot(KEYSLOT_SWITCH_TEMPKEY, keyslot, kek_source, 0x10); - decrypt_data_into_keyslot(KEYSLOT_SWITCH_TEMPKEY, KEYSLOT_SWITCH_TEMPKEY, wrapped_kek, 0x10); - /* Derive key. */ - decrypt_data_into_keyslot(KEYSLOT_SWITCH_TEMPKEY, KEYSLOT_SWITCH_TEMPKEY, key_source, 0x10); - se_aes_ecb_decrypt_block(KEYSLOT_SWITCH_TEMPKEY, dst, 0x10, wrapped_key, 0x10); -} - -void derive_bis_key(void *dst, BisPartition partition_id, uint32_t target_firmware) { - static const uint8_t AL16 key_source_for_bis[3][2][0x10] = { - { - {0xF8, 0x3F, 0x38, 0x6E, 0x2C, 0xD2, 0xCA, 0x32, 0xA8, 0x9A, 0xB9, 0xAA, 0x29, 0xBF, 0xC7, 0x48}, - {0x7D, 0x92, 0xB0, 0x3A, 0xA8, 0xBF, 0xDE, 0xE1, 0xA7, 0x4C, 0x3B, 0x6E, 0x35, 0xCB, 0x71, 0x06} - }, - { - {0x41, 0x00, 0x30, 0x49, 0xDD, 0xCC, 0xC0, 0x65, 0x64, 0x7A, 0x7E, 0xB4, 0x1E, 0xED, 0x9C, 0x5F}, - {0x44, 0x42, 0x4E, 0xDA, 0xB4, 0x9D, 0xFC, 0xD9, 0x87, 0x77, 0x24, 0x9A, 0xDC, 0x9F, 0x7C, 0xA4} - }, - { - {0x52, 0xC2, 0xE9, 0xEB, 0x09, 0xE3, 0xEE, 0x29, 0x32, 0xA1, 0x0C, 0x1F, 0xB6, 0xA0, 0x92, 0x6C}, - {0x4D, 0x12, 0xE1, 0x4B, 0x2A, 0x47, 0x4C, 0x1C, 0x09, 0xCB, 0x03, 0x59, 0xF0, 0x15, 0xF4, 0xE4} - } - }; - - uint32_t bis_key_generation = fuse_get_device_unique_key_generation(); - if (bis_key_generation > 0) { - bis_key_generation -= 1; - } - - static const uint8_t AL16 bis_kek_source[0x10] = {0x34, 0xC1, 0xA0, 0xC4, 0x82, 0x58, 0xF8, 0xB4, 0xFA, 0x9E, 0x5E, 0x6A, 0xDA, 0xFC, 0x7E, 0x4F}; - switch (partition_id) { - case BisPartition_Calibration: - generate_specific_aes_key(dst, key_source_for_bis[partition_id][0], false, target_firmware, bis_key_generation); - generate_specific_aes_key(dst + 0x10, key_source_for_bis[partition_id][1], false, target_firmware, bis_key_generation); - break; - case BisPartition_Safe: - case BisPartition_UserSystem: - generate_personalized_aes_key_for_bis(dst, bis_kek_source, key_source_for_bis[partition_id][0], target_firmware, bis_key_generation); - generate_personalized_aes_key_for_bis(dst + 0x10, bis_kek_source, key_source_for_bis[partition_id][1], target_firmware, bis_key_generation); - break; - default: - generic_panic(); - } -} diff --git a/fusee/fusee-secondary/src/key_derivation.h b/fusee/fusee-secondary/src/key_derivation.h deleted file mode 100644 index 6eb41115f..000000000 --- a/fusee/fusee-secondary/src/key_derivation.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_KEYDERIVATION_H -#define FUSEE_KEYDERIVATION_H - -#include -#include -#include - -typedef enum BisPartition { - BisPartition_Calibration = 0, - BisPartition_Safe = 1, - BisPartition_UserSystem = 2, -} BisPartition; - -int derive_nx_keydata_erista(uint32_t target_firmware); -int derive_nx_keydata_mariko(uint32_t target_firmware); -void derive_bis_key(void *dst, BisPartition partition_id, uint32_t target_firmware); - -#endif diff --git a/fusee/fusee-secondary/src/kip.h b/fusee/fusee-secondary/src/kip.h deleted file mode 100644 index 4d75bc8cb..000000000 --- a/fusee/fusee-secondary/src/kip.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_KIP_H -#define FUSEE_KIP_H -#include "utils.h" -#include - -/* Fusee definitions for INI1/KIP types. This is mostly taken from hactool. */ - -#define MAGIC_INI1 0x31494E49 -#define MAGIC_KIP1 0x3150494B -#define INI1_MAX_KIPS 0x50 - -typedef struct { - uint32_t magic; - uint32_t size; - uint32_t num_processes; - uint32_t _0xC; - uint8_t kip_data[]; -} ini1_header_t; - -typedef struct { - uint32_t out_offset; - uint32_t out_size; - uint32_t compressed_size; - uint32_t attribute; -} kip_section_header_t; - -typedef struct { - uint32_t magic; - char name[0xC]; - uint64_t title_id; - uint32_t process_category; - uint8_t main_thread_priority; - uint8_t default_core; - uint8_t _0x1E; - uint8_t flags; - kip_section_header_t section_headers[6]; - uint32_t capabilities[0x20]; - uint8_t data[]; -} kip1_header_t; - -static inline size_t kip1_get_size_from_header(kip1_header_t *header) { - /* Header + .text + .rodata + .rwdata */ - return 0x100 + header->section_headers[0].compressed_size + header->section_headers[1].compressed_size + header->section_headers[2].compressed_size; -} - -#endif diff --git a/fusee/fusee-secondary/src/loader.c b/fusee/fusee-secondary/src/loader.c deleted file mode 100644 index c2e36738a..000000000 --- a/fusee/fusee-secondary/src/loader.c +++ /dev/null @@ -1,319 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include "utils.h" -#include "loader.h" -#include "fs_utils.h" -#include "stage2.h" -#include "../../../fusee/common/ini.h" -#include "../../../fusee/common/log.h" - -static loader_ctx_t g_loader_ctx = {0}; - -loader_ctx_t *get_loader_ctx(void) { - return &g_loader_ctx; -} - -static int loadlist_entry_ini_handler(void *user, const char *section, const char *name, const char *value) { - load_file_t *load_file_ctx = (load_file_t *)user; - uintptr_t x = 0; - const char *ext = NULL; - - if (strcmp(section, "stage2") == 0) { - if (strstr(name, load_file_ctx->key) == name) { - ext = name + strlen(load_file_ctx->key); - if (strcmp(ext, "_path") == 0) { - /* Copy in the path. */ - strncpy(load_file_ctx->path, value, sizeof(load_file_ctx->path) - 1); - load_file_ctx->path[sizeof(load_file_ctx->path) - 1] = '\0'; - } else if (strcmp(ext, "_addr") == 0) { - /* Read in load address as a hex string. */ - sscanf(value, "%x", &x); - load_file_ctx->load_address = x; - } else { - return 0; - } - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static void load_list_entry(const char *key) { - load_file_t load_file_ctx = {0}; - struct stat st; - size_t size; - size_t entry_num; - chainloader_entry_t *entry; - load_file_ctx.key = key; - - if (ini_parse_string(get_loader_ctx()->bct0, loadlist_entry_ini_handler, &load_file_ctx) < 0) { - fatal_error("Failed to parse BCT.ini!\n"); - } - - if (load_file_ctx.load_address == 0 || load_file_ctx.path[0] == '\x00') { - fatal_error("Failed to determine where to load %s from!\n", key); - } - - if (strlen(load_file_ctx.path) > LOADER_MAX_PATH_SIZE) { - fatal_error("The filename for %s is too long!\n", key); - } - - if (!check_32bit_address_loadable(load_file_ctx.load_address)) { - fatal_error("Load address 0x%08x is invalid (%s)!\n", load_file_ctx.load_address, key); - } - - if (stat(load_file_ctx.path, &st) == -1) { - fatal_error("Failed to stat file %s: %s!\n", load_file_ctx.path, strerror(errno)); - } - - size = (size_t)st.st_size; - if (!check_32bit_address_range_loadable(load_file_ctx.load_address, size)) { - fatal_error("%s has an invalid load address & size combination!\n", key); - } - - entry_num = g_chainloader_num_entries++; - entry = &g_chainloader_entries[entry_num]; - entry->load_address = load_file_ctx.load_address; - entry->size = size; - entry->num = entry_num; - get_loader_ctx()->nb_files_to_load++; - - strcpy(get_loader_ctx()->file_paths_to_load[entry_num], load_file_ctx.path); -} - -static void parse_loadlist(const char *ll) { - print(SCREEN_LOG_LEVEL_DEBUG, "Parsing load list: %s\n", ll); - - char load_list[0x200] = {0}; - strncpy(load_list, ll, 0x200 - 1); - - char *entry, *p; - - /* entry will point to the start of the current entry. p will point to the current location in the list. */ - entry = load_list; - p = load_list; - - while (*p) { - if (*p == ' ' || *p == '\t') { - /* We're at the end of an entry. */ - *p = '\x00'; - - /* Load the entry. */ - load_list_entry(entry); - /* Skip to the next delimiter. */ - for (; *p == ' ' || *p == '\t' || *p == '\x00'; p++) { } - if (*p != '|') { - fatal_error("Load list is malformed!\n"); - } else { - /* Skip to the next entry. */ - for (; *p == ' ' || *p == '\t' || *p == '|'; p++) { } - entry = p; - } - } - - p++; - if (*p == '\x00') { - /* We're at the end of the line, load the last entry */ - load_list_entry(entry); - } - } -} - -static int loadlist_ini_handler(void *user, const char *section, const char *name, const char *value) { - loader_ctx_t *loader_ctx = (loader_ctx_t *)user; - uintptr_t x = 0; - - if (strcmp(section, "stage2") == 0) { - if (strcmp(name, LOADER_LOADLIST_KEY) == 0) { - parse_loadlist(value); - } else if (strcmp(name, LOADER_ENTRYPOINT_KEY) == 0) { - /* Read in entrypoint as a hex string. */ - sscanf(value, "%x", &x); - loader_ctx->chainload_entrypoint = x; - } else if (strcmp(name, LOADER_CUSTOMSPLASH_KEY) == 0) { - strncpy(loader_ctx->custom_splash_path, value, LOADER_MAX_PATH_SIZE); - loader_ctx->custom_splash_path[LOADER_MAX_PATH_SIZE] = '\0'; - } else if (strcmp(name, LOADER_PACKAGE2_KEY) == 0) { - strncpy(loader_ctx->package2_path, value, LOADER_MAX_PATH_SIZE); - loader_ctx->package2_path[LOADER_MAX_PATH_SIZE] = '\0'; - } else if (strcmp(name, LOADER_EXOSPHERE_KEY) == 0) { - strncpy(loader_ctx->exosphere_path, value, LOADER_MAX_PATH_SIZE); - loader_ctx->exosphere_path[LOADER_MAX_PATH_SIZE] = '\0'; - } else if (strcmp(name, LOADER_TSECFW_KEY) == 0) { - strncpy(loader_ctx->tsecfw_path, value, LOADER_MAX_PATH_SIZE); - loader_ctx->tsecfw_path[LOADER_MAX_PATH_SIZE] = '\0'; - } else if (strcmp(name, LOADER_WARMBOOT_KEY) == 0) { - strncpy(loader_ctx->warmboot_path, value, LOADER_MAX_PATH_SIZE); - loader_ctx->warmboot_path[LOADER_MAX_PATH_SIZE] = '\0'; - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static int chainloader_entry_comparator(const void *a, const void *b) { - const chainloader_entry_t *e1 = (const chainloader_entry_t *)a; - const chainloader_entry_t *e2 = (const chainloader_entry_t *)b; - - return (int)(e1->load_address - e2->load_address); -} - -static uintptr_t find_carveout(chainloader_entry_t *entries, size_t num_entries, size_t requested) { - for(size_t i = 0; i < num_entries; i++) { - uintptr_t lbound = entries[i].load_address + entries[i].size; - if (check_32bit_address_range_loadable(lbound, requested)) { - if (i == num_entries - 1 || lbound + requested <= entries[i + 1].load_address) - return lbound; - } - } - - return 0; -} - -void load_payload(const char *bct0) { - loader_ctx_t *ctx = get_loader_ctx(); - bool can_load_in_place = true; - - extern uint8_t __chainloader_start__[], __chainloader_end__[]; - extern uint8_t __stack_bottom__[], __stack_top__[]; - extern uint8_t __heap_start__[], __heap_end__[]; - extern uint8_t __start__[], __end__[]; - - static chainloader_entry_t nonallocatable_entries[] = { - {.load_address = 0x00000000, .size = 0x40010000}, /* Unknown/Invalid + Low IRAM */ - {.load_address = 0x40040000, .size = 0x80000000 - 0x40040000}, /* Invalid/MMIO */ - {.load_address = (uintptr_t)__chainloader_start__, .size = 0}, - {.load_address = (uintptr_t)__stack_bottom__, .size = 0}, - {.load_address = (uintptr_t)__heap_start__, .size = 0}, - {.load_address = (uintptr_t)__start__, .size = 0}, - {.load_address = 0, .size = 0}, /* Min to max loaded address */ - }; - static const size_t num_nonallocatable_entries = sizeof(nonallocatable_entries) / sizeof(nonallocatable_entries[0]); - if (nonallocatable_entries[2].size == 0) { - /* Initializers aren't computable at load time */ - nonallocatable_entries[2].size = __chainloader_end__ - __chainloader_start__; - nonallocatable_entries[3].size = __stack_top__ - __stack_bottom__; - nonallocatable_entries[4].size = __heap_end__ - __heap_start__; - nonallocatable_entries[5].size = __end__ - __start__; - } - - /* Set BCT0 global. */ - ctx->bct0 = bct0; - - if (ini_parse_string(ctx->bct0, loadlist_ini_handler, ctx) < 0) { - fatal_error("Failed to parse BCT.ini!\n"); - } - - if (ctx->chainload_entrypoint != 0 || ctx->nb_files_to_load > 0) { - fatal_error("loadlist must be empty when booting Horizon!\n"); - } - - /* Sort the entries by ascending load addresses */ - qsort(g_chainloader_entries, g_chainloader_num_entries, sizeof(chainloader_entry_t), chainloader_entry_comparator); - - /* Check for possible overlap and find the entrypoint, also determine whether we can load in-place */ - ctx->file_id_of_entrypoint = ctx->nb_files_to_load; - for (size_t i = 0; i < ctx->nb_files_to_load; i++) { - if (i != ctx->nb_files_to_load - 1 && - overlaps( - g_chainloader_entries[i].load_address, - g_chainloader_entries[i].load_address + g_chainloader_entries[i].size, - g_chainloader_entries[i + 1].load_address, - g_chainloader_entries[i + 1].load_address + g_chainloader_entries[i + 1].size - ) - ) { - fatal_error( - "Loading ranges for files %s and %s overlap!\n", - ctx->file_paths_to_load[g_chainloader_entries[i].num], - ctx->file_paths_to_load[g_chainloader_entries[i + 1].num] - ); - generic_panic(); - } - - if(ctx->chainload_entrypoint >= g_chainloader_entries[i].load_address && - ctx->chainload_entrypoint < g_chainloader_entries[i].load_address + g_chainloader_entries[i].size) { - ctx->file_id_of_entrypoint = g_chainloader_entries[i].num; - } - - can_load_in_place = can_load_in_place && - check_32bit_address_range_in_program( - g_chainloader_entries[i].load_address, - g_chainloader_entries[i].load_address + g_chainloader_entries[i].size - ); - } - - if (ctx->chainload_entrypoint != 0 && ctx->file_id_of_entrypoint >= ctx->nb_files_to_load) { - fatal_error("Entrypoint not in range of any of the files!\n"); - } - - if (can_load_in_place) { - for (size_t i = 0; i < ctx->nb_files_to_load; i++) { - chainloader_entry_t *entry = &g_chainloader_entries[i]; - entry->src_address = entry->load_address; - if (read_from_file((void *)entry->src_address, entry->size, ctx->file_paths_to_load[entry->num]) != entry->size) { - fatal_error("Failed to read file %s: %s!\n", ctx->file_paths_to_load[entry->num], strerror(errno)); - } - } - } else { - size_t total_size = 0; - uintptr_t carveout, min_addr, max_addr, pos; - - for (size_t i = 0; i < ctx->nb_files_to_load; i++) { - total_size += g_chainloader_entries[i].size; - } - - min_addr = g_chainloader_entries[g_chainloader_num_entries - 1].load_address; - max_addr = g_chainloader_entries[g_chainloader_num_entries - 1].load_address + - g_chainloader_entries[g_chainloader_num_entries - 1].size; - - nonallocatable_entries[num_nonallocatable_entries - 1].load_address = min_addr; - nonallocatable_entries[num_nonallocatable_entries - 1].size = max_addr - min_addr; - - /* We need to find a carveout, first outside the loaded range, then inside */ - qsort(nonallocatable_entries, num_nonallocatable_entries, sizeof(chainloader_entry_t), chainloader_entry_comparator); - - carveout = find_carveout(nonallocatable_entries, num_nonallocatable_entries, total_size); - if (carveout == 0) { - carveout = find_carveout(g_chainloader_entries, g_chainloader_num_entries, total_size); - } - if (carveout == 0) { - fatal_error("Failed to find a carveout!\n"); - } - - /* Finally, read the files into the carveout */ - pos = carveout; - for (size_t i = 0; i < ctx->nb_files_to_load; i++) { - chainloader_entry_t *entry = &g_chainloader_entries[i]; - entry->src_address = pos; - if (read_from_file((void *)entry->src_address, entry->size, ctx->file_paths_to_load[entry->num]) != entry->size) { - fatal_error("Failed to read file %s: %s!\n", ctx->file_paths_to_load[entry->num], strerror(errno)); - } - pos += entry->size; - } - } -} diff --git a/fusee/fusee-secondary/src/loader.h b/fusee/fusee-secondary/src/loader.h deleted file mode 100644 index 6c894de15..000000000 --- a/fusee/fusee-secondary/src/loader.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_LOADER_H -#define FUSEE_LOADER_H - -#include "utils.h" -#include "chainloader.h" - -#define LOADER_MAX_PATH_SIZE 255 - -typedef struct { - char path[0x100]; - const char *key; - uintptr_t load_address; - size_t load_size; -} load_file_t; - -typedef struct { - const char *bct0; - uintptr_t chainload_entrypoint; - size_t file_id_of_entrypoint; - size_t nb_files_to_load; - char package2_path[LOADER_MAX_PATH_SIZE+1]; - char exosphere_path[LOADER_MAX_PATH_SIZE+1]; - char tsecfw_path[LOADER_MAX_PATH_SIZE+1]; - char warmboot_path[LOADER_MAX_PATH_SIZE+1]; - char custom_splash_path[LOADER_MAX_PATH_SIZE+1]; - char file_paths_to_load[CHAINLOADER_MAX_ENTRIES][LOADER_MAX_PATH_SIZE+1]; -} loader_ctx_t; - -#define LOADER_ENTRYPOINT_KEY "entrypoint" -#define LOADER_LOADLIST_KEY "loadlist" -#define LOADER_CUSTOMSPLASH_KEY "custom_splash" - -#define LOADER_PACKAGE2_KEY "package2" -#define LOADER_EXOSPHERE_KEY "exosphere" -#define LOADER_TSECFW_KEY "tsecfw" -#define LOADER_WARMBOOT_KEY "warmboot" - -/* TODO: Should we allow files bigger than 16 MB? */ -//#define LOADER_FILESIZE_MAX 0x01000000 - -loader_ctx_t *get_loader_ctx(void); - -void load_payload(const char *bct0); - -#endif diff --git a/fusee/fusee-secondary/src/lp0.h b/fusee/fusee-secondary/src/lp0.h deleted file mode 100644 index 580047545..000000000 --- a/fusee/fusee-secondary/src/lp0.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_WARMBOOT_BIN_LP0_H -#define FUSEE_WARMBOOT_BIN_LP0_H - -#include "utils.h" - -/* WBT0 */ -#define WARMBOOT_MAGIC 0x30544257 - -typedef struct { - uint32_t entrypoint_insn; - uint32_t magic; - uint32_t target_firmware; - uint32_t padding[2]; -} warmboot_metadata_t; - -typedef struct { - uint32_t warmboot_fw_size; - uint32_t dst_address; - uint32_t entrypoint; - uint32_t code_size; -} warmboot_nv_header_t; - -typedef struct { - uint32_t warmboot_fw_size; - uint32_t _0x4[3]; - uint8_t rsa_modulus[0x100]; - uint8_t _0x110[0x10]; - uint8_t rsa_signature[0x100]; - uint8_t _0x220[0x10]; - warmboot_nv_header_t nv_header; - warmboot_metadata_t ams_metadata; -} warmboot_ams_header_t; - -_Static_assert(sizeof(warmboot_ams_header_t) == 0x254, "Warmboot header definition!"); - -#endif diff --git a/fusee/fusee-secondary/src/main.c b/fusee/fusee-secondary/src/main.c deleted file mode 100644 index 1768fefb4..000000000 --- a/fusee/fusee-secondary/src/main.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include - -#include "utils.h" -#include "panic.h" -#include "exception_handlers.h" -#include "loader.h" -#include "chainloader.h" -#include "stage2.h" -#include "nxboot.h" -#include "console.h" -#include "fs_utils.h" -#include "nxfs.h" -#include "gpt.h" -#include "../../../fusee/common/display/video_fb.h" -#include "../../../fusee/common/sdmmc/sdmmc.h" -#include "../../../fusee/common/log.h" -#include "fuse.h" -#include "mtc/mtc.h" -#include "mtc/mtc_b01.h" - -extern void (*__program_exit_callback)(int rc); - -static __attribute__((__aligned__(0x200))) stage2_args_t g_stage2_args_store; -static stage2_args_t *g_stage2_args; -static bool g_do_nxboot; - -static void setup_env(void) { - /* Initialize the display and console. */ - if (console_init() < 0) { - generic_panic(); - } - - /* Set up exception handlers. */ - setup_exception_handlers(); - - /* Initialize the file system by mounting the SD card. */ - if (nxfs_init() < 0) { - fatal_error("Failed to initialize the file system: %s\n", strerror(errno)); - } -} - -static void cleanup_env(void) { - /* Terminate the file system. */ - nxfs_end(); -} - -static void exit_callback(int rc) { - (void)rc; - if (g_do_nxboot) { - /* TODO: halt */ - } else { - relocate_and_chainload(); - } -} - -static const char *get_default_bct0(void) { - return "BCT0\n" - "[stage1]\n" - "stage2_path = atmosphere/fusee-secondary.bin\n" - "stage2_mtc_path = atmosphere/fusee-mtc.bin\n" - "stage2_addr = 0xF0000000\n" - "stage2_entrypoint = 0xF0000000\n" - "\n" - "[stratosphere]\n" - "\n"; -} - -/* Allow for main(int argc, void **argv) signature. */ -#pragma GCC diagnostic ignored "-Wmain" - -int main(int argc, void **argv) { - loader_ctx_t *loader_ctx = get_loader_ctx(); - - /* Check argc. */ - if (argc != STAGE2_ARGC) { - generic_panic(); - } - - g_stage2_args = &g_stage2_args_store; - memcpy(g_stage2_args, (stage2_args_t *)argv[STAGE2_ARGV_ARGUMENT_STRUCT], sizeof(*g_stage2_args)); - - /* Check stage2 version field. */ - if (g_stage2_args->version != 0) { - generic_panic(); - } - - /* Override the global logging level. */ - log_set_log_level(g_stage2_args->log_level); - - /* Initialize the boot environment. */ - setup_env(); - - /* Train dram. */ - train_dram(); - - print(SCREEN_LOG_LEVEL_DEBUG | SCREEN_LOG_LEVEL_NO_PREFIX, u8"Welcome to Atmosphère Fusée Stage 2!\n"); - print(SCREEN_LOG_LEVEL_DEBUG, "Stage 2 executing from: %s\n", (const char *)argv[STAGE2_ARGV_PROGRAM_PATH]); - - /* Load BCT0 from SD if needed. */ - if (strcmp(g_stage2_args->bct0, "") == 0) { - uint32_t bct_tmp_buf[sizeof(g_stage2_args->bct0) / sizeof(uint32_t)] = {0}; - if (!read_from_file(bct_tmp_buf, sizeof(bct_tmp_buf) - 1, "atmosphere/config/BCT.ini")) { - const char * const default_bct0 = get_default_bct0(); - memcpy(bct_tmp_buf, default_bct0, strlen(default_bct0)); - } - memcpy(g_stage2_args->bct0, bct_tmp_buf, sizeof(bct_tmp_buf)); - } - - /* This will load all remaining binaries off of the SD. */ - load_payload(g_stage2_args->bct0); - print(SCREEN_LOG_LEVEL_INFO, "Loaded payloads!\n"); - - g_do_nxboot = (loader_ctx->chainload_entrypoint == 0); - if (g_do_nxboot) { - print(SCREEN_LOG_LEVEL_INFO, "Now performing nxboot.\n"); - - /* Start boot. */ - uint32_t boot_memaddr = nxboot_main(); - - /* Terminate the boot environment. */ - cleanup_env(); - - /* Restore dram if mariko. */ - if (fuse_get_soc_type() == 1) { - restore_dram_mariko(); - } - - /* Finish boot. */ - nxboot_finish(boot_memaddr); - } else { - /* TODO: What else do we want to do in terms of argc/argv? */ - const char *path = get_loader_ctx()->file_paths_to_load[get_loader_ctx()->file_id_of_entrypoint]; - print(SCREEN_LOG_LEVEL_INFO, "Now chainloading.\n"); - g_chainloader_argc = 1; - strcpy(g_chainloader_arg_data, path); - - /* Terminate the boot environment. */ - cleanup_env(); - } - - /* Finally, after the cleanup routines (__libc_fini_array, etc.) are called, chainload or halt ourselves. */ - __program_exit_callback = exit_callback; - - return 0; -} diff --git a/fusee/fusee-secondary/src/masterkey.c b/fusee/fusee-secondary/src/masterkey.c deleted file mode 100644 index c5d9db64d..000000000 --- a/fusee/fusee-secondary/src/masterkey.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include - -#include "utils.h" -#include "masterkey.h" -#include "se.h" -#include "fuse.h" - -static unsigned int g_mkey_revision = 0; -static bool g_determined_mkey_revision = false; - -static uint8_t g_old_masterkeys[MASTERKEY_REVISION_MAX][0x10]; -static uint8_t g_old_devicekeys[MASTERKEY_NUM_NEW_DEVICE_KEYS - 1][0x10]; - -/* TODO: Extend with new vectors, as needed. */ -/* Dev unit keys. */ -static const uint8_t mkey_vectors_dev[MASTERKEY_REVISION_MAX][0x10] = { - {0x46, 0x22, 0xB4, 0x51, 0x9A, 0x7E, 0xA7, 0x7F, 0x62, 0xA1, 0x1F, 0x8F, 0xC5, 0x3A, 0xDB, 0xFE}, /* Zeroes encrypted with Master Key 00. */ - {0x39, 0x33, 0xF9, 0x31, 0xBA, 0xE4, 0xA7, 0x21, 0x2C, 0xDD, 0xB7, 0xD8, 0xB4, 0x4E, 0x37, 0x23}, /* Master key 00 encrypted with Master key 01. */ - {0x97, 0x29, 0xB0, 0x32, 0x43, 0x14, 0x8C, 0xA6, 0x85, 0xE9, 0x5A, 0x94, 0x99, 0x39, 0xAC, 0x5D}, /* Master key 01 encrypted with Master key 02. */ - {0x2C, 0xCA, 0x9C, 0x31, 0x1E, 0x07, 0xB0, 0x02, 0x97, 0x0A, 0xD8, 0x03, 0xA2, 0x76, 0x3F, 0xA3}, /* Master key 02 encrypted with Master key 03. */ - {0x9B, 0x84, 0x76, 0x14, 0x72, 0x94, 0x52, 0xCB, 0x54, 0x92, 0x9B, 0xC4, 0x8C, 0x5B, 0x0F, 0xBA}, /* Master key 03 encrypted with Master key 04. */ - {0x78, 0xD5, 0xF1, 0x20, 0x3D, 0x16, 0xE9, 0x30, 0x32, 0x27, 0x34, 0x6F, 0xCF, 0xE0, 0x27, 0xDC}, /* Master key 04 encrypted with Master key 05. */ - {0x6F, 0xD2, 0x84, 0x1D, 0x05, 0xEC, 0x40, 0x94, 0x5F, 0x18, 0xB3, 0x81, 0x09, 0x98, 0x8D, 0x4E}, /* Master key 05 encrypted with Master key 06. */ - {0x37, 0xAF, 0xAB, 0x35, 0x79, 0x09, 0xD9, 0x48, 0x29, 0xD2, 0xDB, 0xA5, 0xA5, 0xF5, 0x30, 0x19}, /* Master key 06 encrypted with Master key 07. */ - {0xEC, 0xE1, 0x46, 0x89, 0x37, 0xFD, 0xD2, 0x15, 0x8C, 0x3F, 0x24, 0x82, 0xEF, 0x49, 0x68, 0x04}, /* Master key 07 encrypted with Master key 08. */ - {0x43, 0x3D, 0xC5, 0x3B, 0xEF, 0x91, 0x02, 0x21, 0x61, 0x54, 0x63, 0x8A, 0x35, 0xE7, 0xCA, 0xEE}, /* Master key 08 encrypted with Master key 09. */ - {0x6C, 0x2E, 0xCD, 0xB3, 0x34, 0x61, 0x77, 0xF5, 0xF9, 0xB1, 0xDD, 0x61, 0x98, 0x19, 0x3E, 0xD4}, /* Master key 09 encrypted with Master key 0A. */ - {0x21, 0x88, 0x6B, 0x10, 0x9E, 0x83, 0xD6, 0x52, 0xAB, 0x08, 0xDB, 0x6D, 0x39, 0xFF, 0x1C, 0x9C}, /* Master key 0A encrypted with Master key 0B. */ -}; - -/* Retail unit keys. */ -static const uint8_t mkey_vectors[MASTERKEY_REVISION_MAX][0x10] = { - {0x0C, 0xF0, 0x59, 0xAC, 0x85, 0xF6, 0x26, 0x65, 0xE1, 0xE9, 0x19, 0x55, 0xE6, 0xF2, 0x67, 0x3D}, /* Zeroes encrypted with Master Key 00. */ - {0x29, 0x4C, 0x04, 0xC8, 0xEB, 0x10, 0xED, 0x9D, 0x51, 0x64, 0x97, 0xFB, 0xF3, 0x4D, 0x50, 0xDD}, /* Master key 00 encrypted with Master key 01. */ - {0xDE, 0xCF, 0xEB, 0xEB, 0x10, 0xAE, 0x74, 0xD8, 0xAD, 0x7C, 0xF4, 0x9E, 0x62, 0xE0, 0xE8, 0x72}, /* Master key 01 encrypted with Master key 02. */ - {0x0A, 0x0D, 0xDF, 0x34, 0x22, 0x06, 0x6C, 0xA4, 0xE6, 0xB1, 0xEC, 0x71, 0x85, 0xCA, 0x4E, 0x07}, /* Master key 02 encrypted with Master key 03. */ - {0x6E, 0x7D, 0x2D, 0xC3, 0x0F, 0x59, 0xC8, 0xFA, 0x87, 0xA8, 0x2E, 0xD5, 0x89, 0x5E, 0xF3, 0xE9}, /* Master key 03 encrypted with Master key 04. */ - {0xEB, 0xF5, 0x6F, 0x83, 0x61, 0x9E, 0xF8, 0xFA, 0xE0, 0x87, 0xD7, 0xA1, 0x4E, 0x25, 0x36, 0xEE}, /* Master key 04 encrypted with Master key 05. */ - {0x1E, 0x1E, 0x22, 0xC0, 0x5A, 0x33, 0x3C, 0xB9, 0x0B, 0xA9, 0x03, 0x04, 0xBA, 0xDB, 0x07, 0x57}, /* Master key 05 encrypted with Master key 06. */ - {0xA4, 0xD4, 0x52, 0x6F, 0xD1, 0xE4, 0x36, 0xAA, 0x9F, 0xCB, 0x61, 0x27, 0x1C, 0x67, 0x65, 0x1F}, /* Master key 06 encrypted with Master key 07. */ - {0xEA, 0x60, 0xB3, 0xEA, 0xCE, 0x8F, 0x24, 0x46, 0x7D, 0x33, 0x9C, 0xD1, 0xBC, 0x24, 0x98, 0x29}, /* Master key 07 encrypted with Master key 08. */ - {0x4D, 0xD9, 0x98, 0x42, 0x45, 0x0D, 0xB1, 0x3C, 0x52, 0x0C, 0x9A, 0x44, 0xBB, 0xAD, 0xAF, 0x80}, /* Master key 08 encrypted with Master key 09. */ - {0xB8, 0x96, 0x9E, 0x4A, 0x00, 0x0D, 0xD6, 0x28, 0xB3, 0xD1, 0xDB, 0x68, 0x5F, 0xFB, 0xE1, 0x2A}, /* Master key 09 encrypted with Master key 0A. */ - {0xC1, 0x8D, 0x16, 0xBB, 0x2A, 0xE4, 0x1D, 0xD4, 0xC2, 0xC1, 0xB6, 0x40, 0x94, 0x35, 0x63, 0x98}, /* Master key 0A encrypted with Master key 0B. */ -}; - -static const uint8_t new_device_key_sources[MASTERKEY_NUM_NEW_DEVICE_KEYS][0x10] = { - {0x8B, 0x4E, 0x1C, 0x22, 0x42, 0x07, 0xC8, 0x73, 0x56, 0x94, 0x08, 0x8B, 0xCC, 0x47, 0x0F, 0x5D}, /* 4.x New Device Key Source. */ - {0x6C, 0xEF, 0xC6, 0x27, 0x8B, 0xEC, 0x8A, 0x91, 0x99, 0xAB, 0x24, 0xAC, 0x4F, 0x1C, 0x8F, 0x1C}, /* 5.x New Device Key Source. */ - {0x70, 0x08, 0x1B, 0x97, 0x44, 0x64, 0xF8, 0x91, 0x54, 0x9D, 0xC6, 0x84, 0x8F, 0x1A, 0xB2, 0xE4}, /* 6.x New Device Key Source. */ - {0x8E, 0x09, 0x1F, 0x7A, 0xBB, 0xCA, 0x6A, 0xFB, 0xB8, 0x9B, 0xD5, 0xC1, 0x25, 0x9C, 0xA9, 0x17}, /* 6.2.0 New Device Key Source. */ - {0x8F, 0x77, 0x5A, 0x96, 0xB0, 0x94, 0xFD, 0x8D, 0x28, 0xE4, 0x19, 0xC8, 0x16, 0x1C, 0xDB, 0x3D}, /* 7.0.0 New Device Key Source. */ - {0x67, 0x62, 0xD4, 0x8E, 0x55, 0xCF, 0xFF, 0x41, 0x31, 0x15, 0x3B, 0x24, 0x0C, 0x7C, 0x07, 0xAE}, /* 8.1.0 New Device Key Source. */ - {0x4A, 0xC3, 0x4E, 0x14, 0x8B, 0x96, 0x4A, 0xD5, 0xD4, 0x99, 0x73, 0xC4, 0x45, 0xAB, 0x8B, 0x49}, /* 9.0.0 New Device Key Source. */ - {0x14, 0xB8, 0x74, 0x12, 0xCB, 0xBD, 0x0B, 0x8F, 0x20, 0xFB, 0x30, 0xDA, 0x27, 0xE4, 0x58, 0x94}, /* 9.1.0 New Device Key Source. */ - {0xAA, 0xFD, 0xBC, 0xBB, 0x25, 0xC3, 0xA4, 0xEF, 0xE3, 0xEE, 0x58, 0x53, 0xB7, 0xF8, 0xDD, 0xD6}, /* 12.1.0 New Device Key Source. */ -}; - -static const uint8_t new_device_keygen_sources[MASTERKEY_NUM_NEW_DEVICE_KEYS][0x10] = { - {0x88, 0x62, 0x34, 0x6E, 0xFA, 0xF7, 0xD8, 0x3F, 0xE1, 0x30, 0x39, 0x50, 0xF0, 0xB7, 0x5D, 0x5D}, /* 4.x New Device Keygen Source. */ - {0x06, 0x1E, 0x7B, 0xE9, 0x6D, 0x47, 0x8C, 0x77, 0xC5, 0xC8, 0xE7, 0x94, 0x9A, 0xA8, 0x5F, 0x2E}, /* 5.x New Device Keygen Source. */ - {0x99, 0xFA, 0x98, 0xBD, 0x15, 0x1C, 0x72, 0xFD, 0x7D, 0x9A, 0xD5, 0x41, 0x00, 0xFD, 0xB2, 0xEF}, /* 6.x New Device Keygen Source. */ - {0x81, 0x3C, 0x6C, 0xBF, 0x5D, 0x21, 0xDE, 0x77, 0x20, 0xD9, 0x6C, 0xE3, 0x22, 0x06, 0xAE, 0xBB}, /* 6.2.0 New Device Keygen Source. */ - {0x86, 0x61, 0xB0, 0x16, 0xFA, 0x7A, 0x9A, 0xEA, 0xF6, 0xF5, 0xBE, 0x1A, 0x13, 0x5B, 0x6D, 0x9E}, /* 7.0.0 New Device Keygen Source. */ - {0xA6, 0x81, 0x71, 0xE7, 0xB5, 0x23, 0x74, 0xB0, 0x39, 0x8C, 0xB7, 0xFF, 0xA0, 0x62, 0x9F, 0x8D}, /* 8.1.0 New Device Keygen Source. */ - {0x03, 0xE7, 0xEB, 0x43, 0x1B, 0xCF, 0x5F, 0xB5, 0xED, 0xDC, 0x97, 0xAE, 0x21, 0x8D, 0x19, 0xED}, /* 9.0.0 New Device Keygen Source. */ - {0xCE, 0xFE, 0x41, 0x0F, 0x46, 0x9A, 0x30, 0xD6, 0xF2, 0xE9, 0x0C, 0x6B, 0xB7, 0x15, 0x91, 0x36}, /* 9.1.0 New Device Keygen Source. */ - {0xC2, 0x65, 0x34, 0x6E, 0xC7, 0xC6, 0x5D, 0x97, 0x3E, 0x34, 0x5C, 0x6B, 0xB3, 0x7E, 0xC6, 0xE3}, /* 12.1.0 New Device Keygen Source. */ -}; - -static const uint8_t new_device_keygen_sources_dev[MASTERKEY_NUM_NEW_DEVICE_KEYS][0x10] = { - {0xD6, 0xBD, 0x9F, 0xC6, 0x18, 0x09, 0xE1, 0x96, 0x20, 0x39, 0x60, 0xD2, 0x89, 0x83, 0x31, 0x34}, /* 4.x New Device Keygen Source. */ - {0x59, 0x2D, 0x20, 0x69, 0x33, 0xB5, 0x17, 0xBA, 0xCF, 0xB1, 0x4E, 0xFD, 0xE4, 0xC2, 0x7B, 0xA8}, /* 5.x New Device Keygen Source. */ - {0xF6, 0xD8, 0x59, 0x63, 0x8F, 0x47, 0xCB, 0x4A, 0xD8, 0x74, 0x05, 0x7F, 0x88, 0x92, 0x33, 0xA5}, /* 6.x New Device Keygen Source. */ - {0x20, 0xAB, 0xF2, 0x0F, 0x05, 0xE3, 0xDE, 0x2E, 0xA1, 0xFB, 0x37, 0x5E, 0x8B, 0x22, 0x1A, 0x38}, /* 6.2.0 New Device Keygen Source. */ - {0x60, 0xAE, 0x56, 0x68, 0x11, 0xE2, 0x0C, 0x99, 0xDE, 0x05, 0xAE, 0x68, 0x78, 0x85, 0x04, 0xAE}, /* 7.0.0 New Device Keygen Source. */ - {0x94, 0xD6, 0xA8, 0xC0, 0x95, 0xAF, 0xD0, 0xA6, 0x27, 0x53, 0x5E, 0xE5, 0x8E, 0x70, 0x1F, 0x87}, /* 8.1.0 New Device Keygen Source. */ - {0x61, 0x6A, 0x88, 0x21, 0xA3, 0x52, 0xB0, 0x19, 0x16, 0x25, 0xA4, 0xE3, 0x4C, 0x54, 0x02, 0x0F}, /* 9.0.0 New Device Keygen Source. */ - {0x9D, 0xB1, 0xAE, 0xCB, 0xF6, 0xF6, 0xE3, 0xFE, 0xAB, 0x6F, 0xCB, 0xAF, 0x38, 0x03, 0xFC, 0x7B}, /* 9.1.0 New Device Keygen Source. */ - {0xC4, 0xBB, 0xF3, 0x9F, 0xA3, 0xAA, 0x00, 0x99, 0x7C, 0x97, 0xAD, 0x91, 0x8F, 0xE8, 0x45, 0xCB}, /* 12.1.0 New Device Keygen Source. */ -}; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static bool check_mkey_revision(unsigned int revision, bool is_retail) { - uint8_t final_vector[0x10]; - - unsigned int check_keyslot = is_soc_mariko() ? KEYSLOT_SWITCH_MASTERKEY_MARIKO : KEYSLOT_SWITCH_MASTERKEY; - if (revision > 0) { - /* Generate old master key array. */ - for (unsigned int i = revision; i > 0; i--) { - se_aes_ecb_decrypt_block(check_keyslot, g_old_masterkeys[i-1], 0x10, is_retail ? mkey_vectors[i] : mkey_vectors_dev[i], 0x10); - set_aes_keyslot(KEYSLOT_SWITCH_TEMPKEY, g_old_masterkeys[i-1], 0x10); - check_keyslot = KEYSLOT_SWITCH_TEMPKEY; - } - } - - se_aes_ecb_decrypt_block(check_keyslot, final_vector, 0x10, is_retail ? mkey_vectors[0] : mkey_vectors_dev[0], 0x10); - for (unsigned int i = 0; i < 0x10; i++) { - if (final_vector[i] != 0) { - return false; - } - } - return true; -} - -int mkey_detect_revision(bool is_retail) { - if (g_determined_mkey_revision) { - generic_panic(); - } - - for (unsigned int rev = 0; rev < MASTERKEY_REVISION_MAX; rev++) { - if (check_mkey_revision(rev, is_retail)) { - g_determined_mkey_revision = true; - g_mkey_revision = rev; - break; - } - } - - /* We must have determined the master key, or we're not running on a Switch. */ - if (!g_determined_mkey_revision) { - return -1; - } else { - return 0; - } -} - -unsigned int mkey_get_revision(void) { - if (!g_determined_mkey_revision) { - generic_panic(); - } - - return g_mkey_revision; -} - -unsigned int mkey_get_keyslot(unsigned int revision) { - if (!g_determined_mkey_revision || revision >= MASTERKEY_REVISION_MAX) { - generic_panic(); - } - - if (revision > g_mkey_revision) { - generic_panic(); - } - - if (revision == g_mkey_revision) { - return (is_soc_mariko() ? KEYSLOT_SWITCH_MASTERKEY_MARIKO : KEYSLOT_SWITCH_MASTERKEY); - } else { - /* Load into a temp keyslot. */ - set_aes_keyslot(KEYSLOT_SWITCH_TEMPKEY, g_old_masterkeys[revision], 0x10); - return KEYSLOT_SWITCH_TEMPKEY; - } -} - -void derive_new_device_keys(bool is_retail, unsigned int keygen_keyslot, unsigned int target_firmware) { - const bool is_mariko = is_soc_mariko(); - - uint8_t work_buffer[0x10]; - for (unsigned int revision = 0; revision < MASTERKEY_NUM_NEW_DEVICE_KEYS; revision++) { - const unsigned int relative_revision = revision + MASTERKEY_REVISION_400_410; - - se_aes_ecb_decrypt_block(keygen_keyslot, work_buffer, 0x10, new_device_key_sources[revision], 0x10); - decrypt_data_into_keyslot(KEYSLOT_SWITCH_TEMPKEY, mkey_get_keyslot(0), is_retail ? new_device_keygen_sources[revision] : new_device_keygen_sources_dev[revision], 0x10); - if (relative_revision > mkey_get_revision()) { - break; - } else if (relative_revision == mkey_get_revision()) { - /* On Erista, this will already be derived. */ - if (is_mariko) { - decrypt_data_into_keyslot(is_mariko ? KEYSLOT_SWITCH_DEVICEKEY_MARIKO : KEYSLOT_SWITCH_DEVICEKEY, KEYSLOT_SWITCH_TEMPKEY, work_buffer, 0x10); - } - } else { - se_aes_ecb_decrypt_block(KEYSLOT_SWITCH_TEMPKEY, work_buffer, 0x10, work_buffer, 0x10); - set_old_devkey(relative_revision, work_buffer); - - if (revision == 0 && is_mariko) { - set_aes_keyslot(KEYSLOT_SWITCH_4XOLDDEVICEKEY, work_buffer, 0x10); - } - } - } -} - -void set_old_devkey(unsigned int revision, const uint8_t *key) { - if (revision < MASTERKEY_REVISION_400_410 || MASTERKEY_REVISION_MAX <= revision) { - generic_panic(); - } - - memcpy(g_old_devicekeys[revision - MASTERKEY_REVISION_400_410], key, 0x10); -} - -unsigned int devkey_get_keyslot(unsigned int revision) { - if (!g_determined_mkey_revision || revision > g_mkey_revision) { - generic_panic(); - } - - if (revision < MASTERKEY_REVISION_400_410) { - return KEYSLOT_SWITCH_4XOLDDEVICEKEY; - } else if (revision < g_mkey_revision) { - /* Load into a temp keyslot. */ - set_aes_keyslot(KEYSLOT_SWITCH_TEMPKEY, g_old_devicekeys[revision - MASTERKEY_REVISION_400_410], 0x10); - return KEYSLOT_SWITCH_TEMPKEY; - } else { - return is_soc_mariko() ? KEYSLOT_SWITCH_DEVICEKEY_MARIKO : KEYSLOT_SWITCH_DEVICEKEY; - } -} diff --git a/fusee/fusee-secondary/src/masterkey.h b/fusee/fusee-secondary/src/masterkey.h deleted file mode 100644 index 333df6e72..000000000 --- a/fusee/fusee-secondary/src/masterkey.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MASTERKEY_H -#define FUSEE_MASTERKEY_H - -/* This is glue code to enable master key support across versions. */ - -/* TODO: Update to 0xD on release of new master key. */ -#define MASTERKEY_REVISION_MAX 0xC - -#define MASTERKEY_REVISION_100_230 0x00 -#define MASTERKEY_REVISION_300 0x01 -#define MASTERKEY_REVISION_301_302 0x02 -#define MASTERKEY_REVISION_400_410 0x03 -#define MASTERKEY_REVISION_500_510 0x04 -#define MASTERKEY_REVISION_600_610 0x05 -#define MASTERKEY_REVISION_620 0x06 -#define MASTERKEY_REVISION_700_800 0x07 -#define MASTERKEY_REVISION_810 0x08 -#define MASTERKEY_REVISION_900 0x09 -#define MASTERKEY_REVISION_910_1203 0x0A -#define MASTERKEY_REVISION_C10_CURRENT 0x0B - -#define MASTERKEY_NUM_NEW_DEVICE_KEYS (MASTERKEY_REVISION_MAX - MASTERKEY_REVISION_400_410) - -/* This should be called early on in initialization. */ -int mkey_detect_revision(bool is_retail); - -unsigned int mkey_get_revision(void); -unsigned int mkey_get_keyslot(unsigned int revision); - -void derive_new_device_keys(bool is_retail, unsigned int keygen_keyslot, unsigned int target_firmware); -void set_old_devkey(unsigned int revision, const uint8_t *key); -unsigned int devkey_get_keyslot(unsigned int revision); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/max77620.h b/fusee/fusee-secondary/src/max77620.h deleted file mode 100644 index 7c8e95556..000000000 --- a/fusee/fusee-secondary/src/max77620.h +++ /dev/null @@ -1,357 +0,0 @@ -/* - * Defining registers address and its bit definitions of MAX77620 and MAX20024 - * - * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - */ - -#ifndef _MFD_MAX77620_H_ -#define _MFD_MAX77620_H_ - -/* RTC Registers */ -#define MAX77620_REG_RTCINT 0x00 -#define MAX77620_REG_RTCINTM 0x01 -#define MAX77620_REG_RTCCNTLM 0x02 -#define MAX77620_REG_RTCCNTL 0x03 -#define MAX77620_REG_RTCUPDATE0 0x04 -#define MAX77620_REG_RTCUPDATE1 0x05 -#define MAX77620_REG_RTCSMPL 0x06 -#define MAX77620_REG_RTCSEC 0x07 -#define MAX77620_REG_RTCMIN 0x08 -#define MAX77620_REG_RTCHOUR 0x09 -#define MAX77620_REG_RTCDOW 0x0A -#define MAX77620_REG_RTCMONTH 0x0B -#define MAX77620_REG_RTCYEAR 0x0C -#define MAX77620_REG_RTCDOM 0x0D -#define MAX77620_REG_RTCSECA1 0x0E -#define MAX77620_REG_RTCMINA1 0x0F -#define MAX77620_REG_RTCHOURA1 0x10 -#define MAX77620_REG_RTCDOWA1 0x11 -#define MAX77620_REG_RTCMONTHA1 0x12 -#define MAX77620_REG_RTCYEARA1 0x13 -#define MAX77620_REG_RTCDOMA1 0x14 -#define MAX77620_REG_RTCSECA2 0x15 -#define MAX77620_REG_RTCMINA2 0x16 -#define MAX77620_REG_RTCHOURA2 0x17 -#define MAX77620_REG_RTCDOWA2 0x18 -#define MAX77620_REG_RTCMONTHA2 0x19 -#define MAX77620_REG_RTCYEARA2 0x1A -#define MAX77620_REG_RTCDOMA2 0x1B - -/* GLOBAL, PMIC, GPIO, FPS, ONOFFC, CID Registers */ -#define MAX77620_REG_CNFGGLBL1 0x00 -#define MAX77620_REG_CNFGGLBL2 0x01 -#define MAX77620_REG_CNFGGLBL3 0x02 -#define MAX77620_REG_CNFG1_32K 0x03 -#define MAX77620_REG_CNFGBBC 0x04 -#define MAX77620_REG_IRQTOP 0x05 -#define MAX77620_REG_INTLBT 0x06 -#define MAX77620_REG_IRQSD 0x07 -#define MAX77620_REG_IRQ_LVL2_L0_7 0x08 -#define MAX77620_REG_IRQ_LVL2_L8 0x09 -#define MAX77620_REG_IRQ_LVL2_GPIO 0x0A -#define MAX77620_REG_ONOFFIRQ 0x0B -#define MAX77620_REG_NVERC 0x0C -#define MAX77620_REG_IRQTOPM 0x0D -#define MAX77620_REG_INTENLBT 0x0E -#define MAX77620_REG_IRQMASKSD 0x0F -#define MAX77620_REG_IRQ_MSK_L0_7 0x10 -#define MAX77620_REG_IRQ_MSK_L8 0x11 -#define MAX77620_REG_ONOFFIRQM 0x12 -#define MAX77620_REG_STATLBT 0x13 -#define MAX77620_REG_STATSD 0x14 -#define MAX77620_REG_ONOFFSTAT 0x15 - -/* SD and LDO Registers */ -#define MAX77620_REG_SD0 0x16 -#define MAX77620_REG_SD1 0x17 -#define MAX77620_REG_SD2 0x18 -#define MAX77620_REG_SD3 0x19 -#define MAX77620_REG_SD4 0x1A -#define MAX77620_REG_DVSSD0 0x1B -#define MAX77620_REG_DVSSD1 0x1C -#define MAX77620_REG_SD0_CFG 0x1D -#define MAX77620_REG_SD1_CFG 0x1E -#define MAX77620_REG_SD2_CFG 0x1F -#define MAX77620_REG_SD3_CFG 0x20 -#define MAX77620_REG_SD4_CFG 0x21 -#define MAX77620_REG_SD_CFG2 0x22 -#define MAX77620_REG_LDO0_CFG 0x23 -#define MAX77620_REG_LDO0_CFG2 0x24 -#define MAX77620_REG_LDO1_CFG 0x25 -#define MAX77620_REG_LDO1_CFG2 0x26 -#define MAX77620_REG_LDO2_CFG 0x27 -#define MAX77620_REG_LDO2_CFG2 0x28 -#define MAX77620_REG_LDO3_CFG 0x29 -#define MAX77620_REG_LDO3_CFG2 0x2A -#define MAX77620_REG_LDO4_CFG 0x2B -#define MAX77620_REG_LDO4_CFG2 0x2C -#define MAX77620_REG_LDO5_CFG 0x2D -#define MAX77620_REG_LDO5_CFG2 0x2E -#define MAX77620_REG_LDO6_CFG 0x2F -#define MAX77620_REG_LDO6_CFG2 0x30 -#define MAX77620_REG_LDO7_CFG 0x31 -#define MAX77620_REG_LDO7_CFG2 0x32 -#define MAX77620_REG_LDO8_CFG 0x33 -#define MAX77620_REG_LDO8_CFG2 0x34 -#define MAX77620_REG_LDO_CFG3 0x35 - -#define MAX77620_LDO_SLEW_RATE_MASK 0x1 - -/* LDO Configuration 3 */ -#define MAX77620_TRACK4_MASK (1 << 5) -#define MAX77620_TRACK4_SHIFT 5 - -/* Voltage */ -#define MAX77620_SDX_VOLT_MASK 0xFF -#define MAX77620_SD0_VOLT_MASK 0x3F -#define MAX77620_SD1_VOLT_MASK 0x7F -#define MAX77620_LDO_VOLT_MASK 0x3F - -#define MAX77620_REG_GPIO0 0x36 -#define MAX77620_REG_GPIO1 0x37 -#define MAX77620_REG_GPIO2 0x38 -#define MAX77620_REG_GPIO3 0x39 -#define MAX77620_REG_GPIO4 0x3A -#define MAX77620_REG_GPIO5 0x3B -#define MAX77620_REG_GPIO6 0x3C -#define MAX77620_REG_GPIO7 0x3D -#define MAX77620_REG_PUE_GPIO 0x3E -#define MAX77620_REG_PDE_GPIO 0x3F -#define MAX77620_REG_AME_GPIO 0x40 -#define MAX77620_REG_ONOFFCNFG1 0x41 -#define MAX77620_REG_ONOFFCNFG2 0x42 - -/* FPS Registers */ -#define MAX77620_REG_FPS_CFG0 0x43 -#define MAX77620_REG_FPS_CFG1 0x44 -#define MAX77620_REG_FPS_CFG2 0x45 -#define MAX77620_REG_FPS_LDO0 0x46 -#define MAX77620_REG_FPS_LDO1 0x47 -#define MAX77620_REG_FPS_LDO2 0x48 -#define MAX77620_REG_FPS_LDO3 0x49 -#define MAX77620_REG_FPS_LDO4 0x4A -#define MAX77620_REG_FPS_LDO5 0x4B -#define MAX77620_REG_FPS_LDO6 0x4C -#define MAX77620_REG_FPS_LDO7 0x4D -#define MAX77620_REG_FPS_LDO8 0x4E -#define MAX77620_REG_FPS_SD0 0x4F -#define MAX77620_REG_FPS_SD1 0x50 -#define MAX77620_REG_FPS_SD2 0x51 -#define MAX77620_REG_FPS_SD3 0x52 -#define MAX77620_REG_FPS_SD4 0x53 -#define MAX77620_REG_FPS_NONE 0 - -#define MAX77620_FPS_SRC_MASK 0xC0 -#define MAX77620_FPS_SRC_SHIFT 6 -#define MAX77620_FPS_PU_PERIOD_MASK 0x38 -#define MAX77620_FPS_PU_PERIOD_SHIFT 3 -#define MAX77620_FPS_PD_PERIOD_MASK 0x07 -#define MAX77620_FPS_PD_PERIOD_SHIFT 0 -#define MAX77620_FPS_TIME_PERIOD_MASK 0x38 -#define MAX77620_FPS_TIME_PERIOD_SHIFT 3 -#define MAX77620_FPS_EN_SRC_MASK 0x06 -#define MAX77620_FPS_EN_SRC_SHIFT 1 -#define MAX77620_FPS_ENFPS_SW_MASK 0x01 -#define MAX77620_FPS_ENFPS_SW 0x01 - -/* Minimum and maximum FPS period time (in microseconds) are - * different for MAX77620 and Max20024. - */ -#define MAX77620_FPS_PERIOD_MIN_US 40 -#define MAX20024_FPS_PERIOD_MIN_US 20 - -#define MAX77620_FPS_PERIOD_MAX_US 2560 -#define MAX20024_FPS_PERIOD_MAX_US 5120 - -#define MAX77620_REG_FPS_GPIO1 0x54 -#define MAX77620_REG_FPS_GPIO2 0x55 -#define MAX77620_REG_FPS_GPIO3 0x56 -#define MAX77620_REG_FPS_RSO 0x57 -#define MAX77620_REG_CID0 0x58 -#define MAX77620_REG_CID1 0x59 -#define MAX77620_REG_CID2 0x5A -#define MAX77620_REG_CID3 0x5B -#define MAX77620_REG_CID4 0x5C -#define MAX77620_REG_CID5 0x5D - -#define MAX77620_REG_DVSSD4 0x5E -#define MAX20024_REG_MAX_ADD 0x70 - -#define MAX77620_CID_DIDM_MASK 0xF0 -#define MAX77620_CID_DIDM_SHIFT 4 - -/* CNCG2SD */ -#define MAX77620_SD_CNF2_ROVS_EN_SD1 (1 << 1) -#define MAX77620_SD_CNF2_ROVS_EN_SD0 (1 << 2) - -/* Device Identification Metal */ -#define MAX77620_CID5_DIDM(n) (((n) >> 4) & 0xF) -/* Device Indentification OTP */ -#define MAX77620_CID5_DIDO(n) ((n) & 0xF) - -/* SD CNFG1 */ -#define MAX77620_SD_SR_MASK 0xC0 -#define MAX77620_SD_SR_SHIFT 6 -#define MAX77620_SD_POWER_MODE_MASK 0x30 -#define MAX77620_SD_POWER_MODE_SHIFT 4 -#define MAX77620_SD_CFG1_ADE_MASK (1 << 3) -#define MAX77620_SD_CFG1_ADE_DISABLE 0 -#define MAX77620_SD_CFG1_ADE_ENABLE (1 << 3) -#define MAX77620_SD_FPWM_MASK 0x04 -#define MAX77620_SD_FPWM_SHIFT 2 -#define MAX77620_SD_FSRADE_MASK 0x01 -#define MAX77620_SD_FSRADE_SHIFT 0 -#define MAX77620_SD_CFG1_FPWM_SD_MASK (1 << 2) -#define MAX77620_SD_CFG1_FPWM_SD_SKIP 0 -#define MAX77620_SD_CFG1_FPWM_SD_FPWM (1 << 2) -#define MAX20024_SD_CFG1_MPOK_MASK (1 << 1) -#define MAX77620_SD_CFG1_FSRADE_SD_MASK (1 << 0) -#define MAX77620_SD_CFG1_FSRADE_SD_DISABLE 0 -#define MAX77620_SD_CFG1_FSRADE_SD_ENABLE (1 << 0) - -/* LDO_CNFG2 */ -#define MAX77620_LDO_POWER_MODE_MASK 0xC0 -#define MAX77620_LDO_POWER_MODE_SHIFT 6 -#define MAX20024_LDO_CFG2_MPOK_MASK (1 << 2) -#define MAX77620_LDO_CFG2_ADE_MASK (1 << 1) -#define MAX77620_LDO_CFG2_ADE_DISABLE 0 -#define MAX77620_LDO_CFG2_ADE_ENABLE (1 << 1) -#define MAX77620_LDO_CFG2_SS_MASK (1 << 0) -#define MAX77620_LDO_CFG2_SS_FAST (1 << 0) -#define MAX77620_LDO_CFG2_SS_SLOW 0 - -#define MAX77620_IRQ_TOP_GLBL_MASK (1 << 7) -#define MAX77620_IRQ_TOP_SD_MASK (1 << 6) -#define MAX77620_IRQ_TOP_LDO_MASK (1 << 5) -#define MAX77620_IRQ_TOP_GPIO_MASK (1 << 4) -#define MAX77620_IRQ_TOP_RTC_MASK (1 << 3) -#define MAX77620_IRQ_TOP_32K_MASK (1 << 2) -#define MAX77620_IRQ_TOP_ONOFF_MASK (1 << 1) - -#define MAX77620_IRQ_LBM_MASK (1 << 3) -#define MAX77620_IRQ_TJALRM1_MASK (1 << 2) -#define MAX77620_IRQ_TJALRM2_MASK (1 << 1) - -#define MAX77620_CNFG_GPIO_DRV_MASK (1 << 0) -#define MAX77620_CNFG_GPIO_DRV_PUSHPULL (1 << 0) -#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN 0 -#define MAX77620_CNFG_GPIO_DIR_MASK (1 << 1) -#define MAX77620_CNFG_GPIO_DIR_INPUT (1 << 1) -#define MAX77620_CNFG_GPIO_DIR_OUTPUT 0 -#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK (1 << 2) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK (1 << 3) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH (1 << 3) -#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW 0 -#define MAX77620_CNFG_GPIO_INT_MASK (0x3 << 4) -#define MAX77620_CNFG_GPIO_INT_FALLING (1 << 4) -#define MAX77620_CNFG_GPIO_INT_RISING (1 << 5) -#define MAX77620_CNFG_GPIO_DBNC_MASK (0x3 << 6) -#define MAX77620_CNFG_GPIO_DBNC_None (0x0 << 6) -#define MAX77620_CNFG_GPIO_DBNC_8ms (0x1 << 6) -#define MAX77620_CNFG_GPIO_DBNC_16ms (0x2 << 6) -#define MAX77620_CNFG_GPIO_DBNC_32ms (0x3 << 6) - -#define MAX77620_IRQ_LVL2_GPIO_EDGE0 (1 << 0) -#define MAX77620_IRQ_LVL2_GPIO_EDGE1 (1 << 1) -#define MAX77620_IRQ_LVL2_GPIO_EDGE2 (1 << 2) -#define MAX77620_IRQ_LVL2_GPIO_EDGE3 (1 << 3) -#define MAX77620_IRQ_LVL2_GPIO_EDGE4 (1 << 4) -#define MAX77620_IRQ_LVL2_GPIO_EDGE5 (1 << 5) -#define MAX77620_IRQ_LVL2_GPIO_EDGE6 (1 << 6) -#define MAX77620_IRQ_LVL2_GPIO_EDGE7 (1 << 7) - -#define MAX77620_CNFG1_32K_OUT0_EN (1 << 2) - -#define MAX77620_ONOFFCNFG1_SFT_RST (1 << 7) -#define MAX77620_ONOFFCNFG1_MRT_MASK 0x38 -#define MAX77620_ONOFFCNFG1_MRT_SHIFT 0x3 -#define MAX77620_ONOFFCNFG1_SLPEN (1 << 2) -#define MAX77620_ONOFFCNFG1_PWR_OFF (1 << 1) -#define MAX20024_ONOFFCNFG1_CLRSE 0x18 - -#define MAX77620_ONOFFCNFG2_SFT_RST_WK (1 << 7) -#define MAX77620_ONOFFCNFG2_WD_RST_WK (1 << 6) -#define MAX77620_ONOFFCNFG2_SLP_LPM_MSK (1 << 5) -#define MAX77620_ONOFFCNFG2_WK_ALARM1 (1 << 2) -#define MAX77620_ONOFFCNFG2_WK_EN0 (1 << 0) - -#define MAX77620_GLBLM_MASK (1 << 0) - -#define MAX77620_WDTC_MASK 0x3 -#define MAX77620_WDTOFFC (1 << 4) -#define MAX77620_WDTSLPC (1 << 3) -#define MAX77620_WDTEN (1 << 2) - -#define MAX77620_TWD_MASK 0x3 -#define MAX77620_TWD_2s 0x0 -#define MAX77620_TWD_16s 0x1 -#define MAX77620_TWD_64s 0x2 -#define MAX77620_TWD_128s 0x3 - -#define MAX77620_CNFGGLBL1_LBDAC_EN (1 << 7) -#define MAX77620_CNFGGLBL1_MPPLD (1 << 6) -#define MAX77620_CNFGGLBL1_LBHYST ((1 << 5) | (1 << 4)) -#define MAX77620_CNFGGLBL1_LBHYST_N (1 << 4) -#define MAX77620_CNFGGLBL1_LBDAC 0x0E -#define MAX77620_CNFGGLBL1_LBDAC_N (1 << 1) -#define MAX77620_CNFGGLBL1_LBRSTEN (1 << 0) - -/* CNFG BBC registers */ -#define MAX77620_CNFGBBC_ENABLE (1 << 0) -#define MAX77620_CNFGBBC_CURRENT_MASK 0x06 -#define MAX77620_CNFGBBC_CURRENT_SHIFT 1 -#define MAX77620_CNFGBBC_VOLTAGE_MASK 0x18 -#define MAX77620_CNFGBBC_VOLTAGE_SHIFT 3 -#define MAX77620_CNFGBBC_LOW_CURRENT_DISABLE (1 << 5) -#define MAX77620_CNFGBBC_RESISTOR_MASK 0xC0 -#define MAX77620_CNFGBBC_RESISTOR_SHIFT 6 - -#define MAX77620_FPS_COUNT 3 - -/* Interrupts */ -enum { - MAX77620_IRQ_TOP_GLBL, /* Low-Battery */ - MAX77620_IRQ_TOP_SD, /* SD power fail */ - MAX77620_IRQ_TOP_LDO, /* LDO power fail */ - MAX77620_IRQ_TOP_GPIO, /* TOP GPIO internal int to MAX77620 */ - MAX77620_IRQ_TOP_RTC, /* RTC */ - MAX77620_IRQ_TOP_32K, /* 32kHz oscillator */ - MAX77620_IRQ_TOP_ONOFF, /* ON/OFF oscillator */ - MAX77620_IRQ_LBT_MBATLOW, /* Thermal alarm status, > 120C */ - MAX77620_IRQ_LBT_TJALRM1, /* Thermal alarm status, > 120C */ - MAX77620_IRQ_LBT_TJALRM2, /* Thermal alarm status, > 140C */ -}; - -/* GPIOs */ -enum { - MAX77620_GPIO0, - MAX77620_GPIO1, - MAX77620_GPIO2, - MAX77620_GPIO3, - MAX77620_GPIO4, - MAX77620_GPIO5, - MAX77620_GPIO6, - MAX77620_GPIO7, - MAX77620_GPIO_NR, -}; - -/* FPS Source */ -enum max77620_fps_src { - MAX77620_FPS_SRC_0, - MAX77620_FPS_SRC_1, - MAX77620_FPS_SRC_2, - MAX77620_FPS_SRC_NONE, - MAX77620_FPS_SRC_DEF, -}; - -enum max77620_chip_id { - MAX77620, - MAX20024, -}; - -#endif /* _MFD_MAX77620_H_ */ diff --git a/fusee/fusee-secondary/src/max7762x.c b/fusee/fusee-secondary/src/max7762x.c deleted file mode 100644 index 54530499d..000000000 --- a/fusee/fusee-secondary/src/max7762x.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "max7762x.h" -#include "max77620.h" -#include "i2c.h" -#include "timers.h" - -#define REGULATOR_SD 0 -#define REGULATOR_LDO 1 - -typedef struct _max77620_regulator_t -{ - uint8_t type; - const char *name; - uint8_t reg_sd; - uint32_t mv_step; - uint32_t mv_min; - uint32_t mv_default; - uint32_t mv_max; - uint8_t volt_addr; - uint8_t cfg_addr; - uint8_t volt_mask; - uint8_t enable_mask; - uint8_t enable_shift; - uint8_t status_mask; - - uint8_t fps_addr; - uint8_t fps_src; - uint8_t pd_period; - uint8_t pu_period; -} max77620_regulator_t; - -static const max77620_regulator_t _pmic_regulators[] = { - { REGULATOR_SD, "sd0", 0x16, 12500, 600000, 625000, 1400000, MAX77620_REG_SD0, MAX77620_REG_SD0_CFG, 0x3F, 0x30, 4, 0x80, 0x4F, 1, 7, 1 }, - { REGULATOR_SD, "sd1", 0x17, 12500, 600000, 1125000, 1125000, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, 0x3F, 0x30, 4, 0x40, 0x50, 0, 1, 5 }, - { REGULATOR_SD, "sd2", 0x18, 12500, 600000, 1325000, 1350000, MAX77620_REG_SD2, MAX77620_REG_SD2_CFG, 0xFF, 0x30, 4, 0x20, 0x51, 1, 5, 2 }, - { REGULATOR_SD, "sd3", 0x19, 12500, 600000, 1800000, 1800000, MAX77620_REG_SD3, MAX77620_REG_SD3_CFG, 0xFF, 0x30, 4, 0x10, 0x52, 0, 3, 3 }, - { REGULATOR_LDO, "ldo0", 0x00, 25000, 800000, 1200000, 1200000, MAX77620_REG_LDO0_CFG, MAX77620_REG_LDO0_CFG2, 0x3F, 0xC0, 6, 0x00, 0x46, 3, 7, 0 }, - { REGULATOR_LDO, "ldo1", 0x00, 25000, 800000, 1050000, 1050000, MAX77620_REG_LDO1_CFG, MAX77620_REG_LDO1_CFG2, 0x3F, 0xC0, 6, 0x00, 0x47, 3, 7, 0 }, - { REGULATOR_LDO, "ldo2", 0x00, 50000, 800000, 1800000, 3300000, MAX77620_REG_LDO2_CFG, MAX77620_REG_LDO2_CFG2, 0x3F, 0xC0, 6, 0x00, 0x48, 3, 7, 0 }, - { REGULATOR_LDO, "ldo3", 0x00, 50000, 800000, 3100000, 3100000, MAX77620_REG_LDO3_CFG, MAX77620_REG_LDO3_CFG2, 0x3F, 0xC0, 6, 0x00, 0x49, 3, 7, 0 }, - { REGULATOR_LDO, "ldo4", 0x00, 12500, 800000, 850000, 850000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4A, 0, 7, 1 }, - { REGULATOR_LDO, "ldo5", 0x00, 50000, 800000, 1800000, 1800000, MAX77620_REG_LDO5_CFG, MAX77620_REG_LDO5_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4B, 3, 7, 0 }, - { REGULATOR_LDO, "ldo6", 0x00, 50000, 800000, 2900000, 2900000, MAX77620_REG_LDO6_CFG, MAX77620_REG_LDO6_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4C, 3, 7, 0 }, - { REGULATOR_LDO, "ldo7", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO7_CFG, MAX77620_REG_LDO7_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4D, 1, 4, 3 }, - { REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4E, 3, 7, 0 } -}; - -int max77620_regulator_get_status(uint32_t id) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - uint8_t val = 0; - - if (reg->type == REGULATOR_SD) { - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_STATSD, &val, 1)) - return (val & reg->status_mask) ? 0 : 1; - } - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->cfg_addr, &val, 1)) - return (val & 8) ? 1 : 0; - - return 0; -} - -int max77620_regulator_config_fps(uint32_t id) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - uint8_t val = ((reg->fps_src << 6) | (reg->pu_period << 3) | (reg->pd_period)); - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->fps_addr, &val, 1)) { - return 1; - } - - return 0; -} - -int max77620_regulator_set_voltage(uint32_t id, uint32_t mv) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - - if ((mv < reg->mv_default) || (mv > reg->mv_max)) - return 0; - - uint32_t mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step; - uint8_t val = 0; - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1)) - { - val = ((val & ~reg->volt_mask) | (mult & reg->volt_mask)); - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1)) - { - udelay(1000); - return 1; - } - } - - return 0; -} - -int max77620_regulator_enable(uint32_t id, int enable) -{ - if (id > REGULATOR_MAX) - return 0; - - const max77620_regulator_t *reg = &_pmic_regulators[id]; - - uint32_t addr = (reg->type == REGULATOR_SD) ? reg->cfg_addr : reg->volt_addr; - uint8_t val = 0; - - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1)) - { - if (enable) - val = ((val & ~reg->enable_mask) | ((3 << reg->enable_shift) & reg->enable_mask)); - else - val &= ~reg->enable_mask; - - if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1)) - { - udelay(1000); - return 1; - } - } - - return 0; -} - -void max77620_config_default() -{ - for (uint32_t i = 1; i <= REGULATOR_MAX; i++) - { - uint8_t val = 0; - if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CID4, &val, 1)) - { - max77620_regulator_config_fps(i); - max77620_regulator_set_voltage(i, _pmic_regulators[i].mv_default); - - if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE) { - max77620_regulator_enable(i, 1); - } - } - } - - uint8_t val = 4; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD_CFG2, &val, 1); -} - -void max77620_low_battery_monitor_config() -{ - uint8_t val = (MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N); - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGGLBL1, &val, 1); -} diff --git a/fusee/fusee-secondary/src/max7762x.h b/fusee/fusee-secondary/src/max7762x.h deleted file mode 100644 index 92ca7ca99..000000000 --- a/fusee/fusee-secondary/src/max7762x.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MAX7762X_H_ -#define FUSEE_MAX7762X_H_ - -/* -* Switch Power domains (max77620): -* Name | Usage | uV step | uV min | uV default | uV max | Init -*-------+---------------+---------+--------+------------+---------+------------------ -* sd0 | core | 12500 | 600000 | 625000 | 1400000 | 1.125V (pkg1.1) -* sd1 | SDRAM | 12500 | 600000 | 1125000 | 1125000 | 1.1V (pkg1.1) -* sd2 | ldo{0-1, 7-8} | 12500 | 600000 | 1325000 | 1350000 | 1.325V (pcv) -* sd3 | 1.8V general | 12500 | 600000 | 1800000 | 1800000 | -* ldo0 | Display Panel | 25000 | 800000 | 1200000 | 1200000 | 1.2V (pkg1.1) -* ldo1 | XUSB, PCIE | 25000 | 800000 | 1050000 | 1050000 | 1.05V (pcv) -* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 | -* ldo3 | | 50000 | 800000 | 3100000 | 3100000 | -* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 | -* ldo5 | | 50000 | 800000 | 1800000 | 1800000 | -* ldo6 | | 50000 | 800000 | 2900000 | 2900000 | -* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 | -* ldo8 | XUSB, DC | 50000 | 800000 | 1050000 | 1050000 | -*/ - -/* -* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode -* MAX77620_REG_GPIOx: 0x9 sets output and enable -*/ - -/*! MAX77620 partitions. */ -#define REGULATOR_SD0 0 -#define REGULATOR_SD1 1 -#define REGULATOR_SD2 2 -#define REGULATOR_SD3 3 -#define REGULATOR_LDO0 4 -#define REGULATOR_LDO1 5 -#define REGULATOR_LDO2 6 -#define REGULATOR_LDO3 7 -#define REGULATOR_LDO4 8 -#define REGULATOR_LDO5 9 -#define REGULATOR_LDO6 10 -#define REGULATOR_LDO7 11 -#define REGULATOR_LDO8 12 -#define REGULATOR_MAX 12 - -int max77620_regulator_get_status(uint32_t id); -int max77620_regulator_config_fps(uint32_t id); -int max77620_regulator_set_voltage(uint32_t id, uint32_t mv); -int max77620_regulator_enable(uint32_t id, int enable); -void max77620_config_default(); -void max77620_low_battery_monitor_config(); - -#endif diff --git a/fusee/fusee-secondary/src/max77812.h b/fusee/fusee-secondary/src/max77812.h deleted file mode 100644 index bf329ff6b..000000000 --- a/fusee/fusee-secondary/src/max77812.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MAX77812_H_ -#define FUSEE_MAX77812_H_ - -#define MAX77812_REG_RESET 0x00 -#define MAX77812_REG_INT_SRC 0x01 -#define MAX77812_REG_INT_SRC_M 0x02 -#define MAX77812_REG_TOPSYS_INT 0x03 -#define MAX77812_REG_TOPSYS_INT_M 0x04 -#define MAX77812_REG_TOPSYS_STAT 0x05 -#define MAX77812_REG_EN_CTRL 0x06 -#define MAX77812_REG_STUP_DLY1 0x07 -#define MAX77812_REG_STUP_DLY2 0x08 -#define MAX77812_REG_STUP_DLY3 0x09 -#define MAX77812_REG_SHDN_DLY1 0x0A -#define MAX77812_REG_SHDN_DLY2 0x0B -#define MAX77812_REG_SHDN_DLY3 0x0C -#define MAX77812_REG_SHDN_DLY4 0x0D -#define MAX77812_REG_WDTRSTB_DEB 0x0E -#define MAX77812_REG_GPI_FUNC 0x0F -#define MAX77812_REG_GPI_DEB1 0x10 -#define MAX77812_REG_GPI_DEB2 0x11 -#define MAX77812_REG_GPI_PD_CTRL 0x12 -#define MAX77812_REG_PROT_CFG 0x13 -#define MAX77812_REG_I2C_CFG 0x15 -#define MAX77812_REG_BUCK_INT 0x20 -#define MAX77812_REG_BUCK_INT_M 0x21 -#define MAX77812_REG_BUCK_STAT 0x22 -#define MAX77812_REG_M1_VOUT 0x23 -#define MAX77812_REG_M2_VOUT 0x24 -#define MAX77812_REG_M3_VOUT 0x25 -#define MAX77812_REG_M4_VOUT 0x26 -#define MAX77812_REG_M1_VOUT_D 0x27 -#define MAX77812_REG_M2_VOUT_D 0x28 -#define MAX77812_REG_M3_VOUT_D 0x29 -#define MAX77812_REG_M4_VOUT_D 0x2A -#define MAX77812_REG_M1_VOUT_S 0x2B -#define MAX77812_REG_M2_VOUT_S 0x2C -#define MAX77812_REG_M3_VOUT_S 0x2D -#define MAX77812_REG_M4_VOUT_S 0x2E -#define MAX77812_REG_M1_CGF 0x2F -#define MAX77812_REG_M2_CGF 0x30 -#define MAX77812_REG_M3_CGF 0x31 -#define MAX77812_REG_M4_CGF 0x32 -#define MAX77812_REG_GLB_CFG1 0x33 -#define MAX77812_REG_GLB_CFG2 0x34 -#define MAX77812_REG_GLB_CFG3 0x35 - -#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n) -#define MAX77812_START_SLEW_RATE_MASK 0x07 -#define MAX77812_SHDN_SLEW_RATE_MASK 0x70 -#define MAX77812_RAMPDOWN_SLEW_RATE_MASK 0x07 -#define MAX77812_RAMPUP_SLEW_RATE_MASK 0x70 - -#define MAX77812_VOUT_MASK 0xFF -#define MAX77812_VOUT_N_VOLTAGE 0xFF -#define MAX77812_VOUT_VMIN 250000 -#define MAX77812_VOUT_VMAX 1525000 -#define MAX77812_VOUT_STEP 5000 - -#define MAX77812_REGULATOR_ID_M1 0 -#define MAX77812_REGULATOR_ID_M2 1 -#define MAX77812_REGULATOR_ID_M3 2 -#define MAX77812_REGULATOR_ID_M4 3 - -#endif diff --git a/fusee/fusee-secondary/src/mc.c b/fusee/fusee-secondary/src/mc.c deleted file mode 100644 index 38148ad84..000000000 --- a/fusee/fusee-secondary/src/mc.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "mc.h" -#include "car.h" -#include "timers.h" - -void mc_config_tsec_carveout(uint32_t bom, uint32_t size1mb, bool lock) -{ - MAKE_MC_REG(MC_SEC_CARVEOUT_BOM) = bom; - MAKE_MC_REG(MC_SEC_CARVEOUT_SIZE_MB) = size1mb; - - if (lock) - MAKE_MC_REG(MC_SEC_CARVEOUT_REG_CTRL) = 1; -} - -void mc_config_carveout() -{ - *(volatile uint32_t *)0x8005FFFC = 0xC0EDBBCC; - - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_0) = 1; - MAKE_MC_REG(MC_VIDEO_PROTECT_GPU_OVERRIDE_1) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_BOM) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_SIZE_MB) = 0; - MAKE_MC_REG(MC_VIDEO_PROTECT_REG_CTRL) = 1; - - mc_config_tsec_carveout(0, 0, true); - - MAKE_MC_REG(MC_MTS_CARVEOUT_BOM) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_SIZE_MB) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_ADR_HI) = 0; - MAKE_MC_REG(MC_MTS_CARVEOUT_REG_CTRL) = 1; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT1_CFG0) = 0x4000006; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2) = (BIT(CSR_GPUSRD) | BIT(CSW_GPUSWR)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4) = (BIT(CSR_GPUSRD2) | BIT(CSW_GPUSWR2)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT3_CFG0) = 0x4401E7E; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT4_CFG0) = 0x8F; - - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_BOM) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_SIZE_128KB) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT5_CFG0) = 0x8F; -} - -void mc_config_carveout_finalize() -{ - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_BOM) = 0x80020000; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_BOM_HI) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_SIZE_128KB) = 2; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2) = (BIT(CSR_GPUSRD) | BIT(CSW_GPUSWR)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4) = (BIT(CSR_GPUSRD2) | BIT(CSW_GPUSWR2)); - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4) = 0; - MAKE_MC_REG(MC_SECURITY_CARVEOUT2_CFG0) = 0x440167E; -} - -void mc_enable_ahb_redirect() -{ - volatile tegra_car_t *car = car_get_regs(); - car->lvl2_clk_gate_ovrd = ((car->lvl2_clk_gate_ovrd & 0xFFF7FFFF) | 0x80000); - - MAKE_MC_REG(MC_IRAM_BOM) = 0x40000000; - MAKE_MC_REG(MC_IRAM_TOM) = 0x4003F000; -} - -void mc_disable_ahb_redirect() -{ - volatile tegra_car_t *car = car_get_regs(); - - MAKE_MC_REG(MC_IRAM_BOM) = 0xFFFFF000; - MAKE_MC_REG(MC_IRAM_TOM) = 0; - - car->lvl2_clk_gate_ovrd &= 0xFFF7FFFF; -} - -void mc_enable() -{ - volatile tegra_car_t *car = car_get_regs(); - - /* Set EMC clock source. */ - car->clk_source_emc = ((car->clk_source_emc & 0x1FFFFFFF) | 0x40000000); - - /* Enable MIPI CAL clock. */ - car->clk_enb_h_set = ((car->clk_enb_h_set & 0xFDFFFFFF) | 0x2000000); - - /* Enable MC clock. */ - car->clk_enb_h_set = ((car->clk_enb_h_set & 0xFFFFFFFE) | 1); - - /* Enable EMC DLL clock. */ - car->clk_enb_x_set = ((car->clk_enb_x_set & 0xFFFFBFFF) | 0x4000); - - /* Clear EMC and MC reset. */ - car->rst_dev_h_set = 0x2000001; - udelay(5); - - mc_disable_ahb_redirect(); -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mc.h b/fusee/fusee-secondary/src/mc.h deleted file mode 100644 index c414f907a..000000000 --- a/fusee/fusee-secondary/src/mc.h +++ /dev/null @@ -1,606 +0,0 @@ -/* - * Copyright (c) 2014, NVIDIA Corporation. All rights reserved. - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MC_H_ -#define FUSEE_MC_H_ - -#include -#include - -#define MC_BASE 0x70019000 -#define MAKE_MC_REG(n) MAKE_REG32(MC_BASE + n) - -#define MC_INTSTATUS 0x0 -#define MC_INTMASK 0x4 -#define MC_ERR_STATUS 0x8 -#define MC_ERR_ADR 0xc -#define MC_SMMU_CONFIG 0x10 -#define MC_SMMU_TLB_CONFIG 0x14 -#define MC_SMMU_PTC_CONFIG 0x18 -#define MC_SMMU_PTB_ASID 0x1c -#define MC_SMMU_PTB_DATA 0x20 -#define MC_SMMU_TLB_FLUSH 0x30 -#define MC_SMMU_PTC_FLUSH 0x34 -#define MC_SMMU_ASID_SECURITY 0x38 -#define MC_SMMU_ASID_SECURITY_1 0x3c -#define MC_SMMU_ASID_SECURITY_2 0x9e0 -#define MC_SMMU_ASID_SECURITY_3 0x9e4 -#define MC_SMMU_ASID_SECURITY_4 0x9e8 -#define MC_SMMU_ASID_SECURITY_5 0x9ec -#define MC_SMMU_ASID_SECURITY_6 0x9f0 -#define MC_SMMU_ASID_SECURITY_7 0x9f4 -#define MC_SMMU_AFI_ASID 0x238 -#define MC_SMMU_AVPC_ASID 0x23c -#define MC_SMMU_TSEC_ASID 0x294 -#define MC_SMMU_PPCS1_ASID 0x298 -#define MC_SMMU_TRANSLATION_ENABLE_0 0x228 -#define MC_SMMU_TRANSLATION_ENABLE_1 0x22c -#define MC_SMMU_TRANSLATION_ENABLE_2 0x230 -#define MC_SMMU_TRANSLATION_ENABLE_3 0x234 -#define MC_SMMU_TRANSLATION_ENABLE_4 0xb98 -#define MC_PCFIFO_CLIENT_CONFIG0 0xdd0 -#define MC_PCFIFO_CLIENT_CONFIG1 0xdd4 -#define MC_PCFIFO_CLIENT_CONFIG2 0xdd8 -#define MC_PCFIFO_CLIENT_CONFIG3 0xddc -#define MC_PCFIFO_CLIENT_CONFIG4 0xde0 -#define MC_EMEM_CFG 0x50 -#define MC_EMEM_ADR_CFG 0x54 -#define MC_EMEM_ADR_CFG_DEV0 0x58 -#define MC_EMEM_ADR_CFG_DEV1 0x5c -#define MC_EMEM_ADR_CFG_CHANNEL_MASK 0x60 -#define MC_EMEM_ADR_CFG_BANK_MASK_0 0x64 -#define MC_EMEM_ADR_CFG_BANK_MASK_1 0x68 -#define MC_EMEM_ADR_CFG_BANK_MASK_2 0x6c -#define MC_SECURITY_CFG0 0x70 -#define MC_SECURITY_CFG1 0x74 -#define MC_SECURITY_CFG3 0x9bc -#define MC_SECURITY_RSV 0x7c -#define MC_EMEM_ARB_CFG 0x90 -#define MC_EMEM_ARB_OUTSTANDING_REQ 0x94 -#define MC_EMEM_ARB_TIMING_RCD 0x98 -#define MC_EMEM_ARB_TIMING_RP 0x9c -#define MC_EMEM_ARB_TIMING_RC 0xa0 -#define MC_EMEM_ARB_TIMING_RAS 0xa4 -#define MC_EMEM_ARB_TIMING_FAW 0xa8 -#define MC_EMEM_ARB_TIMING_RRD 0xac -#define MC_EMEM_ARB_TIMING_RAP2PRE 0xb0 -#define MC_EMEM_ARB_TIMING_WAP2PRE 0xb4 -#define MC_EMEM_ARB_TIMING_R2R 0xb8 -#define MC_EMEM_ARB_TIMING_W2W 0xbc -#define MC_EMEM_ARB_TIMING_R2W 0xc0 -#define MC_EMEM_ARB_TIMING_W2R 0xc4 -#define MC_EMEM_ARB_TIMING_RFCPB 0x6c0 -#define MC_EMEM_ARB_TIMING_CCDMW 0x6c4 -#define MC_EMEM_ARB_REFPB_HP_CTRL 0x6f0 -#define MC_EMEM_ARB_REFPB_BANK_CTRL 0x6f4 -#define MC_EMEM_ARB_DA_TURNS 0xd0 -#define MC_EMEM_ARB_DA_COVERS 0xd4 -#define MC_EMEM_ARB_MISC0 0xd8 -#define MC_EMEM_ARB_MISC1 0xdc -#define MC_EMEM_ARB_MISC2 0xc8 -#define MC_EMEM_ARB_RING1_THROTTLE 0xe0 -#define MC_EMEM_ARB_RING3_THROTTLE 0xe4 -#define MC_EMEM_ARB_NISO_THROTTLE 0x6b0 -#define MC_EMEM_ARB_OVERRIDE 0xe8 -#define MC_EMEM_ARB_RSV 0xec -#define MC_CLKEN_OVERRIDE 0xf4 -#define MC_TIMING_CONTROL_DBG 0xf8 -#define MC_TIMING_CONTROL 0xfc -#define MC_STAT_CONTROL 0x100 -#define MC_STAT_STATUS 0x104 -#define MC_STAT_EMC_CLOCK_LIMIT 0x108 -#define MC_STAT_EMC_CLOCK_LIMIT_MSBS 0x10c -#define MC_STAT_EMC_CLOCKS 0x110 -#define MC_STAT_EMC_CLOCKS_MSBS 0x114 -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO 0x118 -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO 0x158 -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI 0x11c -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI 0x15c -#define MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER 0xa20 -#define MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER 0xa24 -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_LO 0x198 -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_LO 0x1a8 -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_HI 0x19c -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_HI 0x1ac -#define MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_UPPER 0xa28 -#define MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_UPPER 0xa2c -#define MC_STAT_EMC_FILTER_SET0_ASID 0x1a0 -#define MC_STAT_EMC_FILTER_SET1_ASID 0x1b0 -#define MC_STAT_EMC_FILTER_SET0_SLACK_LIMIT 0x120 -#define MC_STAT_EMC_FILTER_SET1_SLACK_LIMIT 0x160 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_0 0x128 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_0 0x168 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_1 0x12c -#define MC_STAT_EMC_FILTER_SET1_CLIENT_1 0x16c -#define MC_STAT_EMC_FILTER_SET0_CLIENT_2 0x130 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_2 0x170 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_3 0x134 -#define MC_STAT_EMC_FILTER_SET0_CLIENT_4 0xb88 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_3 0x174 -#define MC_STAT_EMC_FILTER_SET1_CLIENT_4 0xb8c -#define MC_STAT_EMC_SET0_COUNT 0x138 -#define MC_STAT_EMC_SET0_COUNT_MSBS 0x13c -#define MC_STAT_EMC_SET1_COUNT 0x178 -#define MC_STAT_EMC_SET1_COUNT_MSBS 0x17c -#define MC_STAT_EMC_SET0_SLACK_ACCUM 0x140 -#define MC_STAT_EMC_SET0_SLACK_ACCUM_MSBS 0x144 -#define MC_STAT_EMC_SET1_SLACK_ACCUM 0x180 -#define MC_STAT_EMC_SET1_SLACK_ACCUM_MSBS 0x184 -#define MC_STAT_EMC_SET0_HISTO_COUNT 0x148 -#define MC_STAT_EMC_SET0_HISTO_COUNT_MSBS 0x14c -#define MC_STAT_EMC_SET1_HISTO_COUNT 0x188 -#define MC_STAT_EMC_SET1_HISTO_COUNT_MSBS 0x18c -#define MC_STAT_EMC_SET0_MINIMUM_SLACK_OBSERVED 0x150 -#define MC_STAT_EMC_SET1_MINIMUM_SLACK_OBSERVED 0x190 -#define MC_STAT_EMC_SET0_IDLE_CYCLE_COUNT 0x1b8 -#define MC_STAT_EMC_SET0_IDLE_CYCL_COUNT_MSBS 0x1bc -#define MC_STAT_EMC_SET1_IDLE_CYCLE_COUNT 0x1c8 -#define MC_STAT_EMC_SET1_IDLE_CYCL_COUNT_MSBS 0x1cc -#define MC_STAT_EMC_SET0_IDLE_CYCLE_PARTITION_SELECT 0x1c0 -#define MC_STAT_EMC_SET1_IDLE_CYCLE_PARTITION_SELECT 0x1d0 -#define MC_CLIENT_HOTRESET_CTRL 0x200 -#define MC_CLIENT_HOTRESET_CTRL_1 0x970 -#define MC_CLIENT_HOTRESET_STATUS 0x204 -#define MC_CLIENT_HOTRESET_STATUS_1 0x974 -#define MC_EMEM_ARB_ISOCHRONOUS_0 0x208 -#define MC_EMEM_ARB_ISOCHRONOUS_1 0x20c -#define MC_EMEM_ARB_ISOCHRONOUS_2 0x210 -#define MC_EMEM_ARB_ISOCHRONOUS_3 0x214 -#define MC_EMEM_ARB_ISOCHRONOUS_4 0xb94 -#define MC_EMEM_ARB_HYSTERESIS_0 0x218 -#define MC_EMEM_ARB_HYSTERESIS_1 0x21c -#define MC_EMEM_ARB_HYSTERESIS_2 0x220 -#define MC_EMEM_ARB_HYSTERESIS_3 0x224 -#define MC_EMEM_ARB_HYSTERESIS_4 0xb84 -#define MC_EMEM_ARB_DHYSTERESIS_0 0xbb0 -#define MC_EMEM_ARB_DHYSTERESIS_1 0xbb4 -#define MC_EMEM_ARB_DHYSTERESIS_2 0xbb8 -#define MC_EMEM_ARB_DHYSTERESIS_3 0xbbc -#define MC_EMEM_ARB_DHYSTERESIS_4 0xbc0 -#define MC_EMEM_ARB_DHYST_CTRL 0xbcc -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 0xbd0 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 0xbd4 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 0xbd8 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 0xbdc -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 0xbe0 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 0xbe4 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 0xbe8 -#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 0xbec -#define MC_RESERVED_RSV 0x3fc -#define MC_DISB_EXTRA_SNAP_LEVELS 0x408 -#define MC_APB_EXTRA_SNAP_LEVELS 0x2a4 -#define MC_AHB_EXTRA_SNAP_LEVELS 0x2a0 -#define MC_USBD_EXTRA_SNAP_LEVELS 0xa18 -#define MC_ISP_EXTRA_SNAP_LEVELS 0xa08 -#define MC_AUD_EXTRA_SNAP_LEVELS 0xa10 -#define MC_MSE_EXTRA_SNAP_LEVELS 0x40c -#define MC_GK2_EXTRA_SNAP_LEVELS 0xa40 -#define MC_A9AVPPC_EXTRA_SNAP_LEVELS 0x414 -#define MC_FTOP_EXTRA_SNAP_LEVELS 0x2bc -#define MC_JPG_EXTRA_SNAP_LEVELS 0xa3c -#define MC_HOST_EXTRA_SNAP_LEVELS 0xa14 -#define MC_SAX_EXTRA_SNAP_LEVELS 0x2c0 -#define MC_DIS_EXTRA_SNAP_LEVELS 0x2ac -#define MC_VICPC_EXTRA_SNAP_LEVELS 0xa1c -#define MC_HDAPC_EXTRA_SNAP_LEVELS 0xa48 -#define MC_AVP_EXTRA_SNAP_LEVELS 0x2a8 -#define MC_USBX_EXTRA_SNAP_LEVELS 0x404 -#define MC_PCX_EXTRA_SNAP_LEVELS 0x2b8 -#define MC_SD_EXTRA_SNAP_LEVELS 0xa04 -#define MC_DFD_EXTRA_SNAP_LEVELS 0xa4c -#define MC_VE_EXTRA_SNAP_LEVELS 0x2d8 -#define MC_GK_EXTRA_SNAP_LEVELS 0xa00 -#define MC_VE2_EXTRA_SNAP_LEVELS 0x410 -#define MC_SDM_EXTRA_SNAP_LEVELS 0xa44 -#define MC_VIDEO_PROTECT_BOM 0x648 -#define MC_VIDEO_PROTECT_SIZE_MB 0x64c -#define MC_VIDEO_PROTECT_BOM_ADR_HI 0x978 -#define MC_VIDEO_PROTECT_REG_CTRL 0x650 -#define MC_ERR_VPR_STATUS 0x654 -#define MC_ERR_VPR_ADR 0x658 -#define MC_VIDEO_PROTECT_VPR_OVERRIDE 0x418 -#define MC_VIDEO_PROTECT_VPR_OVERRIDE1 0x590 -#define MC_IRAM_BOM 0x65c -#define MC_IRAM_TOM 0x660 -#define MC_IRAM_ADR_HI 0x980 -#define MC_IRAM_REG_CTRL 0x964 -#define MC_EMEM_CFG_ACCESS_CTRL 0x664 -#define MC_TZ_SECURITY_CTRL 0x668 -#define MC_EMEM_ARB_OUTSTANDING_REQ_RING3 0x66c -#define MC_EMEM_ARB_OUTSTANDING_REQ_NISO 0x6b4 -#define MC_EMEM_ARB_RING0_THROTTLE_MASK 0x6bc -#define MC_EMEM_ARB_NISO_THROTTLE_MASK 0x6b8 -#define MC_EMEM_ARB_NISO_THROTTLE_MASK_1 0xb80 -#define MC_SEC_CARVEOUT_BOM 0x670 -#define MC_SEC_CARVEOUT_SIZE_MB 0x674 -#define MC_SEC_CARVEOUT_ADR_HI 0x9d4 -#define MC_SEC_CARVEOUT_REG_CTRL 0x678 -#define MC_ERR_SEC_STATUS 0x67c -#define MC_ERR_SEC_ADR 0x680 -#define MC_PC_IDLE_CLOCK_GATE_CONFIG 0x684 -#define MC_STUTTER_CONTROL 0x688 -#define MC_RESERVED_RSV_1 0x958 -#define MC_DVFS_PIPE_SELECT 0x95c -#define MC_AHB_PTSA_MIN 0x4e0 -#define MC_AUD_PTSA_MIN 0x54c -#define MC_MLL_MPCORER_PTSA_RATE 0x44c -#define MC_RING2_PTSA_RATE 0x440 -#define MC_USBD_PTSA_RATE 0x530 -#define MC_USBX_PTSA_MIN 0x528 -#define MC_USBD_PTSA_MIN 0x534 -#define MC_APB_PTSA_MAX 0x4f0 -#define MC_JPG_PTSA_RATE 0x584 -#define MC_DIS_PTSA_MIN 0x420 -#define MC_AVP_PTSA_MAX 0x4fc -#define MC_AVP_PTSA_RATE 0x4f4 -#define MC_RING1_PTSA_MIN 0x480 -#define MC_DIS_PTSA_MAX 0x424 -#define MC_SD_PTSA_MAX 0x4d8 -#define MC_MSE_PTSA_RATE 0x4c4 -#define MC_VICPC_PTSA_MIN 0x558 -#define MC_PCX_PTSA_MAX 0x4b4 -#define MC_ISP_PTSA_RATE 0x4a0 -#define MC_A9AVPPC_PTSA_MIN 0x48c -#define MC_RING2_PTSA_MAX 0x448 -#define MC_AUD_PTSA_RATE 0x548 -#define MC_HOST_PTSA_MIN 0x51c -#define MC_MLL_MPCORER_PTSA_MAX 0x454 -#define MC_SD_PTSA_MIN 0x4d4 -#define MC_RING1_PTSA_RATE 0x47c -#define MC_JPG_PTSA_MIN 0x588 -#define MC_HDAPC_PTSA_MIN 0x62c -#define MC_AVP_PTSA_MIN 0x4f8 -#define MC_JPG_PTSA_MAX 0x58c -#define MC_VE_PTSA_MAX 0x43c -#define MC_DFD_PTSA_MAX 0x63c -#define MC_VICPC_PTSA_RATE 0x554 -#define MC_GK_PTSA_MAX 0x544 -#define MC_VICPC_PTSA_MAX 0x55c -#define MC_SDM_PTSA_MAX 0x624 -#define MC_SAX_PTSA_RATE 0x4b8 -#define MC_PCX_PTSA_MIN 0x4b0 -#define MC_APB_PTSA_MIN 0x4ec -#define MC_GK2_PTSA_MIN 0x614 -#define MC_PCX_PTSA_RATE 0x4ac -#define MC_RING1_PTSA_MAX 0x484 -#define MC_HDAPC_PTSA_RATE 0x628 -#define MC_MLL_MPCORER_PTSA_MIN 0x450 -#define MC_GK2_PTSA_MAX 0x618 -#define MC_AUD_PTSA_MAX 0x550 -#define MC_GK2_PTSA_RATE 0x610 -#define MC_ISP_PTSA_MAX 0x4a8 -#define MC_DISB_PTSA_RATE 0x428 -#define MC_VE2_PTSA_MAX 0x49c -#define MC_DFD_PTSA_MIN 0x638 -#define MC_FTOP_PTSA_RATE 0x50c -#define MC_A9AVPPC_PTSA_RATE 0x488 -#define MC_VE2_PTSA_MIN 0x498 -#define MC_USBX_PTSA_MAX 0x52c -#define MC_DIS_PTSA_RATE 0x41c -#define MC_USBD_PTSA_MAX 0x538 -#define MC_A9AVPPC_PTSA_MAX 0x490 -#define MC_USBX_PTSA_RATE 0x524 -#define MC_FTOP_PTSA_MAX 0x514 -#define MC_HDAPC_PTSA_MAX 0x630 -#define MC_SD_PTSA_RATE 0x4d0 -#define MC_DFD_PTSA_RATE 0x634 -#define MC_FTOP_PTSA_MIN 0x510 -#define MC_SDM_PTSA_RATE 0x61c -#define MC_AHB_PTSA_RATE 0x4dc -#define MC_SMMU_SMMU_PTSA_MAX 0x460 -#define MC_RING2_PTSA_MIN 0x444 -#define MC_SDM_PTSA_MIN 0x620 -#define MC_APB_PTSA_RATE 0x4e8 -#define MC_MSE_PTSA_MIN 0x4c8 -#define MC_HOST_PTSA_RATE 0x518 -#define MC_VE_PTSA_RATE 0x434 -#define MC_AHB_PTSA_MAX 0x4e4 -#define MC_SAX_PTSA_MIN 0x4bc -#define MC_SMMU_SMMU_PTSA_MIN 0x45c -#define MC_ISP_PTSA_MIN 0x4a4 -#define MC_HOST_PTSA_MAX 0x520 -#define MC_SAX_PTSA_MAX 0x4c0 -#define MC_VE_PTSA_MIN 0x438 -#define MC_GK_PTSA_MIN 0x540 -#define MC_MSE_PTSA_MAX 0x4cc -#define MC_DISB_PTSA_MAX 0x430 -#define MC_DISB_PTSA_MIN 0x42c -#define MC_SMMU_SMMU_PTSA_RATE 0x458 -#define MC_VE2_PTSA_RATE 0x494 -#define MC_GK_PTSA_RATE 0x53c -#define MC_PTSA_GRANT_DECREMENT 0x960 -#define MC_LATENCY_ALLOWANCE_AVPC_0 0x2e4 -#define MC_LATENCY_ALLOWANCE_AXIAP_0 0x3a0 -#define MC_LATENCY_ALLOWANCE_XUSB_1 0x380 -#define MC_LATENCY_ALLOWANCE_ISP2B_0 0x384 -#define MC_LATENCY_ALLOWANCE_SDMMCAA_0 0x3bc -#define MC_LATENCY_ALLOWANCE_SDMMCA_0 0x3b8 -#define MC_LATENCY_ALLOWANCE_ISP2_0 0x370 -#define MC_LATENCY_ALLOWANCE_SE_0 0x3e0 -#define MC_LATENCY_ALLOWANCE_ISP2_1 0x374 -#define MC_LATENCY_ALLOWANCE_DC_0 0x2e8 -#define MC_LATENCY_ALLOWANCE_VIC_0 0x394 -#define MC_LATENCY_ALLOWANCE_DCB_1 0x2f8 -#define MC_LATENCY_ALLOWANCE_NVDEC_0 0x3d8 -#define MC_LATENCY_ALLOWANCE_DCB_2 0x2fc -#define MC_LATENCY_ALLOWANCE_TSEC_0 0x390 -#define MC_LATENCY_ALLOWANCE_DC_2 0x2f0 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB 0x694 -#define MC_LATENCY_ALLOWANCE_PPCS_1 0x348 -#define MC_LATENCY_ALLOWANCE_XUSB_0 0x37c -#define MC_LATENCY_ALLOWANCE_PPCS_0 0x344 -#define MC_LATENCY_ALLOWANCE_TSECB_0 0x3f0 -#define MC_LATENCY_ALLOWANCE_AFI_0 0x2e0 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B 0x698 -#define MC_LATENCY_ALLOWANCE_DC_1 0x2ec -#define MC_LATENCY_ALLOWANCE_APE_0 0x3dc -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C 0x6a0 -#define MC_LATENCY_ALLOWANCE_A9AVP_0 0x3a4 -#define MC_LATENCY_ALLOWANCE_GPU2_0 0x3e8 -#define MC_LATENCY_ALLOWANCE_DCB_0 0x2f4 -#define MC_LATENCY_ALLOWANCE_HC_1 0x314 -#define MC_LATENCY_ALLOWANCE_SDMMC_0 0x3c0 -#define MC_LATENCY_ALLOWANCE_NVJPG_0 0x3e4 -#define MC_LATENCY_ALLOWANCE_PTC_0 0x34c -#define MC_LATENCY_ALLOWANCE_ETR_0 0x3ec -#define MC_LATENCY_ALLOWANCE_MPCORE_0 0x320 -#define MC_LATENCY_ALLOWANCE_VI2_0 0x398 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB 0x69c -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB 0x6a4 -#define MC_LATENCY_ALLOWANCE_SATA_0 0x350 -#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A 0x690 -#define MC_LATENCY_ALLOWANCE_HC_0 0x310 -#define MC_LATENCY_ALLOWANCE_DC_3 0x3c8 -#define MC_LATENCY_ALLOWANCE_GPU_0 0x3ac -#define MC_LATENCY_ALLOWANCE_SDMMCAB_0 0x3c4 -#define MC_LATENCY_ALLOWANCE_ISP2B_1 0x388 -#define MC_LATENCY_ALLOWANCE_NVENC_0 0x328 -#define MC_LATENCY_ALLOWANCE_HDA_0 0x318 -#define MC_MIN_LENGTH_APE_0 0xb34 -#define MC_MIN_LENGTH_DCB_2 0x8a8 -#define MC_MIN_LENGTH_A9AVP_0 0x950 -#define MC_MIN_LENGTH_TSEC_0 0x93c -#define MC_MIN_LENGTH_DC_1 0x898 -#define MC_MIN_LENGTH_AXIAP_0 0x94c -#define MC_MIN_LENGTH_ISP2B_0 0x930 -#define MC_MIN_LENGTH_VI2_0 0x944 -#define MC_MIN_LENGTH_DCB_0 0x8a0 -#define MC_MIN_LENGTH_DCB_1 0x8a4 -#define MC_MIN_LENGTH_PPCS_1 0x8f4 -#define MC_MIN_LENGTH_NVJPG_0 0xb3c -#define MC_MIN_LENGTH_HDA_0 0x8c4 -#define MC_MIN_LENGTH_NVENC_0 0x8d4 -#define MC_MIN_LENGTH_SDMMC_0 0xb18 -#define MC_MIN_LENGTH_ISP2B_1 0x934 -#define MC_MIN_LENGTH_HC_1 0x8c0 -#define MC_MIN_LENGTH_DC_3 0xb20 -#define MC_MIN_LENGTH_AVPC_0 0x890 -#define MC_MIN_LENGTH_VIC_0 0x940 -#define MC_MIN_LENGTH_ISP2_0 0x91c -#define MC_MIN_LENGTH_HC_0 0x8bc -#define MC_MIN_LENGTH_SE_0 0xb38 -#define MC_MIN_LENGTH_NVDEC_0 0xb30 -#define MC_MIN_LENGTH_SATA_0 0x8fc -#define MC_MIN_LENGTH_DC_0 0x894 -#define MC_MIN_LENGTH_XUSB_1 0x92c -#define MC_MIN_LENGTH_DC_2 0x89c -#define MC_MIN_LENGTH_SDMMCAA_0 0xb14 -#define MC_MIN_LENGTH_GPU_0 0xb04 -#define MC_MIN_LENGTH_ETR_0 0xb44 -#define MC_MIN_LENGTH_AFI_0 0x88c -#define MC_MIN_LENGTH_PPCS_0 0x8f0 -#define MC_MIN_LENGTH_ISP2_1 0x920 -#define MC_MIN_LENGTH_XUSB_0 0x928 -#define MC_MIN_LENGTH_MPCORE_0 0x8cc -#define MC_MIN_LENGTH_TSECB_0 0xb48 -#define MC_MIN_LENGTH_SDMMCA_0 0xb10 -#define MC_MIN_LENGTH_GPU2_0 0xb40 -#define MC_MIN_LENGTH_SDMMCAB_0 0xb1c -#define MC_MIN_LENGTH_PTC_0 0x8f8 -#define MC_EMEM_ARB_OVERRIDE_1 0x968 -#define MC_VIDEO_PROTECT_GPU_OVERRIDE_0 0x984 -#define MC_VIDEO_PROTECT_GPU_OVERRIDE_1 0x988 -#define MC_EMEM_ARB_STATS_0 0x990 -#define MC_EMEM_ARB_STATS_1 0x994 -#define MC_MTS_CARVEOUT_BOM 0x9a0 -#define MC_MTS_CARVEOUT_SIZE_MB 0x9a4 -#define MC_MTS_CARVEOUT_ADR_HI 0x9a8 -#define MC_MTS_CARVEOUT_REG_CTRL 0x9ac -#define MC_ERR_MTS_STATUS 0x9b0 -#define MC_ERR_MTS_ADR 0x9b4 -#define MC_ERR_GENERALIZED_CARVEOUT_STATUS 0xc00 -#define MC_ERR_GENERALIZED_CARVEOUT_ADR 0xc04 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 0xd74 -#define MC_SECURITY_CARVEOUT4_CFG0 0xcf8 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 0xd10 -#define MC_SECURITY_CARVEOUT4_SIZE_128KB 0xd04 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 0xc28 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 0xc30 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 0xc8c -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 0xd1c -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 0xd70 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 0xc2c -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 0xd7c -#define MC_SECURITY_CARVEOUT3_SIZE_128KB 0xcb4 -#define MC_SECURITY_CARVEOUT2_CFG0 0xc58 -#define MC_SECURITY_CARVEOUT1_CFG0 0xc08 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 0xc84 -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 0xc68 -#define MC_SECURITY_CARVEOUT3_BOM 0xcac -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 0xc70 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 0xd78 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 0xc7c -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 0xd18 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 0xcbc -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 0xc38 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 0xc34 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 0xcc0 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 0xd60 -#define MC_SECURITY_CARVEOUT3_CFG0 0xca8 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 0xcb8 -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 0xc88 -#define MC_SECURITY_CARVEOUT2_SIZE_128KB 0xc64 -#define MC_SECURITY_CARVEOUT5_BOM_HI 0xd50 -#define MC_SECURITY_CARVEOUT1_SIZE_128KB 0xc14 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 0xd14 -#define MC_SECURITY_CARVEOUT1_BOM 0xc0c -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 0xd2c -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 0xd68 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 0xcc8 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 0xd58 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 0xd24 -#define MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 0xcc4 -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 0xc78 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 0xc1c -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 0xc18 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 0xd28 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 0xd5c -#define MC_SECURITY_CARVEOUT3_BOM_HI 0xcb0 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 0xcd8 -#define MC_SECURITY_CARVEOUT2_BOM_HI 0xc60 -#define MC_SECURITY_CARVEOUT4_BOM_HI 0xd00 -#define MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 0xd64 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 0xcdc -#define MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 0xc80 -#define MC_SECURITY_CARVEOUT5_SIZE_128KB 0xd54 -#define MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 0xd20 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 0xcd4 -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 0xd0c -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 0xc74 -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 0xccc -#define MC_SECURITY_CARVEOUT4_BOM 0xcfc -#define MC_SECURITY_CARVEOUT5_CFG0 0xd48 -#define MC_SECURITY_CARVEOUT2_BOM 0xc5c -#define MC_SECURITY_CARVEOUT5_BOM 0xd4c -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 0xc24 -#define MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 0xd6c -#define MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 0xcd0 -#define MC_SECURITY_CARVEOUT1_BOM_HI 0xc10 -#define MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 0xc20 -#define MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 0xc3c -#define MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 0xc6c -#define MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 0xd08 -#define MC_ERR_APB_ASID_UPDATE_STATUS 0x9d0 -#define MC_DA_CONFIG0 0x9dc -#define MC_UNTRANSLATED_REGION_CHECK 0x948 - -/* Memory Controller clients */ -#define CLIENT_ACCESS_NUM_CLIENTS 32 -typedef enum { - /* _ACCESS0 */ - CSR_PTCR = (0 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0A = (1 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0AB = (2 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0B = (3 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0BB = (4 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0C = (5 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAY0CB = (6 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_AFIR = (14 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_AVPCARM7R = (15 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAYHC = (16 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_DISPLAYHCB = (17 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HDAR = (21 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HOST1XDMAR = (22 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_HOST1XR = (23 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_NVENCSRD = (28 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_PPCSAHBDMAR = (29 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_PPCSAHBSLVR = (30 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - CSR_SATAR = (31 - (CLIENT_ACCESS_NUM_CLIENTS * 0)), - - /* _ACCESS1 */ - CSR_VDEBSEVR = (34 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDEMBER = (35 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDEMCER = (36 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_VDETPER = (37 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_MPCORELPR = (38 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSR_MPCORER = (39 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_NVENCSWR = (43 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_AFIW = (49 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_AVPCARM7W = (50 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_HDAW = (53 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_HOST1XW = (54 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_MPCORELPW = (56 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_MPCOREW = (57 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_PPCSAHBDMAW = (59 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_PPCSAHBSLVW = (60 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_SATAW = (61 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_VDEBSEVW = (62 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - CSW_VDEDBGW = (63 - (CLIENT_ACCESS_NUM_CLIENTS * 1)), - - /* _ACCESS2 */ - CSW_VDEMBEW = (64 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_VDETPMW = (65 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_ISPRA = (68 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWA = (70 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWB = (71 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_XUSB_HOSTR = (74 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_XUSB_HOSTW = (75 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_XUSB_DEVR = (76 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_XUSB_DEVW = (77 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_ISPRAB = (78 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWAB = (80 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_ISPWBB = (81 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_TSECSRD = (84 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_TSECSWR = (85 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_A9AVPSCR = (86 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_A9AVPSCW = (87 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_GPUSRD = (88 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSW_GPUSWR = (89 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - CSR_DISPLAYT = (90 - (CLIENT_ACCESS_NUM_CLIENTS * 2)), - - /* _ACCESS3 */ - CSR_SDMMCRA = (96 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCRAA = (97 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCR = (98 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_SDMMCRAB = (99 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWA = (100 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWAA = (101 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCW = (102 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_SDMMCWAB = (103 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_VICSRD = (108 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_VICSWR = (109 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_VIW = (114 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_DISPLAYD = (115 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_NVDECSRD = (120 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_NVDECSWR = (121 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_APER = (122 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_APEW = (123 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSR_NVJPGSRD = (126 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - CSW_NVJPGSWR = (127 - (CLIENT_ACCESS_NUM_CLIENTS * 3)), - - /* _ACCESS4 */ - CSR_SESRD = (128 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_SESWR = (129 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_AXIAPR = (130 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_AXIAPW = (131 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_ETRR = (132 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_ETRW = (133 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_TSECSRDB = (134 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_TSECSWRB = (135 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSR_GPUSRD2 = (136 - (CLIENT_ACCESS_NUM_CLIENTS * 4)), - CSW_GPUSWR2 = (137 - (CLIENT_ACCESS_NUM_CLIENTS * 4)) -} McClient; - -void mc_config_tsec_carveout(uint32_t bom, uint32_t size1mb, bool lock); -void mc_config_carveout(); -void mc_config_carveout_finalize(); -void mc_enable_ahb_redirect(); -void mc_disable_ahb_redirect(); -void mc_enable(); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mtc/mtc.c b/fusee/fusee-secondary/src/mtc/mtc.c deleted file mode 100644 index dc7cb6c06..000000000 --- a/fusee/fusee-secondary/src/mtc/mtc.c +++ /dev/null @@ -1,3750 +0,0 @@ -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "mtc.h" -#include "mtc_b01.h" -#include "mtc_tables.h" -#include "../car.h" -#include "../fuse.h" -#include "../timers.h" -#include "../../../../fusee/common/log.h" - -/* - * Macros. - */ -#define max(x, y) ({ \ - typeof(x) _max1 = (x); \ - typeof(y) _max2 = (y); \ - (void) (&_max1 == &_max2); \ - _max1 > _max2 ? _max1 : _max2; }) - -#define max_t(type, x, y) ({ \ - type __max1 = (x); \ - type __max2 = (y); \ - __max1 > __max2 ? __max1: __max2; }) - -#define TRIM_REG(chan, rank, reg, byte) \ - ((EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \ - _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte ## _MASK & \ - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## \ - rank ## _ ## reg ## _INDEX]) >> \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \ - _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte ## _SHIFT) \ - + \ - (((EMC_DATA_BRLSHFT_ ## rank ## _RANK ## rank ## _BYTE ## \ - byte ## _DATA_BRLSHFT_MASK & \ - next_timing->trim_perch_regs[REG_EMC ## chan ## \ - _EMC_DATA_BRLSHFT_ ## rank ## _INDEX]) >> \ - EMC_DATA_BRLSHFT_ ## rank ## _RANK ## rank ## _BYTE ## \ - byte ## _DATA_BRLSHFT_SHIFT) * 64) - -#define CALC_TEMP(rank, reg, byte1, byte2, n) \ - ((new[n] << EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## \ - reg ## _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte1 ## _SHIFT) & \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \ - _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte1 ## _MASK) \ - | \ - ((new[n + 1] << EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## \ - reg ## _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte2 ## _SHIFT) & \ - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK ## rank ## _ ## reg ## \ - _OB_DDLL_LONG_DQ_RANK ## rank ## _BYTE ## byte2 ## _MASK) \ - -/* - * PTFV defines - basically just indexes into the per table PTFV array. - */ -#define PTFV_DQSOSC_MOVAVG_C0D0U0_INDEX 0 -#define PTFV_DQSOSC_MOVAVG_C0D0U1_INDEX 1 -#define PTFV_DQSOSC_MOVAVG_C0D1U0_INDEX 2 -#define PTFV_DQSOSC_MOVAVG_C0D1U1_INDEX 3 -#define PTFV_DQSOSC_MOVAVG_C1D0U0_INDEX 4 -#define PTFV_DQSOSC_MOVAVG_C1D0U1_INDEX 5 -#define PTFV_DQSOSC_MOVAVG_C1D1U0_INDEX 6 -#define PTFV_DQSOSC_MOVAVG_C1D1U1_INDEX 7 -#define PTFV_WRITE_SAMPLES_INDEX 8 -#define PTFV_DVFS_SAMPLES_INDEX 9 -#define PTFV_MOVAVG_WEIGHT_INDEX 10 -#define PTFV_CONFIG_CTRL_INDEX 11 - -#define PTFV_CONFIG_CTRL_USE_PREVIOUS_EMA (1 << 0) - -/* - * Do arithmetic in fixed point. - */ -#define MOVAVG_PRECISION_FACTOR 100 - -/* - * The division portion of the average operation. - */ -#define __AVERAGE_PTFV(dev) \ - ({ next_timing->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] = \ - next_timing->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] / \ - next_timing->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; }) - -/* - * The division portion of the average write operation. - */ -#define __AVERAGE_WRITE_PTFV(dev) \ - ({ next_timing->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] = \ - next_timing->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] / \ - next_timing->ptfv_list[PTFV_WRITE_SAMPLES_INDEX]; }) - -/* - * Convert val to fixed point and add it to the temporary average. - */ -#define __INCREMENT_PTFV(dev, val) \ - ({ next_timing->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] += \ - ((val) * MOVAVG_PRECISION_FACTOR); }) - -/* - * Convert a moving average back to integral form and return the value. - */ -#define __MOVAVG_AC(timing, dev) \ - ((timing)->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX] / \ - MOVAVG_PRECISION_FACTOR) - -/* Weighted update. */ -#define __WEIGHTED_UPDATE_PTFV(dev, nval) \ - do { \ - int w = PTFV_MOVAVG_WEIGHT_INDEX; \ - int dqs = PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX; \ - \ - next_timing->ptfv_list[dqs] = \ - ((nval * MOVAVG_PRECISION_FACTOR) + \ - (next_timing->ptfv_list[dqs] * \ - next_timing->ptfv_list[w])) / \ - (next_timing->ptfv_list[w] + 1); \ - } while (0) - -/* Access a particular average. */ -#define __MOVAVG(timing, dev) \ - ((timing)->ptfv_list[PTFV_DQSOSC_MOVAVG_ ## dev ## _INDEX]) - -static int g_active_timing_table_idx = -1; -static bool g_is_pllmb = false; -static bool g_fsp_for_next_freq = false; -static bool g_write_training_pattern = true; - -#define DEFINE_REG(type, reg) (reg) -static const uint32_t burst_regs_per_ch_off[] = BURST_REGS_PER_CH_LIST; -static const uint32_t burst_regs_off[] = BURST_REGS_LIST; -static const uint32_t trim_regs_per_ch_off[] = TRIM_REGS_PER_CH_LIST; -static const uint32_t trim_regs_off[] = TRIM_REGS_LIST; -static const uint32_t vref_regs_per_ch_off[] = VREF_REGS_PER_CH_LIST; -static const uint32_t training_mod_regs_per_ch_off[] = TRAINING_MOD_REGS_PER_CH_LIST; -static const uint32_t burst_mc_regs_off[] = BURST_MC_REGS_LIST; -static const uint32_t la_scale_regs_off[] = BURST_UP_DOWN_REGS_LIST; -#undef DEFINE_REG - -#define DEFINE_REG(type, reg) (type) -static const uint32_t burst_regs_per_ch_type[] = BURST_REGS_PER_CH_LIST; -static const uint32_t trim_regs_per_ch_type[] = TRIM_REGS_PER_CH_LIST; -static const uint32_t vref_regs_per_ch_type[] = VREF_REGS_PER_CH_LIST; -static const uint32_t training_mod_regs_per_ch_type[] = TRAINING_MOD_REGS_PER_CH_LIST; -#undef DEFINE_REG - -static const uint32_t g_ram_pattern_dq[0x500] = { - 0x18181818, 0x61616161, 0x85858585, 0x14141414, 0x51515151, - 0x47474747, 0x1E1E1E1E, 0x79797979, 0xE5E5E5E5, 0x94949494, - 0x51515151, 0x46464646, 0x19191919, 0x67676767, 0x9C9C9C9C, - 0x71717171, 0xC5C5C5C5, 0x17171717, 0x5F5F5F5F, 0x7E7E7E7E, - 0xFBFBFBFB, 0xEDEDEDED, 0xB4B4B4B4, 0xD2D2D2D2, 0x48484848, - 0x21212121, 0x85858585, 0x16161616, 0x59595959, 0x66666666, - 0x9A9A9A9A, 0x69696969, 0xA4A4A4A4, 0x93939393, 0x4F4F4F4F, - 0x3F3F3F3F, 0xFCFCFCFC, 0xF3F3F3F3, 0xCDCDCDCD, 0x37373737, - 0xDCDCDCDC, 0x70707070, 0xC3C3C3C3, 0x0F0F0F0F, 0x3E3E3E3E, - 0xFAFAFAFA, 0xEBEBEBEB, 0xACACACAC, 0xB3B3B3B3, 0xCCCCCCCC, - 0x31313131, 0xC5C5C5C5, 0x15151515, 0x57575757, 0x5F5F5F5F, - 0x7F7F7F7F, 0xFDFDFDFD, 0xF4F4F4F4, 0xD0D0D0D0, 0x42424242, - 0x08080808, 0x23232323, 0x8F8F8F8F, 0x3F3F3F3F, 0x18181818, - 0x61616161, 0x85858585, 0x14141414, 0x51515151, 0x47474747, - 0x1E1E1E1E, 0x79797979, 0xE5E5E5E5, 0x94949494, 0x51515151, - 0x46464646, 0x19191919, 0x67676767, 0x9C9C9C9C, 0x71717171, - 0xC5C5C5C5, 0x17171717, 0x5F5F5F5F, 0x7E7E7E7E, 0xFBFBFBFB, - 0xEDEDEDED, 0xB4B4B4B4, 0xD2D2D2D2, 0x48484848, 0x21212121, - 0x85858585, 0x16161616, 0x59595959, 0x66666666, 0x9A9A9A9A, - 0x69696969, 0xA4A4A4A4, 0x93939393, 0x4F4F4F4F, 0x3F3F3F3F, - 0xFCFCFCFC, 0xF3F3F3F3, 0xCDCDCDCD, 0x37373737, 0xDCDCDCDC, - 0x70707070, 0xC3C3C3C3, 0x0F0F0F0F, 0x3E3E3E3E, 0xFAFAFAFA, - 0xEBEBEBEB, 0xACACACAC, 0xB3B3B3B3, 0xCCCCCCCC, 0x31313131, - 0xC5C5C5C5, 0x15151515, 0x57575757, 0x5F5F5F5F, 0x7F7F7F7F, - 0xFDFDFDFD, 0xF4F4F4F4, 0xD0D0D0D0, 0x42424242, 0x08080808, - 0x23232323, 0x8F8F8F8F, 0x3F3F3F3F, 0x06060606, 0x18181818, - 0x21212121, 0x05050505, 0x14141414, 0x11111111, 0x07070707, - 0x1E1E1E1E, 0x39393939, 0x25252525, 0x14141414, 0x11111111, - 0x06060606, 0x19191919, 0x27272727, 0x1C1C1C1C, 0x31313131, - 0x05050505, 0x17171717, 0x1F1F1F1F, 0x3E3E3E3E, 0x3B3B3B3B, - 0x2D2D2D2D, 0x34343434, 0x12121212, 0x08080808, 0x21212121, - 0x05050505, 0x16161616, 0x19191919, 0x26262626, 0x1A1A1A1A, - 0x29292929, 0x24242424, 0x13131313, 0x0F0F0F0F, 0x3F3F3F3F, - 0x3C3C3C3C, 0x33333333, 0x0D0D0D0D, 0x37373737, 0x1C1C1C1C, - 0x30303030, 0x03030303, 0x0F0F0F0F, 0x3E3E3E3E, 0x3A3A3A3A, - 0x2B2B2B2B, 0x2C2C2C2C, 0x33333333, 0x0C0C0C0C, 0x31313131, - 0x05050505, 0x15151515, 0x17171717, 0x1F1F1F1F, 0x3F3F3F3F, - 0x3D3D3D3D, 0x34343434, 0x10101010, 0x02020202, 0x08080808, - 0x23232323, 0x0F0F0F0F, 0x06060606, 0x18181818, 0x21212121, - 0x05050505, 0x14141414, 0x11111111, 0x07070707, 0x1E1E1E1E, - 0x39393939, 0x25252525, 0x14141414, 0x11111111, 0x06060606, - 0x19191919, 0x27272727, 0x1C1C1C1C, 0x31313131, 0x05050505, - 0x17171717, 0x1F1F1F1F, 0x3E3E3E3E, 0x3B3B3B3B, 0x2D2D2D2D, - 0x34343434, 0x12121212, 0x08080808, 0x21212121, 0x05050505, - 0x16161616, 0x19191919, 0x26262626, 0x1A1A1A1A, 0x29292929, - 0x24242424, 0x13131313, 0x0F0F0F0F, 0x3F3F3F3F, 0x3C3C3C3C, - 0x33333333, 0x0D0D0D0D, 0x37373737, 0x1C1C1C1C, 0x30303030, - 0x03030303, 0x0F0F0F0F, 0x3E3E3E3E, 0x3A3A3A3A, 0x2B2B2B2B, - 0x2C2C2C2C, 0x33333333, 0x0C0C0C0C, 0x31313131, 0x05050505, - 0x15151515, 0x17171717, 0x1F1F1F1F, 0x3F3F3F3F, 0x3D3D3D3D, - 0x34343434, 0x10101010, 0x02020202, 0x08080808, 0x23232323, - 0x0F0F0F0F, - - 0x00000000, 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0x00000000, 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x00000000, 0x3F3F3F3F, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x00000000, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x00000000, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, 0x3F3F3F3F, - 0x3F3F3F3F, 0x00000000, 0x00000000, 0x00000000, 0x3F3F3F3F, - 0x00000000, - - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, - 0x00000000, 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, - 0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, - 0x00000000, 0x3F3F3F3F, 0x00000000, 0x3F3F3F3F, 0x00000000, - 0x3F3F3F3F, - - 0x80808080, 0x00000000, 0x80808080, 0x00000000, 0x80808080, - 0x00000000, 0x80808080, 0x40404040, 0x00000000, 0x40404040, - 0x00000000, 0x40404040, 0x00000000, 0x40404040, 0x20202020, - 0x00000000, 0x20202020, 0x00000000, 0x20202020, 0x00000000, - 0x20202020, 0x10101010, 0x00000000, 0x10101010, 0x00000000, - 0x10101010, 0x00000000, 0x10101010, 0x08080808, 0x00000000, - 0x08080808, 0x00000000, 0x08080808, 0x00000000, 0x08080808, - 0x04040404, 0x00000000, 0x04040404, 0x00000000, 0x04040404, - 0x00000000, 0x04040404, 0x02020202, 0x00000000, 0x02020202, - 0x00000000, 0x02020202, 0x00000000, 0x02020202, 0x01010101, - 0x00000000, 0x01010101, 0x00000000, 0x01010101, 0x00000000, - 0x01010101, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80808080, - 0x00000000, 0x80808080, 0x00000000, 0x80808080, 0x00000000, - 0x80808080, 0x40404040, 0x00000000, 0x40404040, 0x00000000, - 0x40404040, 0x00000000, 0x40404040, 0x20202020, 0x00000000, - 0x20202020, 0x00000000, 0x20202020, 0x00000000, 0x20202020, - 0x10101010, 0x00000000, 0x10101010, 0x00000000, 0x10101010, - 0x00000000, 0x10101010, 0x08080808, 0x00000000, 0x08080808, - 0x00000000, 0x08080808, 0x00000000, 0x08080808, 0x04040404, - 0x00000000, 0x04040404, 0x00000000, 0x04040404, 0x00000000, - 0x04040404, 0x02020202, 0x00000000, 0x02020202, 0x00000000, - 0x02020202, 0x00000000, 0x02020202, 0x01010101, 0x00000000, - 0x01010101, 0x00000000, 0x01010101, 0x00000000, 0x01010101, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20202020, - 0x00000000, 0x20202020, 0x00000000, 0x20202020, 0x00000000, - 0x20202020, 0x00000000, 0x20202020, 0x00000000, 0x10101010, - 0x00000000, 0x10101010, 0x00000000, 0x10101010, 0x00000000, - 0x10101010, 0x00000000, 0x10101010, 0x00000000, 0x08080808, - 0x00000000, 0x08080808, 0x00000000, 0x08080808, 0x00000000, - 0x08080808, 0x00000000, 0x08080808, 0x00000000, 0x04040404, - 0x00000000, 0x04040404, 0x00000000, 0x04040404, 0x00000000, - 0x04040404, 0x00000000, 0x04040404, 0x00000000, 0x02020202, - 0x00000000, 0x02020202, 0x00000000, 0x02020202, 0x00000000, - 0x02020202, 0x00000000, 0x02020202, 0x00000000, 0x01010101, - 0x00000000, 0x01010101, 0x00000000, 0x01010101, 0x00000000, - 0x01010101, 0x00000000, 0x01010101, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x20202020, 0x00000000, - 0x20202020, 0x00000000, 0x20202020, 0x00000000, 0x20202020, - 0x00000000, 0x20202020, 0x00000000, 0x10101010, 0x00000000, - 0x10101010, 0x00000000, 0x10101010, 0x00000000, 0x10101010, - 0x00000000, 0x10101010, 0x00000000, 0x08080808, 0x00000000, - 0x08080808, 0x00000000, 0x08080808, 0x00000000, 0x08080808, - 0x00000000, 0x08080808, 0x00000000, 0x04040404, 0x00000000, - 0x04040404, 0x00000000, 0x04040404, 0x00000000, 0x04040404, - 0x00000000, 0x04040404, 0x00000000, 0x02020202, 0x00000000, - 0x02020202, 0x00000000, 0x02020202, 0x00000000, 0x02020202, - 0x00000000, 0x02020202, 0x00000000, 0x01010101, 0x00000000, - 0x01010101, 0x00000000, 0x01010101, 0x00000000, 0x01010101, - 0x00000000, 0x01010101, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, - - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, - 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, - 0x55555555, 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, - 0xCCCCCCCC, 0x33333333, 0xAAAAAAAA, 0x55555555, 0xCCCCCCCC, - 0x33333333 -}; - -static const uint32_t g_ram_pattern_dmi[0x500] = { - 0xF, 0xF, 0x0, 0xF, 0xF, 0x0, 0xF, 0xF, - 0x0, 0xF, 0x0, 0xF, 0xF, 0x0, 0xF, 0xF, - 0xF, 0xF, 0x0, 0xF, 0xF, 0x0, 0x0, 0x0, - 0xF, 0xF, 0x0, 0xF, 0x0, 0x0, 0xF, 0x0, - 0xF, 0xF, 0xF, 0x0, 0xF, 0xF, 0xF, 0x0, - 0x0, 0xF, 0xF, 0x0, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, - 0x0, 0x0, 0x0, 0x0, 0xF, 0xF, 0xF, 0x0, - 0xF, 0xF, 0x0, 0xF, 0xF, 0x0, 0xF, 0xF, - 0x0, 0xF, 0x0, 0xF, 0xF, 0x0, 0xF, 0xF, - 0xF, 0xF, 0x0, 0xF, 0xF, 0x0, 0x0, 0x0, - 0xF, 0xF, 0x0, 0xF, 0x0, 0x0, 0xF, 0x0, - 0xF, 0xF, 0xF, 0x0, 0xF, 0xF, 0xF, 0x0, - 0x0, 0xF, 0xF, 0x0, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, - 0x0, 0x0, 0x0, 0x0, 0xF, 0xF, 0xF, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - - 0x0, 0x0, 0xF, 0x0, 0x0, 0x0, 0x0, 0x0, - 0xF, 0xF, 0x0, 0x0, 0x0, 0x0, 0xF, 0x0, - 0xF, 0x0, 0x0, 0x0, 0xF, 0xF, 0xF, 0xF, - 0x0, 0x0, 0xF, 0x0, 0x0, 0x0, 0xF, 0x0, - 0xF, 0xF, 0x0, 0x0, 0xF, 0xF, 0xF, 0x0, - 0xF, 0x0, 0xF, 0x0, 0x0, 0xF, 0xF, 0xF, - 0xF, 0xF, 0x0, 0xF, 0x0, 0x0, 0x0, 0x0, - 0xF, 0xF, 0xF, 0x0, 0x0, 0x0, 0xF, 0x0, - 0x0, 0x0, 0xF, 0x0, 0x0, 0x0, 0x0, 0x0, - 0xF, 0xF, 0x0, 0x0, 0x0, 0x0, 0xF, 0x0, - 0xF, 0x0, 0x0, 0x0, 0xF, 0xF, 0xF, 0xF, - 0x0, 0x0, 0xF, 0x0, 0x0, 0x0, 0xF, 0x0, - 0xF, 0xF, 0x0, 0x0, 0xF, 0xF, 0xF, 0x0, - 0xF, 0x0, 0xF, 0x0, 0x0, 0xF, 0xF, 0xF, - 0xF, 0xF, 0x0, 0xF, 0x0, 0x0, 0x0, 0x0, - 0xF, 0xF, 0xF, 0x0, 0x0, 0x0, 0xF, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, 0xF, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, - - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3, - 0xA, 0x5, 0xC, 0x3, 0xA, 0x5, 0xC, 0x3 -}; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -/* Register read/write helpers. */ -static inline void emc_write(uint32_t val, uint32_t offset) { - MAKE_EMC_REG(offset) = val; -} - -static inline uint32_t emc_read(uint32_t offset) { - return MAKE_EMC_REG(offset); -} - -static inline void emc0_write(uint32_t val, uint32_t offset) { - MAKE_EMC0_REG(offset) = val; -} - -static inline uint32_t emc0_read(uint32_t offset) { - return MAKE_EMC0_REG(offset); -} - -static inline void emc1_write(uint32_t val, uint32_t offset) { - MAKE_EMC1_REG(offset) = val; -} - -static inline uint32_t emc1_read(uint32_t offset) { - return MAKE_EMC1_REG(offset); -} - -static inline void emc_write_per_ch(uint32_t val, int type, uint32_t offset) { - switch (type) { - case REG_EMC: - emc_write(val, offset); - break; - case REG_EMC0: - emc0_write(val, offset); - break; - case REG_EMC1: - emc1_write(val, offset); - break; - } -} - -static inline uint32_t emc_read_per_ch(int type, uint32_t offset) { - uint32_t val = 0; - switch (type) { - case REG_EMC: - val = emc_read(offset); - break; - case REG_EMC0: - val = emc0_read(offset); - break; - case REG_EMC1: - val = emc1_read(offset); - break; - } - return val; -} - -static inline void mc_write(uint32_t val, uint32_t offset) { - MAKE_MC_REG(offset) = val; -} - -static inline uint32_t mc_read(uint32_t offset) { - return MAKE_MC_REG(offset); -} - -/* Configure clock change sequence FIFO */ -static void ccfifo_write(uint32_t ccfifo_addr, uint32_t ccfifo_data, uint32_t ccfifo_stall_cnt) { - MAKE_EMC_REG(EMC_CCFIFO_DATA) = ccfifo_data; - MAKE_EMC_REG(EMC_CCFIFO_ADDR) = ((ccfifo_addr & 0xFFFF) | ((ccfifo_stall_cnt & 0x7FFF) << 16) | 0x80000000); -} - -static void start_periodic_compensation() { - uint32_t mpc_req = 0x4B; - - /* Write to EMC_MPC_0. */ - emc_write(mpc_req, EMC_MPC); - - /* Dummy read. */ - mpc_req = emc_read(EMC_MPC); -} - -static uint32_t actual_osc_clocks(uint32_t in) { - if (in < 0x40) - return in * 16; - else if (in < 0x80) - return 2048; - else if (in < 0xc0) - return 4096; - else - return 8192; -} - -static void emc_set_shadow_bypass(int set) { - uint32_t emc_dbg = emc_read(EMC_DBG); - - if (set) - emc_write(emc_dbg | EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); - else - emc_write(emc_dbg & ~EMC_DBG_WRITE_MUX_ACTIVE, EMC_DBG); -} - -static uint32_t wait_for_update(uint32_t status_reg, uint32_t bit_mask, bool updated_state, int chan) { - for (int i = 0; i < EMC_STATUS_UPDATE_TIMEOUT; i++) { - if (chan == REG_EMC) { - if (((emc_read_per_ch(REG_EMC, status_reg) & bit_mask) != 0) == updated_state) - return 0; - } else { - if (((emc_read_per_ch(REG_EMC1, status_reg) & bit_mask) != 0) == updated_state) - return 0; - } - - udelay(1); - } - - /* Timeout. */ - return 4; -} - -static void emc_timing_update(bool dual_chan) { - /* Trigger the timing update event. */ - emc_write(0x1, EMC_TIMING_CONTROL); - - /* Wait for the update to finish. */ - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_TIMING_UPDATE_STALLED, false, REG_EMC); - if (dual_chan) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_TIMING_UPDATE_STALLED, false, REG_EMC1); -} - -static uint32_t get_dll_state(tegra_emc_timing_t *next_timing) { - bool next_dll_enabled = !(next_timing->emc_emrs & 0x1); - if (next_dll_enabled) - return DLL_ON; - else - return DLL_OFF; -} - -static uint32_t div_o3(uint32_t a, uint32_t b) { - uint32_t result = a / b; - - if ((b * result) < a) - return result + 1; - else - return result; -} - -static uint32_t dvfs_power_ramp_down(bool flip_backward, tegra_emc_timing_t* current_timing, tegra_emc_timing_t* next_timing, uint32_t clk) { - uint32_t ramp_down_wait = 0; - uint32_t seq_wait = 0; - uint32_t pmacro_cmd_pad = 0; - uint32_t pmacro_dq_pad = 0; - uint32_t pmacro_cfg5 = 0; - uint32_t pmacro_rfu1 = 0; - uint32_t pmacro_common_tx = 0; - - if (flip_backward) { - pmacro_cmd_pad = next_timing->burst_regs[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = next_timing->burst_regs[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = next_timing->burst_regs[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = next_timing->burst_regs[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } else { - pmacro_cmd_pad = current_timing->burst_regs[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = ((next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & 0x101) | current_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]); - pmacro_rfu1 = current_timing->burst_regs[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = current_timing->burst_regs[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = current_timing->burst_regs[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } - - pmacro_cmd_pad |= EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON; - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, 0); - ccfifo_write(EMC_FBIO_CFG5, pmacro_cfg5 | EMC_FBIO_CFG5_CMD_TX_DIS, 12); - - ramp_down_wait = clk * 12; - seq_wait = (100000 / clk) + 1; - - if (clk < (1000000 / DVFS_FGCG_HIGH_SPEED_THRESHOLD)) { - if (clk < (1000000 / IOBRICK_DCC_THRESHOLD)) { - pmacro_cmd_pad &= ~(EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC); - pmacro_cmd_pad |= EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC; - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, seq_wait); - ramp_down_wait += 100000; - - pmacro_dq_pad &= ~(EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC); - pmacro_dq_pad |= EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC; - - ccfifo_write(EMC_PMACRO_DATA_PAD_TX_CTRL, pmacro_dq_pad, 0); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x01120112, 0); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x01120112, seq_wait); - ramp_down_wait += 100000; - } - - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x01bf01bf, seq_wait); - ramp_down_wait += 100000; - - if (clk < (1000000 / IOBRICK_DCC_THRESHOLD)) { - pmacro_cmd_pad &= ~(EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, seq_wait); - ramp_down_wait += 100000; - - pmacro_dq_pad &= ~(EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_DATA_PAD_TX_CTRL, pmacro_dq_pad, 0); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x07ff07ff, 0); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x07ff07ff, seq_wait); - ramp_down_wait += 100000; - } - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & ~0x07ff07ff, seq_wait + 19); - ramp_down_wait += (100000 + (20 * clk)); - } - - if (clk < (1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD)) { - ramp_down_wait += 100000; - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx & ~0x5, seq_wait); - ramp_down_wait += 100000; - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx & ~0xf, seq_wait); - ramp_down_wait += 100000; - ccfifo_write(0, 0, seq_wait); - ramp_down_wait += 100000; - } else { - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx & ~0xf, seq_wait); - } - - return ramp_down_wait; -} - -static uint32_t dvfs_power_ramp_up(bool flip_backward, tegra_emc_timing_t* current_timing, tegra_emc_timing_t* next_timing, uint32_t training, uint32_t clk) { - uint32_t ramp_up_wait = 0; - uint32_t pmacro_cmd_pad = 0; - uint32_t pmacro_dq_pad = 0; - uint32_t pmacro_cfg5 = 0; - uint32_t pmacro_rfu1 = 0; - uint32_t pmacro_common_tx = 0; - - if (flip_backward) { - pmacro_cmd_pad = current_timing->burst_regs[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = current_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = current_timing->burst_regs[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = current_timing->burst_regs[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = current_timing->burst_regs[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } else if (training & 3) { - pmacro_cmd_pad = next_timing->shadow_regs_ca_train[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = next_timing->shadow_regs_ca_train[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = next_timing->shadow_regs_ca_train[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = next_timing->shadow_regs_ca_train[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = next_timing->shadow_regs_ca_train[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } else if (training & 0xC) { - pmacro_cmd_pad = next_timing->shadow_regs_quse_train[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = next_timing->shadow_regs_quse_train[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = next_timing->shadow_regs_quse_train[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = next_timing->shadow_regs_quse_train[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = next_timing->shadow_regs_quse_train[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } else if (training & 0xF0) { - pmacro_cmd_pad = next_timing->shadow_regs_rdwr_train[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = next_timing->shadow_regs_rdwr_train[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = next_timing->shadow_regs_rdwr_train[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = next_timing->shadow_regs_rdwr_train[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = next_timing->shadow_regs_rdwr_train[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } else { - pmacro_cmd_pad = next_timing->burst_regs[EMC_PMACRO_CMD_PAD_TX_CTRL_INDEX]; - pmacro_dq_pad = next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - pmacro_rfu1 = next_timing->burst_regs[EMC_PMACRO_BRICK_CTRL_RFU1_INDEX]; - pmacro_cfg5 = next_timing->burst_regs[EMC_FBIO_CFG5_INDEX]; - pmacro_common_tx = next_timing->burst_regs[EMC_PMACRO_COMMON_PAD_TX_CTRL_INDEX]; - } - - pmacro_cmd_pad |= EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON; - - if (clk < 1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD) { - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx & 0xa, 0); - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx & 0xf, (100000 / clk) + 1); - ramp_up_wait += 100000; - } else { - ccfifo_write(EMC_PMACRO_COMMON_PAD_TX_CTRL, pmacro_common_tx | 0x8, 0); - } - - if (clk < 1000000 / DVFS_FGCG_HIGH_SPEED_THRESHOLD) { - if (clk < 1000000 / IOBRICK_DCC_THRESHOLD) { - pmacro_cmd_pad |= (EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC); - pmacro_cmd_pad &= ~(EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, (100000 / clk) + 1); - ramp_up_wait += 100000; - - pmacro_dq_pad |= (EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC); - pmacro_dq_pad &= ~(EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_DATA_PAD_TX_CTRL, pmacro_dq_pad, 0); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & 0xfe40fe40, 0); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & 0xfe40fe40, (100000 / clk) + 1); - ramp_up_wait += 100000; - } - - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 & 0xfeedfeed, (100000 / clk) + 1); - ramp_up_wait += 100000; - - if (clk < 1000000 / IOBRICK_DCC_THRESHOLD) { - pmacro_cmd_pad |= (EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, (100000 / clk) + 1); - ramp_up_wait += 100000; - - pmacro_dq_pad |= (EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC | EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC); - - ccfifo_write(EMC_PMACRO_DATA_PAD_TX_CTRL, pmacro_dq_pad, 0); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1, 0); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1, (100000 / clk) + 1); - ramp_up_wait += 100000; - } - - ccfifo_write(EMC_FBIO_CFG5, pmacro_cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, (100000 / clk) + 10); - ramp_up_wait += (100000 + (10 * clk)); - } else if (clk < 1000000 / DVFS_FGCG_MID_SPEED_THRESHOLD) { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 | 0x06000600, (100000 / clk) + 1); - ccfifo_write(EMC_FBIO_CFG5, pmacro_cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, (100000 / clk) + 10); - ramp_up_wait += (100000 + 10 * clk); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, pmacro_rfu1 | 0x00000600, 0); - ccfifo_write(EMC_FBIO_CFG5, pmacro_cfg5 & ~EMC_FBIO_CFG5_CMD_TX_DIS, 12); - ramp_up_wait += (12 * clk); - } - - pmacro_cmd_pad &= ~EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON; - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, pmacro_cmd_pad, 5); - - return ramp_up_wait; -} - -static uint32_t apply_periodic_compensation_trimmer(tegra_emc_timing_t* next_timing, uint32_t offset) { - uint32_t temp = 0; - uint32_t next_timing_rate_mhz = next_timing->rate / 1000; - int tree_delta[4] = {0}; - int tree_delta_taps[4] = {0}; - int new[] = { - TRIM_REG(0, 0, 0, 0), - TRIM_REG(0, 0, 0, 1), - TRIM_REG(0, 0, 1, 2), - TRIM_REG(0, 0, 1, 3), - - TRIM_REG(1, 0, 2, 4), - TRIM_REG(1, 0, 2, 5), - TRIM_REG(1, 0, 3, 6), - TRIM_REG(1, 0, 3, 7), - - TRIM_REG(0, 1, 0, 0), - TRIM_REG(0, 1, 0, 1), - TRIM_REG(0, 1, 1, 2), - TRIM_REG(0, 1, 1, 3), - - TRIM_REG(1, 1, 2, 4), - TRIM_REG(1, 1, 2, 5), - TRIM_REG(1, 1, 3, 6), - TRIM_REG(1, 1, 3, 7) - }; - - switch (offset) { - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3: - case EMC_DATA_BRLSHFT_0: - tree_delta[0] = 128 * (next_timing->current_dram_clktree_c0d0u0 - next_timing->trained_dram_clktree_c0d0u0); - tree_delta[1] = 128 * (next_timing->current_dram_clktree_c0d0u1 - next_timing->trained_dram_clktree_c0d0u1); - tree_delta[2] = 128 * (next_timing->current_dram_clktree_c1d0u0 - next_timing->trained_dram_clktree_c1d0u0); - tree_delta[3] = 128 * (next_timing->current_dram_clktree_c1d0u1 - next_timing->trained_dram_clktree_c1d0u1); - tree_delta_taps[0] = (tree_delta[0] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[1] = (tree_delta[1] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[2] = (tree_delta[2] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[3] = (tree_delta[3] * (int)next_timing_rate_mhz) / 1000000; - - for (int i = 0; i < 4; i++) { - if ((tree_delta_taps[i] > next_timing->tree_margin) || - (tree_delta_taps[i] < - (-1 * next_timing->tree_margin))) { - new[i * 2] = new[i * 2] + tree_delta_taps[i]; - new[i * 2 + 1] = new[i * 2 + 1] + - tree_delta_taps[i]; - } - } - - if (offset == EMC_DATA_BRLSHFT_0) { - for (int i = 0; i < 8; i++) - new[i] = new[i] / 64; - } else { - for (int i = 0; i < 8; i++) - new[i] = new[i] % 64; - } - break; - - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2: - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3: - case EMC_DATA_BRLSHFT_1: - tree_delta[0] = 128 * (next_timing->current_dram_clktree_c0d1u0 - next_timing->trained_dram_clktree_c0d1u0); - tree_delta[1] = 128 * (next_timing->current_dram_clktree_c0d1u1 - next_timing->trained_dram_clktree_c0d1u1); - tree_delta[2] = 128 * (next_timing->current_dram_clktree_c1d1u0 - next_timing->trained_dram_clktree_c1d1u0); - tree_delta[3] = 128 * (next_timing->current_dram_clktree_c1d1u1 - next_timing->trained_dram_clktree_c1d1u1); - tree_delta_taps[0] = (tree_delta[0] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[1] = (tree_delta[1] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[2] = (tree_delta[2] * (int)next_timing_rate_mhz) / 1000000; - tree_delta_taps[3] = (tree_delta[3] * (int)next_timing_rate_mhz) / 1000000; - - for (int i = 0; i < 4; i++) { - if ((tree_delta_taps[i] > next_timing->tree_margin) || (tree_delta_taps[i] < (-1 * next_timing->tree_margin))) { - new[8 + i * 2] = new[8 + i * 2] + tree_delta_taps[i]; - new[8 + i * 2 + 1] = new[8 + i * 2 + 1] + tree_delta_taps[i]; - } - } - - if (offset == EMC_DATA_BRLSHFT_1) { - for (int i = 0; i < 8; i++) - new[i + 8] = new[i + 8] / 64; - } else { - for (int i = 0; i < 8; i++) - new[i + 8] = new[i + 8] % 64; - } - break; - } - - switch (offset) { - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0: - temp = CALC_TEMP(0, 0, 0, 1, 0); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1: - temp = CALC_TEMP(0, 1, 2, 3, 2); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2: - temp = CALC_TEMP(0, 2, 4, 5, 4); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3: - temp = CALC_TEMP(0, 3, 6, 7, 6); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0: - temp = CALC_TEMP(1, 0, 0, 1, 8); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1: - temp = CALC_TEMP(1, 1, 2, 3, 10); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2: - temp = CALC_TEMP(1, 2, 4, 5, 12); - break; - case EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3: - temp = CALC_TEMP(1, 3, 6, 7, 14); - break; - case EMC_DATA_BRLSHFT_0: - temp = ((new[0] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE0_DATA_BRLSHFT_MASK) | - ((new[1] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE1_DATA_BRLSHFT_MASK) | - ((new[2] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE2_DATA_BRLSHFT_MASK) | - ((new[3] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE3_DATA_BRLSHFT_MASK) | - ((new[4] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE4_DATA_BRLSHFT_MASK) | - ((new[5] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE5_DATA_BRLSHFT_MASK) | - ((new[6] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE6_DATA_BRLSHFT_MASK) | - ((new[7] << - EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_0_RANK0_BYTE7_DATA_BRLSHFT_MASK); - break; - case EMC_DATA_BRLSHFT_1: - temp = ((new[8] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE0_DATA_BRLSHFT_MASK) | - ((new[9] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE1_DATA_BRLSHFT_MASK) | - ((new[10] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE2_DATA_BRLSHFT_MASK) | - ((new[11] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE3_DATA_BRLSHFT_MASK) | - ((new[12] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE4_DATA_BRLSHFT_MASK) | - ((new[13] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE5_DATA_BRLSHFT_MASK) | - ((new[14] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE6_DATA_BRLSHFT_MASK) | - ((new[15] << - EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_SHIFT) & - EMC_DATA_BRLSHFT_1_RANK1_BYTE7_DATA_BRLSHFT_MASK); - break; - default: - break; - } - - return temp; -} - -static uint32_t update_clock_tree_delay(tegra_emc_timing_t* current_timing, tegra_emc_timing_t* next_timing, uint32_t dram_dev_num, uint32_t channel_mode, int type) { - uint32_t mrr_req = 0, mrr_data = 0; - uint32_t temp0_0 = 0, temp0_1 = 0, temp1_0 = 0, temp1_1 = 0; - int tdel = 0, tmdel = 0, adel = 0; - uint32_t cval; - uint32_t current_timing_rate_mhz = (current_timing->rate / 1000); - uint32_t next_timing_rate_mhz = (next_timing->rate / 1000); - bool dvfs_pt1 = (type == DVFS_PT1); - bool training_pt1 = (type == TRAINING_PT1); - bool dvfs_update = (type == DVFS_UPDATE); - bool training_update = (type == TRAINING_UPDATE); - bool periodic_training_update = (type == PERIODIC_TRAINING_UPDATE); - - /* Dev0 MSB. */ - if (dvfs_pt1 || training_pt1 || periodic_training_update) { - mrr_req = ((2 << EMC_MRR_DEV_SEL_SHIFT) | (19 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC); - if (channel_mode == DUAL_CHANNEL) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC1); - - mrr_data = ((emc_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 = ((mrr_data & 0xff) << 8); - temp0_1 = (mrr_data & 0xff00); - - if (channel_mode == DUAL_CHANNEL) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - temp1_0 = ((mrr_data & 0xff) << 8); - temp1_1 = (mrr_data & 0xff00); - } - - /* Dev0 LSB. */ - mrr_req = ((mrr_req & ~EMC_MRR_MA_MASK) | (18 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC); - if (channel_mode == DUAL_CHANNEL) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC1); - - mrr_data = ((emc_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 |= (mrr_data & 0xff); - temp0_1 |= ((mrr_data & 0xff00) >> 8); - - if (channel_mode == DUAL_CHANNEL) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - temp1_0 |= (mrr_data & 0xff); - temp1_1 |= ((mrr_data & 0xff00) >> 8); - } - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp0_0)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C0D0U0, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C0D0U0); - else if (training_update) - __AVERAGE_WRITE_PTFV(C0D0U0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C0D0U0, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (next_timing->current_dram_clktree_c0d0u0 - __MOVAVG_AC(next_timing, C0D0U0)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - adel = tmdel; - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c0d0u0 = __MOVAVG_AC(next_timing, C0D0U0); - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / - (current_timing_rate_mhz * 2 * temp0_1)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C0D0U1, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C0D0U1); - else if (training_update) - __AVERAGE_WRITE_PTFV(C0D0U1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C0D0U1, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c0d0u1 - __MOVAVG_AC(next_timing, C0D0U1); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c0d0u1 = __MOVAVG_AC(next_timing, C0D0U1); - } - - if (channel_mode == DUAL_CHANNEL) { - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp1_0)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C1D0U0, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C1D0U0); - else if (training_update) - __AVERAGE_WRITE_PTFV(C1D0U0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C1D0U0, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c1d0u0 - __MOVAVG_AC(next_timing, C1D0U0); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c1d0u0 = __MOVAVG_AC(next_timing, C1D0U0); - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp1_1)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C1D0U1, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C1D0U1); - else if (training_update) - __AVERAGE_WRITE_PTFV(C1D0U1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C1D0U1, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c1d0u1 - __MOVAVG_AC(next_timing, C1D0U1); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c1d0u1 = __MOVAVG_AC(next_timing, C1D0U1); - } - } - - if (dram_dev_num != TWO_RANK) - return adel; - - /* Dev1 MSB. */ - if (dvfs_pt1 || training_pt1 || periodic_training_update) { - mrr_req = ((1 << EMC_MRR_DEV_SEL_SHIFT) | (19 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC); - if (channel_mode == DUAL_CHANNEL) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC1); - - mrr_data = ((emc_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 = ((mrr_data & 0xff) << 8); - temp0_1 = (mrr_data & 0xff00); - - if (channel_mode == DUAL_CHANNEL) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - temp1_0 = ((mrr_data & 0xff) << 8); - temp1_1 = (mrr_data & 0xff00); - } - - /* Dev1 LSB. */ - mrr_req = ((mrr_req & ~EMC_MRR_MA_MASK) | (18 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC); - if (channel_mode == DUAL_CHANNEL) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, REG_EMC1); - - mrr_data = ((emc_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 |= (mrr_data & 0xff); - temp0_1 |= ((mrr_data & 0xff00) >> 8); - - if (channel_mode == DUAL_CHANNEL) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - temp1_0 |= (mrr_data & 0xff); - temp1_1 |= ((mrr_data & 0xff00) >> 8); - } - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp0_0)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C0D1U0, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C0D1U0); - else if (training_update) - __AVERAGE_WRITE_PTFV(C0D1U0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C0D1U0, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c0d1u0 - __MOVAVG_AC(next_timing, C0D1U0); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c0d1u0 = __MOVAVG_AC(next_timing, C0D1U0); - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp0_1)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C0D1U1, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C0D1U1); - else if (training_update) - __AVERAGE_WRITE_PTFV(C0D1U1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C0D1U1, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c0d1u1 - __MOVAVG_AC(next_timing, C0D1U1); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c0d1u1 = __MOVAVG_AC(next_timing, C0D1U1); - } - - if (channel_mode == DUAL_CHANNEL) { - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp1_0)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C1D1U0, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C1D1U0); - else if (training_update) - __AVERAGE_WRITE_PTFV(C1D1U0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C1D1U0, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c1d1u0 - __MOVAVG_AC(next_timing, C1D1U0); - - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c1d1u0 = __MOVAVG_AC(next_timing, C1D1U0); - } - - cval = ((1000000 * actual_osc_clocks(current_timing->run_clocks)) / (current_timing_rate_mhz * 2 * temp1_1)); - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(C1D1U1, cval); - else if (dvfs_update) - __AVERAGE_PTFV(C1D1U1); - else if (training_update) - __AVERAGE_WRITE_PTFV(C1D1U1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(C1D1U1, cval); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = next_timing->current_dram_clktree_c1d1u1 - __MOVAVG_AC(next_timing, C1D1U1); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if ((tmdel * 128 * next_timing_rate_mhz / 1000000) > next_timing->tree_margin) - next_timing->current_dram_clktree_c1d1u1 = __MOVAVG_AC(next_timing, C1D1U1); - } - } - - if (training_update) { - next_timing->trained_dram_clktree_c0d0u0 = next_timing->current_dram_clktree_c0d0u0; - next_timing->trained_dram_clktree_c0d0u1 = next_timing->current_dram_clktree_c0d0u1; - next_timing->trained_dram_clktree_c0d1u0 = next_timing->current_dram_clktree_c0d1u0; - next_timing->trained_dram_clktree_c0d1u1 = next_timing->current_dram_clktree_c0d1u1; - next_timing->trained_dram_clktree_c1d0u0 = next_timing->current_dram_clktree_c1d0u0; - next_timing->trained_dram_clktree_c1d0u1 = next_timing->current_dram_clktree_c1d0u1; - next_timing->trained_dram_clktree_c1d1u0 = next_timing->current_dram_clktree_c1d1u0; - next_timing->trained_dram_clktree_c1d1u1 = next_timing->current_dram_clktree_c1d1u1; - } - - return adel; -} - -static void reset_dram_clktree_values(tegra_emc_timing_t *table) { - #define __RESET_CLKTREE(TBL, C, D, U) \ - TBL->current_dram_clktree_c ## C ## d ## D ## u ## U = \ - TBL->trained_dram_clktree_c ## C ## d ## D ## u ## U - - __RESET_CLKTREE(table, 0, 0, 0); - __RESET_CLKTREE(table, 0, 0, 1); - __RESET_CLKTREE(table, 1, 0, 0); - __RESET_CLKTREE(table, 1, 0, 1); - __RESET_CLKTREE(table, 1, 1, 0); - __RESET_CLKTREE(table, 1, 1, 1); -} - -static uint32_t periodic_compensation_handler(tegra_emc_timing_t *current_timing, tegra_emc_timing_t *next_timing, uint32_t dram_dev_num, uint32_t channel_mode, int type) { -#define __COPY_EMA(nt, lt, dev) \ - ({ __MOVAVG(nt, dev) = __MOVAVG(lt, dev) * \ - (nt)->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; }) - - uint32_t adel = 0; - uint32_t samples = next_timing->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; - uint32_t samples_write = next_timing->ptfv_list[PTFV_WRITE_SAMPLES_INDEX]; - uint32_t delay = 2 + (1000 * actual_osc_clocks(current_timing->run_clocks) / current_timing->rate); - - if (!next_timing->periodic_training) - return 0; - - if (type == DVFS_SEQUENCE) { - if (current_timing->periodic_training && (next_timing->ptfv_list[PTFV_CONFIG_CTRL_INDEX] & PTFV_CONFIG_CTRL_USE_PREVIOUS_EMA)) { - /* - * If the previous frequency was using periodic - * calibration then we can reuse the previous - * frequencies EMA data. - */ - __COPY_EMA(next_timing, current_timing, C0D0U0); - __COPY_EMA(next_timing, current_timing, C0D0U1); - __COPY_EMA(next_timing, current_timing, C1D0U0); - __COPY_EMA(next_timing, current_timing, C1D0U1); - __COPY_EMA(next_timing, current_timing, C0D1U0); - __COPY_EMA(next_timing, current_timing, C0D1U1); - __COPY_EMA(next_timing, current_timing, C1D1U0); - __COPY_EMA(next_timing, current_timing, C1D1U1); - } else { - /* Reset the EMA.*/ - __MOVAVG(next_timing, C0D0U0) = 0; - __MOVAVG(next_timing, C0D0U1) = 0; - __MOVAVG(next_timing, C1D0U0) = 0; - __MOVAVG(next_timing, C1D0U1) = 0; - __MOVAVG(next_timing, C0D1U0) = 0; - __MOVAVG(next_timing, C0D1U1) = 0; - __MOVAVG(next_timing, C1D1U0) = 0; - __MOVAVG(next_timing, C1D1U1) = 0; - - for (int i = 0; i < samples; i++) { - start_periodic_compensation(); - udelay(delay); - - /* Generate next sample of data. */ - adel = update_clock_tree_delay(current_timing, next_timing, dram_dev_num, channel_mode, DVFS_PT1); - } - } - - adel = update_clock_tree_delay(current_timing, next_timing, dram_dev_num, channel_mode, DVFS_UPDATE); - } else if (type == WRITE_TRAINING_SEQUENCE) { - /* Reset the EMA.*/ - __MOVAVG(next_timing, C0D0U0) = 0; - __MOVAVG(next_timing, C0D0U1) = 0; - __MOVAVG(next_timing, C1D0U0) = 0; - __MOVAVG(next_timing, C1D0U1) = 0; - __MOVAVG(next_timing, C0D1U0) = 0; - __MOVAVG(next_timing, C0D1U1) = 0; - __MOVAVG(next_timing, C1D1U0) = 0; - __MOVAVG(next_timing, C1D1U1) = 0; - - for (int i = 0; i < samples_write; i++) { - start_periodic_compensation(); - udelay(delay); - - /* Generate next sample of data. */ - update_clock_tree_delay(current_timing, next_timing, dram_dev_num, channel_mode, TRAINING_PT1); - } - - adel = update_clock_tree_delay(current_timing, next_timing, dram_dev_num, channel_mode, TRAINING_UPDATE); - } else if (type == PERIODIC_TRAINING_SEQUENCE) { - start_periodic_compensation(); - udelay(delay); - - adel = update_clock_tree_delay(current_timing, next_timing, dram_dev_num, channel_mode, PERIODIC_TRAINING_UPDATE); - } - - return adel; -} - -static void set_over_temp_timing(tegra_emc_timing_t *next_timing, unsigned long state) { -#define REFRESH_X2 1 -#define REFRESH_X4 2 -#define REFRESH_SPEEDUP(val, speedup) \ - (val = ((val) & 0xFFFF0000) | (((val) & 0xFFFF) >> (speedup))) - - uint32_t ref = next_timing->burst_regs[EMC_REFRESH_INDEX]; - uint32_t pre_ref = next_timing->burst_regs[EMC_PRE_REFRESH_REQ_CNT_INDEX]; - uint32_t dsr_cntrl = next_timing->burst_regs[EMC_DYN_SELF_REF_CONTROL_INDEX]; - - switch (state) { - case TEGRA_DRAM_OVER_TEMP_NONE: - case TEGRA_DRAM_OVER_TEMP_THROTTLE: - break; - case TEGRA_DRAM_OVER_TEMP_REFRESH_X2: - REFRESH_SPEEDUP(ref, REFRESH_X2); - REFRESH_SPEEDUP(pre_ref, REFRESH_X2); - REFRESH_SPEEDUP(dsr_cntrl, REFRESH_X2); - break; - case TEGRA_DRAM_OVER_TEMP_REFRESH_X4: - REFRESH_SPEEDUP(ref, REFRESH_X4); - REFRESH_SPEEDUP(pre_ref, REFRESH_X4); - REFRESH_SPEEDUP(dsr_cntrl, REFRESH_X4); - break; - default: - return; - } - - emc_write(ref, burst_regs_off[EMC_REFRESH_INDEX]); - emc_write(pre_ref, burst_regs_off[EMC_PRE_REFRESH_REQ_CNT_INDEX]); - emc_write(dsr_cntrl, burst_regs_off[EMC_DYN_SELF_REF_CONTROL_INDEX]); -} - -static void change_dll_src(tegra_emc_timing_t* next_timing, uint32_t clk_src_emc_to) { - volatile tegra_car_t *car = car_get_regs(); - - uint32_t emc_2x_clk_src_to = (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - uint32_t val = (((((next_timing->dll_clk_src & 0x1FFFFFFF) | (emc_2x_clk_src_to << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)) & 0xFFFFFF00) | (clk_src_emc_to & 0xFF)) & 0xFFFFF3FF); - - /* Clock source is PLLMB_UD */ - if (emc_2x_clk_src_to == TEGRA_EMC_SRC_PLLMB_UD) - val |= 0x400; - else if (emc_2x_clk_src_to != TEGRA_EMC_SRC_PLLM_UD) /* Clock source is not PLLM_UD */ - val |= 0x800; - - /* Set EMC_DLL_CLK_SRC, DDLL_CLK_SEL and EMC_DLL_CLK_DIVISOR */ - car->clk_source_emc_dll = val; - - /* Clear and set CLK_ENB_EMC_DLL */ - uint32_t clk_enb_emc_dll = ((car->clk_out_enb_x & 0xFFFFBFFF) | ((next_timing->clk_out_enb_x_0_clk_enb_emc_dll & 1) << 14)); - car->clk_out_enb_x = clk_enb_emc_dll; -} - -static uint32_t dll_prelock(tegra_emc_timing_t* next_timing, bool dvfs_with_training, uint32_t clk_src_emc_to) { - /* Check for dual channel LPDDR4 */ - bool dual_channel_lpddr4_case = ((emc_read(EMC_FBIO_CFG7) & EMC_FBIO_CFG7_CH0_ENABLE) & (emc_read(EMC_FBIO_CFG7) & EMC_FBIO_CFG7_CH1_ENABLE)); - - uint32_t emc_dig_dll_status = 0; - uint32_t emc_cfg_dig_dll = (emc_read(EMC_CFG_DIG_DLL) & ~EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_MASK); - - emc_cfg_dig_dll |= (3 << EMC_CFG_DIG_DLL_CFG_DLL_LOCK_LIMIT_SHIFT); - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_MODE_MASK; - emc_cfg_dig_dll |= (3 << EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT); - emc_cfg_dig_dll |= EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_TRAFFIC; - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_RW_UNTIL_LOCK; - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_UNTIL_LOCK; - - /* Update EMC_CFG_DIG_DLL_0 */ - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait until CFG_DLL_EN is cleared for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - - /* Wait until CFG_DLL_EN is cleared for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - } - - /* Manual configuration (superseded). */ - /* - uint32_t emc_dll_cfg_0 = emc_read(EMC_DLL_CFG_0); - emc_dll_cfg_0 &= 0xDF00000F; - emc_dll_cfg_0 |= 0x1FA340AF; - emc_write(emc_dll_cfg_0, EMC_DLL_CFG_0); - */ - - emc_write(next_timing->burst_regs[EMC_DLL_CFG_0_INDEX], EMC_DLL_CFG_0); - emc_write(next_timing->burst_regs[EMC_DLL_CFG_1_INDEX], EMC_DLL_CFG_1); - - /* Manual configuration (superseded). */ - /* - uint32_t ddllcal_ctrl_start_trim_val = 0; - - if ((next_timing->rate >= 400000) && (next_timing->rate < 600000)) - ddllcal_ctrl_start_trim_val = 150; - else if ((next_timing->rate >= 600000) && (next_timing->rate < 800000)) - ddllcal_ctrl_start_trim_val = 100; - else if ((next_timing->rate >= 800000) && (next_timing->rate < 1000000)) - ddllcal_ctrl_start_trim_val = 70; - else if ((next_timing->rate >= 1000000) && (next_timing->rate < 1200000)) - ddllcal_ctrl_start_trim_val = 30; - else - ddllcal_ctrl_start_trim_val = 20; - - uint32_t emc_dll_cfg_1 = emc_read(EMC_DLL_CFG_1); - emc_dll_cfg_1 &= EMC_DLL_CFG_1_DDLLCAL_CTRL_START_TRIM_MASK; - emc_dll_cfg_1 |= ddllcal_ctrl_start_trim_val; - emc_write(emc_dll_cfg_1, EMC_DLL_CFG_1); - */ - - /* Configure the clock and reset controller for EMC DLL */ - change_dll_src(next_timing, clk_src_emc_to); - - /* Enable DLL */ - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll |= EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait until CFG_DLL_EN is set for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - - /* Wait until CFG_DLL_EN is set for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - } - - /* Wait until DLL_PRIV_UPDATED or DLL_LOCK have been cleared */ - do { - emc_dig_dll_status = emc_read(EMC_DIG_DLL_STATUS); - } while (!(emc_dig_dll_status & EMC_DIG_DLL_STATUS_DLL_LOCK) || !(emc_dig_dll_status & EMC_DIG_DLL_STATUS_DLL_PRIV_UPDATED)); - - if (dvfs_with_training) { - /* Set WRITE_MUX to ACTIVE */ - emc_set_shadow_bypass(ACTIVE); - - /* Disable DLL */ - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Set WRITE_MUX to ASSEMBLY */ - emc_set_shadow_bypass(ASSEMBLY); - - /* Wait until CFG_DLL_EN is cleared for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - - /* Wait until CFG_DLL_EN is cleared for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - } - } - - /* Return the DLL_OUT value */ - return (emc_read(EMC_DIG_DLL_STATUS) & EMC_DIG_DLL_STATUS_DLL_OUT_MASK); -} - -static void dll_disable(bool dual_channel_lpddr4_case) { - /* Disable DLL */ - uint32_t emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait until CFG_DLL_EN is cleared for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - - /* Wait until CFG_DLL_EN is cleared for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN); - } -} - -static void dll_enable(bool dual_channel_lpddr4_case) { - /* Enable DLL */ - uint32_t emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll |= EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait until CFG_DLL_EN is set for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - - /* Wait until CFG_DLL_EN is set for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - } -} - -static void dll_enable_stall(bool dual_channel_lpddr4_case) { - /* Enable DLL */ - uint32_t emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll |= EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_TRAFFIC; - emc_cfg_dig_dll |= EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_RW_UNTIL_LOCK; - emc_cfg_dig_dll &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_UNTIL_LOCK; - emc_cfg_dig_dll = (emc_cfg_dig_dll & ~EMC_CFG_DIG_DLL_CFG_DLL_MODE_MASK) | (2 << EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT); - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait until CFG_DLL_EN is set for EMC */ - do { - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - - /* Wait until CFG_DLL_EN is set for EMC1 */ - if (dual_channel_lpddr4_case) { - do { - emc_cfg_dig_dll = emc1_read(EMC_CFG_DIG_DLL); - } while (!(emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN)); - } -} - -static bool test_clk_ratio(uint32_t rate_to, uint32_t clk_src_emc_to, uint32_t rate_from, uint32_t clk_src_emc_from) { - volatile tegra_car_t *car = car_get_regs(); - - uint32_t emc_2x_clk_src = (car->clk_source_emc >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - uint32_t post_div = 0; - - if ((emc_2x_clk_src == TEGRA_EMC_SRC_PLLM) || (emc_2x_clk_src == TEGRA_EMC_SRC_PLLM_UD)) { - post_div = ((car->pllm_base >> 0x14) & 0x1F); - } else if ((emc_2x_clk_src == TEGRA_EMC_SRC_PLLMB_UD) || (emc_2x_clk_src == TEGRA_EMC_SRC_PLLMB)) { - post_div = ((car->pllmb_base >> 0x14) & 0x1F); - } - - /* Bad post divider value */ - if (post_div > 0x05) - return false; - - uint32_t emc_2x_clk_src_from = (clk_src_emc_from >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - uint32_t emc_2x_clk_src_to = (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - uint8_t emc_2x_clk_div_from = (clk_src_emc_from & 0xFF); - uint8_t emc_2x_clk_div_to = (clk_src_emc_to & 0xFF); - - if (emc_2x_clk_src_from <= TEGRA_EMC_SRC_PLLMB_UD) - emc_2x_clk_div_from = 0; - if (emc_2x_clk_src_to <= TEGRA_EMC_SRC_PLLMB_UD) - emc_2x_clk_div_to = 0; - - /* Clock sources are different and one of them is CLK_M */ - if ((emc_2x_clk_src_to != emc_2x_clk_src_from) - && ((emc_2x_clk_src_to & 0xFFFFFFFB) - || (emc_2x_clk_src_from & 0xFFFFFFFB))) - return true; - - float val_to = (double)rate_to * ((double)((emc_2x_clk_div_to >> 1) + 1) + (double)(emc_2x_clk_div_to & 1) * 0.5) * (double)(post_div + 1); - float val_from = (double)rate_from * ((double)((emc_2x_clk_div_from >> 1) + 1) + (double)(emc_2x_clk_div_from & 1) * 0.5) * (double)(post_div + 1); - float ratio = (val_from / val_to); - - if ((ratio > 1.01f) || (ratio < 0.99f)) - return true; - - return false; -} - -static uint32_t set_pll(uint32_t rate_to, uint32_t rate_osc, uint32_t clk_src_emc_to, bool is_pllmb) { - volatile tegra_car_t *car = car_get_regs(); - - static const pll_cfg_t pll_vals[] = { - {0xB71B00, 0x2FAF0800, 0x42, 0x01, 0x00}, /* 800Mhz rate with 12Mhz oscillator (unsupported). */ - {0xC65D40, 0x2FAF0800, 0x3D, 0x01, 0x00}, /* 800Mhz rate with 13Mhz oscillator (unsupported). */ - {0x249F000, 0x11BD0400, 0x5D, 0x04, 0x02}, /* 297.6Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x17D78400, 0x7D, 0x04, 0x02}, /* 400Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x18519600, 0x55, 0x04, 0x01}, /* 408Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x1FC1E200, 0x6F, 0x04, 0x01}, /* 532.8Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x27AC4000, 0x68, 0x03, 0x01}, /* 665.6Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x2FAF0800, 0x7D, 0x03, 0x01}, /* 800Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x3780FC00, 0x61, 0x04, 0x00}, /* 931.2Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x3F83C400, 0x6F, 0x04, 0x00}, /* 1065.6Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x47868C00, 0x7D, 0x04, 0x00}, /* 1200Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x4F588000, 0x68, 0x03, 0x00}, /* 1331.2Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x56F9A000, 0x4C, 0x02, 0x00}, /* 1459.2Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x5F5E1000, 0x7D, 0x03, 0x00}, /* 1600Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x6F01F800, 0x61, 0x02, 0x00}, /* 1862.4Mhz rate with 38.4Mhz oscillator. */ - {0x249F000, 0x7F078800, 0x6F, 0x02, 0x00}, /* 2131.2Mhz rate with 38.4Mhz oscillator. */ - {0x00, 0x00, 0x00, 0x00, 0x00} /* Dummy entry. */ - }; - - uint32_t rate_to_hz = (rate_to * 1000); - uint32_t rate_osc_hz = (rate_osc * 1000); - - int freq_idx = 0; - for (int i = 0; pll_vals[i].osc_freq; i++) { - if ((rate_osc_hz == pll_vals[i].osc_freq) && (rate_to_hz == pll_vals[i].out_freq)) { - freq_idx = i; - break; - } - } - - uint32_t res = clk_src_emc_to; - - /* Failed to find the PLL values */ - if (!pll_vals[freq_idx].osc_freq) - return res; - - uint32_t feedback_div = pll_vals[freq_idx].feedback_div; - uint32_t input_div = pll_vals[freq_idx].input_div; - uint32_t post_div = pll_vals[freq_idx].post_div; - - if (is_pllmb) { - /* Set PLLMB_DIVM, PLLMB_DIVN and PLLMB_DIVP */ - car->pllmb_base = (input_div | (feedback_div << 0x08) | ((post_div & 0x1F) << 0x14)); - - /* Set PLLMB_ENABLE */ - car->pllmb_base |= 0x40000000; - - /* Clock source is PLLM_UD */ - if ((clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) == TEGRA_EMC_SRC_PLLM_UD) - res = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - else if ((clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) == TEGRA_EMC_SRC_PLLM) /* Clock source is PLLM_OUT0 */ - res = (clk_src_emc_to | (TEGRA_EMC_SRC_PLLMB << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - - while (!(car->pllmb_base & 0x8000000)) { - /* Wait for PLLMB_LOCK to be set */ - } - } else { - /* Set PLLM_DIVM, PLLM_DIVN and PLLM_DIVP */ - car->pllm_base = (input_div | (feedback_div << 0x08) | ((post_div & 0x1F) << 0x14)); - - /* Set PLLM_EN_LCKDET */ - car->pllm_misc2 |= 0x10; - - /* Set PLLM_ENABLE */ - car->pllm_base |= 0x40000000; - - /* Clock source is PLLM_UD */ - if ((clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) == TEGRA_EMC_SRC_PLLM_UD) - res = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLM_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - - while (!(car->pllm_base & 0x8000000)) { - /* Wait for PLLM_LOCK to be set */ - } - } - - return res; -} - -static void set_clock(tegra_emc_timing_t* current_timing, tegra_emc_timing_t* next_timing, uint32_t training, uint32_t next_clk_src) { - volatile tegra_car_t *car = car_get_regs(); - - /* Extract training values */ - bool train_ca = (training & 0x01); - bool train_ca_vref = (training & 0x02); - bool train_quse = (training & 0x04); - bool train_quse_vref = (training & 0x08); - bool train_wr = (training & 0x10); - bool train_wr_vref = (training & 0x20); - bool train_rd = (training & 0x40); - bool train_rd_vref = (training & 0x80); - bool train_swap_rank = (training & 0x100); - bool train_self_refresh = (training & 0x200); - - /* Check if we should do training. */ - bool dvfs_with_training = (training & 0xF7); - - bool skip_zqcal = false; - bool compensate_trimmer_applicable = false; - uint32_t zqcal_before_cc_cutoff = 2400; /* In picoseconds */ - int zq_latch_dvfs_wait_time; - - uint32_t mr13_catr_enable; - uint32_t mr13_flip_fspwr; - uint32_t mr13_flip_fspop; - - int next_push, next_dq_e_ivref, next_dqs_e_ivref; - - uint32_t zq_wait_long; - uint32_t zq_wait_short; - - uint32_t tRTM; - uint32_t RP_war; - uint32_t R2P_war; - uint32_t TRPab_war; - int nRTP; - uint32_t deltaTWATM; - uint32_t W2P_war; - uint32_t tRPST; - - uint32_t mrw_req; - uint32_t adel = 0; - uint32_t next_timing_rate_mhz = next_timing->rate / 1000; - - /* Set some common values needed. */ - int dram_type = emc_read(EMC_FBIO_CFG5) & EMC_FBIO_CFG5_DRAM_TYPE_MASK >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; - int dram_dev_num = ((mc_read(MC_EMEM_ADR_CFG) & 1) + 1); - bool shared_zq_resistor = ((current_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX] >> 31) & 1); - bool channel_mode = ((current_timing->burst_regs[EMC_FBIO_CFG7_INDEX] >> 2) & 1); - bool is_lpddr3 = (dram_type == DRAM_TYPE_LPDDR2) && ((next_timing->burst_regs[EMC_FBIO_CFG5_INDEX] >> 25) & 1); - bool opt_zcal_en_cc = ((next_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX] && !current_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX]) || (dram_type == DRAM_TYPE_LPDDR4)); - bool opt_war_200024907 = (dram_type == DRAM_TYPE_LPDDR4); - bool opt_do_sw_qrst = false; - bool opt_cc_short_zcal = true; - bool opt_short_zcal = true; - bool save_restore_clkstop_pd = true; - uint32_t opt_dll_mode = (dram_type == DRAM_TYPE_DDR3) ? get_dll_state(next_timing) : DLL_OFF; - uint32_t opt_dvfs_mode = MAN_SR; - uint32_t emc_auto_cal_config = emc_read(EMC_AUTO_CAL_CONFIG); - - /* In picoseconds. */ - uint32_t source_clock_period = 1000000000 / current_timing->rate; - uint32_t destination_clock_period = 1000000000 / next_timing->rate; - - uint32_t tFC_lpddr4 = 1000 * next_timing->dram_timings[T_FC_LPDDR4]; - uint32_t tZQCAL_lpddr4 = 1000000; - int tZQCAL_lpddr4_fc_adj = (source_clock_period > zqcal_before_cc_cutoff) ? tZQCAL_lpddr4 / destination_clock_period : (tZQCAL_lpddr4 - tFC_lpddr4) / destination_clock_period; - - g_fsp_for_next_freq = !g_fsp_for_next_freq; - - uint32_t emc_dbg_o = emc_read(EMC_DBG); - uint32_t emc_pin_o = emc_read(EMC_PIN); - uint32_t emc_cfg_pipe_clk_o = emc_read(EMC_CFG_PIPE_CLK); - uint32_t emc_dbg = emc_dbg_o; - - uint32_t emc_cfg = next_timing->burst_regs[EMC_CFG_INDEX]; - uint32_t emc_sel_dpd_ctrl = next_timing->emc_sel_dpd_ctrl; - - emc_cfg &= ~(EMC_CFG_DYN_SELF_REF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | EMC_CFG_DRAM_CLKSTOP_PD); - emc_sel_dpd_ctrl &= ~(EMC_SEL_DPD_CTRL_CLK_SEL_DPD_EN | EMC_SEL_DPD_CTRL_CA_SEL_DPD_EN | EMC_SEL_DPD_CTRL_RESET_SEL_DPD_EN | EMC_SEL_DPD_CTRL_ODT_SEL_DPD_EN | EMC_SEL_DPD_CTRL_DATA_SEL_DPD_EN); - - /* Step 1: - * Pre DVFS SW sequence. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 1\n"); - - /* Step 1.1: Disable DLL. */ - uint32_t tmp = emc_read(EMC_CFG_DIG_DLL); - tmp &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(tmp, EMC_CFG_DIG_DLL); - - /* Request a timing update. */ - emc_timing_update(channel_mode); - - /* Wait for DLL to be disabled. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, REG_EMC1); - - /* Step 1.2: Disable AUTOCAL. */ - emc_auto_cal_config = next_timing->emc_auto_cal_config; - uint32_t auto_cal_en = emc_auto_cal_config & EMC_AUTO_CAL_CONFIG_AUTO_CAL_ENABLE; - emc_auto_cal_config &= ~EMC_AUTO_CAL_CONFIG_AUTO_CAL_START; - emc_auto_cal_config |= EMC_AUTO_CAL_CONFIG_AUTO_CAL_MEASURE_STALL; - emc_auto_cal_config |= EMC_AUTO_CAL_CONFIG_AUTO_CAL_UPDATE_STALL; - emc_auto_cal_config |= auto_cal_en; - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - - /* Step 1.3: Disable other power features. */ - emc_set_shadow_bypass(ACTIVE); - emc_write(emc_cfg, EMC_CFG); - emc_write(emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - emc_set_shadow_bypass(ASSEMBLY); - - /* Skip this if dvfs_with_training is set. */ - if (!dvfs_with_training && next_timing->periodic_training) { - if (dram_dev_num == TWO_RANK) { - /* Wait for DRAM to get out of power down. */ - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK, false, REG_EMC1); - } else { - wait_for_update(EMC_EMC_STATUS, 0x10, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, 0x10, false, REG_EMC1); - } - - /* Wait for DRAM to get out of self refresh. */ - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK, false, REG_EMC1); - - /* Reset all clock tree values. */ - reset_dram_clktree_values(next_timing); - - /* Do DVFS_SEQUENCE. */ - adel = periodic_compensation_handler(current_timing, next_timing, dram_dev_num, channel_mode, DVFS_SEQUENCE); - - /* Check if we should use compensate trimmer. */ - compensate_trimmer_applicable = next_timing->periodic_training && ((adel * 128 * next_timing_rate_mhz) / 1000000) > next_timing->tree_margin; - } - - emc_write(EMC_INTSTATUS_CLKCHANGE_COMPLETE, EMC_INTSTATUS); - emc_set_shadow_bypass(ACTIVE); - emc_write(emc_cfg, EMC_CFG); - emc_write(emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - emc_write(emc_cfg_pipe_clk_o | EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON, EMC_CFG_PIPE_CLK); - emc_write(next_timing->emc_fdpd_ctrl_cmd_no_ramp & ~EMC_FDPD_CTRL_CMD_NO_RAMP_CMD_DPD_NO_RAMP_ENABLE, EMC_FDPD_CTRL_CMD_NO_RAMP); - - uint32_t bg_regulator_mode_change = ((next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD) ^ (current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD)) || ((next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & - EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD) ^ (current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD)); - - uint32_t enable_bg_regulator = (next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD) == 0; - - /* Check if we need to change BG the regulator. */ - if (bg_regulator_mode_change) { - if (enable_bg_regulator) - emc_write(current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD, EMC_PMACRO_BG_BIAS_CTRL_0); - else - emc_write(current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD, EMC_PMACRO_BG_BIAS_CTRL_0); - } - - /* Check if we need to turn on VREF generator. */ - if ((((!current_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF)) && - ((next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF))) || - ((!(current_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF)) && - ((next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX] & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF)))) - { - uint32_t pad_tx_ctrl = next_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - uint32_t last_pad_tx_ctrl = current_timing->burst_regs[EMC_PMACRO_DATA_PAD_TX_CTRL_INDEX]; - - next_dqs_e_ivref = pad_tx_ctrl & EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF; - next_dq_e_ivref = pad_tx_ctrl & EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF; - next_push = (last_pad_tx_ctrl & ~EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF & ~EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF) | next_dq_e_ivref | next_dqs_e_ivref; - emc_write(next_push, EMC_PMACRO_DATA_PAD_TX_CTRL); - udelay(1); - } else if (bg_regulator_mode_change) { - udelay(1); - } - - emc_set_shadow_bypass(ASSEMBLY); - - /* Step 2: - * Prelock the DLL. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 2\n"); - - if (next_timing->burst_regs[EMC_CFG_DIG_DLL_INDEX] & EMC_CFG_DIG_DLL_CFG_DLL_EN) { - dll_prelock(next_timing, dvfs_with_training, next_clk_src); - } else { - change_dll_src(next_timing, next_clk_src); - dll_disable(channel_mode); - } - - /* Step 3: - * Prepare autocal for the clock change. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 3\n"); - - emc_set_shadow_bypass(ACTIVE); - emc_write(next_timing->emc_auto_cal_config2, EMC_AUTO_CAL_CONFIG2); - emc_write(next_timing->emc_auto_cal_config3, EMC_AUTO_CAL_CONFIG3); - emc_write(next_timing->emc_auto_cal_config4, EMC_AUTO_CAL_CONFIG4); - emc_write(next_timing->emc_auto_cal_config5, EMC_AUTO_CAL_CONFIG5); - emc_write(next_timing->emc_auto_cal_config6, EMC_AUTO_CAL_CONFIG6); - emc_write(next_timing->emc_auto_cal_config7, EMC_AUTO_CAL_CONFIG7); - emc_write(next_timing->emc_auto_cal_config8, EMC_AUTO_CAL_CONFIG8); - emc_set_shadow_bypass(ASSEMBLY); - - emc_auto_cal_config |= (EMC_AUTO_CAL_CONFIG_AUTO_CAL_COMPUTE_START | auto_cal_en); - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - - /* Step 4: - * Update EMC_CFG. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 4\n"); - - if ((source_clock_period > 50000) && (dram_type == DRAM_TYPE_LPDDR4)) - ccfifo_write(EMC_SELF_REF, 1, 0); - else - emc_write(next_timing->emc_cfg_2, EMC_CFG_2); - - /* Step 5: - * Prepare reference variables for ZQCAL regs. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 5\n"); - - uint32_t emc_zcal_interval = current_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX]; - emc_zcal_interval &= 0xFF000000; - uint32_t emc_zcal_wait_cnt_old = current_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX]; - uint32_t emc_zcal_wait_cnt_new = next_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX]; - emc_zcal_wait_cnt_old &= ~EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK; - emc_zcal_wait_cnt_new &= ~EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK; - - if (dram_type == DRAM_TYPE_LPDDR4) - zq_wait_long = max((uint32_t)1, div_o3(1000000, destination_clock_period)); - else if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) - zq_wait_long = max(next_timing->min_mrs_wait, div_o3(360000, destination_clock_period)) + 4; - else if (dram_type == DRAM_TYPE_DDR3) - zq_wait_long = max((uint32_t)256, div_o3(320000, destination_clock_period) + 2); - else - zq_wait_long = 0; - - if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) - zq_wait_short = max(max(next_timing->min_mrs_wait, (uint32_t)6), div_o3(90000, destination_clock_period)) + 4; - else if (dram_type == DRAM_TYPE_DDR3) - zq_wait_short = max((uint32_t)64, div_o3(80000, destination_clock_period)) + 2; - else - zq_wait_short = 0; - - /* TODO: Actually use the reference variables. */ - (void)zq_wait_long; - (void)zq_wait_short; - - /* Step 6: - * Training code. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 6\n"); - - if ((train_ca || train_ca_vref) && (dram_dev_num == TWO_RANK)) { - emc_write(0x107, EMC_PIN); - } - - /* Step 7: - * Program FSP reference registers and send MRWs to new FSPWR. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 7\n"); - - /* Step 7.1: Bug 200024907 - Patch RP R2P */ - if (opt_war_200024907) { - nRTP = 16; - if (source_clock_period >= 1000000/1866) /* 535.91 ps */ - nRTP = 14; - if (source_clock_period >= 1000000/1600) /* 625.00 ps */ - nRTP = 12; - if (source_clock_period >= 1000000/1333) /* 750.19 ps */ - nRTP = 10; - if (source_clock_period >= 1000000/1066) /* 938.09 ps */ - nRTP = 8; - - deltaTWATM = max_t(uint32_t, div_o3(7500, source_clock_period), 8); - - /* - * Originally there was a + .5 in the tRPST calculation. - * However since we can't do FP in the kernel and the tRTM - * computation was in a floating point ceiling function, adding - * one to tRTP should be ok. There is no other source of non - * integer values, so the result was always going to be - * something for the form: f_ceil(N + .5) = N + 1; - */ - tRPST = ((current_timing->emc_mrw & 0x80) >> 7); - tRTM = current_timing->dram_timings[RL] + div_o3(3600, source_clock_period) + max_t(uint32_t, div_o3(7500, source_clock_period), 8) + tRPST + 1 + nRTP; - - if (current_timing->burst_regs[EMC_RP_INDEX] < tRTM) { - if (tRTM > (current_timing->burst_regs[EMC_R2P_INDEX] + current_timing->burst_regs[EMC_RP_INDEX])) { - R2P_war = tRTM - current_timing->burst_regs[EMC_RP_INDEX]; - RP_war = current_timing->burst_regs[EMC_RP_INDEX]; - TRPab_war = current_timing->burst_regs[EMC_TRPAB_INDEX]; - if (R2P_war > 63) { - RP_war = R2P_war + current_timing->burst_regs[EMC_RP_INDEX] - 63; - if (TRPab_war < RP_war) - TRPab_war = RP_war; - R2P_war = 63; - } - } else { - R2P_war = current_timing-> burst_regs[EMC_R2P_INDEX]; - RP_war = current_timing->burst_regs[EMC_RP_INDEX]; - TRPab_war = current_timing->burst_regs[EMC_TRPAB_INDEX]; - } - - if (RP_war < deltaTWATM) { - W2P_war = current_timing->burst_regs[EMC_W2P_INDEX] + deltaTWATM - RP_war; - if (W2P_war > 63) { - RP_war = RP_war + W2P_war - 63; - if (TRPab_war < RP_war) - TRPab_war = RP_war; - W2P_war = 63; - } - } else { - W2P_war = current_timing->burst_regs[EMC_W2P_INDEX]; - } - - if ((current_timing->burst_regs[EMC_W2P_INDEX] != W2P_war) - || (current_timing->burst_regs[EMC_R2P_INDEX] != R2P_war) - || (current_timing->burst_regs[EMC_RP_INDEX] != RP_war) - || (current_timing->burst_regs[EMC_TRPAB_INDEX] != TRPab_war)) - { - emc_set_shadow_bypass(ACTIVE); - emc_write(RP_war, EMC_RP); - emc_write(R2P_war, EMC_R2P); - emc_write(W2P_war, EMC_W2P); - emc_write(TRPab_war, EMC_TRPAB); - emc_set_shadow_bypass(ASSEMBLY); - udelay(1); - } - } - } - - if (!g_fsp_for_next_freq) { - mr13_flip_fspwr = (next_timing->emc_mrw3 & 0xffffff3f) | 0x80; - mr13_flip_fspop = (next_timing->emc_mrw3 & 0xffffff3f) | 0x00; - } else { - mr13_flip_fspwr = (next_timing->emc_mrw3 & 0xffffff3f) | 0x40; - mr13_flip_fspop = (next_timing->emc_mrw3 & 0xffffff3f) | 0xc0; - } - - mr13_catr_enable = (mr13_flip_fspwr & 0xFFFFFFFE) | 0x01; - - if (dram_dev_num == TWO_RANK) { - if (train_ca || train_ca_vref) { - if (train_swap_rank) { - mr13_flip_fspop = (mr13_flip_fspop & 0x3FFFFFFF) | 0x80000000; - mr13_catr_enable = (mr13_catr_enable & 0x3FFFFFFF)| 0x40000000; - } else { - mr13_flip_fspop = (mr13_flip_fspop & 0x3FFFFFFF) | 0x40000000; - mr13_catr_enable = (mr13_catr_enable & 0x3FFFFFFF) | 0x80000000; - } - } else { - if (train_swap_rank) - mr13_catr_enable = (mr13_catr_enable & 0x3FFFFFFF) | 0x40000000; - else - mr13_catr_enable = (mr13_catr_enable & 0x3FFFFFFF) | 0x80000000; - } - } - - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_write(mr13_flip_fspwr, EMC_MRW3); - emc_write(next_timing->emc_mrw, EMC_MRW); - emc_write(next_timing->emc_mrw2, EMC_MRW2); - } - - /* Step 8: - * Program the shadow registers. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 8\n"); - - /* Set burst registers. */ - for (int i = 0; i < next_timing->num_burst; i++) { - uint32_t var = 0; - uint32_t wval = 0; - - if (!burst_regs_off[i]) - continue; - - var = burst_regs_off[i]; - - if (dvfs_with_training) { - if (train_ca || train_ca_vref) - wval = next_timing->shadow_regs_ca_train[i]; - else if (train_quse || train_quse_vref) - wval = next_timing->shadow_regs_quse_train[i]; - else if (train_wr || train_wr_vref || train_rd || train_rd_vref) - wval = next_timing->shadow_regs_rdwr_train[i]; - } - else - wval = next_timing->burst_regs[i]; - - if (dram_type != DRAM_TYPE_LPDDR4 && - (var == EMC_MRW6 || var == EMC_MRW7 || - var == EMC_MRW8 || var == EMC_MRW9 || - var == EMC_MRW10 || var == EMC_MRW11 || - var == EMC_MRW12 || var == EMC_MRW13 || - var == EMC_MRW14 || var == EMC_MRW15 || - var == EMC_TRAINING_CTRL)) - continue; - - if (var == EMC_CFG) { - wval &= ~EMC_CFG_DRAM_ACPD; - wval &= ~EMC_CFG_DYN_SELF_REF; - if (dram_type == DRAM_TYPE_LPDDR4) { - wval &= ~EMC_CFG_DRAM_CLKSTOP_SR; - wval &= ~EMC_CFG_DRAM_CLKSTOP_PD; - } - } else if ((var == EMC_MRS_WAIT_CNT) - && (dram_type == DRAM_TYPE_LPDDR2) - && opt_zcal_en_cc && !opt_cc_short_zcal && opt_short_zcal) { - wval = (wval & ~(EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK << - EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT)) | - ((zq_wait_long & EMC_MRS_WAIT_CNT_SHORT_WAIT_MASK) << - EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT); - } else if ((var == EMC_ZCAL_WAIT_CNT) - && (dram_type == DRAM_TYPE_DDR3) - && opt_zcal_en_cc && !opt_cc_short_zcal && opt_short_zcal) { - wval = (wval & ~(EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK << - EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_SHIFT)) | - ((zq_wait_long & - EMC_ZCAL_WAIT_CNT_ZCAL_WAIT_CNT_MASK) << - EMC_MRS_WAIT_CNT_SHORT_WAIT_SHIFT); - } else if ((var == EMC_ZCAL_INTERVAL) && opt_zcal_en_cc) { - wval = 0; /* EMC_ZCAL_INTERVAL reset value. */ - } else if (var == EMC_PMACRO_AUTOCAL_CFG_COMMON) { - wval |= EMC_PMACRO_AUTOCAL_CFG_COMMON_E_CAL_BYPASS_DVFS; - } else if (var == EMC_PMACRO_DATA_PAD_TX_CTRL) { - wval &= - ~(EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSP_TX_E_DCC | - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQSN_TX_E_DCC | - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_TX_E_DCC | - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_CMD_TX_E_DCC); - } else if (var == EMC_PMACRO_CMD_PAD_TX_CTRL) { - wval |= EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON; - wval &= ~(EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSP_TX_E_DCC | - EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQSN_TX_E_DCC | - EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_E_DCC | - EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_CMD_TX_E_DCC); - } else if (var == EMC_PMACRO_BRICK_CTRL_RFU1) { - wval &= 0xf800f800; - } else if (var == EMC_PMACRO_COMMON_PAD_TX_CTRL) { - wval &= 0xfffffff0; - } else if (var == EMC_TRAINING_CTRL) { - wval |= (train_swap_rank << 14); /* Training only. */ - } - - emc_write(wval, var); - } - - /* Do EMC refresh adjustment here (disabled). */ - set_over_temp_timing(next_timing, TEGRA_DRAM_OVER_TEMP_NONE); - - if (dram_type == DRAM_TYPE_LPDDR4) { - /* Use the current timing when training. */ - if (dvfs_with_training) - mrw_req = (23 << EMC_MRW_MRW_MA_SHIFT) | (current_timing->run_clocks & EMC_MRW_MRW_OP_MASK); - else - mrw_req = (23 << EMC_MRW_MRW_MA_SHIFT) | (next_timing->run_clocks & EMC_MRW_MRW_OP_MASK); - - emc_write(mrw_req, EMC_MRW); - } - - /* Per channel burst registers. */ - for (int i = 0; i < next_timing->num_burst_per_ch; i++) { - if (!burst_regs_per_ch_off[i]) - continue; - - if (dram_type != DRAM_TYPE_LPDDR4 && - (burst_regs_per_ch_off[i] == EMC_MRW6 || - burst_regs_per_ch_off[i] == EMC_MRW7 || - burst_regs_per_ch_off[i] == EMC_MRW8 || - burst_regs_per_ch_off[i] == EMC_MRW9 || - burst_regs_per_ch_off[i] == EMC_MRW10 || - burst_regs_per_ch_off[i] == EMC_MRW11 || - burst_regs_per_ch_off[i] == EMC_MRW12 || - burst_regs_per_ch_off[i] == EMC_MRW13 || - burst_regs_per_ch_off[i] == EMC_MRW14 || - burst_regs_per_ch_off[i] == EMC_MRW15)) - continue; - - /* Filter out second channel if not in DUAL_CHANNEL mode. */ - if ((channel_mode != DUAL_CHANNEL) && (burst_regs_per_ch_type[i] >= REG_EMC1)) - continue; - - emc_write_per_ch(next_timing->burst_reg_per_ch[i], burst_regs_per_ch_type[i], burst_regs_per_ch_off[i]); - } - - /* Vref regs. */ - for (int i = 0; i < next_timing->vref_num; i++) { - if (!vref_regs_per_ch_off[i]) - continue; - - if ((channel_mode != DUAL_CHANNEL) && (vref_regs_per_ch_type[i] >= REG_EMC1)) - continue; - - emc_write_per_ch(next_timing->vref_perch_regs[i], vref_regs_per_ch_type[i], vref_regs_per_ch_off[i]); - } - - /* Training regs. */ - if (dvfs_with_training) { - for (int i = 0; i < next_timing->training_mod_num; i++) { - if (!training_mod_regs_per_ch_off[i]) - continue; - - if ((channel_mode != DUAL_CHANNEL) && (training_mod_regs_per_ch_type[i] >= REG_EMC1)) - continue; - - emc_write_per_ch(next_timing->training_mod_regs[i], training_mod_regs_per_ch_type[i], training_mod_regs_per_ch_off[i]); - } - } - - /* Trimmers. */ - for (int i = 0; i < next_timing->num_trim; i++) { - uint32_t trim_reg; - - if (!trim_regs_off[i]) - continue; - - trim_reg = trim_regs_off[i]; - - if (compensate_trimmer_applicable && - (trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 || - trim_reg == EMC_DATA_BRLSHFT_0 || - trim_reg == EMC_DATA_BRLSHFT_1)) { - uint32_t reg = apply_periodic_compensation_trimmer(next_timing, trim_reg); - emc_write(reg, trim_regs_off[i]); - } else { - emc_write(next_timing->trim_regs[i], trim_regs_off[i]); - } - } - - /* Per channel trimmers. */ - for (int i = 0; i < next_timing->num_trim_per_ch; i++) { - uint32_t trim_reg; - - if (!trim_regs_per_ch_off[i]) - continue; - - if ((channel_mode != DUAL_CHANNEL) && (trim_regs_per_ch_type[i] >= REG_EMC1)) - continue; - - trim_reg = trim_regs_per_ch_off[i]; - - if (compensate_trimmer_applicable && - (trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2 || - trim_reg == EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3 || - trim_reg == EMC_DATA_BRLSHFT_0 || - trim_reg == EMC_DATA_BRLSHFT_1)) { - uint32_t reg = apply_periodic_compensation_trimmer(next_timing, trim_reg); - emc_write_per_ch(reg, trim_regs_per_ch_type[i], trim_regs_per_ch_off[i]); - } else { - emc_write_per_ch(next_timing->trim_perch_regs[i], trim_regs_per_ch_type[i], trim_regs_per_ch_off[i]); - } - } - - if (dvfs_with_training) { - if (train_wr && next_timing->periodic_training && (dram_type == DRAM_TYPE_LPDDR4)) { - periodic_compensation_handler(current_timing, next_timing, dram_dev_num, channel_mode, WRITE_TRAINING_SEQUENCE); - } - } else { - /* Write burst_mc_regs. */ - for (int i = 0; i < next_timing->num_mc_regs; i++) { - mc_write(next_timing->burst_mc_regs[i], burst_mc_regs_off[i]); - } - } - - /* Registers to be programmed on the faster clock. */ - if (!dvfs_with_training && (next_timing->rate < current_timing->rate)) { - for (int i = 0; i < next_timing->num_up_down; i++) { - mc_write(next_timing->la_scale_regs[i], la_scale_regs_off[i]); - } - } - - /* Step 9: - * LPDDR4 section A. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 9\n"); - - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_write(emc_zcal_interval, EMC_ZCAL_INTERVAL); - emc_write(emc_zcal_wait_cnt_new, EMC_ZCAL_WAIT_CNT); - emc_write(emc_dbg_o | (EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY), EMC_DBG); - emc_write(emc_zcal_interval, EMC_ZCAL_INTERVAL); - emc_write(emc_dbg_o, EMC_DBG); - - if (dvfs_with_training) { - emc_set_shadow_bypass(ACTIVE); - - emc_write(next_timing->burst_regs[EMC_PMACRO_AUTOCAL_CFG_COMMON_INDEX] | EMC_PMACRO_AUTOCAL_CFG_COMMON_E_CAL_BYPASS_DVFS, EMC_PMACRO_AUTOCAL_CFG_COMMON); - - if (train_ca || train_ca_vref) - emc_write(current_timing->burst_regs[EMC_FBIO_CFG5_INDEX] | EMC_FBIO_CFG5_CMD_BUS_RETURN_TO_ZERO, EMC_FBIO_CFG5); - - emc_set_shadow_bypass(ASSEMBLY); - - if (channel_mode) - ccfifo_write(EMC_CFG_SYNC, 0, 0); - - /* Change CFG_SWAP. */ - ccfifo_write(EMC_DBG, ((emc_dbg_o & 0xF3FFFFFF) | 0x4000000), 0); - } - } - - /* Step 10: - * LPDDR4 and DDR3 common section. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 10\n"); - - if (opt_dvfs_mode == MAN_SR || dram_type == DRAM_TYPE_LPDDR4) { - if (dram_type == DRAM_TYPE_LPDDR4) - ccfifo_write(EMC_SELF_REF, 0x101, 0); - else - ccfifo_write(EMC_SELF_REF, 0x1, 0); - - if (!(train_ca || train_ca_vref) && (dram_type == DRAM_TYPE_LPDDR4) && (source_clock_period <= zqcal_before_cc_cutoff)) { - ccfifo_write(EMC_MRW3, mr13_flip_fspwr ^ 0x40, 0); - ccfifo_write(EMC_MRW6, (next_timing->burst_regs[EMC_MRW6_INDEX] & 0xFFFF3F3F) | (current_timing->burst_regs[EMC_MRW6_INDEX] & 0x0000C0C0), 0); - ccfifo_write(EMC_MRW14, (next_timing->burst_regs[EMC_MRW14_INDEX] & 0xFFFF0707) | (current_timing->burst_regs[EMC_MRW14_INDEX] & 0x00003838), 0); - - if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_MRW7, (next_timing->burst_regs[EMC_MRW7_INDEX] & 0xFFFF3F3F) | (current_timing->burst_regs[EMC_MRW7_INDEX] & 0x0000C0C0), 0); - ccfifo_write(EMC_MRW15, (next_timing->burst_regs[EMC_MRW15_INDEX] & 0xFFFF0707) | (current_timing->burst_regs[EMC_MRW15_INDEX] & 0x00003838), 0); - } - - if (opt_zcal_en_cc) { - if ((dram_dev_num == ONE_RANK) || shared_zq_resistor) - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - else - ccfifo_write(EMC_ZQ_CAL, EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - } - } - } - - emc_dbg = emc_dbg_o; - if (dram_type == DRAM_TYPE_LPDDR4) { - if (dvfs_with_training) { - /* Change CFG_SWAP. */ - emc_dbg = ((emc_dbg_o & 0xF3FFFFFF) | 0x4000000 | EMC_DBG_WRITE_ACTIVE_ONLY); - ccfifo_write(EMC_DBG, emc_dbg, 0); - } - if (train_ca || train_ca_vref) { - ccfifo_write(EMC_PMACRO_DATA_RX_TERM_MODE, current_timing->burst_regs[EMC_PMACRO_DATA_RX_TERM_MODE_INDEX] & 0xFFFFFCCC, 0); - - if ((dram_dev_num == TWO_RANK) && train_swap_rank) { - ccfifo_write(EMC_MRW3, mr13_flip_fspop | 0x8, (1000 * current_timing->dram_timings[T_RP]) / source_clock_period); - ccfifo_write(EMC_MRW3, mr13_catr_enable | 0x8, 0); - } else { - ccfifo_write(EMC_MRW3, mr13_catr_enable | 0x8, (1000 * current_timing->dram_timings[T_RP]) / source_clock_period); - } - - ccfifo_write(EMC_TR_CTRL_0, 0x15A, 0); - ccfifo_write(EMC_INTSTATUS, 0, 1000000 / source_clock_period); - } else { - ccfifo_write(EMC_MRW3, mr13_flip_fspop | 0x8, (1000 * current_timing->dram_timings[T_RP]) / source_clock_period); - ccfifo_write(EMC_INTSTATUS, 0, tFC_lpddr4 / source_clock_period); - } - } - - bool ref_b4_sref_en = false; - bool cya_issue_pc_ref = false; - bool cya_allow_ref_cc = false; - - if ((dram_type == DRAM_TYPE_LPDDR4) || (opt_dvfs_mode != MAN_SR)) { - uint32_t t = 30 + (cya_allow_ref_cc ? (4000 * current_timing->dram_timings[T_RFC]) + ((1000 * current_timing->dram_timings[T_RP]) / source_clock_period) : 0); - ccfifo_write(EMC_PIN, emc_pin_o & ~(EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE), t); - } - - uint32_t ref_delay_mult = 1; - ref_delay_mult += ref_b4_sref_en ? 1 : 0; - ref_delay_mult += cya_allow_ref_cc ? 1 : 0; - ref_delay_mult += cya_issue_pc_ref ? 1 : 0; - uint32_t ref_delay = ref_delay_mult * ((1000 * current_timing->dram_timings[T_RP] / source_clock_period) + (1000 * current_timing->dram_timings[T_RFC] / source_clock_period)) + 20; - - /* Step 11: - * Ramp down. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 11\n"); - - ccfifo_write(EMC_CFG_SYNC, 0, (dram_type == DRAM_TYPE_LPDDR4) ? 0 : ref_delay); - ccfifo_write(EMC_DBG, emc_dbg | (EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY), 0); - uint32_t ramp_down_wait = dvfs_power_ramp_down(false, current_timing, next_timing, source_clock_period); - - /* Step 12: - * Trigger the clock change. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 12\n"); - - ccfifo_write(EMC_STALL_THEN_EXE_AFTER_CLKCHANGE, 1, 0); - if (!dvfs_with_training) { - ccfifo_write(EMC_DBG, (emc_dbg & ~EMC_DBG_WRITE_ACTIVE_ONLY) | EMC_DBG_WRITE_MUX_ACTIVE, 0); - } - - /* Step 13: - * Ramp up. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 13\n"); - - uint32_t ramp_up_wait = dvfs_power_ramp_up(false, current_timing, next_timing, training, destination_clock_period); - ccfifo_write(EMC_DBG, emc_dbg, 0); - - /* Step 14: - * Bringup CKE pins. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 14\n"); - - if ((dram_type == DRAM_TYPE_LPDDR4)) { - uint32_t r = emc_pin_o | EMC_PIN_PIN_CKE; - if (train_ca || train_ca_vref) { - r = emc_pin_o & ~(EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE); - if (dram_dev_num == TWO_RANK) { - if (train_swap_rank) - ccfifo_write(EMC_PIN, r | EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKE, 0); - else - ccfifo_write(EMC_PIN, r | EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB, 0); - } - else - ccfifo_write(EMC_PIN, r, 0); - } else if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_PIN, r | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE_PER_DEV, 0); - } else { - ccfifo_write(EMC_PIN, r & ~(EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE_PER_DEV), 0); - } - } - - /* Step 15: - * Calculate zqlatch wait time; has dependency on ramping times. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 15\n"); - - if (source_clock_period <= zqcal_before_cc_cutoff) { - int t = (int)(ramp_up_wait + ramp_down_wait) / (int)destination_clock_period; - zq_latch_dvfs_wait_time = (int)tZQCAL_lpddr4_fc_adj - t; - } else { - zq_latch_dvfs_wait_time = tZQCAL_lpddr4_fc_adj - div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period); - } - - if (!(train_ca || train_ca_vref) && (dram_type == DRAM_TYPE_LPDDR4) && opt_zcal_en_cc) { - if (dram_dev_num == ONE_RANK) { - if (source_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - } - - if (!dvfs_with_training) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xF3FFFFF7) | 0xC000000, div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - ccfifo_write(EMC_SELF_REF, 0x100, 0); - ccfifo_write(EMC_REF, 0, 0); - } - - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, max_t(int, 0, zq_latch_dvfs_wait_time)); - } else if (shared_zq_resistor) { - if (source_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - } - - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, max_t(int, 0, zq_latch_dvfs_wait_time) + div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, 0); - - if (!dvfs_with_training) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xF3FFFFF7) | 0xC000000, 0); - ccfifo_write(EMC_SELF_REF, 0x100, 0); - ccfifo_write(EMC_REF, 0, 0); - } - - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, tZQCAL_lpddr4 / destination_clock_period); - } else { - if (source_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, EMC_ZQ_CAL_ZQ_CAL_CMD, div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - } - - if (!dvfs_with_training) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xF3FFFFF7) | 0xC000000, div_o3(1000 * next_timing->dram_timings[T_PDEX], destination_clock_period)); - ccfifo_write(EMC_SELF_REF, 0x100, 0); - ccfifo_write(EMC_REF, 0, 0); - } - - ccfifo_write(EMC_ZQ_CAL, EMC_ZQ_CAL_ZQ_LATCH_CMD, max_t(int, 0, zq_latch_dvfs_wait_time)); - } - } - - /* WAR: delay for zqlatch */ - ccfifo_write(EMC_INTSTATUS, 0, 10); - - /* Step 16: - * LPDDR4 Conditional Training Kickoff. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 16\n"); - - if (dvfs_with_training && (dram_type == DRAM_TYPE_LPDDR4)) { - ccfifo_write(EMC_INTSTATUS, 0, (1020000 / destination_clock_period)); - - uint32_t train_cmd = 0; - - if (train_ca) - train_cmd |= (1 << 1); /* CA */ - if (train_ca_vref) - train_cmd |= (1 << 5); /* CA_VREF */ - if (train_quse) - train_cmd |= (1 << 4); /* QUSE */ - if (train_quse_vref) - train_cmd |= (1 << 8); /* QUSE_VREF */ - if (train_wr) - train_cmd |= (1 << 3); /* WR */ - if (train_wr_vref) - train_cmd |= (1 << 6); /* WR_VREF */ - if (train_rd) - train_cmd |= (1 << 2); /* RD */ - if (train_rd_vref) - train_cmd |= (1 << 7); /* RD_VREF */ - - train_cmd |= (1 << 31); /* GO */ - - ccfifo_write(EMC_TRAINING_CMD, train_cmd, 0); - - if (bg_regulator_mode_change) { - if (enable_bg_regulator) - ccfifo_write(EMC_PMACRO_BG_BIAS_CTRL_0, current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD, 0); - else - ccfifo_write(EMC_PMACRO_BG_BIAS_CTRL_0, current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD, 0); - } - - ccfifo_write(EMC_SWITCH_BACK_CTRL, 1, 0); - - if (!(train_ca || train_ca_vref) || train_swap_rank) { - ccfifo_write(EMC_MRW3, mr13_flip_fspop ^ 0xC0, 0); - ccfifo_write(EMC_INTSTATUS, 0, (1000000 / destination_clock_period)); - } - - ccfifo_write(EMC_PIN, emc_pin_o & ~(EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE), 0); - ccfifo_write(EMC_CFG_SYNC, 0, 0); - ccfifo_write(EMC_DBG, emc_dbg | (EMC_DBG_WRITE_ACTIVE_ONLY | EMC_DBG_WRITE_MUX_ACTIVE), 0); - - dvfs_power_ramp_down(true, current_timing, next_timing, destination_clock_period); - - ccfifo_write(EMC_STALL_THEN_EXE_AFTER_CLKCHANGE, 1, 0); - ccfifo_write(EMC_DBG, (emc_dbg & ~EMC_DBG_WRITE_ACTIVE_ONLY) | EMC_DBG_WRITE_MUX_ACTIVE, 0); - - dvfs_power_ramp_up(true, current_timing, next_timing, training, source_clock_period); - - ccfifo_write(EMC_DBG, emc_dbg, 0); - - if (dram_dev_num == TWO_RANK) - ccfifo_write(EMC_PIN, emc_pin_o | (EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE), 0); - else - ccfifo_write(EMC_PIN, (emc_pin_o & ~(EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE)) | EMC_PIN_PIN_CKE, 0); - - if (train_ca || train_ca_vref) { - ccfifo_write(EMC_TR_CTRL_0, 0x4A, (200000 / source_clock_period)); - ccfifo_write(EMC_TR_CTRL_0, 0x40, (1000000 / source_clock_period)); - ccfifo_write(EMC_MRW3, mr13_catr_enable & 0xFFFFFFFE, 0); - ccfifo_write(EMC_INTSTATUS, 0, (1000000 / source_clock_period)); - ccfifo_write(EMC_PMACRO_DATA_RX_TERM_MODE, current_timing->burst_regs[EMC_PMACRO_DATA_RX_TERM_MODE_INDEX], 0); - } - - ccfifo_write(EMC_DBG, emc_dbg_o, 0); - - if (opt_zcal_en_cc) { - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, (1000000 / source_clock_period)); - - if (dram_dev_num == TWO_RANK) { - if (shared_zq_resistor) { - if (!(train_ca || train_ca_vref) || train_swap_rank) { - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, (1000000 / source_clock_period)); - - if (!(train_ca || train_ca_vref)) - ccfifo_write(EMC_MRW3, ((mr13_flip_fspop ^ 0xC0) & 0xF3FFFFF7) | 0xC000000, 0); - } - - ccfifo_write(EMC_SELF_REF, 0x100, 0); - skip_zqcal = true; - } else { - if ((train_ca || train_ca_vref) && !train_swap_rank) { - ccfifo_write(EMC_SELF_REF, 0x100, 0); - skip_zqcal = true; - } else { - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_LATCH_CMD, (1000000 / source_clock_period)); - } - } - } - } - - if (!skip_zqcal) { - if (!(train_ca || train_ca_vref)) - ccfifo_write(EMC_MRW3, ((mr13_flip_fspop ^ 0xC0) & 0xF3FFFFF7) | 0xC000000, 0); - - ccfifo_write(EMC_SELF_REF, 0x100, 0); - } - } - - if (!skip_zqcal) { - /* Step 17: - * MANSR exit self refresh. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 17\n"); - - if ((opt_dvfs_mode == MAN_SR) && (dram_type != DRAM_TYPE_LPDDR4)) - ccfifo_write(EMC_SELF_REF, 0, 0); - - /* Step 18: - * Send MRWs to LPDDR3/DDR3. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 18\n"); - - if (dram_type == DRAM_TYPE_LPDDR2) { - ccfifo_write(EMC_MRW2, next_timing->emc_mrw2, 0); - ccfifo_write(EMC_MRW, next_timing->emc_mrw, 0); - - if (is_lpddr3) { - ccfifo_write(EMC_MRW4, next_timing->emc_mrw4, 0); - } - } else if (dram_type == DRAM_TYPE_DDR3) { - if (opt_dll_mode == DLL_ON) { - ccfifo_write(EMC_EMRS, next_timing->emc_emrs & ~EMC_EMRS_USE_EMRS_LONG_CNT, 0); - } - ccfifo_write(EMC_EMRS2, next_timing->emc_emrs2 & ~EMC_EMRS2_USE_EMRS2_LONG_CNT, 0); - ccfifo_write(EMC_MRS, next_timing->emc_mrs | EMC_EMRS_USE_EMRS_LONG_CNT, 0); - } - - /* Step 19: - * ZQCAL for LPDDR3/DDR3 - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 19\n"); - - if (opt_zcal_en_cc) { - if (dram_type == DRAM_TYPE_LPDDR2) { - uint32_t r; - uint32_t zq_op = opt_cc_short_zcal ? 0x56 : 0xAB; - uint32_t zcal_wait_time_ps = opt_cc_short_zcal ? 90000 : 360000; - uint32_t zcal_wait_time_clocks = div_o3(zcal_wait_time_ps, destination_clock_period); - r = zcal_wait_time_clocks << EMC_MRS_WAIT_CNT2_MRS_EXT2_WAIT_CNT_SHIFT | zcal_wait_time_clocks << EMC_MRS_WAIT_CNT2_MRS_EXT1_WAIT_CNT_SHIFT; - - ccfifo_write(EMC_MRS_WAIT_CNT2, r, 0); - ccfifo_write(EMC_MRW, 2 << EMC_MRW_MRW_DEV_SELECTN_SHIFT | EMC_MRW_USE_MRW_EXT_CNT | 10 << EMC_MRW_MRW_MA_SHIFT | zq_op << EMC_MRW_MRW_OP_SHIFT, 0); - - if (dram_dev_num == TWO_RANK) { - r = 1 << EMC_MRW_MRW_DEV_SELECTN_SHIFT | EMC_MRW_USE_MRW_EXT_CNT | 10 << EMC_MRW_MRW_MA_SHIFT | zq_op << EMC_MRW_MRW_OP_SHIFT; - ccfifo_write(EMC_MRW, r, 0); - } - } else if (dram_type == DRAM_TYPE_DDR3) { - uint32_t zq_op = opt_cc_short_zcal ? 0 : EMC_ZQ_CAL_LONG; - ccfifo_write(EMC_ZQ_CAL, zq_op | 2 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - - if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_ZQ_CAL, zq_op | 1 << EMC_ZQ_CAL_DEV_SEL_SHIFT | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - } - } - } - } - - if (bg_regulator_mode_change) { - emc_set_shadow_bypass(ACTIVE); - - uint32_t bg_regulator_switch_complete_wait_clks = ramp_up_wait > 1250000 ? 0 : (1250000 - ramp_up_wait) / destination_clock_period; - - if (dvfs_with_training) { - bg_regulator_switch_complete_wait_clks = (1250000 / source_clock_period); - ccfifo_write(EMC_PMACRO_BG_BIAS_CTRL_0, current_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX], bg_regulator_switch_complete_wait_clks); - } else { - ccfifo_write(EMC_PMACRO_BG_BIAS_CTRL_0, next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX], bg_regulator_switch_complete_wait_clks); - } - - emc_set_shadow_bypass(ASSEMBLY); - } - - /* Step 20: - * Issue ref and optional QRST. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 20\n"); - - if (dvfs_with_training || (dram_type != DRAM_TYPE_LPDDR4)) - ccfifo_write(EMC_REF, 0, 0); - - if (opt_do_sw_qrst) { - ccfifo_write(EMC_ISSUE_QRST, 1, 0); - ccfifo_write(EMC_ISSUE_QRST, 0, 2); - } - - /* Step 21: - * Restore ZCAL and ZCAL interval. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 21\n"); - - if (save_restore_clkstop_pd || opt_zcal_en_cc) { - emc_set_shadow_bypass(ACTIVE); - - if (opt_zcal_en_cc) { - if (dvfs_with_training) { - ccfifo_write(EMC_ZCAL_INTERVAL, current_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX], 0); - } else if (dram_type != DRAM_TYPE_LPDDR4) { - ccfifo_write(EMC_ZCAL_INTERVAL, next_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX], 0); - } - } - - if (save_restore_clkstop_pd) { - ccfifo_write(EMC_CFG, next_timing->burst_regs[EMC_CFG_INDEX] & ~EMC_CFG_DYN_SELF_REF, 0); - } - - if (dvfs_with_training && (dram_type == DRAM_TYPE_LPDDR4)) { - ccfifo_write(EMC_SEL_DPD_CTRL, current_timing->emc_sel_dpd_ctrl, 0); - } - - emc_set_shadow_bypass(ASSEMBLY); - } - - /* Step 22: - * Restore EMC_CFG_PIPE_CLK. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 22\n"); - - ccfifo_write(EMC_CFG_PIPE_CLK, emc_cfg_pipe_clk_o, 0); - - if (bg_regulator_mode_change) { - if (enable_bg_regulator) { - emc_write(next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BGLP_E_PWRD, EMC_PMACRO_BG_BIAS_CTRL_0); - } else { - emc_write(next_timing->burst_regs[EMC_PMACRO_BG_BIAS_CTRL_0_INDEX] & ~EMC_PMACRO_BG_BIAS_CTRL_0_BG_E_PWRD, EMC_PMACRO_BG_BIAS_CTRL_0); - } - } - - /* Step 23: - * Do clock change. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 23\n"); - - if (dvfs_with_training) { - car->clk_source_emc_safe = car->clk_source_emc; - change_dll_src(current_timing, car->clk_source_emc); - } - - uint32_t cfg_dig_dll_tmp = emc_read(EMC_CFG_DIG_DLL); - cfg_dig_dll_tmp |= EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_TRAFFIC; - cfg_dig_dll_tmp &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_RW_UNTIL_LOCK; - cfg_dig_dll_tmp &= ~EMC_CFG_DIG_DLL_CFG_DLL_STALL_ALL_UNTIL_LOCK; - cfg_dig_dll_tmp &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - cfg_dig_dll_tmp = (cfg_dig_dll_tmp & ~EMC_CFG_DIG_DLL_CFG_DLL_MODE_MASK) | (2 << EMC_CFG_DIG_DLL_CFG_DLL_MODE_SHIFT); - emc_write(cfg_dig_dll_tmp, EMC_CFG_DIG_DLL); - - car->clk_source_emc = next_clk_src; - wait_for_update(EMC_INTSTATUS, EMC_INTSTATUS_CLKCHANGE_COMPLETE, true, REG_EMC); - - /* Step 24: - * Save training results. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 24\n"); - - if (dvfs_with_training) { - uint32_t emc_dbg_tmp = emc_read(EMC_DBG); - emc_write(emc_dbg_tmp | 1, EMC_DBG); /* Set READ_MUX to ASSEMBLY. */ - - /* Save CA results. */ - if (train_ca) { - next_timing->trim_perch_regs[REG_EMC0_EMC_CMD_BRLSHFT_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_CMD_BRLSHFT_0); - next_timing->trim_perch_regs[REG_EMC1_EMC_CMD_BRLSHFT_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_CMD_BRLSHFT_1): 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1,EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5) : 0; - - if (train_self_refresh) { - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2_INDEX] = emc_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2); - } - } - - /* Save CA_VREF results. */ - if (train_ca_vref) { - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW10_INDEX] = (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_CA_VREF) & 0xFFFF) | 0x880C0000; - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW10_INDEX] = (channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_CA_VREF) & 0xFFFF : 0) | 0x880C0000; - - if (dram_dev_num == TWO_RANK) { - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW11_INDEX] = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_CA_VREF) >> 16) & 0xFF) | (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_CA_VREF) >> 24 << 8) | (0x480C0000 & 0xFFFFFF00); - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW11_INDEX] = (((channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_CA_VREF) : 0) >> 16) & 0xFF) | ((channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_CA_VREF) : 0) >> 24 << 8) | (0x480C0000 & 0xFFFFFF00); - } else { - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW11_INDEX] = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_CA_VREF) >> 16) & 0xFF) | (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_CA_VREF) >> 24 << 8) | (0xC80C0000 & 0xFFFFFF00); - - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW11_INDEX] = (((channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_CA_VREF) : 0) >> 16) & 0xFF) | ((channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_CA_VREF) : 0) >> 24 << 8) | (0xC80C0000 & 0xFFFFFF00); - } - } - - /* Save QUSE results. */ - if (train_quse || train_rd) { - next_timing->trim_perch_regs[REG_EMC0_EMC_QUSE_BRLSHFT_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_QUSE_BRLSHFT_0); - next_timing->trim_perch_regs[REG_EMC1_EMC_QUSE_BRLSHFT_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_QUSE_BRLSHFT_1) : 0; - - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_QUSE_DDLL_RANK0_0); - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK0_1_INDEX]= emc_read_per_ch(REG_EMC0, EMC_PMACRO_QUSE_DDLL_RANK0_1); - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK0_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_QUSE_DDLL_RANK0_2) : 0; - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK0_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_QUSE_DDLL_RANK0_3) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_perch_regs[REG_EMC0_EMC_QUSE_BRLSHFT_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_QUSE_BRLSHFT_2); - next_timing->trim_perch_regs[REG_EMC1_EMC_QUSE_BRLSHFT_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_QUSE_BRLSHFT_3) : 0; - - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_QUSE_DDLL_RANK1_0); - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_QUSE_DDLL_RANK1_1); - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK1_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_QUSE_DDLL_RANK1_2) : 0; - next_timing->trim_regs[EMC_PMACRO_QUSE_DDLL_RANK1_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_QUSE_DDLL_RANK1_3) : 0; - } - } - - /* Save QUSE_VREF results. */ - if (train_quse_vref) { - if (dram_dev_num == TWO_RANK) { - uint32_t emc0_opt_dqs_array[4] = {0}; - uint32_t emc1_opt_dqs_array[4] = {0}; - uint32_t emc1_training_opt_dqs_ib_vref_rank0_val = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_DQS_IB_VREF_RANK0) : 0; - uint32_t emc1_training_opt_dqs_ib_vref_rank1_val = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_DQS_IB_VREF_RANK1) : 0; - - for (int i = 0; i < 4; i++) { - emc0_opt_dqs_array[i] = (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQS_IB_VREF_RANK0) >> (8 * i)) & 0xFF; - emc1_opt_dqs_array[i] = (emc1_training_opt_dqs_ib_vref_rank0_val >> (8 * i)) & 0xFF; - } - - uint32_t ib_vref_dqs_0 = 0; - uint32_t ib_vref_dqs_1 = 0; - for (int i = 0; i < 4; i++) - { - ib_vref_dqs_0 |= (emc0_opt_dqs_array[i] + ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQS_IB_VREF_RANK1) >> (8 * i)) & 0xFF)) >> 1 << (8 * i); - ib_vref_dqs_1 |= (emc1_opt_dqs_array[i] + ((emc1_training_opt_dqs_ib_vref_rank1_val >> (8 * i)) & 0xFF)) >> 1 << (8 * i); - } - - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQS_0_INDEX] = ib_vref_dqs_0; - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQS_1_INDEX] = ib_vref_dqs_1; - } - else - { - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQS_0_INDEX] = emc_read(EMC_PMACRO_IB_VREF_DQS_0); - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQS_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_VREF_DQS_1) : 0; - } - } - - /* Save RD results. */ - if (train_rd) { - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2_INDEX]= channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3) : 0; - } - - if (train_self_refresh) { - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2); - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1) : 0; - next_timing->trim_regs[EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2) : 0; - } - } - - /* Save RD_VREF results. */ - if (train_rd_vref) { - uint8_t ib_vref_dq_byte0_icr = (emc_read(EMC_PMACRO_IB_VREF_DQ_0) & 0x7F) + (next_timing->save_restore_mod_regs[0] & 0x7F); - if (next_timing->save_restore_mod_regs[0] & 0x80000000) - ib_vref_dq_byte0_icr = (emc_read(EMC_PMACRO_IB_VREF_DQ_0) & 0x7F) - (next_timing->save_restore_mod_regs[0] & 0x7F); - - uint8_t ib_vref_dq_byte1_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 8) & 0x7F) + (next_timing->save_restore_mod_regs[1] & 0x7F); - if (next_timing->save_restore_mod_regs[1] & 0x80000000) - ib_vref_dq_byte1_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 8) & 0x7F) - (next_timing->save_restore_mod_regs[1] & 0x7F); - - uint8_t ib_vref_dq_byte2_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 16) & 0x7F) + (next_timing->save_restore_mod_regs[2] & 0x7F); - if (next_timing->save_restore_mod_regs[2] & 0x80000000) - ib_vref_dq_byte2_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 16) & 0x7F) - (next_timing->save_restore_mod_regs[2] & 0x7F); - - uint8_t ib_vref_dq_byte3_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 24) & 0x7F) + (next_timing->save_restore_mod_regs[3] & 0x7F); - if (next_timing->save_restore_mod_regs[3] & 0x80000000) - ib_vref_dq_byte3_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_0) >> 24) & 0x7F) - (next_timing->save_restore_mod_regs[3] & 0x7F); - - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQ_0_INDEX] = ((ib_vref_dq_byte0_icr & 0x7F) | (ib_vref_dq_byte1_icr & 0x7F) << 8) | ((ib_vref_dq_byte2_icr & 0x7F) << 16) | ((ib_vref_dq_byte3_icr & 0x7F) << 24); - - uint8_t ib_vref_dq_byte4_icr = (emc_read(EMC_PMACRO_IB_VREF_DQ_1) & 0x7F) + (next_timing->save_restore_mod_regs[4] & 0x7F); - if (next_timing->save_restore_mod_regs[4] & 0x80000000) - ib_vref_dq_byte4_icr = (emc_read(EMC_PMACRO_IB_VREF_DQ_1) & 0x7F) - (next_timing->save_restore_mod_regs[4] & 0x7F); - - uint8_t ib_vref_dq_byte5_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 8) & 0x7F) + (next_timing->save_restore_mod_regs[5] & 0x7F); - if (next_timing->save_restore_mod_regs[5] & 0x80000000) - ib_vref_dq_byte5_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 8) & 0x7F) - (next_timing->save_restore_mod_regs[5] & 0x7F); - - uint8_t ib_vref_dq_byte6_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 16) & 0x7F) + (next_timing->save_restore_mod_regs[6] & 0x7F); - if (next_timing->save_restore_mod_regs[6] & 0x80000000) - ib_vref_dq_byte6_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 16) & 0x7F) - (next_timing->save_restore_mod_regs[6] & 0x7F); - - uint8_t ib_vref_dq_byte7_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 24) & 0x7F) + (next_timing->save_restore_mod_regs[7] & 0x7F); - if (next_timing->save_restore_mod_regs[7] & 0x80000000) - ib_vref_dq_byte7_icr = ((emc_read(EMC_PMACRO_IB_VREF_DQ_1) >> 24) & 0x7F) - (next_timing->save_restore_mod_regs[7] & 0x7F); - - next_timing->trim_regs[EMC_PMACRO_IB_VREF_DQ_1_INDEX] = ((ib_vref_dq_byte4_icr & 0x7F) | (ib_vref_dq_byte5_icr & 0x7F) << 8) | ((ib_vref_dq_byte6_icr & 0x7F) << 16) | ((ib_vref_dq_byte7_icr & 0x7F) << 24); - } - } - - /* Save WR results. */ - if (train_wr) { - next_timing->trim_perch_regs[REG_EMC0_EMC_DATA_BRLSHFT_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_DATA_BRLSHFT_0); - next_timing->trim_perch_regs[REG_EMC1_EMC_DATA_BRLSHFT_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_DATA_BRLSHFT_0) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_perch_regs[REG_EMC0_EMC_DATA_BRLSHFT_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_DATA_BRLSHFT_1); - next_timing->trim_perch_regs[REG_EMC1_EMC_DATA_BRLSHFT_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_DATA_BRLSHFT_1) : 0; - } - - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3) : 0; - } - - if (train_self_refresh) { - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2) : 0; - - if (dram_dev_num == TWO_RANK) { - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2_INDEX] = emc_read_per_ch(REG_EMC0, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2); - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1) : 0; - next_timing->trim_regs[EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2_INDEX] = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2) : 0; - } - } - - /* Save WR_VREF results. */ - if (train_wr_vref) { - uint32_t emc1_ranks_sub_partitions = channel_mode ? emc_read_per_ch(REG_EMC1, EMC_TRAINING_OPT_DQ_OB_VREF) : 0; - - uint8_t emc0_ib_vref_dq_byte8_modded_plus = next_timing->save_restore_mod_regs[8] + emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF); - if (next_timing->save_restore_mod_regs[8] & 0x80000000) - emc0_ib_vref_dq_byte8_modded_plus = emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) - next_timing->save_restore_mod_regs[8]; - - uint8_t emc0_mrw12_op_sp1 = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) & 0xFFFF) >> 8) + next_timing->save_restore_mod_regs[9]; - if (next_timing->save_restore_mod_regs[9] & 0x80000000) - emc0_mrw12_op_sp1 = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) & 0xFFFF) >> 8) - next_timing->save_restore_mod_regs[9]; - - uint8_t emc0_mrw13_op_sp0 = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) >> 16) & 0xFF) + next_timing->save_restore_mod_regs[8]; - if (next_timing->save_restore_mod_regs[8] & 0x80000000) - emc0_mrw13_op_sp0 = ((emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) >> 16) & 0xFF) - next_timing->save_restore_mod_regs[8]; - - uint8_t emc0_ib_vref_dq_byte9_modded_a_plus = next_timing->save_restore_mod_regs[9] + (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) >> 24); - if (next_timing->save_restore_mod_regs[9] & 0x80000000) - emc0_ib_vref_dq_byte9_modded_a_plus = (emc_read_per_ch(REG_EMC0, EMC_TRAINING_OPT_DQ_OB_VREF) >> 24) - (uint8_t)next_timing->save_restore_mod_regs[9]; - - uint8_t emc0_ib_vref_dq_byte10_modded_plus = emc1_ranks_sub_partitions + next_timing->save_restore_mod_regs[10]; - if (next_timing->save_restore_mod_regs[10] & 0x80000000) - emc0_ib_vref_dq_byte10_modded_plus = emc1_ranks_sub_partitions - next_timing->save_restore_mod_regs[10]; - - uint8_t emc0_ib_vref_dq_byte11_modded_plus = ((emc1_ranks_sub_partitions & 0xFFFF) >> 8) + next_timing->save_restore_mod_regs[11]; - if (next_timing->save_restore_mod_regs[11] & 0x80000000) - emc0_ib_vref_dq_byte11_modded_plus = ((emc1_ranks_sub_partitions & 0xFFFF) >> 8) - next_timing->save_restore_mod_regs[11]; - - uint8_t emc1_mrw13_op_sp0 = ((emc1_ranks_sub_partitions >> 16) & 0xFF) + next_timing->save_restore_mod_regs[10]; - if (next_timing->save_restore_mod_regs[10] & 0x80000000) - emc1_mrw13_op_sp0 = ((emc1_ranks_sub_partitions >> 16) & 0xFF) - next_timing->save_restore_mod_regs[10]; - - uint8_t emc1_mrw13_op_sp1 = (emc1_ranks_sub_partitions >> 24) + next_timing->save_restore_mod_regs[11]; - if (next_timing->save_restore_mod_regs[11] & 0x80000000) - emc1_mrw13_op_sp1 = (emc1_ranks_sub_partitions >> 24) - next_timing->save_restore_mod_regs[11]; - - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW12_INDEX] = (uint8_t)emc0_ib_vref_dq_byte10_modded_plus | 0x880E0000 | (emc0_ib_vref_dq_byte11_modded_plus << 8); - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW12_INDEX] = emc0_ib_vref_dq_byte8_modded_plus | 0x880E0000 | (emc0_mrw12_op_sp1 << 8); - - if (dram_dev_num == TWO_RANK) { - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW13_INDEX] = emc0_ib_vref_dq_byte9_modded_a_plus << 8 | emc0_mrw13_op_sp0 | 0x480E0000; - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW13_INDEX] = (emc1_mrw13_op_sp1 << 8) | emc1_mrw13_op_sp0 | 0x480E0000; - } else { - next_timing->burst_reg_per_ch[REG_EMC0_EMC_MRW13_INDEX] = emc0_ib_vref_dq_byte9_modded_a_plus << 8 | emc0_mrw13_op_sp0 | 0xC80E0000; - next_timing->burst_reg_per_ch[REG_EMC1_EMC_MRW13_INDEX] = (emc1_mrw13_op_sp1 << 8) | emc1_mrw13_op_sp0 | 0xC80E0000; - } - } - } - - emc_write(emc_dbg_tmp, EMC_DBG); - } - - /* Step 25: - * Program MC updown registers. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 25\n"); - - if ((next_timing->rate > current_timing->rate) && !dvfs_with_training) { - for (int i = 0; i < next_timing->num_up_down; i++) { - mc_write(next_timing->la_scale_regs[i], la_scale_regs_off[i]); - } - - /* Request a timing update. */ - emc_timing_update(channel_mode); - } - - /* Step 26: - * Restore ZCAL registers. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 26\n"); - - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_set_shadow_bypass(ACTIVE); - emc_write(next_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX], EMC_ZCAL_WAIT_CNT); - emc_write(next_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX], EMC_ZCAL_INTERVAL); - emc_set_shadow_bypass(ASSEMBLY); - } - - if ((dram_type != DRAM_TYPE_LPDDR4) - && opt_zcal_en_cc - && !opt_short_zcal - && opt_cc_short_zcal) - { - udelay(2); - - emc_set_shadow_bypass(ACTIVE); - if (dram_type == DRAM_TYPE_LPDDR2) { - emc_write(next_timing->burst_regs[EMC_MRS_WAIT_CNT_INDEX], EMC_MRS_WAIT_CNT); - } else if (dram_type == DRAM_TYPE_DDR3) { - emc_write(next_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX], EMC_ZCAL_WAIT_CNT); - } - emc_set_shadow_bypass(ASSEMBLY); - } - - /* Step 27: - * Restore EMC_CFG, FDPD registers. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 27\n"); - - emc_set_shadow_bypass(ACTIVE); - emc_write(next_timing->burst_regs[EMC_CFG_INDEX], EMC_CFG); - emc_set_shadow_bypass(ASSEMBLY); - emc_write(next_timing->emc_fdpd_ctrl_cmd_no_ramp, EMC_FDPD_CTRL_CMD_NO_RAMP); - emc_write(next_timing->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - - /* Step 28: - * Training recover. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 28\n"); - - if (dvfs_with_training && (dram_type == DRAM_TYPE_LPDDR4)) { - emc_set_shadow_bypass(ACTIVE); - emc_write(next_timing->burst_regs[EMC_CFG_INDEX], EMC_CFG); - emc_write(next_timing->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - emc_write(current_timing->burst_regs[EMC_ZCAL_WAIT_CNT_INDEX], EMC_ZCAL_WAIT_CNT); - emc_write(current_timing->burst_regs[EMC_ZCAL_INTERVAL_INDEX], EMC_ZCAL_INTERVAL); - emc_write(current_timing->emc_auto_cal_config2, EMC_AUTO_CAL_CONFIG2); - emc_write(current_timing->emc_auto_cal_config3, EMC_AUTO_CAL_CONFIG3); - emc_write(current_timing->emc_auto_cal_config4, EMC_AUTO_CAL_CONFIG4); - emc_write(current_timing->emc_auto_cal_config5, EMC_AUTO_CAL_CONFIG5); - emc_write(current_timing->emc_auto_cal_config6, EMC_AUTO_CAL_CONFIG6); - emc_write(current_timing->emc_auto_cal_config7, EMC_AUTO_CAL_CONFIG7); - emc_write(current_timing->emc_auto_cal_config8, EMC_AUTO_CAL_CONFIG8); - emc_set_shadow_bypass(ASSEMBLY); - emc_write(next_timing->burst_regs[EMC_TR_DVFS_INDEX] & ~EMC_TR_DVFS_TRAINING_DVFS, EMC_TR_DVFS); - } - - emc_set_shadow_bypass(ACTIVE); - emc_write(next_timing->burst_regs[EMC_PMACRO_AUTOCAL_CFG_COMMON_INDEX], EMC_PMACRO_AUTOCAL_CFG_COMMON); - emc_set_shadow_bypass(ASSEMBLY); - - /* Step 29: - * Power fix WAR. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 29\n"); - - emc_write(EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE1 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE2 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE3 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE4 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE5 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE6 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE7, - EMC_PMACRO_CFG_PM_GLOBAL_0); - emc_write(EMC_PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR, EMC_PMACRO_TRAINING_CTRL_0); - emc_write(EMC_PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR, EMC_PMACRO_TRAINING_CTRL_1); - emc_write(0, EMC_PMACRO_CFG_PM_GLOBAL_0); - - /* Step 30: - * Re-enable autocal. - */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 30\n"); - - if (dvfs_with_training) { - emc_auto_cal_config = current_timing->emc_auto_cal_config; - - /* Restore FSP to account for switch back. Only needed in training. */ - g_fsp_for_next_freq = !g_fsp_for_next_freq; - } else { - emc_auto_cal_config = next_timing->emc_auto_cal_config; - - if (next_timing->burst_regs[EMC_CFG_DIG_DLL_INDEX] & EMC_CFG_DIG_DLL_CFG_DLL_EN) { - dll_enable_stall(channel_mode); - } - } - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - done!\n"); -} - -static void do_periodic_emc_compensation(tegra_emc_timing_t* current_timing) { - uint32_t reg_count = 10; - uint32_t reg_list[] = { - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2, - EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3, - EMC_DATA_BRLSHFT_0, - EMC_DATA_BRLSHFT_1 - }; - - if (current_timing->periodic_training) { - int dram_dev_num = ((mc_read(MC_EMEM_ADR_CFG) & 1) + 1); - bool channel_mode = ((current_timing->burst_regs[EMC_FBIO_CFG7_INDEX] >> 2) & 1); - - uint32_t emc_cfg_o = emc_read(EMC_CFG); - uint32_t emc_cfg = emc_cfg_o & ~(EMC_CFG_DYN_SELF_REF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_PD | EMC_CFG_DRAM_CLKSTOP_PD); - - /* - * 1. Power optimizations should be off. - */ - emc_write(emc_cfg, EMC_CFG); - - /* Does emc_timing_update() for above changes. */ - dll_disable(channel_mode); - - if (dram_dev_num == TWO_RANK) { - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_POWERDOWN_MASK, false, REG_EMC1); - } else { - wait_for_update(EMC_EMC_STATUS, 0x10, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, 0x10, false, REG_EMC1); - } - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_DRAM_IN_SELF_REFRESH_MASK, false, REG_EMC1); - - wait_for_update(EMC_EMC_STATUS, 0x01, false, REG_EMC); - if (channel_mode) - wait_for_update(EMC_EMC_STATUS, 0x01, false, REG_EMC1); - - uint32_t emc_cfg_update = emc_read(EMC_CFG_UPDATE); - emc_write((emc_cfg_update & ~EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_MASK) | (2 << EMC_CFG_UPDATE_UPDATE_DLL_IN_UPDATE_SHIFT), EMC_CFG_UPDATE); - - /* - * 2. osc kick off - this assumes training and dvfs have set - * correct MR23. - */ - start_periodic_compensation(); - - /* - * 3. Let dram capture its clock tree delays. - */ - udelay((actual_osc_clocks(current_timing->run_clocks) * 1000) / current_timing->rate + 1); - - /* - * 4. Check delta wrt previous values (save value if margin - * exceeds what is set in table). - */ - uint32_t del = periodic_compensation_handler(current_timing, current_timing, dram_dev_num, channel_mode, PERIODIC_TRAINING_SEQUENCE); - - /* - * 5. Apply compensation w.r.t. trained values (if clock tree - * has drifted more than the set margin). - */ - if (current_timing->tree_margin < ((del * 128 * (current_timing->rate / 1000)) / 1000000)) { - for (int i = 0; i < reg_count; i++) { - uint32_t tmp = apply_periodic_compensation_trimmer(current_timing, reg_list[i]); - emc_write(tmp, reg_list[i]); - } - } - - emc_write(emc_cfg_o, EMC_CFG); - - /* - * 6. Timing update actually applies the new trimmers. - */ - emc_timing_update(channel_mode); - - /* 6.1. Restore the UPDATE_DLL_IN_UPDATE field. */ - emc_write(emc_cfg_update, EMC_CFG_UPDATE); - - /* 6.2. Restore the DLL. */ - dll_enable(channel_mode); - } -} - -static void train_set_clock(tegra_emc_timing_t* current_timing, tegra_emc_timing_t* next_timing, bool update_clk, uint32_t next_clk_src) { - /* Check for dual channel LPDDR4 */ - bool dual_channel_lpddr4_case = ((emc_read(EMC_FBIO_CFG7) & EMC_FBIO_CFG7_CH0_ENABLE) & (emc_read(EMC_FBIO_CFG7) & EMC_FBIO_CFG7_CH1_ENABLE)); - - /* Get the DRAM type */ - uint32_t dram_type = (next_timing->burst_regs[EMC_FBIO_CFG5_INDEX] & 0x03); - - if (g_write_training_pattern) { - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Writing training patterns...\n"); - - /* Write the training data into pattern RAM */ - for (int i = 0; i < 0x100; i++) { - uint32_t training_pattern_val = g_ram_pattern_dq[i + (next_timing->training_pattern * 0x100)]; - - /* Write the DQ data into pattern RAM */ - emc_write(training_pattern_val, EMC_TRAINING_PATRAM_DQ); - - training_pattern_val = g_ram_pattern_dmi[i + (next_timing->training_pattern * 0x100)]; - - /* Write the DMI data into pattern RAM */ - emc_write(training_pattern_val & 0x0F, EMC_TRAINING_PATRAM_DMI); - - /* Enable writing into pattern RAM and select the offset */ - emc_write(0x80000000 + i, EMC_TRAINING_PATRAM_CTRL); - } - } - - /* Only write the training pattern once */ - g_write_training_pattern = false; - - if (next_timing->needs_training && !next_timing->trained) { - uint32_t training_flags = next_timing->needs_training; - - /* Read from MC_EMEM_ADR_CFG */ - uint32_t dram_dev_num = mc_read(MC_EMEM_ADR_CFG); - - int training_params_idx = 0; - int training_params[8] = {}; - - if (training_flags & 0x03) { - training_params_idx = 1; - training_params[0] = (training_flags & 0x203); - - if (dram_dev_num & 0x01) { - training_params_idx = 2; - training_params[1] = (training_flags & 0x303); - } - } - - if ((dram_dev_num & 0x01) && (training_flags & 0x0C)) { - training_params[training_params_idx] = (training_flags & 0x20C); - training_params[training_params_idx + 1] = (training_flags & 0x204); - training_params_idx += 2; - } else if (training_flags & 0x0C) { - training_params[training_params_idx++] = (training_flags & 0x20C); - } - - if (training_flags & 0xF0) - training_params[training_params_idx++] = (training_flags & 0x2F0); - - for (int i = 0; i < training_params_idx; i++) { - /* Adjust the clock */ - set_clock(current_timing, next_timing, training_params[i], next_clk_src); - - /* Change CFG_SWAP to ASSEMBLY_ONLY */ - uint32_t emc_dbg = emc_read(EMC_DBG); - emc_dbg = ((emc_dbg & 0xF3FFFFFF) | 0x8000000); - emc_write(emc_dbg, EMC_DBG); - - /* Change UPDATE_AUTO_CAL_IN_UPDATE to ALWAYS */ - uint32_t emc_cfg_update = emc_read(EMC_CFG_UPDATE); - emc_cfg_update = ((emc_cfg_update & 0xFFFFFFF9) | 0x04); - emc_write(emc_cfg_update, EMC_CFG_UPDATE); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Change UPDATE_AUTO_CAL_IN_UPDATE to NEVER */ - emc_cfg_update = emc_read(EMC_CFG_UPDATE); - emc_cfg_update &= 0xFFFFFFF9; - emc_write(emc_cfg_update, EMC_CFG_UPDATE); - - /* Change CFG_SWAP to ACTIVE_ONLY */ - emc_dbg = emc_read(EMC_DBG); - emc_dbg &= 0xF3FFFFFF; - emc_write(emc_dbg, EMC_DBG); - - /* Disable DLL and change CFG_DLL_MODE to RUN_PERIODIC */ - uint32_t emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll = ((emc_cfg_dig_dll & 0xFFFFFF3E) | 0x80); - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Disable or enable DLL */ - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - if (next_timing->burst_regs[EMC_CFG_DIG_DLL_INDEX] == 0x01) - emc_cfg_dig_dll |= 0x01; - else - emc_cfg_dig_dll &= 0xFFFFFFFE; - - /* Change CFG_DLL_MODE to RUN_PERIODIC */ - emc_cfg_dig_dll = ((emc_cfg_dig_dll & 0xFFFFFF3F) | 0x80); - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - - /* Wait for DLL_LOCK to be set */ - uint32_t emc_dig_dll_status = 0; - do { - emc_dig_dll_status = emc_read(EMC_DIG_DLL_STATUS); - } while (!(emc_dig_dll_status & EMC_DIG_DLL_STATUS_DLL_LOCK)); - - /* Check if DRAM is LPDDR4 */ - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_write(current_timing->burst_regs[EMC_RP_INDEX], EMC_RP); - emc_write(current_timing->burst_regs[EMC_R2P_INDEX], EMC_R2P); - emc_write(current_timing->burst_regs[EMC_W2P_INDEX], EMC_W2P); - emc_write(current_timing->burst_regs[EMC_TRPAB_INDEX], EMC_TRPAB); - } - - /* Request a timing update event */ - emc_timing_update(dual_channel_lpddr4_case); - } - - /* We've finished training */ - next_timing->trained = 1; - - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Memory is trained!\n"); - } - - /* Change the clock if requested */ - if (update_clk) - set_clock(current_timing, next_timing, 0, next_clk_src); -} - -static int train_one(int z_val, uint32_t next_rate, uint32_t current_rate, tegra_emc_timing_t* timing_tables, int timing_tables_count, TrainMode mode) { - int current_timing_table_idx = -1; - int next_timing_table_idx = -1; - tegra_emc_timing_t* current_timing_table; - tegra_emc_timing_t* next_timing_table; - uint32_t next_clk_src = 0; - - /* Too many table entries */ - if (timing_tables_count > 0x384) - return 4; - - /* Locate the right tables for the transition */ - for (int i = 0; i < timing_tables_count; i++) { - uint32_t rate = timing_tables[i].rate; - - if (rate == current_rate) - current_timing_table_idx = i; - else if (rate == next_rate) - next_timing_table_idx = i; - } - - /* Failed to find the tables. */ - if ((current_timing_table_idx < 0) || (next_timing_table_idx < 0)) - return 4; - - current_timing_table = (tegra_emc_timing_t*)&timing_tables[current_timing_table_idx]; - next_timing_table = (tegra_emc_timing_t*)&timing_tables[next_timing_table_idx]; - - uint32_t clk_src_emc_from = current_timing_table->clk_src_emc; - uint32_t clk_src_emc_to = next_timing_table->clk_src_emc; - uint32_t rate_from = current_timing_table->rate; - uint32_t rate_to = next_timing_table->rate; - - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Changing rate from %d to %d!\n", rate_from, rate_to); - - bool diff_freq = test_clk_ratio(rate_to, clk_src_emc_to, rate_from, clk_src_emc_from); - - if (diff_freq) { - uint32_t emc_2x_clk_src = (clk_src_emc_from >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - - if (emc_2x_clk_src & 0x03) { - if ((emc_2x_clk_src - TEGRA_EMC_SRC_PLLMB_UD) <= 1) { - g_is_pllmb = false; - } - } else { - g_is_pllmb = !g_is_pllmb; - } - - /* Configure the PLL values */ - next_clk_src = set_pll(rate_to, 0x9600, clk_src_emc_to, g_is_pllmb); - } else { - uint32_t emc_2x_clk_src = (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - - if ((emc_2x_clk_src != TEGRA_EMC_SRC_PLLMB) && emc_2x_clk_src) { - if (((emc_2x_clk_src - TEGRA_EMC_SRC_PLLM_UD) <= TEGRA_EMC_SRC_PLLC) && g_is_pllmb) { - next_clk_src = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - } - } else if (g_is_pllmb) { - next_clk_src = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - } else { - next_clk_src = clk_src_emc_to; - } - } - - if (mode == OP_SWITCH) { - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_SWITCH!\n"); - set_clock(current_timing_table, next_timing_table, false, next_clk_src); - g_active_timing_table_idx = next_timing_table_idx; - if (next_timing_table->periodic_training) { - do_periodic_emc_compensation(next_timing_table); - } - } else if (mode == OP_TRAIN) { - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_TRAIN!\n"); - train_set_clock(current_timing_table, next_timing_table, false, next_clk_src); - g_active_timing_table_idx = next_timing_table_idx; - if (diff_freq) { - g_is_pllmb = !g_is_pllmb; - } - } else if (mode == OP_TRAIN_SWITCH) { - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_TRAIN_SWITCH!\n"); - train_set_clock(current_timing_table, next_timing_table, true, next_clk_src); - g_active_timing_table_idx = next_timing_table_idx; - if (next_timing_table->periodic_training) { - do_periodic_emc_compensation(next_timing_table); - } - } else - return 4; - - return 0; -} - -static void train_dram_erista(void) { - volatile tegra_car_t *car = car_get_regs(); - - tegra_emc_timing_t *timing_tables; - uint32_t dram_id = fuse_get_dram_id(); - - /* Find the right timing table set. */ - if (dram_id == 0x01) - timing_tables = (tegra_emc_timing_t *)nx_abca2_dram_1; - else if ((dram_id == 0x00) || (dram_id == 0x02) || (dram_id == 0x03) || (dram_id == 0x04)) - timing_tables = (tegra_emc_timing_t *)nx_abca2_dram_0234; - else - fatal_error("[MTC]: Missing tables for DRAM id %d!\n", dram_id); - - /* Locate the right timing table. */ - int boot_index = 0; - for (boot_index = 0; boot_index < MTC_TABLES_MAX_ENTRIES; boot_index++) { - print(SCREEN_LOG_LEVEL_DEBUG, "%d (%d kHz): %s\n", boot_index, timing_tables[boot_index].rate, timing_tables[boot_index].dvfs_ver); - if (car->clk_source_emc == timing_tables[boot_index].clk_src_emc) - break; - } - - if (boot_index >= MTC_TABLES_MAX_ENTRIES) { - fatal_error("[MTC]: Failed to find timing table!\n"); - } - - /* Switch to 800Mhz. */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Switching from %dMhz to 800Mhz\n", timing_tables[boot_index].rate / 1000); - train_one(0, 800000, timing_tables[boot_index].rate, timing_tables, MTC_TABLES_MAX_ENTRIES, OP_TRAIN_SWITCH); - - /* Switch to 1600Mhz. */ - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Switching from %dMhz to 1600Mhz\n", timing_tables[g_active_timing_table_idx].rate / 1000); - train_one(0, 1600000, timing_tables[g_active_timing_table_idx].rate, timing_tables, MTC_TABLES_MAX_ENTRIES, OP_TRAIN_SWITCH); - - /* Wait a while. */ - mdelay(100); - - /* Do periodic compensation. */ - do_periodic_emc_compensation((tegra_emc_timing_t*)&timing_tables[g_active_timing_table_idx]); - - print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Done!\n"); -} - -void train_dram(void) { - if (is_soc_mariko()) { - train_dram_mariko(); - } else { - train_dram_erista(); - } -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mtc/mtc.h b/fusee/fusee-secondary/src/mtc/mtc.h deleted file mode 100644 index 9cf10e392..000000000 --- a/fusee/fusee-secondary/src/mtc/mtc.h +++ /dev/null @@ -1,759 +0,0 @@ -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MTC_H_ -#define FUSEE_MTC_H_ - -#include -#include - -#include "../emc.h" -#include "../mc.h" - -#define MTC_TABLES_MAX_ENTRIES 10 -#define MAX_PLL_CFGS 14 - -#define DVFS_FGCG_HIGH_SPEED_THRESHOLD 1000 -#define IOBRICK_DCC_THRESHOLD 2400 -#define DVFS_FGCG_MID_SPEED_THRESHOLD 600 - -#define TEGRA21_MAX_TABLE_ID_LEN 50 -#define TEGRA_EMC_ISO_USE_FREQ_MAX_NUM 12 -#define PLL_C_DIRECT_FLOOR 333500000 -#define EMC_STATUS_UPDATE_TIMEOUT 2000 -#define TEGRA_EMC_DEFAULT_CLK_LATENCY_US 2000 - -#define TEGRA_EMC_MODE_REG_17 0x00110000 -#define TEGRA_EMC_MRW_DEV_SHIFT 30 -#define TEGRA_EMC_MRW_DEV1 2 -#define TEGRA_EMC_MRW_DEV2 1 - -#define EMC_CLK_EMC_2X_CLK_SRC_SHIFT 29 -#define EMC_CLK_EMC_2X_CLK_SRC_MASK \ - (0x7 << EMC_CLK_EMC_2X_CLK_SRC_SHIFT) -#define EMC_CLK_EMC_2X_CLK_DIVISOR_SHIFT 0 -#define EMC_CLK_EMC_2X_CLK_DIVISOR_MASK \ - (0xff << EMC_CLK_EMC_2X_CLK_DIVISOR_SHIFT) - -enum { - REG_MC, - REG_EMC, - REG_EMC0, - REG_EMC1, -}; - -#define BURST_REGS_PER_CH_LIST \ -{ \ - DEFINE_REG(REG_EMC0, EMC_MRW10), \ - DEFINE_REG(REG_EMC1, EMC_MRW10), \ - DEFINE_REG(REG_EMC0, EMC_MRW11), \ - DEFINE_REG(REG_EMC1, EMC_MRW11), \ - DEFINE_REG(REG_EMC0, EMC_MRW12), \ - DEFINE_REG(REG_EMC1, EMC_MRW12), \ - DEFINE_REG(REG_EMC0, EMC_MRW13), \ - DEFINE_REG(REG_EMC1, EMC_MRW13), \ -} - -#define BURST_REGS_LIST \ -{ \ - DEFINE_REG(REG_EMC, EMC_RC), \ - DEFINE_REG(REG_EMC, EMC_RFC), \ - DEFINE_REG(REG_EMC, EMC_RFCPB), \ - DEFINE_REG(REG_EMC, EMC_REFCTRL2), \ - DEFINE_REG(REG_EMC, EMC_RFC_SLR), \ - DEFINE_REG(REG_EMC, EMC_RAS), \ - DEFINE_REG(REG_EMC, EMC_RP), \ - DEFINE_REG(REG_EMC, EMC_R2W), \ - DEFINE_REG(REG_EMC, EMC_W2R), \ - DEFINE_REG(REG_EMC, EMC_R2P), \ - DEFINE_REG(REG_EMC, EMC_W2P), \ - DEFINE_REG(REG_EMC, EMC_R2R), \ - DEFINE_REG(REG_EMC, EMC_TPPD), \ - DEFINE_REG(REG_EMC, EMC_CCDMW), \ - DEFINE_REG(REG_EMC, EMC_RD_RCD), \ - DEFINE_REG(REG_EMC, EMC_WR_RCD), \ - DEFINE_REG(REG_EMC, EMC_RRD), \ - DEFINE_REG(REG_EMC, EMC_REXT), \ - DEFINE_REG(REG_EMC, EMC_WEXT), \ - DEFINE_REG(REG_EMC, EMC_WDV_CHK), \ - DEFINE_REG(REG_EMC, EMC_WDV), \ - DEFINE_REG(REG_EMC, EMC_WSV), \ - DEFINE_REG(REG_EMC, EMC_WEV), \ - DEFINE_REG(REG_EMC, EMC_WDV_MASK), \ - DEFINE_REG(REG_EMC, EMC_WS_DURATION), \ - DEFINE_REG(REG_EMC, EMC_WE_DURATION), \ - DEFINE_REG(REG_EMC, EMC_QUSE), \ - DEFINE_REG(REG_EMC, EMC_QUSE_WIDTH), \ - DEFINE_REG(REG_EMC, EMC_IBDLY), \ - DEFINE_REG(REG_EMC, EMC_OBDLY), \ - DEFINE_REG(REG_EMC, EMC_EINPUT), \ - DEFINE_REG(REG_EMC, EMC_MRW6), \ - DEFINE_REG(REG_EMC, EMC_EINPUT_DURATION), \ - DEFINE_REG(REG_EMC, EMC_PUTERM_EXTRA), \ - DEFINE_REG(REG_EMC, EMC_PUTERM_WIDTH), \ - DEFINE_REG(REG_EMC, EMC_QRST), \ - DEFINE_REG(REG_EMC, EMC_QSAFE), \ - DEFINE_REG(REG_EMC, EMC_RDV), \ - DEFINE_REG(REG_EMC, EMC_RDV_MASK), \ - DEFINE_REG(REG_EMC, EMC_RDV_EARLY), \ - DEFINE_REG(REG_EMC, EMC_RDV_EARLY_MASK), \ - DEFINE_REG(REG_EMC, EMC_REFRESH), \ - DEFINE_REG(REG_EMC, EMC_BURST_REFRESH_NUM), \ - DEFINE_REG(REG_EMC, EMC_PRE_REFRESH_REQ_CNT), \ - DEFINE_REG(REG_EMC, EMC_PDEX2WR), \ - DEFINE_REG(REG_EMC, EMC_PDEX2RD), \ - DEFINE_REG(REG_EMC, EMC_PCHG2PDEN), \ - DEFINE_REG(REG_EMC, EMC_ACT2PDEN), \ - DEFINE_REG(REG_EMC, EMC_AR2PDEN), \ - DEFINE_REG(REG_EMC, EMC_RW2PDEN), \ - DEFINE_REG(REG_EMC, EMC_CKE2PDEN), \ - DEFINE_REG(REG_EMC, EMC_PDEX2CKE), \ - DEFINE_REG(REG_EMC, EMC_PDEX2MRR), \ - DEFINE_REG(REG_EMC, EMC_TXSR), \ - DEFINE_REG(REG_EMC, EMC_TXSRDLL), \ - DEFINE_REG(REG_EMC, EMC_TCKE), \ - DEFINE_REG(REG_EMC, EMC_TCKESR), \ - DEFINE_REG(REG_EMC, EMC_TPD), \ - DEFINE_REG(REG_EMC, EMC_TFAW), \ - DEFINE_REG(REG_EMC, EMC_TRPAB), \ - DEFINE_REG(REG_EMC, EMC_TCLKSTABLE), \ - DEFINE_REG(REG_EMC, EMC_TCLKSTOP), \ - DEFINE_REG(REG_EMC, EMC_MRW7), \ - DEFINE_REG(REG_EMC, EMC_TREFBW), \ - DEFINE_REG(REG_EMC, EMC_ODT_WRITE), \ - DEFINE_REG(REG_EMC, EMC_FBIO_CFG5), \ - DEFINE_REG(REG_EMC, EMC_FBIO_CFG7), \ - DEFINE_REG(REG_EMC, EMC_CFG_DIG_DLL), \ - DEFINE_REG(REG_EMC, EMC_CFG_DIG_DLL_PERIOD), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_RXRT), \ - DEFINE_REG(REG_EMC, EMC_CFG_PIPE_1), \ - DEFINE_REG(REG_EMC, EMC_CFG_PIPE_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_5), \ - DEFINE_REG(REG_EMC, EMC_MRW8), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_LONG_CMD_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_LONG_CMD_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_LONG_CMD_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_LONG_CMD_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_LONG_CMD_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_SHORT_CMD_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_SHORT_CMD_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_SHORT_CMD_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD2_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_CMD3_3), \ - DEFINE_REG(REG_EMC, EMC_TXDSRVTTGEN), \ - DEFINE_REG(REG_EMC, EMC_FDPD_CTRL_DQ), \ - DEFINE_REG(REG_EMC, EMC_FDPD_CTRL_CMD), \ - DEFINE_REG(REG_EMC, EMC_FBIO_SPARE), \ - DEFINE_REG(REG_EMC, EMC_ZCAL_INTERVAL), \ - DEFINE_REG(REG_EMC, EMC_ZCAL_WAIT_CNT), \ - DEFINE_REG(REG_EMC, EMC_MRS_WAIT_CNT), \ - DEFINE_REG(REG_EMC, EMC_MRS_WAIT_CNT2), \ - DEFINE_REG(REG_EMC, EMC_AUTO_CAL_CHANNEL), \ - DEFINE_REG(REG_EMC, EMC_DLL_CFG_0), \ - DEFINE_REG(REG_EMC, EMC_DLL_CFG_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_AUTOCAL_CFG_COMMON), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_ZCTRL), \ - DEFINE_REG(REG_EMC, EMC_CFG), \ - DEFINE_REG(REG_EMC, EMC_CFG_PIPE), \ - DEFINE_REG(REG_EMC, EMC_DYN_SELF_REF_CONTROL), \ - DEFINE_REG(REG_EMC, EMC_QPOP), \ - DEFINE_REG(REG_EMC, EMC_DQS_BRLSHFT_0), \ - DEFINE_REG(REG_EMC, EMC_DQS_BRLSHFT_1), \ - DEFINE_REG(REG_EMC, EMC_CMD_BRLSHFT_2), \ - DEFINE_REG(REG_EMC, EMC_CMD_BRLSHFT_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_PAD_CFG_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DATA_PAD_RX_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_PAD_RX_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DATA_RX_TERM_MODE), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_RX_TERM_MODE), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_PAD_TX_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DATA_PAD_TX_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_COMMON_PAD_TX_CTRL), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_VTTGEN_CTRL_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_VTTGEN_CTRL_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_VTTGEN_CTRL_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_BRICK_CTRL_RFU1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_BRICK_CTRL_FDPD), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_BRICK_CTRL_RFU2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DATA_BRICK_CTRL_FDPD), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_BG_BIAS_CTRL_0), \ - DEFINE_REG(REG_EMC, EMC_CFG_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_PWRD_5), \ - DEFINE_REG(REG_EMC, EMC_CONFIG_SAMPLE_DELAY), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_TX_SEL_CLK_SRC_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_BYPASS), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_PWRD_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_PWRD_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_DDLL_PWRD_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_CTRL_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_CTRL_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_CMD_CTRL_2), \ - DEFINE_REG(REG_EMC, EMC_TR_TIMING_0), \ - DEFINE_REG(REG_EMC, EMC_TR_DVFS), \ - DEFINE_REG(REG_EMC, EMC_TR_CTRL_1), \ - DEFINE_REG(REG_EMC, EMC_TR_RDV), \ - DEFINE_REG(REG_EMC, EMC_TR_QPOP), \ - DEFINE_REG(REG_EMC, EMC_TR_RDV_MASK), \ - DEFINE_REG(REG_EMC, EMC_MRW14), \ - DEFINE_REG(REG_EMC, EMC_TR_QSAFE), \ - DEFINE_REG(REG_EMC, EMC_TR_QRST), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_SETTLE), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_VREF_SETTLE), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_CA_FINE_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_CA_CTRL_MISC), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_CA_CTRL_MISC1), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_CA_VREF_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_QUSE_CORS_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_QUSE_FINE_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_QUSE_CTRL_MISC), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_QUSE_VREF_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_READ_FINE_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_READ_CTRL_MISC), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_READ_VREF_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_WRITE_FINE_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_WRITE_CTRL_MISC), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_WRITE_VREF_CTRL), \ - DEFINE_REG(REG_EMC, EMC_TRAINING_MPC), \ - DEFINE_REG(REG_EMC, EMC_MRW15), \ -} - -#define TRIM_REGS_PER_CH_LIST \ -{ \ - DEFINE_REG(REG_EMC0, EMC_CMD_BRLSHFT_0), \ - DEFINE_REG(REG_EMC1, EMC_CMD_BRLSHFT_1), \ - DEFINE_REG(REG_EMC0, EMC_DATA_BRLSHFT_0), \ - DEFINE_REG(REG_EMC1, EMC_DATA_BRLSHFT_0), \ - DEFINE_REG(REG_EMC0, EMC_DATA_BRLSHFT_1), \ - DEFINE_REG(REG_EMC1, EMC_DATA_BRLSHFT_1), \ - DEFINE_REG(REG_EMC0, EMC_QUSE_BRLSHFT_0), \ - DEFINE_REG(REG_EMC1, EMC_QUSE_BRLSHFT_1), \ - DEFINE_REG(REG_EMC0, EMC_QUSE_BRLSHFT_2), \ - DEFINE_REG(REG_EMC1, EMC_QUSE_BRLSHFT_3), \ -} - -#define TRIM_REGS_LIST \ -{ \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_VREF_DQS_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_VREF_DQS_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_VREF_DQ_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_IB_VREF_DQ_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK0_3), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_0), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_1), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_2), \ - DEFINE_REG(REG_EMC, EMC_PMACRO_QUSE_DDLL_RANK1_3), \ -} - -#define VREF_REGS_PER_CH_LIST \ -{ \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_OPT_DQS_IB_VREF_RANK0), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_OPT_DQS_IB_VREF_RANK0), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_OPT_DQS_IB_VREF_RANK1), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_OPT_DQS_IB_VREF_RANK1), \ -} - -#define TRAINING_MOD_REGS_PER_CH_LIST \ -{ \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_IB_BYTE0), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_IB_BYTE0), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_IB_BYTE1), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_IB_BYTE1), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_IB_BYTE2), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_IB_BYTE2), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_IB_BYTE3), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_IB_BYTE3), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_IB_MISC), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_IB_MISC), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_OB_BYTE0), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_OB_BYTE0), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_OB_BYTE1), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_OB_BYTE1), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_OB_BYTE2), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_OB_BYTE2), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_OB_BYTE3), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_OB_BYTE3), \ - DEFINE_REG(REG_EMC0, EMC_TRAINING_RW_OFFSET_OB_MISC), \ - DEFINE_REG(REG_EMC1, EMC_TRAINING_RW_OFFSET_OB_MISC), \ -} - -#define BURST_MC_REGS_LIST \ -{ \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_CFG), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_OUTSTANDING_REQ), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_REFPB_HP_CTRL), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_REFPB_BANK_CTRL), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RCD), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RP), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RC), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RAS), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_FAW), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RRD), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RAP2PRE), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_WAP2PRE), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_R2R), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_W2W), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_R2W), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_CCDMW), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_W2R), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_TIMING_RFCPB), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DA_TURNS), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DA_COVERS), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_MISC0), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_MISC1), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_MISC2), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_RING1_THROTTLE), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_CTRL), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6), \ - DEFINE_REG(REG_MC, MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7), \ -} - -#define BURST_UP_DOWN_REGS_LIST \ -{ \ - DEFINE_REG(REG_MC, MC_MLL_MPCORER_PTSA_RATE), \ - DEFINE_REG(REG_MC, MC_FTOP_PTSA_RATE), \ - DEFINE_REG(REG_MC, MC_PTSA_GRANT_DECREMENT), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_XUSB_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_XUSB_1), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_TSEC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_SDMMCA_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_SDMMCAA_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_SDMMC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_SDMMCAB_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_PPCS_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_PPCS_1), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_MPCORE_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_HC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_HC_1), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_AVPC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_GPU_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_GPU2_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_NVENC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_NVDEC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_VIC_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_VI2_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_ISP2_0), \ - DEFINE_REG(REG_MC, MC_LATENCY_ALLOWANCE_ISP2_1), \ -} - -#define DEFINE_REG(type, reg) reg##_INDEX -enum BURST_REGS_LIST; -enum TRIM_REGS_LIST; -enum BURST_MC_REGS_LIST; -enum BURST_UP_DOWN_REGS_LIST; -#undef DEFINE_REG - -#define DEFINE_REG(type, reg) type##_##reg##_INDEX -enum BURST_REGS_PER_CH_LIST; -enum TRIM_REGS_PER_CH_LIST; -enum VREF_REGS_PER_CH_LIST; -enum TRAINING_MOD_REGS_PER_CH_LIST; -#undef DEFINE_REG - -typedef struct { - uint32_t rev; - char dvfs_ver[60]; - uint32_t rate; - uint32_t min_volt; - uint32_t gpu_min_volt; - char clock_src[32]; - uint32_t clk_src_emc; - uint32_t needs_training; - uint32_t training_pattern; - uint32_t trained; - - uint32_t periodic_training; - uint32_t trained_dram_clktree_c0d0u0; - uint32_t trained_dram_clktree_c0d0u1; - uint32_t trained_dram_clktree_c0d1u0; - uint32_t trained_dram_clktree_c0d1u1; - uint32_t trained_dram_clktree_c1d0u0; - uint32_t trained_dram_clktree_c1d0u1; - uint32_t trained_dram_clktree_c1d1u0; - uint32_t trained_dram_clktree_c1d1u1; - uint32_t current_dram_clktree_c0d0u0; - uint32_t current_dram_clktree_c0d0u1; - uint32_t current_dram_clktree_c0d1u0; - uint32_t current_dram_clktree_c0d1u1; - uint32_t current_dram_clktree_c1d0u0; - uint32_t current_dram_clktree_c1d0u1; - uint32_t current_dram_clktree_c1d1u0; - uint32_t current_dram_clktree_c1d1u1; - uint32_t run_clocks; - uint32_t tree_margin; - - uint32_t num_burst; - uint32_t num_burst_per_ch; - uint32_t num_trim; - uint32_t num_trim_per_ch; - uint32_t num_mc_regs; - uint32_t num_up_down; - uint32_t vref_num; - uint32_t training_mod_num; - uint32_t dram_timing_num; - - uint32_t ptfv_list[12]; - - uint32_t burst_regs[221]; - uint32_t burst_reg_per_ch[8]; - uint32_t shadow_regs_ca_train[221]; - uint32_t shadow_regs_quse_train[221]; - uint32_t shadow_regs_rdwr_train[221]; - - uint32_t trim_regs[138]; - uint32_t trim_perch_regs[10]; - - uint32_t vref_perch_regs[4]; - - uint32_t dram_timings[5]; - uint32_t training_mod_regs[20]; - uint32_t save_restore_mod_regs[12]; - uint32_t burst_mc_regs[33]; - uint32_t la_scale_regs[24]; - - uint32_t min_mrs_wait; - uint32_t emc_mrw; - uint32_t emc_mrw2; - uint32_t emc_mrw3; - uint32_t emc_mrw4; - uint32_t emc_mrw9; - uint32_t emc_mrs; - uint32_t emc_emrs; - uint32_t emc_emrs2; - uint32_t emc_auto_cal_config; - uint32_t emc_auto_cal_config2; - uint32_t emc_auto_cal_config3; - uint32_t emc_auto_cal_config4; - uint32_t emc_auto_cal_config5; - uint32_t emc_auto_cal_config6; - uint32_t emc_auto_cal_config7; - uint32_t emc_auto_cal_config8; - uint32_t emc_cfg_2; - uint32_t emc_sel_dpd_ctrl; - uint32_t emc_fdpd_ctrl_cmd_no_ramp; - uint32_t dll_clk_src; - uint32_t clk_out_enb_x_0_clk_enb_emc_dll; - uint32_t latency; -} tegra_emc_timing_t; - -typedef struct { - uint32_t osc_freq; - uint32_t out_freq; - uint32_t feedback_div; - uint32_t input_div; - uint32_t post_div; -} pll_cfg_t; - -typedef enum { - OP_SWITCH = 0, - OP_TRAIN = 1, - OP_TRAIN_SWITCH = 2 -} TrainMode; - -typedef enum { - TEGRA_EMC_SRC_PLLM, - TEGRA_EMC_SRC_PLLC, - TEGRA_EMC_SRC_PLLP, - TEGRA_EMC_SRC_CLKM, - TEGRA_EMC_SRC_PLLM_UD, - TEGRA_EMC_SRC_PLLMB_UD, - TEGRA_EMC_SRC_PLLMB, - TEGRA_EMC_SRC_PLLP_UD, - TEGRA_EMC_SRC_COUNT, -} EmcSource; - -enum { - DRAM_TYPE_DDR3 = 0, - DRAM_TYPE_LPDDR4 = 1, - DRAM_TYPE_LPDDR2 = 2, - DRAM_TYPE_DDR2 = 3, -}; - -enum { - DLL_CHANGE_NONE = 0, - DLL_CHANGE_ON, - DLL_CHANGE_OFF, -}; - -enum { - DLL_OFF, - DLL_ON -}; - -enum { - AUTO_PD = 0, - MAN_SR = 2 -}; - -enum { - ASSEMBLY = 0, - ACTIVE -}; - -enum { - T_RP = 0, - T_FC_LPDDR4, - T_RFC, - T_PDEX, - RL -}; - -enum { - ONE_RANK = 1, - TWO_RANK = 2 -}; - -enum { - SINGLE_CHANNEL = 0, - DUAL_CHANNEL -}; - -enum { - DRAM_DEV_SEL_ALL = 0, - DRAM_DEV_SEL_0 = (2 << 30), - DRAM_DEV_SEL_1 = (1 << 30), -}; - -enum { - EMC_CFG5_QUSE_MODE_NORMAL = 0, - EMC_CFG5_QUSE_MODE_ALWAYS_ON, - EMC_CFG5_QUSE_MODE_INTERNAL_LPBK, - EMC_CFG5_QUSE_MODE_PULSE_INTERN, - EMC_CFG5_QUSE_MODE_PULSE_EXTERN, - EMC_CFG5_QUSE_MODE_DIRECT_QUSE, -}; - -enum { - DVFS_SEQUENCE = 1, - WRITE_TRAINING_SEQUENCE = 2, - PERIODIC_TRAINING_SEQUENCE = 3, - DVFS_PT1 = 10, - DVFS_UPDATE = 11, - TRAINING_PT1 = 12, - TRAINING_UPDATE = 13, - PERIODIC_TRAINING_UPDATE = 14 -}; - -enum { - TEGRA_DRAM_OVER_TEMP_NONE = 0, - TEGRA_DRAM_OVER_TEMP_REFRESH_X2, - TEGRA_DRAM_OVER_TEMP_REFRESH_X4, - TEGRA_DRAM_OVER_TEMP_THROTTLE, - TEGRA_DRAM_OVER_TEMP_MAX, -}; - -/* Train all possible DRAM sequences. */ -void train_dram(void); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mtc/mtc_b01.c b/fusee/fusee-secondary/src/mtc/mtc_b01.c deleted file mode 100644 index 40c0f070a..000000000 --- a/fusee/fusee-secondary/src/mtc/mtc_b01.c +++ /dev/null @@ -1,4193 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "mtc.h" -#include "mtc_b01.h" -#include "mtc_tables_b01.h" -#include "../car.h" -#include "../fuse.h" -#include "../timers.h" -#include "../../../../fusee/common/log.h" - -/* - * Macros. - */ -#define max(x, y) ({ \ - typeof(x) _max1 = (x); \ - typeof(y) _max2 = (y); \ - (void) (&_max1 == &_max2); \ - _max1 > _max2 ? _max1 : _max2; }) - -#define max_t(type, x, y) ({ \ - type __max1 = (x); \ - type __max2 = (y); \ - __max1 > __max2 ? __max1: __max2; }) - -/* - * PTFV defines - basically just indexes into the per table PTFV array. - */ -#define PTFV_CONFIG_CTRL_USE_PREVIOUS_EMA (1 << 0) - -/* - * Do arithmetic in fixed point. - */ -#define MOVAVG_PRECISION_FACTOR 100 - -/* - * The division portion of the average operation. - */ -#define __AVERAGE_PTFV(dev) \ - ({ dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev = \ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev / \ - dst_timing_tables->ptfv_list.ptfv_dvfs_samples; }) - -/* - * The division portion of the average write operation. - */ -#define __AVERAGE_WRITE_PTFV(dev) \ - ({ dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev = \ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev / \ - dst_timing_tables->ptfv_list.ptfv_write_samples; }) - -/* - * Convert val to fixed point and add it to the temporary average. - */ -#define __INCREMENT_PTFV(dev, val) \ - ({ dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev += \ - ((val) * MOVAVG_PRECISION_FACTOR); }) - -/* - * Convert a moving average back to integral form and return the value. - */ -#define __MOVAVG_AC(timing, dev) \ - ((timing)->ptfv_list.ptfv_dqsosc_movavg_ ## dev / \ - MOVAVG_PRECISION_FACTOR) - -/* Weighted update. */ -#define __WEIGHTED_UPDATE_PTFV(dev, nval) \ - do { \ - \ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev = \ - ((nval * MOVAVG_PRECISION_FACTOR) + \ - (dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_ ## dev * \ - dst_timing_tables->ptfv_list.ptfv_movavg_weight)) / \ - (dst_timing_tables->ptfv_list.ptfv_movavg_weight + 1); \ - } while (0) - -/* Access a particular average. */ -#define __MOVAVG(timing, dev) \ - ((timing)->ptfv_list.ptfv_dqsosc_movavg_ ## dev) - - -static int g_active_timing_table_idx = -1; -static uint32_t g_next_pll = 0; -static uint32_t g_program_pllm_ret = 0; -static uint32_t g_wrote_training_pattern = 0; -static uint32_t g_fsp_for_next_freq = 0; - -static bool g_trained_dram = false; - -static uint32_t g_periodic_timmer_compensation_intermediates[9 * 0x10] = {}; - -/* Register read/write helpers. */ -static inline uint32_t mmio_read(volatile uint32_t *reg) { - const uint32_t value = *reg; - - return value; -} - -static inline void mmio_write(uint32_t val, volatile uint32_t *reg) { - *reg = val; -} - -static inline void mc_write(uint32_t val, uint32_t offset) { - mmio_write(val, &(MAKE_MC_REG(offset))); -} - -static inline uint32_t mc_read(uint32_t offset) { - return mmio_read(&(MAKE_MC_REG(offset))); -} - -static inline void emc_write(uint32_t val, uint32_t offset) { - mmio_write(val, &(MAKE_EMC_REG(offset))); -} - -static inline uint32_t emc_read(uint32_t offset) { - return mmio_read(&(MAKE_EMC_REG(offset))); -} - -static inline void emc0_write(uint32_t val, uint32_t offset) { - mmio_write(val, &(MAKE_EMC0_REG(offset))); -} - -static inline uint32_t emc0_read(uint32_t offset) { - return mmio_read(&(MAKE_EMC0_REG(offset))); -} - -static inline void emc1_write(uint32_t val, uint32_t offset) { - mmio_write(val, &(MAKE_EMC1_REG(offset))); -} - -static inline uint32_t emc1_read(uint32_t offset) { - return mmio_read(&(MAKE_EMC1_REG(offset))); -} - -static inline uint32_t car_read(volatile uint32_t *reg) { - return mmio_read(reg); -} - -static inline void car_write(uint32_t val, volatile uint32_t *reg) { - mmio_write(val, reg); -} - -static inline void emc_write_per_ch(uint32_t val, uint32_t addr, uint32_t fbio_cfg7) { - if ((addr & 0xFFFFF000) == EMC0_BASE && (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE)) { - emc0_write(val, addr & 0xFFF); - } else if ((addr & 0xFFFFF000) == EMC1_BASE && (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE)) { - emc1_write(val, addr & 0xFFF); - } -} - -/* Configure clock change sequence FIFO */ -static void ccfifo_write(uint32_t ccfifo_addr, uint32_t ccfifo_data, uint32_t ccfifo_stall_cnt) { - emc_write(ccfifo_data, EMC_CCFIFO_DATA); - emc_write((ccfifo_addr & 0xFFFF) | ((ccfifo_stall_cnt & 0x7FFF) << 16) | 0x80000000, EMC_CCFIFO_ADDR); -} - -static uint32_t g_burst_regs_addr[sizeof(t210b01_emc_burst_regs) / sizeof(uint32_t)] = { - // TODO: By name instead of address - EMC_BASE + 0x02C, - EMC_BASE + 0x030, - EMC_BASE + 0x590, - EMC_BASE + 0x580, - EMC_BASE + 0x0C0, - EMC_BASE + 0x034, - EMC_BASE + 0x038, - EMC_BASE + 0x03C, - EMC_BASE + 0x040, - EMC_BASE + 0x044, - EMC_BASE + 0x048, - EMC_BASE + 0x144, - EMC_BASE + 0x0AC, - EMC_BASE + 0x0BC, - EMC_BASE + 0x0F8, - EMC_BASE + 0x0FC, - EMC_BASE + 0x108, - EMC_BASE + 0x10C, - EMC_BASE + 0x5C0, - EMC_BASE + 0x04C, - EMC_BASE + 0x050, - EMC_BASE + 0x054, - EMC_BASE + 0x058, - EMC_BASE + 0x0B8, - EMC_BASE + 0x4E0, - EMC_BASE + 0x05C, - EMC_BASE + 0x498, - EMC_BASE + 0x494, - EMC_BASE + 0x2D0, - EMC_BASE + 0x490, - EMC_BASE + 0x48C, - EMC_BASE + 0x060, - EMC_BASE + 0x568, - EMC_BASE + 0x468, - EMC_BASE + 0x46C, - EMC_BASE + 0x14C, - EMC_BASE + 0x4A4, - EMC_BASE + 0x150, - EMC_BASE + 0x154, - EMC_BASE + 0x56C, - EMC_BASE + 0x064, - EMC_BASE + 0x068, - EMC_BASE + 0x06C, - EMC_BASE + 0x2CC, - EMC_BASE + 0x2D8, - EMC_BASE + 0x2D4, - EMC_BASE + 0x070, - EMC_BASE + 0x074, - EMC_BASE + 0x3DC, - EMC_BASE + 0x078, - EMC_BASE + 0x07C, - EMC_BASE + 0x080, - EMC_BASE + 0x084, - EMC_BASE + 0x088, - EMC_BASE + 0x08C, - EMC_BASE + 0x11C, - EMC_BASE + 0x118, - EMC_BASE + 0x0B4, - EMC_BASE + 0x090, - EMC_BASE + 0x3E4, - EMC_BASE + 0x094, - EMC_BASE + 0x158, - EMC_BASE + 0x15C, - EMC_BASE + 0x098, - EMC_BASE + 0x09C, - EMC_BASE + 0x0A0, - EMC_BASE + 0x0A4, - EMC_BASE + 0x4A8, - EMC_BASE + 0x0A8, - EMC_BASE + 0x0B0, - EMC_BASE + 0x104, - EMC_BASE + 0x584, - EMC_BASE + 0x2BC, - EMC_BASE + 0x2C0, - EMC_BASE + 0xCF4, - EMC_BASE + 0x55C, - EMC_BASE + 0x554, - EMC_BASE + 0x610, - EMC_BASE + 0x614, - EMC_BASE + 0x630, - EMC_BASE + 0x634, - EMC_BASE + 0x4AC, - EMC_BASE + 0x670, - EMC_BASE + 0x674, - EMC_BASE + 0x680, - EMC_BASE + 0x684, - EMC_BASE + 0x688, - EMC_BASE + 0x68C, - EMC_BASE + 0x690, - EMC_BASE + 0x694, - EMC_BASE + 0x6A0, - EMC_BASE + 0x6A4, - EMC_BASE + 0x6A8, - EMC_BASE + 0x6AC, - EMC_BASE + 0x6B0, - EMC_BASE + 0x6B4, - EMC_BASE + 0xC00, - EMC_BASE + 0xC04, - EMC_BASE + 0xC08, - EMC_BASE + 0xC0C, - EMC_BASE + 0xC10, - EMC_BASE + 0xC20, - EMC_BASE + 0xC24, - EMC_BASE + 0xC28, - EMC_BASE + 0x80C, - EMC_BASE + 0x81C, - EMC_BASE + 0x82C, - EMC_BASE + 0x83C, - EMC_BASE + 0x84C, - EMC_BASE + 0x85C, - EMC_BASE + 0x86C, - EMC_BASE + 0x87C, - EMC_BASE + 0x88C, - EMC_BASE + 0x89C, - EMC_BASE + 0x8AC, - EMC_BASE + 0x8BC, - EMC_BASE + 0x90C, - EMC_BASE + 0x91C, - EMC_BASE + 0x92C, - EMC_BASE + 0x93C, - EMC_BASE + 0x94C, - EMC_BASE + 0x95C, - EMC_BASE + 0x96C, - EMC_BASE + 0x97C, - EMC_BASE + 0x980, - EMC_BASE + 0x984, - EMC_BASE + 0x988, - EMC_BASE + 0x98C, - EMC_BASE + 0x990, - EMC_BASE + 0x994, - EMC_BASE + 0x998, - EMC_BASE + 0x99C, - EMC_BASE + 0x9A0, - EMC_BASE + 0x9A4, - EMC_BASE + 0x9A8, - EMC_BASE + 0x9AC, - EMC_BASE + 0x9B0, - EMC_BASE + 0x9B4, - EMC_BASE + 0x9B8, - EMC_BASE + 0x9BC, - EMC_BASE + 0x480, - EMC_BASE + 0x310, - EMC_BASE + 0x314, - EMC_BASE + 0x100, - EMC_BASE + 0x2E0, - EMC_BASE + 0x2E4, - EMC_BASE + 0x0C8, - EMC_BASE + 0x0C4, - EMC_BASE + 0x464, - EMC_BASE + 0x5E4, - EMC_BASE + 0x5E8, - EMC_BASE + 0x5F8, - EMC_BASE + 0xC78, - EMC_BASE + 0xC44, - EMC_BASE + 0x00C, - EMC_BASE + 0x560, - EMC_BASE + 0x3E0, - EMC_BASE + 0x564, - EMC_BASE + 0x594, - EMC_BASE + 0x598, - EMC_BASE + 0x5A4, - EMC_BASE + 0x5A8, - EMC_BASE + 0xC40, - EMC_BASE + 0xC54, - EMC_BASE + 0xC50, - EMC_BASE + 0xC5C, - EMC_BASE + 0xC58, - EMC_BASE + 0xC60, - EMC_BASE + 0xC64, - EMC_BASE + 0xC34, - EMC_BASE + 0xC38, - EMC_BASE + 0xCF0, - EMC_BASE + 0x330, - EMC_BASE + 0x318, - EMC_BASE + 0x334, - EMC_BASE + 0x31C, - EMC_BASE + 0xC3C, - EMC_BASE + 0x49C, - EMC_BASE + 0x720, - EMC_BASE + 0x724, - EMC_BASE + 0x728, - EMC_BASE + 0x72C, - EMC_BASE + 0x730, - EMC_BASE + 0x734, - EMC_BASE + 0x5F0, - EMC_BASE + 0x740, - EMC_BASE + 0x744, - EMC_BASE + 0x748, - EMC_BASE + 0x74C, - EMC_BASE + 0x750, - EMC_BASE + 0x754, - EMC_BASE + 0x760, - EMC_BASE + 0x770, - EMC_BASE + 0x774, - EMC_BASE + 0x778, - EMC_BASE + 0x780, - EMC_BASE + 0x784, - EMC_BASE + 0x788, - EMC_BASE + 0x110, - EMC_BASE + 0x114, - EMC_BASE + 0x3B4, - EMC_BASE + 0x460, - EMC_BASE + 0x3BC, - EMC_BASE + 0x3C4, - EMC_BASE + 0x3F4, - EMC_BASE + 0x3F8, - EMC_BASE + 0x4C4, - EMC_BASE + 0x3FC, - EMC_BASE + 0x400, - EMC_BASE + 0xE04, - EMC_BASE + 0xE44, - EMC_BASE + 0xE6C, - EMC_BASE + 0xE30, - EMC_BASE + 0xE34, - EMC_BASE + 0xE38, - EMC_BASE + 0xE3C, - EMC_BASE + 0xE0C, - EMC_BASE + 0xE10, - EMC_BASE + 0xE14, - EMC_BASE + 0xED0, - EMC_BASE + 0xE24, - EMC_BASE + 0xE28, - EMC_BASE + 0xE2C, - EMC_BASE + 0xE18, - EMC_BASE + 0xE1C, - EMC_BASE + 0xE20, - EMC_BASE + 0xE5C, - EMC_BASE + 0x4D0, -}; - -static uint32_t g_burst_perch_regs_addr[sizeof(t210_emc_burst_reg_per_ch) / sizeof(uint32_t)] = { - EMC0_BASE + EMC_MRW10, - EMC1_BASE + EMC_MRW10, - EMC0_BASE + EMC_MRW11, - EMC1_BASE + EMC_MRW11, - EMC0_BASE + EMC_MRW12, - EMC1_BASE + EMC_MRW12, - EMC0_BASE + EMC_MRW13, - EMC1_BASE + EMC_MRW13, -}; - -static uint32_t g_vref_perch_regs_addr[sizeof(t210_emc_vref_perch_regs) / sizeof(uint32_t)] = { - EMC0_BASE + EMC_TRAINING_OPT_DQS_IB_VREF_RANK0, - EMC1_BASE + EMC_TRAINING_OPT_DQS_IB_VREF_RANK0, - EMC0_BASE + EMC_TRAINING_OPT_DQS_IB_VREF_RANK1, - EMC1_BASE + EMC_TRAINING_OPT_DQS_IB_VREF_RANK1, -}; - -static uint32_t g_training_mod_perch_regs_addr[sizeof(t210_emc_training_mod_regs) / sizeof(uint32_t)] = { - EMC0_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE0, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE0, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE1, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE1, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE2, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE2, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE3, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_IB_BYTE3, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_IB_MISC, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_IB_MISC, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE0, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE0, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE1, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE1, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE2, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE2, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE3, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_OB_BYTE3, - EMC0_BASE + EMC_TRAINING_RW_OFFSET_OB_MISC, - EMC1_BASE + EMC_TRAINING_RW_OFFSET_OB_MISC, -}; - -static uint32_t g_trim_perch_regs_addr[sizeof(t210_emc_trim_perch_regs) / sizeof(uint32_t)] = { - EMC0_BASE + EMC_CMD_BRLSHFT_0, - EMC1_BASE + EMC_CMD_BRLSHFT_1, - EMC0_BASE + EMC_DATA_BRLSHFT_0, - EMC1_BASE + EMC_DATA_BRLSHFT_0, - EMC0_BASE + EMC_DATA_BRLSHFT_1, - EMC1_BASE + EMC_DATA_BRLSHFT_1, - EMC0_BASE + EMC_QUSE_BRLSHFT_0, - EMC1_BASE + EMC_QUSE_BRLSHFT_1, - EMC0_BASE + EMC_QUSE_BRLSHFT_2, - EMC1_BASE + EMC_QUSE_BRLSHFT_3, -}; - -static uint32_t g_trim_regs_addr[sizeof(t210_emc_trim_regs) / sizeof(uint32_t)] = { - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3, - - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2, - - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1, - EMC_BASE + EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2, - - EMC_BASE + EMC_PMACRO_IB_VREF_DQS_0, - EMC_BASE + EMC_PMACRO_IB_VREF_DQS_1, - - EMC_BASE + EMC_PMACRO_IB_VREF_DQ_0, - EMC_BASE + EMC_PMACRO_IB_VREF_DQ_1, - - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3, - - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2, - - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2, - - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1, - EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2, - - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK0_0, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK0_1, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK0_2, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK0_3, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK1_0, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK1_1, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK1_2, - EMC_BASE + EMC_PMACRO_QUSE_DDLL_RANK1_3, -}; - -static uint32_t g_burst_mc_regs_addr[sizeof(t210_emc_burst_mc_regs) / sizeof(uint32_t)] = { - MC_BASE + MC_EMEM_ARB_CFG, - MC_BASE + MC_EMEM_ARB_OUTSTANDING_REQ, - MC_BASE + MC_EMEM_ARB_REFPB_HP_CTRL, - MC_BASE + MC_EMEM_ARB_REFPB_BANK_CTRL, - MC_BASE + MC_EMEM_ARB_TIMING_RCD, - MC_BASE + MC_EMEM_ARB_TIMING_RP, - MC_BASE + MC_EMEM_ARB_TIMING_RC, - MC_BASE + MC_EMEM_ARB_TIMING_RAS, - MC_BASE + MC_EMEM_ARB_TIMING_FAW, - MC_BASE + MC_EMEM_ARB_TIMING_RRD, - MC_BASE + MC_EMEM_ARB_TIMING_RAP2PRE, - MC_BASE + MC_EMEM_ARB_TIMING_WAP2PRE, - MC_BASE + MC_EMEM_ARB_TIMING_R2R, - MC_BASE + MC_EMEM_ARB_TIMING_W2W, - MC_BASE + MC_EMEM_ARB_TIMING_R2W, - MC_BASE + MC_EMEM_ARB_TIMING_CCDMW, - MC_BASE + MC_EMEM_ARB_TIMING_W2R, - MC_BASE + MC_EMEM_ARB_TIMING_RFCPB, - MC_BASE + MC_EMEM_ARB_DA_TURNS, - MC_BASE + MC_EMEM_ARB_DA_COVERS, - MC_BASE + MC_EMEM_ARB_MISC0, - MC_BASE + MC_EMEM_ARB_MISC1, - MC_BASE + MC_EMEM_ARB_MISC2, - MC_BASE + MC_EMEM_ARB_RING1_THROTTLE, - MC_BASE + MC_EMEM_ARB_DHYST_CTRL, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6, - MC_BASE + MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7, -}; - -static uint32_t g_la_scale_regs_addr[sizeof(t210_emc_la_scale_regs) / sizeof(uint32_t)] = { - MC_BASE + MC_MLL_MPCORER_PTSA_RATE, - MC_BASE + MC_FTOP_PTSA_RATE, - MC_BASE + MC_PTSA_GRANT_DECREMENT, - MC_BASE + MC_LATENCY_ALLOWANCE_XUSB_0, - MC_BASE + MC_LATENCY_ALLOWANCE_XUSB_1, - MC_BASE + MC_LATENCY_ALLOWANCE_TSEC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_SDMMCA_0, - MC_BASE + MC_LATENCY_ALLOWANCE_SDMMCAA_0, - MC_BASE + MC_LATENCY_ALLOWANCE_SDMMC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_SDMMCAB_0, - MC_BASE + MC_LATENCY_ALLOWANCE_PPCS_0, - MC_BASE + MC_LATENCY_ALLOWANCE_PPCS_1, - MC_BASE + MC_LATENCY_ALLOWANCE_MPCORE_0, - MC_BASE + MC_LATENCY_ALLOWANCE_HC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_HC_1, - MC_BASE + MC_LATENCY_ALLOWANCE_AVPC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_GPU_0, - MC_BASE + MC_LATENCY_ALLOWANCE_GPU2_0, - MC_BASE + MC_LATENCY_ALLOWANCE_NVENC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_NVDEC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_VIC_0, - MC_BASE + MC_LATENCY_ALLOWANCE_VI2_0, - MC_BASE + MC_LATENCY_ALLOWANCE_ISP2_0, - MC_BASE + MC_LATENCY_ALLOWANCE_ISP2_1, -}; - -typedef struct { - uint32_t dq[0x100]; - uint8_t dmi[0x100]; -} tegra_b01_ram_pattern_t; -_Static_assert(sizeof(tegra_b01_ram_pattern_t) == 0x500); - -static unsigned char g_ram_pattern_raw_data[sizeof(tegra_b01_ram_pattern_t) * 5] = { - 0x18, 0x18, 0x18, 0x18, 0x61, 0x61, 0x61, 0x61, 0x85, 0x85, 0x85, 0x85, 0x14, 0x14, 0x14, 0x14, - 0x51, 0x51, 0x51, 0x51, 0x47, 0x47, 0x47, 0x47, 0x1E, 0x1E, 0x1E, 0x1E, 0x79, 0x79, 0x79, 0x79, - 0xE5, 0xE5, 0xE5, 0xE5, 0x94, 0x94, 0x94, 0x94, 0x51, 0x51, 0x51, 0x51, 0x46, 0x46, 0x46, 0x46, - 0x19, 0x19, 0x19, 0x19, 0x67, 0x67, 0x67, 0x67, 0x9C, 0x9C, 0x9C, 0x9C, 0x71, 0x71, 0x71, 0x71, - 0xC5, 0xC5, 0xC5, 0xC5, 0x17, 0x17, 0x17, 0x17, 0x5F, 0x5F, 0x5F, 0x5F, 0x7E, 0x7E, 0x7E, 0x7E, - 0xFB, 0xFB, 0xFB, 0xFB, 0xED, 0xED, 0xED, 0xED, 0xB4, 0xB4, 0xB4, 0xB4, 0xD2, 0xD2, 0xD2, 0xD2, - 0x48, 0x48, 0x48, 0x48, 0x21, 0x21, 0x21, 0x21, 0x85, 0x85, 0x85, 0x85, 0x16, 0x16, 0x16, 0x16, - 0x59, 0x59, 0x59, 0x59, 0x66, 0x66, 0x66, 0x66, 0x9A, 0x9A, 0x9A, 0x9A, 0x69, 0x69, 0x69, 0x69, - 0xA4, 0xA4, 0xA4, 0xA4, 0x93, 0x93, 0x93, 0x93, 0x4F, 0x4F, 0x4F, 0x4F, 0x3F, 0x3F, 0x3F, 0x3F, - 0xFC, 0xFC, 0xFC, 0xFC, 0xF3, 0xF3, 0xF3, 0xF3, 0xCD, 0xCD, 0xCD, 0xCD, 0x37, 0x37, 0x37, 0x37, - 0xDC, 0xDC, 0xDC, 0xDC, 0x70, 0x70, 0x70, 0x70, 0xC3, 0xC3, 0xC3, 0xC3, 0x0F, 0x0F, 0x0F, 0x0F, - 0x3E, 0x3E, 0x3E, 0x3E, 0xFA, 0xFA, 0xFA, 0xFA, 0xEB, 0xEB, 0xEB, 0xEB, 0xAC, 0xAC, 0xAC, 0xAC, - 0xB3, 0xB3, 0xB3, 0xB3, 0xCC, 0xCC, 0xCC, 0xCC, 0x31, 0x31, 0x31, 0x31, 0xC5, 0xC5, 0xC5, 0xC5, - 0x15, 0x15, 0x15, 0x15, 0x57, 0x57, 0x57, 0x57, 0x5F, 0x5F, 0x5F, 0x5F, 0x7F, 0x7F, 0x7F, 0x7F, - 0xFD, 0xFD, 0xFD, 0xFD, 0xF4, 0xF4, 0xF4, 0xF4, 0xD0, 0xD0, 0xD0, 0xD0, 0x42, 0x42, 0x42, 0x42, - 0x08, 0x08, 0x08, 0x08, 0x23, 0x23, 0x23, 0x23, 0x8F, 0x8F, 0x8F, 0x8F, 0x3F, 0x3F, 0x3F, 0x3F, - 0x18, 0x18, 0x18, 0x18, 0x61, 0x61, 0x61, 0x61, 0x85, 0x85, 0x85, 0x85, 0x14, 0x14, 0x14, 0x14, - 0x51, 0x51, 0x51, 0x51, 0x47, 0x47, 0x47, 0x47, 0x1E, 0x1E, 0x1E, 0x1E, 0x79, 0x79, 0x79, 0x79, - 0xE5, 0xE5, 0xE5, 0xE5, 0x94, 0x94, 0x94, 0x94, 0x51, 0x51, 0x51, 0x51, 0x46, 0x46, 0x46, 0x46, - 0x19, 0x19, 0x19, 0x19, 0x67, 0x67, 0x67, 0x67, 0x9C, 0x9C, 0x9C, 0x9C, 0x71, 0x71, 0x71, 0x71, - 0xC5, 0xC5, 0xC5, 0xC5, 0x17, 0x17, 0x17, 0x17, 0x5F, 0x5F, 0x5F, 0x5F, 0x7E, 0x7E, 0x7E, 0x7E, - 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return 0; - case 0x8: /* DramId_MarikoIowaSamsung4gb */ - return 5; - case 0x9: /* DramId_MarikoIowaSamsung8gb */ - return 6; - case 0xA: /* DramId_MarikoIowaHynix4gb */ - return 7; - case 0xB: /* DramId_MarikoIowaMicron4gb */ - return 8; - case 0xC: /* DramId_MarikoHoagSamsung4gb */ - return 5; - case 0xD: /* DramId_MarikoHoagSamsung8gb */ - return 6; - case 0xE: /* DramId_MarikoHoagHynix4gb */ - return 7; - case 0xF: /* DramId_MarikoHoagMicron4gb */ - return 8; - case 0x10: /* DramId_MarikoIowaSamsung4gbY */ - return 9; - case 0x11: /* DramId_MarikoIowaSamsung1y4gbX */ - return 0xC; - case 0x12: /* DramId_MarikoIowaSamsung1y8gbX */ - return 0xD; - case 0x13: /* DramId_MarikoHoagSamsung1y4gbX */ - return 0xC; - case 0x14: /* DramId_MarikoIowaSamsung1y4gbY */ - return 0xA; - case 0x15: /* DramId_MarikoIowaSamsung1y8gbY */ - return 0xB; - case 0x16: /* DramId_MarikoAulaSamsung1y4gb */ - return 0xE; - case 0x17: /* DramId_MarikoHoagSamsung1y8gbX */ - return 0xD; - case 0x18: /* DramId_MarikoAulaSamsung1y4gbX */ - return 0xC; - case 0x19: /* DramId_MarikoIowaMicron1y4gb */ - return 0xF; - case 0x1A: /* DramId_MarikoHoagMicron1y4gb */ - return 0xF; - case 0x1B: /* DramId_MarikoAulaMicron1y4gb */ - return 0xF; - case 0x1C: /* DramId_MarikoAulaSamsung1y8gbX */ - return 0xD; - default: - return -1; - } -} - -static tegra_b01_emc_timing_t *get_t210_b01_emc_dvfs_timing_table(int32_t *out_num_entries) { - switch (get_emc_dvfs_timing_table_index(fuse_get_dram_id())) { - case 0: /* SdevEmcDvfsTableS4gb01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS4gb01; - case 5: /* SdevEmcDvfsTableS4gb03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS4gb03; - case 6: /* SdevEmcDvfsTableS8gb03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS8gb03; - case 7: /* SdevEmcDvfsTableH4gb03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableH4gb03; - case 8: /* SdevEmcDvfsTableM4gb03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableM4gb03; - case 9: /* SdevEmcDvfsTableS4gbY01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS4gbY01; - case 0xA: /* SdevEmcDvfsTableS1y4gbY01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS1y4gbY01; - case 0xB: /* SdevEmcDvfsTableS1y8gbY01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS1y8gbY01; - case 0xC: /* SdevEmcDvfsTableS1y4gbX03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS1y4gbX03; - case 0xD: /* SdevEmcDvfsTableS1y8gbX03 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS1y8gbX03; - case 0xE: /* SdevEmcDvfsTableS1y4gb01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableS1y4gb01; - case 0xF: /* SdevEmcDvfsTableM1y4gb01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableM1y4gb01; - case 0x10: /* SdevEmcDvfsTableH1y4gb01 */ - if (out_num_entries != NULL) { *out_num_entries = 3; } - return (tegra_b01_emc_timing_t *)T210b01SdevEmcDvfsTableH1y4gb01; - default: - return NULL; - } -} - - -static void start_periodic_compensation() { - uint32_t mpc_req = 0x4B; - - /* Write to EMC_MPC_0. */ - emc_write(mpc_req, EMC_MPC); - - /* Dummy read. */ - mpc_req = emc_read(EMC_MPC); -} - -static uint32_t actual_osc_clocks(uint32_t in) { - if (in < 0x40) - return in * 16; - else if (in < 0x80) - return 2048; - else if (in < 0xc0) - return 4096; - else - return 8192; -} - -static uint32_t emc_set_shadow_bypass(int set, uint32_t emc_dbg) { - if (set) - emc_dbg |= EMC_DBG_WRITE_MUX_ACTIVE; - else - emc_dbg &= ~EMC_DBG_WRITE_MUX_ACTIVE; - - return emc_dbg; -} - -static uint32_t wait_for_update(uint32_t status_reg, uint32_t bit_mask, bool updated_state, uint32_t chan_cfg) { - int result = 0; - - if (chan_cfg & EMC_FBIO_CFG7_CH0_ENABLE) { - bool success = false; - for (int i = 0; i < EMC_STATUS_UPDATE_TIMEOUT; ++i) { - if (((emc0_read(status_reg) & bit_mask) != 0) == updated_state) { - success = true; - break; - } - udelay(1); - } - result |= success ? 0 : 4; - } - - if (chan_cfg & EMC_FBIO_CFG7_CH1_ENABLE) { - bool success = false; - for (int i = 0; i < EMC_STATUS_UPDATE_TIMEOUT; ++i) { - if (((emc1_read(status_reg) & bit_mask) != 0) == updated_state) { - success = true; - break; - } - udelay(1); - } - result |= success ? 0 : 4; - } - - return result; -} - -static void emc_timing_update(uint32_t fbio_cfg7) { - /* Trigger the timing update event. */ - emc_write(0x1, EMC_TIMING_CONTROL); - - /* Wait for the update to finish. */ - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_TIMING_UPDATE_STALLED, false, fbio_cfg7); -} - -static uint32_t get_dll_state(tegra_b01_emc_timing_t *next_timing) { - bool next_dll_enabled = !(next_timing->emc_emrs & 0x1); - if (next_dll_enabled) - return DLL_ON; - else - return DLL_OFF; -} - -static uint32_t div_o3(uint32_t a, uint32_t b) { - uint32_t result = a / b; - - if ((b * result) < a) - return result + 1; - else - return result; -} - -static uint32_t div_o3_f(uint32_t a, uint32_t b) { - const float res = a / b; - - const uint32_t floor = (uint32_t)res; - - return floor + (((float)floor + 0.01 < res) ? 1 : 0); -} - -static uint32_t pll_reprogram(uint32_t rate_khz_to, uint32_t clk_src_emc_to, uint32_t rate_khz_from, uint32_t clk_src_emc_from) { - volatile tegra_car_t *car = car_get_regs(); - - double post_div = 1.0; - switch ((car_read(&car->clk_source_emc) >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT)) { - case TEGRA_EMC_SRC_PLLM: - case TEGRA_EMC_SRC_PLLM_UD: - post_div = (double)(1 + ((car_read(&car->pllm_base) >> 20) & 1)); - break; - case TEGRA_EMC_SRC_PLLMB_UD: - case TEGRA_EMC_SRC_PLLMB: - post_div = (double)(1 + ((car_read(&car->pllmb_base) >> 20) & 1)); - break; - } - - const uint32_t emc_2x_clk_src_to = (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - const uint32_t emc_2x_clk_src_from = (clk_src_emc_from >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT); - const uint32_t divisor_to = (emc_2x_clk_src_to != TEGRA_EMC_SRC_PLLM_UD && emc_2x_clk_src_to != TEGRA_EMC_SRC_PLLMB_UD) ? (clk_src_emc_to & 0xFF) : 0; - const uint32_t divisor_from = (emc_2x_clk_src_from != TEGRA_EMC_SRC_PLLM_UD && emc_2x_clk_src_from != TEGRA_EMC_SRC_PLLMB_UD) ? (clk_src_emc_from & 0xFF) : 0; - - if (emc_2x_clk_src_to != emc_2x_clk_src_from && ((emc_2x_clk_src_to | 4) != 4 || (emc_2x_clk_src_from | 4) != 4)) { - return 1; - } - - const float val_to = ((double)(divisor_to & 1) * 0.5 + (double)((divisor_to >> 1) + 1)) * ((double)rate_khz_to) * post_div; - const float val_from = ((double)(divisor_from & 1) * 0.5 + (double)((divisor_from >> 1) + 1)) * ((double)rate_khz_from) * post_div; - const float ratio = val_from / val_to; - - return ratio > 1.01 || ratio < 0.99; -} - -static uint32_t program_pllm(uint32_t rate_khz_to, uint32_t rate_khz_from, uint32_t clk_src_emc_to, uint32_t clk_src_emc_from, bool is_pllmb, tegra_b01_emc_timing_t *timing_tables_to) { - volatile tegra_car_t *car = car_get_regs(); - - g_program_pllm_ret = clk_src_emc_from; - - const uint32_t base = ((timing_tables_to->pllmb_divm & 0xFF) | ((timing_tables_to->pllmb_divn & 0xFF) << 8) | ((timing_tables_to->pllmb_divp & 1) << 20)); - if (is_pllmb) { - car_write(base, &car->pllmb_base); - car_read(&car->pllmb_base); - - car_write(car_read(&car->pllmb_misc1) | 0x10000000, &car->pllmb_misc1); - - if (timing_tables_to->pll_en_ssc & 1) { - car_write(timing_tables_to->pllmb_ss_cfg, &car->pllmb_ss_cfg); - car_write(timing_tables_to->pllmb_ss_ctrl1, &car->pllmb_ss_ctrl1); - car_write(timing_tables_to->pllmb_ss_ctrl2, &car->pllmb_ss_ctrl2); - } else { - car_write(timing_tables_to->pllmb_ss_cfg & 0xBFFFFFFF, &car->pllmb_ss_cfg); - car_write(timing_tables_to->pllmb_ss_ctrl2 & 0x0000FFFF, &car->pllmb_ss_ctrl2); - } - - car_write(car_read(&car->pllmb_base) | 0x40000000, &car->pllmb_base); - - switch (g_program_pllm_ret >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) { - case TEGRA_EMC_SRC_PLLM: - g_program_pllm_ret = ((g_program_pllm_ret & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - break; - case TEGRA_EMC_SRC_PLLM_UD: - g_program_pllm_ret = ((g_program_pllm_ret & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - break; - } - - while ((car_read(&car->pllmb_base) & 0x8000000) == 0) { /* ... */ } - - return g_program_pllm_ret; - } else { - car_write(base, &car->pllm_base); - car_read(&car->pllm_base); - - car_write(car_read(&car->pllm_misc2) | 0x10, &car->pllm_misc2); - - if (timing_tables_to->pll_en_ssc & 1) { - car_write(timing_tables_to->pllm_ss_cfg, &car->pllm_ss_cfg); - car_write(timing_tables_to->pllm_ss_ctrl1, &car->pllm_ss_ctrl1); - car_write(timing_tables_to->pllm_ss_ctrl2, &car->pllm_ss_ctrl2); - } else { - car_write(timing_tables_to->pllm_ss_cfg & 0xBFFFFFFF, &car->pllm_ss_cfg); - car_write(timing_tables_to->pllm_ss_ctrl2 & 0x0000FFFF, &car->pllm_ss_ctrl2); - } - - car_write(car_read(&car->pllm_base) | 0x40000000, &car->pllm_base); - - switch (g_program_pllm_ret >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) { - case TEGRA_EMC_SRC_PLLM: - g_program_pllm_ret = ((g_program_pllm_ret & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLM << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - break; - case TEGRA_EMC_SRC_PLLM_UD: - g_program_pllm_ret = ((g_program_pllm_ret & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLM_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - break; - } - - while ((car_read(&car->pllm_base) & 0x8000000) == 0) { /* ... */ } - - return g_program_pllm_ret; - } -} - -static uint32_t apply_periodic_compensation_trimmer(tegra_b01_emc_timing_t *timing_tables, uint32_t trim_reg) { - /* Initialize variables. */ - uint32_t rate_mhz = timing_tables->rate_khz / 1000; - uint32_t adj[0x10] = { 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8 }; - - int tree_delta[4] = {0}; - int tree_delta_taps[4] = {0}; - - /* Generate the intermediate array. */ - #define SET_TRIM_INTERMEDIATE(_arr_, _emc_, _rank_, _byte_) \ - ({ \ - const uint32_t shft = timing_tables->trim_perch_regs.emc## _emc_ ##_data_brlshft_## _rank_; \ - const uint32_t base = ((shft >> (3 * _byte_)) & 7) << 6; \ - const uint32_t val0 = timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank ## _rank_ ## _byte ## _byte_ ## _0; \ - const uint32_t val1 = timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank ## _rank_ ## _byte ## _byte_ ## _1; \ - const uint32_t val2 = timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank ## _rank_ ## _byte ## _byte_ ## _2; \ - _arr_[9 * (8 * _rank_ + _byte_) + 0] = base + ((val0 >> 0) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 1] = base + ((val0 >> 8) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 2] = base + ((val0 >> 16) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 3] = base + ((val0 >> 24) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 4] = base + ((val1 >> 0) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 5] = base + ((val1 >> 8) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 6] = base + ((val1 >> 16) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 7] = base + ((val1 >> 24) & 0xFF); \ - _arr_[9 * (8 * _rank_ + _byte_) + 8] = base + ((val2 >> 0) & 0xFF); \ - }) - { - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 0, 0); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 0, 1); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 0, 2); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 0, 3); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 0, 4); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 0, 5); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 0, 6); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 0, 7); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 1, 0); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 1, 1); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 1, 2); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 0, 1, 3); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 1, 4); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 1, 5); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 1, 6); - SET_TRIM_INTERMEDIATE(g_periodic_timmer_compensation_intermediates, 1, 1, 7); - } - #undef SET_TRIM_INTERMEDIATE - - switch (trim_reg) { - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2: - case EMC0_BASE + EMC_DATA_BRLSHFT_0: - case EMC1_BASE + EMC_DATA_BRLSHFT_0: - { - tree_delta[0] = 128 * (timing_tables->current_dram_clktree_c0d0u0 - timing_tables->trained_dram_clktree_c0d0u0); - tree_delta[1] = 128 * (timing_tables->current_dram_clktree_c0d0u1 - timing_tables->trained_dram_clktree_c0d0u1); - tree_delta[2] = 128 * (timing_tables->current_dram_clktree_c1d0u0 - timing_tables->trained_dram_clktree_c1d0u0); - tree_delta[3] = 128 * (timing_tables->current_dram_clktree_c1d0u1 - timing_tables->trained_dram_clktree_c1d0u1); - tree_delta_taps[0] = (tree_delta[0] * (int)rate_mhz) / 1000000; - tree_delta_taps[1] = (tree_delta[1] * (int)rate_mhz) / 1000000; - tree_delta_taps[2] = (tree_delta[2] * (int)rate_mhz) / 1000000; - tree_delta_taps[3] = (tree_delta[3] * (int)rate_mhz) / 1000000; - - for (int i = 0; i < 4; ++i) { - const uint32_t sum = (tree_delta_taps[i] <= timing_tables->tree_margin) ? 0 : tree_delta_taps[i]; - - for (int j = 0; j < 18; ++j) { - const uint32_t v = (g_periodic_timmer_compensation_intermediates[18 * i + j] += sum); - if (v < (adj[2 * i + (j < 9)] << 6)) { - adj[2 * i + (j < 9)] = v >> 6; - } - } - for (int j = 0; j < 18; ++j) { - g_periodic_timmer_compensation_intermediates[18 * i + j] -= (adj[2 * i + (j < 9)] << 6); - } - } - } - break; - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2: - case EMC0_BASE + EMC_DATA_BRLSHFT_1: - case EMC1_BASE + EMC_DATA_BRLSHFT_1: - { - tree_delta[0] = 128 * (timing_tables->current_dram_clktree_c0d1u0 - timing_tables->trained_dram_clktree_c0d1u0); - tree_delta[1] = 128 * (timing_tables->current_dram_clktree_c0d1u1 - timing_tables->trained_dram_clktree_c0d1u1); - tree_delta[2] = 128 * (timing_tables->current_dram_clktree_c1d1u0 - timing_tables->trained_dram_clktree_c1d1u0); - tree_delta[3] = 128 * (timing_tables->current_dram_clktree_c1d1u1 - timing_tables->trained_dram_clktree_c1d1u1); - tree_delta_taps[0] = (tree_delta[0] * (int)rate_mhz) / 1000000; - tree_delta_taps[1] = (tree_delta[1] * (int)rate_mhz) / 1000000; - tree_delta_taps[2] = (tree_delta[2] * (int)rate_mhz) / 1000000; - tree_delta_taps[3] = (tree_delta[3] * (int)rate_mhz) / 1000000; - - for (int i = 0; i < 4; ++i) { - const uint32_t sum = (tree_delta_taps[i] <= timing_tables->tree_margin) ? 0 : tree_delta_taps[i]; - - for (int j = 0; j < 18; ++j) { - const uint32_t v = (g_periodic_timmer_compensation_intermediates[72 + 18 * i + j] += sum); - if (v < (adj[8 + 2 * i + (j < 9)] << 6)) { - adj[8 + 2 * i + (j < 9)] = v >> 6; - } - } - for (int j = 0; j < 18; ++j) { - g_periodic_timmer_compensation_intermediates[72 + 18 * i + j] -= (adj[8 + 2 * i + (j < 9)] << 6); - } - } - } - break; - } - - uint32_t result = 0; - switch (trim_reg) { - case EMC0_BASE + EMC_DATA_BRLSHFT_0: - result = ((adj[ 0] & 7) << 0) | ((adj[ 1] & 7) << 3) | ((adj[ 2] & 7) << 6) | ((adj[ 3] & 7) << 9); - break; - case EMC1_BASE + EMC_DATA_BRLSHFT_0: - result = ((adj[ 4] & 7) << 12) | ((adj[ 5] & 7) << 15) | ((adj[ 6] & 7) << 18) | ((adj[ 7] & 7) << 21); - break; - case EMC0_BASE + EMC_DATA_BRLSHFT_1: - result = ((adj[ 8] & 7) << 0) | ((adj[ 9] & 7) << 3) | ((adj[10] & 7) << 6) | ((adj[11] & 7) << 9); - break; - case EMC1_BASE + EMC_DATA_BRLSHFT_1: - result = ((adj[12] & 7) << 12) | ((adj[13] & 7) << 15) | ((adj[14] & 7) << 18) | ((adj[15] & 7) << 21); - break; - #define ADD_TRIM_CASE(_ARR_, _RANK_, _BYTE_) \ - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK ## _RANK_ ## _BYTE ## _BYTE_ ##_0: \ - result = ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 0] & 0xFF) << 0) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 1] & 0xFF) << 8) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 2] & 0xFF) << 16) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 3] & 0xFF) << 24); \ - break; \ - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK ## _RANK_ ## _BYTE ## _BYTE_ ##_1: \ - result = ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 4] & 0xFF) << 0) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 5] & 0xFF) << 8) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 6] & 0xFF) << 16) | ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 7] & 0xFF) << 24); \ - break; \ - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK ## _RANK_ ## _BYTE ## _BYTE_ ##_2: \ - result = ((_ARR_[9 * (8 * _RANK_ + _BYTE_) + 8] & 0xFF) << 0); \ - break; - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 0); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 1); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 2); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 3); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 4); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 5); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 6); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 0, 7); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 0); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 1); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 2); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 3); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 4); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 5); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 6); - ADD_TRIM_CASE(g_periodic_timmer_compensation_intermediates, 1, 7); - #undef ADD_TRIM_CASE - } - - return result; -} - -static uint32_t update_clock_tree_delay(tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, uint32_t dram_dev_num, uint32_t mode, uint32_t type) { - uint32_t mrr_req = 0, mrr_data = 0; - uint32_t temp0_0 = 0, temp0_1 = 0, temp1_0 = 0, temp1_1 = 0; - int tdel = 0, tmdel = 0, adel = 0; - - uint32_t current_timing_rate_mhz = src_timing_tables->rate_khz / 1000; - uint32_t next_timing_rate_mhz = dst_timing_tables->rate_khz / 1000; - uint32_t fbio_cfg7 = dst_timing_tables->emc_fbio_cfg7; - - bool dvfs_pt1 = (type == DVFS_PT1); - bool training_pt1 = (type == TRAINING_PT1); - bool dvfs_update = (type == DVFS_UPDATE); - bool training_update = (type == TRAINING_UPDATE); - bool periodic_training_update = (type == PERIODIC_TRAINING_UPDATE); - - /* Dev0 MSB. */ - if (dvfs_pt1 || training_pt1 || periodic_training_update) { - mrr_req = ((2 << EMC_MRR_DEV_SEL_SHIFT) | (19 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, fbio_cfg7); - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - mrr_data = ((emc0_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 = ((mrr_data & 0xff) << 8); - temp0_1 = (mrr_data & 0xff00); - } else { - temp0_0 = temp0_1 = 0; - } - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp1_0 = ((mrr_data & 0xff) << 8); - temp1_1 = (mrr_data & 0xff00); - } else { - temp1_0 = temp1_1 = 0; - } - - /* Dev0 LSB. */ - mrr_req = ((mrr_req & ~EMC_MRR_MA_MASK) | (18 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, fbio_cfg7); - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - mrr_data = ((emc0_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 |= (mrr_data & 0xff); - temp0_1 |= (mrr_data & 0xff00) >> 8; - } - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp1_0 |= (mrr_data & 0xff); - temp1_1 |= (mrr_data & 0xff00) >> 8; - } - } - - #define CVAL(v) ((uint32_t)((1000 * ((1000 * actual_osc_clocks(src_timing_tables->run_clocks)) / current_timing_rate_mhz)) / (2 * v))) - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c0d0u0, CVAL(temp0_0)); - else if (dvfs_update) - __AVERAGE_PTFV(c0d0u0); - else if (training_update) - __AVERAGE_WRITE_PTFV(c0d0u0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c0d0u0, CVAL(temp0_0)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c0d0u0 - __MOVAVG_AC(dst_timing_tables, c0d0u0)); - tmdel = (tdel < 0) ? ~tdel : tdel; - adel = tmdel; - if (mode == 1 || ((adel * 128 * next_timing_rate_mhz) / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c0d0u0 = __MOVAVG_AC(dst_timing_tables, c0d0u0); - } - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c0d0u1, CVAL(temp0_1)); - else if (dvfs_update) - __AVERAGE_PTFV(c0d0u1); - else if (training_update) - __AVERAGE_WRITE_PTFV(c0d0u1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c0d0u1, CVAL(temp0_1)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c0d0u1 - __MOVAVG_AC(dst_timing_tables, c0d0u1)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c0d0u1 = __MOVAVG_AC(dst_timing_tables, c0d0u1); - } - } else { - adel = 0; - } - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c1d0u0, CVAL(temp1_0)); - else if (dvfs_update) - __AVERAGE_PTFV(c1d0u0); - else if (training_update) - __AVERAGE_WRITE_PTFV(c1d0u0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c1d0u0, CVAL(temp1_0)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c1d0u0 - __MOVAVG_AC(dst_timing_tables, c1d0u0)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c1d0u0 = __MOVAVG_AC(dst_timing_tables, c1d0u0); - } - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c1d0u1, CVAL(temp1_1)); - else if (dvfs_update) - __AVERAGE_PTFV(c1d0u1); - else if (training_update) - __AVERAGE_WRITE_PTFV(c1d0u1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c1d0u1, CVAL(temp1_1)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c1d0u1 - __MOVAVG_AC(dst_timing_tables, c1d0u1)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c1d0u1 = __MOVAVG_AC(dst_timing_tables, c1d0u1); - } - } - - if (dram_dev_num == TWO_RANK) { - /* Dev1 MSB. */ - if (dvfs_pt1 || training_pt1 || periodic_training_update) { - mrr_req = ((1 << EMC_MRR_DEV_SEL_SHIFT) | (19 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, fbio_cfg7); - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - mrr_data = ((emc0_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 = ((mrr_data & 0xff) << 8); - temp0_1 = (mrr_data & 0xff00); - } - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp1_0 = ((mrr_data & 0xff) << 8); - temp1_1 = (mrr_data & 0xff00); - } - - /* Dev1 LSB. */ - mrr_req = ((mrr_req & ~EMC_MRR_MA_MASK) | (18 << EMC_MRR_MA_SHIFT)); - emc_write(mrr_req, EMC_MRR); - - wait_for_update(EMC_EMC_STATUS, EMC_EMC_STATUS_MRR_DIVLD, true, fbio_cfg7); - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - mrr_data = ((emc0_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp0_0 |= ((mrr_data & 0xff) << 8); - temp0_1 |= (mrr_data & 0xff00); - } - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - mrr_data = ((emc1_read(EMC_MRR) & EMC_MRR_DATA_MASK) << EMC_MRR_DATA_SHIFT); - - temp1_0 |= ((mrr_data & 0xff) << 8); - temp1_1 |= (mrr_data & 0xff00); - } - } - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH0_ENABLE) { - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c0d1u0, CVAL(temp0_0)); - else if (dvfs_update) - __AVERAGE_PTFV(c0d1u0); - else if (training_update) - __AVERAGE_WRITE_PTFV(c0d1u0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c0d1u0, CVAL(temp0_0)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c0d1u0 - __MOVAVG_AC(dst_timing_tables, c0d1u0)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c0d1u0 = __MOVAVG_AC(dst_timing_tables, c0d1u0); - } - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c0d1u1, CVAL(temp0_1)); - else if (dvfs_update) - __AVERAGE_PTFV(c0d1u1); - else if (training_update) - __AVERAGE_WRITE_PTFV(c0d1u1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c0d1u1, CVAL(temp0_1)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c0d1u1 - __MOVAVG_AC(dst_timing_tables, c0d1u1)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c0d1u1 = __MOVAVG_AC(dst_timing_tables, c0d1u1); - } - } - - if (fbio_cfg7 & EMC_FBIO_CFG7_CH1_ENABLE) { - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c1d1u0, CVAL(temp1_0)); - else if (dvfs_update) - __AVERAGE_PTFV(c1d1u0); - else if (training_update) - __AVERAGE_WRITE_PTFV(c1d1u0); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c1d1u0, CVAL(temp1_0)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c1d1u0 - __MOVAVG_AC(dst_timing_tables, c1d1u0)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c1d1u0 = __MOVAVG_AC(dst_timing_tables, c1d1u0); - } - - if (dvfs_pt1 || training_pt1) - __INCREMENT_PTFV(c1d1u1, CVAL(temp1_1)); - else if (dvfs_update) - __AVERAGE_PTFV(c1d1u1); - else if (training_update) - __AVERAGE_WRITE_PTFV(c1d1u1); - else if (periodic_training_update) - __WEIGHTED_UPDATE_PTFV(c1d1u1, CVAL(temp1_1)); - - if (dvfs_update || training_update || periodic_training_update) { - tdel = (dst_timing_tables->current_dram_clktree_c1d1u1 - __MOVAVG_AC(dst_timing_tables, c1d1u1)); - tmdel = (tdel < 0) ? -1 * tdel : tdel; - - if (tmdel > adel) - adel = tmdel; - - if (mode == 1 || (tmdel * 128 * next_timing_rate_mhz / 1000000) > dst_timing_tables->tree_margin) - dst_timing_tables->current_dram_clktree_c1d1u1 = __MOVAVG_AC(dst_timing_tables, c1d1u1); - } - } - } - - #undef CVAL - - if (mode == 1) { - dst_timing_tables->trained_dram_clktree_c0d0u0 = dst_timing_tables->current_dram_clktree_c0d0u0; - dst_timing_tables->trained_dram_clktree_c0d0u1 = dst_timing_tables->current_dram_clktree_c0d0u1; - dst_timing_tables->trained_dram_clktree_c0d1u0 = dst_timing_tables->current_dram_clktree_c0d1u0; - dst_timing_tables->trained_dram_clktree_c0d1u1 = dst_timing_tables->current_dram_clktree_c0d1u1; - dst_timing_tables->trained_dram_clktree_c1d0u0 = dst_timing_tables->current_dram_clktree_c1d0u0; - dst_timing_tables->trained_dram_clktree_c1d0u1 = dst_timing_tables->current_dram_clktree_c1d0u1; - dst_timing_tables->trained_dram_clktree_c1d1u0 = dst_timing_tables->current_dram_clktree_c1d1u0; - dst_timing_tables->trained_dram_clktree_c1d1u1 = dst_timing_tables->current_dram_clktree_c1d1u1; - } - - return adel; -} - -static uint32_t periodic_compensation_handler(int type, uint32_t dram_dev_num, tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables) { - if (!dst_timing_tables->periodic_training) { - return 0; - } - - uint32_t adel = 0; - uint32_t samples = dst_timing_tables->ptfv_list.ptfv_dvfs_samples; - uint32_t samples_write = dst_timing_tables->ptfv_list.ptfv_write_samples; - uint32_t delay = 2 + (1000 * actual_osc_clocks(src_timing_tables->run_clocks) / src_timing_tables->rate_khz); - - if (type == DVFS_SEQUENCE) { - if (src_timing_tables->periodic_training && (dst_timing_tables->ptfv_list.ptfv_config_ctrl & 1)) { - /* If the previous frequency was using periodic calibration then we can reuse the previous frequencies EMA data. */ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0 * samples; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1 = src_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1 * samples; - } else { - /* Reset the EMA. */ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1 = 0; - - for (uint32_t i = 0; i < samples; ++i) { - start_periodic_compensation(); - - udelay(delay); - - /* Generate next sample of data. */ - adel = update_clock_tree_delay(src_timing_tables, dst_timing_tables, dram_dev_num, 0, DVFS_PT1); - } - } - - adel = update_clock_tree_delay(src_timing_tables, dst_timing_tables, dram_dev_num, 0, DVFS_UPDATE); - } else if (type == WRITE_TRAINING_SEQUENCE) { - /* Reset the EMA. */ - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0 = 0; - dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1 = 0; - - for (uint32_t i = 0; i < samples_write; ++i) { - start_periodic_compensation(); - - udelay(delay); - - /* Generate next sample of data. */ - adel = update_clock_tree_delay(src_timing_tables, dst_timing_tables, dram_dev_num, 1, TRAINING_PT1); - } - - adel = update_clock_tree_delay(src_timing_tables, dst_timing_tables, dram_dev_num, 1, TRAINING_UPDATE); - } else if (type == PERIODIC_TRAINING_SEQUENCE) { - start_periodic_compensation(); - - udelay(delay); - - adel = update_clock_tree_delay(src_timing_tables, dst_timing_tables, dram_dev_num, 0, PERIODIC_TRAINING_UPDATE); - } - - return adel; -} - -static void change_dll_src(tegra_b01_emc_timing_t *timing_tables, uint32_t dst_clk_src) { - volatile tegra_car_t *car = car_get_regs(); - - uint32_t val = ((dst_clk_src & 0xE00000FF) | (timing_tables->dll_clk_src & 0x1FFFFF00)) & 0xFFFFF3FF; - switch (dst_clk_src >> 29) { - case TEGRA_EMC_SRC_PLLMB_UD: - val |= 0x400; - break; - case TEGRA_EMC_SRC_PLLM_UD: - break; - default: - val |= 0x800; - break; - } - - /* Set EMC_DLL_CLK_SRC, DDLL_CLK_SEL and EMC_DLL_CLK_DIVISOR */ - car_write(val, &car->clk_source_emc_dll); - - /* Update CLK_ENB_EMC_DLL */ - car_write((car_read(&car->clk_out_enb_x) & 0xFFFFBFFF) | ((timing_tables->clk_out_enb_x_0_clk_enb_emc_dll & 1) << 14), &car->clk_out_enb_x); - car_read(&car->clk_out_enb_x) ; - -} - -static void dll_prelock(tegra_b01_emc_timing_t *dst_timing_tables, tegra_b01_emc_timing_t *src_timing_tables, bool training_enabled, uint32_t dst_clk_src) { - /* Update EMC_CFG_DIG_DLL */ - emc_write((emc_read(EMC_CFG_DIG_DLL) & 0xFFFFFFE4) | 0x00000008, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dst_timing_tables->emc_fbio_cfg7); - - /* Update EMC_CFG_DIG_DLL */ - emc_write((emc_read(EMC_CFG_DIG_DLL) & 0xFFFFF824) | 0x000003C8, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dst_timing_tables->emc_fbio_cfg7); - - /* Wait until CFG_DLL_EN is cleared. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, dst_timing_tables->emc_fbio_cfg7); - - /* Configure PMACRO_DLL_CFG */ - emc_write(dst_timing_tables->burst_regs.emc_pmacro_dll_cfg_0, EMC_PMACRO_DLL_CFG_0); - emc_read(EMC_PMACRO_DLL_CFG_1); - - emc_write((dst_timing_tables->burst_regs.emc_pmacro_dll_cfg_1 & 0xFFFFDFFF) | (emc_read(EMC_PMACRO_DLL_CFG_1) & 0x00002000), EMC_PMACRO_DLL_CFG_1); - - /* Request a timing update event */ - emc_timing_update(dst_timing_tables->emc_fbio_cfg7); - - /* Change the dll clock source. */ - change_dll_src(dst_timing_tables, dst_clk_src); - - /* Wait 2 us. */ - udelay(2); - - /* Enable dll. */ - emc_write(emc_read(EMC_CFG_DIG_DLL) | 0x00000001, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(dst_timing_tables->emc_fbio_cfg7); - - /* Wait until CFG_DLL_EN is set. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, true, dst_timing_tables->emc_fbio_cfg7); - - /* Wait for DLL_LOCK to be set */ - wait_for_update(EMC_DIG_DLL_STATUS, EMC_DIG_DLL_STATUS_DLL_LOCK_B01, true, dst_timing_tables->emc_fbio_cfg7); - - if (training_enabled) { - /* Disable dll. */ - emc_write(emc_read(EMC_DBG) | 0x00000002, EMC_DBG); - emc_write(emc_read(EMC_CFG_DIG_DLL) & 0xFFFFFFFE, EMC_CFG_DIG_DLL); - emc_write(emc_read(EMC_DBG) & 0xFFFFFFFD, EMC_DBG); - - /* Wait until CFG_DLL_EN is cleared. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, dst_timing_tables->emc_fbio_cfg7); - } - - emc_read(0xD20); -} - -static void dll_disable(uint32_t fbio_cfg7) { - /* Disable dll. */ - emc_write(emc_read(EMC_CFG_DIG_DLL) & 0xFFFFFFFE, EMC_CFG_DIG_DLL); - - /* Request a timing update event */ - emc_timing_update(fbio_cfg7); - - /* Wait until CFG_DLL_EN is cleared. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, fbio_cfg7); -} - -static void pll_disable(uint32_t dst_clk_src) { - volatile tegra_car_t *car = car_get_regs(); - - switch (dst_clk_src >> 29) { - case TEGRA_EMC_SRC_PLLM: - case TEGRA_EMC_SRC_PLLM_UD: - car_write(car_read(&car->pllmb_base) & 0xBFFFFFFF, &car->pllmb_base); - break; - case TEGRA_EMC_SRC_PLLMB_UD: - case TEGRA_EMC_SRC_PLLMB: - car_write(car_read(&car->pllm_base) & 0xBFFFFFFF, &car->pllm_base); - break; - case TEGRA_EMC_SRC_PLLC: - case TEGRA_EMC_SRC_PLLP: - case TEGRA_EMC_SRC_CLKM: - case TEGRA_EMC_SRC_PLLP_UD: - car_write(car_read(&car->pllm_base) & 0xBFFFFFFF, &car->pllm_base); - car_write(car_read(&car->pllmb_base) & 0xBFFFFFFF, &car->pllmb_base); - break; - } -} - -static void dvfs_power_ramp_down(tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, bool flip_backward, uint32_t vtt_vdda_channel) { - tegra_b01_emc_timing_t *from_table = (flip_backward ? dst_timing_tables : src_timing_tables); - tegra_b01_emc_timing_t *to_table = (flip_backward ? src_timing_tables : dst_timing_tables); - - uint32_t from_rate_khz = from_table->rate_khz; - uint32_t from_period = 1000000000 / from_rate_khz; - - uint32_t to_rate_khz = to_table->rate_khz; - uint32_t clk_div = 1000 * dst_timing_tables->src_clock_div; - - uint32_t delay = div_o3(clk_div, from_period); - - if (from_rate_khz >= 407997 || to_rate_khz <= 407996) { - if (from_rate_khz >= 407997 && to_rate_khz <= 407996) { - uint32_t pmacro_vttgen_ctrl_1 = emc_read(EMC_PMACRO_VTTGEN_CTRL_1); - - if (dst_timing_tables->vtt_vdda_dual_channel) { - if (vtt_vdda_channel != 1) { - return; - } - - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((to_table->vtt_vdda_ctrl_4 & 0x3F) << 10), delay); - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((to_table->vtt_vdda_ctrl_0 & 0x3F) << 10), delay * 2); - } else { - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_0 & 0x3F) << 10), 0); - } - } - } else { - uint32_t pmacro_vttgen_ctrl_1 = emc_read(EMC_PMACRO_VTTGEN_CTRL_1); - - if (dst_timing_tables->vtt_vdda_dual_channel) { - if (vtt_vdda_channel == 1) { - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_3 & 0x3F) << 10), delay); - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_0 & 0x3F) << 10), delay); - } else if (vtt_vdda_channel == 0) { - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_1 & 0x3F) << 10), delay); - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_2 & 0x3F) << 10), delay); - } - } else { - ccfifo_write(EMC_PMACRO_VTTGEN_CTRL_1, (pmacro_vttgen_ctrl_1 & 0xFFFF03FF) | ((dst_timing_tables->vtt_vdda_ctrl_0 & 0x3F) << 10), 0); - } - } -} - -static uint32_t dvfs_power_ramp_up(uint32_t dst_clock_period, bool flip_backward, tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, uint32_t needs_training) { - uint32_t misc_cfg_1 = flip_backward ? src_timing_tables->misc_cfg_1 : dst_timing_tables->misc_cfg_1; - - uint32_t emc_pmacro_cmd_pad_tx_ctrl, emc_pmacro_brick_ctrl_rfu1, emc_fbio_cfg5; - if (flip_backward) { - emc_pmacro_cmd_pad_tx_ctrl = src_timing_tables->burst_regs.emc_pmacro_cmd_pad_tx_ctrl; - emc_pmacro_brick_ctrl_rfu1 = src_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1; - emc_fbio_cfg5 = src_timing_tables->burst_regs.emc_fbio_cfg5; - } else if (needs_training & 3) { - emc_pmacro_cmd_pad_tx_ctrl = dst_timing_tables->shadow_regs_ca_train.emc_pmacro_cmd_pad_tx_ctrl; - emc_pmacro_brick_ctrl_rfu1 = dst_timing_tables->shadow_regs_ca_train.emc_pmacro_brick_ctrl_rfu1; - emc_fbio_cfg5 = dst_timing_tables->shadow_regs_ca_train.emc_fbio_cfg5; - } else if (needs_training & 0xF0) { - emc_pmacro_cmd_pad_tx_ctrl = dst_timing_tables->shadow_regs_rdwr_train.emc_pmacro_cmd_pad_tx_ctrl; - emc_pmacro_brick_ctrl_rfu1 = dst_timing_tables->shadow_regs_rdwr_train.emc_pmacro_brick_ctrl_rfu1; - emc_fbio_cfg5 = dst_timing_tables->shadow_regs_rdwr_train.emc_fbio_cfg5; - } else { - emc_pmacro_cmd_pad_tx_ctrl = dst_timing_tables->burst_regs.emc_pmacro_cmd_pad_tx_ctrl; - emc_pmacro_brick_ctrl_rfu1 = dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1; - emc_fbio_cfg5 = dst_timing_tables->burst_regs.emc_fbio_cfg5; - } - - bool misc_flag = (misc_cfg_1 & 3) == 3; - uint32_t timescale = 100000 << ((misc_cfg_1 >> 2) & 7); - uint32_t delay = (timescale / dst_clock_period); - - if (dst_clock_period < 869 || misc_flag) { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, emc_pmacro_brick_ctrl_rfu1 & 0xFE40FE40, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, emc_pmacro_brick_ctrl_rfu1 & 0xFEEDFEED, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, emc_pmacro_brick_ctrl_rfu1 & 0xFFFFFFFF, delay + 1); - - ccfifo_write(EMC_FBIO_CFG5, emc_fbio_cfg5 & 0xFFFFFEFF, delay + 10); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, emc_pmacro_cmd_pad_tx_ctrl & 0xFBFFFFFF, 5); - - return timescale + 10 * dst_clock_period + 3 * timescale; - } else if (dst_clock_period > 1665) { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, emc_pmacro_brick_ctrl_rfu1 | 0x00000600, 0); - - ccfifo_write(EMC_FBIO_CFG5, emc_fbio_cfg5 & 0xFFFFFEFF, 12); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, emc_pmacro_cmd_pad_tx_ctrl & 0xFBFFFFFF, 5); - - return 12 * dst_clock_period; - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, emc_pmacro_brick_ctrl_rfu1 | 0x06000600, delay + 1); - - ccfifo_write(EMC_FBIO_CFG5, emc_fbio_cfg5 & 0xFFFFFEFF, delay + 10); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, emc_pmacro_cmd_pad_tx_ctrl & 0xFBFFFFFF, 5); - - return timescale + 10 * dst_clock_period; - } -} - -static void freq_change(tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, uint32_t needs_training, uint32_t dst_clk_src, uint32_t unk) { - volatile tegra_car_t *car = car_get_regs(); - - /* Extract training values */ - bool train_ca = (needs_training & 0x001); - bool train_ca_vref = (needs_training & 0x002); - // bool train_quse = (needs_training & 0x004); - // bool train_quse_vref = (needs_training & 0x008); - bool train_wr = (needs_training & 0x010); - bool train_wr_vref = (needs_training & 0x020); - bool train_rd = (needs_training & 0x040); - bool train_rd_vref = (needs_training & 0x080); - bool train_swap_rank = (needs_training & 0x100); - bool train_self_refresh = (needs_training & 0x200); - - /* Check if we should do training. */ - uint32_t training_enabled_mask = (needs_training & 0xF3); - - uint32_t dst_emc_fbio_cfg7 = dst_timing_tables->emc_fbio_cfg7; - uint32_t dst_misc_cfg_0 = dst_timing_tables->misc_cfg_0; - uint32_t dst_misc_cfg_1 = dst_timing_tables->misc_cfg_1; - uint32_t dst_misc_cfg_2 = dst_timing_tables->misc_cfg_2; - uint32_t src_misc_cfg_0 = src_timing_tables->misc_cfg_0; - uint32_t src_misc_cfg_1 = src_timing_tables->misc_cfg_1; - uint32_t src_t_rp = src_timing_tables->dram_timings.t_rp; - uint32_t src_t_rfc = src_timing_tables->dram_timings.t_rfc; - uint32_t dst_t_pdex = dst_timing_tables->dram_timings.t_pdex; - uint32_t dst_t_fc_lpddr4 = dst_timing_tables->dram_timings.t_fc_lpddr4; - - g_fsp_for_next_freq = !g_fsp_for_next_freq; - - int dram_type = emc_read(EMC_FBIO_CFG5) & EMC_FBIO_CFG5_DRAM_TYPE_MASK >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; - uint32_t src_emc_zcal_wait_cnt = src_timing_tables->burst_regs.emc_zcal_wait_cnt; - - bool shared_zq_resistor = (src_emc_zcal_wait_cnt >> 31) & 1; - - bool opt_zcal_en_cc = (dst_timing_tables->burst_regs.emc_zcal_interval && !src_timing_tables->burst_regs.emc_zcal_interval) || (dram_type == DRAM_TYPE_LPDDR4); - - uint32_t dst_t_fc_lpddr4_hz = 1000 * dst_t_fc_lpddr4; - - bool is_lpddr2 = (dram_type == DRAM_TYPE_LPDDR2); - bool is_lpddr3 = is_lpddr2 && ((dst_timing_tables->burst_regs.emc_fbio_cfg5 >> 25) & 1); - uint32_t opt_dll_mode = (dram_type == DRAM_TYPE_DDR3) ? get_dll_state(dst_timing_tables) : DLL_OFF; - - int dram_dev_num = ((mc_read(MC_EMEM_ADR_CFG) & 1) + 1); - - uint32_t tZQCAL_lpddr4 = dst_timing_tables->tZQCAL_lpddr4; - uint32_t zqcal_before_cc_cutoff = dst_timing_tables->zqcal_before_cc_cutoff; - uint32_t opt_cc_short_zcal = dst_timing_tables->opt_cc_short_zcal; - uint32_t opt_short_zcal = dst_timing_tables->opt_short_zcal; - uint32_t opt_do_sw_qrst = dst_timing_tables->opt_do_sw_qrst; - uint32_t save_restore_clkstop_pd = dst_timing_tables->save_restore_clkstop_pd; - // uint32_t opt_E90 = dst_timing_tables->opt_E90; - uint32_t cya_allow_ref_cc = dst_timing_tables->cya_allow_ref_cc; - uint32_t ref_b4_sref_en = dst_timing_tables->ref_b4_sref_en; - uint32_t cya_issue_pc_ref = dst_timing_tables->cya_issue_pc_ref; - - uint32_t src_rate_khz = src_timing_tables->rate_khz; - uint32_t dst_rate_khz = dst_timing_tables->rate_khz; - - uint32_t src_clock_period = 1000000000 / src_rate_khz; - uint32_t dst_clock_period = 1000000000 / dst_rate_khz; - - uint32_t emc_auto_cal_config = emc_read(EMC_AUTO_CAL_CONFIG); - - uint32_t adj_dst_t_fc_lpddr4 = (dst_clock_period <= zqcal_before_cc_cutoff) ? dst_t_fc_lpddr4_hz : 0; - - uint32_t emc_dbg_o = emc_read(EMC_DBG); - uint32_t emc_pin_o = emc_read(EMC_PIN); - uint32_t emc_cfg_pipe_clk_o = emc_read(EMC_CFG_PIPE_CLK); - uint32_t emc_dbg = emc_dbg_o; - - uint32_t emc_cfg = dst_timing_tables->burst_regs.emc_cfg; - uint32_t emc_sel_dpd_ctrl = dst_timing_tables->emc_sel_dpd_ctrl; - - uint32_t next_push, next_dq_e_ivref, next_dqs_e_ivref; - - /* Step 1: - * Pre DVFS SW sequence. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 1\n"); - //mdelay(500); - - /* Step 1.1: Disable DLL. */ - uint32_t tmp = emc_read(EMC_CFG_DIG_DLL); - tmp &= ~EMC_CFG_DIG_DLL_CFG_DLL_EN; - emc_write(tmp, EMC_CFG_DIG_DLL); - - /* Calculate 14000 / dst_period. */ - uint32_t div_14000_by_dst_period = max(div_o3(14000, dst_clock_period), (uint32_t)10); - - /* Request a timing update. */ - emc_timing_update(dst_emc_fbio_cfg7); - - /* Wait for DLL to be disabled. */ - wait_for_update(EMC_CFG_DIG_DLL, EMC_CFG_DIG_DLL_CFG_DLL_EN, false, dst_emc_fbio_cfg7); - - /* Step 1.2: Disable AUTOCAL. */ - emc_auto_cal_config = (dst_timing_tables->emc_auto_cal_config & 0x7FFFF9FF) | 0x600; - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - emc_read(EMC_AUTO_CAL_CONFIG); - - /* Step 1.3: Disable other power features. */ - emc_dbg = emc_set_shadow_bypass(ACTIVE, emc_dbg_o); - emc_write(emc_dbg, EMC_DBG); - emc_write(emc_cfg & ~(EMC_CFG_DYN_SELF_REF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | EMC_CFG_DRAM_CLKSTOP_PD), EMC_CFG); - emc_write(emc_sel_dpd_ctrl & ~(EMC_SEL_DPD_CTRL_CLK_SEL_DPD_EN | EMC_SEL_DPD_CTRL_CA_SEL_DPD_EN | EMC_SEL_DPD_CTRL_RESET_SEL_DPD_EN | EMC_SEL_DPD_CTRL_ODT_SEL_DPD_EN | EMC_SEL_DPD_CTRL_DATA_SEL_DPD_EN), EMC_SEL_DPD_CTRL); - emc_write(emc_dbg_o, EMC_DBG); - - /* Skip this if dvfs_with_training is set. */ - bool compensate_trimmer_applicable = false; - uint32_t adel = 0; - if (!training_enabled_mask && dst_timing_tables->periodic_training) { - /* Wait for DRAM to get out of power down. */ - wait_for_update(EMC_EMC_STATUS, dram_dev_num == TWO_RANK ? 0x30 : 0x10, false, dst_emc_fbio_cfg7); - - /* Wait for DRAM to get out of self refresh. */ - wait_for_update(EMC_EMC_STATUS, 0x300, false, dst_emc_fbio_cfg7); - - if (dst_timing_tables->periodic_training) { - /* Reset all clock tree values. */ - dst_timing_tables->current_dram_clktree_c0d0u0 = dst_timing_tables->trained_dram_clktree_c0d0u0; - dst_timing_tables->current_dram_clktree_c0d0u1 = dst_timing_tables->trained_dram_clktree_c0d0u1; - dst_timing_tables->current_dram_clktree_c0d1u0 = dst_timing_tables->trained_dram_clktree_c0d1u0; - dst_timing_tables->current_dram_clktree_c0d1u1 = dst_timing_tables->trained_dram_clktree_c0d1u1; - dst_timing_tables->current_dram_clktree_c1d0u0 = dst_timing_tables->trained_dram_clktree_c1d0u0; - dst_timing_tables->current_dram_clktree_c1d0u1 = dst_timing_tables->trained_dram_clktree_c1d0u1; - dst_timing_tables->current_dram_clktree_c1d1u0 = dst_timing_tables->trained_dram_clktree_c1d1u0; - dst_timing_tables->current_dram_clktree_c1d1u1 = dst_timing_tables->trained_dram_clktree_c1d1u1; - - /* Do DVFS_SEQUENCE. */ - adel = periodic_compensation_handler(DVFS_SEQUENCE, dram_dev_num, src_timing_tables, dst_timing_tables); - - /* Check if we should use compensate trimmer. */ - compensate_trimmer_applicable = dst_timing_tables->periodic_training && ((adel * 128 * (dst_rate_khz / 1000)) / 1000000) > dst_timing_tables->tree_margin; - } - } - - emc_write(EMC_INTSTATUS_CLKCHANGE_COMPLETE, EMC_INTSTATUS); - - emc_dbg = emc_set_shadow_bypass(ACTIVE, emc_dbg); - emc_write(emc_dbg, EMC_DBG); - emc_write(emc_cfg & ~(EMC_CFG_DYN_SELF_REF | EMC_CFG_DRAM_ACPD | EMC_CFG_DRAM_CLKSTOP_SR | EMC_CFG_DRAM_CLKSTOP_PD), EMC_CFG); - emc_write(emc_sel_dpd_ctrl & ~(EMC_SEL_DPD_CTRL_CLK_SEL_DPD_EN | EMC_SEL_DPD_CTRL_CA_SEL_DPD_EN | EMC_SEL_DPD_CTRL_RESET_SEL_DPD_EN | EMC_SEL_DPD_CTRL_ODT_SEL_DPD_EN | EMC_SEL_DPD_CTRL_DATA_SEL_DPD_EN), EMC_SEL_DPD_CTRL); - emc_write(emc_cfg_pipe_clk_o | EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON, EMC_CFG_PIPE_CLK); - emc_write(dst_timing_tables->emc_fdpd_ctrl_cmd_no_ramp & ~EMC_FDPD_CTRL_CMD_NO_RAMP_CMD_DPD_NO_RAMP_ENABLE, EMC_FDPD_CTRL_CMD_NO_RAMP); - - /* Adjust pllm_misc1 as needed. */ - if (dst_timing_tables->pllm_misc1_0_pllm_clamp_ph90) { - car_write(car_read(&car->pllm_misc1) & 0x7FFFFFFF, &car->pllm_misc1); - } - - /* Check if we need to turn on VREF generator. */ - if ((((!src_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF)) && - ((dst_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF))) || - ((!(src_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF_B01)) && - ((dst_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl & - EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF_B01)))) - { - uint32_t pad_tx_ctrl = dst_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl; - uint32_t last_pad_tx_ctrl = src_timing_tables->burst_regs.emc_pmacro_data_pad_tx_ctrl; - - next_dqs_e_ivref = pad_tx_ctrl & EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF_B01; - next_dq_e_ivref = pad_tx_ctrl & EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF; - next_push = (last_pad_tx_ctrl & ~EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQ_E_IVREF & ~EMC_PMACRO_DATA_PAD_TX_CTRL_DATA_DQS_E_IVREF_B01) | next_dq_e_ivref | next_dqs_e_ivref; - emc_write(next_push, EMC_PMACRO_DATA_PAD_TX_CTRL); - - emc_write(emc_dbg_o, EMC_DBG); - udelay(1); - } else { - emc_write(emc_dbg_o, EMC_DBG); - } - - /* Check if we need to fixup xm2comppadctrl */ - if ((dst_misc_cfg_1 & 0x20) == 0) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - uint32_t xm2comppadctrl = emc_read(EMC_XM2COMPPADCTRL); - - emc_write(xm2comppadctrl | 0x08000000, EMC_XM2COMPPADCTRL); - udelay(1); - emc_write(xm2comppadctrl | 0x18000000, EMC_XM2COMPPADCTRL); - udelay(1); - emc_write(xm2comppadctrl | 0x38000000, EMC_XM2COMPPADCTRL); - udelay(1); - - emc_write(emc_set_shadow_bypass(ASSEMBLY, emc_dbg_o), EMC_DBG); - } - - /* Step 2: - * Prelock the DLL. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 2\n"); - //mdelay(500); - - if (dst_timing_tables->burst_regs.emc_cfg_dig_dll & EMC_CFG_DIG_DLL_CFG_DLL_EN) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(emc_read(EMC_PMACRO_DLL_CFG_1) & 0xFFFFDFFF, EMC_PMACRO_DLL_CFG_1); - emc_read(EMC_PMACRO_DLL_CFG_1); - - emc_write(emc_set_shadow_bypass(ASSEMBLY, emc_dbg_o), EMC_DBG); - emc_read(EMC_DBG); - - dll_prelock(dst_timing_tables, src_timing_tables, training_enabled_mask, dst_clk_src); - } else { - dll_disable(dst_emc_fbio_cfg7); - } - - /* Step 3: - * Prepare autocal for the clock change. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 3\n"); - //mdelay(500); - - /* Disable AUTOCAL. */ - emc_auto_cal_config = (dst_timing_tables->emc_auto_cal_config & 0x7FFFF9FF) | 0x600; - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->emc_auto_cal_config2, EMC_AUTO_CAL_CONFIG2); - - if (dst_emc_fbio_cfg7 & (EMC_FBIO_CFG7_CH0_ENABLE | EMC_FBIO_CFG7_CH1_ENABLE)) { - emc0_write(dst_timing_tables->emc_auto_cal_config3, EMC_AUTO_CAL_CONFIG3); - emc0_write(dst_timing_tables->emc_auto_cal_config4, EMC_AUTO_CAL_CONFIG4); - emc0_write(dst_timing_tables->emc_auto_cal_config5, EMC_AUTO_CAL_CONFIG5); - emc0_write(dst_timing_tables->emc_auto_cal_config6, EMC_AUTO_CAL_CONFIG6); - emc0_write(dst_timing_tables->emc_auto_cal_config7, EMC_AUTO_CAL_CONFIG7); - emc0_write(dst_timing_tables->emc_auto_cal_config8, EMC_AUTO_CAL_CONFIG8); - } - - emc_write(emc_dbg_o, EMC_DBG); - - emc_auto_cal_config = (dst_timing_tables->emc_auto_cal_config & 0x7FFFF9FE) | 0x601; - emc_write(emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - - /* Step 4: - * Update EMC_CFG. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 4\n"); - //mdelay(500); - - emc_write(emc_read(EMC_CFG) & 0xEFFFFFFF, EMC_CFG); - emc_write(dst_timing_tables->emc_cfg_2, EMC_CFG_2); - - /* Step 5: - * Prepare reference variables for ZQCAL regs. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 5\n"); - //mdelay(500); - - uint32_t emc_zcal_interval = src_timing_tables->burst_regs.emc_zcal_interval & 0xFF000000; - uint32_t dst_emc_zcal_wait_cnt = dst_timing_tables->burst_regs.emc_zcal_wait_cnt; - - uint32_t zq_wait_long, zq_wait_short; - - if (dram_type == DRAM_TYPE_LPDDR4) { - zq_wait_long = max(div_o3(1000000, dst_clock_period), (uint32_t)1); - zq_wait_short = max(div_o3(30000, dst_clock_period), (uint32_t)8) + 1; - } else if (is_lpddr2 || is_lpddr3) { - zq_wait_long = max(div_o3(360000, dst_clock_period), dst_timing_tables->min_mrs_wait) + 4; - zq_wait_short = 0; - } else if (dram_type == DRAM_TYPE_DDR3) { - zq_wait_long = max(div_o3(320000, dst_clock_period), (uint32_t)256); - zq_wait_short = 0; - } else { - zq_wait_long = 0; - zq_wait_short = 0; - } - - /* Step 6: - * Training code. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 6\n"); - //mdelay(500); - - { - uint32_t pintemp = emc_read(EMC_PIN); - if ((train_ca || train_ca_vref) && (dram_dev_num == TWO_RANK)) { - emc_write(pintemp | 0x7, EMC_PIN); - } - } - - /* Step 7: - * Program FSP reference registers and send MRWs to new FSPWR. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 7\n"); - //mdelay(500); - - uint32_t mr13_flip_fspop, mr13_flip_fspwr; - if (!g_fsp_for_next_freq) { - mr13_flip_fspwr = (dst_timing_tables->emc_mrw3 & 0xffffff3f) | 0x80; - mr13_flip_fspop = (dst_timing_tables->emc_mrw3 & 0xffffff3f) | 0x00; - } else { - mr13_flip_fspwr = (dst_timing_tables->emc_mrw3 & 0xffffff3f) | 0x40; - mr13_flip_fspop = (dst_timing_tables->emc_mrw3 & 0xffffff3f) | 0xc0; - } - - uint32_t mr13_catr_enable = mr13_flip_fspwr | 1; - - if (dram_dev_num == TWO_RANK) { - if (train_ca || train_ca_vref) { - mr13_flip_fspop = (mr13_flip_fspop & 0x3FFFFFFF) | (train_swap_rank ? 0x80000000 : 0x40000000); - } - - mr13_catr_enable = (mr13_catr_enable & 0x3FFFFFFF) | (train_swap_rank ? 0x40000000 : 0x80000000); - } - - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_write(mr13_flip_fspwr, EMC_MRW3); - emc_write(dst_timing_tables->emc_mrw, EMC_MRW); - emc_write(dst_timing_tables->emc_mrw2, EMC_MRW2); - } - - /* Step 8: - * Program the shadow registers. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 8\n"); - //mdelay(500); - - /* Set burst registers. */ - { - uint32_t pmacro_vttgen_ctrl_1 = emc_read(EMC_PMACRO_VTTGEN_CTRL_1); - uint32_t xm2comppadctrl = emc_read(EMC_XM2COMPPADCTRL); - for (int i = 0; i < dst_timing_tables->num_burst; ++i) { - uint32_t reg_addr = g_burst_regs_addr[i]; - - uint32_t wval; - if (train_ca || train_ca_vref) { - wval = dst_timing_tables->shadow_regs_ca_train_arr[i]; - } else if (train_wr || train_wr_vref || train_rd || train_rd_vref) { - wval = dst_timing_tables->shadow_regs_rdwr_train_arr[i]; - } else { - wval = dst_timing_tables->burst_regs_arr[i]; - } - - /* Adjust the value to write. */ - switch (reg_addr) { - case EMC_BASE + EMC_CFG: - wval &= (dram_type == DRAM_TYPE_LPDDR4) ? 0x0FFFFFFF : 0xCFFFFFFF; - break; - case EMC_BASE + EMC_MRS_WAIT_CNT: - if (opt_zcal_en_cc && is_lpddr2 && (opt_cc_short_zcal == 0) && (opt_short_zcal != 0)) { - wval = (wval & 0xFFFFFC00) | (zq_wait_long & 0x3FF); - } - break; - case EMC_BASE + EMC_ZCAL_WAIT_CNT: - if ((opt_short_zcal != 0) && opt_zcal_en_cc && (opt_cc_short_zcal == 0) && (dram_type == DRAM_TYPE_DDR3)) { - wval = (wval & 0xFFFFF800) | (zq_wait_long & 0x7FF); - } - break; - case EMC_BASE + EMC_ZCAL_INTERVAL: - if (opt_zcal_en_cc) { - wval = 0; - } - break; - case EMC_BASE + EMC_PMACRO_BRICK_CTRL_RFU1: - wval &= 0xF800F800; - break; - case EMC_BASE + EMC_PMACRO_CMD_PAD_TX_CTRL: - wval |= 0x04000000; - break; - case EMC_BASE + EMC_PMACRO_AUTOCAL_CFG_COMMON: - wval |= 0x00010000; - break; - case EMC_BASE + EMC_TRAINING_CTRL: - if (train_swap_rank) { - wval |= 0x4000; - } - break; - case EMC_BASE + EMC_REFRESH: - case EMC_BASE + EMC_TREFBW: - wval >>= (unk <= 2) ? unk : 0; - break; - case EMC_BASE + EMC_XM2COMPPADCTRL: - if ((dst_misc_cfg_1 & 0x20) == 0) { - wval = (wval & 0x00FFFFFF) | (xm2comppadctrl & 0xFF000000); - } - break; - case EMC_BASE + EMC_DLL_CFG_1: - wval = (wval & 0xFFFFDFFF) | (emc_read(EMC_PMACRO_DLL_CFG_1) & 0x00002000); - break; - case EMC_BASE + EMC_PMACRO_VTTGEN_CTRL_1: - wval = (wval & 0xFFFF03FF) | (pmacro_vttgen_ctrl_1 & 0xFC00); - break; - case EMC_BASE + EMC_MRW6: - case EMC_BASE + EMC_MRW7: - case EMC_BASE + EMC_MRW8: - case EMC_BASE + EMC_MRW9: - case EMC_BASE + EMC_MRW14: - case EMC_BASE + EMC_MRW15: - case EMC0_BASE + EMC_MRW10: - case EMC0_BASE + EMC_MRW11: - case EMC0_BASE + EMC_MRW12: - case EMC0_BASE + EMC_MRW13: - case EMC1_BASE + EMC_MRW10: - case EMC1_BASE + EMC_MRW11: - case EMC1_BASE + EMC_MRW12: - case EMC1_BASE + EMC_MRW13: - if (dram_type != DRAM_TYPE_LPDDR4) { - continue; - } - break; - } - - /* Write the value. */ - mmio_write(wval, (volatile uint32_t *)reg_addr); - } - } - - if (dram_type == DRAM_TYPE_LPDDR4) { - /* Use the current timing when training. */ - uint32_t mrw_req; - if (training_enabled_mask) - mrw_req = (23 << EMC_MRW_MRW_MA_SHIFT) | (src_timing_tables->run_clocks & EMC_MRW_MRW_OP_MASK); - else - mrw_req = (23 << EMC_MRW_MRW_MA_SHIFT) | (dst_timing_tables->run_clocks & EMC_MRW_MRW_OP_MASK); - - emc_write(mrw_req, EMC_MRW); - } - - /* Per channel burst registers. */ - if (dram_type == DRAM_TYPE_LPDDR4) { - for (int i = 0; i < dst_timing_tables->num_burst_per_ch; ++i) { - emc_write_per_ch(dst_timing_tables->burst_reg_per_ch_arr[i], g_burst_perch_regs_addr[i], dst_emc_fbio_cfg7); - } - } - - /* Vref regs. */ - for (int i = 0; i < dst_timing_tables->vref_num; ++i) { - emc_write_per_ch(dst_timing_tables->vref_perch_regs_arr[i], g_vref_perch_regs_addr[i], dst_emc_fbio_cfg7); - } - - /* Training regs. */ - if (training_enabled_mask) { - for (int i = 0; i < dst_timing_tables->training_mod_num; ++i) { - emc_write_per_ch(dst_timing_tables->training_mod_regs_arr[i], g_training_mod_perch_regs_addr[i], dst_emc_fbio_cfg7); - } - } - - /* Per channel trimmers. */ - for (int i = 0; i < dst_timing_tables->num_trim_per_ch; ++i) { - uint32_t reg_addr = g_trim_perch_regs_addr[i]; - uint32_t wval = dst_timing_tables->trim_perch_regs_arr[i]; - - if (compensate_trimmer_applicable) { - switch (reg_addr) { - case EMC0_BASE + EMC_DATA_BRLSHFT_0: - case EMC1_BASE + EMC_DATA_BRLSHFT_0: - case EMC0_BASE + EMC_DATA_BRLSHFT_1: - case EMC1_BASE + EMC_DATA_BRLSHFT_1: - wval = apply_periodic_compensation_trimmer(dst_timing_tables, reg_addr); - break; - } - } - - emc_write_per_ch(wval, reg_addr, dst_emc_fbio_cfg7); - } - - /* Trimmers. */ - for (int i = 0; i < dst_timing_tables->num_trim; ++i) { - uint32_t reg_addr = g_trim_regs_addr[i]; - uint32_t wval = dst_timing_tables->trim_regs_arr[i]; - - if (compensate_trimmer_applicable) { - switch (reg_addr) { - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1: - case EMC_BASE + EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2: - wval = apply_periodic_compensation_trimmer(dst_timing_tables, reg_addr); - break; - } - } - - mmio_write(wval, (volatile uint32_t *)reg_addr); - } - - if (training_enabled_mask) { - if (train_wr && dst_timing_tables->periodic_training) { - periodic_compensation_handler(WRITE_TRAINING_SEQUENCE, dram_dev_num, src_timing_tables, dst_timing_tables); - } - } else { - /* Write burst_mc_regs. */ - for (int i = 0; i < dst_timing_tables->num_mc_regs; ++i) { - mmio_write(dst_timing_tables->burst_mc_regs_arr[i], (volatile uint32_t *)g_burst_mc_regs_addr[i]); - } - - /* Registers to be programmed on the faster clock. */ - if (dst_timing_tables->rate_khz < src_timing_tables->rate_khz) { - for (int i = 0; i < dst_timing_tables->num_up_down; ++i) { - mmio_write(dst_timing_tables->la_scale_regs_arr[i], (volatile uint32_t *)g_la_scale_regs_addr[i]); - } - } - } - - if ((dst_misc_cfg_1 & 2) != 0 && (dst_misc_cfg_1 & 1) == 0) { - emc_write(dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1, EMC_PMACRO_BRICK_CTRL_RFU1); - emc_write(dst_timing_tables->burst_regs.emc_pmacro_cmd_pad_tx_ctrl, EMC_PMACRO_CMD_PAD_TX_CTRL); - } - - emc_write(EMC_CFG_PIPE_CLK_CLK_ALWAYS_ON, EMC_CFG_PIPE_CLK); - emc_write(dst_timing_tables->emc_fdpd_ctrl_cmd_no_ramp & ~EMC_FDPD_CTRL_CMD_NO_RAMP_CMD_DPD_NO_RAMP_ENABLE, EMC_FDPD_CTRL_CMD_NO_RAMP); - - - /* Step 9: - * LPDDR4 section A. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 9/10\n"); - //mdelay(500); - - uint32_t emc_dbg_write_active = emc_dbg_o; - if (dram_type == DRAM_TYPE_LPDDR4) { - emc_write(emc_zcal_interval, EMC_ZCAL_INTERVAL); - emc_write((dst_emc_zcal_wait_cnt & 0xFFFFF800) | 1, EMC_ZCAL_WAIT_CNT); - emc_write(emc_dbg_o | (EMC_DBG_WRITE_MUX_ACTIVE | EMC_DBG_WRITE_ACTIVE_ONLY), EMC_DBG); - emc_write(emc_zcal_interval, EMC_ZCAL_INTERVAL); - emc_write(emc_dbg_o, EMC_DBG); - - if (training_enabled_mask) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - emc_write(dst_timing_tables->burst_regs.emc_pmacro_autocal_cfg_common | EMC_PMACRO_AUTOCAL_CFG_COMMON_E_CAL_BYPASS_DVFS, EMC_PMACRO_AUTOCAL_CFG_COMMON); - - if (train_ca || train_ca_vref) { - emc_write(src_timing_tables->burst_regs.emc_fbio_cfg5 | EMC_FBIO_CFG5_CMD_BUS_RETURN_TO_ZERO, EMC_FBIO_CFG5); - } - - emc_write(emc_dbg_o, EMC_DBG); - - if (dst_emc_fbio_cfg7 == (EMC_FBIO_CFG7_CH0_ENABLE | EMC_FBIO_CFG7_CH1_ENABLE)) { - ccfifo_write(EMC_CFG_SYNC, 1, 0); - } - - /* Change CFG_SWAP. */ - ccfifo_write(EMC_DBG, ((emc_dbg_o & 0xF3FFFFFF) | 0x4000000), 0); - } - - ccfifo_write(EMC_SELF_REF, 0x101, 0); - - if (!(train_ca || train_ca_vref) && dst_clock_period <= zqcal_before_cc_cutoff) { - ccfifo_write(EMC_MRW3, mr13_flip_fspwr ^ 0x40, 0); - ccfifo_write(EMC_MRW6, (src_timing_tables->burst_regs.emc_mrw6 & 0x0000C0C0) | (dst_timing_tables->burst_regs.emc_mrw6 & 0xFFFF3F3F), 0); - ccfifo_write(EMC_MRW14, (src_timing_tables->burst_regs.emc_mrw14 & 0x00003838) | (dst_timing_tables->burst_regs.emc_mrw14 & 0xFFFF0707), 0); - - if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_MRW7, (src_timing_tables->burst_regs.emc_mrw7 & 0x0000C0C0) | (dst_timing_tables->burst_regs.emc_mrw7 & 0xFFFF3F3F), 0); - ccfifo_write(EMC_MRW15, (src_timing_tables->burst_regs.emc_mrw15 & 0x00003838) | (dst_timing_tables->burst_regs.emc_mrw15 & 0xFFFF0707), 0); - } - - if (opt_zcal_en_cc) { - if (dram_dev_num == ONE_RANK || shared_zq_resistor) { - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - } else { - ccfifo_write(EMC_ZQ_CAL, EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - } - } - } - - if (training_enabled_mask) { - emc_dbg_write_active = (emc_dbg_o & 0xF7FFFFFF) | 0x4000000 | EMC_DBG_WRITE_ACTIVE_ONLY; - ccfifo_write(EMC_DBG, emc_dbg_write_active, 0); - } - - if (train_ca || train_ca_vref) { - ccfifo_write(EMC_PMACRO_DATA_RX_TERM_MODE, src_timing_tables->burst_regs.emc_pmacro_data_rx_term_mode & 0xFFFFFCCC, 0); - - if (dram_dev_num == TWO_RANK && train_swap_rank) { - ccfifo_write(EMC_MRW3, mr13_flip_fspop | 0x8, (1000 * src_t_rp) / src_clock_period); - ccfifo_write(EMC_MRW3, mr13_catr_enable | 0x8, 0); - } else { - ccfifo_write(EMC_MRW3, mr13_catr_enable | 0x8, (1000 * src_t_rp) / src_clock_period); - } - - ccfifo_write(EMC_TR_CTRL_0, (dst_timing_tables->emc_tr_ctrl_0 & 0x3F1000) | 0x100012A, 0); - - ccfifo_write(EMC_INTSTATUS, 0, 1000000 / src_clock_period); - } else { - ccfifo_write(EMC_MRW3, mr13_flip_fspop | 0x8, (1000 * src_t_rp) / src_clock_period); - - ccfifo_write(EMC_INTSTATUS, 0, max(div_o3_f(dst_t_fc_lpddr4_hz, src_clock_period), max(div_o3_f(14000, src_clock_period), (uint32_t)10))); - } - - uint32_t t = 30 + (cya_allow_ref_cc ? ((4000 * src_t_rfc + 1000 * src_t_rp) / src_clock_period) : 0); - ccfifo_write(EMC_PIN, emc_pin_o & ~(EMC_PIN_PIN_CKE_PER_DEV | EMC_PIN_PIN_CKEB | EMC_PIN_PIN_CKE), t); - } else { - ccfifo_write(EMC_SELF_REF, 0x1, 0); - } - - uint32_t ref_delay_mult = 1; - if (ref_b4_sref_en) ++ref_delay_mult; - if (cya_allow_ref_cc) ++ref_delay_mult; - if (cya_issue_pc_ref) ++ref_delay_mult; - - uint32_t ref_delay = 20 + ref_delay_mult * (((1000 * src_t_rfc) / src_clock_period) + ((1000 * src_t_rp) / src_clock_period)); - - /* Step 11: - * Ramp down. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 11\n"); - //mdelay(500); - - ccfifo_write(EMC_CFG_SYNC, 1, (dram_type == DRAM_TYPE_LPDDR4) ? 0 : ref_delay); - - bool do_ramp_up = (dst_misc_cfg_1 & 2) == 0 || (dst_misc_cfg_1 & 1) != 0; - if (!do_ramp_up) { - ccfifo_write(EMC_FBIO_CFG5, emc_read(EMC_FBIO_CFG5) & 0xF7FFFFFF, 12); - } - - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active & 0xBFFFFFFF), 0); - - if ((dst_misc_cfg_2 & 0x10) == 0) { - dvfs_power_ramp_down(src_timing_tables, dst_timing_tables, false, 0); - } - - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active | 0x40000000), 0); - - uint32_t ramp_down_wait = 0; - if (do_ramp_up) { - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, src_timing_tables->burst_regs.emc_pmacro_cmd_pad_tx_ctrl | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON, 0); - ccfifo_write(EMC_FBIO_CFG5, src_timing_tables->burst_regs.emc_fbio_cfg5 | 0x100, 12); - - bool misc_flag = (dst_misc_cfg_1 & 3) == 3; - - uint32_t timescale = (100000 << ((dst_misc_cfg_1 >> 2) & 7)); - uint32_t delay = (timescale / src_clock_period); - - if (src_rate_khz > 1150747 || misc_flag) { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, src_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xFEEDFEED, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, src_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xFE40FE40, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, src_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xF800F800, delay + 1); - - - ramp_down_wait = 3 * timescale + 12 * src_clock_period; - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, src_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xF800F800, delay + 20); - - ramp_down_wait = timescale + 32 * src_clock_period; - } - - if (src_rate_khz > 600240 || misc_flag) { - ccfifo_write(EMC_INTSTATUS, 0, delay + 1); - - ramp_down_wait += 2 * timescale; - } - } - - /* Step 12: - * Trigger the clock change. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 12\n"); - //mdelay(500); - - ccfifo_write(EMC_STALL_THEN_EXE_AFTER_CLKCHANGE, 1, 0); - ccfifo_write(EMC_INTSTATUS, 0, dst_timing_tables->clkchange_delay); - - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active & 0xBFFFFFFF), 0); - - if ((dst_misc_cfg_2 & 0x10) == 0) { - dvfs_power_ramp_down(src_timing_tables, dst_timing_tables, false, 1); - } - - if (training_enabled_mask) { - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active | 0x40000000), 0); - } - - /* Step 13: - * Ramp up. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 13\n"); - //mdelay(500); - - uint32_t ramp_up_wait = 0; - if (do_ramp_up) { - ramp_up_wait = dvfs_power_ramp_up(dst_clock_period, false, src_timing_tables, dst_timing_tables, needs_training); - } - - if (ramp_up_wait < 1001000 && src_timing_tables->ramp_wait != dst_timing_tables->ramp_wait) { - ccfifo_write(EMC_INTSTATUS, 0, 1 + ((1001000 - ramp_up_wait) / dst_clock_period)); - } - - if (do_ramp_up) { - ccfifo_write(EMC_DBG, emc_dbg_write_active, 0); - } else { - ccfifo_write(EMC_FBIO_CFG5, emc_read(EMC_FBIO_CFG5), 0); - ccfifo_write(EMC_DBG, emc_dbg_write_active, 12); - } - - /* Step 14: - * Bringup CKE pins. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 14\n"); - //mdelay(500); - - if (dram_type == DRAM_TYPE_LPDDR4) { - uint32_t pin_val; - if (train_ca || train_ca_vref) { - pin_val = (dst_misc_cfg_0 & 1) ? ((emc_pin_o & 0xFFFCFFF8) | (((dst_misc_cfg_0 >> 1) & 3) << 16)) : emc_pin_o; - pin_val &= 0xFFFFFFF8; - if (dram_dev_num == TWO_RANK) { - if (train_swap_rank) { - pin_val |= 5; - } else { - pin_val |= 6; - } - } - } else { - pin_val = (dst_misc_cfg_0 & 1) ? ((emc_pin_o & 0xFFFCFFFF) | (((dst_misc_cfg_0 >> 1) & 3) << 16)) : emc_pin_o; - pin_val &= 0xFFFFFFF8; - if (dram_dev_num == TWO_RANK) { - pin_val |= 7; - } else { - pin_val |= 1; - } - } - - ccfifo_write(EMC_PIN, pin_val, 0); - } - - /* Step 15: - * Calculate zqlatch wait time; has dependency on ramping times. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 15\n"); - //mdelay(500); - - uint32_t dst_t_pdex_hz = 1000 * dst_t_pdex; - - uint32_t zq_latch_dvfs_wait_time; - if (dst_clock_period <= zqcal_before_cc_cutoff) { - zq_latch_dvfs_wait_time = (ramp_up_wait + ramp_down_wait) / dst_clock_period; - } else { - zq_latch_dvfs_wait_time = div_o3(dst_t_pdex_hz, dst_clock_period); - } - - if (!(train_ca || train_ca_vref) && (dram_type == DRAM_TYPE_LPDDR4) && opt_zcal_en_cc) { - int offset = (int)((tZQCAL_lpddr4 - adj_dst_t_fc_lpddr4) / dst_clock_period) - (int)zq_latch_dvfs_wait_time; - int addl_wait = (int)div_o3(dst_t_pdex_hz, dst_clock_period); - - if (dram_dev_num == TWO_RANK) { - if (shared_zq_resistor) { - if (dst_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, max_t(int, 0, addl_wait)); - } - - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, max_t(int, 0, offset + addl_wait)); - ccfifo_write(EMC_ZQ_CAL, (1 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - - if (!training_enabled_mask) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xFFFFFFF7) | 0xC000000 | (dst_misc_cfg_2 & 8), 0); - ccfifo_write(EMC_SELF_REF, 0, 0); - ccfifo_write(EMC_REF, 0, 0); - } - - ccfifo_write(EMC_ZQ_CAL, (1 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, zq_wait_short + div_14000_by_dst_period + (tZQCAL_lpddr4 / dst_clock_period)); - } else { - if (dst_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, (0 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, max_t(int, 0, addl_wait)); - } - - if (!training_enabled_mask) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xFFFFFFF7) | 0xC000000 | (dst_misc_cfg_2 & 8), max_t(int, 0, addl_wait)); - ccfifo_write(EMC_SELF_REF, 0, 0); - ccfifo_write(EMC_REF, 0, 0); - } - - ccfifo_write(EMC_ZQ_CAL, (0 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, div_14000_by_dst_period + max_t(int, 0, offset)); - } - } else { - if (dst_clock_period > zqcal_before_cc_cutoff) { - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, max_t(int, 0, addl_wait)); - } - - if (!training_enabled_mask) { - ccfifo_write(EMC_MRW3, (mr13_flip_fspop & 0xFFFFFFF7) | 0xC000000 | (dst_misc_cfg_2 & 8), max_t(int, 0, addl_wait)); - ccfifo_write(EMC_SELF_REF, 0, 0); - ccfifo_write(EMC_REF, 0x80000000, 0); - } - - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, div_14000_by_dst_period + max_t(int, 0, offset)); - } - } - - /* WAR: delay for zqlatch */ - ccfifo_write(EMC_INTSTATUS, 0, 10); - - /* Step 16: - * LPDDR4 Conditional Training Kickoff. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 16\n"); - //mdelay(500); - - if (training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4) { - if (opt_do_sw_qrst) { - ccfifo_write(EMC_ISSUE_QRST, 1, 0); - ccfifo_write(EMC_ISSUE_QRST, 0, 2); - } - - ccfifo_write(EMC_INTSTATUS, 0, (1020000 / dst_clock_period)); - - { - uint32_t train_cmd = 0; - if (train_ca) { - train_cmd |= (1 << 1); /* CA */ - } - if (train_ca_vref) { - train_cmd |= (1 << 5); /* CA_VREF */ - } - if (train_wr) { - train_cmd |= (1 << 3); /* WR */ - } - if (train_wr_vref) { - train_cmd |= (1 << 6); /* WR_VREF */ - } - if (train_rd) { - train_cmd |= (1 << 2); /* RD */ - } - if (train_rd_vref) { - train_cmd |= (1 << 7); /* RD_VREF */ - } - - train_cmd |= (1 << 31); /* GO */ - - ccfifo_write(EMC_TRAINING_CMD, train_cmd, 0); - } - - ccfifo_write(EMC_SWITCH_BACK_CTRL, 1, 0); - - if (!(train_ca || train_ca_vref) || train_swap_rank) { - ccfifo_write(EMC_MRW3, mr13_flip_fspop ^ 0xC0, 0); - ccfifo_write(EMC_INTSTATUS, 0, (1000000 / dst_clock_period)); - } - - { - uint32_t pin_val = (dst_misc_cfg_0 & 1) ? ((emc_pin_o & 0xFFFCFFFF) | (((dst_misc_cfg_0 >> 1) & 3) << 16)) : emc_pin_o; - ccfifo_write(EMC_PIN, pin_val & 0xFFFFFFF8, 0); - } - - ccfifo_write(EMC_CFG_SYNC, 1, 0); - - if ((src_misc_cfg_1 & 3) != 2) { - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active | 0x40000000), 0); - - ccfifo_write(EMC_PMACRO_CMD_PAD_TX_CTRL, dst_timing_tables->burst_regs.emc_pmacro_cmd_pad_tx_ctrl | EMC_PMACRO_CMD_PAD_TX_CTRL_CMD_DQ_TX_DRVFORCEON, 0); - ccfifo_write(EMC_FBIO_CFG5, dst_timing_tables->burst_regs.emc_fbio_cfg5 | 0x100, 12); - - bool misc_flag = (src_misc_cfg_1 & 3) == 3; - - uint32_t timescale = (100000 << ((src_misc_cfg_1 >> 2) & 7)); - uint32_t delay = (timescale / dst_clock_period); - - if (dst_rate_khz > 1150747 || misc_flag) { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xFEEDFEED, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xFE40FE40, delay + 1); - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xF800F800, delay + 1); - } else { - ccfifo_write(EMC_PMACRO_BRICK_CTRL_RFU1, dst_timing_tables->burst_regs.emc_pmacro_brick_ctrl_rfu1 & 0xF800F800, delay + 20); - } - - if (dst_rate_khz > 600240 || misc_flag) { - ccfifo_write(EMC_INTSTATUS, 0, delay + 1); - } - } else { - ccfifo_write(EMC_FBIO_CFG5, emc_read(EMC_FBIO_CFG5) & 0xF7FFFFFF, 12); - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active | 0x40000000), 0); - } - - ccfifo_write(EMC_STALL_THEN_EXE_AFTER_CLKCHANGE, 1, 0); - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_write_active & 0xBFFFFFFF), 0); - - if ((dst_misc_cfg_2 & 0x10) == 0) { - dvfs_power_ramp_down(src_timing_tables, dst_timing_tables, true, 1); - } - - if ((src_misc_cfg_1 & 3) != 2) { - dvfs_power_ramp_up(src_clock_period, true, src_timing_tables, dst_timing_tables, needs_training); - - if (ramp_up_wait < 1001000 && src_timing_tables->ramp_wait != dst_timing_tables->ramp_wait) { - ccfifo_write(EMC_INTSTATUS, 0, 1 + ((1001000 - ramp_up_wait) / dst_clock_period)); - } - - ccfifo_write(EMC_DBG, emc_dbg_write_active, 0); - } else { - if (ramp_up_wait < 1001000 && src_timing_tables->ramp_wait != dst_timing_tables->ramp_wait) { - ccfifo_write(EMC_INTSTATUS, 0, 1 + ((1001000 - ramp_up_wait) / dst_clock_period)); - } - - ccfifo_write(EMC_FBIO_CFG5, emc_read(EMC_FBIO_CFG5), 0); - ccfifo_write(EMC_DBG, emc_dbg_write_active, 12); - } - - { - uint32_t pin_val = (src_misc_cfg_0 & 1) ? ((emc_pin_o & 0xFFFCFFFF) | (((src_misc_cfg_0 >> 1) & 3) << 16)) : emc_pin_o; - pin_val &= 0xFFFFFFF8; - pin_val |= (dram_dev_num == TWO_RANK) ? 7 : 1; - ccfifo_write(EMC_PIN, pin_val, 0); - } - - if (train_ca || train_ca_vref) { - ccfifo_write(EMC_TR_CTRL_0, 0x2A, (200000 / src_clock_period)); - ccfifo_write(EMC_TR_CTRL_0, 0x20, (1000000 / src_clock_period)); - ccfifo_write(EMC_MRW3, mr13_catr_enable & 0xFFFFFFFE, 0); - ccfifo_write(EMC_INTSTATUS, 0, (1000000 / src_clock_period)); - ccfifo_write(EMC_PMACRO_DATA_RX_TERM_MODE, src_timing_tables->burst_regs.emc_pmacro_data_rx_term_mode, 0); - } - - ccfifo_write(EMC_DBG, emc_dbg_o, 0); - - if (opt_zcal_en_cc) { - if (shared_zq_resistor) { - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, 1 + div_o3(1000000, src_clock_period)); - - if ((!(train_ca || train_ca_vref) || train_swap_rank) && dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_ZQ_CAL, (1 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, (1 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_LATCH_CMD, 1 + div_o3(1000000, src_clock_period)); - } - } else { - ccfifo_write(EMC_ZQ_CAL, (dram_dev_num == ONE_RANK ? (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) : (0 << EMC_ZQ_CAL_DEV_SEL_SHIFT)) | EMC_ZQ_CAL_ZQ_CAL_CMD, 0); - ccfifo_write(EMC_ZQ_CAL, (dram_dev_num == ONE_RANK ? (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) : (0 << EMC_ZQ_CAL_DEV_SEL_SHIFT)) | EMC_ZQ_CAL_ZQ_LATCH_CMD, 1 + div_o3(1000000, src_clock_period)); - } - } - - if (!(train_ca || train_ca_vref)) { - ccfifo_write(EMC_MRW3, ((mr13_flip_fspop & 0xF3FFFFF7) | (dst_misc_cfg_2 & 8)) ^ 0x0C0000C0, 0); - } - - ccfifo_write(EMC_SELF_REF, 0x0, 0); - } - - /* Step 17: - * exit self refresh. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 17\n"); - //mdelay(500); - - if (dram_type != DRAM_TYPE_LPDDR4) { - ccfifo_write(EMC_SELF_REF, 0, 0); - } - - /* Step 18: - * Send MRWs to LPDDR3/DDR3. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 18\n"); - //mdelay(500); - - if (is_lpddr2) { - ccfifo_write(EMC_MRW2, dst_timing_tables->emc_mrw2, 0); - ccfifo_write(EMC_MRW, dst_timing_tables->emc_mrw, 0); - - if (is_lpddr3) { - ccfifo_write(EMC_MRW4, dst_timing_tables->emc_mrw4, 0); - } - } else if (dram_type == DRAM_TYPE_DDR3) { - if (opt_dll_mode) { - ccfifo_write(EMC_EMRS, dst_timing_tables->emc_emrs & ~EMC_EMRS_USE_EMRS_LONG_CNT, 0); - } - ccfifo_write(EMC_EMRS2, dst_timing_tables->emc_emrs2 & ~EMC_EMRS2_USE_EMRS2_LONG_CNT, 0); - ccfifo_write(EMC_MRS, dst_timing_tables->emc_mrs | EMC_EMRS_USE_EMRS_LONG_CNT, 0); - } - - /* Step 19: - * ZQCAL for LPDDR3/DDR3 - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 19\n"); - //mdelay(500); - - if (opt_zcal_en_cc) { - if (is_lpddr2) { - uint32_t zq_op = opt_cc_short_zcal ? dst_timing_tables->zq_op_cc_short_zcal : dst_timing_tables->zq_op_cc_long_zcal; - uint32_t zcal_wait_time_ps = opt_cc_short_zcal ? dst_timing_tables->zcal_wait_time_ps_cc_short_zcal : dst_timing_tables->zcal_wait_time_ps_cc_long_zcal; - uint32_t zcal_wait_time_clocks = div_o3(zcal_wait_time_ps, dst_clock_period); - - ccfifo_write(EMC_MRS_WAIT_CNT2, (zcal_wait_time_clocks & 0x3FF) | ((zcal_wait_time_clocks & 0x7FF) << 16), 0); - ccfifo_write(EMC_MRW, (zq_op | 0x880C0000) - 0x20000, 0); - - if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_MRW, zq_op | 0x480A0000, 0); - } - } else if (dram_type == DRAM_TYPE_DDR3) { - ccfifo_write(EMC_ZQ_CAL, (2 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD | (opt_cc_short_zcal ? 0 : EMC_ZQ_CAL_LONG), 0); - if (dram_dev_num == TWO_RANK) { - ccfifo_write(EMC_ZQ_CAL, (1 << EMC_ZQ_CAL_DEV_SEL_SHIFT) | EMC_ZQ_CAL_ZQ_CAL_CMD | (opt_cc_short_zcal ? 0 : EMC_ZQ_CAL_LONG), 0); - } - } - } - - /* Step 20: - * Issue ref and optional QRST. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 20\n"); - //mdelay(500); - - if (training_enabled_mask || dram_type != DRAM_TYPE_LPDDR4) { - ccfifo_write(EMC_REF, dram_dev_num == ONE_RANK ? 0x80000000 : 0x00000000, 0); - } - - if (opt_do_sw_qrst) { - ccfifo_write(EMC_ISSUE_QRST, 1, 0); - ccfifo_write(EMC_ISSUE_QRST, 0, 2); - } - - /* Step 21: - * Restore ZCAL and ZCAL interval. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 21\n"); - //mdelay(500); - - if (save_restore_clkstop_pd || opt_zcal_en_cc || (training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4)) { - ccfifo_write(EMC_DBG, emc_set_shadow_bypass(ACTIVE, emc_dbg_o), 0); - - if (opt_zcal_en_cc) { - if (training_enabled_mask) { - ccfifo_write(EMC_ZCAL_INTERVAL, (dst_misc_cfg_2 & 2) ? 0 : src_timing_tables->burst_regs.emc_zcal_interval, 0); - } else if (dram_type != DRAM_TYPE_LPDDR4) { - ccfifo_write(EMC_ZCAL_INTERVAL, (dst_misc_cfg_2 & 2) ? 0 : dst_timing_tables->burst_regs.emc_zcal_interval, 0); - } - } - - if (save_restore_clkstop_pd || (training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4)) { - ccfifo_write(EMC_CFG, dst_timing_tables->burst_regs.emc_cfg & ~EMC_CFG_DYN_SELF_REF, 0); - } - - if (training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4) { - ccfifo_write(EMC_SEL_DPD_CTRL, src_timing_tables->emc_sel_dpd_ctrl, 0); - } - - ccfifo_write(EMC_DBG, emc_dbg_o, 0); - } - - /* Step 22: - * Restore EMC_CFG_PIPE_CLK. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 22\n"); - //mdelay(500); - - ccfifo_write(EMC_CFG_PIPE_CLK, emc_cfg_pipe_clk_o, 0); - ccfifo_write(EMC_INTSTATUS, 0, dst_timing_tables->pipe_clk_delay); - - /* Step 23: - * Do clock change. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 23\n"); - //mdelay(500); - - if (training_enabled_mask) { - uint32_t clk_source_emc; - if (dst_emc_fbio_cfg7 & (EMC_FBIO_CFG7_CH0_ENABLE | EMC_FBIO_CFG7_CH1_ENABLE)) { - clk_source_emc = car_read(&car->clk_source_emc); - car_write(clk_source_emc, &car->clk_source_emc_safe); - } else { - clk_source_emc = 0; - } - - change_dll_src(src_timing_tables, clk_source_emc); - } - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 23b\n"); - //mdelay(500); - - { - uint32_t dig_dll = (emc_read(EMC_CFG_DIG_DLL) & 0xFFFFFFE4) | 8; - if ((dst_misc_cfg_2 & 1) == 0) { - dig_dll = (dig_dll & 0xFFFFFF3F) | 0x80; - } - emc_write(dig_dll, EMC_CFG_DIG_DLL); - emc_read(EMC_CFG_DIG_DLL); - } - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 23c\n"); - //mdelay(500); - - mc_read(MC_EMEM_ADR_CFG); - emc_read(EMC_INTSTATUS); - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 23d (%08x)\n", dst_clk_src); - //mdelay(500); - - if (dst_emc_fbio_cfg7 & (EMC_FBIO_CFG7_CH0_ENABLE | EMC_FBIO_CFG7_CH1_ENABLE)) { - car_write(dst_clk_src, &car->clk_source_emc); - car_read(&car->clk_source_emc); - } - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 23e\n"); - - if (wait_for_update(EMC_INTSTATUS, EMC_INTSTATUS_CLKCHANGE_COMPLETE, true, dst_emc_fbio_cfg7)) { - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: wait for clock change complete failed\n"); - //mdelay(500); - return; - } - - /* Step 24: - * Save training results. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 24\n"); - - if (training_enabled_mask) { - uint32_t tmp_emem_numdev = mc_read(MC_EMEM_ADR_CFG) & 1; - - uint32_t emc_dbg_tmp = emc_read(EMC_DBG); - emc_write(emc_dbg_tmp | 1, EMC_DBG); /* Set READ_MUX to ASSEMBLY. */ - - uint32_t tmp_dram_dev_num = 1 + tmp_emem_numdev; - - /* Save CA results. */ - if (train_ca) { - dst_timing_tables->trim_perch_regs.emc_cmd_brlshft_0 = emc0_read(EMC_CMD_BRLSHFT_0); - dst_timing_tables->trim_perch_regs.emc_cmd_brlshft_1 = emc1_read(EMC_CMD_BRLSHFT_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_4 = emc0_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_5 = emc1_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5); - - if (train_self_refresh) { - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD0_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD1_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD2_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_CMD3_2); - } - } - - /* Save CA_VREF results. */ - if (train_ca_vref) { - uint32_t emc0_training_opt_ca_vref = emc0_read(EMC_TRAINING_OPT_CA_VREF); - uint32_t emc1_training_opt_ca_vref = emc1_read(EMC_TRAINING_OPT_CA_VREF); - - uint32_t rank_mask = tmp_dram_dev_num == TWO_RANK ? 0x480C0000 : 0xC80C0000; - - dst_timing_tables->burst_reg_per_ch.emc0_mrw10 = (emc0_training_opt_ca_vref & 0xFFFF) | 0x880C0000; - dst_timing_tables->burst_reg_per_ch.emc1_mrw10 = (emc1_training_opt_ca_vref & 0xFFFF) | 0x880C0000; - dst_timing_tables->burst_reg_per_ch.emc0_mrw11 = (rank_mask & 0xFFFFFF00) | ((emc0_training_opt_ca_vref >> 16) & 0xFFFF); - dst_timing_tables->burst_reg_per_ch.emc1_mrw11 = (rank_mask & 0xFFFFFF00) | ((emc1_training_opt_ca_vref >> 16) & 0xFFFF); - } - - /* Save RD results. */ - if (train_rd) { - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_0 = emc0_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_1 = emc0_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_2 = emc1_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_3 = emc1_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3); - - if (tmp_dram_dev_num == TWO_RANK) { - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_0 = emc0_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_1 = emc0_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_2 = emc1_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_3 = emc1_read(EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3); - } - - if (train_self_refresh) { - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE0_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE1_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE2_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE3_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE4_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE5_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE6_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK0_BYTE7_2); - - if (tmp_dram_dev_num == TWO_RANK) { - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE0_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE1_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE2_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_0 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_1 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_2 = emc0_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE3_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE4_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE5_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE6_2); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_0 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_0); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_1 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_1); - dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_2 = emc1_read(EMC_PMACRO_IB_DDLL_SHORT_DQ_RANK1_BYTE7_2); - } - } - - /* Save RD_VREF results. */ - if (train_rd_vref) { - uint32_t emc_pmacro_ib_vref_dq_0 = emc0_read(EMC_PMACRO_IB_VREF_DQ_0); - uint32_t emc_pmacro_ib_vref_dq_1 = emc0_read(EMC_PMACRO_IB_VREF_DQ_1); - - #define GET_SAVE_RESTORE_MOD_REG(n) ((dst_timing_tables->save_restore_mod_regs[n] & 0x80000000) ? (~dst_timing_tables->save_restore_mod_regs[n]) : (dst_timing_tables->save_restore_mod_regs[n])) - - uint8_t ib_vref_dq_byte0_icr = ((emc_pmacro_ib_vref_dq_0 >> 0) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(0) & 0x7F); - uint8_t ib_vref_dq_byte1_icr = ((emc_pmacro_ib_vref_dq_0 >> 8) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(1) & 0x7F); - uint8_t ib_vref_dq_byte2_icr = ((emc_pmacro_ib_vref_dq_0 >> 16) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(2) & 0x7F); - uint8_t ib_vref_dq_byte3_icr = ((emc_pmacro_ib_vref_dq_0 >> 24) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(3) & 0x7F); - uint8_t ib_vref_dq_byte4_icr = ((emc_pmacro_ib_vref_dq_1 >> 0) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(4) & 0x7F); - uint8_t ib_vref_dq_byte5_icr = ((emc_pmacro_ib_vref_dq_1 >> 8) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(5) & 0x7F); - uint8_t ib_vref_dq_byte6_icr = ((emc_pmacro_ib_vref_dq_1 >> 16) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(6) & 0x7F); - uint8_t ib_vref_dq_byte7_icr = ((emc_pmacro_ib_vref_dq_1 >> 24) & 0x7F) + (GET_SAVE_RESTORE_MOD_REG(7) & 0x7F); - - dst_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_0 = ((ib_vref_dq_byte0_icr & 0x7F) | (ib_vref_dq_byte1_icr & 0x7F) << 8) | ((ib_vref_dq_byte2_icr & 0x7F) << 16) | ((ib_vref_dq_byte3_icr & 0x7F) << 24); - - - dst_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_1 = ((ib_vref_dq_byte4_icr & 0x7F) | (ib_vref_dq_byte5_icr & 0x7F) << 8) | ((ib_vref_dq_byte6_icr & 0x7F) << 16) | ((ib_vref_dq_byte7_icr & 0x7F) << 24); - - #undef GET_SAVE_RESTORE_MOD_REG - } - } - - /* Save WR results. */ - if (train_wr) { - dst_timing_tables->trim_perch_regs.emc0_data_brlshft_0 = emc0_read(EMC_DATA_BRLSHFT_0); - dst_timing_tables->trim_perch_regs.emc1_data_brlshft_0 = emc1_read(EMC_DATA_BRLSHFT_0); - - if (tmp_dram_dev_num == TWO_RANK) { - dst_timing_tables->trim_perch_regs.emc0_data_brlshft_1 = emc0_read(EMC_DATA_BRLSHFT_1); - dst_timing_tables->trim_perch_regs.emc1_data_brlshft_1 = emc1_read(EMC_DATA_BRLSHFT_1); - } - - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_0 = emc0_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_1 = emc0_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_2 = emc1_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_3 = emc1_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3); - - if (tmp_dram_dev_num == TWO_RANK) { - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_0 = emc0_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_1 = emc0_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_2 = emc1_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_3 = emc1_read(EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3); - } - - if (train_self_refresh) { - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE0_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE1_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE2_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE3_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE4_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE5_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE6_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK0_BYTE7_2); - - if (tmp_dram_dev_num == TWO_RANK) { - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE0_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE1_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE2_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_0 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_1 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_2 = emc0_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE3_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE4_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE5_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE6_2); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_0 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_0); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_1 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_1); - dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_2 = emc1_read(EMC_PMACRO_OB_DDLL_SHORT_DQ_RANK1_BYTE7_2); - } - } - - /* Save WR_VREF results. */ - if (train_wr_vref) { - uint32_t emc0_training_opt_dq_ob_vref = emc0_read(EMC_TRAINING_OPT_DQ_OB_VREF); - uint32_t emc1_training_opt_dq_ob_vref = emc1_read(EMC_TRAINING_OPT_DQ_OB_VREF); - - #define GET_SAVE_RESTORE_MOD_REG(n) ((dst_timing_tables->save_restore_mod_regs[n] & 0x80000000) ? (~dst_timing_tables->save_restore_mod_regs[n]) : (dst_timing_tables->save_restore_mod_regs[n])) - uint8_t mod_reg_8 = GET_SAVE_RESTORE_MOD_REG( 8); - uint8_t mod_reg_9 = GET_SAVE_RESTORE_MOD_REG( 9); - uint8_t mod_reg_10 = GET_SAVE_RESTORE_MOD_REG(10); - uint8_t mod_reg_11 = GET_SAVE_RESTORE_MOD_REG(11); - #undef GET_SAVE_RESTORE_MOD_REG - - uint32_t rank_mask = tmp_dram_dev_num == TWO_RANK ? 0x480E0000 : 0xC80E0000; - - uint8_t emc0_mrw12_byte0 = (mod_reg_8 + ((emc0_training_opt_dq_ob_vref >> 0) & 0xFF)); - uint8_t emc0_mrw12_byte1 = (mod_reg_9 + ((emc0_training_opt_dq_ob_vref >> 8) & 0xFF)); - uint8_t emc0_mrw13_byte0 = (mod_reg_8 + ((emc0_training_opt_dq_ob_vref >> 16) & 0xFF)); - uint8_t emc0_mrw13_byte1 = (mod_reg_9 + ((emc0_training_opt_dq_ob_vref >> 24) & 0xFF)); - uint8_t emc1_mrw12_byte0 = (mod_reg_10 + ((emc1_training_opt_dq_ob_vref >> 0) & 0xFF)); - uint8_t emc1_mrw12_byte1 = (mod_reg_11 + ((emc1_training_opt_dq_ob_vref >> 8) & 0xFF)); - uint8_t emc1_mrw13_byte0 = (mod_reg_10 + ((emc1_training_opt_dq_ob_vref >> 16) & 0xFF)); - uint8_t emc1_mrw13_byte1 = (mod_reg_11 + ((emc1_training_opt_dq_ob_vref >> 24) & 0xFF)); - - dst_timing_tables->burst_reg_per_ch.emc0_mrw12 = (emc0_mrw12_byte0 << 0) | (emc0_mrw12_byte1 << 8) | 0x880E0000; - dst_timing_tables->burst_reg_per_ch.emc1_mrw12 = (emc1_mrw12_byte0 << 0) | (emc1_mrw12_byte1 << 8) | 0x880E0000; - dst_timing_tables->burst_reg_per_ch.emc1_mrw13 = (emc1_mrw13_byte0 << 0) | (emc1_mrw13_byte1 << 8) | rank_mask; - dst_timing_tables->burst_reg_per_ch.emc0_mrw13 = (emc0_mrw13_byte0 << 0) | (emc0_mrw13_byte1 << 8) | rank_mask; - } - } - - emc_write(emc_dbg_tmp, EMC_DBG); - } - - /* Step 25: - * Program MC updown registers. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: freq_change - step 25\n"); - - if (dst_timing_tables->rate_khz > src_timing_tables->rate_khz && !training_enabled_mask) { - for (int i = 0; i < dst_timing_tables->num_up_down; ++i) { - mmio_write(dst_timing_tables->la_scale_regs_arr[i], (volatile uint32_t *)(g_la_scale_regs_addr[i])); - } - - /* Request a timing update. */ - emc_timing_update(dst_emc_fbio_cfg7); - } - - /* Step 26: - * Restore ZCAL registers. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 26\n"); - - if (dram_type == DRAM_TYPE_LPDDR4 && !training_enabled_mask) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_zcal_wait_cnt, EMC_ZCAL_WAIT_CNT); - emc_write((dst_misc_cfg_2 & 2) ? 0 : dst_timing_tables->burst_regs.emc_zcal_interval, EMC_ZCAL_INTERVAL); - - emc_write(emc_dbg_o, EMC_DBG); - } - - if (dram_type != DRAM_TYPE_LPDDR4 && opt_cc_short_zcal && opt_zcal_en_cc && !opt_short_zcal) { - udelay(2); - - if (is_lpddr2) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_mrs_wait_cnt, EMC_MRS_WAIT_CNT); - - emc_write(emc_dbg_o, EMC_DBG); - } else if (dram_type == DRAM_TYPE_DDR3) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_zcal_wait_cnt, EMC_ZCAL_WAIT_CNT); - - emc_write(emc_dbg_o, EMC_DBG); - } - } - - if (training_enabled_mask) { - if (!src_timing_tables->pllm_misc1_0_pllm_clamp_ph90) { - car_write(car_read(&car->pllm_misc1) | 0x80000000, &car->pllm_misc1); - } - } else { - if (!dst_timing_tables->pllm_misc1_0_pllm_clamp_ph90) { - car_write(car_read(&car->pllm_misc1) | 0x80000000, &car->pllm_misc1); - } - } - - /* Step 27: - * Restore EMC_CFG, FDPD registers. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 27\n"); - - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - emc_write(dst_timing_tables->burst_regs.emc_cfg, EMC_CFG); - emc_write(emc_dbg_o, EMC_DBG); - - emc_write(dst_timing_tables->emc_fdpd_ctrl_cmd_no_ramp, EMC_FDPD_CTRL_CMD_NO_RAMP); - emc_write(dst_timing_tables->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - - /* Step 28: - * Training recover. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 28\n"); - - if (training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4) { - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_cfg, EMC_CFG); - emc_write(dst_timing_tables->emc_sel_dpd_ctrl, EMC_SEL_DPD_CTRL); - emc_write(src_timing_tables->burst_regs.emc_zcal_wait_cnt, EMC_ZCAL_WAIT_CNT); - emc_write((dst_misc_cfg_2 & 2) ? 0 : dst_timing_tables->burst_regs.emc_zcal_interval, EMC_ZCAL_INTERVAL); - emc_write(dst_timing_tables->emc_auto_cal_config2, EMC_AUTO_CAL_CONFIG2); - if (dst_emc_fbio_cfg7 & (EMC_FBIO_CFG7_CH0_ENABLE | EMC_FBIO_CFG7_CH1_ENABLE)) { - emc0_write(dst_timing_tables->emc_auto_cal_config3, EMC_AUTO_CAL_CONFIG3); - emc0_write(dst_timing_tables->emc_auto_cal_config4, EMC_AUTO_CAL_CONFIG4); - emc0_write(dst_timing_tables->emc_auto_cal_config5, EMC_AUTO_CAL_CONFIG5); - emc0_write(dst_timing_tables->emc_auto_cal_config6, EMC_AUTO_CAL_CONFIG6); - emc0_write(dst_timing_tables->emc_auto_cal_config7, EMC_AUTO_CAL_CONFIG7); - emc0_write(dst_timing_tables->emc_auto_cal_config8, EMC_AUTO_CAL_CONFIG8); - } - - emc_write(emc_dbg_o, EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_tr_dvfs & ~EMC_TR_DVFS_TRAINING_DVFS, EMC_TR_DVFS); - } - - /* Step 29: - * Power fix WAR. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 29\n"); - - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - emc_write(dst_timing_tables->burst_regs.emc_pmacro_autocal_cfg_common, EMC_PMACRO_AUTOCAL_CFG_COMMON); - - emc_write(emc_dbg_o, EMC_DBG); - - emc_write(EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE0 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE1 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE2 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE3 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE4 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE5 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE6 | - EMC_PMACRO_CFG_PM_GLOBAL_0_DISABLE_CFG_BYTE7, - EMC_PMACRO_CFG_PM_GLOBAL_0); - emc_write(EMC_PMACRO_TRAINING_CTRL_0_CH0_TRAINING_E_WRPTR, EMC_PMACRO_TRAINING_CTRL_0); - emc_write(EMC_PMACRO_TRAINING_CTRL_1_CH1_TRAINING_E_WRPTR, EMC_PMACRO_TRAINING_CTRL_1); - emc_write(0, EMC_PMACRO_CFG_PM_GLOBAL_0); - - emc_write(emc_set_shadow_bypass(ACTIVE, emc_dbg_o), EMC_DBG); - - /* Fixup xm2comppadctrl */ - if ((dst_misc_cfg_1 & 0x20) == 0) { - uint32_t xm2comppadctrl = emc_read(EMC_XM2COMPPADCTRL); - - emc_write(xm2comppadctrl & 0x1CFFFFFF, EMC_XM2COMPPADCTRL); - udelay(1); - emc_write(xm2comppadctrl & 0x0CFFFFFF, EMC_XM2COMPPADCTRL); - udelay(1); - emc_write(xm2comppadctrl & 0x04FFFFFF, EMC_XM2COMPPADCTRL); - udelay(1); - } - - emc_write(emc_read(EMC_PMACRO_DLL_CFG_1) | 0x2000, EMC_PMACRO_DLL_CFG_1); - emc_read(EMC_PMACRO_DLL_CFG_1); - udelay(2); - - /* Select EMC DLL clock source. */ - { - car_write(car_read(&car->clk_source_emc_dll) | 0xC00, &car->clk_source_emc_dll); - car_read(&car->clk_source_emc_dll); - } - - emc_write(emc_set_shadow_bypass(ASSEMBLY, emc_dbg_o), EMC_DBG); - emc_read(EMC_DBG); - - /* Step 30: - * Re-enable autocal. - */ - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Clock set - step 30\n"); - - if (!training_enabled_mask) { - if (dst_timing_tables->burst_regs.emc_cfg_dig_dll & 1) { - uint32_t dig_dll = (emc_read(EMC_CFG_DIG_DLL) & 0xFFFFFFE4) | 9; - if ((dst_misc_cfg_2 & 1) == 0) { - dig_dll = (dig_dll & 0xFFFFFF3F) | 0x80; - } - emc_write(dig_dll, EMC_CFG_DIG_DLL); - - /* Request a timing update. */ - emc_timing_update(dst_emc_fbio_cfg7); - } - } - - if (!(training_enabled_mask && dram_type == DRAM_TYPE_LPDDR4)) { - emc_write(training_enabled_mask ? src_timing_tables->emc_auto_cal_config : dst_timing_tables->emc_auto_cal_config, EMC_AUTO_CAL_CONFIG); - } - - if (training_enabled_mask) { - g_fsp_for_next_freq = !g_fsp_for_next_freq; - } - - if (src_timing_tables->periodic_training) { - /* Reset all clock tree values. */ - src_timing_tables->current_dram_clktree_c0d0u0 = src_timing_tables->trained_dram_clktree_c0d0u0; - src_timing_tables->current_dram_clktree_c0d0u1 = src_timing_tables->trained_dram_clktree_c0d0u1; - src_timing_tables->current_dram_clktree_c0d1u0 = src_timing_tables->trained_dram_clktree_c0d1u0; - src_timing_tables->current_dram_clktree_c0d1u1 = src_timing_tables->trained_dram_clktree_c0d1u1; - src_timing_tables->current_dram_clktree_c1d0u0 = src_timing_tables->trained_dram_clktree_c1d0u0; - src_timing_tables->current_dram_clktree_c1d0u1 = src_timing_tables->trained_dram_clktree_c1d0u1; - src_timing_tables->current_dram_clktree_c1d1u0 = src_timing_tables->trained_dram_clktree_c1d1u0; - src_timing_tables->current_dram_clktree_c1d1u1 = src_timing_tables->trained_dram_clktree_c1d1u1; - } - - /* Disable pll. */ - pll_disable(dst_clk_src); - - //mdelay(500); -} - -static void update_timing_tables(tegra_b01_emc_timing_t *tmp_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, uint32_t training_param) { - if (training_param & 0x1) { - tmp_timing_tables->trim_perch_regs.emc_cmd_brlshft_0 = dst_timing_tables->trim_perch_regs.emc_cmd_brlshft_0; - tmp_timing_tables->trim_perch_regs.emc_cmd_brlshft_1 = dst_timing_tables->trim_perch_regs.emc_cmd_brlshft_1; - } - if (training_param & 0x10) { - tmp_timing_tables->trim_perch_regs.emc0_data_brlshft_0 = dst_timing_tables->trim_perch_regs.emc0_data_brlshft_0; - tmp_timing_tables->trim_perch_regs.emc1_data_brlshft_0 = dst_timing_tables->trim_perch_regs.emc1_data_brlshft_0; - tmp_timing_tables->trim_perch_regs.emc0_data_brlshft_1 = dst_timing_tables->trim_perch_regs.emc0_data_brlshft_1; - tmp_timing_tables->trim_perch_regs.emc1_data_brlshft_1 = dst_timing_tables->trim_perch_regs.emc1_data_brlshft_1; - } - if (training_param & 0x2) { - tmp_timing_tables->burst_reg_per_ch.emc0_mrw10 = dst_timing_tables->burst_reg_per_ch.emc0_mrw10; - tmp_timing_tables->burst_reg_per_ch.emc1_mrw10 = dst_timing_tables->burst_reg_per_ch.emc1_mrw10; - tmp_timing_tables->burst_reg_per_ch.emc0_mrw11 = dst_timing_tables->burst_reg_per_ch.emc0_mrw11; - tmp_timing_tables->burst_reg_per_ch.emc1_mrw11 = dst_timing_tables->burst_reg_per_ch.emc1_mrw11; - } - if (training_param & 0x20) { - tmp_timing_tables->burst_reg_per_ch.emc0_mrw12 = dst_timing_tables->burst_reg_per_ch.emc0_mrw12; - tmp_timing_tables->burst_reg_per_ch.emc1_mrw12 = dst_timing_tables->burst_reg_per_ch.emc1_mrw12; - tmp_timing_tables->burst_reg_per_ch.emc0_mrw13 = dst_timing_tables->burst_reg_per_ch.emc0_mrw13; - tmp_timing_tables->burst_reg_per_ch.emc1_mrw13 = dst_timing_tables->burst_reg_per_ch.emc1_mrw13; - } - - if (training_param & 0x1) { - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_4 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_4; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_5 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_5; - - if (training_param & 0x200) { - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd2_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_cmd3_2; - } - } - - if (training_param & 0x40) { - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_3 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank0_3; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_3 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_long_dqs_rank1_3; - - if (training_param & 0x200) { - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte2_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte3_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte4_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte5_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte6_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank0_byte7_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte2_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte3_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte4_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte5_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte6_2; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_1; - tmp_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_2 = dst_timing_tables->trim_regs.emc_pmacro_ib_ddll_short_dq_rank1_byte7_2; - } - } - - if (training_param & 0x80) { - tmp_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_0 = dst_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_0; - tmp_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_1 = dst_timing_tables->trim_regs.emc_pmacro_ib_vref_dq_1; - } - - if (training_param & 0x10) { - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_3 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank0_3; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_3 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_long_dq_rank1_3; - - if (training_param & 0x200) { - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte2_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte3_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte4_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte5_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte6_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank0_byte7_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte0_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte1_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte2_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte3_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte4_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte5_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte6_2; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_0 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_0; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_1 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_1; - tmp_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_2 = dst_timing_tables->trim_regs.emc_pmacro_ob_ddll_short_dq_rank1_byte7_2; - } - } - - tmp_timing_tables->ptfv_list.ptfv_write_samples = dst_timing_tables->ptfv_list.ptfv_write_samples; - tmp_timing_tables->ptfv_list.ptfv_dvfs_samples = dst_timing_tables->ptfv_list.ptfv_dvfs_samples; - tmp_timing_tables->ptfv_list.ptfv_movavg_weight = dst_timing_tables->ptfv_list.ptfv_movavg_weight; - tmp_timing_tables->ptfv_list.ptfv_config_ctrl = dst_timing_tables->ptfv_list.ptfv_config_ctrl; - tmp_timing_tables->current_dram_clktree_c0d0u0 = dst_timing_tables->current_dram_clktree_c0d0u0; - tmp_timing_tables->current_dram_clktree_c0d0u1 = dst_timing_tables->current_dram_clktree_c0d0u1; - tmp_timing_tables->trained_dram_clktree_c0d0u0 = dst_timing_tables->trained_dram_clktree_c0d0u0; - tmp_timing_tables->trained_dram_clktree_c0d0u1 = dst_timing_tables->trained_dram_clktree_c0d0u1; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u0; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d0u1; - tmp_timing_tables->current_dram_clktree_c0d1u0 = dst_timing_tables->current_dram_clktree_c0d1u0; - tmp_timing_tables->current_dram_clktree_c0d1u1 = dst_timing_tables->current_dram_clktree_c0d1u1; - tmp_timing_tables->trained_dram_clktree_c0d1u0 = dst_timing_tables->trained_dram_clktree_c0d1u0; - tmp_timing_tables->trained_dram_clktree_c0d1u1 = dst_timing_tables->trained_dram_clktree_c0d1u1; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u0; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c0d1u1; - tmp_timing_tables->current_dram_clktree_c1d0u0 = dst_timing_tables->current_dram_clktree_c1d0u0; - tmp_timing_tables->current_dram_clktree_c1d0u1 = dst_timing_tables->current_dram_clktree_c1d0u1; - tmp_timing_tables->trained_dram_clktree_c1d0u0 = dst_timing_tables->trained_dram_clktree_c1d0u0; - tmp_timing_tables->trained_dram_clktree_c1d0u1 = dst_timing_tables->trained_dram_clktree_c1d0u1; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u0; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d0u1; - tmp_timing_tables->current_dram_clktree_c1d1u0 = dst_timing_tables->current_dram_clktree_c1d1u0; - tmp_timing_tables->current_dram_clktree_c1d1u1 = dst_timing_tables->current_dram_clktree_c1d1u1; - tmp_timing_tables->trained_dram_clktree_c1d1u0 = dst_timing_tables->trained_dram_clktree_c1d1u0; - tmp_timing_tables->trained_dram_clktree_c1d1u1 = dst_timing_tables->trained_dram_clktree_c1d1u1; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u0; - tmp_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1 = dst_timing_tables->ptfv_list.ptfv_dqsosc_movavg_c1d1u1; -} - -static void train_freq(tegra_b01_emc_timing_t *src_timing_tables, tegra_b01_emc_timing_t *tmp_timing_tables, tegra_b01_emc_timing_t *dst_timing_tables, bool update_clk, uint32_t dst_clk_src) { - /* Read from MC_EMEM_ADR_CFG */ - uint32_t dram_dev_num = mc_read(MC_EMEM_ADR_CFG); - - /* Write training patterns. */ - if (g_wrote_training_pattern == 0) { - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Writing training patterns...\n"); - - tegra_b01_ram_pattern_t *ram_patterns = (tegra_b01_ram_pattern_t *)g_ram_pattern_raw_data; - - for (uint32_t i = 0; i < 0x100; ++i) { - /* Write the DQ data into pattern RAM */ - emc_write(ram_patterns[dst_timing_tables->training_pattern].dq[i], EMC_TRAINING_PATRAM_DQ); - - /* Write the DMI data into pattern RAM */ - emc_write(ram_patterns[dst_timing_tables->training_pattern].dmi[i] & 0xF, EMC_TRAINING_PATRAM_DMI); - - /* Enable writing into pattern RAM and select the offset */ - emc_write(0x80000000 | i, EMC_TRAINING_PATRAM_CTRL); - } - } - - emc_write((dst_timing_tables->burst_regs.emc_training_read_ctrl_misc & 0xFFFF0000) | 0x00001000, EMC_TRAINING_QUSE_CTRL_MISC); - g_wrote_training_pattern = 1; - - if (dst_timing_tables->needs_training && !dst_timing_tables->trained) { - uint32_t training_flags = dst_timing_tables->needs_training; - - int training_params_idx = 0; - int training_params[8] = {}; - - if (training_flags & 0x03) { - training_params[training_params_idx++] = training_flags & 0x203; - - if (dram_dev_num & 1) { - training_params[training_params_idx++] = training_flags & 0x303; - } - } - - if (training_flags & 0xF0) { - training_params[training_params_idx++] = training_flags & 0x2F0; - } - - for (int i = 0; i < training_params_idx; ++i) { - /* Change frequency. */ - freq_change(src_timing_tables, dst_timing_tables, training_params[i], dst_clk_src, 0); - - /* Update tmp tables. */ - if (tmp_timing_tables != NULL) { - update_timing_tables(tmp_timing_tables, dst_timing_tables, training_params[i]); - } - - /* Change CFG_SWAP to ASSEMBLY_ONLY */ - uint32_t emc_dbg = emc_read(EMC_DBG); - emc_dbg = ((emc_dbg & 0xF3FFFFFF) | 0x8000000); - emc_write(emc_dbg, EMC_DBG); - - /* Wait for update. */ - emc_timing_update(src_timing_tables->emc_fbio_cfg7); - - /* Change CFG_SWAP to ACTIVE_ONLY */ - emc_dbg = emc_read(EMC_DBG); - emc_dbg &= 0xF3FFFFFF; - emc_write(emc_dbg, EMC_DBG); - - /* Set PMACRO_DLL_CFG_1, preserving MDDLL_SEL_CLK_SRC */ - emc_write((emc_read(EMC_PMACRO_DLL_CFG_1) & 0x00002000) | (src_timing_tables->burst_regs.emc_pmacro_dll_cfg_1 & 0xFFFFDFFF), EMC_PMACRO_DLL_CFG_1); - - /* Update CFG_DIG_DLL */ - uint32_t emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - emc_cfg_dig_dll = (dst_timing_tables->misc_cfg_2 & 1) ? (emc_cfg_dig_dll & 0xFFFFFFFE) : ((emc_cfg_dig_dll & 0xFFFFFF3E) | 0x80); - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Wait for update. */ - emc_timing_update(src_timing_tables->emc_fbio_cfg7); - - /* Disable or enable DLL */ - emc_cfg_dig_dll = emc_read(EMC_CFG_DIG_DLL); - if (src_timing_tables->burst_regs.emc_cfg_dig_dll & 1) { - emc_cfg_dig_dll |= 0x01; - } else { - emc_cfg_dig_dll &= 0xFFFFFFFE; - } - if ((dst_timing_tables->misc_cfg_2 & 1) == 0) { - emc_cfg_dig_dll = ((emc_cfg_dig_dll & 0xFFFFFF3F) | 0x80); - } - emc_write(emc_cfg_dig_dll, EMC_CFG_DIG_DLL); - - /* Wait for update. */ - emc_timing_update(src_timing_tables->emc_fbio_cfg7); - - /* Wait for DLL_LOCK to be set */ - wait_for_update(EMC_DIG_DLL_STATUS, EMC_DIG_DLL_STATUS_DLL_LOCK_B01, true, src_timing_tables->emc_fbio_cfg7); - - /* Wait for update. */ - emc_timing_update(src_timing_tables->emc_fbio_cfg7); - - /* Set AUTO_CAL_CONFIG. */ - uint32_t emc_auto_cal_config = emc_read(EMC_AUTO_CAL_CONFIG); - emc_auto_cal_config = (dst_timing_tables->misc_cfg_2 & 4) ? (emc_auto_cal_config & 0xDFFFF9FF) : ((emc_auto_cal_config & 0x5FFFF9FF) | 0x80000000); - emc_write(emc_auto_cal_config | 0x20000000, EMC_AUTO_CAL_CONFIG); - } - - dst_timing_tables->trained = 1; - } - - if (update_clk) { - freq_change(src_timing_tables, dst_timing_tables, 0, dst_clk_src, 0); - } -} - -static int dvfs(int z_val, uint32_t next_rate, uint32_t current_rate, tegra_b01_emc_timing_t *timing_tables, int num_timing_tables, TrainMode mode) { - int current_timing_table_idx = -1, next_timing_table_idx = -1; - tegra_b01_emc_timing_t *current_timing_table, *next_timing_table; - - /* Locate the right tables for the transition */ - for (int i = 0; i < num_timing_tables; i++) { - uint32_t rate = timing_tables[i].rate_khz; - - if (rate == current_rate) - current_timing_table_idx = i; - if (rate == next_rate) - next_timing_table_idx = i; - } - - /* Failed to find the tables. */ - if ((current_timing_table_idx < 0) || (next_timing_table_idx < 0)) - return 4; - - current_timing_table = timing_tables + current_timing_table_idx; - next_timing_table = timing_tables + next_timing_table_idx; - - uint32_t clk_src_emc_from = current_timing_table->clk_src_emc; - uint32_t clk_src_emc_to = next_timing_table->clk_src_emc; - uint32_t rate_from = current_timing_table->rate_khz; - uint32_t rate_to = next_timing_table->rate_khz; - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Changing rate from %d to %d!\n", rate_from, rate_to); - - /* Configure pll. */ - if ((clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) != TEGRA_EMC_SRC_PLLP && (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) != TEGRA_EMC_SRC_PLLP_UD) { - if (next_timing_table->emc_fbio_cfg7 & 0x6) { - if (pll_reprogram(rate_to, clk_src_emc_to, rate_from, clk_src_emc_from) == 1) { - switch (clk_src_emc_from >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) { - case TEGRA_EMC_SRC_PLLMB_UD: - case TEGRA_EMC_SRC_PLLMB: - g_next_pll = 0; - break; - case TEGRA_EMC_SRC_PLLC: - case TEGRA_EMC_SRC_PLLP: - case TEGRA_EMC_SRC_CLKM: - case TEGRA_EMC_SRC_PLLP_UD: - break; - case TEGRA_EMC_SRC_PLLM: - case TEGRA_EMC_SRC_PLLM_UD: - g_next_pll = !g_next_pll; - break; - } - - clk_src_emc_to = program_pllm(rate_to, 0x9600, clk_src_emc_to, clk_src_emc_to, g_next_pll, next_timing_table); - } else { - switch (clk_src_emc_to >> EMC_CLK_EMC_2X_CLK_SRC_SHIFT) { - case TEGRA_EMC_SRC_PLLM: - case TEGRA_EMC_SRC_PLLMB: - if (g_next_pll) { - clk_src_emc_to = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - } - break; - case TEGRA_EMC_SRC_PLLM_UD: - case TEGRA_EMC_SRC_PLLMB_UD: - if (g_next_pll) { - clk_src_emc_to = ((clk_src_emc_to & 0x1FFFFFFF) | (TEGRA_EMC_SRC_PLLMB_UD << EMC_CLK_EMC_2X_CLK_SRC_SHIFT)); - } - break; - } - } - } - } - - g_active_timing_table_idx = next_timing_table_idx; - - switch (mode) { - case OP_SWITCH: - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_SWITCH!\n"); - freq_change(current_timing_table, next_timing_table, false, clk_src_emc_to, 0); - return 0; - case OP_TRAIN: - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_TRAIN!\n"); - train_freq(current_timing_table, next_timing_table, next_timing_table, false, clk_src_emc_to); - if ((next_timing_table->emc_fbio_cfg7 & 0x6) == 0) { - return 0; - } - { - int result = pll_reprogram(next_timing_table->rate_khz, next_timing_table->clk_src_emc, current_timing_table->rate_khz, current_timing_table->clk_src_emc); - if (result) { - g_next_pll = !g_next_pll; - result = 0; - } - return result; - } - return 0; - case OP_TRAIN_SWITCH: - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Train mode is OP_TRAIN_SWITCH!\n"); - train_freq(current_timing_table, next_timing_table, next_timing_table, true, clk_src_emc_to); - return 0; - default: - return 4; - } -} - -void train_dram_mariko(void) { - volatile tegra_car_t *car = car_get_regs(); - - int32_t num_timing_tables = 0; - tegra_b01_emc_timing_t *timing_tables = get_t210_b01_emc_dvfs_timing_table(&num_timing_tables); - if (timing_tables == NULL) { - fatal_error("[MTC]: Missing tables for DRAM id %d!\n", fuse_get_dram_id()); - } - - /* Locate the right timing table. */ - /* TODO: Based on rate, rather than clock source? */ - int boot_index = 0; - for (boot_index = 0; boot_index < num_timing_tables; boot_index++) { - //print(SCREEN_LOG_LEVEL_DEBUG, "%d (%d kHz): %s\n", boot_index, timing_tables[boot_index].rate_khz, timing_tables[boot_index].dvfs_ver); - if (car_read(&car->clk_source_emc) == timing_tables[boot_index].clk_src_emc) - break; - } - - if (boot_index >= num_timing_tables) { - fatal_error("[MTC]: Failed to find timing table!\n"); - } - - if (boot_index != 0) { - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: DRAM seems to be already trained, rate >= %dMhz\n", timing_tables[boot_index].rate_khz / 1000); - } else { - g_active_timing_table_idx = boot_index; - - /* Switch to upgraded timings. */ - for (int i = boot_index + 1; i < num_timing_tables; ++i) { - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Training from %dMhz to %dMhz\n", timing_tables[boot_index].rate_khz / 1000, timing_tables[i].rate_khz / 1000); - dvfs(0, timing_tables[i].rate_khz, timing_tables[boot_index].rate_khz, timing_tables, num_timing_tables, OP_TRAIN); - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Switched\n"); - } - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Switching from %dMhz to %dMhz\n", timing_tables[boot_index].rate_khz / 1000, timing_tables[num_timing_tables - 1].rate_khz / 1000); - dvfs(0, timing_tables[num_timing_tables - 1].rate_khz, timing_tables[boot_index].rate_khz, timing_tables, num_timing_tables, OP_SWITCH); - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Switched\n"); - - //print(SCREEN_LOG_LEVEL_DEBUG, "[MTC]: Done!\n"); - - g_trained_dram = true; - } -} - -void restore_dram_mariko(void) { - if (g_trained_dram) { - int32_t num_timing_tables = 0; - tegra_b01_emc_timing_t *timing_tables = get_t210_b01_emc_dvfs_timing_table(&num_timing_tables); - - dvfs(0, timing_tables[0].rate_khz, timing_tables[num_timing_tables - 1].rate_khz, timing_tables, num_timing_tables, OP_SWITCH); - } -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mtc/mtc_b01.h b/fusee/fusee-secondary/src/mtc/mtc_b01.h deleted file mode 100644 index ecb8b6e11..000000000 --- a/fusee/fusee-secondary/src/mtc/mtc_b01.h +++ /dev/null @@ -1,691 +0,0 @@ -/* - * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved. - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MTC_B01_H_ -#define FUSEE_MTC_B01_H_ - -#include "mtc.h" - -typedef struct { - uint32_t ptfv_dqsosc_movavg_c0d0u0; - uint32_t ptfv_dqsosc_movavg_c0d0u1; - uint32_t ptfv_dqsosc_movavg_c0d1u0; - uint32_t ptfv_dqsosc_movavg_c0d1u1; - uint32_t ptfv_dqsosc_movavg_c1d0u0; - uint32_t ptfv_dqsosc_movavg_c1d0u1; - uint32_t ptfv_dqsosc_movavg_c1d1u0; - uint32_t ptfv_dqsosc_movavg_c1d1u1; - uint32_t ptfv_write_samples; - uint32_t ptfv_dvfs_samples; - uint32_t ptfv_movavg_weight; - uint32_t ptfv_config_ctrl; -} t210_emc_ptfv_list_table; - -typedef struct { - uint32_t emc_rc; - uint32_t emc_rfc; - uint32_t emc_rfcpb; - uint32_t emc_refctrl2; - uint32_t emc_rfc_slr; - uint32_t emc_ras; - uint32_t emc_rp; - uint32_t emc_r2w; - uint32_t emc_w2r; - uint32_t emc_r2p; - uint32_t emc_w2p; - uint32_t emc_r2r; - uint32_t emc_tppd; - uint32_t emc_trtm; - uint32_t emc_twtm; - uint32_t emc_tratm; - uint32_t emc_twatm; - uint32_t emc_tr2ref; - uint32_t emc_ccdmw; - uint32_t emc_rd_rcd; - uint32_t emc_wr_rcd; - uint32_t emc_rrd; - uint32_t emc_rext; - uint32_t emc_wext; - uint32_t emc_wdv_chk; - uint32_t emc_wdv; - uint32_t emc_wsv; - uint32_t emc_wev; - uint32_t emc_wdv_mask; - uint32_t emc_ws_duration; - uint32_t emc_we_duration; - uint32_t emc_quse; - uint32_t emc_quse_width; - uint32_t emc_ibdly; - uint32_t emc_obdly; - uint32_t emc_einput; - uint32_t emc_mrw6; - uint32_t emc_einput_duration; - uint32_t emc_puterm_extra; - uint32_t emc_puterm_width; - uint32_t emc_qrst; - uint32_t emc_qsafe; - uint32_t emc_rdv; - uint32_t emc_rdv_mask; - uint32_t emc_rdv_early; - uint32_t emc_rdv_early_mask; - uint32_t emc_refresh; - uint32_t emc_burst_refresh_num; - uint32_t emc_pre_refresh_req_cnt; - uint32_t emc_pdex2wr; - uint32_t emc_pdex2rd; - uint32_t emc_pchg2pden; - uint32_t emc_act2pden; - uint32_t emc_ar2pden; - uint32_t emc_rw2pden; - uint32_t emc_cke2pden; - uint32_t emc_pdex2cke; - uint32_t emc_pdex2mrr; - uint32_t emc_txsr; - uint32_t emc_txsrdll; - uint32_t emc_tcke; - uint32_t emc_tckesr; - uint32_t emc_tpd; - uint32_t emc_tfaw; - uint32_t emc_trpab; - uint32_t emc_tclkstable; - uint32_t emc_tclkstop; - uint32_t emc_mrw7; - uint32_t emc_trefbw; - uint32_t emc_odt_write; - uint32_t emc_fbio_cfg5; - uint32_t emc_fbio_cfg7; - uint32_t emc_cfg_dig_dll; - uint32_t emc_cfg_dig_dll_period; - uint32_t emc_pmacro_ib_rxrt; - uint32_t emc_cfg_pipe_1; - uint32_t emc_cfg_pipe_2; - uint32_t emc_pmacro_quse_ddll_rank0_4; - uint32_t emc_pmacro_quse_ddll_rank0_5; - uint32_t emc_pmacro_quse_ddll_rank1_4; - uint32_t emc_pmacro_quse_ddll_rank1_5; - uint32_t emc_mrw8; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_4; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_5; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_0; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_1; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_2; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_3; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_4; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank0_5; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_0; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_1; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_2; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_3; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_4; - uint32_t emc_pmacro_ob_ddll_long_dqs_rank1_5; - uint32_t emc_pmacro_ddll_long_cmd_0; - uint32_t emc_pmacro_ddll_long_cmd_1; - uint32_t emc_pmacro_ddll_long_cmd_2; - uint32_t emc_pmacro_ddll_long_cmd_3; - uint32_t emc_pmacro_ddll_long_cmd_4; - uint32_t emc_pmacro_ddll_short_cmd_0; - uint32_t emc_pmacro_ddll_short_cmd_1; - uint32_t emc_pmacro_ddll_short_cmd_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte0_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte1_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte2_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte3_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte4_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte5_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte6_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte7_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd0_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd1_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd2_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd3_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte0_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte1_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte2_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte3_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte4_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte5_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte6_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte7_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd0_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd0_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd0_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd0_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd1_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd1_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd1_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd1_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd2_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd2_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd2_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd2_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd3_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd3_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd3_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_cmd3_3; - uint32_t emc_txdsrvttgen; - uint32_t emc_fdpd_ctrl_dq; - uint32_t emc_fdpd_ctrl_cmd; - uint32_t emc_fbio_spare; - uint32_t emc_zcal_interval; - uint32_t emc_zcal_wait_cnt; - uint32_t emc_mrs_wait_cnt; - uint32_t emc_mrs_wait_cnt2; - uint32_t emc_auto_cal_channel; - uint32_t emc_pmacro_dll_cfg_0; - uint32_t emc_pmacro_dll_cfg_1; - uint32_t emc_pmacro_dll_cfg_2; - uint32_t emc_pmacro_autocal_cfg_common; - uint32_t emc_pmacro_zctrl; - uint32_t emc_cfg; - uint32_t emc_cfg_pipe; - uint32_t emc_dyn_self_ref_control; - uint32_t emc_qpop; - uint32_t emc_dqs_brlshft_0; - uint32_t emc_dqs_brlshft_1; - uint32_t emc_cmd_brlshft_2; - uint32_t emc_cmd_brlshft_3; - uint32_t emc_pmacro_pad_cfg_ctrl; - uint32_t emc_pmacro_data_pad_rx_ctrl; - uint32_t emc_pmacro_cmd_pad_rx_ctrl; - uint32_t emc_pmacro_data_rx_term_mode; - uint32_t emc_pmacro_cmd_rx_term_mode; - uint32_t emc_pmacro_cmd_pad_tx_ctrl; - uint32_t emc_pmacro_data_pad_tx_ctrl; - uint32_t emc_pmacro_vttgen_ctrl_0; - uint32_t emc_pmacro_vttgen_ctrl_1; - uint32_t emc_pmacro_vttgen_ctrl_2; - uint32_t emc_pmacro_brick_ctrl_rfu1; - uint32_t emc_pmacro_cmd_brick_ctrl_fdpd; - uint32_t emc_pmacro_brick_ctrl_rfu2; - uint32_t emc_pmacro_data_brick_ctrl_fdpd; - uint32_t emc_pmacro_bg_bias_ctrl_0; - uint32_t emc_cfg_3; - uint32_t emc_pmacro_tx_pwrd_0; - uint32_t emc_pmacro_tx_pwrd_1; - uint32_t emc_pmacro_tx_pwrd_2; - uint32_t emc_pmacro_tx_pwrd_3; - uint32_t emc_pmacro_tx_pwrd_4; - uint32_t emc_pmacro_tx_pwrd_5; - uint32_t emc_config_sample_delay; - uint32_t emc_pmacro_tx_sel_clk_src_0; - uint32_t emc_pmacro_tx_sel_clk_src_1; - uint32_t emc_pmacro_tx_sel_clk_src_2; - uint32_t emc_pmacro_tx_sel_clk_src_3; - uint32_t emc_pmacro_tx_sel_clk_src_4; - uint32_t emc_pmacro_tx_sel_clk_src_5; - uint32_t emc_pmacro_ddll_bypass; - uint32_t emc_pmacro_ddll_pwrd_0; - uint32_t emc_pmacro_ddll_pwrd_1; - uint32_t emc_pmacro_ddll_pwrd_2; - uint32_t emc_pmacro_cmd_ctrl_0; - uint32_t emc_pmacro_cmd_ctrl_1; - uint32_t emc_pmacro_cmd_ctrl_2; - uint32_t emc_pmacro_data_pi_ctrl; - uint32_t emc_pmacro_cmd_pi_ctrl; - uint32_t emc_tr_timing_0; - uint32_t emc_tr_dvfs; - uint32_t emc_tr_ctrl_1; - uint32_t emc_tr_rdv; - uint32_t emc_tr_qpop; - uint32_t emc_tr_rdv_mask; - uint32_t emc_mrw14; - uint32_t emc_tr_qsafe; - uint32_t emc_tr_qrst; - uint32_t emc_training_ctrl; - uint32_t emc_training_settle; - uint32_t emc_training_vref_settle; - uint32_t emc_training_ca_fine_ctrl; - uint32_t emc_training_ca_ctrl_misc; - uint32_t emc_training_ca_ctrl_misc1; - uint32_t emc_training_ca_vref_ctrl; - uint32_t emc_training_quse_cors_ctrl; - uint32_t emc_training_quse_fine_ctrl; - uint32_t emc_training_quse_ctrl_misc; - uint32_t emc_training_quse_vref_ctrl; - uint32_t emc_training_read_fine_ctrl; - uint32_t emc_training_read_ctrl_misc; - uint32_t emc_training_read_vref_ctrl; - uint32_t emc_training_write_fine_ctrl; - uint32_t emc_training_write_ctrl_misc; - uint32_t emc_training_write_vref_ctrl; - uint32_t emc_training_mpc; - uint32_t emc_mrw15; -} t210b01_emc_burst_regs; - -typedef struct { - uint32_t emc0_mrw10; - uint32_t emc1_mrw10; - uint32_t emc0_mrw11; - uint32_t emc1_mrw11; - uint32_t emc0_mrw12; - uint32_t emc1_mrw12; - uint32_t emc0_mrw13; - uint32_t emc1_mrw13; -} t210_emc_burst_reg_per_ch; - -typedef struct { - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_0; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_1; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_2; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank0_3; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_0; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_1; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_2; - uint32_t emc_pmacro_ib_ddll_long_dqs_rank1_3; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte0_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte0_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte0_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte1_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte1_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte1_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte2_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte2_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte2_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte3_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte3_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte3_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte4_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte4_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte4_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte5_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte5_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte5_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte6_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte6_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte6_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte7_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte7_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank0_byte7_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte0_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte0_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte0_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte1_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte1_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte1_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte2_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte2_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte2_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte3_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte3_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte3_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte4_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte4_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte4_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte5_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte5_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte5_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte6_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte6_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte6_2; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte7_0; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte7_1; - uint32_t emc_pmacro_ib_ddll_short_dq_rank1_byte7_2; - uint32_t emc_pmacro_ib_vref_dqs_0; - uint32_t emc_pmacro_ib_vref_dqs_1; - uint32_t emc_pmacro_ib_vref_dq_0; - uint32_t emc_pmacro_ib_vref_dq_1; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_0; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_1; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_2; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_3; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_4; - uint32_t emc_pmacro_ob_ddll_long_dq_rank0_5; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_0; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_1; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_2; - uint32_t emc_pmacro_ob_ddll_long_dq_rank1_3; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte0_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte0_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte0_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte1_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte1_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte1_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte2_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte2_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte2_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte3_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte3_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte3_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte4_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte4_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte4_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte5_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte5_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte5_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte6_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte6_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte6_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte7_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte7_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_byte7_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd0_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd0_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd0_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd1_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd1_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd1_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd2_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd2_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd2_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd3_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd3_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank0_cmd3_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte0_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte0_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte0_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte1_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte1_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte1_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte2_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte2_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte2_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte3_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte3_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte3_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte4_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte4_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte4_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte5_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte5_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte5_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte6_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte6_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte6_2; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte7_0; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte7_1; - uint32_t emc_pmacro_ob_ddll_short_dq_rank1_byte7_2; - uint32_t emc_pmacro_quse_ddll_rank0_0; - uint32_t emc_pmacro_quse_ddll_rank0_1; - uint32_t emc_pmacro_quse_ddll_rank0_2; - uint32_t emc_pmacro_quse_ddll_rank0_3; - uint32_t emc_pmacro_quse_ddll_rank1_0; - uint32_t emc_pmacro_quse_ddll_rank1_1; - uint32_t emc_pmacro_quse_ddll_rank1_2; - uint32_t emc_pmacro_quse_ddll_rank1_3; -} t210_emc_trim_regs; - -typedef struct { - uint32_t emc_cmd_brlshft_0; - uint32_t emc_cmd_brlshft_1; - uint32_t emc0_data_brlshft_0; - uint32_t emc1_data_brlshft_0; - uint32_t emc0_data_brlshft_1; - uint32_t emc1_data_brlshft_1; - uint32_t emc_quse_brlshft_0; - uint32_t emc_quse_brlshft_1; - uint32_t emc_quse_brlshft_2; - uint32_t emc_quse_brlshft_3; -} t210_emc_trim_perch_regs; - -typedef struct { - uint32_t emc0_training_opt_dqs_ib_vref_rank0; - uint32_t emc1_training_opt_dqs_ib_vref_rank0; - uint32_t emc0_training_opt_dqs_ib_vref_rank1; - uint32_t emc1_training_opt_dqs_ib_vref_rank1; -} t210_emc_vref_perch_regs; - -typedef struct { - uint32_t t_rp; - uint32_t t_fc_lpddr4; - uint32_t t_rfc; - uint32_t t_pdex; - uint32_t rl; -} t210_emc_dram_timings; - -typedef struct { - uint32_t emc0_training_rw_offset_ib_byte0; - uint32_t emc1_training_rw_offset_ib_byte0; - uint32_t emc0_training_rw_offset_ib_byte1; - uint32_t emc1_training_rw_offset_ib_byte1; - uint32_t emc0_training_rw_offset_ib_byte2; - uint32_t emc1_training_rw_offset_ib_byte2; - uint32_t emc0_training_rw_offset_ib_byte3; - uint32_t emc1_training_rw_offset_ib_byte3; - uint32_t emc0_training_rw_offset_ib_misc; - uint32_t emc1_training_rw_offset_ib_misc; - uint32_t emc0_training_rw_offset_ob_byte0; - uint32_t emc1_training_rw_offset_ob_byte0; - uint32_t emc0_training_rw_offset_ob_byte1; - uint32_t emc1_training_rw_offset_ob_byte1; - uint32_t emc0_training_rw_offset_ob_byte2; - uint32_t emc1_training_rw_offset_ob_byte2; - uint32_t emc0_training_rw_offset_ob_byte3; - uint32_t emc1_training_rw_offset_ob_byte3; - uint32_t emc0_training_rw_offset_ob_misc; - uint32_t emc1_training_rw_offset_ob_misc; -} t210_emc_training_mod_regs; - -typedef struct { - uint32_t mc_emem_arb_cfg; - uint32_t mc_emem_arb_outstanding_req; - uint32_t mc_emem_arb_refpb_hp_ctrl; - uint32_t mc_emem_arb_refpb_bank_ctrl; - uint32_t mc_emem_arb_timing_rcd; - uint32_t mc_emem_arb_timing_rp; - uint32_t mc_emem_arb_timing_rc; - uint32_t mc_emem_arb_timing_ras; - uint32_t mc_emem_arb_timing_faw; - uint32_t mc_emem_arb_timing_rrd; - uint32_t mc_emem_arb_timing_rap2pre; - uint32_t mc_emem_arb_timing_wap2pre; - uint32_t mc_emem_arb_timing_r2r; - uint32_t mc_emem_arb_timing_w2w; - uint32_t mc_emem_arb_timing_r2w; - uint32_t mc_emem_arb_timing_ccdmw; - uint32_t mc_emem_arb_timing_w2r; - uint32_t mc_emem_arb_timing_rfcpb; - uint32_t mc_emem_arb_da_turns; - uint32_t mc_emem_arb_da_covers; - uint32_t mc_emem_arb_misc0; - uint32_t mc_emem_arb_misc1; - uint32_t mc_emem_arb_misc2; - uint32_t mc_emem_arb_ring1_throttle; - uint32_t mc_emem_arb_dhyst_ctrl; - uint32_t mc_emem_arb_dhyst_timeout_util_0; - uint32_t mc_emem_arb_dhyst_timeout_util_1; - uint32_t mc_emem_arb_dhyst_timeout_util_2; - uint32_t mc_emem_arb_dhyst_timeout_util_3; - uint32_t mc_emem_arb_dhyst_timeout_util_4; - uint32_t mc_emem_arb_dhyst_timeout_util_5; - uint32_t mc_emem_arb_dhyst_timeout_util_6; - uint32_t mc_emem_arb_dhyst_timeout_util_7; -} t210_emc_burst_mc_regs; - -typedef struct { - uint32_t mc_mll_mpcorer_ptsa_rate; - uint32_t mc_ftop_ptsa_rate; - uint32_t mc_ptsa_grant_decrement; - uint32_t mc_latency_allowance_xusb_0; - uint32_t mc_latency_allowance_xusb_1; - uint32_t mc_latency_allowance_tsec_0; - uint32_t mc_latency_allowance_sdmmca_0; - uint32_t mc_latency_allowance_sdmmcaa_0; - uint32_t mc_latency_allowance_sdmmc_0; - uint32_t mc_latency_allowance_sdmmcab_0; - uint32_t mc_latency_allowance_ppcs_0; - uint32_t mc_latency_allowance_ppcs_1; - uint32_t mc_latency_allowance_mpcore_0; - uint32_t mc_latency_allowance_hc_0; - uint32_t mc_latency_allowance_hc_1; - uint32_t mc_latency_allowance_avpc_0; - uint32_t mc_latency_allowance_gpu_0; - uint32_t mc_latency_allowance_gpu2_0; - uint32_t mc_latency_allowance_nvenc_0; - uint32_t mc_latency_allowance_nvdec_0; - uint32_t mc_latency_allowance_vic_0; - uint32_t mc_latency_allowance_vi2_0; - uint32_t mc_latency_allowance_isp2_0; - uint32_t mc_latency_allowance_isp2_1; -} t210_emc_la_scale_regs; - -typedef struct { - uint32_t rev; - char dvfs_ver[60]; - uint32_t rate_khz; - uint32_t min_volt; - uint32_t gpu_min_volt; - char clock_src[32]; - uint32_t clk_src_emc; - uint32_t pll_en_ssc; - uint32_t needs_training; - uint32_t training_pattern; - uint32_t trained; - uint32_t periodic_training; - uint32_t trained_dram_clktree_c0d0u0; - uint32_t trained_dram_clktree_c0d0u1; - uint32_t trained_dram_clktree_c0d1u0; - uint32_t trained_dram_clktree_c0d1u1; - uint32_t trained_dram_clktree_c1d0u0; - uint32_t trained_dram_clktree_c1d0u1; - uint32_t trained_dram_clktree_c1d1u0; - uint32_t trained_dram_clktree_c1d1u1; - uint32_t current_dram_clktree_c0d0u0; - uint32_t current_dram_clktree_c0d0u1; - uint32_t current_dram_clktree_c0d1u0; - uint32_t current_dram_clktree_c0d1u1; - uint32_t current_dram_clktree_c1d0u0; - uint32_t current_dram_clktree_c1d0u1; - uint32_t current_dram_clktree_c1d1u0; - uint32_t current_dram_clktree_c1d1u1; - uint32_t emc_fbio_cfg7; - uint32_t run_clocks; - uint32_t tree_margin; - uint32_t num_burst; - uint32_t num_burst_per_ch; - uint32_t num_trim; - uint32_t num_trim_per_ch; - uint32_t num_mc_regs; - uint32_t num_up_down; - uint32_t vref_num; - uint32_t training_mod_num; - uint32_t dram_timing_num; - t210_emc_ptfv_list_table ptfv_list; - union { - t210b01_emc_burst_regs burst_regs; - uint32_t burst_regs_arr[sizeof(t210b01_emc_burst_regs) / sizeof(uint32_t)]; - }; - union { - t210_emc_burst_reg_per_ch burst_reg_per_ch; - uint32_t burst_reg_per_ch_arr[sizeof(t210_emc_burst_reg_per_ch) / sizeof(uint32_t)]; - }; - union { - t210b01_emc_burst_regs shadow_regs_ca_train; - uint32_t shadow_regs_ca_train_arr[sizeof(t210b01_emc_burst_regs) / sizeof(uint32_t)]; - }; - union { - t210b01_emc_burst_regs shadow_regs_rdwr_train; - uint32_t shadow_regs_rdwr_train_arr[sizeof(t210b01_emc_burst_regs) / sizeof(uint32_t)]; - }; - union { - t210_emc_trim_regs trim_regs; - uint32_t trim_regs_arr[sizeof(t210_emc_trim_regs) / sizeof(uint32_t)]; - }; - union { - t210_emc_trim_perch_regs trim_perch_regs; - uint32_t trim_perch_regs_arr[sizeof(t210_emc_trim_perch_regs) / sizeof(uint32_t)]; - }; - union { - t210_emc_vref_perch_regs vref_perch_regs; - uint32_t vref_perch_regs_arr[sizeof(t210_emc_vref_perch_regs) / sizeof(uint32_t)]; - }; - t210_emc_dram_timings dram_timings; - uint32_t zq_op_cc_long_zcal; - uint32_t zq_op_cc_short_zcal; - uint32_t zcal_wait_time_ps_cc_long_zcal; - uint32_t zcal_wait_time_ps_cc_short_zcal; - uint32_t tZQCAL_lpddr4; - uint32_t zqcal_before_cc_cutoff; - uint32_t opt_cc_short_zcal; - uint32_t opt_short_zcal; - uint32_t opt_do_sw_qrst; - uint32_t save_restore_clkstop_pd; - uint32_t opt_E90; - uint32_t cya_allow_ref_cc; - uint32_t ref_b4_sref_en; - uint32_t cya_issue_pc_ref; - union { - t210_emc_training_mod_regs training_mod_regs; - uint32_t training_mod_regs_arr[sizeof(t210_emc_training_mod_regs) / sizeof(uint32_t)]; - }; - uint32_t save_restore_mod_regs[12]; - union { - t210_emc_burst_mc_regs burst_mc_regs; - uint32_t burst_mc_regs_arr[sizeof(t210_emc_burst_mc_regs) / sizeof(uint32_t)]; - }; - union { - t210_emc_la_scale_regs la_scale_regs; - uint32_t la_scale_regs_arr[sizeof(t210_emc_la_scale_regs) / sizeof(uint32_t)]; - }; - uint32_t unk_0; - uint32_t vtt_vdda_ctrl_0; - uint32_t src_clock_div; - uint32_t vtt_vdda_dual_channel; - uint32_t vtt_vdda_ctrl_1; - uint32_t vtt_vdda_ctrl_2; - uint32_t vtt_vdda_ctrl_3; - uint32_t vtt_vdda_ctrl_4; - uint32_t misc_cfg_0; - uint32_t misc_cfg_1; - uint32_t misc_cfg_2; - uint32_t unk_1; - uint32_t unk_2; - uint32_t pipe_clk_delay; - uint32_t clkchange_delay; - uint32_t pllm_ss_cfg; - uint32_t pllm_ss_ctrl1; - uint32_t pllm_ss_ctrl2; - uint32_t pllmb_ss_cfg; - uint32_t pllmb_ss_ctrl1; - uint32_t pllmb_ss_ctrl2; - uint32_t pllmb_divm; - uint32_t pllmb_divn; - uint32_t pllmb_divp; - uint32_t min_mrs_wait; - uint32_t ramp_wait; - uint32_t emc_mrw; - uint32_t emc_mrw2; - uint32_t emc_mrw3; - uint32_t emc_mrw4; - uint32_t emc_mrw9; - uint32_t emc_mrs; - uint32_t emc_emrs; - uint32_t emc_emrs2; - uint32_t emc_auto_cal_config; - uint32_t emc_auto_cal_config2; - uint32_t emc_auto_cal_config3; - uint32_t emc_auto_cal_config4; - uint32_t emc_auto_cal_config5; - uint32_t emc_auto_cal_config6; - uint32_t emc_auto_cal_config7; - uint32_t emc_auto_cal_config8; - uint32_t emc_cfg_2; - uint32_t emc_sel_dpd_ctrl; - uint32_t emc_fdpd_ctrl_cmd_no_ramp; - uint32_t emc_tr_ctrl_0; - uint32_t dll_clk_src; - uint32_t clk_out_enb_x_0_clk_enb_emc_dll; - uint32_t latency; - uint32_t pllm_misc1_0_pllm_clamp_ph90; -} tegra_b01_emc_timing_t; -_Static_assert(sizeof(tegra_b01_emc_timing_t) == 0x10CC); - -void train_dram_mariko(void); - -void restore_dram_mariko(void); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/mtc/mtc_tables.h b/fusee/fusee-secondary/src/mtc/mtc_tables.h deleted file mode 100644 index 640d56bc4..000000000 --- a/fusee/fusee-secondary/src/mtc/mtc_tables.h +++ /dev/null @@ -1,6189 +0,0 @@ -/* - * Copyright (c) 2018 CTCaer - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MTC_TABLES_H_ -#define FUSEE_MTC_TABLES_H_ - -unsigned char nx_abca2_dram_0234[0xC080] = -{ - 0x07, 0x00, 0x00, 0x00, 0x31, 0x30, 0x5F, 0x34, 0x30, 0x38, 0x30, 0x30, 0x5F, 0x4E, 0x6F, 0x43, - 0x66, 0x67, 0x56, 0x65, 0x72, 0x73, 0x69, 0x6F, 0x6E, 0x5F, 0x56, 0x39, 0x2E, 0x38, 0x2E, 0x37, - 0x5F, 0x56, 0x31, 0x2E, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x60, 0x9F, 0x00, 0x00, 0x20, 0x03, 0x00, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x70, 0x6C, 0x6C, 0x70, - 0x5F, 0x6F, 0x75, 0x74, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x80, 0x18, 0x40, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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All rights reserved. - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_MTC_TABLES_B01_H_ -#define FUSEE_MTC_TABLES_B01_H_ - -static unsigned char T210b01SdevEmcDvfsTableS4gb01[0x10CC * 3] = { - 0x03, 0x00, 0x00, 0x00, 0x30, 0x31, 0x5F, 0x32, 0x30, 0x34, 0x30, 0x30, 0x30, 0x5F, 0x4E, 0x6F, - 0x43, 0x66, 0x67, 0x56, 0x65, 0x72, 0x73, 0x69, 0x6F, 0x6E, 0x5F, 0x56, 0x30, 0x2E, 0x33, 0x2E, - 0x31, 0x5F, 0x56, 0x32, 0x2E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE0, 0x1C, 0x03, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x4C, 0x04, 0x00, 0x00, 0x70, 0x6C, 0x6C, 0x70, - 0x5F, 0x6F, 0x75, 0x74, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x80, 0x18, 0x40, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 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-#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/nxboot.c b/fusee/fusee-secondary/src/nxboot.c deleted file mode 100644 index 274af3bf1..000000000 --- a/fusee/fusee-secondary/src/nxboot.c +++ /dev/null @@ -1,1162 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include - -#include "utils.h" -#include "fs_utils.h" -#include "nxboot.h" -#include "nxfs.h" -#include "bct.h" -#include "car.h" -#include "di.h" -#include "mc.h" -#include "se.h" -#include "pmc.h" -#include "emc.h" -#include "fuse.h" -#include "i2c.h" -#include "ips.h" -#include "stratosphere.h" -#include "max77620.h" -#include "cluster.h" -#include "flow.h" -#include "timers.h" -#include "key_derivation.h" -#include "masterkey.h" -#include "package1.h" -#include "package2.h" -#include "tsec.h" -#include "lp0.h" -#include "loader.h" -#include "exocfg.h" -#include "../../../fusee/common/display/video_fb.h" -#include "../../../fusee/common/ini.h" -#include "../../../fusee/common/log.h" -#include "splash_screen.h" - -#define u8 uint8_t -#define u32 uint32_t -#include "exosphere_bin.h" -#include "mariko_fatal_bin.h" -#include "mesosphere_bin.h" -#include "warmboot_bin.h" -#include "tsec_keygen_bin.h" -#include "emummc_kip.h" -#undef u8 -#undef u32 - -extern const uint8_t warmboot_bin[]; - -extern int fusee_is_experimental(void); - -static const uint8_t retail_pkc_modulus[0x100] = { - 0xF7, 0x86, 0x47, 0xAB, 0x71, 0x89, 0x81, 0xB5, 0xCF, 0x0C, 0xB0, 0xE8, 0x48, 0xA7, 0xFD, 0xAD, - 0xCB, 0x4E, 0x4A, 0x52, 0x0B, 0x1A, 0x8E, 0xDE, 0x41, 0x87, 0x6F, 0xB7, 0x31, 0x05, 0x5F, 0xAA, - 0xEA, 0x97, 0x76, 0x21, 0x20, 0x2B, 0x40, 0x48, 0x76, 0x55, 0x35, 0x03, 0xFE, 0x7F, 0x67, 0x62, - 0xFD, 0x4E, 0xE1, 0x22, 0xF8, 0xF0, 0x97, 0x39, 0xEF, 0xEA, 0x47, 0x89, 0x3C, 0xDB, 0xF0, 0x02, - 0xAD, 0x0C, 0x96, 0xCA, 0x82, 0xAB, 0xB3, 0xCB, 0x98, 0xC8, 0xDC, 0xC6, 0xAC, 0x5C, 0x93, 0x3B, - 0x84, 0x3D, 0x51, 0x91, 0x9E, 0xC1, 0x29, 0x22, 0x95, 0xF0, 0xA1, 0x51, 0xBA, 0xAF, 0x5D, 0xC3, - 0xAB, 0x04, 0x1B, 0x43, 0x61, 0x7D, 0xEA, 0x65, 0x95, 0x24, 0x3C, 0x51, 0x3E, 0x8F, 0xDB, 0xDB, - 0xC1, 0xC4, 0x2D, 0x04, 0x29, 0x5A, 0xD7, 0x34, 0x6B, 0xCC, 0xF1, 0x06, 0xF9, 0xC9, 0xE1, 0xF9, - 0x61, 0x52, 0xE2, 0x05, 0x51, 0xB1, 0x3D, 0x88, 0xF9, 0xA9, 0x27, 0xA5, 0x6F, 0x4D, 0xE7, 0x22, - 0x48, 0xA5, 0xF8, 0x12, 0xA2, 0xC2, 0x5A, 0xA0, 0xBF, 0xC8, 0x76, 0x4B, 0x66, 0xFE, 0x1C, 0x73, - 0x00, 0x29, 0x26, 0xCD, 0x18, 0x4F, 0xC2, 0xB0, 0x51, 0x77, 0x2E, 0x91, 0x09, 0x1B, 0x41, 0x5D, - 0x89, 0x5E, 0xEE, 0x24, 0x22, 0x47, 0xE5, 0xE5, 0xF1, 0x86, 0x99, 0x67, 0x08, 0x28, 0x42, 0xF0, - 0x58, 0x62, 0x54, 0xC6, 0x5B, 0xDC, 0xE6, 0x80, 0x85, 0x6F, 0xE2, 0x72, 0xB9, 0x7E, 0x36, 0x64, - 0x48, 0x85, 0x10, 0xA4, 0x75, 0x38, 0x79, 0x76, 0x8B, 0x51, 0xD5, 0x87, 0xC3, 0x02, 0xC9, 0x1B, - 0x93, 0x22, 0x49, 0xEA, 0xAB, 0xA0, 0xB5, 0xB1, 0x3C, 0x10, 0xC4, 0x71, 0xF0, 0xF1, 0x81, 0x1A, - 0x3A, 0x9C, 0xFC, 0x51, 0x61, 0xB1, 0x4B, 0x18, 0xB2, 0x3D, 0xAA, 0xD6, 0xAC, 0x72, 0x26, 0xB7 -}; - -static const uint8_t dev_pkc_modulus[0x100] = { - 0x37, 0x84, 0x14, 0xB3, 0x78, 0xA4, 0x7F, 0xD8, 0x71, 0x45, 0xCD, 0x90, 0x51, 0x51, 0xBF, 0x2C, - 0x27, 0x03, 0x30, 0x46, 0xBE, 0x8F, 0x99, 0x3E, 0x9F, 0x36, 0x4D, 0xEB, 0xF7, 0x0E, 0x81, 0x7F, - 0xE4, 0x6B, 0xA8, 0x42, 0x8A, 0xA5, 0x4F, 0x76, 0xCC, 0xCB, 0xC5, 0x31, 0xA8, 0x5A, 0x70, 0x51, - 0x34, 0xBF, 0x1E, 0x8D, 0x6E, 0xCF, 0x05, 0x84, 0xCF, 0x8B, 0xE5, 0x9C, 0x3A, 0xA5, 0xCD, 0x1A, - 0x9C, 0xAC, 0x59, 0x30, 0x09, 0x21, 0x3C, 0xBE, 0x07, 0x5C, 0x8D, 0x1C, 0xD1, 0xA3, 0xC9, 0x8F, - 0x26, 0xE2, 0x99, 0xB2, 0x3C, 0x28, 0xAD, 0x63, 0x0F, 0xF5, 0xA0, 0x1C, 0xA2, 0x34, 0xC4, 0x0E, - 0xDB, 0xD7, 0xE1, 0xA9, 0x5E, 0xE9, 0xA5, 0xA8, 0x64, 0x3A, 0xFC, 0x48, 0xB5, 0x97, 0xDF, 0x55, - 0x7C, 0x9A, 0xD2, 0x8C, 0x32, 0x36, 0x1D, 0xC5, 0xA0, 0xC5, 0x66, 0xDF, 0x8A, 0xAD, 0x76, 0x18, - 0x46, 0x3E, 0xDF, 0xD8, 0xEF, 0xB9, 0xE5, 0xDC, 0xCD, 0x08, 0x59, 0xBC, 0x36, 0x68, 0xD6, 0xFC, - 0x3F, 0xFA, 0x11, 0x00, 0x0D, 0x50, 0xE0, 0x69, 0x0F, 0x70, 0x78, 0x7E, 0xD1, 0xA5, 0x85, 0xCD, - 0x13, 0xBC, 0x42, 0x74, 0x33, 0x0C, 0x11, 0x24, 0x1E, 0x33, 0xD5, 0x31, 0xB7, 0x3E, 0x48, 0x94, - 0xCC, 0x81, 0x29, 0x1E, 0xB1, 0xCF, 0x4C, 0x36, 0x7F, 0xE1, 0x1C, 0x15, 0xD4, 0x3F, 0xFB, 0x12, - 0xC2, 0x73, 0x22, 0x16, 0x52, 0xE0, 0x5C, 0x4C, 0x94, 0xE0, 0x87, 0x47, 0xEA, 0xD0, 0x9F, 0x42, - 0x9B, 0xAC, 0xB6, 0xB5, 0xB6, 0x34, 0xE4, 0x55, 0x49, 0xD7, 0xC0, 0xAE, 0xD4, 0x22, 0xB3, 0x5C, - 0x87, 0x64, 0x42, 0xEC, 0x11, 0x6D, 0xBC, 0x09, 0xC0, 0x80, 0x07, 0xD0, 0xBD, 0xBA, 0x45, 0xFE, - 0xD5, 0x52, 0xDA, 0xEC, 0x41, 0xA4, 0xAD, 0x7B, 0x36, 0x86, 0x18, 0xB4, 0x5B, 0xD1, 0x30, 0xBB -}; - -/* Determine the current SoC for Mariko specific code. */ -static bool is_soc_mariko() { - return (fuse_get_soc_type() == 1); -} - -static int emummc_ini_handler(void *user, const char *section, const char *name, const char *value) { - emummc_config_t *emummc_cfg = (emummc_config_t *)user; - if (strcmp(section, "emummc") == 0) { - if (strcmp(name, EMUMMC_ENABLED_KEY) == 0) { - int tmp = 0; - sscanf(value, "%d", &tmp); - emummc_cfg->enabled = (tmp != 0); - } - if (strcmp(name, EMUMMC_SECTOR_KEY) == 0) { - uintptr_t sector = 0; - sscanf(value, "%x", §or); - emummc_cfg->sector = sector; - } else if (strcmp(name, EMUMMC_ID_KEY) == 0) { - sscanf(value, "%lx", &emummc_cfg->id); - } else if (strcmp(name, EMUMMC_PATH_KEY) == 0) { -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wstringop-truncation" - strncpy(emummc_cfg->path, value, sizeof(emummc_cfg->path) - 1); -#pragma GCC diagnostic pop - emummc_cfg->path[sizeof(emummc_cfg->path) - 1] = '\0'; - } else if (strcmp(name, EMUMMC_NINTENDO_PATH_KEY) == 0) { -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wstringop-truncation" - strncpy(emummc_cfg->nintendo_path, value, sizeof(emummc_cfg->nintendo_path) - 1); -#pragma GCC diagnostic pop - emummc_cfg->nintendo_path[sizeof(emummc_cfg->nintendo_path) - 1] = '\0'; - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static int exosphere_ini_handler(void *user, const char *section, const char *name, const char *value) { - exosphere_parse_cfg_t *parse_cfg = (exosphere_parse_cfg_t *)user; - int tmp = 0; - if (strcmp(section, "exosphere") == 0) { - if (strcmp(name, EXOSPHERE_DEBUGMODE_PRIV_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->debugmode = 1; - } else if (tmp == 0) { - parse_cfg->debugmode = 0; - } - } else if (strcmp(name, EXOSPHERE_DEBUGMODE_USER_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->debugmode_user = 1; - } else if (tmp == 0) { - parse_cfg->debugmode_user = 0; - } - } else if (strcmp(name, EXOSPHERE_DISABLE_USERMODE_EXCEPTION_HANDLERS_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->disable_user_exception_handlers = 1; - } else if (tmp == 0) { - parse_cfg->disable_user_exception_handlers = 0; - } - } else if (strcmp(name, EXOSPHERE_ENABLE_USERMODE_PMU_ACCESS_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->enable_user_pmu_access = 1; - } else if (tmp == 0) { - parse_cfg->enable_user_pmu_access = 0; - } - } else if (strcmp(name, EXOSPHERE_BLANK_PRODINFO_SYSMMC_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->blank_prodinfo_sysmmc = 1; - } else if (tmp == 0) { - parse_cfg->blank_prodinfo_sysmmc = 0; - } - } else if (strcmp(name, EXOSPHERE_BLANK_PRODINFO_EMUMMC_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->blank_prodinfo_emummc = 1; - } else if (tmp == 0) { - parse_cfg->blank_prodinfo_emummc = 0; - } - } else if (strcmp(name, EXOSPHERE_ALLOW_WRITING_TO_CAL_SYSMMC_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->allow_writing_to_cal_sysmmc = 1; - } else if (tmp == 0) { - parse_cfg->allow_writing_to_cal_sysmmc = 0; - } - } else if (strcmp(name, EXOSPHERE_LOG_PORT_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (0 <= tmp && tmp < 4) { - parse_cfg->log_port = tmp; - } else { - parse_cfg->log_port = 0; - } - } else if (strcmp(name, EXOSPHERE_LOG_BAUD_RATE_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp > 0) { - parse_cfg->log_baud_rate = tmp; - } else { - parse_cfg->log_baud_rate = 115200; - } - } else if (strcmp(name, EXOSPHERE_LOG_INVERTED_KEY) == 0) { - sscanf(value, "%d", &tmp); - if (tmp == 1) { - parse_cfg->log_inverted = 1; - } else if (tmp == 0) { - parse_cfg->log_inverted = 0; - } - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static int stratosphere_ini_handler(void *user, const char *section, const char *name, const char *value) { - stratosphere_cfg_t *strat_cfg = (stratosphere_cfg_t *)user; - int tmp = 0; - if (strcmp(section, "stratosphere") == 0) { - if (strcmp(name, STRATOSPHERE_NOGC_KEY) == 0) { - strat_cfg->has_nogc_config = true; - sscanf(value, "%d", &tmp); - strat_cfg->enable_nogc = tmp != 0; - } else if (strcmp(name, STRATOSPHERE_DISABLE_NCM_KEY) == 0) { - sscanf(value, "%d", &tmp); - strat_cfg->ncm_disabled = tmp != 0; - if (strat_cfg->ncm_disabled) { - stratosphere_disable_ncm(); - } - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static int system_settings_ini_handler(void *user, const char *section, const char *name, const char *value) { - uint32_t *flags = (uint32_t *)user; - if (strcmp(section, "usb") == 0) { - if (strcmp(name, "usb30_force_enabled") == 0) { - if (strcmp(value, "u8!0x1") == 0) { - *flags |= EXOSPHERE_FLAG_FORCE_ENABLE_USB_30; - } else if (strcmp(value, "u8!0x0") == 0) { - *flags &= ~(EXOSPHERE_FLAG_FORCE_ENABLE_USB_30); - } - } else { - return 0; - } - } else { - return 0; - } - return 1; -} - -static bool is_nca_present(const char *nca_name) { - char path[0x100]; - snprintf(path, sizeof(path), "system:/contents/registered/%s.nca", nca_name); - - return is_valid_concatenation_file(path); -} - - -static uint32_t nxboot_get_specific_target_firmware(uint32_t target_firmware){ - #define CHECK_NCA(NCA_ID, VERSION) do { if (is_nca_present(NCA_ID)) { return ATMOSPHERE_TARGET_FIRMWARE_##VERSION; } } while(0) - - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_12_1_0) { - CHECK_NCA("9d9d83d68d9517f245f3e8cd7f93c416", 12_1_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_12_0_2) { - CHECK_NCA("a1863a5c0e1cedd442f5e60b0422dc15", 12_0_3); - CHECK_NCA("63d928b5a3016fe8cc0e76d2f06f4e98", 12_0_2); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_12_0_0) { - CHECK_NCA("e65114b456f9d0b566a80e53bade2d89", 12_0_1); - CHECK_NCA("bd4185843550fbba125b20787005d1d2", 12_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_11_0_0) { - CHECK_NCA("56211c7a5ed20a5332f5cdda67121e37", 11_0_1); - CHECK_NCA("594c90bcdbcccad6b062eadba0cd0e7e", 11_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_10_0_0) { - CHECK_NCA("26325de4db3909e0ef2379787c7e671d", 10_2_0); - CHECK_NCA("5077973537f6735b564dd7475b779f87", 10_1_1); /* Exclusive to China. */ - CHECK_NCA("fd1faed0ca750700d254c0915b93d506", 10_1_0); - CHECK_NCA("34728c771299443420820d8ae490ea41", 10_0_4); - CHECK_NCA("5b1df84f88c3334335bbb45d8522cbb4", 10_0_3); - CHECK_NCA("e951bc9dedcd54f65ffd83d4d050f9e0", 10_0_2); - CHECK_NCA("36ab1acf0c10a2beb9f7d472685f9a89", 10_0_1); - CHECK_NCA("5625cdc21d5f1ca52f6c36ba261505b9", 10_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_9_1_0) { - CHECK_NCA("09ef4d92bb47b33861e695ba524a2c17", 9_2_0); - CHECK_NCA("c5fbb49f2e3648c8cfca758020c53ecb", 9_1_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_9_0_0) { - CHECK_NCA("fd1ffb82dc1da76346343de22edbc97c", 9_0_1); - CHECK_NCA("a6af05b33f8f903aab90c8b0fcbcc6a4", 9_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_8_1_0) { - CHECK_NCA("724d9b432929ea43e787ad81bf09ae65", 8_1_1); /* 8.1.1-100 from Lite */ - CHECK_NCA("e9bb0602e939270a9348bddd9b78827b", 8_1_1); /* 8.1.1-12 from chinese gamecard */ - CHECK_NCA("7eedb7006ad855ec567114be601b2a9d", 8_1_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_8_0_0) { - CHECK_NCA("6c5426d27c40288302ad616307867eba", 8_0_1); - CHECK_NCA("4fe7b4abcea4a0bcc50975c1a926efcb", 8_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_7_0_0) { - CHECK_NCA("e6b22c40bb4fa66a151f1dc8db5a7b5c", 7_0_1); - CHECK_NCA("c613bd9660478de69bc8d0e2e7ea9949", 7_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_6_2_0) { - CHECK_NCA("6dfaaf1a3cebda6307aa770d9303d9b6", 6_2_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_6_0_0) { - CHECK_NCA("1d21680af5a034d626693674faf81b02", 6_1_0); - CHECK_NCA("663e74e45ffc86fbbaeb98045feea315", 6_0_1); - CHECK_NCA("258c1786b0f6844250f34d9c6f66095b", 6_0_0); /* Release 6.0.0-5.0 */ - CHECK_NCA("286e30bafd7e4197df6551ad802dd815", 6_0_0); /* Pre-Release 6.0.0-4.0 */ - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_5_0_0) { - CHECK_NCA("fce3b0ea366f9c95fe6498b69274b0e7", 5_1_0); - CHECK_NCA("c5758b0cb8c6512e8967e38842d35016", 5_0_2); - CHECK_NCA("53eb605d4620e8fd50064b24fd57783a", 5_0_1); - CHECK_NCA("09a2f9c16ce1c121ae6d231b35d17515", 5_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_4_0_0) { - CHECK_NCA("77e1ae7661ad8a718b9b13b70304aeea", 4_1_0); - CHECK_NCA("d0e5d20e3260f3083bcc067483b71274", 4_0_1); - CHECK_NCA("483a24ee3fd7149f9112d1931166a678", 4_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_3_0_0) { - CHECK_NCA("704129fc89e1fcb85c37b3112e51b0fc", 3_0_2); - CHECK_NCA("1fb00543307337d523ccefa9923e0c50", 3_0_1); - CHECK_NCA("6ebd3447473bade18badbeb5032af87d", 3_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_2_0_0) { - CHECK_NCA("d1c991c53a8a9038f8c3157a553d876d", 2_3_0); - CHECK_NCA("7f90353dff2d7ce69e19e07ebc0d5489", 2_2_0); - CHECK_NCA("e9b3e75fce00e52fe646156634d229b4", 2_1_0); - CHECK_NCA("7a1f79f8184d4b9bae1755090278f52c", 2_0_0); - } else if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_1_0_0) { - CHECK_NCA("a1b287e07f8455e8192f13d0e45a2aaf", 1_0_0); /* 1.0.0 from Factory */ - CHECK_NCA("117f7b9c7da3e8cef02340596af206b3", 1_0_0); /* 1.0.0 from Gamecard */ - } else { - fatal_error("[NXBOOT] Unknown Target Firmware!"); - } - - #undef CHECK_NCA - - /* If we didn't find a more specific firmware, return our package1 approximation. */ - return target_firmware; -} - -static uint32_t nxboot_get_target_firmware(const void *package1loader) { - const package1loader_header_t *package1loader_header = (const package1loader_header_t *)package1loader; - switch (package1loader_header->version) { - case 0x01: /* 1.0.0 */ - return ATMOSPHERE_TARGET_FIRMWARE_1_0_0; - case 0x02: /* 2.0.0 - 2.3.0 */ - return ATMOSPHERE_TARGET_FIRMWARE_2_0_0; - case 0x04: /* 3.0.0 and 3.0.1 - 3.0.2 */ - return ATMOSPHERE_TARGET_FIRMWARE_3_0_0; - case 0x07: /* 4.0.0 - 4.1.0 */ - return ATMOSPHERE_TARGET_FIRMWARE_4_0_0; - case 0x0B: /* 5.0.0 - 5.1.0 */ - return ATMOSPHERE_TARGET_FIRMWARE_5_0_0; - case 0x0E: { /* 6.0.0 - 6.2.0 */ - if (memcmp(package1loader_header->build_timestamp, "20180802", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_6_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20181107", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_6_2_0; - } else { - fatal_error("[NXBOOT] Unable to identify package1!\n"); - } - } - case 0x0F: /* 7.0.0 - 7.0.1 */ - return ATMOSPHERE_TARGET_FIRMWARE_7_0_0; - case 0x10: { /* 8.0.0 - 9.0.0 */ - if (memcmp(package1loader_header->build_timestamp, "20190314", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_8_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20190531", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_8_1_0; - } else if (memcmp(package1loader_header->build_timestamp, "20190809", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_9_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20191021", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_9_1_0; - } else if (memcmp(package1loader_header->build_timestamp, "20200303", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_10_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20201030", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_11_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20210129", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_12_0_0; - } else if (memcmp(package1loader_header->build_timestamp, "20210422", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_12_0_2; - } else if (memcmp(package1loader_header->build_timestamp, "20210607", 8) == 0) { - return ATMOSPHERE_TARGET_FIRMWARE_12_1_0; - } else { - fatal_error("[NXBOOT] Unable to identify package1!\n"); - } - } - default: - fatal_error("[NXBOOT] Unable to identify package1!\n"); - } -} - -static bool nxboot_configure_emummc(exo_emummc_config_t *exo_emummc_config) { - emummc_config_t emummc_cfg = {.enabled = false, .id = 0, .sector = 0, .path = "", .nintendo_path = ""}; - - /* Initialize some defaults. */ - memset(exo_emummc_config, 0, sizeof(*exo_emummc_config)); - exo_emummc_config->base_cfg.magic = MAGIC_EMUMMC_CONFIG; - exo_emummc_config->base_cfg.type = EMUMMC_TYPE_NONE; - exo_emummc_config->base_cfg.id = 0; - exo_emummc_config->base_cfg.fs_version = FS_VER_1_0_0; /* Will be filled out later. */ - - char *emummc_ini = calloc(1, 0x10000); - if (!read_from_file(emummc_ini, 0xFFFF, "emummc/emummc.ini")) { - free(emummc_ini); - return false; - } - - /* Load emummc settings from emummc.ini file. */ - if (ini_parse_string(emummc_ini, emummc_ini_handler, &emummc_cfg) < 0) { - fatal_error("[NXBOOT] Failed to parse emummc.ini!\n"); - } - - free(emummc_ini); - - /* Initialize values from emummc config. */ - exo_emummc_config->base_cfg.id = emummc_cfg.id; -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wstringop-truncation" - strncpy(exo_emummc_config->emu_dir_path, emummc_cfg.nintendo_path, sizeof(exo_emummc_config->emu_dir_path)); -#pragma GCC diagnostic pop - exo_emummc_config->emu_dir_path[sizeof(exo_emummc_config->emu_dir_path) - 1] = '\0'; - - if (emummc_cfg.enabled) { - if (emummc_cfg.sector > 0) { - exo_emummc_config->base_cfg.type = EMUMMC_TYPE_PARTITION; - exo_emummc_config->partition_cfg.start_sector = emummc_cfg.sector; - - /* Mount emulated NAND from SD card partition. */ - if (nxfs_mount_emummc_partition(emummc_cfg.sector) < 0) { - fatal_error("[NXBOOT] Failed to mount EmuMMC from SD card partition!\n"); - } - } else if (is_valid_folder(emummc_cfg.path)) { - exo_emummc_config->base_cfg.type = EMUMMC_TYPE_FILES; -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wstringop-truncation" - strncpy(exo_emummc_config->file_cfg.path, emummc_cfg.path, sizeof(exo_emummc_config->file_cfg.path)); -#pragma GCC diagnostic pop - exo_emummc_config->file_cfg.path[sizeof(exo_emummc_config->file_cfg.path) - 1] = '\0'; - - int num_parts = 0; - uint64_t part_limit = 0; - char emummc_path[0x100 + 1] = {0}; - char emummc_boot0_path[0x300 + 1] = {0}; - char emummc_boot1_path[0x300 + 1] = {0}; - char emummc_rawnand_path[0x300 + 1] = {0}; - - /* Prepare base folder path. */ - snprintf(emummc_path, sizeof(emummc_path) - 1, "%s/%s", emummc_cfg.path, "eMMC"); - - /* Check if eMMC folder is present. */ - if (!is_valid_folder(emummc_path)) { - fatal_error("[NXBOOT] Failed to find EmuMMC eMMC folder!\n"); - } - - /* Prepare expected file paths. */ - snprintf(emummc_boot0_path, sizeof(emummc_boot0_path) - 1, "%s/%s", emummc_path, "boot0"); - snprintf(emummc_boot1_path, sizeof(emummc_boot1_path) - 1, "%s/%s", emummc_path, "boot1"); - - /* Check if boot0 and boot1 image files are present. */ - if (!is_valid_file(emummc_boot0_path) || !is_valid_file(emummc_boot1_path)) { - fatal_error("[NXBOOT] Failed to find EmuMMC boot0/boot1 image files!\n"); - } - - /* Find raw image files (single or multi part). */ - for (int i = 0; i < 64; i++) { - snprintf(emummc_rawnand_path, sizeof(emummc_rawnand_path) - 1, "%s/%02d", emummc_path, i); - if (is_valid_file(emummc_rawnand_path)) { - if (i == 0) { - /* The size of the first file should tell us the part limit. */ - part_limit = get_file_size(emummc_rawnand_path); - } - num_parts++; - } else { - /* No more image files. */ - break; - } - } - - /* Check if at least one raw image file is present. */ - if ((num_parts == 0) || (part_limit == 0)) { - fatal_error("[NXBOOT] Failed to find EmuMMC raw image files!\n"); - } - - /* Mount emulated NAND from files. */ - if (nxfs_mount_emummc_file(emummc_path, num_parts, part_limit) < 0) { - fatal_error("[NXBOOT] Failed to mount EmuMMC from files!\n"); - } - } else { - fatal_error("[NXBOOT] Invalid EmuMMC setting!\n"); - } - } - - return emummc_cfg.enabled; -} - -static void nxboot_configure_exosphere(uint32_t target_firmware, unsigned int keygen_type, exo_emummc_config_t *exo_emummc_cfg) { - exosphere_config_t exo_cfg = {0}; - - exo_cfg.magic = MAGIC_EXOSPHERE_CONFIG; - exo_cfg.target_firmware = target_firmware; - memcpy(&exo_cfg.emummc_cfg, exo_emummc_cfg, sizeof(*exo_emummc_cfg)); - - const bool is_emummc = exo_emummc_cfg->base_cfg.magic == MAGIC_EMUMMC_CONFIG && exo_emummc_cfg->base_cfg.type != EMUMMC_TYPE_NONE; - - if (keygen_type) { - exo_cfg.flags[0] = EXOSPHERE_FLAG_PERFORM_620_KEYGEN; - } else { - exo_cfg.flags[0] = 0; - } - - /* Setup exosphere parse configuration with defaults. */ - exosphere_parse_cfg_t parse_cfg = { - .debugmode = 1, - .debugmode_user = 0, - .disable_user_exception_handlers = 0, - .enable_user_pmu_access = 0, - .blank_prodinfo_sysmmc = 0, - .blank_prodinfo_emummc = 0, - .allow_writing_to_cal_sysmmc = 0, - .log_port = 0, - .log_baud_rate = 115200, - .log_inverted = 0, - }; - - /* If we have an ini to read, parse it. */ - char *exosphere_ini = calloc(1, 0x10000); - if (read_from_file(exosphere_ini, 0xFFFF, "exosphere.ini")) { - if (ini_parse_string(exosphere_ini, exosphere_ini_handler, &parse_cfg) < 0) { - fatal_error("[NXBOOT] Failed to parse exosphere.ini!\n"); - } - } - free(exosphere_ini); - - /* Apply parse config. */ - if (parse_cfg.debugmode) exo_cfg.flags[0] |= EXOSPHERE_FLAG_IS_DEBUGMODE_PRIV; - if (parse_cfg.debugmode_user) exo_cfg.flags[0] |= EXOSPHERE_FLAG_IS_DEBUGMODE_USER; - if (parse_cfg.disable_user_exception_handlers) exo_cfg.flags[0] |= EXOSPHERE_FLAG_DISABLE_USERMODE_EXCEPTION_HANDLERS; - if (parse_cfg.enable_user_pmu_access) exo_cfg.flags[0] |= EXOSPHERE_FLAG_ENABLE_USERMODE_PMU_ACCESS; - if (parse_cfg.blank_prodinfo_sysmmc && !is_emummc) exo_cfg.flags[0] |= EXOSPHERE_FLAG_BLANK_PRODINFO; - if (parse_cfg.blank_prodinfo_emummc && is_emummc) exo_cfg.flags[0] |= EXOSPHERE_FLAG_BLANK_PRODINFO; - if (parse_cfg.allow_writing_to_cal_sysmmc) exo_cfg.flags[0] |= EXOSPHERE_FLAG_ALLOW_WRITING_TO_CAL_SYSMMC; - - exo_cfg.log_port = parse_cfg.log_port; - exo_cfg.log_baud_rate = parse_cfg.log_baud_rate; - if (parse_cfg.log_inverted) exo_cfg.log_flags |= EXOSPHERE_LOG_FLAG_INVERTED; - - /* Apply lcd vendor. */ - exo_cfg.lcd_vendor = display_get_lcd_vendor(); - - /* Read and parse system settings.ini to determine usb 3.0 enable. */ - char *settings_ini = calloc(1, 0x20000); - if (read_from_file(settings_ini, 0x1FFFF, "atmosphere/config/system_settings.ini")) { - if (ini_parse_string(settings_ini, system_settings_ini_handler, &exo_cfg.flags[0]) < 0) { - fatal_error("[NXBOOT] Failed to parse system_settings.ini!\n"); - } - } - free(settings_ini); - - if ((exo_cfg.target_firmware < ATMOSPHERE_TARGET_FIRMWARE_MIN) || (exo_cfg.target_firmware > ATMOSPHERE_TARGET_FIRMWARE_MAX)) { - fatal_error("[NXBOOT] Invalid Exosphere target firmware!\n"); - } - - *(MAILBOX_EXOSPHERE_CONFIGURATION) = exo_cfg; -} - -static void nxboot_configure_stratosphere(uint32_t target_firmware) { - stratosphere_cfg_t strat_cfg = {0}; - if (ini_parse_string(get_loader_ctx()->bct0, stratosphere_ini_handler, &strat_cfg) < 0) { - fatal_error("[NXBOOT] Failed to parse BCT.ini!\n"); - } - - /* Enable NOGC patches if the user requested it, or if the user is booting into 4.0.0+ with 3.0.2- fuses. */ - if (strat_cfg.has_nogc_config) { - if (strat_cfg.enable_nogc) { - kip_patches_set_enable_nogc(); - } - } else { - /* Check if fuses are < 4.0.0, but firmware is >= 4.0.0 */ - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_4_0_0 && !(fuse_get_reserved_odm(7) & ~0x0000000F)) { - kip_patches_set_enable_nogc(); - } - /* Check if the fuses are < 9.0.0, but firmware is >= 9.0.0 */ - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_9_0_0 && !(fuse_get_reserved_odm(7) & ~0x000003FF)) { - kip_patches_set_enable_nogc(); - } - /* Check if the fuses are < 11.0.0, but firmware is >= 11.0.0 */ - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_11_0_0 && !(fuse_get_reserved_odm(7) & ~0x00001FFF)) { - kip_patches_set_enable_nogc(); - } - - /* NOTE: 12.0.0 added a new lotus firmware, but did not burn a fuse. */ - /* This is literally undetectable using normal fuses.... */ - /* C'est la vie. */ - - /* Check if the fuses are < 12.0.0, but firmware is >= 12.0.0 */ - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_12_0_2 && !(fuse_get_reserved_odm(7) & ~0x00003FFF)) { - kip_patches_set_enable_nogc(); - } - } -} - -static void nxboot_set_bootreason(void *bootreason_base) { - boot_reason_t boot_reason = {0}; - FILE *boot0; - nvboot_config_table *bct; - nv_bootloader_info *bootloader_info; - - /* Allocate memory for the BCT. */ - bct = malloc(sizeof(nvboot_config_table)); - if (bct == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - /* Open boot0. */ - boot0 = fopen("boot0:/", "rb"); - if (boot0 == NULL) { - fatal_error("[NXBOOT] Failed to open boot0!\n"); - } - - /* Read the BCT. */ - if (fread(bct, sizeof(nvboot_config_table), 1, boot0) == 0) { - fatal_error("[NXBOOT] Failed to read the BCT!\n"); - } - - /* Check if we need to use BCT 2 instead. */ - if (package1_is_custom_public_key(bct, is_soc_mariko())) { - if (fseek(boot0, 0x4000 * 2, SEEK_SET) != 0) { - fatal_error("[NXBOOT] Failed to seek to BCT!\n"); - } - if (fread(bct, sizeof(nvboot_config_table), 1, boot0) == 0) { - fatal_error("[NXBOOT] Failed to read the BCT!\n"); - } - } - - /* Close boot0. */ - fclose(boot0); - - /* Populate bootloader parameters. */ - bootloader_info = &bct->bootloader[0]; - boot_reason.bootloader_version = bootloader_info->version; - boot_reason.bootloader_start_block = bootloader_info->start_blk; - boot_reason.bootloader_start_page = bootloader_info->start_page; - boot_reason.bootloader_attribute = bootloader_info->attribute; - - uint8_t power_key_intr = 0; - uint8_t rtc_intr = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFIRQ, &power_key_intr, 1); - i2c_query(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_REG_RTCINT, &rtc_intr, 1); - - /* Set PMIC value. */ - boot_reason.boot_reason_value = ((rtc_intr << 0x08) | power_key_intr); - - if (power_key_intr & 0x80) - boot_reason.boot_reason_state = 0x01; /* BootReason_AcOk */ - else if (power_key_intr & 0x08) - boot_reason.boot_reason_state = 0x02; /* BootReason_OnKey */ - else if (rtc_intr & 0x02) - boot_reason.boot_reason_state = 0x03; /* BootReason_RtcAlarm1 */ - else if (rtc_intr & 0x04) - boot_reason.boot_reason_state = 0x04; /* BootReason_RtcAlarm2 */ - - /* Set in memory. */ - memcpy(bootreason_base, &boot_reason, sizeof(boot_reason)); - - /* Clean up. */ - free(bct); -} - -static void nxboot_move_bootconfig() { - FILE *bcfile; - void *bootconfig; - uint32_t bootconfig_addr; - uint32_t bootconfig_size; - - /* Allocate memory for reading BootConfig. */ - bootconfig = memalign(0x1000, 0x4000); - if (bootconfig == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - /* Get BootConfig from the Package2 partition. */ - bcfile = fopen("bcpkg21:/", "rb"); - if (bcfile == NULL) { - fatal_error("[NXBOOT] Failed to open BootConfig from eMMC!\n"); - } - if (fread(bootconfig, 0x4000, 1, bcfile) < 1) { - fclose(bcfile); - fatal_error("[NXBOOT] Failed to read BootConfig!\n"); - } - fclose(bcfile); - - /* Select the actual BootConfig size and destination address. */ - /* NOTE: Nintendo relies on BPMP's inability to data abort and tries to copy 0x1000 bytes. */ - bootconfig_addr = 0x4003F800; - bootconfig_size = 0x1000; - - /* Copy the BootConfig into IRAM. */ - memset((void *)bootconfig_addr, 0, bootconfig_size); - memcpy((void *)bootconfig_addr, bootconfig, bootconfig_size); - - /* Clean up. */ - free(bootconfig); -} - -static void get_mariko_warmboot_path(char *dst, size_t dst_size, uint32_t version) { - snprintf(dst, dst_size, "warmboot_mariko/wb_%02" PRIx32 ".bin", version); -} - -/* This is the main function responsible for booting Horizon. */ -uint32_t nxboot_main(void) { - volatile tegra_pmc_t *pmc = pmc_get_regs(); - loader_ctx_t *loader_ctx = get_loader_ctx(); - const bool is_experimental = fusee_is_experimental(); - bool is_mariko = is_soc_mariko(); - package2_header_t *package2; - size_t package2_size; - void *tsec_fw; - size_t tsec_fw_size; - void *warmboot_fw; - size_t warmboot_fw_size; - void *warmboot_memaddr; - void *package1loader; - size_t package1loader_size; - void *mesosphere; - size_t mesosphere_size; - void *emummc; - size_t emummc_size; - FILE *boot0, *pk2file; - void *exosphere_memaddr; - exo_emummc_config_t exo_emummc_cfg; - - /* Configure emummc or mount the real NAND. */ - if (!nxboot_configure_emummc(&exo_emummc_cfg)) { - emummc = NULL; - emummc_size = 0; - if (nxfs_mount_emmc() < 0) { - fatal_error("[NXBOOT] Failed to mount eMMC!\n"); - } - } else { - emummc_size = get_file_size("atmosphere/emummc.kip"); - if (emummc_size != 0) { - /* Allocate memory for the emummc KIP. */ - emummc = memalign(0x100, emummc_size); - - if (emummc == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - if (read_from_file(emummc, emummc_size, "atmosphere/emummc.kip") != emummc_size) { - fatal_error("[NXBOOT] Could not read the emummc kip!\n"); - } - } else { - /* Use embedded copy. */ - emummc_size = emummc_kip_size; - emummc = memalign(0x100, emummc_size); - - if (emummc == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - memcpy(emummc, emummc_kip, emummc_size); - } - } - - /* Allocate memory for reading Package2. */ - package2 = memalign(0x1000, PACKAGE2_SIZE_MAX); - if (package2 == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - /* Read Package2 from a file, otherwise from its partition(s). */ - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Reading package2...\n"); - if (loader_ctx->package2_path[0] != '\0') { - pk2file = fopen(loader_ctx->package2_path, "rb"); - if (pk2file == NULL) { - fatal_error("[NXBOOT] Failed to open Package2 from %s: %s!\n", loader_ctx->package2_path, strerror(errno)); - } - } else { - pk2file = fopen("bcpkg21:/", "rb"); - if (pk2file == NULL) { - fatal_error("[NXBOOT] Failed to open Package2 from eMMC: %s!\n", strerror(errno)); - } - if (fseek(pk2file, 0x4000, SEEK_SET) != 0) { - fclose(pk2file); - fatal_error("[NXBOOT] Failed to seek Package2 in eMMC: %s!\n", strerror(errno)); - } - } - - setvbuf(pk2file, NULL, _IONBF, 0); /* Workaround. */ - if (fread(package2, sizeof(package2_header_t), 1, pk2file) < 1) { - fclose(pk2file); - fatal_error("[NXBOOT] Failed to read Package2!\n"); - } - package2_size = package2_meta_get_size(&package2->metadata); - if ((package2_size > PACKAGE2_SIZE_MAX) || (package2_size <= sizeof(package2_header_t))) { - fclose(pk2file); - fatal_error("[NXBOOT] Package2 is too big or too small!\n"); - } - if (fread(package2->data, package2_size - sizeof(package2_header_t), 1, pk2file) < 1) { - fclose(pk2file); - fatal_error("[NXBOOT] Failed to read Package2!\n"); - } - fclose(pk2file); - - /* Read and parse boot0. */ - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Reading boot0...\n"); - boot0 = fopen("boot0:/", "rb"); - if (boot0 == NULL) { - fatal_error("[NXBOOT] Failed to open boot0: %s!\n", strerror(errno)); - } - if (is_mariko) { - if (package1_read_and_parse_boot0_mariko(&package1loader, &package1loader_size, boot0) == -1) { - fatal_error("[NXBOOT] Couldn't parse boot0: %s!\n", strerror(errno)); - } - } else { - if (package1_read_and_parse_boot0_erista(&package1loader, &package1loader_size, boot0) == -1) { - fatal_error("[NXBOOT] Couldn't parse boot0: %s!\n", strerror(errno)); - } - } - fclose(boot0); - - /* Find the system's target firmware. */ - uint32_t target_firmware = nxboot_get_target_firmware(package1loader); - - if (!target_firmware) { - fatal_error("[NXBOOT] Failed to detect target firmware!\n"); - } else { - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Detected target firmware %ld!\n", target_firmware); - } - - /* Handle TSEC and Sept (Erista only). */ - if (!is_mariko) { - /* Use Atmosphere's tsec_keygen implementation. */ - tsec_fw_size = tsec_keygen_bin_size; - tsec_fw = memalign(0x100, tsec_fw_size); - - if (tsec_fw == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - memcpy(tsec_fw, tsec_keygen_bin, tsec_fw_size); - - if (tsec_fw_size == 0) { - fatal_error("[NXBOOT] Could not read the warmboot firmware from Package1!\n"); - } - - /* Get the TSEC keys into the security engine. */ - int tsec_res = tsec_run_fw(tsec_fw, tsec_fw_size); - if (tsec_res != 0) { - volatile tegra_tsec_t *tsec = tsec_get_regs(); - fatal_error("[NXBOOT] Failed to run TSEC firmware %d %08x %08x!\n", tsec_res, tsec->TSEC_FALCON_MAILBOX0, tsec->TSEC_FALCON_MAILBOX1); - } - } - - /* Display splash screen. */ - display_splash_screen_bmp(loader_ctx->custom_splash_path, (void *)0xC0000000); - - /* Derive keydata. */ - unsigned int keygen_type = 0; - if (is_mariko) { - if (derive_nx_keydata_mariko(target_firmware) != 0) { - fatal_error("[NXBOOT] Mariko key derivation failed!\n"); - } - } else { - if (derive_nx_keydata_erista(target_firmware) != 0) { - fatal_error("[NXBOOT] Erista key derivation failed!\n"); - } - } - - /* Derive new device keys. */ - derive_new_device_keys(fuse_get_hardware_state() != 0, KEYSLOT_SWITCH_5XNEWDEVICEKEYGENKEY, target_firmware); - - /* Set the system partition's keys. */ - if (fsdev_register_keys("system", target_firmware, BisPartition_UserSystem) != 0) { - fatal_error("[NXBOOT] Failed to set SYSTEM partition keys!\n"); - } - - /* Mount the system partition. */ - if (fsdev_register_device("system") != 0) { - fatal_error("[NXBOOT] Failed to register SYSTEM partition!\n"); - } - - /* Lightly validate the system partition. */ - if (!is_valid_folder("system:/Contents")) { - fatal_error("[NXBOOT] SYSTEM partition seems corrupted!\n"); - } - - /* Make the target firmware more specific. */ - target_firmware = nxboot_get_specific_target_firmware(target_firmware); - - /* Setup boot configuration for Exosphère. */ - nxboot_configure_exosphere(target_firmware, keygen_type, &exo_emummc_cfg); - - /* Initialize BootReason on older firmware versions (Erista only). */ - memset((void *)MAILBOX_NX_BOOTLOADER_BASE, 0, 0x200); - if (!is_mariko && target_firmware < ATMOSPHERE_TARGET_FIRMWARE_4_0_0) { - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Initializing BootReason...\n"); - nxboot_set_bootreason((void *)MAILBOX_NX_BOOTLOADER_BOOT_REASON_BASE); - } - - /* Read the warmboot firmware from a file, otherwise from Atmosphere's implementation (Erista only) or from cache (Mariko only). */ - uint32_t warmboot_fuses = 0; - if (is_mariko) { - /* Get warmboot firmware from package1. */ - const package1_header_t *pk11_header = (const package1_header_t *)((uintptr_t)package1loader + (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_6_2_0 ? 0x7000 : 0x4000)); - - warmboot_fw = package1_get_warmboot_fw(pk11_header); - warmboot_fw_size = *(const uint32_t *)warmboot_fw; - - if (!(0x800 <= warmboot_fw_size && warmboot_fw_size < 0x1000)) { - fatal_error("[NXBOOT] Warmboot firmware seems invalid!\n"); - } - - const uint32_t expected_fuses = fuse_get_expected_fuse_count(target_firmware); - const uint32_t burnt_fuses = fuse_get_burnt_fuse_count(); - - warmboot_fuses = expected_fuses; - - char warmboot_fn[0x80]; - get_mariko_warmboot_path(warmboot_fn, sizeof(warmboot_fn), expected_fuses); - - if (!is_valid_file(warmboot_fn)) { - dump_to_file(warmboot_fw, warmboot_fw_size, warmboot_fn); - } - - if (burnt_fuses > expected_fuses) { - warmboot_fw = NULL; - warmboot_fw_size = 0; - for (uint32_t attempt = burnt_fuses; attempt <= 32; ++attempt) { - get_mariko_warmboot_path(warmboot_fn, sizeof(warmboot_fn), attempt); - if (is_valid_file(warmboot_fn)) { - warmboot_fw_size = get_file_size(warmboot_fn); - - /* Allocate memory for the warmboot firmware. */ - warmboot_fw = malloc(warmboot_fw_size); - - if (warmboot_fw == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - if (read_from_file(warmboot_fw, warmboot_fw_size, warmboot_fn) != warmboot_fw_size) { - fatal_error("[NXBOOT] Could not read the warmboot firmware from %s!\n", warmboot_fn); - } - - warmboot_fuses = attempt; - break; - } - } - } - - if (warmboot_fw == NULL) { - fatal_error("[NXBOOT] Failed to determine mariko warmboot firmware\n"); - } - } else { - if (loader_ctx->warmboot_path[0] != '\0') { - warmboot_fw_size = get_file_size(loader_ctx->warmboot_path); - if (warmboot_fw_size == 0) { - fatal_error("[NXBOOT] Could not read the warmboot firmware from %s!\n", loader_ctx->warmboot_path); - } - - /* Allocate memory for the warmboot firmware. */ - warmboot_fw = malloc(warmboot_fw_size); - - if (warmboot_fw == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - if (read_from_file(warmboot_fw, warmboot_fw_size, loader_ctx->warmboot_path) != warmboot_fw_size) { - fatal_error("[NXBOOT] Could not read the warmboot firmware from %s!\n", loader_ctx->warmboot_path); - } - } else { - /* Use Atmosphere's warmboot firmware implementation. */ - warmboot_fw_size = warmboot_bin_size; - warmboot_fw = malloc(warmboot_fw_size); - - if (warmboot_fw == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - - memcpy(warmboot_fw, warmboot_bin, warmboot_fw_size); - - if (warmboot_fw_size == 0) { - fatal_error("[NXBOOT] Could not read the warmboot firmware from Package1!\n"); - } - } - } - - /* Patch warmboot firmware for atmosphere (Erista only). */ - if (!is_mariko && (warmboot_fw != NULL) && (warmboot_fw_size >= sizeof(warmboot_ams_header_t))) { - warmboot_ams_header_t *ams_header = (warmboot_ams_header_t *)warmboot_fw; - if (ams_header->ams_metadata.magic == WARMBOOT_MAGIC) { - /* Set target firmware */ - ams_header->ams_metadata.target_firmware = target_firmware; - - /* Set RSA modulus */ - const uint8_t *pkc_modulus = fuse_get_hardware_state() != 0 ? retail_pkc_modulus : dev_pkc_modulus; - memcpy(ams_header->rsa_modulus, pkc_modulus, sizeof(ams_header->rsa_modulus)); - } - } - - /* Select the right address for the warmboot firmware. */ - warmboot_memaddr = (void *)0x4003E000; - - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Copying warmboot firmware...\n"); - - /* Copy the warmboot firmware and set the address in PMC if necessary. */ - if (warmboot_fw && (warmboot_fw_size > 0)) { - memcpy(warmboot_memaddr, warmboot_fw, warmboot_fw_size); - if (!is_mariko && (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_4_0_0)) { - pmc->scratch1 = (uint32_t)warmboot_memaddr; - } - } - - /* Handle warmboot security check. */ - if (is_mariko) { - switch (warmboot_fuses) { - case 7: - pmc->secure_scratch32 = 0x87; - break; - case 8: - pmc->secure_scratch32 = 0xA8; - break; - default: - pmc->secure_scratch32 = (0x108 + 0x21 * (warmboot_fuses - 8)); - break; - } - - pmc->sec_disable3 |= BIT(16); - } else { - /* Set 3.0.0/3.0.1/3.0.2 warmboot security check. */ - if (target_firmware == ATMOSPHERE_TARGET_FIRMWARE_3_0_0) { - pmc->secure_scratch32 = 0xE3; /* Warmboot 3.0.0 security check.*/ - } else if (target_firmware == ATMOSPHERE_TARGET_FIRMWARE_3_0_1 || target_firmware == ATMOSPHERE_TARGET_FIRMWARE_3_0_2) { - pmc->secure_scratch32 = 0x104; /* Warmboot 3.0.1/3.0.2 security check. */ - } - } - - /* Configure mesosphere. */ - { - size_t sd_meso_size = get_file_size("atmosphere/mesosphere.bin"); - if (sd_meso_size != 0) { - if (sd_meso_size > PACKAGE2_SIZE_MAX) { - fatal_error("Error: atmosphere/mesosphere.bin is too large!\n"); - } - mesosphere = malloc(sd_meso_size); - if (mesosphere == NULL) { - fatal_error("Error: failed to allocate mesosphere!\n"); - } - if (read_from_file(mesosphere, sd_meso_size, "atmosphere/mesosphere.bin") != sd_meso_size) { - fatal_error("Error: failed to read atmosphere/mesosphere.bin!\n"); - } - mesosphere_size = sd_meso_size; - } else if (is_experimental) { - mesosphere_size = mesosphere_bin_size; - mesosphere = malloc(mesosphere_size); - if (mesosphere == NULL) { - fatal_error("[NXBOOT] Out of memory!\n"); - } - memcpy(mesosphere, mesosphere_bin, mesosphere_size); - if (mesosphere_size == 0) { - fatal_error("[NXBOOT] Could not read embedded mesosphere!\n"); - } - } else { - mesosphere = NULL; - mesosphere_size = 0; - } - } - - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Rebuilding package2...\n"); - - /* Parse stratosphere config. */ - nxboot_configure_stratosphere(MAILBOX_EXOSPHERE_CONFIGURATION->target_firmware); - - print(SCREEN_LOG_LEVEL_INFO, u8"[NXBOOT] Configured Stratosphere...\n"); - - /* Patch package2, adding Thermosphère + custom KIPs. */ - package2_rebuild_and_copy(package2, MAILBOX_EXOSPHERE_CONFIGURATION->target_firmware, mesosphere, mesosphere_size, emummc, emummc_size); - - /* Set detected FS version. */ - MAILBOX_EXOSPHERE_CONFIGURATION->emummc_cfg.base_cfg.fs_version = stratosphere_get_fs_version(); - - print(SCREEN_LOG_LEVEL_INFO, u8"[NXBOOT] Reading Exosphère...\n"); - - /* Select the right address for Exosphère. */ - exosphere_memaddr = (void *)0x40030000; - - /* Copy Exosphère to a good location or read it directly to it. */ - if (loader_ctx->exosphere_path[0] != '\0') { - size_t exosphere_size = get_file_size(loader_ctx->exosphere_path); - if (exosphere_size == 0) { - fatal_error(u8"[NXBOOT] Could not read Exosphère from %s!\n", loader_ctx->exosphere_path); - } else if (exosphere_size > 0x10000) { - /* The maximum is actually a bit less than that. */ - fatal_error(u8"[NXBOOT] Exosphère from %s is too big!\n", loader_ctx->exosphere_path); - } - if (read_from_file(exosphere_memaddr, exosphere_size, loader_ctx->exosphere_path) != exosphere_size) { - fatal_error(u8"[NXBOOT] Could not read Exosphère from %s!\n", loader_ctx->exosphere_path); - } - } else { - memcpy(exosphere_memaddr, exosphere_bin, exosphere_bin_size); - } - - /* Copy the Mariko's Exosphère fatal program to a good location. */ - if (is_mariko) { - void * const mariko_fatal_dst = (void *)0x80020000; - memset(mariko_fatal_dst, 0, 0x20000); - - const size_t sd_mf_size = get_file_size("atmosphere/mariko_fatal.bin"); - if (sd_mf_size != 0) { - if (sd_mf_size > 0x20000) { - fatal_error("Error: atmosphere/mariko_fatal.bin is too large!\n"); - } - if (read_from_file(mariko_fatal_dst, sd_mf_size, "atmosphere/mariko_fatal.bin") != sd_mf_size) { - fatal_error("Error: failed to read atmosphere/mariko_fatal.bin"); - } - } else { - memcpy(mariko_fatal_dst, mariko_fatal_bin, mariko_fatal_bin_size); - } - } - - /* Move BootConfig. */ - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Moving BootConfig...\n"); - nxboot_move_bootconfig(); - - /* Clean up. */ - free(package1loader); - if (loader_ctx->warmboot_path[0] != '\0') { - free(warmboot_fw); - } - free(package2); - - print(SCREEN_LOG_LEVEL_INFO, "[NXBOOT] Powering on the CCPLEX...\n"); - - /* Wait for the splash screen to have been displayed for as long as it should be. */ - splash_screen_wait_delay(); - - /* Set reset for USBD, USB2, AHBDMA, and APBDMA (Erista only). */ - if (!is_mariko) { - rst_enable(CARDEVICE_USBD); - rst_enable(CARDEVICE_USB2); - rst_enable(CARDEVICE_AHBDMA); - rst_enable(CARDEVICE_APBDMA); - } - - /* Return the memory address for booting CPU0. */ - return (uint32_t)exosphere_memaddr; -} diff --git a/fusee/fusee-secondary/src/nxboot.h b/fusee/fusee-secondary/src/nxboot.h deleted file mode 100644 index 08ebc00e0..000000000 --- a/fusee/fusee-secondary/src/nxboot.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_NX_BOOT_H -#define FUSEE_NX_BOOT_H - -#include "utils.h" - -#define EMUMMC_ENABLED_KEY "enabled" -#define EMUMMC_SECTOR_KEY "sector" -#define EMUMMC_PATH_KEY "path" -#define EMUMMC_NINTENDO_PATH_KEY "nintendo_path" -#define EMUMMC_ID_KEY "id" - -typedef struct { - bool enabled; - uint32_t id; - uint64_t sector; - char path[0x80]; - char nintendo_path[0x80]; -} emummc_config_t; - -#define MAILBOX_NX_BOOTLOADER_BASE 0x40000000 -#define MAKE_MAILBOX_NX_BOOTLOADER_REG(n) MAKE_REG32(MAILBOX_NX_BOOTLOADER_BASE + n) - -#define MAILBOX_NX_BOOTLOADER_BOOT_REASON_BASE (MAILBOX_NX_BOOTLOADER_BASE + 0x10) -#define MAILBOX_NX_BOOTLOADER_SETUP_STATE MAKE_MAILBOX_NX_BOOTLOADER_REG(0xF8) -#define MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE MAKE_MAILBOX_NX_BOOTLOADER_REG(0xFC) - -#define NX_BOOTLOADER_STATE_INIT 0 -#define NX_BOOTLOADER_STATE_MOVED_BOOTCONFIG 1 -#define NX_BOOTLOADER_STATE_LOADED_PACKAGE2 2 -#define NX_BOOTLOADER_STATE_FINISHED 3 -#define NX_BOOTLOADER_STATE_DRAM_INITIALIZED_4X 2 -#define NX_BOOTLOADER_STATE_LOADED_PACKAGE2_4X 3 -#define NX_BOOTLOADER_STATE_FINISHED_4X 4 - -typedef struct { - uint32_t bootloader_version; - uint32_t bootloader_start_block; - uint32_t bootloader_start_page; - uint32_t bootloader_attribute; - uint32_t boot_reason_value; - uint32_t boot_reason_state; -} boot_reason_t; - -uint32_t nxboot_main(void); -void nxboot_finish(uint32_t boot_memaddr); - -#endif diff --git a/fusee/fusee-secondary/src/nxboot_iram.c b/fusee/fusee-secondary/src/nxboot_iram.c deleted file mode 100644 index 1e711b8fc..000000000 --- a/fusee/fusee-secondary/src/nxboot_iram.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "cluster.h" -#include "di.h" -#include "exocfg.h" -#include "flow.h" -#include "fuse.h" -#include "mc.h" -#include "nxboot.h" -#include "se.h" -#include "timers.h" -#include "sysreg.h" - -void nxboot_finish(uint32_t boot_memaddr) { - /* Boot up Exosphère. */ - MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE = 0; - MAILBOX_NX_BOOTLOADER_SETUP_STATE = NX_BOOTLOADER_STATE_DRAM_INITIALIZED_4X; - - /* Terminate the display. */ - display_end(); - - /* Boot CPU0. */ - cluster_boot_cpu0(boot_memaddr); - - /* Wait for Exosphère to wake up. */ - while (MAILBOX_NX_BOOTLOADER_IS_SECMON_AWAKE == 0) { - udelay(1); - } - - /* Signal Exosphère. */ - MAILBOX_NX_BOOTLOADER_SETUP_STATE = NX_BOOTLOADER_STATE_FINISHED_4X; - - /* Halt ourselves in waitevent state. */ - while (1) { - FLOW_CTLR_HALT_COP_EVENTS_0 = 0x50000000; - } -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/nxfs.c b/fusee/fusee-secondary/src/nxfs.c deleted file mode 100644 index d53ac704c..000000000 --- a/fusee/fusee-secondary/src/nxfs.c +++ /dev/null @@ -1,753 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include "nxfs.h" -#include "mc.h" -#include "gpt.h" -#include "se.h" -#include "utils.h" -#include "fs_utils.h" -#include "../../../fusee/common/sdmmc/sdmmc.h" -#include "../../../fusee/common/log.h" -#include "../../../fusee/common/fatfs/ff.h" - -static bool g_ahb_redirect_enabled = false; -static bool g_sd_device_initialized = false; -static bool g_emmc_device_initialized = false; - -static bool g_fsdev_ready = false; -static bool g_rawdev_ready = false; - -static bool g_is_emummc = false; - -static sdmmc_t g_sd_sdmmc = {0}; -static sdmmc_t g_emmc_sdmmc = {0}; - -static sdmmc_device_t g_sd_device = {0}; -static sdmmc_device_t g_emmc_device = {0}; - -typedef struct mmc_partition_info_t { - sdmmc_device_t *device; - SdmmcControllerNum controller; - SdmmcPartitionNum partition; -} mmc_partition_info_t; - -static mmc_partition_info_t g_sd_mmcpart = {&g_sd_device, SDMMC_1, SDMMC_PARTITION_USER}; -static mmc_partition_info_t g_emmc_boot0_mmcpart = {&g_emmc_device, SDMMC_4, SDMMC_PARTITION_BOOT0}; -static mmc_partition_info_t g_emmc_boot1_mmcpart = {&g_emmc_device, SDMMC_4, SDMMC_PARTITION_BOOT1}; -static mmc_partition_info_t g_emmc_user_mmcpart = {&g_emmc_device, SDMMC_4, SDMMC_PARTITION_USER}; - -SdmmcPartitionNum g_current_emmc_partition = SDMMC_PARTITION_INVALID; - -static int mmc_partition_initialize(device_partition_t *devpart) { - mmc_partition_info_t *mmcpart = (mmc_partition_info_t *)devpart->device_struct; - - /* Allocate the crypto work buffer. */ - if ((devpart->read_cipher != NULL) || (devpart->write_cipher != NULL)) { - devpart->crypto_work_buffer = memalign(16, devpart->sector_size * 16); - if (devpart->crypto_work_buffer == NULL) { - return ENOMEM; - } else { - devpart->crypto_work_buffer_num_sectors = devpart->sector_size * 16; - } - } else { - devpart->crypto_work_buffer = NULL; - devpart->crypto_work_buffer_num_sectors = 0; - } - - /* Enable AHB redirection if necessary. */ - if (!g_ahb_redirect_enabled) { - mc_enable_ahb_redirect(); - g_ahb_redirect_enabled = true; - } - - /* Initialize hardware. */ - if (mmcpart->device == &g_sd_device) { - if (!g_sd_device_initialized) { - int rc = sdmmc_device_sd_init(mmcpart->device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_EMU_SDR104) ? 0 : EIO; - if (rc) - return rc; - g_sd_device_initialized = true; - } - devpart->initialized = true; - return 0; - } else if (mmcpart->device == &g_emmc_device) { - if (!g_emmc_device_initialized) { - int rc = sdmmc_device_mmc_init(mmcpart->device, &g_emmc_sdmmc, SDMMC_BUS_WIDTH_8BIT, SDMMC_SPEED_MMC_HS400) ? 0 : EIO; - if (rc) - return rc; - g_emmc_device_initialized = true; - } - devpart->initialized = true; - return 0; - } - - return 0; -} - -static void mmc_partition_finalize(device_partition_t *devpart) { - mmc_partition_info_t *mmcpart = (mmc_partition_info_t *)devpart->device_struct; - - /* Finalize hardware. */ - if (mmcpart->device == &g_sd_device) { - if (g_is_emummc) { - return; - } - if (g_sd_device_initialized) { - sdmmc_device_finish(&g_sd_device); - g_sd_device_initialized = false; - } - devpart->initialized = false; - } else if (mmcpart->device == &g_emmc_device) { - if (g_emmc_device_initialized) { - sdmmc_device_finish(&g_emmc_device); - g_emmc_device_initialized = false; - } - devpart->initialized = false; - } - - /* Disable AHB redirection if necessary. */ - if (g_ahb_redirect_enabled) { - mc_disable_ahb_redirect(); - g_ahb_redirect_enabled = false; - } - - /* Free the crypto work buffer. */ - if (devpart->crypto_work_buffer != NULL) { - free(devpart->crypto_work_buffer); - } -} - -static int mmc_partition_read(device_partition_t *devpart, void *dst, uint64_t sector, uint64_t num_sectors) { - mmc_partition_info_t *mmcpart = (mmc_partition_info_t *)devpart->device_struct; - - if ((mmcpart->device == &g_emmc_device) && (g_current_emmc_partition != mmcpart->partition)) { - if (!sdmmc_mmc_select_partition(mmcpart->device, mmcpart->partition)) - return EIO; - g_current_emmc_partition = mmcpart->partition; - } - - return sdmmc_device_read(mmcpart->device, (uint32_t)(devpart->start_sector + sector), (uint32_t)num_sectors, dst) ? 0 : EIO; -} - -static int mmc_partition_write(device_partition_t *devpart, const void *src, uint64_t sector, uint64_t num_sectors) { - mmc_partition_info_t *mmcpart = (mmc_partition_info_t *)devpart->device_struct; - - if ((mmcpart->device == &g_emmc_device) && (g_current_emmc_partition != mmcpart->partition)) { - if (!sdmmc_mmc_select_partition(mmcpart->device, mmcpart->partition)) - return EIO; - g_current_emmc_partition = mmcpart->partition; - } - - return sdmmc_device_write(mmcpart->device, (uint32_t)(devpart->start_sector + sector), (uint32_t)num_sectors, (void *)src) ? 0 : EIO; -} - -static int emummc_partition_initialize(device_partition_t *devpart) { - /* Allocate the crypto work buffer. */ - if ((devpart->read_cipher != NULL) || (devpart->write_cipher != NULL)) { - devpart->crypto_work_buffer = memalign(16, devpart->sector_size * 16); - if (devpart->crypto_work_buffer == NULL) { - return ENOMEM; - } else { - devpart->crypto_work_buffer_num_sectors = devpart->sector_size * 16; - } - } else { - devpart->crypto_work_buffer = NULL; - devpart->crypto_work_buffer_num_sectors = 0; - } - devpart->initialized = true; - - return 0; -} - -static void emummc_partition_finalize(device_partition_t *devpart) { - /* Free the crypto work buffer. */ - if (devpart->crypto_work_buffer != NULL) { - free(devpart->crypto_work_buffer); - } -} - -static int emummc_partition_read(device_partition_t *devpart, void *dst, uint64_t sector, uint64_t num_sectors) { - if (devpart->emu_use_file) { - /* Read partition data using our backing file. */ - int rc = 0; - FILE *emummc_file = fopen(devpart->emu_file_path, "rb"); - fseek(emummc_file, (devpart->start_sector + sector) * devpart->sector_size, SEEK_CUR); - rc = (fread(dst, devpart->sector_size, num_sectors, emummc_file) > 0) ? 0 : -1; - fclose(emummc_file); - return rc; - } else { - /* Read partition data directly from the SD card device. */ - return sdmmc_device_read(&g_sd_device, (uint32_t)(devpart->start_sector + sector), (uint32_t)num_sectors, dst) ? 0 : EIO; - } -} - -static int emummc_partition_write(device_partition_t *devpart, const void *src, uint64_t sector, uint64_t num_sectors) { - if (devpart->emu_use_file) { - /* Write partition data using our backing file. */ - int rc = 0; - FILE *emummc_file = fopen(devpart->emu_file_path, "wb"); - fseek(emummc_file, (devpart->start_sector + sector) * devpart->sector_size, SEEK_CUR); - rc = (fwrite(src, devpart->sector_size, num_sectors, emummc_file) > 0) ? 0 : -1; - fclose(emummc_file); - return rc; - } else { - /* Write partition data directly to the SD card device. */ - return sdmmc_device_write(&g_sd_device, (uint32_t)(devpart->start_sector + sector), (uint32_t)num_sectors, (void *)src) ? 0 : EIO; - } -} - -static int nxfs_bis_crypto_decrypt(device_partition_t *devpart, uint64_t sector, uint64_t num_sectors) { - unsigned int keyslot_a = 4; /* These keyslots are never used by exosphere, and should be safe. */ - unsigned int keyslot_b = 5; - size_t size = num_sectors * devpart->sector_size; - switch (devpart->crypto_mode) { - case DevicePartitionCryptoMode_Ctr: - set_aes_keyslot(keyslot_a, devpart->keys[0], 0x10); - se_aes_ctr_crypt(keyslot_a, devpart->crypto_work_buffer, size, devpart->crypto_work_buffer, size, devpart->iv, 0x10); - return 0; - case DevicePartitionCryptoMode_Xts: - set_aes_keyslot(keyslot_a, devpart->keys[0], 0x10); - set_aes_keyslot(keyslot_b, devpart->keys[1], 0x10); - se_aes_128_xts_nintendo_decrypt(keyslot_a, keyslot_b, sector, devpart->crypto_work_buffer, devpart->crypto_work_buffer, size, devpart->sector_size, devpart->crypto_sector_size); - return 0; - case DevicePartitionCryptoMode_None: - default: - return 0; - } -} - -static int nxfs_bis_crypto_encrypt(device_partition_t *devpart, uint64_t sector, uint64_t num_sectors) { - unsigned int keyslot_a = 4; /* These keyslots are never used by exosphere, and should be safe. */ - unsigned int keyslot_b = 5; - size_t size = num_sectors * devpart->sector_size; - switch (devpart->crypto_mode) { - case DevicePartitionCryptoMode_Ctr: - set_aes_keyslot(keyslot_a, devpart->keys[0], 0x10); - se_aes_ctr_crypt(keyslot_a, devpart->crypto_work_buffer, size, devpart->crypto_work_buffer, size, devpart->iv, 0x10); - return 0; - case DevicePartitionCryptoMode_Xts: - set_aes_keyslot(keyslot_a, devpart->keys[0], 0x10); - set_aes_keyslot(keyslot_b, devpart->keys[1], 0x10); - se_aes_128_xts_nintendo_encrypt(keyslot_a, keyslot_b, sector, devpart->crypto_work_buffer, devpart->crypto_work_buffer, size, devpart->sector_size, devpart->crypto_sector_size); - return 0; - case DevicePartitionCryptoMode_None: - default: - return 0; - } -} - -static const device_partition_t g_mmc_devpart_template = { - .crypto_sector_size = 0x4000, - .sector_size = 512, - .initializer = mmc_partition_initialize, - .finalizer = mmc_partition_finalize, - .reader = mmc_partition_read, - .writer = mmc_partition_write, -}; - -static const device_partition_t g_emummc_devpart_template = { - .crypto_sector_size = 0x4000, - .sector_size = 512, - .initializer = emummc_partition_initialize, - .finalizer = emummc_partition_finalize, - .reader = emummc_partition_read, - .writer = emummc_partition_write, -}; - -static int nxfs_mount_partition_gpt_callback(const efi_entry_t *entry, void *param, size_t entry_offset, FILE *disk) { - (void)entry_offset; - (void)disk; - device_partition_t *parent = (device_partition_t *)param; - device_partition_t devpart = *parent; - char name_buffer[128]; - const uint16_t *utf16name = entry->name; - uint32_t name_len; - int rc; - - static const struct { - const char *partition_name; - const char *mount_point; - bool is_fat; - bool is_encrypted; - bool register_immediately; - } known_partitions[] = { - {"PRODINFO", "prodinfo", false, true, false}, - {"PRODINFOF", "prodinfof", true, true, false}, - {"BCPKG2-1-Normal-Main", "bcpkg21", false, false, true}, - {"BCPKG2-2-Normal-Sub", "bcpkg22", false, false, false}, - {"BCPKG2-3-SafeMode-Main", "bcpkg23", false, false, false}, - {"BCPKG2-4-SafeMode-Sub", "bcpkg24", false, false, false}, - {"BCPKG2-5-Repair-Main", "bcpkg25", false, false, false}, - {"BCPKG2-6-Repair-Sub", "bcpkg26", false, false, false}, - {"SAFE", "safe", true, true, false}, - {"SYSTEM", "system", true, true, false}, - {"USER", "user", true, true, false}, - }; - - /* Convert the partition name to ASCII, for comparison. */ - for (name_len = 0; name_len < sizeof(entry->name) && *utf16name != 0; name_len++) { - name_buffer[name_len] = (char)*utf16name++; - } - name_buffer[name_len] = '\0'; - - /* Mount the partition, if we know about it. */ - for (size_t i = 0; i < sizeof(known_partitions)/sizeof(known_partitions[0]); i++) { - if (strcmp(name_buffer, known_partitions[i].partition_name) == 0) { - devpart.start_sector += entry->first_lba; - devpart.num_sectors = (entry->last_lba + 1) - entry->first_lba; - if (parent->num_sectors < devpart.num_sectors) { - errno = EINVAL; - return -1; - } - - if (known_partitions[i].is_encrypted) { - devpart.read_cipher = nxfs_bis_crypto_decrypt; - devpart.write_cipher = nxfs_bis_crypto_encrypt; - devpart.crypto_mode = DevicePartitionCryptoMode_Xts; - } - - if (known_partitions[i].is_fat) { - rc = fsdev_mount_device(known_partitions[i].mount_point, &devpart, false); - if (rc == -1) { - return -1; - } - if (known_partitions[i].register_immediately) { - rc = fsdev_register_device(known_partitions[i].mount_point); - if (rc == -1) { - return -1; - } - } - } else { - rc = rawdev_mount_device(known_partitions[i].mount_point, &devpart, false); - if (rc == -1) { - return -1; - } - if (known_partitions[i].register_immediately) { - rc = rawdev_register_device(known_partitions[i].mount_point); - if (rc == -1) { - return -1; - } - } - } - } - } - - return 0; -} - -int nxfs_mount_sd() { - device_partition_t model; - int rc; - - /* Setup a template for the SD card. */ - model = g_mmc_devpart_template; - model.device_struct = &g_sd_mmcpart; - model.start_sector = 0; - model.num_sectors = 1u << 30; /* arbitrary numbers of sectors. TODO: find the size of the SD in sectors. */ - model.is_emulated = false; - - /* Mount the SD card device. */ - rc = fsdev_mount_device("sdmc", &model, true); - - if (rc == -1) { - return -1; - } - - /* Register the SD card device. */ - rc = fsdev_register_device("sdmc"); - - if (rc == -1) { - return -1; - } - - /* All fs devices are ready. */ - if (rc == 0) { - g_fsdev_ready = true; - } - - return rc; -} - -int nxfs_mount_emmc() { - device_partition_t model; - int rc; - FILE *rawnand; - - /* Setup a template for boot0. */ - model = g_mmc_devpart_template; - model.device_struct = &g_emmc_boot0_mmcpart; - model.start_sector = 0; - model.num_sectors = 0x184000 / model.sector_size; - model.is_emulated = false; - - /* Mount boot0 device. */ - rc = rawdev_mount_device("boot0", &model, true); - - if (rc == -1) { - return -1; - } - - /* Register boot0 device. */ - rc = rawdev_register_device("boot0"); - - if (rc == -1) { - return -1; - } - - /* Setup a template for boot1. */ - model = g_mmc_devpart_template; - model.device_struct = &g_emmc_boot1_mmcpart; - model.start_sector = 0; - model.num_sectors = 0x80000 / model.sector_size; - model.is_emulated = false; - - /* Mount boot1 device. */ - rc = rawdev_mount_device("boot1", &model, false); - - if (rc == -1) { - return -1; - } - - /* Don't register boot1 for now. */ - - /* Setup a template for raw NAND. */ - model = g_mmc_devpart_template; - model.device_struct = &g_emmc_user_mmcpart; - model.start_sector = 0; - model.num_sectors = (256ull << 30) / model.sector_size; - model.is_emulated = false; - - /* Mount raw NAND device. */ - rc = rawdev_mount_device("rawnand", &model, false); - - if (rc == -1) { - return -1; - } - - /* Register raw NAND device. */ - rc = rawdev_register_device("rawnand"); - if (rc == -1) { - return -1; - } - - /* Open raw NAND device. */ - rawnand = fopen("rawnand:/", "rb"); - - if (rawnand == NULL) { - return -1; - } - - /* Iterate the GPT and mount each raw NAND partition. */ - rc = gpt_iterate_through_entries(rawnand, model.sector_size, nxfs_mount_partition_gpt_callback, &model); - - /* Close raw NAND device. */ - fclose(rawnand); - - /* All raw devices are ready. */ - if (rc == 0) { - g_rawdev_ready = true; - } - - return rc; -} - -int nxfs_mount_emummc_partition(uint64_t emummc_start_sector) { - device_partition_t model; - int rc; - FILE *rawnand; - - /* Setup an emulation template for boot0. */ - model = g_emummc_devpart_template; - model.start_sector = emummc_start_sector + (0x400000 * 0 / model.sector_size); - model.num_sectors = 0x400000 / model.sector_size; - model.is_emulated = true; - model.emu_use_file = false; - - /* Mount emulated boot0 device. */ - rc = rawdev_mount_device("boot0", &model, true); - - /* Failed to mount boot0 device. */ - if (rc == -1) { - return -1; - } - - /* Register emulated boot0 device. */ - rc = rawdev_register_device("boot0"); - - /* Failed to register boot0 device. */ - if (rc == -1) { - return -2; - } - - /* Setup an emulation template for boot1. */ - model = g_emummc_devpart_template; - model.start_sector = emummc_start_sector + (0x400000 * 1 / model.sector_size); - model.num_sectors = 0x400000 / model.sector_size; - model.is_emulated = true; - model.emu_use_file = false; - - /* Mount emulated boot1 device. */ - rc = rawdev_mount_device("boot1", &model, false); - - /* Failed to mount boot1. */ - if (rc == -1) { - return -3; - } - - /* Don't register emulated boot1 for now. */ - - /* Setup a template for raw NAND. */ - model = g_emummc_devpart_template; - model.start_sector = emummc_start_sector + (0x400000 * 2 / model.sector_size); - model.num_sectors = (256ull << 30) / model.sector_size; - model.is_emulated = true; - model.emu_use_file = false; - - /* Mount emulated raw NAND device. */ - rc = rawdev_mount_device("rawnand", &model, false); - - /* Failed to mount raw NAND. */ - if (rc == -1) { - return -4; - } - - /* Register emulated raw NAND device. */ - rc = rawdev_register_device("rawnand"); - - /* Failed to register raw NAND device. */ - if (rc == -1) { - return -5; - } - - /* Open emulated raw NAND device. */ - rawnand = fopen("rawnand:/", "rb"); - - /* Failed to open emulated raw NAND device. */ - if (rawnand == NULL) { - return -6; - } - - /* Iterate the GPT and mount each emulated raw NAND partition. */ - rc = gpt_iterate_through_entries(rawnand, model.sector_size, nxfs_mount_partition_gpt_callback, &model); - - /* Close emulated raw NAND device. */ - fclose(rawnand); - - /* All emulated devices are ready. */ - if (rc == 0) { - g_rawdev_ready = true; - g_is_emummc = true; - } - - return rc; -} - -int nxfs_mount_emummc_file(const char *emummc_path, int num_parts, uint64_t part_limit) { - device_partition_t model; - int rc; - FILE *rawnand; - char emummc_boot0_path[0x300 + 1] = {0}; - char emummc_boot1_path[0x300 + 1] = {0}; - - /* Check if the SD card is EXFAT formatted. */ - rc = fsdev_is_exfat("sdmc"); - - /* Failed to detect file system type. */ - if (rc == -1) { - return -1; - } - - /* We want a folder with the archive bit set. */ - rc = fsdev_get_attr(emummc_path); - - /* Failed to get file DOS attributes. */ - if (rc == -1) { - return -2; - } - - /* Our path is not a directory. */ - if (!(rc & AM_DIR)) { - return -3; - } - - /* Check if the archive bit is not set. */ - if (!(rc & AM_ARC)) { - /* Try to set the archive bit. */ - rc = fsdev_set_attr(emummc_path, AM_ARC, AM_ARC); - - /* Failed to set file DOS attributes. */ - if (rc == -1) { - return -4; - } - } - - /* Prepare boot0 file path. */ - snprintf(emummc_boot0_path, sizeof(emummc_boot0_path) - 1, "%s/%s", emummc_path, "boot0"); - - /* Setup an emulation template for boot0. */ - model = g_emummc_devpart_template; - model.start_sector = 0; - model.num_sectors = 0x400000 / model.sector_size; - model.is_emulated = true; - model.emu_use_file = true; - model.emu_num_parts = 0; - model.emu_part_limit = 0; - strcpy(model.emu_root_path, emummc_path); - strcpy(model.emu_file_path, emummc_boot0_path); - - /* Mount emulated boot0 device. */ - rc = rawdev_mount_device("boot0", &model, true); - - /* Failed to mount boot0 device. */ - if (rc == -1) { - return -5; - } - - /* Register emulated boot0 device. */ - rc = rawdev_register_device("boot0"); - - /* Failed to register boot0 device. */ - if (rc == -1) { - return -6; - } - - /* Prepare boot1 file path. */ - snprintf(emummc_boot1_path, sizeof(emummc_boot1_path) - 1, "%s/%s", emummc_path, "boot1"); - - /* Setup an emulation template for boot1. */ - model = g_emummc_devpart_template; - model.start_sector = 0; - model.num_sectors = 0x400000 / model.sector_size; - model.is_emulated = true; - model.emu_use_file = true; - model.emu_num_parts = 0; - model.emu_part_limit = 0; - strcpy(model.emu_root_path, emummc_path); - strcpy(model.emu_file_path, emummc_boot1_path); - - /* Mount emulated boot1 device. */ - rc = rawdev_mount_device("boot1", &model, false); - - /* Failed to mount boot1. */ - if (rc == -1) { - return -7; - } - - /* Register emulated boot1 device. */ - rc = rawdev_register_device("boot1"); - - /* Failed to register boot1 device. */ - if (rc == -1) { - return -8; - } - - /* Setup a template for raw NAND. */ - model = g_emummc_devpart_template; - model.start_sector = 0; - model.num_sectors = (256ull << 30) / model.sector_size; - model.is_emulated = true; - model.emu_use_file = true; - model.emu_num_parts = num_parts; - model.emu_part_limit = part_limit; - strcpy(model.emu_root_path, emummc_path); - strcpy(model.emu_file_path, emummc_path); - - /* Mount emulated raw NAND device from single or multiple parts. */ - rc = rawdev_mount_device("rawnand", &model, false); - - /* Failed to mount raw NAND. */ - if (rc == -1) { - return -9; - } - - /* Register emulated raw NAND device. */ - rc = rawdev_register_device("rawnand"); - - /* Failed to register raw NAND device. */ - if (rc == -1) { - return -10; - } - - /* Open emulated raw NAND device. */ - rawnand = fopen("rawnand:/", "rb"); - - /* Failed to open emulated raw NAND device. */ - if (rawnand == NULL) { - return -11; - } - - /* Iterate the GPT and mount each emulated raw NAND partition. */ - rc = gpt_iterate_through_entries(rawnand, model.sector_size, nxfs_mount_partition_gpt_callback, &model); - - /* Close emulated raw NAND device. */ - fclose(rawnand); - - /* All emulated devices are ready. */ - if (rc == 0) { - g_rawdev_ready = true; - g_is_emummc = true; - } - - return rc; -} - -int nxfs_unmount_sd() { - int rc = 0; - - /* Unmount all fs devices. */ - if (g_fsdev_ready) { - rc = fsdev_unmount_all(); - g_fsdev_ready = false; - } - - return rc; -} - -int nxfs_unmount_emmc() { - int rc = 0; - - /* Unmount all raw devices. */ - if (g_rawdev_ready) { - rc = rawdev_unmount_all(); - g_rawdev_ready = false; - } - - return rc; -} - -int nxfs_init() { - int rc; - - /* Mount and register the SD card. */ - rc = nxfs_mount_sd(); - - /* Set the SD card as the default file system device. */ - if (rc == 0) { - rc = fsdev_set_default_device("sdmc"); - } - - return rc; -} - -int nxfs_end() { - return ((nxfs_unmount_sd() || nxfs_unmount_emmc()) ? -1 : 0); -} diff --git a/fusee/fusee-secondary/src/nxfs.h b/fusee/fusee-secondary/src/nxfs.h deleted file mode 100644 index 685147f72..000000000 --- a/fusee/fusee-secondary/src/nxfs.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_NX_FS_H -#define FUSEE_NX_FS_H - -#include "fs_dev.h" -#include "raw_dev.h" - -int nxfs_init(); -int nxfs_end(); - -int nxfs_mount_sd(); -int nxfs_mount_emmc(); -int nxfs_mount_emummc_partition(uint64_t emummc_start_sector); -int nxfs_mount_emummc_file(const char *emummc_path, int num_parts, uint64_t part_limit); -int nxfs_unmount_sd(); -int nxfs_unmount_emmc(); -int nxfs_unmount_emummc(); - -#endif diff --git a/fusee/fusee-secondary/src/package1.c b/fusee/fusee-secondary/src/package1.c deleted file mode 100644 index 2c2c59f80..000000000 --- a/fusee/fusee-secondary/src/package1.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include "../../../fusee/common/log.h" -#include "package1.h" -#include "bct.h" -#include "se.h" - -static const uint8_t custom_public_key[0x100] = { - 0x59, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, - 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0xFF, -}; - -static bool is_custom_public_key_erista(const void *bct) { - return memcmp((const uint8_t *)bct + 0x210, custom_public_key, sizeof(custom_public_key)) == 0; -} - -static bool is_custom_public_key_mariko(const void *bct) { - return memcmp((const uint8_t *)bct + 0x10, custom_public_key, sizeof(custom_public_key)) == 0; -} - -bool package1_is_custom_public_key(const void *bct, bool mariko) { - if (mariko) { - return is_custom_public_key_mariko(bct); - } else { - return is_custom_public_key_erista(bct); - } -} - -int package1_read_and_parse_boot0_erista(void **package1loader, size_t *package1loader_size, FILE *boot0) { - nvboot_config_table *bct; /* Normal firmware BCT, primary. TODO: check? */ - nv_bootloader_info *pk1l_info; /* TODO: check? */ - size_t fpos, pk1l_offset; - - if (package1loader == NULL || package1loader_size == NULL || boot0 == NULL) { - errno = EINVAL; - return -1; - } - - bct = malloc(sizeof(nvboot_config_table)); - if (bct == NULL) { - errno = ENOMEM; - return -1; - } - pk1l_info = &bct->bootloader[0]; - - fpos = ftell(boot0); - - /* Read the BCT. */ - if (fread(bct, sizeof(nvboot_config_table), 1, boot0) == 0) { - free(bct); - return -1; - } - - /* If custom public key, use bct-2 instead of bct 0. */ - if (is_custom_public_key_erista(bct)) { - if (fseek(boot0, fpos + 0x4000 * 2, SEEK_SET) != 0) { - free(bct); - return -1; - } - if (fread(bct, sizeof(nvboot_config_table), 1, boot0) == 0) { - free(bct); - return -1; - } - } - - if (bct->bootloader_used < 1 || pk1l_info->version < 1) { - free(bct); - errno = EILSEQ; - return -1; - } - - *package1loader_size = pk1l_info->length; - - pk1l_offset = 0x4000 * pk1l_info->start_blk + 0x200 * pk1l_info->start_page; - free(bct); - (*package1loader) = memalign(0x10000, *package1loader_size); - - if (*package1loader == NULL) { - errno = ENOMEM; - return -1; - } - - /* Read the pk1/pk1l, and skip the backup too. */ - if (fseek(boot0, fpos + pk1l_offset, SEEK_SET) != 0) { - return -1; - } - if (fread(*package1loader, *package1loader_size, 1, boot0) == 0) { - return -1; - } - if (fseek(boot0, fpos + pk1l_offset + 2 * PACKAGE1LOADER_SIZE_MAX, SEEK_SET) != 0) { - return -1; - } - - return 0; -} - -int package1_read_and_parse_boot0_mariko(void **package1loader, size_t *package1loader_size, FILE *boot0) { - /* TODO: Actually parse BOOT0 to locate package1ldr. */ - size_t fpos, pk1l_offset; - - fpos = ftell(boot0); - pk1l_offset = 0x100000; - - /* Read the OEM header. */ - pk11_mariko_oem_header_t oem_header; - if (fseek(boot0, fpos + pk1l_offset, SEEK_SET) != 0) { - return -1; - } - if (fread(&oem_header, sizeof(oem_header), 1, boot0) == 0) { - return -1; - } - - /* Sanity check the size. */ - if (oem_header.bl_size < 2 * sizeof(package1loader_header_t)) { - return -1; - } - - /* Set the size. */ - *package1loader_size = oem_header.bl_size; - - /* Allocate pk11. */ - (*package1loader) = memalign(0x10000, *package1loader_size); - - if (*package1loader == NULL) { - errno = ENOMEM; - return -1; - } - - /* Read pk11. */ - if (fread(*package1loader, *package1loader_size, 1, boot0) == 0) { - return -1; - } - - /* Copy the plaintext header. */ - package1loader_header_t dec_header; - memcpy(&dec_header, *package1loader, sizeof(dec_header)); - - /* Decrypt the binary. */ - const uint8_t __attribute__((aligned(16))) iv[16] = {0}; - se_aes_128_cbc_decrypt(KEYSLOT_SWITCH_BEK_MARIKO, *package1loader, *package1loader_size, *package1loader, *package1loader_size, iv); - - /* Validate the decryption. */ - if (memcmp(&dec_header, (const uint8_t *)*package1loader + sizeof(dec_header), sizeof(dec_header)) != 0) { - print(SCREEN_LOG_LEVEL_DEBUG, "Decrypted package1loader is invalid...\n"); - return -1; - } - - /* Copy out the first header. */ - memcpy(*package1loader, &dec_header, sizeof(dec_header)); - - return 0; -} - -bool package1_get_tsec_fw(void **tsec_fw, const void *package1loader, size_t package1loader_size) { - /* The TSEC firmware is always located at a 256-byte aligned address. */ - /* We're looking for its 4 first bytes. */ - const uint32_t *pos; - uintptr_t pk1l = (uintptr_t)package1loader; - for (pos = (const uint32_t *)pk1l; (uintptr_t)pos < pk1l + package1loader_size; pos += 0x40) { - if (*pos == 0xCF42004D) { - (*tsec_fw) = (void *)pos; - return true; - } - } - - return false; -} - -void *package1_get_warmboot_fw(const package1_header_t *package1) { - /* - The layout of pk1 changes between versions. - - However, the secmon always starts by this erratum code: - https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/nvidia/tegra/common/aarch64/tegra_helpers.S#L312 - and thus by 0xD5034FDF. - - Nx-bootloader starts by 0xE328F0C0 (msr cpsr_f, 0xc0) before 6.2.0 and by 0xF0C0A7F0 afterwards. - */ - const uint32_t *data = (const uint32_t *)package1->data; - for (size_t i = 0; i < 3; i++) { - switch (*data) { - case 0xD5034FDFu: - data += package1->secmon_size / 4; - break; - case 0xE328F0C0: - case 0xF0C0A7F0: - data += package1->nx_bootloader_size / 4; - break; - default: - /* TODO: should we validate its signature? */ - return (void *)data; - } - } - - return NULL; -} diff --git a/fusee/fusee-secondary/src/package1.h b/fusee/fusee-secondary/src/package1.h deleted file mode 100644 index 0e9d5b6a9..000000000 --- a/fusee/fusee-secondary/src/package1.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PACKAGE1_H -#define FUSEE_PACKAGE1_H - -#include -#include "key_derivation.h" - -#define PACKAGE1LOADER_SIZE_MAX 0x40000 - -typedef struct { - uint32_t package1loader_hash; - uint32_t secmon_hash; - uint32_t nx_bootloader_hash; - uint32_t _0xC; - char build_timestamp[0x0E]; - uint8_t _0x1E; - uint8_t version; -} package1loader_header_t; - -typedef struct { - char magic[4]; - uint32_t warmboot_size; - uint32_t warmboot_offset; - uint32_t _0xC; - uint32_t nx_bootloader_size; - uint32_t nx_bootloader_offset; - uint32_t secmon_size; - uint32_t secmon_offset; - uint8_t data[]; -} package1_header_t; - -typedef struct { - uint8_t aes_mac[0x10]; - uint8_t rsa_sig[0x100]; - uint8_t salt[0x20]; - uint8_t hash[0x20]; - uint32_t bl_version; - uint32_t bl_size; - uint32_t bl_load_addr; - uint32_t bl_entrypoint; - uint8_t _0x160[0x10]; - uint8_t data[]; -} pk11_mariko_oem_header_t; - -bool package1_is_custom_public_key(const void *bct, bool mariko); - -int package1_read_and_parse_boot0_erista(void **package1loader, size_t *package1loader_size, FILE *boot0); -int package1_read_and_parse_boot0_mariko(void **package1loader, size_t *package1loader_size, FILE *boot0); - -/* Must be aligned to 16 bytes. */ -void *package1_get_warmboot_fw(const package1_header_t *package1); - -#endif diff --git a/fusee/fusee-secondary/src/package2.c b/fusee/fusee-secondary/src/package2.c deleted file mode 100644 index 744b38d71..000000000 --- a/fusee/fusee-secondary/src/package2.c +++ /dev/null @@ -1,385 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include "utils.h" -#include "masterkey.h" -#include "stratosphere.h" -#include "package2.h" -#include "kernel_patches.h" -#include "kip.h" -#include "se.h" -#include "fs_utils.h" - -#define u8 uint8_t -#define u32 uint32_t -#include "thermosphere_bin.h" -#include "../../../fusee/common/log.h" -#undef u8 -#undef u32 - -static void package2_decrypt(package2_header_t *package2); -static size_t package2_get_src_section(void **section, package2_header_t *package2, unsigned int id); -static size_t package2_get_thermosphere(void **thermosphere); -static ini1_header_t *package2_rebuild_ini1(ini1_header_t *ini1, uint32_t target_firmware, void *emummc, size_t emummc_size); -static void package2_append_section(unsigned int id, package2_header_t *package2, void *data, size_t size); -static void package2_fixup_header_and_section_hashes(package2_header_t *package2, size_t size); - -static inline size_t align_to_4(size_t s) { - return ((s + 3) >> 2) << 2; -} - -void package2_rebuild_and_copy(package2_header_t *package2, uint32_t target_firmware, void *mesosphere, size_t mesosphere_size, void *emummc, size_t emummc_size) { - package2_header_t *rebuilt_package2; - size_t rebuilt_package2_size; - void *kernel; - size_t kernel_size; - bool is_sd_kernel = false; - void *thermosphere; - size_t thermosphere_size; - ini1_header_t *orig_ini1, *rebuilt_ini1; - - /* First things first: Decrypt Package2 in place. */ - package2_decrypt(package2); - print(SCREEN_LOG_LEVEL_DEBUG, "Decrypted package2!\n"); - - kernel_size = package2_get_src_section(&kernel, package2, PACKAGE2_SECTION_KERNEL); - - /* Modify Package2 to add an additional thermosphere section. */ - thermosphere_size = package2_get_thermosphere(&thermosphere); - - if (thermosphere_size != 0 && package2->metadata.section_sizes[PACKAGE2_SECTION_UNUSED] != 0) { - fatal_error(u8"Error: Package2 has no unused section for Thermosphère!\n"); - } - - /* Load Kernel from SD, if possible. */ - { - size_t sd_kernel_size = get_file_size("atmosphere/kernel.bin"); - if (sd_kernel_size != 0) { - if (sd_kernel_size > PACKAGE2_SIZE_MAX) { - fatal_error("Error: atmosphere/kernel.bin is too large!\n"); - } - kernel = malloc(sd_kernel_size); - if (kernel == NULL) { - fatal_error("Error: failed to allocate kernel!\n"); - } - if (read_from_file(kernel, sd_kernel_size, "atmosphere/kernel.bin") != sd_kernel_size) { - fatal_error("Error: failed to read atmosphere/kernel.bin!\n"); - } - kernel_size = sd_kernel_size; - is_sd_kernel = true; - } - } - - /* Perform any patches we want to the NX kernel. */ - package2_patch_kernel(kernel, &kernel_size, is_sd_kernel, (void *)&orig_ini1, target_firmware); - - /* Ensure we know where embedded INI is if present, and we don't if not. */ - if ((target_firmware < ATMOSPHERE_TARGET_FIRMWARE_8_0_0 && orig_ini1 != NULL) || - (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_8_0_0 && orig_ini1 == NULL)) { - fatal_error("Error: inappropriate kernel embedded ini context"); - } - - /* Use mesosphere instead of Nintendo's kernel when present. */ - const bool is_mesosphere = mesosphere != NULL && mesosphere_size != 0; - if (is_mesosphere) { - kernel = mesosphere; - kernel_size = mesosphere_size; - - /* Patch mesosphere to use our rebuilt ini. */ - *(volatile uint64_t *)((uintptr_t)mesosphere + 8) = (uint64_t)mesosphere_size; - - /* Place the kernel section at the correct location. */ - package2->metadata.section_offsets[PACKAGE2_SECTION_KERNEL] = 0x60000; - package2->metadata.entrypoint = 0x60000; - - print(SCREEN_LOG_LEVEL_DEBUG, "Using Mesosphere...\n"); - } - - print(SCREEN_LOG_LEVEL_DEBUG, "Rebuilding the INI1 section...\n"); - if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_8_0_0) { - package2_get_src_section((void *)&orig_ini1, package2, PACKAGE2_SECTION_INI1); - } - - if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_8_0_0 || is_mesosphere) { - /* On 8.0.0, place INI1 right after kernelldr for our sanity. */ - package2->metadata.section_offsets[PACKAGE2_SECTION_INI1] = package2->metadata.section_offsets[PACKAGE2_SECTION_KERNEL] + kernel_size; - } - - /* Perform any patches to the INI1, rebuilding it (This is where our built-in sysmodules will be added.) */ - rebuilt_ini1 = package2_rebuild_ini1(orig_ini1, target_firmware, emummc, emummc_size); - print(SCREEN_LOG_LEVEL_DEBUG, "Rebuilt INI1...\n"); - - /* Allocate the rebuilt package2. */ - rebuilt_package2_size = sizeof(package2_header_t) + kernel_size + align_to_4(thermosphere_size) + align_to_4(rebuilt_ini1->size); - - if (rebuilt_package2_size > PACKAGE2_SIZE_MAX) { - fatal_error("rebuilt package2 is too big!\n"); - } - - rebuilt_package2 = (package2_header_t *)malloc(rebuilt_package2_size); - if (rebuilt_package2 == NULL) { - fatal_error("package2_rebuild: out of memory!\n"); - } - - /* Rebuild package2. */ - memcpy(rebuilt_package2, package2, sizeof(package2_header_t)); - package2_append_section(PACKAGE2_SECTION_KERNEL, rebuilt_package2, kernel, kernel_size); - package2_append_section(PACKAGE2_SECTION_INI1, rebuilt_package2, rebuilt_ini1, rebuilt_ini1->size); - package2_append_section(PACKAGE2_SECTION_UNUSED, rebuilt_package2, thermosphere, thermosphere_size); - - /* Fix all necessary data in the header to accomodate for the new patches. */ - package2_fixup_header_and_section_hashes(rebuilt_package2, rebuilt_package2_size); - - /* Relocate Package2. */ - memcpy(NX_BOOTLOADER_PACKAGE2_LOAD_ADDRESS, rebuilt_package2, rebuilt_package2_size); - - /* We're done. */ - free(rebuilt_ini1); - free(rebuilt_package2); -} - -static void package2_crypt_ctr(unsigned int master_key_rev, void *dst, size_t dst_size, const void *src, size_t src_size, const void *ctr, size_t ctr_size) { - /* Derive package2 key. */ - const uint8_t __attribute__((aligned(16))) package2_key_source[0x10] = { - 0xFB, 0x8B, 0x6A, 0x9C, 0x79, 0x00, 0xC8, 0x49, 0xEF, 0xD2, 0x4D, 0x85, 0x4D, 0x30, 0xA0, 0xC7 - }; - unsigned int keyslot = mkey_get_keyslot(master_key_rev); - decrypt_data_into_keyslot(KEYSLOT_SWITCH_PACKAGE2KEY, keyslot, package2_key_source, 0x10); - - /* Perform Encryption. */ - se_aes_ctr_crypt(KEYSLOT_SWITCH_PACKAGE2KEY, dst, dst_size, src, src_size, ctr, ctr_size); -} - -static bool package2_validate_metadata(package2_meta_t *metadata, uint8_t data[]) { - if (metadata->magic != MAGIC_PK21) { - return false; - } - - /* Package2 size, version number is stored XORed in header CTR. */ - /* Nintendo, what the fuck? */ - uint32_t package_size = package2_meta_get_size(metadata); - uint8_t header_version = package2_meta_get_header_version(metadata); - - /* Ensure package isn't too big or too small. */ - if (package_size <= sizeof(package2_header_t) || package_size > PACKAGE2_SIZE_MAX) { - return false; - } - - /* Validate that we're working with a header we know how to handle. */ - if (header_version > MASTERKEY_REVISION_MAX) { - return false; - } - - /* Require aligned entrypoint. */ - if (metadata->entrypoint & 3) { - return false; - } - - /* Validate section size sanity. */ - if (metadata->section_sizes[0] + metadata->section_sizes[1] + metadata->section_sizes[2] + sizeof(package2_header_t) != package_size) { - return false; - } - - bool entrypoint_found = false; - - /* Header has space for 4 sections, but only 3 are validated/potentially loaded on hardware. */ - size_t cur_section_offset = 0; - for (unsigned int section = 0; section < PACKAGE2_SECTION_MAX; section++) { - /* Validate section size alignment. */ - if (metadata->section_sizes[section] & 3) { - return false; - } - - /* Validate section does not overflow. */ - if (check_32bit_additive_overflow(metadata->section_offsets[section], metadata->section_sizes[section])) { - return false; - } - - /* Check for entrypoint presence. */ - uint32_t section_end = metadata->section_offsets[section] + metadata->section_sizes[section]; - if (metadata->section_offsets[section] <= metadata->entrypoint && metadata->entrypoint < section_end) { - entrypoint_found = true; - } - - /* Ensure no overlap with later sections. */ - if (metadata->section_sizes[section] != 0) { - for (unsigned int later_section = section + 1; later_section < PACKAGE2_SECTION_MAX; later_section++) { - if (metadata->section_sizes[later_section] == 0) { - continue; - } - uint32_t later_section_end = metadata->section_offsets[later_section] + metadata->section_sizes[later_section]; - if (overlaps(metadata->section_offsets[section], section_end, metadata->section_offsets[later_section], later_section_end)) { - return false; - } - } - } - - /* Validate section hashes. */ - if (metadata->section_sizes[section]) { - void *section_data = data + cur_section_offset; - uint8_t calculated_hash[0x20]; - se_calculate_sha256(calculated_hash, section_data, metadata->section_sizes[section]); - if (memcmp(calculated_hash, metadata->section_hashes[section], sizeof(metadata->section_hashes[section])) != 0) { - return false; - } - cur_section_offset += metadata->section_sizes[section]; - } - - } - - /* Ensure that entrypoint is present in one of our sections. */ - if (!entrypoint_found) { - return false; - } - - /* Perform version checks. */ - /* We will be compatible with all package2s released before current, but not newer ones. */ - if (metadata->version_max >= PACKAGE2_MINVER_THEORETICAL && metadata->version_min < PACKAGE2_MAXVER_1202_CURRENT) { - return true; - } - - return false; -} - -static uint32_t package2_decrypt_and_validate_header(package2_header_t *header, bool is_plaintext) { - package2_meta_t metadata; - - /* TODO: Also accept plaintext package2 based on bootconfig. */ - - if (!is_plaintext) { - uint32_t mkey_rev; - - /* Try to decrypt for all possible master keys. */ - for (mkey_rev = 0; mkey_rev <= mkey_get_revision(); mkey_rev++) { - package2_crypt_ctr(mkey_rev, &metadata, sizeof(package2_meta_t), &header->metadata, sizeof(package2_meta_t), header->metadata.ctr, sizeof(header->metadata.ctr)); - /* Copy the ctr (which stores information) into the decrypted metadata. */ - memcpy(metadata.ctr, header->metadata.ctr, sizeof(header->metadata.ctr)); - /* See if this is the correct key. */ - if (package2_validate_metadata(&metadata, header->data)) { - header->metadata = metadata; - return mkey_rev; - } - } - - /* Ensure we successfully decrypted the header. */ - if (mkey_rev > mkey_get_revision()) { - fatal_error("Failed to decrypt the Package2 header (master key revision %u)!\n", mkey_get_revision()); - } - } else if (!package2_validate_metadata(&header->metadata, header->data)) { - fatal_error("Failed to validate the Package2 header!\n"); - } - return 0; -} - -static void package2_decrypt(package2_header_t *package2) { - bool is_package2_plaintext = package2->signature[0]; - is_package2_plaintext &= memcmp(package2->signature, package2->signature + 1, sizeof(package2->signature) - 1) == 0; - is_package2_plaintext &= package2->metadata.magic == MAGIC_PK21; - - uint32_t pk21_mkey_revision = package2_decrypt_and_validate_header(package2, is_package2_plaintext); - - size_t cur_section_offset = 0; - /* Copy each section to its appropriate location, decrypting if necessary. */ - for (unsigned int section = 0; section < PACKAGE2_SECTION_MAX; section++) { - if (package2->metadata.section_sizes[section] == 0) { - continue; - } - - void *src_start = package2->data + cur_section_offset; - void *dst_start = src_start; - size_t size = (size_t)package2->metadata.section_sizes[section]; - - if (is_package2_plaintext&& size != 0) { - memcpy(dst_start, src_start, size); - } else if (size != 0) { - package2_crypt_ctr(pk21_mkey_revision, dst_start, size, src_start, size, package2->metadata.section_ctrs[section], 0x10); - } - cur_section_offset += size; - } - - /* Clear the signature, to signal that this is a plaintext, unsigned package2. */ - memset(package2->signature, 0, sizeof(package2->signature)); -} - -static size_t package2_get_src_section(void **section, package2_header_t *package2, unsigned int id) { - uint8_t *data = package2->data; - for (unsigned int i = 0; i < id; i++) { - data += package2->metadata.section_sizes[i]; - } - - (*section) = data; - return package2->metadata.section_sizes[id]; -} - -static size_t package2_get_thermosphere(void **thermosphere) { - /*extern const uint8_t thermosphere_bin[]; - extern const uint32_t thermosphere_bin_size;*/ - /* TODO: enable when tested. */ - (*thermosphere) = NULL; - return 0; -} - -static ini1_header_t *package2_rebuild_ini1(ini1_header_t *ini1, uint32_t target_firmware, void *emummc, size_t emummc_size) { - /* TODO: Do we want to support loading another INI from sd:/whatever/INI1.bin? */ - ini1_header_t *inis_to_merge[STRATOSPHERE_INI1_MAX] = {0}; - ini1_header_t *merged; - - inis_to_merge[STRATOSPHERE_INI1_SDFILES] = stratosphere_get_sd_files_ini1(); - inis_to_merge[STRATOSPHERE_INI1_EMBEDDED] = stratosphere_get_ini1(target_firmware); - inis_to_merge[STRATOSPHERE_INI1_PACKAGE2] = ini1; - - /* Merge all of the INI1s. */ - merged = stratosphere_merge_inis(inis_to_merge, STRATOSPHERE_INI1_MAX, emummc, emummc_size); - - /* Free temporary buffer. */ - stratosphere_free_ini1(); - - return merged; -} - -static void package2_append_section(unsigned int id, package2_header_t *package2, void *data, size_t size) { - /* This function must be called in ascending order of id. */ - /* We assume that the loading address doesn't need to be changed. */ - uint8_t *dst = package2->data; - for (unsigned int i = 0; i < id; i++) { - dst += package2->metadata.section_sizes[i]; - } - - memcpy(dst, data, size); - package2->metadata.section_sizes[id] = align_to_4(size); -} - -static void package2_fixup_header_and_section_hashes(package2_header_t *package2, size_t size) { - uint8_t *data = package2->data; - - for (unsigned int section = 0; section < PACKAGE2_SECTION_MAX; section++) { - size_t sz = (size_t)package2->metadata.section_sizes[section]; - if (sz == 0) { - continue; - } - - /* Fix up the hash. */ - se_calculate_sha256(package2->metadata.section_hashes[section], data, sz); - data += sz; - } - - /* Fix up the size in XOR'd CTR. */ - uint32_t package_size = package2->metadata.ctr_dwords[0] ^ package2->metadata.ctr_dwords[2] ^ package2->metadata.ctr_dwords[3]; - package2->metadata.ctr_dwords[3] ^= (package_size ^ size); -} diff --git a/fusee/fusee-secondary/src/package2.h b/fusee/fusee-secondary/src/package2.h deleted file mode 100644 index 4347b41f1..000000000 --- a/fusee/fusee-secondary/src/package2.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PACKAGE2_H -#define FUSEE_PACKAGE2_H - -/* This is a library for patching Package2 prior to handoff to Exosphere. */ - -#define MAGIC_PK21 (0x31324B50) -#define PACKAGE2_SIZE_MAX 0x7FC000 - -#define PACKAGE2_SECTION_KERNEL 0x0 -#define PACKAGE2_SECTION_INI1 0x1 -#define PACKAGE2_SECTION_UNUSED 0x2 -#define PACKAGE2_SECTION_MAX 0x3 - -#define PACKAGE2_MINVER_THEORETICAL 0x0 -#define PACKAGE2_MAXVER_100 0x2 -#define PACKAGE2_MAXVER_200 0x3 -#define PACKAGE2_MAXVER_300 0x4 -#define PACKAGE2_MAXVER_302 0x5 -#define PACKAGE2_MAXVER_400_410 0x6 -#define PACKAGE2_MAXVER_500_510 0x7 -#define PACKAGE2_MAXVER_600_610 0x8 -#define PACKAGE2_MAXVER_620 0x9 -#define PACKAGE2_MAXVER_700_800 0xA -#define PACKAGE2_MAXVER_810 0xB -#define PACKAGE2_MAXVER_900 0xC -#define PACKAGE2_MAXVER_910_920 0xD -#define PACKAGE2_MAXVER_1000 0xE -#define PACKAGE2_MAXVER_1100 0xF -#define PACKAGE2_MAXVER_1202_CURRENT 0x10 - -#define PACKAGE2_MINVER_100 0x3 -#define PACKAGE2_MINVER_200 0x4 -#define PACKAGE2_MINVER_300 0x5 -#define PACKAGE2_MINVER_302 0x6 -#define PACKAGE2_MINVER_400_410 0x7 -#define PACKAGE2_MINVER_500_510 0x8 -#define PACKAGE2_MINVER_600_610 0x9 -#define PACKAGE2_MINVER_620 0xA -#define PACKAGE2_MINVER_700_800 0xB -#define PACKAGE2_MINVER_810 0xC -#define PACKAGE2_MINVER_900 0xD -#define PACKAGE2_MINVER_910_920 0xE -#define PACKAGE2_MINVER_1000 0xF -#define PACKAGE2_MINVER_1100 0x10 -#define PACKAGE2_MINVER_1202_CURRENT 0x11 - -#define NX_BOOTLOADER_PACKAGE2_LOAD_ADDRESS ((void *)(0xA9800000ull)) - -typedef struct { - union { - uint8_t ctr[0x10]; - uint32_t ctr_dwords[0x4]; - }; - uint8_t section_ctrs[4][0x10]; - uint32_t magic; - uint32_t entrypoint; - uint32_t _0x58; - uint8_t version_max; /* Must be > TZ value. */ - uint8_t version_min; /* Must be < TZ value. */ - uint16_t _0x5E; - uint32_t section_sizes[4]; - uint32_t section_offsets[4]; - uint8_t section_hashes[4][0x20]; -} package2_meta_t; - -typedef struct { - uint8_t signature[0x100]; - union { - package2_meta_t metadata; - uint8_t encrypted_header[0x100]; - }; - uint8_t data[]; -} package2_header_t; - -/* Package2 can be encrypted or unencrypted for these functions: */ - -static inline size_t package2_meta_get_size(const package2_meta_t *metadata) { - return metadata->ctr_dwords[0] ^ metadata->ctr_dwords[2] ^ metadata->ctr_dwords[3]; -} - -static inline uint8_t package2_meta_get_header_version(const package2_meta_t *metadata) { - return (uint8_t)((metadata->ctr_dwords[1] ^ (metadata->ctr_dwords[1] >> 16) ^ (metadata->ctr_dwords[1] >> 24)) & 0xFF); -} - -void package2_rebuild_and_copy(package2_header_t *package2, uint32_t target_firmware, void *mesosphere, size_t mesosphere_size, void *emummc, size_t emummc_size); - -#endif diff --git a/fusee/fusee-secondary/src/panic.c b/fusee/fusee-secondary/src/panic.c deleted file mode 100644 index 37c0a5a8e..000000000 --- a/fusee/fusee-secondary/src/panic.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "panic.h" -#include "di.h" -#include "pmc.h" -#include "fuse.h" -#include "utils.h" - -static uint32_t g_panic_code = 0; - -void check_and_display_panic(void) { - /* We also handle our own panics. */ - bool has_panic = ((APBDEV_PMC_RST_STATUS_0 != 0) || (g_panic_code != 0)); - uint32_t code = (g_panic_code == 0) ? APBDEV_PMC_SCRATCH200_0 : g_panic_code; - has_panic = has_panic && !((APBDEV_PMC_RST_STATUS_0 != 1) && (code == PANIC_CODE_SAFEMODE)); - - if (has_panic) { - uint32_t color; - - /* Check for predefined codes: */ - switch (code & MASK(20)) { - case 0x01: /* Package2 signature verification failed. */ - case 0x02: /* Package2 meta verification failed. */ - case 0x03: /* Package2 version check failed. */ - case 0x04: /* Package2 payload verification failed. */ - color = PANIC_COLOR_KERNEL; - break; - case 0x05: /* Unknown SMC. */ - case 0x06: /* Unknown Abort. */ - color = PANIC_COLOR_SECMON_GENERIC; - break; - case 0x07: /* Invalid CPU context. */ - case 0x08: /* Invalid SE state. */ - case 0x09: /* CPU is already awake (2.0.0+). */ - color = PANIC_COLOR_SECMON_DEEPSLEEP; - break; - case 0x10: /* Unknown exception. */ - color = PANIC_COLOR_SECMON_EXCEPTION; - break; - case 0x30: /* General bootloader error. */ - case 0x31: /* Invalid DRAM ID. */ - case 0x32: /* Invalid size. */ - case 0x33: /* Invalid arguement. */ - case 0x34: /* Bad GPT. */ - case 0x35: /* Failed to boot SafeMode. */ - case 0x36: /* Activity monitor fired (4.0.0+). */ - color = PANIC_COLOR_BOOTLOADER_GENERIC; - break; - case 0x40: /* Kernel panic. */ - color = PANIC_COLOR_KERNEL; - break; - default: - color = code >> 20; - color |= color << 4; - break; - } - - /* Initialize the display. */ - display_init(); - - /* Fill the screen. */ - display_color_screen(color); - - /* Wait for button and reboot. */ - wait_for_button_and_reboot(); - } else { - g_panic_code = 0; - APBDEV_PMC_SCRATCH200_0 = 0; - } -} - -__attribute__ ((noreturn)) void panic(uint32_t code) { - /* Set panic code. */ - if (g_panic_code == 0) { - g_panic_code = code; - APBDEV_PMC_SCRATCH200_0 = code; - } - - fuse_disable_programming(); - APBDEV_PMC_CRYPTO_OP_0 = 1; /* Disable all SE operations. */ - - check_and_display_panic(); - while(true); -} diff --git a/fusee/fusee-secondary/src/panic.h b/fusee/fusee-secondary/src/panic.h deleted file mode 100644 index 3aedac4bf..000000000 --- a/fusee/fusee-secondary/src/panic.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PANIC_H -#define FUSEE_PANIC_H - -#include - -#define PANIC_COLOR_KERNEL 0x0000FF -#define PANIC_COLOR_SECMON_EXCEPTION 0xFF7700 -#define PANIC_COLOR_SECMON_GENERIC 0x00FFFF -#define PANIC_COLOR_SECMON_DEEPSLEEP 0xFF77FF /* 4.0+ color */ -#define PANIC_COLOR_BOOTLOADER_GENERIC 0xAA00FF -#define PANIC_COLOR_BOOTLOADER_SAFEMODE 0xFFFFAA /* Removed */ - -#define PANIC_CODE_SAFEMODE 0x00000020 - -void check_and_display_panic(void); -__attribute__ ((noreturn)) void panic(uint32_t code); - -#endif diff --git a/fusee/fusee-secondary/src/panic_color.h b/fusee/fusee-secondary/src/panic_color.h deleted file mode 100644 index 6bdac8f78..000000000 --- a/fusee/fusee-secondary/src/panic_color.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PANIC_COLOR_H -#define FUSEE_PANIC_COLOR_H - -#define COLOR_0 0x00F00003 -#define COLOR_1 0x0F000003 -#define COLOR_2 0xF0000003 -#define COLOR_3 0x0FF00003 -#define COLOR_4 0xF0F00003 -#define COLOR_5 0xFF000003 -#define COLOR_6 0xFFF00003 -#define COLOR_7 0xAAF00003 -#define COLOR_8 0xAFA00003 -#define COLOR_9 0xFAA00003 -#define COLOR_A 0x33300003 -#define COLOR_B 0x06F00003 -#define COLOR_C 0x14800003 -#define COLOR_D 0x00300003 -#define COLOR_E 0x03000003 -#define COLOR_F 0xB6000003 - -#define PANIC_REBOOT 0x20 - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/pinmux.h b/fusee/fusee-secondary/src/pinmux.h deleted file mode 100644 index 616e90262..000000000 --- a/fusee/fusee-secondary/src/pinmux.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PINMUX_H -#define FUSEE_PINMUX_H - -#define PINMUX_BASE 0x70003000 -#define MAKE_PINMUX_REG(n) MAKE_REG32(PINMUX_BASE + n) - -#define PINMUX_TRISTATE (1 << 4) -#define PINMUX_PARKED (1 << 5) -#define PINMUX_INPUT (1 << 6) -#define PINMUX_PULL_NONE (0 << 2) -#define PINMUX_PULL_DOWN (1 << 2) -#define PINMUX_PULL_UP (2 << 2) -#define PINMUX_SELECT_FUNCTION0 0 -#define PINMUX_SELECT_FUNCTION1 1 -#define PINMUX_SELECT_FUNCTION2 2 -#define PINMUX_SELECT_FUNCTION3 3 -#define PINMUX_DRIVE_1X (0 << 13) -#define PINMUX_DRIVE_2X (1 << 13) -#define PINMUX_DRIVE_3X (2 << 13) -#define PINMUX_DRIVE_4X (3 << 13) - -typedef struct { - uint32_t sdmmc1_clk; - uint32_t sdmmc1_cmd; - uint32_t sdmmc1_dat3; - uint32_t sdmmc1_dat2; - uint32_t sdmmc1_dat1; - uint32_t sdmmc1_dat0; - uint32_t _r18; - uint32_t sdmmc3_clk; - uint32_t sdmmc3_cmd; - uint32_t sdmmc3_dat0; - uint32_t sdmmc3_dat1; - uint32_t sdmmc3_dat2; - uint32_t sdmmc3_dat3; - uint32_t _r34; - uint32_t pex_l0_rst_n; - uint32_t pex_l0_clkreq_n; - uint32_t pex_wake_n; - uint32_t pex_l1_rst_n; - uint32_t pex_l1_clkreq_n; - uint32_t sata_led_active; - uint32_t spi1_mosi; - uint32_t spi1_miso; - uint32_t spi1_sck; - uint32_t spi1_cs0; - uint32_t spi1_cs1; - uint32_t spi2_mosi; - uint32_t spi2_miso; - uint32_t spi2_sck; - uint32_t spi2_cs0; - uint32_t spi2_cs1; - uint32_t spi4_mosi; - uint32_t spi4_miso; - uint32_t spi4_sck; - uint32_t spi4_cs0; - uint32_t qspi_sck; - uint32_t qspi_cs_n; - uint32_t qspi_io0; - uint32_t qspi_io1; - uint32_t qspi_io2; - uint32_t qspi_io3; - uint32_t _ra0; - uint32_t dmic1_clk; - uint32_t dmic1_dat; - uint32_t dmic2_clk; - uint32_t dmic2_dat; - uint32_t dmic3_clk; - uint32_t dmic3_dat; - uint32_t gen1_i2c_scl; - uint32_t gen1_i2c_sda; - uint32_t gen2_i2c_scl; - uint32_t gen2_i2c_sda; - uint32_t gen3_i2c_scl; - uint32_t gen3_i2c_sda; - uint32_t cam_i2c_scl; - uint32_t cam_i2c_sda; - uint32_t pwr_i2c_scl; - uint32_t pwr_i2c_sda; - uint32_t uart1_tx; - uint32_t uart1_rx; - uint32_t uart1_rts; - uint32_t uart1_cts; - uint32_t uart2_tx; - uint32_t uart2_rx; - uint32_t uart2_rts; - uint32_t uart2_cts; - uint32_t uart3_tx; - uint32_t uart3_rx; - uint32_t uart3_rts; - uint32_t uart3_cts; - uint32_t uart4_tx; - uint32_t uart4_rx; - uint32_t uart4_rts; - uint32_t uart4_cts; - uint32_t dap1_fs; - uint32_t dap1_din; - uint32_t dap1_dout; - uint32_t dap1_sclk; - uint32_t dap2_fs; - uint32_t dap2_din; - uint32_t dap2_dout; - uint32_t dap2_sclk; - uint32_t dap4_fs; - uint32_t dap4_din; - uint32_t dap4_dout; - uint32_t dap4_sclk; - uint32_t cam1_mclk; - uint32_t cam2_mclk; - uint32_t jtag_rtck; - uint32_t clk_32k_in; - uint32_t clk_32k_out; - uint32_t batt_bcl; - uint32_t clk_req; - uint32_t cpu_pwr_req; - uint32_t pwr_int_n; - uint32_t shutdown; - uint32_t core_pwr_req; - uint32_t aud_mclk; - uint32_t dvfs_pwm; - uint32_t dvfs_clk; - uint32_t gpio_x1_aud; - uint32_t gpio_x3_aud; - uint32_t pcc7; - uint32_t hdmi_cec; - uint32_t hdmi_int_dp_hpd; - uint32_t spdif_out; - uint32_t spdif_in; - uint32_t usb_vbus_en0; - uint32_t usb_vbus_en1; - uint32_t dp_hpd0; - uint32_t wifi_en; - uint32_t wifi_rst; - uint32_t wifi_wake_ap; - uint32_t ap_wake_bt; - uint32_t bt_rst; - uint32_t bt_wake_ap; - uint32_t ap_wake_nfc; - uint32_t nfc_en; - uint32_t nfc_int; - uint32_t gps_en; - uint32_t gps_rst; - uint32_t cam_rst; - uint32_t cam_af_en; - uint32_t cam_flash_en; - uint32_t cam1_pwdn; - uint32_t cam2_pwdn; - uint32_t cam1_strobe; - uint32_t lcd_te; - uint32_t lcd_bl_pwm; - uint32_t lcd_bl_en; - uint32_t lcd_rst; - uint32_t lcd_gpio1; - uint32_t lcd_gpio2; - uint32_t ap_ready; - uint32_t touch_rst; - uint32_t touch_clk; - uint32_t modem_wake_ap; - uint32_t touch_int; - uint32_t motion_int; - uint32_t als_prox_int; - uint32_t temp_alert; - uint32_t button_power_on; - uint32_t button_vol_up; - uint32_t button_vol_down; - uint32_t button_slide_sw; - uint32_t button_home; - uint32_t pa6; - uint32_t pe6; - uint32_t pe7; - uint32_t ph6; - uint32_t pk0; - uint32_t pk1; - uint32_t pk2; - uint32_t pk3; - uint32_t pk4; - uint32_t pk5; - uint32_t pk6; - uint32_t pk7; - uint32_t pl0; - uint32_t pl1; - uint32_t pz0; - uint32_t pz1; - uint32_t pz2; - uint32_t pz3; - uint32_t pz4; - uint32_t pz5; -} tegra_pinmux_t; - -static inline volatile tegra_pinmux_t *pinmux_get_regs(void) -{ - return (volatile tegra_pinmux_t *)PINMUX_BASE; -} - -#endif diff --git a/fusee/fusee-secondary/src/pmc.h b/fusee/fusee-secondary/src/pmc.h deleted file mode 100644 index a287d85e7..000000000 --- a/fusee/fusee-secondary/src/pmc.h +++ /dev/null @@ -1,713 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_PMC_H -#define FUSEE_PMC_H - -#include - -#define PMC_BASE 0x7000E400 -#define MAKE_PMC_REG(n) MAKE_REG32(PMC_BASE + n) - -#define PMC_CONTROL_SDMMC1 (1 << 12) -#define PMC_CONTROL_SDMMC3 (1 << 13) -#define PMC_CONTROL_SDMMC4 (1 << 14) - -#define APBDEV_PMC_CONTROL MAKE_PMC_REG(0x00) -#define APBDEV_PM_0 MAKE_PMC_REG(0x14) -#define APBDEV_PMC_DPD_ENABLE_0 MAKE_PMC_REG(0x24) -#define APBDEV_PMC_PWRGATE_TOGGLE_0 MAKE_PMC_REG(0x30) -#define APBDEV_PMC_PWRGATE_STATUS_0 MAKE_PMC_REG(0x38) -#define APBDEV_PMC_NO_IOPOWER_0 MAKE_PMC_REG(0x44) -#define APBDEV_PMC_SCRATCH0_0 MAKE_PMC_REG(0x50) -#define APBDEV_PMC_SCRATCH1_0 MAKE_PMC_REG(0x54) -#define APBDEV_PMC_SCRATCH20_0 MAKE_PMC_REG(0xA0) -#define APBDEV_PMC_PWR_DET_VAL_0 MAKE_PMC_REG(0xE4) -#define APBDEV_PMC_DDR_PWR_0 MAKE_PMC_REG(0xE8) -#define APBDEV_PMC_CRYPTO_OP_0 MAKE_PMC_REG(0xF4) -#define APBDEV_PMC_WAKE2_STATUS_0 MAKE_PMC_REG(0x168) -#define APBDEV_PMC_OSC_EDPD_OVER_0 MAKE_PMC_REG(0x1A4) -#define APBDEV_PMC_RST_STATUS_0 MAKE_PMC_REG(0x1B4) -#define APBDEV_PMC_IO_DPD_REQ_0 MAKE_PMC_REG(0x1B8) -#define APBDEV_PMC_IO_DPD2_REQ_0 MAKE_PMC_REG(0x1C0) -#define APBDEV_PMC_VDDP_SEL_0 MAKE_PMC_REG(0x1CC) -#define APBDEV_PMC_SCRATCH49_0 MAKE_PMC_REG(0x244) -#define APBDEV_PMC_TSC_MULT_0 MAKE_PMC_REG(0x2B4) -#define APBDEV_PMC_REG_SHORT_0 MAKE_PMC_REG(0x2CC) -#define APBDEV_PMC_WEAK_BIAS_0 MAKE_PMC_REG(0x2C8) -#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334) -#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360) -#define APBDEV_PMC_SECURE_SCRATCH49_0 MAKE_PMC_REG(0x3A4) -#define APBDEV_PMC_CNTRL2_0 MAKE_PMC_REG(0x440) -#define APBDEV_PMC_IO_DPD4_REQ_0 MAKE_PMC_REG(0x464) -#define APBDEV_PMC_UTMIP_PAD_CFG1_0 MAKE_PMC_REG(0x4C4) -#define APBDEV_PMC_UTMIP_PAD_CFG3_0 MAKE_PMC_REG(0x4CC) -#define APBDEV_PMC_DDR_CNTRL_0 MAKE_PMC_REG(0x4E4) -#define APBDEV_PMC_SCRATCH43_0 MAKE_PMC_REG(0x22C) -#define APBDEV_PMC_SCRATCH188_0 MAKE_PMC_REG(0x810) -#define APBDEV_PMC_SCRATCH190_0 MAKE_PMC_REG(0x818) -#define APBDEV_PMC_SCRATCH200_0 MAKE_PMC_REG(0x840) - -#define APBDEV_PMC_SCRATCH45_0 MAKE_PMC_REG(0x234) -#define APBDEV_PMC_SCRATCH46_0 MAKE_PMC_REG(0x238) -#define APBDEV_PMC_SCRATCH33_0 MAKE_PMC_REG(0x120) -#define APBDEV_PMC_SCRATCH40_0 MAKE_PMC_REG(0x13C) - -/* Power Management Controller (APBDEV_PMC_) regs */ -typedef struct { - uint32_t cntrl; /* _CNTRL_0, 0x00 */ - uint32_t sec_disable; /* _SEC_DISABLE_0, 0x04 */ - uint32_t pmc_swrst; /* _PMC_SWRST_0, 0x08 */ - uint32_t wake_mask; /* _WAKE_MASK_0, 0x0c */ - uint32_t wake_lvl; /* _WAKE_LVL_0, 0x10 */ - uint32_t wake_status; /* _WAKE_STATUS_0, 0x14 */ - uint32_t sw_wake_status; /* _SW_WAKE_STATUS_0, 0x18 */ - uint32_t dpd_pads_oride; /* _DPD_PADS_ORIDE_0, 0x1c */ - uint32_t dpd_sample; /* _DPD_SAMPLE_0, 0x20 */ - uint32_t dpd_enable; /* _DPD_ENABLE_0, 0x24 */ - uint32_t pwrgate_timer_off; /* _PWRGATE_TIMER_OFF_0, 0x28 */ - uint32_t clamp_status; /* _CLAMP_STATUS_0, 0x2c */ - uint32_t pwrgate_toggle; /* _PWRGATE_TOGGLE_0, 0x30 */ - uint32_t remove_clamping; /* _REMOVE_CLAMPING_0, 0x34 */ - uint32_t pwrgate_status; /* _PWRGATE_STATUS_0, 0x38 */ - uint32_t pwrgood_timer; /* _PWRGOOD_TIMER_0, 0x3c */ - uint32_t blink_timer; /* _BLINK_TIMER_0, 0x40 */ - uint32_t no_iopower; /* _NO_IOPOWER_0, 0x44 */ - uint32_t pwr_det; /* _PWR_DET_0, 0x48 */ - uint32_t pwr_det_latch; /* _PWR_DET_LATCH_0, 0x4c */ - uint32_t scratch0; /* _SCRATCH0_0, 0x50 */ - uint32_t scratch1; /* _SCRATCH1_0, 0x54 */ - uint32_t scratch2; /* _SCRATCH2_0, 0x58 */ - uint32_t scratch3; /* _SCRATCH3_0, 0x5c */ - uint32_t scratch4; /* _SCRATCH4_0, 0x60 */ - uint32_t scratch5; /* _SCRATCH5_0, 0x64 */ - uint32_t scratch6; /* _SCRATCH6_0, 0x68 */ - uint32_t scratch7; /* _SCRATCH7_0, 0x6c */ - uint32_t scratch8; /* _SCRATCH8_0, 0x70 */ - uint32_t scratch9; /* _SCRATCH9_0, 0x74 */ - uint32_t scratch10; /* _SCRATCH10_0, 0x78 */ - uint32_t scratch11; /* _SCRATCH11_0, 0x7c */ - uint32_t scratch12; /* _SCRATCH12_0, 0x80 */ - uint32_t scratch13; /* _SCRATCH13_0, 0x84 */ - uint32_t scratch14; /* _SCRATCH14_0, 0x88 */ - uint32_t scratch15; /* _SCRATCH15_0, 0x8c */ - uint32_t scratch16; /* _SCRATCH16_0, 0x90 */ - uint32_t scratch17; /* _SCRATCH17_0, 0x94 */ - uint32_t scratch18; /* _SCRATCH18_0, 0x98 */ - uint32_t scratch19; /* _SCRATCH19_0, 0x9c */ - uint32_t scratch20; /* _SCRATCH20_0, 0xa0 */ - uint32_t scratch21; /* _SCRATCH21_0, 0xa4 */ - uint32_t scratch22; /* _SCRATCH22_0, 0xa8 */ - uint32_t scratch23; /* _SCRATCH23_0, 0xac */ - uint32_t secure_scratch0; /* _SECURE_SCRATCH0_0, 0xb0 */ - uint32_t secure_scratch1; /* _SECURE_SCRATCH1_0, 0xb4 */ - uint32_t secure_scratch2; /* _SECURE_SCRATCH2_0, 0xb8 */ - uint32_t secure_scratch3; /* _SECURE_SCRATCH3_0, 0xbc */ - uint32_t secure_scratch4; /* _SECURE_SCRATCH4_0, 0xc0 */ - uint32_t secure_scratch5; /* _SECURE_SCRATCH5_0, 0xc4 */ - uint32_t cpupwrgood_timer; /* _CPUPWRGOOD_TIMER_0, 0xc8 */ - uint32_t cpupwroff_timer; /* _CPUPWROFF_TIMER_0, 0xcc */ - uint32_t pg_mask; /* _PG_MASK_0, 0xd0 */ - uint32_t pg_mask_1; /* _PG_MASK_1_0, 0xd4 */ - uint32_t auto_wake_lvl; /* _AUTO_WAKE_LVL_0, 0xd8 */ - uint32_t auto_wake_lvl_mask; /* _AUTO_WAKE_LVL_MASK_0, 0xdc */ - uint32_t wake_delay; /* _WAKE_DELAY_0, 0xe0 */ - uint32_t pwr_det_val; /* _PWR_DET_VAL_0, 0xe4 */ - uint32_t ddr_pwr; /* _DDR_PWR_0, 0xe8 */ - uint32_t usb_debounce_del; /* _USB_DEBOUNCE_DEL_0, 0xec */ - uint32_t usb_ao; /* _USB_AO_0, 0xf0 */ - uint32_t crypto_op; /* _CRYPTO_OP_0, 0xf4 */ - uint32_t pllp_wb0_override; /* _PLLP_WB0_OVERRIDE_0, 0xf8 */ - uint32_t scratch24; /* _SCRATCH24_0, 0xfc */ - uint32_t scratch25; /* _SCRATCH25_0, 0x100 */ - uint32_t scratch26; /* _SCRATCH26_0, 0x104 */ - uint32_t scratch27; /* _SCRATCH27_0, 0x108 */ - uint32_t scratch28; /* _SCRATCH28_0, 0x10c */ - uint32_t scratch29; /* _SCRATCH29_0, 0x110 */ - uint32_t scratch30; /* _SCRATCH30_0, 0x114 */ - uint32_t scratch31; /* _SCRATCH31_0, 0x118 */ - uint32_t scratch32; /* _SCRATCH32_0, 0x11c */ - uint32_t scratch33; /* _SCRATCH33_0, 0x120 */ - uint32_t scratch34; /* _SCRATCH34_0, 0x124 */ - uint32_t scratch35; /* _SCRATCH35_0, 0x128 */ - uint32_t scratch36; /* _SCRATCH36_0, 0x12c */ - uint32_t scratch37; /* _SCRATCH37_0, 0x130 */ - uint32_t scratch38; /* _SCRATCH38_0, 0x134 */ - uint32_t scratch39; /* _SCRATCH39_0, 0x138 */ - uint32_t scratch40; /* _SCRATCH40_0, 0x13c */ - uint32_t scratch41; /* _SCRATCH41_0, 0x140 */ - uint32_t scratch42; /* _SCRATCH42_0, 0x144 */ - uint32_t bondout_mirror0; /* _BONDOUT_MIRROR0_0, 0x148 */ - uint32_t bondout_mirror1; /* _BONDOUT_MIRROR1_0, 0x14c */ - uint32_t bondout_mirror2; /* _BONDOUT_MIRROR2_0, 0x150 */ - uint32_t sys_33v_en; /* _SYS_33V_EN_0, 0x154 */ - uint32_t bondout_mirror_access; /* _BONDOUT_MIRROR_ACCESS_0, 0x158 */ - uint32_t gate; /* _GATE_0, 0x15c */ - uint32_t wake2_mask; /* _WAKE2_MASK_0, 0x160 */ - uint32_t wake2_lvl; /* _WAKE2_LVL_0, 0x164 */ - uint32_t wake2_status; /* _WAKE2_STATUS_0, 0x168 */ - uint32_t sw_wake2_status; /* _SW_WAKE2_STATUS_0, 0x16c */ - uint32_t auto_wake2_lvl_mask; /* _AUTO_WAKE2_LVL_MASK_0, 0x170 */ - uint32_t pg_mask_2; /* _PG_MASK_2_0, 0x174 */ - uint32_t pg_mask_ce1; /* _PG_MASK_CE1_0, 0x178 */ - uint32_t pg_mask_ce2; /* _PG_MASK_CE2_0, 0x17c */ - uint32_t pg_mask_ce3; /* _PG_MASK_CE3_0, 0x180 */ - uint32_t pwrgate_timer_ce_0; /* _PWRGATE_TIMER_CE_0_0, 0x184 */ - uint32_t pwrgate_timer_ce_1; /* _PWRGATE_TIMER_CE_1_0, 0x188 */ - uint32_t pwrgate_timer_ce_2; /* _PWRGATE_TIMER_CE_2_0, 0x18c */ - uint32_t pwrgate_timer_ce_3; /* _PWRGATE_TIMER_CE_3_0, 0x190 */ - uint32_t pwrgate_timer_ce_4; /* _PWRGATE_TIMER_CE_4_0, 0x194 */ - uint32_t pwrgate_timer_ce_5; /* _PWRGATE_TIMER_CE_5_0, 0x198 */ - uint32_t pwrgate_timer_ce_6; /* _PWRGATE_TIMER_CE_6_0, 0x19c */ - uint32_t pcx_edpd_cntrl; /* _PCX_EDPD_CNTRL_0, 0x1a0 */ - uint32_t osc_edpd_over; /* _OSC_EDPD_OVER_0, 0x1a4 */ - uint32_t clk_out_cntrl; /* _CLK_OUT_CNTRL_0, 0x1a8 */ - uint32_t sata_pwrgt; /* _SATA_PWRGT_0, 0x1ac */ - uint32_t sensor_ctrl; /* _SENSOR_CTRL_0, 0x1b0 */ - uint32_t rst_status; /* _RST_STATUS_0, 0x1b4 */ - uint32_t io_dpd_req; /* _IO_DPD_REQ_0, 0x1b8 */ - uint32_t io_dpd_status; /* _IO_DPD_STATUS_0, 0x1bc */ - uint32_t io_dpd2_req; /* _IO_DPD2_REQ_0, 0x1c0 */ - uint32_t io_dpd2_status; /* _IO_DPD2_STATUS_0, 0x1c4 */ - uint32_t sel_dpd_tim; /* _SEL_DPD_TIM_0, 0x1c8 */ - uint32_t vddp_sel; /* _VDDP_SEL_0, 0x1cc */ - uint32_t ddr_cfg; /* _DDR_CFG_0, 0x1d0 */ - uint32_t _0x1d4[2]; - uint32_t pllm_wb0_override_freq; /* _PLLM_WB0_OVERRIDE_FREQ_0, 0x1dc */ - uint32_t _0x1e0; - uint32_t pwrgate_timer_mult; /* _PWRGATE_TIMER_MULT_0, 0x1e4 */ - uint32_t dsi_sel_dpd; /* _DSI_SEL_DPD_0, 0x1e8 */ - uint32_t utmip_uhsic_triggers; /* _UTMIP_UHSIC_TRIGGERS_0, 0x1ec */ - uint32_t utmip_uhsic_saved_state; /* _UTMIP_UHSIC_SAVED_STATE_0, 0x1f0 */ - uint32_t _0x1f4; - uint32_t utmip_term_pad_cfg; /* _UTMIP_TERM_PAD_CFG_0, 0x1f8 */ - uint32_t utmip_uhsic_sleep_cfg; /* _UTMIP_UHSIC_SLEEP_CFG_0, 0x1fc */ - uint32_t utmip_uhsic_sleepwalk_cfg; /* _UTMIP_UHSIC_SLEEPWALK_CFG_0, 0x200 */ - uint32_t utmip_sleepwalk_p0; /* _UTMIP_SLEEPWALK_P0_0, 0x204 */ - uint32_t utmip_sleepwalk_p1; /* _UTMIP_SLEEPWALK_P1_0, 0x208 */ - uint32_t utmip_sleepwalk_p2; /* _UTMIP_SLEEPWALK_P2_0, 0x20c */ - uint32_t uhsic_sleepwalk_p0; /* _UHSIC_SLEEPWALK_P0_0, 0x210 */ - uint32_t utmip_uhsic_status; /* _UTMIP_UHSIC_STATUS_0, 0x214 */ - uint32_t utmip_uhsic_fake; /* _UTMIP_UHSIC_FAKE_0, 0x218 */ - uint32_t bondout_mirror3; /* _BONDOUT_MIRROR3_0, 0x21c */ - uint32_t bondout_mirror4; /* _BONDOUT_MIRROR4_0, 0x220 */ - uint32_t secure_scratch6; /* _SECURE_SCRATCH6_0, 0x224 */ - uint32_t secure_scratch7; /* _SECURE_SCRATCH7_0, 0x228 */ - uint32_t scratch43; /* _SCRATCH43_0, 0x22c */ - uint32_t scratch44; /* _SCRATCH44_0, 0x230 */ - uint32_t scratch45; /* _SCRATCH45_0, 0x234 */ - uint32_t scratch46; /* _SCRATCH46_0, 0x238 */ - uint32_t scratch47; /* _SCRATCH47_0, 0x23c */ - uint32_t scratch48; /* _SCRATCH48_0, 0x240 */ - uint32_t scratch49; /* _SCRATCH49_0, 0x244 */ - uint32_t scratch50; /* _SCRATCH50_0, 0x248 */ - uint32_t scratch51; /* _SCRATCH51_0, 0x24c */ - uint32_t scratch52; /* _SCRATCH52_0, 0x250 */ - uint32_t scratch53; /* _SCRATCH53_0, 0x254 */ - uint32_t scratch54; /* _SCRATCH54_0, 0x258 */ - uint32_t scratch55; /* _SCRATCH55_0, 0x25c */ - uint32_t scratch0_eco; /* _SCRATCH0_ECO_0, 0x260 */ - uint32_t por_dpd_ctrl; /* _POR_DPD_CTRL_0, 0x264 */ - uint32_t scratch2_eco; /* _SCRATCH2_ECO_0, 0x268 */ - uint32_t utmip_uhsic_line_wakeup; /* _UTMIP_UHSIC_LINE_WAKEUP_0, 0x26c */ - uint32_t utmip_bias_master_cntrl; /* _UTMIP_BIAS_MASTER_CNTRL_0, 0x270 */ - uint32_t utmip_master_config; /* _UTMIP_MASTER_CONFIG_0, 0x274 */ - uint32_t td_pwrgate_inter_part_timer; /* _TD_PWRGATE_INTER_PART_TIMER_0, 0x278 */ - uint32_t utmip_uhsic2_triggers; /* _UTMIP_UHSIC2_TRIGGERS_0, 0x27c */ - uint32_t utmip_uhsic2_saved_state; /* _UTMIP_UHSIC2_SAVED_STATE_0, 0x280 */ - uint32_t utmip_uhsic2_sleep_cfg; /* _UTMIP_UHSIC2_SLEEP_CFG_0, 0x284 */ - uint32_t utmip_uhsic2_sleepwalk_cfg; /* _UTMIP_UHSIC2_SLEEPWALK_CFG_0, 0x288 */ - uint32_t uhsic2_sleepwalk_p1; /* _UHSIC2_SLEEPWALK_P1_0, 0x28c */ - uint32_t utmip_uhsic2_status; /* _UTMIP_UHSIC2_STATUS_0, 0x290 */ - uint32_t utmip_uhsic2_fake; /* _UTMIP_UHSIC2_FAKE_0, 0x294 */ - uint32_t utmip_uhsic2_line_wakeup; /* _UTMIP_UHSIC2_LINE_WAKEUP_0, 0x298 */ - uint32_t utmip_master2_config; /* _UTMIP_MASTER2_CONFIG_0, 0x29c */ - uint32_t utmip_uhsic_rpd_cfg; /* _UTMIP_UHSIC_RPD_CFG_0, 0x2a0 */ - uint32_t pg_mask_ce0; /* _PG_MASK_CE0_0, 0x2a4 */ - uint32_t pg_mask_3; /* _PG_MASK_3_0, 0x2a8 */ - uint32_t pg_mask_4; /* _PG_MASK_4_0, 0x2ac */ - uint32_t pllm_wb0_override2; /* _PLLM_WB0_OVERRIDE2_0, 0x2b0 */ - uint32_t tsc_mult; /* _TSC_MULT_0, 0x2b4 */ - uint32_t cpu_vsense_override; /* _CPU_VSENSE_OVERRIDE_0, 0x2b8 */ - uint32_t glb_amap_cfg; /* _GLB_AMAP_CFG_0, 0x2bc */ - uint32_t sticky_bits; /* _STICKY_BITS_0, 0x2c0 */ - uint32_t sec_disable2; /* _SEC_DISABLE2_0, 0x2c4 */ - uint32_t weak_bias; /* _WEAK_BIAS_0, 0x2c8 */ - uint32_t reg_short; /* _REG_SHORT_0, 0x2cc */ - uint32_t pg_mask_andor; /* _PG_MASK_ANDOR_0, 0x2d0 */ - uint32_t gpu_rg_cntrl; /* _GPU_RG_CNTRL_0, 0x2d4 */ - uint32_t sec_disable3; /* _SEC_DISABLE3_0, 0x2d8 */ - uint32_t pg_mask_5; /* _PG_MASK_5_0, 0x2dc */ - uint32_t pg_mask_6; /* _PG_MASK_6_0, 0x2e0 */ - uint32_t _0x2e4[7]; - uint32_t secure_scratch8; /* _SECURE_SCRATCH8_0, 0x300 */ - uint32_t secure_scratch9; /* _SECURE_SCRATCH9_0, 0x304 */ - uint32_t secure_scratch10; /* _SECURE_SCRATCH10_0, 0x308 */ - uint32_t secure_scratch11; /* _SECURE_SCRATCH11_0, 0x30c */ - uint32_t secure_scratch12; /* _SECURE_SCRATCH12_0, 0x310 */ - uint32_t secure_scratch13; /* _SECURE_SCRATCH13_0, 0x314 */ - uint32_t secure_scratch14; /* _SECURE_SCRATCH14_0, 0x318 */ - uint32_t secure_scratch15; /* _SECURE_SCRATCH15_0, 0x31c */ - uint32_t secure_scratch16; /* _SECURE_SCRATCH16_0, 0x320 */ - uint32_t secure_scratch17; /* _SECURE_SCRATCH17_0, 0x324 */ - uint32_t secure_scratch18; /* _SECURE_SCRATCH18_0, 0x328 */ - uint32_t secure_scratch19; /* _SECURE_SCRATCH19_0, 0x32c */ - uint32_t secure_scratch20; /* _SECURE_SCRATCH20_0, 0x330 */ - uint32_t secure_scratch21; /* _SECURE_SCRATCH21_0, 0x334 */ - uint32_t secure_scratch22; /* _SECURE_SCRATCH22_0, 0x338 */ - uint32_t secure_scratch23; /* _SECURE_SCRATCH23_0, 0x33c */ - uint32_t secure_scratch24; /* _SECURE_SCRATCH24_0, 0x340 */ - uint32_t secure_scratch25; /* _SECURE_SCRATCH25_0, 0x344 */ - uint32_t secure_scratch26; /* _SECURE_SCRATCH26_0, 0x348 */ - uint32_t secure_scratch27; /* _SECURE_SCRATCH27_0, 0x34c */ - uint32_t secure_scratch28; /* _SECURE_SCRATCH28_0, 0x350 */ - uint32_t secure_scratch29; /* _SECURE_SCRATCH29_0, 0x354 */ - uint32_t secure_scratch30; /* _SECURE_SCRATCH30_0, 0x358 */ - uint32_t secure_scratch31; /* _SECURE_SCRATCH31_0, 0x35c */ - uint32_t secure_scratch32; /* _SECURE_SCRATCH32_0, 0x360 */ - uint32_t secure_scratch33; /* _SECURE_SCRATCH33_0, 0x364 */ - uint32_t secure_scratch34; /* _SECURE_SCRATCH34_0, 0x368 */ - uint32_t secure_scratch35; /* _SECURE_SCRATCH35_0, 0x36c */ - uint32_t secure_scratch36; /* _SECURE_SCRATCH36_0, 0x370 */ - uint32_t secure_scratch37; /* _SECURE_SCRATCH37_0, 0x374 */ - uint32_t secure_scratch38; /* _SECURE_SCRATCH38_0, 0x378 */ - uint32_t secure_scratch39; /* _SECURE_SCRATCH39_0, 0x37c */ - uint32_t secure_scratch40; /* _SECURE_SCRATCH40_0, 0x380 */ - uint32_t secure_scratch41; /* _SECURE_SCRATCH41_0, 0x384 */ - uint32_t secure_scratch42; /* _SECURE_SCRATCH42_0, 0x388 */ - uint32_t secure_scratch43; /* _SECURE_SCRATCH43_0, 0x38c */ - uint32_t secure_scratch44; /* _SECURE_SCRATCH44_0, 0x390 */ - uint32_t secure_scratch45; /* _SECURE_SCRATCH45_0, 0x394 */ - uint32_t secure_scratch46; /* _SECURE_SCRATCH46_0, 0x398 */ - uint32_t secure_scratch47; /* _SECURE_SCRATCH47_0, 0x39c */ - uint32_t secure_scratch48; /* _SECURE_SCRATCH48_0, 0x3a0 */ - uint32_t secure_scratch49; /* _SECURE_SCRATCH49_0, 0x3a4 */ - uint32_t secure_scratch50; /* _SECURE_SCRATCH50_0, 0x3a8 */ - uint32_t secure_scratch51; /* _SECURE_SCRATCH51_0, 0x3ac */ - uint32_t secure_scratch52; /* _SECURE_SCRATCH52_0, 0x3b0 */ - uint32_t secure_scratch53; /* _SECURE_SCRATCH53_0, 0x3b4 */ - uint32_t secure_scratch54; /* _SECURE_SCRATCH54_0, 0x3b8 */ - uint32_t secure_scratch55; /* _SECURE_SCRATCH55_0, 0x3bc */ - uint32_t secure_scratch56; /* _SECURE_SCRATCH56_0, 0x3c0 */ - uint32_t secure_scratch57; /* _SECURE_SCRATCH57_0, 0x3c4 */ - uint32_t secure_scratch58; /* _SECURE_SCRATCH58_0, 0x3c8 */ - uint32_t secure_scratch59; /* _SECURE_SCRATCH59_0, 0x3cc */ - uint32_t secure_scratch60; /* _SECURE_SCRATCH60_0, 0x3d0 */ - uint32_t secure_scratch61; /* _SECURE_SCRATCH61_0, 0x3d4 */ - uint32_t secure_scratch62; /* _SECURE_SCRATCH62_0, 0x3d8 */ - uint32_t secure_scratch63; /* _SECURE_SCRATCH63_0, 0x3dc */ - uint32_t secure_scratch64; /* _SECURE_SCRATCH64_0, 0x3e0 */ - uint32_t secure_scratch65; /* _SECURE_SCRATCH65_0, 0x3e4 */ - uint32_t secure_scratch66; /* _SECURE_SCRATCH66_0, 0x3e8 */ - uint32_t secure_scratch67; /* _SECURE_SCRATCH67_0, 0x3ec */ - uint32_t secure_scratch68; /* _SECURE_SCRATCH68_0, 0x3f0 */ - uint32_t secure_scratch69; /* _SECURE_SCRATCH69_0, 0x3f4 */ - uint32_t secure_scratch70; /* _SECURE_SCRATCH70_0, 0x3f8 */ - uint32_t secure_scratch71; /* _SECURE_SCRATCH71_0, 0x3fc */ - uint32_t secure_scratch72; /* _SECURE_SCRATCH72_0, 0x400 */ - uint32_t secure_scratch73; /* _SECURE_SCRATCH73_0, 0x404 */ - uint32_t secure_scratch74; /* _SECURE_SCRATCH74_0, 0x408 */ - uint32_t secure_scratch75; /* _SECURE_SCRATCH75_0, 0x40c */ - uint32_t secure_scratch76; /* _SECURE_SCRATCH76_0, 0x410 */ - uint32_t secure_scratch77; /* _SECURE_SCRATCH77_0, 0x414 */ - uint32_t secure_scratch78; /* _SECURE_SCRATCH78_0, 0x418 */ - uint32_t secure_scratch79; /* _SECURE_SCRATCH79_0, 0x41c */ - uint32_t _0x420[8]; - uint32_t cntrl2; /* _CNTRL2_0, 0x440 */ - uint32_t io_dpd_off_mask; /* _IO_DPD_OFF_MASK_0, 0x444 */ - uint32_t io_dpd2_off_mask; /* _IO_DPD2_OFF_MASK_0, 0x448 */ - uint32_t event_counter; /* _EVENT_COUNTER_0, 0x44c */ - uint32_t fuse_control; /* _FUSE_CONTROL_0, 0x450 */ - uint32_t scratch1_eco; /* _SCRATCH1_ECO_0, 0x454 */ - uint32_t _0x458; - uint32_t io_dpd3_req; /* _IO_DPD3_REQ_0, 0x45c */ - uint32_t io_dpd3_status; /* _IO_DPD3_STATUS_0, 0x460 */ - uint32_t io_dpd4_req; /* _IO_DPD4_REQ_0, 0x464 */ - uint32_t io_dpd4_status; /* _IO_DPD4_STATUS_0, 0x468 */ - uint32_t _0x46c[2]; - uint32_t direct_thermtrip_cfg; /* _DIRECT_THERMTRIP_CFG_0, 0x474 */ - uint32_t tsosc_delay; /* _TSOSC_DELAY_0, 0x478 */ - uint32_t set_sw_clamp; /* _SET_SW_CLAMP_0, 0x47c */ - uint32_t debug_authentication; /* _DEBUG_AUTHENTICATION_0, 0x480 */ - uint32_t aotag_cfg; /* _AOTAG_CFG_0, 0x484 */ - uint32_t aotag_thresh1_cfg; /* _AOTAG_THRESH1_CFG_0, 0x488 */ - uint32_t aotag_thresh2_cfg; /* _AOTAG_THRESH2_CFG_0, 0x48c */ - uint32_t aotag_thresh3_cfg; /* _AOTAG_THRESH3_CFG_0, 0x490 */ - uint32_t aotag_status; /* _AOTAG_STATUS_0, 0x494 */ - uint32_t aotag_security; /* _AOTAG_SECURITY_0, 0x498 */ - uint32_t tsensor_config0; /* _TSENSOR_CONFIG0_0, 0x49c */ - uint32_t tsensor_config1; /* _TSENSOR_CONFIG1_0, 0x4a0 */ - uint32_t tsensor_config2; /* _TSENSOR_CONFIG2_0, 0x4a4 */ - uint32_t tsensor_status0; /* _TSENSOR_STATUS0_0, 0x4a8 */ - uint32_t tsensor_status1; /* _TSENSOR_STATUS1_0, 0x4ac */ - uint32_t tsensor_status2; /* _TSENSOR_STATUS2_0, 0x4b0 */ - uint32_t tsensor_pdiv; /* _TSENSOR_PDIV_0, 0x4b4 */ - uint32_t aotag_intr_en; /* _AOTAG_INTR_EN_0, 0x4b8 */ - uint32_t aotag_intr_dis; /* _AOTAG_INTR_DIS_0, 0x4bc */ - uint32_t utmip_pad_cfg0; /* _UTMIP_PAD_CFG0_0, 0x4c0 */ - uint32_t utmip_pad_cfg1; /* _UTMIP_PAD_CFG1_0, 0x4c4 */ - uint32_t utmip_pad_cfg2; /* _UTMIP_PAD_CFG2_0, 0x4c8 */ - uint32_t utmip_pad_cfg3; /* _UTMIP_PAD_CFG3_0, 0x4cc */ - uint32_t utmip_uhsic_sleep_cfg1; /* _UTMIP_UHSIC_SLEEP_CFG1_0, 0x4d0 */ - uint32_t cc4_hvc_control; /* _CC4_HVC_CONTROL_0, 0x4d4 */ - uint32_t wake_debounce_en; /* _WAKE_DEBOUNCE_EN_0, 0x4d8 */ - uint32_t ramdump_ctl_status; /* _RAMDUMP_CTL_STATUS_0, 0x4dc */ - uint32_t utmip_sleepwalk_p3; /* _UTMIP_SLEEPWALK_P3_0, 0x4e0 */ - uint32_t ddr_cntrl; /* _DDR_CNTRL_0, 0x4e4 */ - uint32_t _0x4e8[50]; - uint32_t sec_disable4; /* _SEC_DISABLE4_0, 0x5b0 */ - uint32_t sec_disable5; /* _SEC_DISABLE5_0, 0x5b4 */ - uint32_t sec_disable6; /* _SEC_DISABLE6_0, 0x5b8 */ - uint32_t sec_disable7; /* _SEC_DISABLE7_0, 0x5bc */ - uint32_t sec_disable8; /* _SEC_DISABLE8_0, 0x5c0 */ - uint32_t sec_disable9; /* _SEC_DISABLE9_0, 0x5c4 */ - uint32_t sec_disable10; /* _SEC_DISABLE10_0, 0x5c8 */ - uint32_t _0x5cc[13]; - uint32_t scratch56; /* _SCRATCH56_0, 0x600 */ - uint32_t scratch57; /* _SCRATCH57_0, 0x604 */ - uint32_t scratch58; /* _SCRATCH58_0, 0x608 */ - uint32_t scratch59; /* _SCRATCH59_0, 0x60c */ - uint32_t scratch60; /* _SCRATCH60_0, 0x610 */ - uint32_t scratch61; /* _SCRATCH61_0, 0x614 */ - uint32_t scratch62; /* _SCRATCH62_0, 0x618 */ - uint32_t scratch63; /* _SCRATCH63_0, 0x61c */ - uint32_t scratch64; /* _SCRATCH64_0, 0x620 */ - uint32_t scratch65; /* _SCRATCH65_0, 0x624 */ - uint32_t scratch66; /* _SCRATCH66_0, 0x628 */ - uint32_t scratch67; /* _SCRATCH67_0, 0x62c */ - uint32_t scratch68; /* _SCRATCH68_0, 0x630 */ - uint32_t scratch69; /* _SCRATCH69_0, 0x634 */ - uint32_t scratch70; /* _SCRATCH70_0, 0x638 */ - uint32_t scratch71; /* _SCRATCH71_0, 0x63c */ - uint32_t scratch72; /* _SCRATCH72_0, 0x640 */ - uint32_t scratch73; /* _SCRATCH73_0, 0x644 */ - uint32_t scratch74; /* _SCRATCH74_0, 0x648 */ - uint32_t scratch75; /* _SCRATCH75_0, 0x64c */ - uint32_t scratch76; /* _SCRATCH76_0, 0x650 */ - uint32_t scratch77; /* _SCRATCH77_0, 0x654 */ - uint32_t scratch78; /* _SCRATCH78_0, 0x658 */ - uint32_t scratch79; /* _SCRATCH79_0, 0x65c */ - uint32_t scratch80; /* _SCRATCH80_0, 0x660 */ - uint32_t scratch81; /* _SCRATCH81_0, 0x664 */ - uint32_t scratch82; /* _SCRATCH82_0, 0x668 */ - uint32_t scratch83; /* _SCRATCH83_0, 0x66c */ - uint32_t scratch84; /* _SCRATCH84_0, 0x670 */ - uint32_t scratch85; /* _SCRATCH85_0, 0x674 */ - uint32_t scratch86; /* _SCRATCH86_0, 0x678 */ - uint32_t scratch87; /* _SCRATCH87_0, 0x67c */ - uint32_t scratch88; /* _SCRATCH88_0, 0x680 */ - uint32_t scratch89; /* _SCRATCH89_0, 0x684 */ - uint32_t scratch90; /* _SCRATCH90_0, 0x688 */ - uint32_t scratch91; /* _SCRATCH91_0, 0x68c */ - uint32_t scratch92; /* _SCRATCH92_0, 0x690 */ - uint32_t scratch93; /* _SCRATCH93_0, 0x694 */ - uint32_t scratch94; /* _SCRATCH94_0, 0x698 */ - uint32_t scratch95; /* _SCRATCH95_0, 0x69c */ - uint32_t scratch96; /* _SCRATCH96_0, 0x6a0 */ - uint32_t scratch97; /* _SCRATCH97_0, 0x6a4 */ - uint32_t scratch98; /* _SCRATCH98_0, 0x6a8 */ - uint32_t scratch99; /* _SCRATCH99_0, 0x6ac */ - uint32_t scratch100; /* _SCRATCH100_0, 0x6b0 */ - uint32_t scratch101; /* _SCRATCH101_0, 0x6b4 */ - uint32_t scratch102; /* _SCRATCH102_0, 0x6b8 */ - uint32_t scratch103; /* _SCRATCH103_0, 0x6bc */ - uint32_t scratch104; /* _SCRATCH104_0, 0x6c0 */ - uint32_t scratch105; /* _SCRATCH105_0, 0x6c4 */ - uint32_t scratch106; /* _SCRATCH106_0, 0x6c8 */ - uint32_t scratch107; /* _SCRATCH107_0, 0x6cc */ - uint32_t scratch108; /* _SCRATCH108_0, 0x6d0 */ - uint32_t scratch109; /* _SCRATCH109_0, 0x6d4 */ - uint32_t scratch110; /* _SCRATCH110_0, 0x6d8 */ - uint32_t scratch111; /* _SCRATCH111_0, 0x6dc */ - uint32_t scratch112; /* _SCRATCH112_0, 0x6e0 */ - uint32_t scratch113; /* _SCRATCH113_0, 0x6e4 */ - uint32_t scratch114; /* _SCRATCH114_0, 0x6e8 */ - uint32_t scratch115; /* _SCRATCH115_0, 0x6ec */ - uint32_t scratch116; /* _SCRATCH116_0, 0x6f0 */ - uint32_t scratch117; /* _SCRATCH117_0, 0x6f4 */ - uint32_t scratch118; /* _SCRATCH118_0, 0x6f8 */ - uint32_t scratch119; /* _SCRATCH119_0, 0x6fc */ - uint32_t scratch120; /* _SCRATCH120_0, 0x700 */ - uint32_t scratch121; /* _SCRATCH121_0, 0x704 */ - uint32_t scratch122; /* _SCRATCH122_0, 0x708 */ - uint32_t scratch123; /* _SCRATCH123_0, 0x70c */ - uint32_t scratch124; /* _SCRATCH124_0, 0x710 */ - uint32_t scratch125; /* _SCRATCH125_0, 0x714 */ - uint32_t scratch126; /* _SCRATCH126_0, 0x718 */ - uint32_t scratch127; /* _SCRATCH127_0, 0x71c */ - uint32_t scratch128; /* _SCRATCH128_0, 0x720 */ - uint32_t scratch129; /* _SCRATCH129_0, 0x724 */ - uint32_t scratch130; /* _SCRATCH130_0, 0x728 */ - uint32_t scratch131; /* _SCRATCH131_0, 0x72c */ - uint32_t scratch132; /* _SCRATCH132_0, 0x730 */ - uint32_t scratch133; /* _SCRATCH133_0, 0x734 */ - uint32_t scratch134; /* _SCRATCH134_0, 0x738 */ - uint32_t scratch135; /* _SCRATCH135_0, 0x73c */ - uint32_t scratch136; /* _SCRATCH136_0, 0x740 */ - uint32_t scratch137; /* _SCRATCH137_0, 0x744 */ - uint32_t scratch138; /* _SCRATCH138_0, 0x748 */ - uint32_t scratch139; /* _SCRATCH139_0, 0x74c */ - uint32_t scratch140; /* _SCRATCH140_0, 0x750 */ - uint32_t scratch141; /* _SCRATCH141_0, 0x754 */ - uint32_t scratch142; /* _SCRATCH142_0, 0x758 */ - uint32_t scratch143; /* _SCRATCH143_0, 0x75c */ - uint32_t scratch144; /* _SCRATCH144_0, 0x760 */ - uint32_t scratch145; /* _SCRATCH145_0, 0x764 */ - uint32_t scratch146; /* _SCRATCH146_0, 0x768 */ - uint32_t scratch147; /* _SCRATCH147_0, 0x76c */ - uint32_t scratch148; /* _SCRATCH148_0, 0x770 */ - uint32_t scratch149; /* _SCRATCH149_0, 0x774 */ - uint32_t scratch150; /* _SCRATCH150_0, 0x778 */ - uint32_t scratch151; /* _SCRATCH151_0, 0x77c */ - uint32_t scratch152; /* _SCRATCH152_0, 0x780 */ - uint32_t scratch153; /* _SCRATCH153_0, 0x784 */ - uint32_t scratch154; /* _SCRATCH154_0, 0x788 */ - uint32_t scratch155; /* _SCRATCH155_0, 0x78c */ - uint32_t scratch156; /* _SCRATCH156_0, 0x790 */ - uint32_t scratch157; /* _SCRATCH157_0, 0x794 */ - uint32_t scratch158; /* _SCRATCH158_0, 0x798 */ - uint32_t scratch159; /* _SCRATCH159_0, 0x79c */ - uint32_t scratch160; /* _SCRATCH160_0, 0x7a0 */ - uint32_t scratch161; /* _SCRATCH161_0, 0x7a4 */ - uint32_t scratch162; /* _SCRATCH162_0, 0x7a8 */ - uint32_t scratch163; /* _SCRATCH163_0, 0x7ac */ - uint32_t scratch164; /* _SCRATCH164_0, 0x7b0 */ - uint32_t scratch165; /* _SCRATCH165_0, 0x7b4 */ - uint32_t scratch166; /* _SCRATCH166_0, 0x7b8 */ - uint32_t scratch167; /* _SCRATCH167_0, 0x7bc */ - uint32_t scratch168; /* _SCRATCH168_0, 0x7c0 */ - uint32_t scratch169; /* _SCRATCH169_0, 0x7c4 */ - uint32_t scratch170; /* _SCRATCH170_0, 0x7c8 */ - uint32_t scratch171; /* _SCRATCH171_0, 0x7cc */ - uint32_t scratch172; /* _SCRATCH172_0, 0x7d0 */ - uint32_t scratch173; /* _SCRATCH173_0, 0x7d4 */ - uint32_t scratch174; /* _SCRATCH174_0, 0x7d8 */ - uint32_t scratch175; /* _SCRATCH175_0, 0x7dc */ - uint32_t scratch176; /* _SCRATCH176_0, 0x7e0 */ - uint32_t scratch177; /* _SCRATCH177_0, 0x7e4 */ - uint32_t scratch178; /* _SCRATCH178_0, 0x7e8 */ - uint32_t scratch179; /* _SCRATCH179_0, 0x7ec */ - uint32_t scratch180; /* _SCRATCH180_0, 0x7f0 */ - uint32_t scratch181; /* _SCRATCH181_0, 0x7f4 */ - uint32_t scratch182; /* _SCRATCH182_0, 0x7f8 */ - uint32_t scratch183; /* _SCRATCH183_0, 0x7fc */ - uint32_t scratch184; /* _SCRATCH184_0, 0x800 */ - uint32_t scratch185; /* _SCRATCH185_0, 0x804 */ - uint32_t scratch186; /* _SCRATCH186_0, 0x808 */ - uint32_t scratch187; /* _SCRATCH187_0, 0x80c */ - uint32_t scratch188; /* _SCRATCH188_0, 0x810 */ - uint32_t scratch189; /* _SCRATCH189_0, 0x814 */ - uint32_t scratch190; /* _SCRATCH190_0, 0x818 */ - uint32_t scratch191; /* _SCRATCH191_0, 0x81c */ - uint32_t scratch192; /* _SCRATCH192_0, 0x820 */ - uint32_t scratch193; /* _SCRATCH193_0, 0x824 */ - uint32_t scratch194; /* _SCRATCH194_0, 0x828 */ - uint32_t scratch195; /* _SCRATCH195_0, 0x82c */ - uint32_t scratch196; /* _SCRATCH196_0, 0x830 */ - uint32_t scratch197; /* _SCRATCH197_0, 0x834 */ - uint32_t scratch198; /* _SCRATCH198_0, 0x838 */ - uint32_t scratch199; /* _SCRATCH199_0, 0x83c */ - uint32_t scratch200; /* _SCRATCH200_0, 0x840 */ - uint32_t scratch201; /* _SCRATCH201_0, 0x844 */ - uint32_t scratch202; /* _SCRATCH202_0, 0x848 */ - uint32_t scratch203; /* _SCRATCH203_0, 0x84c */ - uint32_t scratch204; /* _SCRATCH204_0, 0x850 */ - uint32_t scratch205; /* _SCRATCH205_0, 0x854 */ - uint32_t scratch206; /* _SCRATCH206_0, 0x858 */ - uint32_t scratch207; /* _SCRATCH207_0, 0x85c */ - uint32_t scratch208; /* _SCRATCH208_0, 0x860 */ - uint32_t scratch209; /* _SCRATCH209_0, 0x864 */ - uint32_t scratch210; /* _SCRATCH210_0, 0x868 */ - uint32_t scratch211; /* _SCRATCH211_0, 0x86c */ - uint32_t scratch212; /* _SCRATCH212_0, 0x870 */ - uint32_t scratch213; /* _SCRATCH213_0, 0x874 */ - uint32_t scratch214; /* _SCRATCH214_0, 0x878 */ - uint32_t scratch215; /* _SCRATCH215_0, 0x87c */ - uint32_t scratch216; /* _SCRATCH216_0, 0x880 */ - uint32_t scratch217; /* _SCRATCH217_0, 0x884 */ - uint32_t scratch218; /* _SCRATCH218_0, 0x888 */ - uint32_t scratch219; /* _SCRATCH219_0, 0x88c */ - uint32_t scratch220; /* _SCRATCH220_0, 0x890 */ - uint32_t scratch221; /* _SCRATCH221_0, 0x894 */ - uint32_t scratch222; /* _SCRATCH222_0, 0x898 */ - uint32_t scratch223; /* _SCRATCH223_0, 0x89c */ - uint32_t scratch224; /* _SCRATCH224_0, 0x8a0 */ - uint32_t scratch225; /* _SCRATCH225_0, 0x8a4 */ - uint32_t scratch226; /* _SCRATCH226_0, 0x8a8 */ - uint32_t scratch227; /* _SCRATCH227_0, 0x8ac */ - uint32_t scratch228; /* _SCRATCH228_0, 0x8b0 */ - uint32_t scratch229; /* _SCRATCH229_0, 0x8b4 */ - uint32_t scratch230; /* _SCRATCH230_0, 0x8b8 */ - uint32_t scratch231; /* _SCRATCH231_0, 0x8bc */ - uint32_t scratch232; /* _SCRATCH232_0, 0x8c0 */ - uint32_t scratch233; /* _SCRATCH233_0, 0x8c4 */ - uint32_t scratch234; /* _SCRATCH234_0, 0x8c8 */ - uint32_t scratch235; /* _SCRATCH235_0, 0x8cc */ - uint32_t scratch236; /* _SCRATCH236_0, 0x8d0 */ - uint32_t scratch237; /* _SCRATCH237_0, 0x8d4 */ - uint32_t scratch238; /* _SCRATCH238_0, 0x8d8 */ - uint32_t scratch239; /* _SCRATCH239_0, 0x8dc */ - uint32_t scratch240; /* _SCRATCH240_0, 0x8e0 */ - uint32_t scratch241; /* _SCRATCH241_0, 0x8e4 */ - uint32_t scratch242; /* _SCRATCH242_0, 0x8e8 */ - uint32_t scratch243; /* _SCRATCH243_0, 0x8ec */ - uint32_t scratch244; /* _SCRATCH244_0, 0x8f0 */ - uint32_t scratch245; /* _SCRATCH245_0, 0x8f4 */ - uint32_t scratch246; /* _SCRATCH246_0, 0x8f8 */ - uint32_t scratch247; /* _SCRATCH247_0, 0x8fc */ - uint32_t scratch248; /* _SCRATCH248_0, 0x900 */ - uint32_t scratch249; /* _SCRATCH249_0, 0x904 */ - uint32_t scratch250; /* _SCRATCH250_0, 0x908 */ - uint32_t scratch251; /* _SCRATCH251_0, 0x90c */ - uint32_t scratch252; /* _SCRATCH252_0, 0x910 */ - uint32_t scratch253; /* _SCRATCH253_0, 0x914 */ - uint32_t scratch254; /* _SCRATCH254_0, 0x918 */ - uint32_t scratch255; /* _SCRATCH255_0, 0x91c */ - uint32_t scratch256; /* _SCRATCH256_0, 0x920 */ - uint32_t scratch257; /* _SCRATCH257_0, 0x924 */ - uint32_t scratch258; /* _SCRATCH258_0, 0x928 */ - uint32_t scratch259; /* _SCRATCH259_0, 0x92c */ - uint32_t scratch260; /* _SCRATCH260_0, 0x930 */ - uint32_t scratch261; /* _SCRATCH261_0, 0x934 */ - uint32_t scratch262; /* _SCRATCH262_0, 0x938 */ - uint32_t scratch263; /* _SCRATCH263_0, 0x93c */ - uint32_t scratch264; /* _SCRATCH264_0, 0x940 */ - uint32_t scratch265; /* _SCRATCH265_0, 0x944 */ - uint32_t scratch266; /* _SCRATCH266_0, 0x948 */ - uint32_t scratch267; /* _SCRATCH267_0, 0x94c */ - uint32_t scratch268; /* _SCRATCH268_0, 0x950 */ - uint32_t scratch269; /* _SCRATCH269_0, 0x954 */ - uint32_t scratch270; /* _SCRATCH270_0, 0x958 */ - uint32_t scratch271; /* _SCRATCH271_0, 0x95c */ - uint32_t scratch272; /* _SCRATCH272_0, 0x960 */ - uint32_t scratch273; /* _SCRATCH273_0, 0x964 */ - uint32_t scratch274; /* _SCRATCH274_0, 0x968 */ - uint32_t scratch275; /* _SCRATCH275_0, 0x96c */ - uint32_t scratch276; /* _SCRATCH276_0, 0x970 */ - uint32_t scratch277; /* _SCRATCH277_0, 0x974 */ - uint32_t scratch278; /* _SCRATCH278_0, 0x978 */ - uint32_t scratch279; /* _SCRATCH279_0, 0x97c */ - uint32_t scratch280; /* _SCRATCH280_0, 0x980 */ - uint32_t scratch281; /* _SCRATCH281_0, 0x984 */ - uint32_t scratch282; /* _SCRATCH282_0, 0x988 */ - uint32_t scratch283; /* _SCRATCH283_0, 0x98c */ - uint32_t scratch284; /* _SCRATCH284_0, 0x990 */ - uint32_t scratch285; /* _SCRATCH285_0, 0x994 */ - uint32_t scratch286; /* _SCRATCH286_0, 0x998 */ - uint32_t scratch287; /* _SCRATCH287_0, 0x99c */ - uint32_t scratch288; /* _SCRATCH288_0, 0x9a0 */ - uint32_t scratch289; /* _SCRATCH289_0, 0x9a4 */ - uint32_t scratch290; /* _SCRATCH290_0, 0x9a8 */ - uint32_t scratch291; /* _SCRATCH291_0, 0x9ac */ - uint32_t scratch292; /* _SCRATCH292_0, 0x9b0 */ - uint32_t scratch293; /* _SCRATCH293_0, 0x9b4 */ - uint32_t scratch294; /* _SCRATCH294_0, 0x9b8 */ - uint32_t scratch295; /* _SCRATCH295_0, 0x9bc */ - uint32_t scratch296; /* _SCRATCH296_0, 0x9c0 */ - uint32_t scratch297; /* _SCRATCH297_0, 0x9c4 */ - uint32_t scratch298; /* _SCRATCH298_0, 0x9c8 */ - uint32_t scratch299; /* _SCRATCH299_0, 0x9cc */ - uint32_t _0x9d0[50]; - uint32_t secure_scratch80; /* _SECURE_SCRATCH80_0, 0xa98 */ - uint32_t secure_scratch81; /* _SECURE_SCRATCH81_0, 0xa9c */ - uint32_t secure_scratch82; /* _SECURE_SCRATCH82_0, 0xaa0 */ - uint32_t secure_scratch83; /* _SECURE_SCRATCH83_0, 0xaa4 */ - uint32_t secure_scratch84; /* _SECURE_SCRATCH84_0, 0xaa8 */ - uint32_t secure_scratch85; /* _SECURE_SCRATCH85_0, 0xaac */ - uint32_t secure_scratch86; /* _SECURE_SCRATCH86_0, 0xab0 */ - uint32_t secure_scratch87; /* _SECURE_SCRATCH87_0, 0xab4 */ - uint32_t secure_scratch88; /* _SECURE_SCRATCH88_0, 0xab8 */ - uint32_t secure_scratch89; /* _SECURE_SCRATCH89_0, 0xabc */ - uint32_t secure_scratch90; /* _SECURE_SCRATCH90_0, 0xac0 */ - uint32_t secure_scratch91; /* _SECURE_SCRATCH91_0, 0xac4 */ - uint32_t secure_scratch92; /* _SECURE_SCRATCH92_0, 0xac8 */ - uint32_t secure_scratch93; /* _SECURE_SCRATCH93_0, 0xacc */ - uint32_t secure_scratch94; /* _SECURE_SCRATCH94_0, 0xad0 */ - uint32_t secure_scratch95; /* _SECURE_SCRATCH95_0, 0xad4 */ - uint32_t secure_scratch96; /* _SECURE_SCRATCH96_0, 0xad8 */ - uint32_t secure_scratch97; /* _SECURE_SCRATCH97_0, 0xadc */ - uint32_t secure_scratch98; /* _SECURE_SCRATCH98_0, 0xae0 */ - uint32_t secure_scratch99; /* _SECURE_SCRATCH99_0, 0xae4 */ - uint32_t secure_scratch100; /* _SECURE_SCRATCH100_0, 0xae8 */ - uint32_t secure_scratch101; /* _SECURE_SCRATCH101_0, 0xaec */ - uint32_t secure_scratch102; /* _SECURE_SCRATCH102_0, 0xaf0 */ - uint32_t secure_scratch103; /* _SECURE_SCRATCH103_0, 0xaf4 */ - uint32_t secure_scratch104; /* _SECURE_SCRATCH104_0, 0xaf8 */ - uint32_t secure_scratch105; /* _SECURE_SCRATCH105_0, 0xafc */ - uint32_t secure_scratch106; /* _SECURE_SCRATCH106_0, 0xb00 */ - uint32_t secure_scratch107; /* _SECURE_SCRATCH107_0, 0xb04 */ - uint32_t secure_scratch108; /* _SECURE_SCRATCH108_0, 0xb08 */ - uint32_t secure_scratch109; /* _SECURE_SCRATCH109_0, 0xb0c */ - uint32_t secure_scratch110; /* _SECURE_SCRATCH110_0, 0xb10 */ - uint32_t secure_scratch111; /* _SECURE_SCRATCH111_0, 0xb14 */ - uint32_t secure_scratch112; /* _SECURE_SCRATCH112_0, 0xb18 */ - uint32_t secure_scratch113; /* _SECURE_SCRATCH113_0, 0xb1c */ - uint32_t secure_scratch114; /* _SECURE_SCRATCH114_0, 0xb20 */ - uint32_t secure_scratch115; /* _SECURE_SCRATCH115_0, 0xb24 */ - uint32_t secure_scratch116; /* _SECURE_SCRATCH116_0, 0xb28 */ - uint32_t secure_scratch117; /* _SECURE_SCRATCH117_0, 0xb2c */ - uint32_t secure_scratch118; /* _SECURE_SCRATCH118_0, 0xb30 */ - uint32_t secure_scratch119; /* _SECURE_SCRATCH119_0, 0xb34 */ - uint32_t secure_scratch120; /* _SECURE_SCRATCH120_0, 0xb38 */ - uint32_t secure_scratch121; /* _SECURE_SCRATCH121_0, 0xb3c */ - uint32_t secure_scratch122; /* _SECURE_SCRATCH122_0, 0xb40 */ - uint32_t secure_scratch123; /* _SECURE_SCRATCH123_0, 0xb44 */ - uint32_t led_breathing_ctrl; /* _LED_BREATHING_CTRL_0, 0xb48 */ - uint32_t led_breathing_counter0; /* _LED_BREATHING_COUNTER0_0, 0xb4c */ - uint32_t led_breathing_counter1; /* _LED_BREATHING_COUNTER1_0, 0xb50 */ - uint32_t led_breathing_counter2; /* _LED_BREATHING_COUNTER2_0, 0xb54 */ - uint32_t led_breathing_counter3; /* _LED_BREATHING_COUNTER3_0, 0xb58 */ - uint32_t led_breathing_status; /* _LED_BREATHING_STATUS_0, 0xb5c */ - uint32_t _0xb60[2]; - uint32_t secure_scratch124; /* _SECURE_SCRATCH124_0, 0xb68 */ - uint32_t secure_scratch125; /* _SECURE_SCRATCH125_0, 0xb6c */ - uint32_t secure_scratch126; /* _SECURE_SCRATCH126_0, 0xb70 */ - uint32_t secure_scratch127; /* _SECURE_SCRATCH127_0, 0xb74 */ - uint32_t secure_scratch128; /* _SECURE_SCRATCH128_0, 0xb78 */ - uint32_t secure_scratch129; /* _SECURE_SCRATCH129_0, 0xb7c */ - uint32_t secure_scratch130; /* _SECURE_SCRATCH130_0, 0xb80 */ - uint32_t secure_scratch131; /* _SECURE_SCRATCH131_0, 0xb84 */ - uint32_t secure_scratch132; /* _SECURE_SCRATCH132_0, 0xb88 */ - uint32_t secure_scratch133; /* _SECURE_SCRATCH133_0, 0xb8c */ - uint32_t secure_scratch134; /* _SECURE_SCRATCH134_0, 0xb90 */ - uint32_t secure_scratch135; /* _SECURE_SCRATCH135_0, 0xb94 */ - uint32_t secure_scratch136; /* _SECURE_SCRATCH136_0, 0xb98 */ - uint32_t secure_scratch137; /* _SECURE_SCRATCH137_0, 0xb9c */ - uint32_t secure_scratch138; /* _SECURE_SCRATCH138_0, 0xba0 */ - uint32_t secure_scratch139; /* _SECURE_SCRATCH139_0, 0xba4 */ - uint32_t _0xba8[2]; - uint32_t sec_disable_ns; /* _SEC_DISABLE_NS_0, 0xbb0 */ - uint32_t sec_disable2_ns; /* _SEC_DISABLE2_NS_0, 0xbb4 */ - uint32_t sec_disable3_ns; /* _SEC_DISABLE3_NS_0, 0xbb8 */ - uint32_t sec_disable4_ns; /* _SEC_DISABLE4_NS_0, 0xbbc */ - uint32_t sec_disable5_ns; /* _SEC_DISABLE5_NS_0, 0xbc0 */ - uint32_t sec_disable6_ns; /* _SEC_DISABLE6_NS_0, 0xbc4 */ - uint32_t sec_disable7_ns; /* _SEC_DISABLE7_NS_0, 0xbc8 */ - uint32_t sec_disable8_ns; /* _SEC_DISABLE8_NS_0, 0xbcc */ - uint32_t sec_disable9_ns; /* _SEC_DISABLE9_NS_0, 0xbd0 */ - uint32_t sec_disable10_ns; /* _SEC_DISABLE10_NS_0, 0xbd4 */ - uint32_t _0xbd8[4]; - uint32_t tzram_pwr_cntrl; /* _TZRAM_PWR_CNTRL_0, 0xbe8 */ - uint32_t tzram_sec_disable; /* _TZRAM_SEC_DISABLE_0, 0xbec */ - uint32_t tzram_non_sec_disable; /* _TZRAM_NON_SEC_DISABLE_0, 0xbf0 */ -} tegra_pmc_t; - -static inline volatile tegra_pmc_t *pmc_get_regs(void) -{ - return (volatile tegra_pmc_t *)PMC_BASE; -} - -#endif diff --git a/fusee/fusee-secondary/src/preprocessor.h b/fusee/fusee-secondary/src/preprocessor.h deleted file mode 100644 index 2560cf456..000000000 --- a/fusee/fusee-secondary/src/preprocessor.h +++ /dev/null @@ -1,207 +0,0 @@ -/* TuxSH: I added INC/DEC_10 to INC/DEC_32; tuples */ - -#ifndef FUSEE_PREPROCESSOR_H -#define FUSEE_PREPROCESSOR_H - -/*============================================================================= - Copyright (c) 2015 Paul Fultz II - cloak.h - Distributed under the Boost Software License, Version 1.0. (See accompanying - file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt) -==============================================================================*/ - -/*#ifndef CLOAK_GUARD_H -#define CLOAK_GUARD_H*/ - -#define CAT(a, ...) PRIMITIVE_CAT(a, __VA_ARGS__) -#define PRIMITIVE_CAT(a, ...) a ## __VA_ARGS__ - -#define COMPL(b) PRIMITIVE_CAT(COMPL_, b) -#define COMPL_0 1 -#define COMPL_1 0 - -#define BITAND(x) PRIMITIVE_CAT(BITAND_, x) -#define BITAND_0(y) 0 -#define BITAND_1(y) y - -#define INC(x) PRIMITIVE_CAT(INC_, x) -#define INC_0 1 -#define INC_1 2 -#define INC_2 3 -#define INC_3 4 -#define INC_4 5 -#define INC_5 6 -#define INC_6 7 -#define INC_7 8 -#define INC_8 9 -#define INC_9 10 -#define INC_10 11 -#define INC_11 12 -#define INC_12 13 -#define INC_13 14 -#define INC_14 15 -#define INC_15 16 -#define INC_16 17 -#define INC_17 18 -#define INC_18 19 -#define INC_19 20 -#define INC_20 21 -#define INC_21 22 -#define INC_22 23 -#define INC_23 24 -#define INC_24 25 -#define INC_25 26 -#define INC_26 27 -#define INC_27 28 -#define INC_28 29 -#define INC_29 30 -#define INC_30 31 -#define INC_31 32 -#define INC_32 32 -#define INC_33 33 - -#define DEC(x) PRIMITIVE_CAT(DEC_, x) -#define DEC_0 0 -#define DEC_1 0 -#define DEC_2 1 -#define DEC_3 2 -#define DEC_4 3 -#define DEC_5 4 -#define DEC_6 5 -#define DEC_7 6 -#define DEC_8 7 -#define DEC_9 8 -#define DEC_10 9 -#define DEC_11 10 -#define DEC_12 11 -#define DEC_13 12 -#define DEC_14 13 -#define DEC_15 14 -#define DEC_16 15 -#define DEC_17 16 -#define DEC_18 17 -#define DEC_19 18 -#define DEC_20 19 -#define DEC_21 20 -#define DEC_22 21 -#define DEC_23 22 -#define DEC_24 23 -#define DEC_25 24 -#define DEC_26 25 -#define DEC_27 26 -#define DEC_28 27 -#define DEC_29 28 -#define DEC_30 29 -#define DEC_31 30 -#define DEC_32 31 -#define DEC_33 32 - -#define CHECK_N(x, n, ...) n -#define CHECK(...) CHECK_N(__VA_ARGS__, 0,) -#define PROBE(x) x, 1, - -#define IS_PAREN(x) CHECK(IS_PAREN_PROBE x) -#define IS_PAREN_PROBE(...) PROBE(~) - -#define NOT(x) CHECK(PRIMITIVE_CAT(NOT_, x)) -#define NOT_0 PROBE(~) - -#define COMPL(b) PRIMITIVE_CAT(COMPL_, b) -#define COMPL_0 1 -#define COMPL_1 0 - -#define BOOL(x) COMPL(NOT(x)) - -#define IIF(c) PRIMITIVE_CAT(IIF_, c) -#define IIF_0(t, ...) __VA_ARGS__ -#define IIF_1(t, ...) t - -#define IF(c) IIF(BOOL(c)) - -#define EAT(...) -#define EXPAND(...) __VA_ARGS__ -#define WHEN(c) IF(c)(EXPAND, EAT) - -#define EMPTY() -#define DEFER(id) id EMPTY() -#define OBSTRUCT(id) id DEFER(EMPTY)() - -#define EVAL(...) EVAL1(EVAL1(EVAL1(__VA_ARGS__))) -#define EVAL1(...) EVAL2(EVAL2(EVAL2(__VA_ARGS__))) -#define EVAL2(...) EVAL3(EVAL3(EVAL3(__VA_ARGS__))) -#define EVAL3(...) EVAL4(EVAL4(EVAL4(__VA_ARGS__))) -#define EVAL4(...) EVAL5(EVAL5(EVAL5(__VA_ARGS__))) -#define EVAL5(...) __VA_ARGS__ - -#define REPEAT(count, macro, ...) \ - WHEN(count) \ - ( \ - OBSTRUCT(REPEAT_INDIRECT) () \ - ( \ - DEC(count), macro, __VA_ARGS__ \ - ) \ - OBSTRUCT(macro) \ - ( \ - DEC(count), __VA_ARGS__ \ - ) \ - ) -#define REPEAT_INDIRECT() REPEAT - -#define WHILE(pred, op, ...) \ - IF(pred(__VA_ARGS__)) \ - ( \ - OBSTRUCT(WHILE_INDIRECT) () \ - ( \ - pred, op, op(__VA_ARGS__) \ - ), \ - __VA_ARGS__ \ - ) -#define WHILE_INDIRECT() WHILE - -#define PRIMITIVE_COMPARE(x, y) IS_PAREN \ -( \ - COMPARE_ ## x ( COMPARE_ ## y) (()) \ -) - -#define IS_COMPARABLE(x) IS_PAREN( CAT(COMPARE_, x) (()) ) - -#define NOT_EQUAL(x, y) \ -IIF(BITAND(IS_COMPARABLE(x))(IS_COMPARABLE(y)) ) \ -( \ - PRIMITIVE_COMPARE, \ - 1 EAT \ -)(x, y) - -#define EQUAL(x, y) COMPL(NOT_EQUAL(x, y)) - -#define COMMA() , - -#define COMMA_IF(n) IF(n)(COMMA, EAT)() - -#define PLUS() + - -#define _TUPLE_ELEM_0(a, ...) a -#define _TUPLE_ELEM_1(a, b, ...) b -#define _TUPLE_ELEM_2(a, b, c, ...) c -#define _TUPLE_ELEM_3(a, b, c, d, ...) d -#define _TUPLE_ELEM_4(a, b, c, d, e, ...) e - -#define TUPLE_ELEM_0(T) EVAL(_TUPLE_ELEM_0 T) -#define TUPLE_ELEM_1(T) EVAL(_TUPLE_ELEM_1 T) -#define TUPLE_ELEM_2(T) EVAL(_TUPLE_ELEM_2 T) -#define TUPLE_ELEM_3(T) EVAL(_TUPLE_ELEM_3 T) -#define TUPLE_ELEM_4(T) EVAL(_TUPLE_ELEM_4 T) - -#define _TUPLE_FOLD_LEFT_0(i, T, op) (_TUPLE_ELEM_0 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_1(i, T, op) (_TUPLE_ELEM_1 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_2(i, T, op) (_TUPLE_ELEM_2 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_3(i, T, op) (_TUPLE_ELEM_3 CAT(T,i)) op() -#define _TUPLE_FOLD_LEFT_4(i, T, op) (_TUPLE_ELEM_4 CAT(T,i)) op() - -#define TUPLE_FOLD_LEFT_0(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_0, T, op)) -#define TUPLE_FOLD_LEFT_1(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_1, T, op)) -#define TUPLE_FOLD_LEFT_2(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_2, T, op)) -#define TUPLE_FOLD_LEFT_3(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_3, T, op)) -#define TUPLE_FOLD_LEFT_4(len, T, op) EVAL(REPEAT(len, _TUPLE_FOLD_LEFT_4, T, op)) - -#endif diff --git a/fusee/fusee-secondary/src/raw_dev.c b/fusee/fusee-secondary/src/raw_dev.c deleted file mode 100644 index e20c272dd..000000000 --- a/fusee/fusee-secondary/src/raw_dev.c +++ /dev/null @@ -1,490 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "raw_dev.h" - -static int rawdev_open(struct _reent *r, void *fileStruct, const char *path, int flags, int mode); -static int rawdev_close(struct _reent *r, void *fd); -static ssize_t rawdev_write(struct _reent *r, void *fd, const char *ptr, size_t len); -static ssize_t rawdev_read(struct _reent *r, void *fd, char *ptr, size_t len); -static off_t rawdev_seek(struct _reent *r, void *fd, off_t pos, int whence); -static int rawdev_fstat(struct _reent *r, void *fd, struct stat *st); -static int rawdev_stat(struct _reent *r, const char *file, struct stat *st); -static int rawdev_fsync(struct _reent *r, void *fd); - -typedef struct rawdev_device_t { - devoptab_t devoptab; - - uint8_t *tmp_sector; - device_partition_t devpart; - char name[32+1]; - char root_path[34+1]; - bool setup, registered; -} rawdev_device_t; - -typedef struct rawdev_file_t { - rawdev_device_t *device; - int open_flags; - uint64_t offset; -} rawdev_file_t; - -static rawdev_device_t g_rawdev_devices[RAWDEV_MAX_DEVICES] = {0}; - -static devoptab_t g_rawdev_devoptab = { - .structSize = sizeof(rawdev_file_t), - .open_r = rawdev_open, - .close_r = rawdev_close, - .write_r = rawdev_write, - .read_r = rawdev_read, - .seek_r = rawdev_seek, - .fstat_r = rawdev_fstat, - .stat_r = rawdev_stat, - .fsync_r = rawdev_fsync, - .deviceData = NULL, -}; - -static rawdev_device_t *rawdev_find_device(const char *name) { - for (size_t i = 0; i < RAWDEV_MAX_DEVICES; i++) { - if (g_rawdev_devices[i].setup && strcmp(g_rawdev_devices[i].name, name) == 0) { - return &g_rawdev_devices[i]; - } - } - - return NULL; -} - -int rawdev_mount_device(const char *name, const device_partition_t *devpart, bool initialize_immediately) { - rawdev_device_t *device = NULL; - - if (name[0] == '\0' || devpart == NULL) { - errno = EINVAL; - return -1; - } - - if (strlen(name) > 32) { - errno = ENAMETOOLONG; - return -1; - } - if (rawdev_find_device(name) != NULL) { - errno = EEXIST; /* Device already exists */ - return -1; - } - - /* Find an unused slot. */ - for(size_t i = 0; i < RAWDEV_MAX_DEVICES; i++) { - if (!g_rawdev_devices[i].setup) { - device = &g_rawdev_devices[i]; - break; - } - } - if (device == NULL) { - errno = ENOMEM; - return -1; - } - - memset(device, 0, sizeof(rawdev_device_t)); - device->devoptab = g_rawdev_devoptab; - device->devpart = *devpart; - strcpy(device->name, name); - strcpy(device->root_path, name); - strcat(device->root_path, ":/"); - - device->devoptab.name = device->name; - device->devoptab.deviceData = device; - - if (initialize_immediately) { - int rc = device->devpart.initializer(&device->devpart); - if (rc != 0) { - errno = rc; - return -1; - } - } - - device->tmp_sector = (uint8_t *)malloc(devpart->sector_size); - if (device->tmp_sector == NULL) { - errno = ENOMEM; - return -1; - } - - device->setup = true; - device->registered = false; - - return 0; -} - -int rawdev_register_device(const char *name) { - rawdev_device_t *device = rawdev_find_device(name); - if (device == NULL) { - errno = ENOENT; - return -1; - } - - if (device->registered) { - /* Do nothing if the device is already registered. */ - return 0; - } - - if (AddDevice(&device->devoptab) == -1) { - errno = ENOMEM; - return -1; - } else { - device->registered = true; - return 0; - } -} - -int rawdev_unregister_device(const char *name) { - rawdev_device_t *device = rawdev_find_device(name); - char drname[40]; - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - if (!device->registered) { - /* Do nothing if the device is not registered. */ - return 0; - } - - strcpy(drname, name); - strcat(drname, ":"); - - if (RemoveDevice(drname) == -1) { - errno = ENOENT; - return -1; - } else { - device->registered = false; - return 0; - } -} - -int rawdev_unmount_device(const char *name) { - int rc; - rawdev_device_t *device = rawdev_find_device(name); - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - rc = rawdev_unregister_device(name); - if (rc == -1) { - return -1; - } - - free(device->tmp_sector); - device->devpart.finalizer(&device->devpart); - memset(device, 0, sizeof(rawdev_device_t)); - - return 0; -} - -int rawdev_register_keys(const char *name, unsigned int target_firmware, BisPartition part) { - rawdev_device_t *device = rawdev_find_device(name); - - if (device == NULL) { - errno = ENOENT; - return -1; - } - - derive_bis_key(device->devpart.keys, part, target_firmware); - - return 0; -} - -int rawdev_unmount_all(void) { - for (size_t i = 0; i < RAWDEV_MAX_DEVICES; i++) { - int rc = rawdev_unmount_device(g_rawdev_devices[i].name); - if (rc != 0) { - return rc; - } - } - - return 0; -} - -static int rawdev_open(struct _reent *r, void *fileStruct, const char *path, int flags, int mode) { - (void)mode; - rawdev_file_t *f = (rawdev_file_t *)fileStruct; - rawdev_device_t *device = (rawdev_device_t *)(r->deviceData); - - /* Only allow "device:/". */ - if (strcmp(path, device->root_path) != 0) { - r->_errno = ENOENT; - return -1; - } - - /* Forbid some flags that we explicitely don't support.*/ - if (flags & (O_APPEND | O_TRUNC | O_EXCL)) { - r->_errno = EINVAL; - return -1; - } - - memset(f, 0, sizeof(rawdev_file_t)); - f->device = device; - f->open_flags = flags; - return 0; -} - -static int rawdev_close(struct _reent *r, void *fd) { - (void)r; - rawdev_file_t *f = (rawdev_file_t *)fd; - memset(f, 0, sizeof(rawdev_file_t)); - - return 0; -} - -static ssize_t rawdev_write(struct _reent *r, void *fd, const char *ptr, size_t len) { - rawdev_file_t *f = (rawdev_file_t *)fd; - rawdev_device_t *device = f->device; - size_t sector_size = device->devpart.sector_size; - uint64_t sector_begin = f->offset / sector_size; - uint64_t sector_end = (f->offset + len + sector_size - 1) / sector_size; - uint64_t sector_end_aligned; - uint64_t current_sector = sector_begin; - const uint8_t *data = (const uint8_t *)ptr; - - int no = 0; - - if (sector_end >= device->devpart.num_sectors) { - len = (size_t)(sector_size * device->devpart.num_sectors - f->offset); - sector_end = device->devpart.num_sectors; - } - - sector_end_aligned = sector_end - ((f->offset + len) % sector_size != 0 ? 1 : 0); - - if (len == 0) { - return 0; - } - - /* Unaligned at the start, we need to read the sector and incorporate the data. */ - if (f->offset % sector_size != 0) { - size_t nb = (size_t)(len <= (sector_size - (f->offset % sector_size)) ? len : sector_size - (f->offset % sector_size)); - no = device_partition_read_data(&device->devpart, device->tmp_sector, sector_begin, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - memcpy(device->tmp_sector + (f->offset % sector_size), data, nb); - - no = device_partition_write_data(&device->devpart, device->tmp_sector, sector_begin, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - /* Advance */ - data += sector_size - (f->offset % sector_size); - current_sector++; - } - - /* Check if we're already done (otherwise this causes a bug in handling the last sector of the range). */ - if (current_sector == sector_end) { - f->offset += len; - return len; - } - - /* Write all of the sector-aligned data. */ - if (current_sector != sector_end_aligned) { - no = device_partition_write_data(&device->devpart, data, current_sector, sector_end_aligned - current_sector); - if (no != 0) { - r->_errno = no; - return -1; - } - } - - data += sector_size * (sector_end_aligned - current_sector); - current_sector = sector_end_aligned; - - /* Unaligned at the end, we need to read the sector and incorporate the data. */ - if (sector_end != sector_end_aligned) { - no = device_partition_read_data(&device->devpart, device->tmp_sector, sector_end_aligned, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - memcpy(device->tmp_sector, data, (size_t)((f->offset + len) % sector_size)); - - no = device_partition_write_data(&device->devpart, device->tmp_sector, sector_end_aligned, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - /* Advance */ - data += sector_size - ((f->offset + len) % sector_size); - current_sector++; - } - - f->offset += len; - return len; -} - -static ssize_t rawdev_read(struct _reent *r, void *fd, char *ptr, size_t len) { - rawdev_file_t *f = (rawdev_file_t *)fd; - rawdev_device_t *device = f->device; - size_t sector_size = device->devpart.sector_size; - uint64_t sector_begin = f->offset / sector_size; - uint64_t sector_end = (f->offset + len + sector_size - 1) / sector_size; - uint64_t sector_end_aligned; - uint64_t current_sector = sector_begin; - uint8_t *data = (uint8_t *)ptr; - - int no = 0; - - if (sector_end >= device->devpart.num_sectors) { - len = (size_t)(sector_size * device->devpart.num_sectors - f->offset); - sector_end = device->devpart.num_sectors; - } - - sector_end_aligned = sector_end - ((f->offset + len) % sector_size != 0 ? 1 : 0); - - if (len == 0) { - return 0; - } - - /* Unaligned at the start, we need to read the sector and incorporate the data. */ - if (f->offset % sector_size != 0) { - size_t nb = (size_t)(len <= (sector_size - (f->offset % sector_size)) ? len : sector_size - (f->offset % sector_size)); - no = device_partition_read_data(&device->devpart, device->tmp_sector, sector_begin, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - memcpy(data, device->tmp_sector + (f->offset % sector_size), nb); - - /* Advance */ - data += sector_size - (f->offset % sector_size); - current_sector++; - } - - /* Check if we're already done (otherwise this causes a bug in handling the last sector of the range). */ - if (current_sector == sector_end) { - f->offset += len; - return len; - } - - /* Read all of the sector-aligned data. */ - if (current_sector != sector_end_aligned) { - no = device_partition_read_data(&device->devpart, data, current_sector, sector_end_aligned - current_sector); - if (no != 0) { - r->_errno = no; - return -1; - } - } - - data += sector_size * (sector_end_aligned - current_sector); - current_sector = sector_end_aligned; - - /* Unaligned at the end, we need to read the sector and incorporate the data. */ - if (sector_end != sector_end_aligned) { - no = device_partition_read_data(&device->devpart, device->tmp_sector, sector_end_aligned, 1); - if (no != 0) { - r->_errno = no; - return -1; - } - - memcpy(data, device->tmp_sector, (size_t)((f->offset + len) % sector_size)); - - /* Advance */ - data += sector_size - ((f->offset + len) % sector_size); - current_sector++; - } - - f->offset += len; - return len; -} - -static off_t rawdev_seek(struct _reent *r, void *fd, off_t pos, int whence) { - rawdev_file_t *f = (rawdev_file_t *)fd; - rawdev_device_t *device = f->device; - uint64_t off; - - switch (whence) { - case SEEK_SET: - off = 0; - break; - case SEEK_CUR: - off = f->offset; - break; - case SEEK_END: - off = device->devpart.num_sectors * device->devpart.sector_size; - break; - default: - r->_errno = EINVAL; - return -1; - } - - if (pos < 0 && pos + off < 0) { - /* don't allow seek to before the beginning of the file */ - r->_errno = EINVAL; - return -1; - } - - f->offset = (uint64_t)(pos + off); - return (off_t)(pos + off); -} - -static void rawdev_stat_impl(rawdev_device_t *device, struct stat *st) { - memset(st, 0, sizeof(struct stat)); - st->st_size = (off_t)(device->devpart.num_sectors * device->devpart.sector_size); - st->st_nlink = 1; - - st->st_blksize = device->devpart.sector_size; - st->st_blocks = st->st_size / st->st_blksize; - - st->st_mode = S_IFBLK | S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH; -} - -static int rawdev_fstat(struct _reent *r, void *fd, struct stat *st) { - (void)r; - rawdev_file_t *f = (rawdev_file_t *)fd; - rawdev_device_t *device = f->device; - rawdev_stat_impl(device, st); - - return 0; -} - -static int rawdev_stat(struct _reent *r, const char *file, struct stat *st) { - rawdev_device_t *device = (rawdev_device_t *)(r->deviceData); - if (strcmp(file, device->root_path) != 0) { - r->_errno = ENOENT; - return -1; - } - - rawdev_stat_impl(device, st); - return 0; -} - -static int rawdev_fsync(struct _reent *r, void *fd) { - /* Nothing to do. */ - (void)r; - (void)fd; - return 0; -} diff --git a/fusee/fusee-secondary/src/raw_dev.h b/fusee/fusee-secondary/src/raw_dev.h deleted file mode 100644 index 9a7454082..000000000 --- a/fusee/fusee-secondary/src/raw_dev.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_RAW_DEV_H -#define FUSEE_RAW_DEV_H - -#include -#include -#include -#include "device_partition.h" -#include "key_derivation.h" - -#define RAWDEV_MAX_DEVICES 16 - -int rawdev_mount_device(const char *name, const device_partition_t *devpart, bool initialize_immediately); -int rawdev_register_device(const char *name); -int rawdev_unregister_device(const char *name); -int rawdev_unmount_device(const char *name); /* also unregisters. */ - -int rawdev_register_keys(const char *name, unsigned int target_firmware, BisPartition part); - -int rawdev_unmount_all(void); - -#endif diff --git a/fusee/fusee-secondary/src/se.c b/fusee/fusee-secondary/src/se.c deleted file mode 100644 index 73f0f845b..000000000 --- a/fusee/fusee-secondary/src/se.c +++ /dev/null @@ -1,674 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include - -#include "utils.h" -#include "se.h" - -void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size); - -/* Globals for driver. */ -static unsigned int g_se_modulus_sizes[KEYSLOT_RSA_MAX]; -static unsigned int g_se_exp_sizes[KEYSLOT_RSA_MAX]; - -/* Initialize a SE linked list. */ -void NOINLINE ll_init(volatile se_ll_t *ll, void *buffer, size_t size) { - ll->num_entries = 0; /* 1 Entry. */ - - if (buffer != NULL) { - ll->addr_info.address = (uint32_t) get_physical_address(buffer); - ll->addr_info.size = (uint32_t) size; - } else { - ll->addr_info.address = 0; - ll->addr_info.size = 0; - } -} - -void se_check_error_status_reg(void) { - if (se_get_regs()->SE_ERR_STATUS) { - generic_panic(); - } -} - -void se_check_for_error(void) { - volatile tegra_se_t *se = se_get_regs(); - if (se->SE_INT_STATUS & 0x10000 || se->SE_STATUS & 3 || se->SE_ERR_STATUS) { - generic_panic(); - } -} - -void se_verify_flags_cleared(void) { - if (se_get_regs()->SE_STATUS & 3) { - generic_panic(); - } -} - -/* Set the flags for an AES keyslot. */ -void set_aes_keyslot_flags(unsigned int keyslot, unsigned int flags) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Misc flags. */ - if (flags & ~0x80) { - se->SE_CRYPTO_KEYTABLE_ACCESS[keyslot] = ~flags; - } - - /* Disable keyslot reads. */ - if (flags & 0x80) { - se->SE_CRYPTO_SECURITY_PERKEY &= ~(1 << keyslot); - } -} - -/* Set the flags for an RSA keyslot. */ -void set_rsa_keyslot_flags(unsigned int keyslot, unsigned int flags) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX) { - generic_panic(); - } - - /* Misc flags. */ - if (flags & ~0x80) { - /* TODO: Why are flags assigned this way? */ - se->SE_RSA_KEYTABLE_ACCESS[keyslot] = (((flags >> 4) & 4) | (flags & 3)) ^ 7; - } - - /* Disable keyslot reads. */ - if (flags & 0x80) { - se->SE_RSA_SECURITY_PERKEY &= ~(1 << keyslot); - } -} - -void clear_aes_keyslot(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Zero out the whole keyslot and IV. */ - for (unsigned int i = 0; i < 0x10; i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | i; - se->SE_CRYPTO_KEYTABLE_DATA = 0; - } -} - -void clear_rsa_keyslot(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX) { - generic_panic(); - } - - /* Zero out the whole keyslot. */ - for (unsigned int i = 0; i < 0x40; i++) { - /* Select Keyslot Modulus[i] */ - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40; - se->SE_RSA_KEYTABLE_DATA = 0; - } - for (unsigned int i = 0; i < 0x40; i++) { - /* Select Keyslot Expontent[i] */ - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i; - se->SE_RSA_KEYTABLE_DATA = 0; - } -} - -void set_aes_keyslot(unsigned int keyslot, const void *key, size_t key_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || key_size > KEYSIZE_AES_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (key_size >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | i; - se->SE_CRYPTO_KEYTABLE_DATA = read32le(key, 4 * i); - } -} - -void set_rsa_keyslot(unsigned int keyslot, const void *modulus, size_t modulus_size, const void *exponent, size_t exp_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_RSA_MAX || modulus_size > KEYSIZE_RSA_MAX || exp_size > KEYSIZE_RSA_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (modulus_size >> 2); i++) { - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | 0x40 | i; - se->SE_RSA_KEYTABLE_DATA = read32be(modulus, (4 * (modulus_size >> 2)) - (4 * i) - 4); - } - - for (size_t i = 0; i < (exp_size >> 2); i++) { - se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i; - se->SE_RSA_KEYTABLE_DATA = read32be(exponent, (4 * (exp_size >> 2)) - (4 * i) - 4); - } - - g_se_modulus_sizes[keyslot] = modulus_size; - g_se_exp_sizes[keyslot] = exp_size; -} - -void set_aes_keyslot_iv(unsigned int keyslot, const void *iv, size_t iv_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || iv_size > 0x10) { - generic_panic(); - } - - for (size_t i = 0; i < (iv_size >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | 8 | i; - se->SE_CRYPTO_KEYTABLE_DATA = read32le(iv, 4 * i); - } -} - -void clear_aes_keyslot_iv(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - for (size_t i = 0; i < (0x10 >> 2); i++) { - se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | 8 | i; - se->SE_CRYPTO_KEYTABLE_DATA = 0; - } -} - -void set_se_ctr(const void *ctr) { - for (unsigned int i = 0; i < 4; i++) { - se_get_regs()->SE_CRYPTO_LINEAR_CTR[i] = read32le(ctr, i * 4); - } -} - -void decrypt_data_into_keyslot(unsigned int keyslot_dst, unsigned int keyslot_src, const void *wrapped_key, size_t wrapped_key_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot_dst >= KEYSLOT_AES_MAX || keyslot_src >= KEYSLOT_AES_MAX || wrapped_key_size > KEYSIZE_AES_MAX) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_DEC | DST_KEYTAB); - se->SE_CRYPTO_CONFIG = keyslot_src << 24; - se->SE_CRYPTO_LAST_BLOCK = 0; - se->SE_CRYPTO_KEYTABLE_DST = keyslot_dst << 8; - - trigger_se_blocking_op(OP_START, NULL, 0, wrapped_key, wrapped_key_size); -} - -void se_synchronous_exp_mod(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - uint8_t ALIGN(16) stack_buf[KEYSIZE_RSA_MAX]; - - if (keyslot >= KEYSLOT_RSA_MAX || src_size > KEYSIZE_RSA_MAX || dst_size > KEYSIZE_RSA_MAX) { - generic_panic(); - } - - /* Endian swap the input. */ - for (size_t i = 0; i < src_size; i++) { - stack_buf[i] = *((uint8_t *)src + src_size - i - 1); - } - - se->SE_CONFIG = (ALG_RSA | DST_RSAREG); - se->SE_RSA_CONFIG = keyslot << 24; - se->SE_RSA_KEY_SIZE = (g_se_modulus_sizes[keyslot] >> 6) - 1; - se->SE_RSA_EXP_SIZE = g_se_exp_sizes[keyslot] >> 2; - - trigger_se_blocking_op(OP_START, NULL, 0, stack_buf, src_size); - se_get_exp_mod_output(dst, dst_size); -} - -void se_get_exp_mod_output(void *buf, size_t size) { - size_t num_dwords = (size >> 2); - - if (num_dwords < 1) { - return; - } - - uint32_t *p_out = ((uint32_t *)buf) + num_dwords - 1; - uint32_t offset = 0; - - /* Copy endian swapped output. */ - while (num_dwords) { - *p_out = read32be(se_get_regs()->SE_RSA_OUTPUT, offset); - offset += 4; - p_out--; - num_dwords--; - } -} - -bool se_rsa2048_pss_verify(const void *signature, size_t signature_size, const void *modulus, size_t modulus_size, const void *data, size_t data_size) { - uint8_t message[RSA_2048_BYTES]; - uint8_t h_buf[0x24]; - - /* Hardcode RSA with keyslot 0. */ - const uint8_t public_exponent[4] = {0x00, 0x01, 0x00, 0x01}; - set_rsa_keyslot(0, modulus, modulus_size, public_exponent, sizeof(public_exponent)); - se_synchronous_exp_mod(0, message, sizeof(message), signature, signature_size); - - /* Validate sanity byte. */ - if (message[RSA_2048_BYTES - 1] != 0xBC) { - return false; - } - - /* Copy Salt into MGF1 Hash Buffer. */ - memset(h_buf, 0, sizeof(h_buf)); - memcpy(h_buf, message + RSA_2048_BYTES - 0x20 - 0x1, 0x20); - - /* Decrypt maskedDB (via inline MGF1). */ - uint8_t seed = 0; - uint8_t mgf1_buf[0x20]; - for (unsigned int ofs = 0; ofs < RSA_2048_BYTES - 0x20 - 1; ofs += 0x20) { - h_buf[sizeof(h_buf) - 1] = seed++; - se_calculate_sha256(mgf1_buf, h_buf, sizeof(h_buf)); - for (unsigned int i = ofs; i < ofs + 0x20 && i < RSA_2048_BYTES - 0x20 - 1; i++) { - message[i] ^= mgf1_buf[i - ofs]; - } - } - - /* Constant lmask for rsa-2048-pss. */ - message[0] &= 0x7F; - - /* Validate DB is of the form 0000...0001. */ - for (unsigned int i = 0; i < RSA_2048_BYTES - 0x20 - 0x20 - 1 - 1; i++) { - if (message[i] != 0) { - return false; - } - } - if (message[RSA_2048_BYTES - 0x20 - 0x20 - 1 - 1] != 1) { - return false; - } - - /* Check hash correctness. */ - uint8_t validate_buf[8 + 0x20 + 0x20]; - uint8_t validate_hash[0x20]; - - memset(validate_buf, 0, sizeof(validate_buf)); - se_calculate_sha256(&validate_buf[8], data, data_size); - memcpy(&validate_buf[0x28], &message[RSA_2048_BYTES - 0x20 - 0x20 - 1], 0x20); - se_calculate_sha256(validate_hash, validate_buf, sizeof(validate_buf)); - return memcmp(h_buf, validate_hash, 0x20) == 0; -} - -void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - se_ll_t in_ll; - se_ll_t out_ll; - - ll_init(&in_ll, (void *)src, src_size); - ll_init(&out_ll, dst, dst_size); - - /* Set the LLs. */ - se->SE_IN_LL_ADDR = (uint32_t) get_physical_address(&in_ll); - se->SE_OUT_LL_ADDR = (uint32_t) get_physical_address(&out_ll); - - /* Set registers for operation. */ - se->SE_ERR_STATUS = se->SE_ERR_STATUS; - se->SE_INT_STATUS = se->SE_INT_STATUS; - se->SE_OPERATION = op; - - while (!(se->SE_INT_STATUS & 0x10)) { /* Wait a while */ } - se_check_for_error(); -} - -/* Secure AES Functionality. */ -void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src, size_t src_size) { - uint8_t block[0x10] = {0}; - - if (src_size > sizeof(block) || dst_size > sizeof(block)) { - generic_panic(); - } - - /* Load src data into block. */ - if (src_size != 0) { - memcpy(block, src, src_size); - } - - /* Trigger AES operation. */ - se_get_regs()->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block)); - - /* Copy output data into dst. */ - if (dst_size != 0) { - memcpy(dst, block, dst_size); - } -} - -void se_aes_ctr_crypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *ctr, size_t ctr_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || ctr_size != 0x10) { - generic_panic(); - } - unsigned int num_blocks = src_size >> 4; - - /* Unknown what this write does, but official code writes it for CTR mode. */ - se->SE_SPARE = 1; - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x91E; - set_se_ctr(ctr); - - /* Handle any aligned blocks. */ - size_t aligned_size = (size_t)num_blocks << 4; - if (aligned_size) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 1; - trigger_se_blocking_op(OP_START, dst, dst_size, src, aligned_size); - } - - /* Handle final, unaligned block. */ - if (aligned_size < dst_size && aligned_size < src_size) { - size_t last_block_size = dst_size - aligned_size; - if (src_size < dst_size) { - last_block_size = src_size - aligned_size; - } - se_perform_aes_block_operation(dst + aligned_size, last_block_size, (uint8_t *)src + aligned_size, src_size - aligned_size); - } -} - -void se_aes_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, unsigned int config_high) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) { - generic_panic(); - } - - /* Set configuration high (256-bit vs 128-bit) based on parameter. */ - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16); - se->SE_CRYPTO_CONFIG = keyslot << 24 | 0x100; - se_perform_aes_block_operation(dst, 0x10, src, 0x10); -} - -void se_aes_128_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - se_aes_ecb_encrypt_block(keyslot, dst, dst_size, src, src_size, 0); -} - -void se_aes_256_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - se_aes_ecb_encrypt_block(keyslot, dst, dst_size, src, src_size, 0x202); -} - -void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot << 24; - se_perform_aes_block_operation(dst, 0x10, src, 0x10); -} - -void shift_left_xor_rb(uint8_t *key) { - uint8_t prev_high_bit = 0; - for (unsigned int i = 0; i < 0x10; i++) { - uint8_t cur_byte = key[0xF - i]; - key[0xF - i] = (cur_byte << 1) | (prev_high_bit); - prev_high_bit = cur_byte >> 7; - } - if (prev_high_bit) { - key[0xF] ^= 0x87; - } -} - -void shift_left_xor_rb_le(uint8_t *key) { - uint8_t prev_high_bit = 0; - for (unsigned int i = 0; i < 0x10; i++) { - uint8_t cur_byte = key[i]; - key[i] = (cur_byte << 1) | (prev_high_bit); - prev_high_bit = cur_byte >> 7; - } - if (prev_high_bit) { - key[0x0] ^= 0x87; - } -} - -void aes_128_xts_nintendo_get_tweak(uint8_t *tweak, size_t sector) { - for (int i = 0xF; i >= 0; i--) { /* Nintendo LE custom tweak... */ - tweak[i] = (unsigned char)(sector & 0xFF); - sector >>= 8; - } -} - -void aes_128_xts_nintendo_xor_with_tweak(unsigned int keyslot, size_t sector, uint8_t *dst, const uint8_t *src, size_t size, size_t crypto_sector_size) { - if ((size & 0xF) || size == 0) { - generic_panic(); - } - - unsigned int sector_scale = crypto_sector_size / size; - unsigned int real_sector = sector / sector_scale; - - uint8_t tweak[0x10]; - aes_128_xts_nintendo_get_tweak(tweak, real_sector); - se_aes_128_ecb_encrypt_block(keyslot, tweak, sizeof(tweak), tweak, sizeof(tweak)); - - unsigned int num_pre_blocks = ((sector % sector_scale) * size) / 0x10; - - for (unsigned int pre = 0; pre < num_pre_blocks; pre++) { - shift_left_xor_rb_le(tweak); - } - - for (unsigned int block = 0; block < (size >> 4); block++) { - for (unsigned int i = 0; i < 0x10; i++) { - dst[(block << 4) | i] = src[(block << 4) | i] ^ tweak[i]; - } - shift_left_xor_rb_le(tweak); - } -} - -void aes_128_xts_nintendo_crypt_sector(unsigned int keyslot_1, unsigned int keyslot_2, size_t sector, bool encrypt, void *dst, const void *src, size_t size, size_t crypto_sector_size) { - volatile tegra_se_t *se = se_get_regs(); - - if ((size & 0xF) || size == 0 || crypto_sector_size < size || (crypto_sector_size % size) != 0) { - generic_panic(); - } - - /* XOR. */ - aes_128_xts_nintendo_xor_with_tweak(keyslot_2, sector, dst, src, size, crypto_sector_size); - - /* Encrypt/Decrypt. */ - if (encrypt) { - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot_1 << 24 | 0x100; - } else { - se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY); - se->SE_CRYPTO_CONFIG = keyslot_1 << 24; - } - se->SE_CRYPTO_LAST_BLOCK = (size >> 4) - 1; - trigger_se_blocking_op(OP_START, dst, size, src, size); - - /* XOR. */ - aes_128_xts_nintendo_xor_with_tweak(keyslot_2, sector, dst, dst, size, crypto_sector_size); -} - -/* Encrypt with AES-XTS (Nintendo's custom tweak). */ -void se_aes_128_xts_nintendo_encrypt(unsigned int keyslot_1, unsigned int keyslot_2, size_t base_sector, void *dst, const void *src, size_t size, unsigned int sector_size, unsigned int crypto_sector_size) { - if ((size & 0xF) || size == 0 || crypto_sector_size < sector_size || (crypto_sector_size % sector_size) != 0) { - generic_panic(); - } - size_t sector = base_sector; - for (size_t ofs = 0; ofs < size; ofs += sector_size) { - aes_128_xts_nintendo_crypt_sector(keyslot_1, keyslot_2, sector, true, dst + ofs, src + ofs, sector_size, crypto_sector_size); - sector++; - } -} - -/* Decrypt with AES-XTS (Nintendo's custom tweak). */ -void se_aes_128_xts_nintendo_decrypt(unsigned int keyslot_1, unsigned int keyslot_2, size_t base_sector, void *dst, const void *src, size_t size, unsigned int sector_size, unsigned int crypto_sector_size) { - if ((size & 0xF) || size == 0 || crypto_sector_size < sector_size || (crypto_sector_size % sector_size) != 0) { - generic_panic(); - } - - size_t sector = base_sector; - for (size_t ofs = 0; ofs < size; ofs += sector_size) { - aes_128_xts_nintendo_crypt_sector(keyslot_1, keyslot_2, sector, false, dst + ofs, src + ofs, sector_size, crypto_sector_size); - sector++; - } -} - -void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size, unsigned int config_high) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* Generate the derived key, to be XOR'd with final output block. */ - uint8_t ALIGN(16) derived_key[0x10] = {0}; - se_aes_ecb_encrypt_block(keyslot, derived_key, sizeof(derived_key), derived_key, sizeof(derived_key), config_high); - shift_left_xor_rb(derived_key); - if (data_size & 0xF) { - shift_left_xor_rb(derived_key); - } - - se->SE_CONFIG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | (0x145); - clear_aes_keyslot_iv(keyslot); - - unsigned int num_blocks = (data_size + 0xF) >> 4; - /* Handle aligned blocks. */ - if (num_blocks > 1) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 2; - trigger_se_blocking_op(OP_START, NULL, 0, data, data_size); - se->SE_CRYPTO_CONFIG |= 0x80; - } - - /* Create final block. */ - uint8_t ALIGN(16) last_block[0x10] = {0}; - if (data_size & 0xF) { - memcpy(last_block, data + (data_size & ~0xF), data_size & 0xF); - last_block[data_size & 0xF] = 0x80; /* Last block = data || 100...0 */ - } else if (data_size >= 0x10) { - memcpy(last_block, data + data_size - 0x10, 0x10); - } - - for (unsigned int i = 0; i < 0x10; i++) { - last_block[i] ^= derived_key[i]; - } - - /* Perform last operation. */ - se->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, NULL, 0, last_block, sizeof(last_block)); - - /* Copy output CMAC. */ - for (unsigned int i = 0; i < (cmac_size >> 2); i++) { - ((uint32_t *)cmac)[i] = read32le(se->SE_HASH_RESULT, i << 2); - } -} - -void se_compute_aes_128_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) { - se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0); -} -void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) { - se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0x202); -} - -void se_aes_256_cbc_encrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || src_size < 0x10) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY) | (0x202 << 16); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x144; - set_aes_keyslot_iv(keyslot, iv, 0x10); - se->SE_CRYPTO_LAST_BLOCK = (src_size >> 4) - 1; - trigger_se_blocking_op(OP_START, dst, dst_size, src, src_size); -} - -void se_aes_128_cbc_decrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX || src_size < 0x10) { - generic_panic(); - } - - se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY) | (0x000 << 16); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x66; - set_aes_keyslot_iv(keyslot, iv, 0x10); - se->SE_CRYPTO_LAST_BLOCK = (src_size >> 4) - 1; - trigger_se_blocking_op(OP_START, dst, dst_size, src, src_size); -} - -/* SHA256 Implementation. */ -void se_calculate_sha256(void *dst, const void *src, size_t src_size) { - volatile tegra_se_t *se = se_get_regs(); - - /* Setup config for SHA256, size = BITS(src_size) */ - se->SE_CONFIG = (ENCMODE_SHA256 | ALG_SHA | DST_HASHREG); - se->SE_SHA_CONFIG = 1; - se->SE_SHA_MSG_LENGTH[0] = (uint32_t)(src_size << 3); - se->SE_SHA_MSG_LENGTH[1] = 0; - se->SE_SHA_MSG_LENGTH[2] = 0; - se->SE_SHA_MSG_LENGTH[3] = 0; - se->SE_SHA_MSG_LEFT[0] = (uint32_t)(src_size << 3); - se->SE_SHA_MSG_LEFT[1] = 0; - se->SE_SHA_MSG_LEFT[2] = 0; - se->SE_SHA_MSG_LEFT[3] = 0; - - /* Trigger the operation. */ - trigger_se_blocking_op(OP_START, NULL, 0, src, src_size); - - /* Copy output hash. */ - for (unsigned int i = 0; i < (0x20 >> 2); i++) { - ((uint32_t *)dst)[i] = read32be(se->SE_HASH_RESULT, i << 2); - } -} - -/* RNG API */ -void se_initialize_rng(unsigned int keyslot) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - /* To initialize the RNG, we'll perform an RNG operation into an output buffer. */ - /* This will be discarded, when done. */ - uint8_t ALIGN(16) output_buf[0x10]; - - se->SE_RNG_SRC_CONFIG = 3; /* Entropy enable + Entropy lock enable */ - se->SE_RNG_RESEED_INTERVAL = 70001; - se->SE_CONFIG = (ALG_RNG | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x108; - se->SE_RNG_CONFIG = 5; - se->SE_CRYPTO_LAST_BLOCK = 0; - trigger_se_blocking_op(OP_START, output_buf, 0x10, NULL, 0); -} - -void se_generate_random(unsigned int keyslot, void *dst, size_t size) { - volatile tegra_se_t *se = se_get_regs(); - - if (keyslot >= KEYSLOT_AES_MAX) { - generic_panic(); - } - - uint32_t num_blocks = size >> 4; - size_t aligned_size = num_blocks << 4; - se->SE_CONFIG = (ALG_RNG | DST_MEMORY); - se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x108; - se->SE_RNG_CONFIG = 4; - - if (num_blocks >= 1) { - se->SE_CRYPTO_LAST_BLOCK = num_blocks - 1; - trigger_se_blocking_op(OP_START, dst, aligned_size, NULL, 0); - } - if (size > aligned_size) { - se_perform_aes_block_operation(dst + aligned_size, size - aligned_size, NULL, 0); - } -} diff --git a/fusee/fusee-secondary/src/se.h b/fusee/fusee-secondary/src/se.h deleted file mode 100644 index 786ae1eb7..000000000 --- a/fusee/fusee-secondary/src/se.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SE_H -#define FUSEE_SE_H - -#define SE_BASE 0x70012000 -#define MAKE_SE_REG(n) MAKE_REG32(SE_BASE + n) - -#define KEYSLOT_SWITCH_LP0TZRAMKEY 0x2 -#define KEYSLOT_SWITCH_SRKGENKEY 0x8 -#define KEYSLOT_SWITCH_PACKAGE2KEY 0x8 -#define KEYSLOT_SWITCH_TEMPKEY 0x9 -#define KEYSLOT_SWITCH_SESSIONKEY 0xA -#define KEYSLOT_SWITCH_RNGKEY 0xB -#define KEYSLOT_SWITCH_MASTERKEY 0xD -#define KEYSLOT_SWITCH_DEVICEKEY 0xC - -/* This keyslot was added in 4.0.0. */ -#define KEYSLOT_SWITCH_4XNEWDEVICEKEYGENKEY 0xD -#define KEYSLOT_SWITCH_4XNEWCONSOLEKEYGENKEY 0xE -#define KEYSLOT_SWITCH_4XOLDDEVICEKEY 0xF - -/* This keyslot was added in 5.0.0. */ -#define KEYSLOT_SWITCH_5XNEWDEVICEKEYGENKEY 0xA - -/* Mariko keyslots. */ -#define KEYSLOT_SWITCH_DEVICEKEY_MARIKO 0x6 -#define KEYSLOT_SWITCH_MASTERKEY_MARIKO 0x7 - -#define KEYSLOT_SWITCH_KEK_MARIKO 0xC -#define KEYSLOT_SWITCH_BEK_MARIKO 0xD - -#define KEYSLOT_AES_MAX 0x10 -#define KEYSLOT_RSA_MAX 0x2 - -#define KEYSIZE_AES_MAX 0x20 -#define KEYSIZE_RSA_MAX 0x100 - -#define ALG_SHIFT (12) -#define ALG_DEC_SHIFT (8) -#define ALG_NOP (0 << ALG_SHIFT) -#define ALG_AES_ENC (1 << ALG_SHIFT) -#define ALG_AES_DEC ((1 << ALG_DEC_SHIFT) | ALG_NOP) -#define ALG_RNG (2 << ALG_SHIFT) -#define ALG_SHA (3 << ALG_SHIFT) -#define ALG_RSA (4 << ALG_SHIFT) - -#define DST_SHIFT (2) -#define DST_MEMORY (0 << DST_SHIFT) -#define DST_HASHREG (1 << DST_SHIFT) -#define DST_KEYTAB (2 << DST_SHIFT) -#define DST_SRK (3 << DST_SHIFT) -#define DST_RSAREG (4 << DST_SHIFT) - -#define ENCMODE_SHIFT (24) -#define DECMODE_SHIFT (16) -#define ENCMODE_SHA256 (5 << ENCMODE_SHIFT) - -#define HASH_DISABLE (0x0) -#define HASH_ENABLE (0x1) - -#define OP_ABORT 0 -#define OP_START 1 -#define OP_RESTART 2 -#define OP_CTX_SAVE 3 -#define OP_RESTART_IN 4 - -#define CTX_SAVE_SRC_SHIFT 29 -#define CTX_SAVE_SRC_STICKY_BITS (0 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_KEYTABLE_AES (2 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_KEYTABLE_RSA (1 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_MEM (4 << CTX_SAVE_SRC_SHIFT) -#define CTX_SAVE_SRC_SRK (6 << CTX_SAVE_SRC_SHIFT) - -#define CTX_SAVE_KEY_LOW_BITS 0 -#define CTX_SAVE_KEY_HIGH_BITS 1 -#define CTX_SAVE_KEY_ORIGINAL_IV 2 -#define CTX_SAVE_KEY_UPDATED_IV 3 - -#define CTX_SAVE_STICKY_BIT_INDEX_SHIFT 24 -#define CTX_SAVE_KEY_INDEX_SHIFT 8 -#define CTX_SAVE_RSA_KEY_INDEX_SHIFT 16 -#define CTX_SAVE_RSA_KEY_BLOCK_INDEX_SHIFT 12 - -#define RSA_2048_BYTES 0x100 - -typedef struct { - uint32_t SE_SE_SECURITY; - uint32_t SE_TZRAM_SECURITY; - uint32_t SE_OPERATION; - uint32_t SE_INT_ENABLE; - uint32_t SE_INT_STATUS; - uint32_t SE_CONFIG; - uint32_t SE_IN_LL_ADDR; - uint32_t SE_IN_CUR_BYTE_ADDR; - uint32_t SE_IN_CUR_LL_ID; - uint32_t SE_OUT_LL_ADDR; - uint32_t SE_OUT_CUR_BYTE_ADDR; - uint32_t SE_OUT_CUR_LL_ID; - uint32_t SE_HASH_RESULT[0x10]; - uint32_t SE_CTX_SAVE_CONFIG; - uint32_t _0x74[0x63]; - uint32_t SE_SHA_CONFIG; - uint32_t SE_SHA_MSG_LENGTH[0x4]; - uint32_t SE_SHA_MSG_LEFT[0x4]; - uint32_t _0x224[0x17]; - uint32_t SE_CRYPTO_SECURITY_PERKEY; - uint32_t SE_CRYPTO_KEYTABLE_ACCESS[0x10]; - uint32_t _0x2C4[0x10]; - uint32_t SE_CRYPTO_CONFIG; - uint32_t SE_CRYPTO_LINEAR_CTR[0x4]; - uint32_t SE_CRYPTO_LAST_BLOCK; - uint32_t SE_CRYPTO_KEYTABLE_ADDR; - uint32_t SE_CRYPTO_KEYTABLE_DATA; - uint32_t _0x324[0x3]; - uint32_t SE_CRYPTO_KEYTABLE_DST; - uint32_t _0x334[0x3]; - uint32_t SE_RNG_CONFIG; - uint32_t SE_RNG_SRC_CONFIG; - uint32_t SE_RNG_RESEED_INTERVAL; - uint32_t _0x34C[0x2D]; - uint32_t SE_RSA_CONFIG; - uint32_t SE_RSA_KEY_SIZE; - uint32_t SE_RSA_EXP_SIZE; - uint32_t SE_RSA_SECURITY_PERKEY; - uint32_t SE_RSA_KEYTABLE_ACCESS[0x2]; - uint32_t _0x418[0x2]; - uint32_t SE_RSA_KEYTABLE_ADDR; - uint32_t SE_RSA_KEYTABLE_DATA; - uint32_t SE_RSA_OUTPUT[0x40]; - uint32_t _0x528[0xB6]; - uint32_t SE_STATUS; - uint32_t SE_ERR_STATUS; - uint32_t SE_MISC; - uint32_t SE_SPARE; - uint32_t SE_ENTROPY_DEBUG_COUNTER; - uint32_t _0x814; - uint32_t _0x818; - uint32_t _0x81C; - uint32_t _0x820[0x5F8]; -} tegra_se_t; - -typedef struct { - uint32_t address; - uint32_t size; -} se_addr_info_t; - -typedef struct { - uint32_t num_entries; /* Set to total entries - 1 */ - se_addr_info_t addr_info; /* This should really be an array...but for our use case it works. */ -} se_ll_t; - -static inline volatile tegra_se_t *se_get_regs(void) { - return (volatile tegra_se_t *)SE_BASE; -} - -void se_check_error_status_reg(void); -void se_check_for_error(void); -void se_trigger_interrupt(void); - -void se_validate_stored_vector(void); -void se_generate_stored_vector(void); - -void se_verify_flags_cleared(void); - -void set_aes_keyslot_flags(unsigned int keyslot, unsigned int flags); -void set_rsa_keyslot_flags(unsigned int keyslot, unsigned int flags); -void clear_aes_keyslot(unsigned int keyslot); -void clear_rsa_keyslot(unsigned int keyslot); - -void set_aes_keyslot(unsigned int keyslot, const void *key, size_t key_size); -void decrypt_data_into_keyslot(unsigned int keyslot_dst, unsigned int keyslot_src, const void *wrapped_key, size_t wrapped_key_size); -void set_rsa_keyslot(unsigned int keyslot, const void *modulus, size_t modulus_size, const void *exponent, size_t exp_size); -void set_aes_keyslot_iv(unsigned int keyslot, const void *iv, size_t iv_size); -void set_se_ctr(const void *ctr); - -/* Secure AES API */ -void se_aes_128_xts_nintendo_decrypt(unsigned int keyslot_1, unsigned int keyslot_2, unsigned int base_sector, void *dst, const void *src, size_t size, unsigned int sector_size, unsigned int crypto_sector_size); -void se_aes_128_xts_nintendo_encrypt(unsigned int keyslot_1, unsigned int keyslot_2, unsigned int base_sector, void *dst, const void *src, size_t size, unsigned int sector_size, unsigned int crypto_sector_size); -void se_compute_aes_128_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size); -void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size); -void se_aes_128_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_256_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_ctr_crypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *ctr, size_t ctr_size); -void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -void se_aes_256_cbc_encrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv); -void se_aes_128_cbc_decrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, const void *iv); - -/* Hash API */ -void se_calculate_sha256(void *dst, const void *src, size_t src_size); - -/* RSA API */ -void se_get_exp_mod_output(void *buf, size_t size); -void se_synchronous_exp_mod(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size); -bool se_rsa2048_pss_verify(const void *signature, size_t signature_size, const void *modulus, size_t modulus_size, const void *data, size_t data_size); - -/* RNG API */ -void se_initialize_rng(unsigned int keyslot); -void se_generate_random(unsigned int keyslot, void *dst, size_t size); - -#endif diff --git a/fusee/fusee-secondary/src/splash_screen.bin b/fusee/fusee-secondary/src/splash_screen.bin deleted file mode 100644 index 01a995e5f..000000000 Binary files a/fusee/fusee-secondary/src/splash_screen.bin and /dev/null differ diff --git a/fusee/fusee-secondary/src/splash_screen.bmp b/fusee/fusee-secondary/src/splash_screen.bmp deleted file mode 100644 index 3fe43bd90..000000000 Binary files a/fusee/fusee-secondary/src/splash_screen.bmp and /dev/null differ diff --git a/fusee/fusee-secondary/src/splash_screen.c b/fusee/fusee-secondary/src/splash_screen.c deleted file mode 100644 index 9e7a09147..000000000 --- a/fusee/fusee-secondary/src/splash_screen.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "console.h" -#include "di.h" -#include "timers.h" -#include "splash_screen.h" -#include "fs_utils.h" -#include "../../../fusee/common/display/video_fb.h" - -#define u8 uint8_t -#define u32 uint32_t -#include "splash_screen_bin.h" -#undef u8 -#undef u32 - -static uint32_t g_splash_start_time = 0; - -static void render_bmp(const uint32_t *bmp_data, uint32_t *framebuffer, uint32_t bmp_width, uint32_t bmp_height, uint32_t bmp_pos_x, uint32_t bmp_pos_y) { - /* Render the BMP. */ - for (uint32_t y = bmp_pos_y; y < (bmp_pos_y + bmp_height); y++) { - for (uint32_t x = bmp_pos_x; x < (bmp_pos_x + bmp_width); x++) { - framebuffer[x + (y * SPLASH_SCREEN_STRIDE)] = bmp_data[(bmp_height + bmp_pos_y - 1 - y) * bmp_width + x - bmp_pos_x]; - } - } - - /* Re-initialize the frame buffer. */ - console_display(framebuffer); -} - -void splash_screen_wait_delay(void) { - /* Ensure the splash screen is displayed for at least three seconds. */ - udelay_absolute(g_splash_start_time, 3000000); -} - -void display_splash_screen_bmp(const char *custom_splash_path, void *fb_address) { - uint8_t *splash_screen = (uint8_t *)splash_screen_bin; - - /* Try to load an external custom splash screen. */ - if ((custom_splash_path != NULL) && (custom_splash_path[0] != '\x00')) { - if (!read_from_file(splash_screen, splash_screen_bin_size, custom_splash_path)) { - fatal_error("Failed to read custom splash screen from %s!\n", custom_splash_path); - } - - /* Check for 'BM' magic. */ - if ((splash_screen[0] == 'B') && (splash_screen[1] == 'M')) { - /* Extract BMP parameters. */ - uint32_t bmp_size = (splash_screen[0x02] | (splash_screen[0x03] << 8) | (splash_screen[0x04] << 16) | (splash_screen[0x05] << 24)); - uint32_t bmp_offset = (splash_screen[0x0A] | (splash_screen[0x0B] << 8) | (splash_screen[0x0C] << 16) | (splash_screen[0x0D] << 24)); - uint32_t bmp_width = (splash_screen[0x12] | (splash_screen[0x13] << 8) | (splash_screen[0x14] << 16) | (splash_screen[0x15] << 24)); - uint32_t bmp_height = (splash_screen[0x16] | (splash_screen[0x17] << 8) | (splash_screen[0x18] << 16) | (splash_screen[0x19] << 24)); - uint16_t bmp_bpp = (splash_screen[0x1C] | (splash_screen[0x1D] << 8)); - uint32_t bmp_data_size = (splash_screen[0x22] | (splash_screen[0x23] << 8) | (splash_screen[0x24] << 16) | (splash_screen[0x25] << 24)); - - /* Data size can be wrong or set to 0. In that case, we calculate it instead. */ - if (!bmp_data_size || (bmp_data_size >= bmp_size)) - bmp_data_size = (bmp_size - bmp_offset); - - /* Only accept images up to 720x1280 resolution and with 32 BPP. */ - if ((bmp_width > SPLASH_SCREEN_WIDTH_MAX) || (bmp_height > SPLASH_SCREEN_HEIGHT_MAX)) { - fatal_error("Invalid splash screen dimensions!\n"); - } else if (bmp_bpp != SPLASH_SCREEN_BPP) { - fatal_error("Invalid splash screen color depth!\n"); - } else if (bmp_data_size > SPLASH_SCREEN_SIZE_MAX) { - fatal_error("Splash screen data size is too big!\n"); - } - - /* Calculate screen positions. */ - uint32_t bmp_pos_x = ((SPLASH_SCREEN_WIDTH_MAX - bmp_width) / 2); - uint32_t bmp_pos_y = ((SPLASH_SCREEN_HEIGHT_MAX - bmp_height) / 2); - - /* Advance to data. */ - splash_screen += bmp_offset; - - /* Render the BMP. */ - render_bmp((uint32_t *)splash_screen, (uint32_t *)fb_address, bmp_width, bmp_height, bmp_pos_x, bmp_pos_y); - } else { - fatal_error("Invalid splash screen format!\n"); - } - } else { - /* Copy the pre-rendered framebuffer. */ - memcpy(fb_address, splash_screen, splash_screen_bin_size); - console_display(fb_address); - } - - /* Note the time we started displaying the splash. */ - g_splash_start_time = get_time_us(); -} diff --git a/fusee/fusee-secondary/src/splash_screen.h b/fusee/fusee-secondary/src/splash_screen.h deleted file mode 100644 index 03b7ee743..000000000 --- a/fusee/fusee-secondary/src/splash_screen.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SPLASH_SCREEN_H -#define FUSEE_SPLASH_SCREEN_H - -#include - -#define SPLASH_SCREEN_WIDTH_MAX 720 -#define SPLASH_SCREEN_HEIGHT_MAX 1280 -#define SPLASH_SCREEN_BPP 32 -#define SPLASH_SCREEN_STRIDE 768 -#define SPLASH_SCREEN_SIZE_MAX (SPLASH_SCREEN_HEIGHT_MAX * SPLASH_SCREEN_STRIDE * 4) - -void display_splash_screen_bmp(const char *custom_splash_path, void *fb_address); -void splash_screen_wait_delay(void); - -#endif diff --git a/fusee/fusee-secondary/src/stage2.h b/fusee/fusee-secondary/src/stage2.h deleted file mode 100644 index 8b3a44033..000000000 --- a/fusee/fusee-secondary/src/stage2.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_STAGE2_H -#define FUSEE_STAGE2_H - -#include "../../../fusee/common/log.h" -#include "utils.h" - -/* TODO: Is there a more concise way to do this? */ -#define STAGE2_ARGV_PROGRAM_PATH 0 -#define STAGE2_ARGV_ARGUMENT_STRUCT 1 -#define STAGE2_ARGC 2 - -#define BCTO_MAX_SIZE 0x5000 - -typedef struct { - uint32_t version; - ScreenLogLevel log_level; - char bct0[BCTO_MAX_SIZE]; -} stage2_args_t; - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/start.s b/fusee/fusee-secondary/src/start.s deleted file mode 100644 index 8c727ac23..000000000 --- a/fusee/fusee-secondary/src/start.s +++ /dev/null @@ -1,302 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ -#include - -.macro CLEAR_GPR_REG_ITER - mov r\@, #0 -.endm - -.section .text.start, "ax", %progbits -.arm - -.align 5 -.global _start -.type _start, %function -_start: - b _crt0 - -.word (_metadata - _start) - -_is_experimental: -.word 0x00000001 /* is experimental */ - -_crt0: - /* Switch to system mode, mask all interrupts, clear all flags */ - msr cpsr_cxsf, #0xDF - - /* Relocate ourselves if necessary */ - ldr r2, =_start - adr r3, _start - cmp r2, r3 - beq _relocation_loop_end - - ldr r4, =__bss_start__ - sub r4, r4, r2 /* size >= 32, obviously, and weve declared 32-byte-alignment */ - _relocation_loop: - ldmia r3!, {r5-r12} - stmia r2!, {r5-r12} - subs r4, #0x20 - bne _relocation_loop - - ldr r12, =_relocation_loop_end - bx r12 - - _relocation_loop_end: - /* Set the stack pointer */ - ldr sp, =__stack_top__ - mov fp, #0 - bl __program_init - - /* Set r0 to r12 to 0 (for debugging) & call main */ - .rept 13 - CLEAR_GPR_REG_ITER - .endr - ldr r0, =__program_argc - ldr r1, =__program_argv - ldr lr, =__program_exit - ldr r0, [r0] - ldr r1, [r1] - b main - -.arm -.global fusee_is_experimental -.type fusee_is_experimental, %function -fusee_is_experimental: - ldr r0, =_is_experimental - ldr r0, [r0] - bx lr - -/* Fusee-secondary header. */ -.align 5 -_metadata: -.ascii "FSS0" -.word __total_size__ -.word (_crt0 - _start) -.word (_content_headers - _start) -.word (_content_headers_end - _content_headers) / 0x20 /* Number of content headers */ -.word ((ATMOSPHERE_SUPPORTED_HOS_VERSION_MAJOR << 24) | (ATMOSPHERE_SUPPORTED_HOS_VERSION_MINOR << 16) | (ATMOSPHERE_SUPPORTED_HOS_VERSION_MICRO << 8) | (0x0)) -.word ((ATMOSPHERE_RELEASE_VERSION_MAJOR << 24) | (ATMOSPHERE_RELEASE_VERSION_MINOR << 16) | (ATMOSPHERE_RELEASE_VERSION_MICRO << 8) | (0x0)) -#define TO_WORD(x) TO_WORD_(x) -#define TO_WORD_(x) 0x##x -#define AMS_GIT_REV_WORD TO_WORD(ATMOSPHERE_GIT_HASH) -.word AMS_GIT_REV_WORD -#undef TO_WORD_ -#undef TO_WORD - -#define CONTENT_TYPE_FSP 0 -#define CONTENT_TYPE_EXO 1 -#define CONTENT_TYPE_WBT 2 -#define CONTENT_TYPE_RBT 3 -#define CONTENT_TYPE_SP1 4 -#define CONTENT_TYPE_SP2 5 -#define CONTENT_TYPE_KIP 6 -#define CONTENT_TYPE_BMP 7 -#define CONTENT_TYPE_EMC 8 -#define CONTENT_TYPE_KLD 9 -#define CONTENT_TYPE_KRN 10 -#define CONTENT_TYPE_EXF 11 -#define CONTENT_TYPE_TKG 12 - -#define CONTENT_FLAG_NONE (0 << 0) - -#define CONTENT_FLAG0_EXPERIMENTAL (1 << 0) - -_content_headers: -/* ams_mitm content header */ -.word __ams_mitm_kip_start__ -.word __ams_mitm_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "ams_mitm" -.align 5 - -/* boot content header */ -.word __boot_kip_start__ -.word __boot_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "boot" -.align 5 - -/* exosphere content header */ -.word __exosphere_bin_start__ -.word __exosphere_bin_size__ -.byte CONTENT_TYPE_EXO -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "exosphere" -.align 5 - -/* mesosphere content header */ -.word __mesosphere_bin_start__ -.word __mesosphere_bin_size__ -.byte CONTENT_TYPE_KRN -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "mesosphere" -.align 5 - -/* fusee_primary content header */ -.word __fusee_primary_bin_start__ -.word __fusee_primary_bin_size__ -.byte CONTENT_TYPE_FSP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "fusee_primary" -.align 5 - -/* loader content header */ -.word __loader_kip_start__ -.word __loader_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "Loader" -.align 5 - -/* warmboot content header */ -.word __warmboot_bin_start__ -.word __warmboot_bin_size__ -.byte CONTENT_TYPE_WBT -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "warmboot" -.align 5 - -/* pm content header */ -.word __pm_kip_start__ -.word __pm_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "ProcessManager" -.align 5 - -/* rebootstub content header */ -.word __rebootstub_bin_start__ -.word __rebootstub_bin_size__ -.byte CONTENT_TYPE_RBT -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "rebootstub" -.align 5 - -/* sm content header */ -.word __sm_kip_start__ -.word __sm_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "sm" -.align 5 - -/* spl content header */ -.word __spl_kip_start__ -.word __spl_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "spl" -.align 5 - -/* ncm content header */ -.word __ncm_kip_start__ -.word __ncm_kip_size__ -.byte CONTENT_TYPE_KIP -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "NCM" -.align 5 - -/* emummc content header */ -.word __emummc_kip_start__ -.word __emummc_kip_size__ -.byte CONTENT_TYPE_EMC -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "emummc" -.align 5 - -/* exosphere mariko fatal program content header */ -.word __mariko_fatal_bin_start__ -.word __mariko_fatal_bin_size__ -.byte CONTENT_TYPE_EXF -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "exosphere_fatal" -.align 5 - -/* tsec_keygen content header */ -.word __tsec_keygen_bin_start__ -.word __tsec_keygen_bin_size__ -.byte CONTENT_TYPE_TKG -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.byte CONTENT_FLAG_NONE -.word 0xCCCCCCCC -.asciz "tsec_keygen" -.align 5 - -_content_headers_end: - -/* No need to include this in normal programs: */ -.section .chainloader.text.start, "ax", %progbits -.arm -.align 5 -.global relocate_and_chainload -.type relocate_and_chainload, %function -relocate_and_chainload: - ldr sp, =__stack_top__ - b relocate_and_chainload_main - -.section .nxboot.text.start, "ax", %progbits -.arm -.align 5 -.global nxboot -.type nxboot, %function -nxboot: - ldr sp, =__stack_top__ - b nxboot_finish \ No newline at end of file diff --git a/fusee/fusee-secondary/src/stratosphere.c b/fusee/fusee-secondary/src/stratosphere.c deleted file mode 100644 index e1e718d20..000000000 --- a/fusee/fusee-secondary/src/stratosphere.c +++ /dev/null @@ -1,421 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include -#include -#include -#include "exocfg.h" -#include "utils.h" -#include "package2.h" -#include "stratosphere.h" -#include "fs_utils.h" -#include "ips.h" -#include "../../../fusee/common/log.h" - -#define u8 uint8_t -#define u32 uint32_t -#include "loader_kip.h" -#include "ncm_kip.h" -#include "pm_kip.h" -#include "sm_kip.h" -#include "ams_mitm_kip.h" -#include "boot_kip.h" -#include "spl_kip.h" -#undef u8 -#undef u32 - -static ini1_header_t *g_stratosphere_ini1 = NULL; -static ini1_header_t *g_sd_files_ini1 = NULL; - -static bool g_stratosphere_loader_enabled = true; -static bool g_stratosphere_sm_enabled = true; -static bool g_stratosphere_pm_enabled = true; -static bool g_stratosphere_ams_mitm_enabled = true; -static bool g_stratosphere_spl_enabled = true; -static bool g_stratosphere_boot_enabled = true; -static bool g_stratosphere_ncm_enabled = true; - -extern const uint8_t loader_kip[], pm_kip[], sm_kip[], spl_kip[], boot_kip[], ncm_kip[], ams_mitm_kip[]; - -static emummc_fs_ver_t g_fs_ver = FS_VER_1_0_0; - -emummc_fs_ver_t stratosphere_get_fs_version(void) { - return g_fs_ver; -} - -void stratosphere_disable_ncm(void) { - /* The Atmosphere team believes our implementation of NCM to be extremely accurate, */ - /* and does not think it likely there is any possibility of undesirable behavior */ - /* when using the NCM reimplementation. However, because NCM manages critical save games */ - /* the implementation may be optionally disabled for those not comfortable using it. */ - - - /* PLEASE NOTE: The NCM reimplementation has been well-tested, and correspondingly opt-out */ - /* functionality will be removed in Atmosphere 1.0.0. */ - - g_stratosphere_ncm_enabled = false; -} - -/* GCC doesn't consider the size as const... we have to write it ourselves. */ - -ini1_header_t *stratosphere_get_ini1(uint32_t target_firmware) { - uint32_t num_processes = 0; - uint8_t *data; - - if (g_stratosphere_ini1 != NULL) { - return g_stratosphere_ini1; - } - - size_t size = sizeof(ini1_header_t); - - /* Calculate our processes' sizes. */ - if (g_stratosphere_loader_enabled) { - size += loader_kip_size; - num_processes++; - } - - if (g_stratosphere_pm_enabled) { - size += pm_kip_size; - num_processes++; - } - - if (g_stratosphere_sm_enabled) { - size += sm_kip_size; - num_processes++; - } - - if (g_stratosphere_spl_enabled) { - size += spl_kip_size; - num_processes++; - } - - if (g_stratosphere_ams_mitm_enabled) { - size += ams_mitm_kip_size; - num_processes++; - } - - if (g_stratosphere_ncm_enabled) { - size += ncm_kip_size; - num_processes++; - } - - if (g_stratosphere_boot_enabled) { - size += boot_kip_size; - num_processes++; - } - - g_stratosphere_ini1 = (ini1_header_t *)malloc(size); - - if (g_stratosphere_ini1 == NULL) { - fatal_error("stratosphere_get_ini1: out of memory!\n"); - } - - g_stratosphere_ini1->magic = MAGIC_INI1; - g_stratosphere_ini1->size = size; - g_stratosphere_ini1->num_processes = num_processes; - g_stratosphere_ini1->_0xC = 0; - - data = g_stratosphere_ini1->kip_data; - - /* Copy our processes. */ - if (g_stratosphere_loader_enabled) { - memcpy(data, loader_kip, loader_kip_size); - data += loader_kip_size; - } - - if (g_stratosphere_pm_enabled) { - memcpy(data, pm_kip, pm_kip_size); - data += pm_kip_size; - } - - if (g_stratosphere_sm_enabled) { - memcpy(data, sm_kip, sm_kip_size); - data += sm_kip_size; - } - - if (g_stratosphere_spl_enabled) { - memcpy(data, spl_kip, spl_kip_size); - data += spl_kip_size; - } - - if (g_stratosphere_ncm_enabled) { - memcpy(data, ncm_kip, ncm_kip_size); - data += ncm_kip_size; - } - - if (g_stratosphere_ams_mitm_enabled) { - memcpy(data, ams_mitm_kip, ams_mitm_kip_size); - data += ams_mitm_kip_size; - } - - if (g_stratosphere_boot_enabled) { - memcpy(data, boot_kip, boot_kip_size); - data += boot_kip_size; - } - - return g_stratosphere_ini1; -} - -void stratosphere_free_ini1(void) { - if (g_stratosphere_ini1 != NULL) { - free(g_stratosphere_ini1); - g_stratosphere_ini1 = NULL; - } - if (g_sd_files_ini1 != NULL) { - free(g_sd_files_ini1); - g_sd_files_ini1 = NULL; - } -} - -static void try_add_sd_kip(ini1_header_t *ini1, const char *kip_path) { - size_t file_size = get_file_size(kip_path); - - if (ini1->size + file_size > PACKAGE2_SIZE_MAX) { - fatal_error("Failed to load %s: INI1 would be too large!\n", kip_path); - } - - kip1_header_t kip_header; - if (read_from_file(&kip_header, sizeof(kip_header), kip_path) != sizeof(kip_header) || kip_header.magic != MAGIC_KIP1) { - return; - } - - size_t kip_size = kip1_get_size_from_header(&kip_header); - if (kip_size > file_size) { - fatal_error("Failed to load %s: KIP size is corrupt!\n", kip_path); - } - - if (read_from_file(ini1->kip_data + ini1->size - sizeof(ini1_header_t), kip_size, kip_path) != kip_size) { - /* TODO: is this error fatal? */ - return; - } - - ini1->size += kip_size; - ini1->num_processes++; -} - -static kip1_header_t *inject_emummc_kip(kip1_header_t *fs_kip, kip1_header_t *emummc_kip) { - /* Ensure KIPs are uncompressed. */ - size_t fs_kip_size, emummc_kip_size; - fs_kip = kip1_uncompress(fs_kip, &fs_kip_size); - emummc_kip = kip1_uncompress(emummc_kip, &emummc_kip_size); - - /* Allocate kip. */ - kip1_header_t *injected_kip = calloc(1, fs_kip_size + emummc_kip_size); - if (injected_kip == NULL) { - fatal_error("Failed to allocate memory for emummc kip injection!"); - } - memcpy(injected_kip, fs_kip, sizeof(*fs_kip)); - - const size_t fs_contents_size = kip1_get_size_from_header(fs_kip) - sizeof(kip1_header_t); - - const size_t emummc_data_size = emummc_kip->section_headers[3].out_offset + emummc_kip->section_headers[3].out_size; - if (emummc_data_size & 0xFFF) { - fatal_error("Invalid emummc kip!"); - } - - /* Copy over capabilities. */ - memcpy(injected_kip->capabilities, emummc_kip->capabilities, sizeof(emummc_kip->capabilities)); - - /* Add extra cap for 1.0.0 */ - if (stratosphere_get_fs_version() == FS_VER_1_0_0) { - for (size_t i = 0; i < 0x20; i++) { - if (injected_kip->capabilities[i] == 0xFFFFFFFF) { - /* Map PMC registers in. */ - injected_kip->capabilities[i] = 0x07000E7F; - break; - } - } - } - - /* Update sections. */ - injected_kip->section_headers[0].out_size += emummc_data_size; - injected_kip->section_headers[0].compressed_size += emummc_data_size; - for (size_t i = 1; i < 4; i++) { - injected_kip->section_headers[i].out_offset += emummc_data_size; - } - - /* Copy data. */ - { - size_t ofs = 0; - for (size_t i = 0; i < 3; i++) { - memcpy(injected_kip->data + emummc_kip->section_headers[i].out_offset, emummc_kip->data + ofs, emummc_kip->section_headers[i].compressed_size); - ofs += emummc_kip->section_headers[i].compressed_size; - } - } - memcpy(injected_kip->data + emummc_data_size, fs_kip->data, fs_contents_size); - - return injected_kip; -} - -ini1_header_t *stratosphere_get_sd_files_ini1(void) { - if (g_sd_files_ini1 != NULL) { - return g_sd_files_ini1; - } - - /* Allocate space. */ - g_sd_files_ini1 = (ini1_header_t *)malloc(PACKAGE2_SIZE_MAX); - g_sd_files_ini1->magic = MAGIC_INI1; - g_sd_files_ini1->size = sizeof(ini1_header_t); - g_sd_files_ini1->num_processes = 0; - g_sd_files_ini1->_0xC = 0; - - /* Load all kips from /atmosphere/kips/<*>.kip or /atmosphere/kips/<*>/<*>.kip. */ - DIR *kips_dir = opendir("atmosphere/kips"); - struct dirent *ent; - if (kips_dir != NULL) { - while ((ent = readdir(kips_dir)) != NULL) { - if (strcmp(ent->d_name, ".") == 0 || strcmp(ent->d_name, "..") == 0) { - continue; - } - - char kip_path[0x301] = {0}; - snprintf(kip_path, 0x300, "atmosphere/kips/%s", ent->d_name); - - struct stat kip_stat; - if (stat(kip_path, &kip_stat) == -1) { - continue; - } - - if ((kip_stat.st_mode & S_IFMT) == S_IFREG) { - /* If file, add to ini1. */ - try_add_sd_kip(g_sd_files_ini1, kip_path); - } else if ((kip_stat.st_mode & S_IFMT) == S_IFDIR) { - /* Otherwise, allow one level of nesting. */ - DIR *sub_dir = opendir(kip_path); - struct dirent *sub_ent; - if (sub_dir != NULL) { - while ((sub_ent = readdir(sub_dir)) != NULL) { - if (strcmp(sub_ent->d_name, ".") == 0 || strcmp(sub_ent->d_name, "..") == 0) { - continue; - } - - /* Reuse kip path variable. */ - memset(kip_path, 0, sizeof(kip_path)); - snprintf(kip_path, 0x300, "atmosphere/kips/%s/%s", ent->d_name, sub_ent->d_name); - - if (stat(kip_path, &kip_stat) == -1) { - continue; - } - - if ((kip_stat.st_mode & S_IFMT) == S_IFREG) { - /* If file, add to ini1. */ - try_add_sd_kip(g_sd_files_ini1, kip_path); - } - } - closedir(sub_dir); - } - } - } - closedir(kips_dir); - } - - return g_sd_files_ini1; -} - -/* Merges some number of INI1s into a single INI1. It's assumed that the INIs are in order of preference. */ -ini1_header_t *stratosphere_merge_inis(ini1_header_t **inis, size_t num_inis, void *emummc, size_t emummc_size) { - uint32_t total_num_processes = 0; - - /* Validate all ini headers. */ - for (size_t i = 0; i < num_inis; i++) { - if (inis[i] == NULL || inis[i]->magic != MAGIC_INI1 || inis[i]->num_processes > INI1_MAX_KIPS) { - fatal_error("INI1s[%d] section appears to not contain an INI1!\n", i); - } else { - total_num_processes += inis[i]->num_processes; - } - } - - if (total_num_processes > INI1_MAX_KIPS) { - fatal_error("The resulting INI1 would have too many KIPs!\n"); - } - - uint64_t process_list[INI1_MAX_KIPS] = {0}; - ini1_header_t *merged = (ini1_header_t *)malloc(PACKAGE2_SIZE_MAX); /* because of SD file overrides */ - - if (merged == NULL) { - fatal_error("stratosphere_merge_inis: out of memory!\n"); - } - - merged->magic = MAGIC_INI1; - merged->num_processes = 0; - merged->_0xC = 0; - size_t remaining_size = PACKAGE2_SIZE_MAX - sizeof(ini1_header_t); - - unsigned char *current_dst_kip = merged->kip_data; - - /* Actually merge into the inis. */ - for (size_t i = 0; i < num_inis; i++) { - size_t offset = 0; - for (size_t p = 0; p < (size_t)inis[i]->num_processes; p++) { - kip1_header_t *current_kip = (kip1_header_t *)(inis[i]->kip_data + offset); - if (current_kip->magic != MAGIC_KIP1) { - fatal_error("INI1s[%zu][%zu] appears not to be a KIP1!\n", i, p); - } - - offset += kip1_get_size_from_header(current_kip); - - bool already_loaded = false; - for (uint32_t j = 0; j < merged->num_processes; j++) { - if (process_list[j] == current_kip->title_id) { - already_loaded = true; - break; - } - } - if (already_loaded) { - continue; - } - - print(SCREEN_LOG_LEVEL_MANDATORY, "[NXBOOT]: Loading KIP %08x%08x...\n", (uint32_t)(current_kip->title_id >> 32), (uint32_t)current_kip->title_id); - - size_t current_kip_size = kip1_get_size_from_header(current_kip); - if (current_kip_size > remaining_size) { - fatal_error("Not enough space for all the KIP1s!\n"); - } - - kip1_header_t *patched_kip = apply_kip_ips_patches(current_kip, current_kip_size, &g_fs_ver); - - if (current_kip->title_id == FS_TITLE_ID && emummc != NULL) { - patched_kip = inject_emummc_kip(patched_kip != NULL ? patched_kip : current_kip, (kip1_header_t *)emummc); - } - - if (patched_kip != NULL) { - size_t patched_kip_size = kip1_get_size_from_header(patched_kip); - if (patched_kip_size > remaining_size) { - fatal_error("Not enough space for all the KIP1s! %08x %08x\n", remaining_size, patched_kip_size); - } - memcpy(current_dst_kip, patched_kip, patched_kip_size); - remaining_size -= patched_kip_size; - current_dst_kip += patched_kip_size; - - free(patched_kip); - } else { - memcpy(current_dst_kip, current_kip, current_kip_size); - remaining_size -= current_kip_size; - current_dst_kip += current_kip_size; - } - - process_list[merged->num_processes++] = current_kip->title_id; - } - } - merged->size = sizeof(ini1_header_t) + (uint32_t)(current_dst_kip - merged->kip_data); - if (merged->size & 3) { - merged->size = (merged->size + 3) & ~3; - } - - return merged; -} diff --git a/fusee/fusee-secondary/src/stratosphere.h b/fusee/fusee-secondary/src/stratosphere.h deleted file mode 100644 index de5693edd..000000000 --- a/fusee/fusee-secondary/src/stratosphere.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_STRATOSPHERE_H -#define FUSEE_STRATOSPHERE_H - -#include "utils.h" -#include "kip.h" -#include "exocfg.h" - -#define STRATOSPHERE_INI1_SDFILES 0x0 -#define STRATOSPHERE_INI1_EMBEDDED 0x1 -#define STRATOSPHERE_INI1_PACKAGE2 0x2 -#define STRATOSPHERE_INI1_MAX 0x3 - -ini1_header_t *stratosphere_get_ini1(uint32_t target_firmware); -ini1_header_t *stratosphere_get_sd_files_ini1(void); -void stratosphere_free_ini1(void); - -void stratosphere_disable_ncm(void); - -emummc_fs_ver_t stratosphere_get_fs_version(void); - -ini1_header_t *stratosphere_merge_inis(ini1_header_t **inis, unsigned int num_inis, void *emummc, size_t emummc_size); - -typedef struct { - bool has_nogc_config; - bool enable_nogc; - bool ncm_disabled; -} stratosphere_cfg_t; - -#define STRATOSPHERE_NOGC_KEY "nogc" -#define STRATOSPHERE_DISABLE_NCM_KEY "disable_ncm" - -#endif diff --git a/fusee/fusee-secondary/src/sysreg.h b/fusee/fusee-secondary/src/sysreg.h deleted file mode 100644 index 311945b4e..000000000 --- a/fusee/fusee-secondary/src/sysreg.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_SYSREG_H -#define FUSEE_SYSREG_H - -#include - -#define SYSREG_BASE 0x6000C000 -#define SB_BASE (SYSREG_BASE + 0x200) -#define EXCP_VEC_BASE 0x6000F000 - -#define MAKE_SYSREG(n) MAKE_REG32(SYSREG_BASE + n) -#define MAKE_SB_REG(n) MAKE_REG32(SB_BASE + n) -#define MAKE_EXCP_VEC_REG(n) MAKE_REG32(EXCP_VEC_BASE + n) - -#define AHB_ARBITRATION_DISABLE_0 MAKE_SYSREG(0x004) -#define AHB_ARBITRATION_XBAR_CTRL_0 MAKE_SYSREG(0x0E0) -#define AHB_AHB_SPARE_REG_0 MAKE_SYSREG(0x110) - -#define SB_CSR_0 MAKE_SB_REG(0x00) -#define SB_PIROM_START_0 MAKE_SB_REG(0x04) -#define SB_PFCFG_0 MAKE_SB_REG(0x08) -#define SB_SECURE_SPAREREG_0_0 MAKE_SB_REG(0x0C) -#define SB_SECURE_SPAREREG_1_0 MAKE_SB_REG(0x10) -#define SB_SECURE_SPAREREG_2_0 MAKE_SB_REG(0x14) -#define SB_SECURE_SPAREREG_3_0 MAKE_SB_REG(0x18) -#define SB_SECURE_SPAREREG_4_0 MAKE_SB_REG(0x1C) -#define SB_SECURE_SPAREREG_5_0 MAKE_SB_REG(0x20) -#define SB_SECURE_SPAREREG_6_0 MAKE_SB_REG(0x24) -#define SB_SECURE_SPAREREG_7_0 MAKE_SB_REG(0x28) -#define SB_AA64_RESET_LOW_0 MAKE_SB_REG(0x30) -#define SB_AA64_RESET_HIGH_0 MAKE_SB_REG(0x34) - -#endif diff --git a/fusee/fusee-secondary/src/timers.h b/fusee/fusee-secondary/src/timers.h deleted file mode 100644 index 84d6043aa..000000000 --- a/fusee/fusee-secondary/src/timers.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_TIMERS_H -#define FUSEE_TIMERS_H - -#include "utils.h" - -#define TIMERS_BASE 0x60005000 -#define MAKE_TIMERS_REG(n) MAKE_REG32(TIMERS_BASE + n) - -#define TIMERUS_CNTR_1US_0 MAKE_TIMERS_REG(0x10) -#define TIMERUS_USEC_CFG_0 MAKE_TIMERS_REG(0x14) -#define SHARED_INTR_STATUS_0 MAKE_TIMERS_REG(0x1A0) -#define SHARED_TIMER_SECURE_CFG_0 MAKE_TIMERS_REG(0x1A4) - -#define RTC_BASE 0x7000E000 -#define MAKE_RTC_REG(n) MAKE_REG32(RTC_BASE + n) - -#define RTC_SECONDS MAKE_RTC_REG(0x08) -#define RTC_SHADOW_SECONDS MAKE_RTC_REG(0x0C) -#define RTC_MILLI_SECONDS MAKE_RTC_REG(0x10) - -typedef struct { - uint32_t CONFIG; - uint32_t STATUS; - uint32_t COMMAND; - uint32_t PATTERN; -} watchdog_timers_t; - -#define GET_WDT(n) ((volatile watchdog_timers_t *)(TIMERS_BASE + 0x100 + 0x20 * n)) -#define WDT_REBOOT_PATTERN 0xC45A -#define GET_WDT_REBOOT_CFG_REG(n) MAKE_REG32(TIMERS_BASE + 0x60 + 0x8 * n) - -void wait(uint32_t microseconds); - -static inline uint32_t get_time_s(void) { - return RTC_SECONDS; -} - -static inline uint32_t get_time_ms(void) { - return (RTC_MILLI_SECONDS | (RTC_SHADOW_SECONDS << 10)); -} - -static inline uint32_t get_time_us(void) { - return TIMERUS_CNTR_1US_0; -} - -/** - * Returns the time in microseconds. - */ -static inline uint32_t get_time(void) { - return get_time_us(); -} - -/** - * Returns the number of microseconds that have passed since a given get_time(). - */ -static inline uint32_t get_time_since(uint32_t base) { - return get_time_us() - base; -} - -/** - * Delays for a given number of microseconds. - */ -static inline void udelay(uint32_t usecs) { - uint32_t start = get_time_us(); - while (get_time_us() - start < usecs); -} - -/** - * Delays until a number of usecs have passed since an absolute start time. - */ -static inline void udelay_absolute(uint32_t start, uint32_t usecs) { - while (get_time_us() - start < usecs); -} - -/** - * Delays for a given number of milliseconds. - */ -static inline void mdelay(uint32_t msecs) { - uint32_t start = get_time_ms(); - while (get_time_ms() - start < msecs); -} - -__attribute__ ((noreturn)) void watchdog_reboot(void); - -#endif diff --git a/fusee/fusee-secondary/src/tsec.c b/fusee/fusee-secondary/src/tsec.c deleted file mode 100644 index 9c0487ee2..000000000 --- a/fusee/fusee-secondary/src/tsec.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include "tsec.h" -#include "di.h" -#include "timers.h" -#include "car.h" -#include "mc.h" - -static int tsec_dma_wait_idle() -{ - volatile tegra_tsec_t *tsec = tsec_get_regs(); - uint32_t timeout = (get_time_ms() + 10000); - - while (!(tsec->TSEC_FALCON_DMATRFCMD & 2)) - { - if (get_time_ms() > timeout) - return 0; - } - - return 1; -} - -static int tsec_dma_phys_to_flcn(bool is_imem, uint32_t flcn_offset, uint32_t phys_offset) -{ - volatile tegra_tsec_t *tsec = tsec_get_regs(); - uint32_t cmd = 0; - - if (!is_imem) - cmd = 0x600; - else - cmd = 0x10; - - tsec->TSEC_FALCON_DMATRFMOFFS = flcn_offset; - tsec->TSEC_FALCON_DMATRFFBOFFS = phys_offset; - tsec->TSEC_FALCON_DMATRFCMD = cmd; - - return tsec_dma_wait_idle(); -} - -static int tsec_kfuse_wait_ready() -{ - uint32_t timeout = (get_time_ms() + 10000); - - /* Wait for STATE_DONE. */ - while (!(KFUSE_STATE & 0x10000)) - { - if (get_time_ms() > timeout) - return 0; - } - - /* Check for STATE_CRCPASS. */ - if (!(KFUSE_STATE & 0x20000)) - return 0; - - return 1; -} - -void tsec_enable_clkrst() -{ - /* Enable all devices used by TSEC. */ - clkrst_reboot(CARDEVICE_HOST1X); - clkrst_reboot(CARDEVICE_TSEC); - clkrst_reboot(CARDEVICE_SOR_SAFE); - clkrst_reboot(CARDEVICE_SOR0); - clkrst_reboot(CARDEVICE_SOR1); - clkrst_reboot(CARDEVICE_KFUSE); -} - -void tsec_disable_clkrst() -{ - /* Disable all devices used by TSEC. */ - clkrst_disable(CARDEVICE_KFUSE); - clkrst_disable(CARDEVICE_SOR1); - clkrst_disable(CARDEVICE_SOR0); - clkrst_disable(CARDEVICE_SOR_SAFE); - clkrst_disable(CARDEVICE_TSEC); - clkrst_disable(CARDEVICE_HOST1X); -} - -static int tsec_run_fw_impl(const void *tsec_fw, size_t tsec_fw_size) -{ - volatile tegra_tsec_t *tsec = tsec_get_regs(); - - /* Enable clocks. */ - tsec_enable_clkrst(); - - /* Make sure KFUSE is ready. */ - if (!tsec_kfuse_wait_ready()) - { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -1; - } - - /* Configure Falcon. */ - tsec->TSEC_FALCON_DMACTL = 0; - tsec->TSEC_FALCON_IRQMSET = 0xFFF2; - tsec->TSEC_FALCON_IRQDEST = 0xFFF0; - tsec->TSEC_FALCON_ITFEN = 3; - - /* Make sure the DMA block is idle. */ - if (!tsec_dma_wait_idle()) - { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -2; - } - - /* Load firmware. */ - tsec->TSEC_FALCON_DMATRFBASE = (uint32_t)tsec_fw >> 8; - for (uint32_t addr = 0; addr < tsec_fw_size; addr += 0x100) - { - if (!tsec_dma_phys_to_flcn(true, addr, addr)) - { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -3; - } - } - - /* Write magic value to HOST1X scratch register. */ - MAKE_HOST1X_REG(0x3300) = 0x34C2E1DA; - - /* Execute firmware. */ - tsec->TSEC_FALCON_MAILBOX1 = 0; - tsec->TSEC_FALCON_MAILBOX0 = 1; - tsec->TSEC_FALCON_BOOTVEC = 0; - tsec->TSEC_FALCON_CPUCTL = 2; - - /* Make sure the DMA block is idle. */ - if (!tsec_dma_wait_idle()) - { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -4; - } - - uint32_t timeout = (get_time_ms() + 4000); - while (!(tsec->TSEC_FALCON_CPUCTL & 0x10)) { - if (get_time_ms() > timeout) { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -5; - } - } - - if (tsec->TSEC_FALCON_MAILBOX1 != 0xB0B0B0B0) - { - /* Disable clocks. */ - tsec_disable_clkrst(); - - return -6; - } - - /* Clear magic value from HOST1X scratch register. */ - MAKE_HOST1X_REG(0x3300) = 0; - - return 0; -} - -int tsec_run_fw(const void *tsec_fw, size_t tsec_fw_size) { - /* Ensure that the ahb redirect is enabled. */ - mc_enable_ahb_redirect(); - - /* Get bom/tom */ - uint32_t bom = MAKE_MC_REG(MC_IRAM_BOM); - uint32_t tom = MAKE_MC_REG(MC_IRAM_TOM); - - /* Override the ahb redirect extents. */ - MAKE_MC_REG(MC_IRAM_BOM) = 0x40000000; - MAKE_MC_REG(MC_IRAM_TOM) = 0x80000000; - - /* Run the fw. */ - int res = tsec_run_fw_impl(tsec_fw, tsec_fw_size); - - /* Reset the ahb redirect extents. */ - MAKE_MC_REG(MC_IRAM_BOM) = bom; - MAKE_MC_REG(MC_IRAM_TOM) = tom; - - return res; -} \ No newline at end of file diff --git a/fusee/fusee-secondary/src/tsec.h b/fusee/fusee-secondary/src/tsec.h deleted file mode 100644 index 4833eccaa..000000000 --- a/fusee/fusee-secondary/src/tsec.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Copyright (c) 2018 naehrwert - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_TSEC_H_ -#define FUSEE_TSEC_H_ - -#include -#include - -#define TSEC_BASE 0x54500000 -#define SOR1_BASE 0x54580000 -#define KFUSE_BASE 0x7000FC00 - -#define SOR1_DP_HDCP_BKSV_LSB MAKE_REG32(SOR1_BASE + 0x1E8) -#define SOR1_TMDS_HDCP_BKSV_LSB MAKE_REG32(SOR1_BASE + 0x21C) -#define SOR1_TMDS_HDCP_CN_MSB MAKE_REG32(SOR1_BASE + 0x208) -#define SOR1_TMDS_HDCP_CN_LSB MAKE_REG32(SOR1_BASE + 0x20C) - -#define KFUSE_FUSECTRL MAKE_REG32(KFUSE_BASE + 0x00) -#define KFUSE_FUSEADDR MAKE_REG32(KFUSE_BASE + 0x04) -#define KFUSE_FUSEDATA0 MAKE_REG32(KFUSE_BASE + 0x08) -#define KFUSE_FUSEWRDATA0 MAKE_REG32(KFUSE_BASE + 0x0C) -#define KFUSE_FUSETIME_RD1 MAKE_REG32(KFUSE_BASE + 0x10) -#define KFUSE_FUSETIME_RD2 MAKE_REG32(KFUSE_BASE + 0x14) -#define KFUSE_FUSETIME_PGM1 MAKE_REG32(KFUSE_BASE + 0x18) -#define KFUSE_FUSETIME_PGM2 MAKE_REG32(KFUSE_BASE + 0x1C) -#define KFUSE_REGULATOR MAKE_REG32(KFUSE_BASE + 0x20) -#define KFUSE_PD MAKE_REG32(KFUSE_BASE + 0x24) -#define KFUSE_FUSETIME_RD3 MAKE_REG32(KFUSE_BASE + 0x28) -#define KFUSE_STATE MAKE_REG32(KFUSE_BASE + 0x80) -#define KFUSE_ERRCOUNT MAKE_REG32(KFUSE_BASE + 0x84) -#define KFUSE_KEYADDR MAKE_REG32(KFUSE_BASE + 0x88) -#define KFUSE_KEYS MAKE_REG32(KFUSE_BASE + 0x8C) - -typedef struct { - uint32_t TSEC_THI_INCR_SYNCPT; /* Tegra Host Interface registers. */ - uint32_t TSEC_THI_INCR_SYNCPT_CTRL; - uint32_t TSEC_THI_INCR_SYNCPT_ERR; - uint32_t TSEC_THI_CTXSW_INCR_SYNCPT; - uint32_t _0x10[0x4]; - uint32_t TSEC_THI_CTXSW; - uint32_t TSEC_THI_CTXSW_NEXT; - uint32_t TSEC_THI_CONT_SYNCPT_EOF; - uint32_t TSEC_THI_CONT_SYNCPT_L1; - uint32_t TSEC_THI_STREAMID0; - uint32_t TSEC_THI_STREAMID1; - uint32_t TSEC_THI_THI_SEC; - uint32_t _0x3C; - uint32_t TSEC_THI_METHOD0; - uint32_t TSEC_THI_METHOD1; - uint32_t _0x48[0x6]; - uint32_t TSEC_THI_CONTEXT_SWITCH; - uint32_t _0x64[0x5]; - uint32_t TSEC_THI_INT_STATUS; - uint32_t TSEC_THI_INT_MASK; - uint32_t TSEC_THI_CONFIG0; - uint32_t TSEC_THI_DBG_MISC; - uint32_t TSEC_THI_SLCG_OVERRIDE_HIGH_A; - uint32_t TSEC_THI_SLCG_OVERRIDE_LOW_A; - uint32_t _0x90[0x35C]; - uint32_t TSEC_THI_CLK_OVERRIDE; - uint32_t _0xE04[0x7F]; - uint32_t TSEC_FALCON_IRQSSET; /* Falcon microcontroller registers. */ - uint32_t TSEC_FALCON_IRQSCLR; - uint32_t TSEC_FALCON_IRQSTAT; - uint32_t TSEC_FALCON_IRQMODE; - uint32_t TSEC_FALCON_IRQMSET; - uint32_t TSEC_FALCON_IRQMCLR; - uint32_t TSEC_FALCON_IRQMASK; - uint32_t TSEC_FALCON_IRQDEST; - uint32_t TSEC_FALCON_GPTMRINT; - uint32_t TSEC_FALCON_GPTMRVAL; - uint32_t TSEC_FALCON_GPTMRCTL; - uint32_t TSEC_FALCON_PTIMER0; - uint32_t TSEC_FALCON_PTIMER1; - uint32_t TSEC_FALCON_WDTMRVAL; - uint32_t TSEC_FALCON_WDTMRCTL; - uint32_t TSEC_FALCON_IRQDEST2; - uint32_t TSEC_FALCON_MAILBOX0; - uint32_t TSEC_FALCON_MAILBOX1; - uint32_t TSEC_FALCON_ITFEN; - uint32_t TSEC_FALCON_IDLESTATE; - uint32_t TSEC_FALCON_CURCTX; - uint32_t TSEC_FALCON_NXTCTX; - uint32_t TSEC_FALCON_CTXACK; - uint32_t TSEC_FALCON_FHSTATE; - uint32_t TSEC_FALCON_PRIVSTATE; - uint32_t TSEC_FALCON_MTHDDATA; - uint32_t TSEC_FALCON_MTHDID; - uint32_t TSEC_FALCON_MTHDWDAT; - uint32_t TSEC_FALCON_MTHDCOUNT; - uint32_t TSEC_FALCON_MTHDPOP; - uint32_t TSEC_FALCON_MTHDRAMSZ; - uint32_t TSEC_FALCON_SFTRESET; - uint32_t TSEC_FALCON_OS; - uint32_t TSEC_FALCON_RM; - uint32_t TSEC_FALCON_SOFT_PM; - uint32_t TSEC_FALCON_SOFT_MODE; - uint32_t TSEC_FALCON_DEBUG1; - uint32_t TSEC_FALCON_DEBUGINFO; - uint32_t TSEC_FALCON_IBRKPT1; - uint32_t TSEC_FALCON_IBRKPT2; - uint32_t TSEC_FALCON_CGCTL; - uint32_t TSEC_FALCON_ENGCTL; - uint32_t TSEC_FALCON_PMM; - uint32_t TSEC_FALCON_ADDR; - uint32_t TSEC_FALCON_IBRKPT3; - uint32_t TSEC_FALCON_IBRKPT4; - uint32_t TSEC_FALCON_IBRKPT5; - uint32_t _0x10BC[0x5]; - uint32_t TSEC_FALCON_EXCI; - uint32_t TSEC_FALCON_SVEC_SPR; - uint32_t TSEC_FALCON_RSTAT0; - uint32_t TSEC_FALCON_RSTAT3; - uint32_t _0x10E0[0x8]; - uint32_t TSEC_FALCON_CPUCTL; - uint32_t TSEC_FALCON_BOOTVEC; - uint32_t TSEC_FALCON_HWCFG; - uint32_t TSEC_FALCON_DMACTL; - uint32_t TSEC_FALCON_DMATRFBASE; - uint32_t TSEC_FALCON_DMATRFMOFFS; - uint32_t TSEC_FALCON_DMATRFCMD; - uint32_t TSEC_FALCON_DMATRFFBOFFS; - uint32_t TSEC_FALCON_DMAPOLL_FB; - uint32_t TSEC_FALCON_DMAPOLL_CP; - uint32_t TSEC_FALCON_DBG_STATE; - uint32_t TSEC_FALCON_HWCFG1; - uint32_t TSEC_FALCON_CPUCTL_ALIAS; - uint32_t _0x1134; - uint32_t TSEC_FALCON_STACKCFG; - uint32_t _0x113C; - uint32_t TSEC_FALCON_IMCTL; - uint32_t TSEC_FALCON_IMSTAT; - uint32_t TSEC_FALCON_TRACEIDX; - uint32_t TSEC_FALCON_TRACEPC; - uint32_t TSEC_FALCON_IMFILLRNG0; - uint32_t TSEC_FALCON_IMFILLRNG1; - uint32_t TSEC_FALCON_IMFILLCTL; - uint32_t TSEC_FALCON_IMCTL_DEBUG; - uint32_t TSEC_FALCON_CMEMBASE; - uint32_t TSEC_FALCON_DMEMAPERT; - uint32_t TSEC_FALCON_EXTERRADDR; - uint32_t TSEC_FALCON_EXTERRSTAT; - uint32_t _0x1170[0x3]; - uint32_t TSEC_FALCON_CG2; - uint32_t TSEC_FALCON_IMEMC0; - uint32_t TSEC_FALCON_IMEMD0; - uint32_t TSEC_FALCON_IMEMT0; - uint32_t _0x118C; - uint32_t TSEC_FALCON_IMEMC1; - uint32_t TSEC_FALCON_IMEMD1; - uint32_t TSEC_FALCON_IMEMT1; - uint32_t _0x119C; - uint32_t TSEC_FALCON_IMEMC2; - uint32_t TSEC_FALCON_IMEMD2; - uint32_t TSEC_FALCON_IMEMT2; - uint32_t _0x11AC; - uint32_t TSEC_FALCON_IMEMC3; - uint32_t TSEC_FALCON_IMEMD3; - uint32_t TSEC_FALCON_IMEMT3; - uint32_t _0x11BC; - uint32_t TSEC_FALCON_DMEMC0; - uint32_t TSEC_FALCON_DMEMD0; - uint32_t TSEC_FALCON_DMEMC1; - uint32_t TSEC_FALCON_DMEMD1; - uint32_t TSEC_FALCON_DMEMC2; - uint32_t TSEC_FALCON_DMEMD2; - uint32_t TSEC_FALCON_DMEMC3; - uint32_t TSEC_FALCON_DMEMD3; - uint32_t TSEC_FALCON_DMEMC4; - uint32_t TSEC_FALCON_DMEMD4; - uint32_t TSEC_FALCON_DMEMC5; - uint32_t TSEC_FALCON_DMEMD5; - uint32_t TSEC_FALCON_DMEMC6; - uint32_t TSEC_FALCON_DMEMD6; - uint32_t TSEC_FALCON_DMEMC7; - uint32_t TSEC_FALCON_DMEMD7; - uint32_t TSEC_FALCON_ICD_CMD; - uint32_t TSEC_FALCON_ICD_ADDR; - uint32_t TSEC_FALCON_ICD_WDATA; - uint32_t TSEC_FALCON_ICD_RDATA; - uint32_t _0x1210[0xC]; - uint32_t TSEC_FALCON_SCTL; - uint32_t TSEC_FALCON_SSTAT; - uint32_t _0x1248[0xE]; - uint32_t TSEC_FALCON_SPROT_IMEM; - uint32_t TSEC_FALCON_SPROT_DMEM; - uint32_t TSEC_FALCON_SPROT_CPUCTL; - uint32_t TSEC_FALCON_SPROT_MISC; - uint32_t TSEC_FALCON_SPROT_IRQ; - uint32_t TSEC_FALCON_SPROT_MTHD; - uint32_t TSEC_FALCON_SPROT_SCTL; - uint32_t TSEC_FALCON_SPROT_WDTMR; - uint32_t _0x12A0[0x8]; - uint32_t TSEC_FALCON_DMAINFO_FINISHED_FBRD_LOW; - uint32_t TSEC_FALCON_DMAINFO_FINISHED_FBRD_HIGH; - uint32_t TSEC_FALCON_DMAINFO_FINISHED_FBWR_LOW; - uint32_t TSEC_FALCON_DMAINFO_FINISHED_FBWR_HIGH; - uint32_t TSEC_FALCON_DMAINFO_CURRENT_FBRD_LOW; - uint32_t TSEC_FALCON_DMAINFO_CURRENT_FBRD_HIGH; - uint32_t TSEC_FALCON_DMAINFO_CURRENT_FBWR_LOW; - uint32_t TSEC_FALCON_DMAINFO_CURRENT_FBWR_HIGH; - uint32_t TSEC_FALCON_DMAINFO_CTL; - uint32_t _0x12E4[0x47]; - uint32_t TSEC_SCP_CTL0; /* Secure Co-processor registers. */ - uint32_t TSEC_SCP_CTL1; - uint32_t TSEC_SCP_CTL_STAT; - uint32_t TSEC_SCP_CTL_LOCK; - uint32_t TSEC_SCP_CFG; - uint32_t TSEC_SCP_CTL_SCP; - uint32_t TSEC_SCP_CTL_PKEY; - uint32_t TSEC_SCP_CTL_DBG; - uint32_t TSEC_SCP_DBG0; - uint32_t TSEC_SCP_DBG1; - uint32_t TSEC_SCP_DBG2; - uint32_t _0x142C; - uint32_t TSEC_SCP_CMD; - uint32_t _0x1434[0x7]; - uint32_t TSEC_SCP_STAT0; - uint32_t TSEC_SCP_STAT1; - uint32_t TSEC_SCP_STAT2; - uint32_t _0x145C[0x5]; - uint32_t TSEC_SCP_RND_STAT0; - uint32_t TSEC_SCP_RND_STAT1; - uint32_t _0x1478[0x2]; - uint32_t TSEC_SCP_IRQSTAT; - uint32_t TSEC_SCP_IRQMASK; - uint32_t _0x1488[0x2]; - uint32_t TSEC_SCP_ACL_ERR; - uint32_t TSEC_SCP_SEC_ERR; - uint32_t TSEC_SCP_CMD_ERR; - uint32_t _0x149C[0x19]; - uint32_t TSEC_RND_CTL0; /* Random Number Generator registers. */ - uint32_t TSEC_RND_CTL1; - uint32_t TSEC_RND_CTL2; - uint32_t TSEC_RND_CTL3; - uint32_t TSEC_RND_CTL4; - uint32_t TSEC_RND_CTL5; - uint32_t TSEC_RND_CTL6; - uint32_t TSEC_RND_CTL7; - uint32_t TSEC_RND_CTL8; - uint32_t TSEC_RND_CTL9; - uint32_t TSEC_RND_CTL10; - uint32_t TSEC_RND_CTL11; - uint32_t _0x1530[0x34]; - uint32_t TSEC_TFBIF_CTL; /* Tegra Framebuffer Interface registers. */ - uint32_t TSEC_TFBIF_MCCIF_FIFOCTRL; - uint32_t TSEC_TFBIF_THROTTLE; - uint32_t TSEC_TFBIF_DBG_STAT0; - uint32_t TSEC_TFBIF_DBG_STAT1; - uint32_t TSEC_TFBIF_DBG_RDCOUNT_LO; - uint32_t TSEC_TFBIF_DBG_RDCOUNT_HI; - uint32_t TSEC_TFBIF_DBG_WRCOUNT_LO; - uint32_t TSEC_TFBIF_DBG_WRCOUNT_HI; - uint32_t TSEC_TFBIF_DBG_R32COUNT; - uint32_t TSEC_TFBIF_DBG_R64COUNT; - uint32_t TSEC_TFBIF_DBG_R128COUNT; - uint32_t _0x1630; - uint32_t TSEC_TFBIF_MCCIF_FIFOCTRL1; - uint32_t TSEC_TFBIF_WRR_RDP; - uint32_t _0x163C; - uint32_t TSEC_TFBIF_SPROT_EMEM; - uint32_t TSEC_TFBIF_TRANSCFG; - uint32_t TSEC_TFBIF_REGIONCFG; - uint32_t TSEC_TFBIF_ACTMON_ACTIVE_MASK; - uint32_t TSEC_TFBIF_ACTMON_ACTIVE_BORPS; - uint32_t TSEC_TFBIF_ACTMON_ACTIVE_WEIGHT; - uint32_t _0x1658[0x2]; - uint32_t TSEC_TFBIF_ACTMON_MCB_MASK; - uint32_t TSEC_TFBIF_ACTMON_MCB_BORPS; - uint32_t TSEC_TFBIF_ACTMON_MCB_WEIGHT; - uint32_t _0x166C; - uint32_t TSEC_TFBIF_THI_TRANSPROP; - uint32_t _0x1674[0x17]; - uint32_t TSEC_CG; /* Clock Gate registers. */ - uint32_t _0x16D4[0xB]; - uint32_t TSEC_BAR0_CTL; /* HOST1X device DMA registers. */ - uint32_t TSEC_BAR0_ADDR; - uint32_t TSEC_BAR0_DATA; - uint32_t TSEC_BAR0_TIMEOUT; - uint32_t _0x1710[0x3C]; - uint32_t TSEC_TEGRA_FALCON_IP_VER; /* Miscellaneous registers. */ - uint32_t _0x1804[0xD]; - uint32_t TSEC_TEGRA_CTL; - uint32_t _0x183C[0x31]; -} tegra_tsec_t; - -static inline volatile tegra_tsec_t *tsec_get_regs(void) -{ - return (volatile tegra_tsec_t *)TSEC_BASE; -} - -void tsec_enable_clkrst(); -void tsec_disable_clkrst(); - -int tsec_run_fw(const void *tsec_fw, size_t tsec_fw_size); - -#endif \ No newline at end of file diff --git a/fusee/fusee-secondary/src/utils.c b/fusee/fusee-secondary/src/utils.c deleted file mode 100644 index 095759e05..000000000 --- a/fusee/fusee-secondary/src/utils.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#include -#include -#include "utils.h" -#include "se.h" -#include "fuse.h" -#include "pmc.h" -#include "car.h" -#include "timers.h" -#include "btn.h" -#include "i2c.h" -#include "panic.h" -#include "max77620.h" -#include "../../../fusee/common/log.h" - -#include -#include - -#define u8 uint8_t -#define u32 uint32_t -#include "fusee_primary_bin.h" -#include "rebootstub_bin.h" -#undef u8 -#undef u32 - -static bool is_soc_mariko(void) { - return fuse_get_soc_type() == 1; -} - -__attribute__((noreturn)) static void shutdown_system(bool reboot) { - /* Ensure that i2c5 is in a coherent state. */ - i2c_config(I2C_5); - clkrst_reboot(CARDEVICE_I2C5); - i2c_init(I2C_5); - - /* Get value, set or clear software reset mask. */ - uint8_t on_off_2_val = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, &on_off_2_val, 1); - if (reboot) { - on_off_2_val |= MAX77620_ONOFFCNFG2_SFT_RST_WK; - } else { - on_off_2_val &= ~(MAX77620_ONOFFCNFG2_SFT_RST_WK); - } - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, &on_off_2_val, 1); - - /* Set software reset mask. */ - uint8_t on_off_1_val = 0; - i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &on_off_1_val, 1); - on_off_1_val |= MAX77620_ONOFFCNFG1_SFT_RST; - i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, &on_off_1_val, 1); - - while (true) { - /* Wait for reboot. */ - } -} - -void wait(uint32_t microseconds) { - uint32_t old_time = TIMERUS_CNTR_1US_0; - while (TIMERUS_CNTR_1US_0 - old_time <= microseconds) { - /* Spin-lock. */ - } -} - -__attribute__((noreturn)) void watchdog_reboot(void) { - volatile watchdog_timers_t *wdt = GET_WDT(4); - wdt->PATTERN = WDT_REBOOT_PATTERN; - wdt->COMMAND = 2; /* Disable Counter. */ - GET_WDT_REBOOT_CFG_REG(4) = 0xC0000000; - wdt->CONFIG = 0x8019; /* Full System Reset after Fourth Counter expires, using TIMER(9). */ - wdt->COMMAND = 1; /* Enable Counter. */ - while (true) { - /* Wait for reboot. */ - } -} - -__attribute__((noreturn)) void pmc_reboot(uint32_t scratch0) { - APBDEV_PMC_SCRATCH0_0 = scratch0; - - /* Reset the processor. */ - APBDEV_PMC_CONTROL = BIT(4); - while (true) { - /* Wait for reboot. */ - } -} - -__attribute__((noreturn)) static void reboot_to_payload(void) { - if (is_soc_mariko()) { - /* Reboot to payload isn't possible on mariko, so just do normal reboot. */ - shutdown_system(true); - } else { - /* Patch SDRAM init to perform an SVC immediately after second write */ - APBDEV_PMC_SCRATCH45_0 = 0x2E38DFFF; - APBDEV_PMC_SCRATCH46_0 = 0x6001DC28; - /* Set SVC handler to jump to reboot stub in IRAM. */ - APBDEV_PMC_SCRATCH33_0 = 0x4003F000; - APBDEV_PMC_SCRATCH40_0 = 0x6000F208; - - /* Copy reboot stub into IRAM high. */ - for (size_t i = 0; i < rebootstub_bin_size; i += sizeof(uint32_t)) { - write32le((void *)0x4003F000, i, read32le(rebootstub_bin, i)); - } - - /* Trigger warm reboot. */ - pmc_reboot(1 << 0); - while (true) { } - } -} - -__attribute__((noreturn)) void reboot_to_fusee_primary(void) { - /* Copy fusee-primary into IRAM low. */ - for (size_t i = 0; i < fusee_primary_bin_size; i += sizeof(uint32_t)) { - write32le((void *)0x40010000, i, read32le(fusee_primary_bin, i)); - } - - reboot_to_payload(); -} - -__attribute__((noreturn)) void reboot_to_iram_payload(void *payload, size_t payload_size) { - /* Copy payload into IRAM low. */ - for (size_t i = 0; i < payload_size; i += sizeof(uint32_t)) { - write32le((void *)0x40010000, i, read32le(payload, i)); - } - - reboot_to_payload(); -} - -__attribute__((noreturn)) void wait_for_button_and_reboot(void) { - uint32_t button; - while (true) { - button = btn_read(); - if (button & BTN_POWER) { - reboot_to_fusee_primary(); - } - } -} - -void wait_for_button(void) { - uint32_t button; - while (true) { - button = btn_read(); - if (button) { - return; - } - } -} - -__attribute__ ((noreturn)) void generic_panic(void) { - panic(0xFF000006); -} - -__attribute__((noreturn)) void fatal_error(const char *fmt, ...) { - /* Override the global logging level. */ - log_set_log_level(SCREEN_LOG_LEVEL_ERROR); - - /* Display fatal error. */ - va_list args; - print(SCREEN_LOG_LEVEL_ERROR, "Fatal error: "); - va_start(args, fmt); - vprint(SCREEN_LOG_LEVEL_ERROR, fmt, args); - va_end(args); - print(SCREEN_LOG_LEVEL_ERROR | SCREEN_LOG_LEVEL_NO_PREFIX, "\n Press POWER to reboot.\n"); - - /* Wait for button and reboot. */ - wait_for_button_and_reboot(); -} - -__attribute__((noinline)) bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be) -{ - if(as <= bs && bs < ae) - return true; - if(bs <= as && as < be) - return true; - return false; -} diff --git a/fusee/fusee-secondary/src/utils.h b/fusee/fusee-secondary/src/utils.h deleted file mode 100644 index 1f517b624..000000000 --- a/fusee/fusee-secondary/src/utils.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (c) 2018-2020 Atmosphère-NX - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef FUSEE_UTILS_H -#define FUSEE_UTILS_H - -#include -#include -#include -#include - -#define BIT(n) (1u << (n)) -#define BITL(n) (1ull << (n)) -#define MASK(n) (BIT(n) - 1) -#define MASKL(n) (BITL(n) - 1) -#define MASK2(a,b) (MASK(a) & ~MASK(b)) -#define MASK2L(a,b) (MASKL(a) & ~MASKL(b)) - -#define MAKE_REG32(a) (*(volatile uint32_t *)(a)) - -#define ALIGN(m) __attribute__((aligned(m))) -#define PACKED __attribute__((packed)) - -#define ALINLINE __attribute__((always_inline)) -#define NOINLINE __attribute__((noinline)) - -#define SET_SYSREG(reg, val) do { temp_reg = (val); __asm__ __volatile__ ("msr " #reg ", %0" :: "r"(temp_reg) : "memory"); } while(false) - -static inline uintptr_t get_physical_address(const void *addr) { - return (uintptr_t)addr; -} - -static inline uint32_t read32le(const volatile void *dword, size_t offset) { - uintptr_t addr = (uintptr_t)dword + offset; - volatile uint32_t *target = (uint32_t *)addr; - return *target; -} - -static inline uint32_t read32be(const volatile void *dword, size_t offset) { - return __builtin_bswap32(read32le(dword, offset)); -} - -static inline uint64_t read64le(const volatile void *qword, size_t offset) { - uintptr_t addr = (uintptr_t)qword + offset; - volatile uint64_t *target = (uint64_t *)addr; - return *target; -} - -static inline uint64_t read64be(const volatile void *qword, size_t offset) { - return __builtin_bswap64(read64le(qword, offset)); -} - -static inline void write32le(volatile void *dword, size_t offset, uint32_t value) { - uintptr_t addr = (uintptr_t)dword + offset; - volatile uint32_t *target = (uint32_t *)addr; - *target = value; -} - -static inline void write32be(volatile void *dword, size_t offset, uint32_t value) { - write32le(dword, offset, __builtin_bswap32(value)); -} - -static inline void write64le(volatile void *qword, size_t offset, uint64_t value) { - uintptr_t addr = (uintptr_t)qword + offset; - volatile uint64_t *target = (uint64_t *)addr; - *target = value; -} - -static inline void write64be(volatile void *qword, size_t offset, uint64_t value) { - write64le(qword, offset, __builtin_bswap64(value)); -} - -static inline bool check_32bit_additive_overflow(uint32_t a, uint32_t b) { - return __builtin_add_overflow_p(a, b, (uint32_t)0); -} - -static inline bool check_32bit_address_loadable(uintptr_t addr) { - /* FWIW the bootROM forbids loading anything between 0x40000000 and 0x40010000, using it for itself... */ - return (addr >= 0x40010000u && addr < 0x40040000u) || addr >= 0x80000000u; -} - -static inline bool check_32bit_address_range_loadable(uintptr_t addr, size_t size) { - return - !__builtin_add_overflow_p(addr, size, (uintptr_t)0) && /* the range doesn't overflow */ - check_32bit_address_loadable(addr) && check_32bit_address_loadable(addr + size) && /* bounds are valid */ - !(addr >= 0x40010000u && addr < 0x40040000u && addr + size >= 0x40040000u) /* the range doesn't cross MMIO */ - ; -} - -bool overlaps(uint64_t as, uint64_t ae, uint64_t bs, uint64_t be); -static inline bool overlaps_a(const void *as, const void *ae, const void *bs, const void *be) { - return overlaps((uint64_t)(uintptr_t)as, (uint64_t)(uintptr_t)ae, (uint64_t)(uintptr_t)bs, (uint64_t)(uintptr_t)be); -} - -static inline bool check_32bit_address_range_in_program(uintptr_t addr, size_t size) { - extern uint8_t __chainloader_start__[], __chainloader_end__[]; - extern uint8_t __stack_bottom__[], __stack_top__[]; - extern uint8_t __heap_start__[], __heap_end__[]; - extern uint8_t __start__[], __end__[]; - uint8_t *start = (uint8_t *)addr, *end = start + size; - - return overlaps_a(start, end, __chainloader_start__, __chainloader_end__) || - overlaps_a(start, end, __stack_bottom__, __stack_top__) || - overlaps_a(start, end, __heap_start__, __heap_end__) || - overlaps_a(start, end, __start__, __end__); -} - -__attribute__((noreturn)) void watchdog_reboot(void); -__attribute__((noreturn)) void pmc_reboot(uint32_t scratch0); -__attribute__((noreturn)) void reboot_to_fusee_primary(void); -__attribute__((noreturn)) void reboot_to_iram_payload(void *payload, size_t payload_size); -__attribute__((noreturn)) void wait_for_button_and_reboot(void); -void wait_for_button(void); - -__attribute__((noreturn)) void generic_panic(void); -__attribute__((noreturn)) void fatal_error(const char *fmt, ...); - -#endif