mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-27 17:11:00 +01:00
kern: allocate all TTBR0 pages during init, use procidx as asid
This commit is contained in:
parent
c3fa42d958
commit
a72e39d657
@ -93,9 +93,13 @@ namespace ams::kern::arch::arm64 {
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MESOSPHERE_ASSERT(alignment < L1BlockSize);
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return KPageTable::GetBlockSize(static_cast<KPageTable::BlockType>(KPageTable::GetBlockType(alignment) + 1));
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}
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public:
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/* TODO: How should this size be determined. Does the KProcess slab count need to go in a header as a define? */
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static constexpr size_t NumTtbr0Entries = 81;
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private:
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static constinit inline const volatile u64 s_ttbr0_entries[NumTtbr0Entries] = {};
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private:
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KPageTableManager *m_manager;
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u64 m_ttbr;
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u8 m_asid;
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protected:
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Result OperateImpl(PageLinkedList *page_list, KProcessAddress virt_addr, size_t num_pages, KPhysicalAddress phys_addr, bool is_pa_valid, const KPageProperties properties, OperationType operation, bool reuse_ll);
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@ -168,17 +172,28 @@ namespace ams::kern::arch::arm64 {
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return entry;
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}
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public:
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constexpr explicit KPageTable(util::ConstantInitializeTag) : KPageTableBase(util::ConstantInitialize), m_manager(), m_ttbr(), m_asid() { /* ... */ }
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constexpr explicit KPageTable(util::ConstantInitializeTag) : KPageTableBase(util::ConstantInitialize), m_manager(), m_asid() { /* ... */ }
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explicit KPageTable() { /* ... */ }
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static NOINLINE void Initialize(s32 core_id);
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ALWAYS_INLINE void Activate(u32 proc_id) {
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cpu::SwitchProcess(m_ttbr, proc_id);
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static const volatile u64 &GetTtbr0Entry(size_t index) { return s_ttbr0_entries[index]; }
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static ALWAYS_INLINE u64 GetKernelTtbr0() {
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return s_ttbr0_entries[0];
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}
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static ALWAYS_INLINE void ActivateKernel() {
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/* Activate, using asid 0 and process id = 0xFFFFFFFF */
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cpu::SwitchProcess(GetKernelTtbr0(), 0xFFFFFFFF);
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}
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static ALWAYS_INLINE void ActivateProcess(size_t proc_idx, u32 proc_id) {
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cpu::SwitchProcess(s_ttbr0_entries[proc_idx + 1], proc_id);
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}
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NOINLINE Result InitializeForKernel(void *table, KVirtualAddress start, KVirtualAddress end);
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NOINLINE Result InitializeForProcess(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit);
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NOINLINE Result InitializeForProcess(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit, size_t process_index);
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Result Finalize();
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private:
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Result MapL1Blocks(KProcessAddress virt_addr, KPhysicalAddress phys_addr, size_t num_pages, PageTableEntry entry_template, bool disable_head_merge, PageLinkedList *page_list, bool reuse_ll);
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@ -23,13 +23,13 @@ namespace ams::kern::arch::arm64 {
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private:
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KPageTable m_page_table;
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public:
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void Activate(u64 id) {
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void Activate(size_t process_index, u64 id) {
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/* Activate the page table with the specified contextidr. */
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m_page_table.Activate(id);
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m_page_table.ActivateProcess(process_index, id);
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}
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Result Initialize(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit) {
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R_RETURN(m_page_table.InitializeForProcess(flags, from_back, pool, code_address, code_size, system_resource, resource_limit));
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Result Initialize(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit, size_t process_index) {
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R_RETURN(m_page_table.InitializeForProcess(flags, from_back, pool, code_address, code_size, system_resource, resource_limit, process_index));
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}
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void Finalize() { m_page_table.Finalize(); }
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@ -29,8 +29,7 @@ namespace ams::kern::arch::arm64 {
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NOINLINE void Initialize(s32 core_id);
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void Activate() {
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/* Activate, using process id = 0xFFFFFFFF */
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m_page_table.Activate(0xFFFFFFFF);
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m_page_table.ActivateKernel();
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}
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void ActivateForInit() {
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@ -374,7 +374,7 @@ namespace ams::kern {
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/* Update the current page table. */
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if (next_process) {
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next_process->GetPageTable().Activate(next_process->GetProcessId());
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next_process->GetPageTable().Activate(next_process->GetSlabIndex(), next_process->GetProcessId());
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} else {
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Kernel::GetKernelPageTable().Activate();
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}
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@ -85,77 +85,6 @@ namespace ams::kern::arch::arm64 {
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return (static_cast<u64>(asid) << 48) | (static_cast<u64>(GetInteger(table)));
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}
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class KPageTableAsidManager {
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private:
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using WordType = u32;
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static constexpr u8 ReservedAsids[] = { 0 };
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static constexpr size_t NumReservedAsids = util::size(ReservedAsids);
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static constexpr size_t BitsPerWord = BITSIZEOF(WordType);
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static constexpr size_t AsidCount = 0x100;
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static constexpr size_t NumWords = AsidCount / BitsPerWord;
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static constexpr WordType FullWord = ~WordType(0u);
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private:
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WordType m_state[NumWords];
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KLightLock m_lock;
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u8 m_hint;
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private:
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constexpr bool TestImpl(u8 asid) const {
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return m_state[asid / BitsPerWord] & (1u << (asid % BitsPerWord));
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}
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constexpr void ReserveImpl(u8 asid) {
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MESOSPHERE_ASSERT(!this->TestImpl(asid));
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m_state[asid / BitsPerWord] |= (1u << (asid % BitsPerWord));
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}
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constexpr void ReleaseImpl(u8 asid) {
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MESOSPHERE_ASSERT(this->TestImpl(asid));
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m_state[asid / BitsPerWord] &= ~(1u << (asid % BitsPerWord));
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}
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constexpr u8 FindAvailable() const {
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for (size_t i = 0; i < util::size(m_state); i++) {
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if (m_state[i] == FullWord) {
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continue;
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}
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const WordType clear_bit = (m_state[i] + 1) ^ (m_state[i]);
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return BitsPerWord * i + BitsPerWord - 1 - ClearLeadingZero(clear_bit);
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}
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if (m_state[util::size(m_state)-1] == FullWord) {
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MESOSPHERE_PANIC("Unable to reserve ASID");
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}
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__builtin_unreachable();
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}
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static constexpr ALWAYS_INLINE WordType ClearLeadingZero(WordType value) {
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return __builtin_clzll(value) - (BITSIZEOF(unsigned long long) - BITSIZEOF(WordType));
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}
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public:
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constexpr KPageTableAsidManager() : m_state(), m_lock(), m_hint() {
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for (size_t i = 0; i < NumReservedAsids; i++) {
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this->ReserveImpl(ReservedAsids[i]);
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}
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}
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u8 Reserve() {
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KScopedLightLock lk(m_lock);
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if (this->TestImpl(m_hint)) {
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m_hint = this->FindAvailable();
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}
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this->ReserveImpl(m_hint);
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return m_hint++;
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}
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void Release(u8 asid) {
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KScopedLightLock lk(m_lock);
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this->ReleaseImpl(asid);
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}
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};
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KPageTableAsidManager g_asid_manager;
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}
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ALWAYS_INLINE void KPageTable::NoteUpdated() const {
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@ -184,6 +113,7 @@ namespace ams::kern::arch::arm64 {
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this->OnKernelTableSinglePageUpdated(virt_addr);
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}
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void KPageTable::Initialize(s32 core_id) {
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/* Nothing actually needed here. */
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MESOSPHERE_UNUSED(core_id);
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@ -194,38 +124,29 @@ namespace ams::kern::arch::arm64 {
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m_asid = 0;
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m_manager = Kernel::GetSystemSystemResource().GetPageTableManagerPointer();
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/* Allocate a page for ttbr. */
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/* NOTE: It is a postcondition of page table manager allocation that the page is all-zero. */
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const u64 asid_tag = (static_cast<u64>(m_asid) << 48ul);
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const KVirtualAddress page = m_manager->Allocate();
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MESOSPHERE_ASSERT(page != Null<KVirtualAddress>);
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m_ttbr = GetInteger(KPageTableBase::GetLinearMappedPhysicalAddress(page)) | asid_tag;
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/* Initialize the base page table. */
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MESOSPHERE_R_ABORT_UNLESS(KPageTableBase::InitializeForKernel(true, table, start, end));
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R_SUCCEED();
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}
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Result KPageTable::InitializeForProcess(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit) {
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/* Get an ASID */
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m_asid = g_asid_manager.Reserve();
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ON_RESULT_FAILURE { g_asid_manager.Release(m_asid); };
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Result KPageTable::InitializeForProcess(ams::svc::CreateProcessFlag flags, bool from_back, KMemoryManager::Pool pool, KProcessAddress code_address, size_t code_size, KSystemResource *system_resource, KResourceLimit *resource_limit, size_t process_index) {
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/* Determine our ASID */
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m_asid = process_index + 1;
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MESOSPHERE_ABORT_UNLESS(0 < m_asid && m_asid < util::size(s_ttbr0_entries));
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/* Set our manager. */
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m_manager = system_resource->GetPageTableManagerPointer();
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/* Allocate a new table, and set our ttbr value. */
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const KVirtualAddress new_table = m_manager->Allocate();
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R_UNLESS(new_table != Null<KVirtualAddress>, svc::ResultOutOfResource());
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m_ttbr = EncodeTtbr(GetPageTablePhysicalAddress(new_table), m_asid);
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ON_RESULT_FAILURE_2 { m_manager->Free(new_table); };
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/* Get the virtual address of our L1 table. */
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const KPhysicalAddress ttbr0_phys = KPhysicalAddress(s_ttbr0_entries[m_asid] & UINT64_C(0xFFFFFFFFFFFE));
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const KVirtualAddress ttbr0_virt = KMemoryLayout::GetLinearVirtualAddress(ttbr0_phys);
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/* Initialize our base table. */
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const size_t as_width = GetAddressSpaceWidth(flags);
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const KProcessAddress as_start = 0;
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const KProcessAddress as_end = (1ul << as_width);
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R_TRY(KPageTableBase::InitializeForProcess(flags, from_back, pool, GetVoidPointer(new_table), as_start, as_end, code_address, code_size, system_resource, resource_limit));
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R_TRY(KPageTableBase::InitializeForProcess(flags, from_back, pool, GetVoidPointer(ttbr0_virt), as_start, as_end, code_address, code_size, system_resource, resource_limit));
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/* Note that we've updated the table (since we created it). */
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this->NoteUpdated();
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@ -329,20 +250,16 @@ namespace ams::kern::arch::arm64 {
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}
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}
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/* Free the L1 table. */
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/* Clear the L1 table. */
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{
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const KVirtualAddress l1_table = reinterpret_cast<uintptr_t>(impl.Finalize());
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ClearPageTable(l1_table);
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this->GetPageTableManager().Free(l1_table);
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}
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/* Perform inherited finalization. */
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KPageTableBase::Finalize();
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}
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/* Release our asid. */
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g_asid_manager.Release(m_asid);
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R_SUCCEED();
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}
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@ -31,7 +31,6 @@ namespace ams::kern::board::nintendo::nx {
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/* Struct representing registers saved on wake/sleep. */
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class SavedSystemRegisters {
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private:
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u64 ttbr0_el1;
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u64 elr_el1;
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u64 sp_el0;
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u64 spsr_el1;
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@ -90,7 +89,6 @@ namespace ams::kern::board::nintendo::nx {
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void SavedSystemRegisters::Save() {
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/* Save system registers. */
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this->ttbr0_el1 = cpu::GetTtbr0El1();
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this->tpidr_el0 = cpu::GetTpidrEl0();
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this->elr_el1 = cpu::GetElrEl1();
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this->sp_el0 = cpu::GetSpEl0();
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@ -405,7 +403,7 @@ namespace ams::kern::board::nintendo::nx {
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cpu::EnsureInstructionConsistency();
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/* Restore system registers. */
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cpu::SetTtbr0El1 (this->ttbr0_el1);
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cpu::SetTtbr0El1 (KPageTable::GetKernelTtbr0());
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cpu::SetTpidrEl0 (this->tpidr_el0);
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cpu::SetElrEl1 (this->elr_el1);
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cpu::SetSpEl0 (this->sp_el0);
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@ -299,7 +299,7 @@ namespace ams::kern {
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/* Setup page table. */
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{
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const bool from_back = (params.flags & ams::svc::CreateProcessFlag_EnableAslr) == 0;
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R_TRY(m_page_table.Initialize(static_cast<ams::svc::CreateProcessFlag>(params.flags), from_back, pool, params.code_address, params.code_num_pages * PageSize, m_system_resource, res_limit));
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R_TRY(m_page_table.Initialize(static_cast<ams::svc::CreateProcessFlag>(params.flags), from_back, pool, params.code_address, params.code_num_pages * PageSize, m_system_resource, res_limit, this->GetSlabIndex()));
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}
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ON_RESULT_FAILURE_2 { m_page_table.Finalize(); };
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@ -378,7 +378,7 @@ namespace ams::kern {
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/* Setup page table. */
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{
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const bool from_back = (params.flags & ams::svc::CreateProcessFlag_EnableAslr) == 0;
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R_TRY(m_page_table.Initialize(static_cast<ams::svc::CreateProcessFlag>(params.flags), from_back, pool, params.code_address, code_size, m_system_resource, res_limit));
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R_TRY(m_page_table.Initialize(static_cast<ams::svc::CreateProcessFlag>(params.flags), from_back, pool, params.code_address, code_size, m_system_resource, res_limit, this->GetSlabIndex()));
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}
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ON_RESULT_FAILURE_2 { m_page_table.Finalize(); };
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@ -125,6 +125,8 @@ SECTIONS
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.gnu.version_r : { *(.gnu.version_r) } :rodata
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.note.gnu.build-id : { *(.note.gnu.build-id) } :rodata
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__rodata_end = .;
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/* =========== DATA section =========== */
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. = ALIGN(0x1000);
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__data_start = . ;
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@ -15,6 +15,9 @@
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*/
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#include <mesosphere.hpp>
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extern "C" void __rodata_start();
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extern "C" void __rodata_end();
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extern "C" void __bin_start__();
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extern "C" void __bin_end__();
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@ -220,6 +223,31 @@ namespace ams::kern::init {
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};
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static_assert(kern::arch::arm64::init::IsInitialPageAllocator<KInitialPageAllocatorForFinalizeIdentityMapping>);
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void SetupAllTtbr0Entries(KInitialPageTable &init_pt, KInitialPageAllocator &allocator) {
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/* Validate that the ttbr0 array is in rodata. */
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const uintptr_t rodata_start = reinterpret_cast<uintptr_t>(__rodata_start);
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const uintptr_t rodata_end = reinterpret_cast<uintptr_t>(__rodata_end);
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MESOSPHERE_INIT_ABORT_UNLESS(rodata_start < rodata_end);
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MESOSPHERE_INIT_ABORT_UNLESS(rodata_start <= reinterpret_cast<uintptr_t>(std::addressof(KPageTable::GetTtbr0Entry(0))));
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MESOSPHERE_INIT_ABORT_UNLESS(reinterpret_cast<uintptr_t>(std::addressof(KPageTable::GetTtbr0Entry(KPageTable::NumTtbr0Entries))) < rodata_end);
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/* Allocate pages for all ttbr0 entries. */
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for (size_t i = 0; i < KPageTable::NumTtbr0Entries; ++i) {
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/* Allocate a page. */
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KPhysicalAddress page = allocator.Allocate(PageSize);
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MESOSPHERE_INIT_ABORT_UNLESS(page != Null<KPhysicalAddress>);
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/* Check that the page is allowed to be a ttbr0 entry. */
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MESOSPHERE_INIT_ABORT_UNLESS((GetInteger(page) & UINT64_C(0xFFFF000000000001)) == 0);
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/* Get the physical address of the ttbr0 entry. */
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const auto ttbr0_phys_ptr = init_pt.GetPhysicalAddress(KVirtualAddress(std::addressof(KPageTable::GetTtbr0Entry(i))));
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/* Set the entry to the newly allocated page. */
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*reinterpret_cast<volatile u64 *>(GetInteger(ttbr0_phys_ptr)) = (static_cast<u64>(i) << 48) | GetInteger(page);
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}
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}
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void FinalizeIdentityMapping(KInitialPageTable &init_pt, KInitialPageAllocator &allocator, u64 phys_to_virt_offset) {
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/* Create an allocator for identity mapping finalization. */
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KInitialPageAllocatorForFinalizeIdentityMapping finalize_allocator(allocator, phys_to_virt_offset);
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@ -591,6 +619,9 @@ namespace ams::kern::init {
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/* Create page table object for use during remaining initialization. */
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KInitialPageTable init_pt;
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/* Setup all ttbr0 pages. */
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SetupAllTtbr0Entries(init_pt, g_initial_page_allocator);
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/* Unmap the identity mapping. */
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FinalizeIdentityMapping(init_pt, g_initial_page_allocator, g_phase2_linear_region_phys_to_virt_diff);
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