Atmosphere/fusee/fusee-primary
Tomasz Moń 0534e36cf8 Set SDMMC controller to SDR104 as a workaround
According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.
2018-05-27 17:43:25 +02:00
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2018-05-27 00:59:02 +02:00