2019-10-13 08:02:07 +02:00
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Mov(EmitterContext context)
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{
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OpCodeAlu op = (OpCodeAlu)context.CurrOp;
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context.Copy(GetDest(context), GetSrcB(context));
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}
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public static void S2r(EmitterContext context)
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{
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// TODO: Better impl.
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OpCodeAlu op = (OpCodeAlu)context.CurrOp;
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SystemRegister sysReg = (SystemRegister)op.RawOpCode.Extract(20, 8);
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Operand src;
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switch (sysReg)
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{
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2019-10-26 19:50:52 +02:00
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case SystemRegister.ThreadId:
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{
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Operand tidX = Attribute(AttributeConsts.ThreadIdX);
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Operand tidY = Attribute(AttributeConsts.ThreadIdY);
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Operand tidZ = Attribute(AttributeConsts.ThreadIdZ);
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tidY = context.ShiftLeft(tidY, Const(16));
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tidZ = context.ShiftLeft(tidZ, Const(26));
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src = context.BitwiseOr(tidX, context.BitwiseOr(tidY, tidZ));
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break;
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}
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2019-10-13 08:02:07 +02:00
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case SystemRegister.ThreadIdX: src = Attribute(AttributeConsts.ThreadIdX); break;
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case SystemRegister.ThreadIdY: src = Attribute(AttributeConsts.ThreadIdY); break;
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case SystemRegister.ThreadIdZ: src = Attribute(AttributeConsts.ThreadIdZ); break;
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case SystemRegister.CtaIdX: src = Attribute(AttributeConsts.CtaIdX); break;
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case SystemRegister.CtaIdY: src = Attribute(AttributeConsts.CtaIdY); break;
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case SystemRegister.CtaIdZ: src = Attribute(AttributeConsts.CtaIdZ); break;
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default: src = Const(0); break;
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}
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context.Copy(GetDest(context), src);
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}
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public static void Sel(EmitterContext context)
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{
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OpCodeAlu op = (OpCodeAlu)context.CurrOp;
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Operand pred = GetPredicate39(context);
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Operand srcA = GetSrcA(context);
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Operand srcB = GetSrcB(context);
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Operand res = context.ConditionalSelect(pred, srcA, srcB);
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context.Copy(GetDest(context), res);
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}
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}
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}
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