Cool_Tools/Ryujinx-uplift
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Fix 32-bits extended register instructions with 64-bits extensions

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This commit is contained in:
gdkchan 2018-03-30 23:32:06 -03:00
parent 53e2d34905
commit 0ac4681fa0
1 changed files with 11 additions and 5 deletions
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16
ChocolArm64/Translation/AILEmitterCtx.cs
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@ -72,7 +72,7 @@ namespace ChocolArm64.Translation
Emitter = new AILEmitter(Graph, Root, SubName);
ILBlock = Emitter.GetILBlock(0);
ILBlock = Emitter.GetILBlock(0);
OpcIndex = -1;
@ -260,18 +260,24 @@ namespace ChocolArm64.Translation
case AIntType.Int64: Emit(OpCodes.Conv_I8); break;
}
if (IntType == AIntType.UInt64 ||
IntType == AIntType.Int64)
bool Sz64 = CurrOp.RegisterSize != ARegisterSize.Int32;
if (Sz64 == (IntType == AIntType.UInt64 ||
IntType == AIntType.Int64))
{
return;
}
if (CurrOp.RegisterSize != ARegisterSize.Int32)
if (Sz64)
{
Emit(IntType >= AIntType.Int8
? OpCodes.Conv_I8
: OpCodes.Conv_U8);
}
else
{
Emit(OpCodes.Conv_U4);
}
}
public void EmitLsl(int Amount) => EmitILShift(Amount, OpCodes.Shl);
@ -298,7 +304,7 @@ namespace ChocolArm64.Translation
EmitLdc_I4(Amount);
Emit(OpCodes.Shr_Un);
Ldloc(Tmp2Index, AIoType.Int);
EmitLdc_I4(CurrOp.GetBitsCount() - Amount);