mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-11-16 06:23:17 +01:00
Fix 32-bits extended register instructions with 64-bits extensions
This commit is contained in:
parent
53e2d34905
commit
0ac4681fa0
@ -260,18 +260,24 @@ namespace ChocolArm64.Translation
|
||||
case AIntType.Int64: Emit(OpCodes.Conv_I8); break;
|
||||
}
|
||||
|
||||
if (IntType == AIntType.UInt64 ||
|
||||
IntType == AIntType.Int64)
|
||||
bool Sz64 = CurrOp.RegisterSize != ARegisterSize.Int32;
|
||||
|
||||
if (Sz64 == (IntType == AIntType.UInt64 ||
|
||||
IntType == AIntType.Int64))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (CurrOp.RegisterSize != ARegisterSize.Int32)
|
||||
if (Sz64)
|
||||
{
|
||||
Emit(IntType >= AIntType.Int8
|
||||
? OpCodes.Conv_I8
|
||||
: OpCodes.Conv_U8);
|
||||
}
|
||||
else
|
||||
{
|
||||
Emit(OpCodes.Conv_U4);
|
||||
}
|
||||
}
|
||||
|
||||
public void EmitLsl(int Amount) => EmitILShift(Amount, OpCodes.Shl);
|
||||
|
Loading…
Reference in New Issue
Block a user