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https://github.com/GreemDev/Ryujinx.git
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Implement VMNMX shader instruction (#1032)
* Implement VMNMX shader instruction * No need for the gap on the enum * Fix typo
This commit is contained in:
gdkchan
GitHub
parent
56374c8633
commit
1586450a38
@ -205,6 +205,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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Set("1101111101001x", InstEmit.Txq, typeof(OpCodeTex));
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Set("1101111101010x", InstEmit.TxqB, typeof(OpCodeTex));
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Set("01011111xxxxxx", InstEmit.Vmad, typeof(OpCodeVideo));
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Set("0011101xxxxxxx", InstEmit.Vmnmx, typeof(OpCodeVideo));
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Set("0101000011011x", InstEmit.Vote, typeof(OpCodeVote));
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Set("0100111xxxxxxx", InstEmit.Xmad, typeof(OpCodeAluCbuf));
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Set("0011011x00xxxx", InstEmit.Xmad, typeof(OpCodeAluImm));
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@ -6,18 +6,97 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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public Register Rd { get; }
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public Register Ra { get; }
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public Register Rb { get; }
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public Register Rc { get; }
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public bool SetCondCode { get; protected set; }
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public bool Saturate { get; protected set; }
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public int Immediate { get; }
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public int RaSelection { get; }
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public int RbSelection { get; }
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public bool SetCondCode { get; }
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public bool HasRb { get; }
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public VideoType RaType { get; }
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public VideoType RbType { get; }
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public VideoPostOp PostOp { get; }
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public bool DstSigned { get; }
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public bool Saturate { get; }
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public OpCodeVideo(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Rd = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
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Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
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Rb = new Register(opCode.Extract(20, 8), RegisterType.Gpr);
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Rc = new Register(opCode.Extract(39, 8), RegisterType.Gpr);
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RaSelection = opCode.Extract(36, 2);
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RbSelection = opCode.Extract(28, 2);
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RaType = opCode.Extract(37, 2) switch
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{
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2 => VideoType.U16,
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3 => VideoType.U32,
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_ => VideoType.U8
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};
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RbType = opCode.Extract(29, 2) switch
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{
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2 => VideoType.U16,
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3 => VideoType.U32,
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_ => VideoType.U8
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};
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if (opCode.Extract(48))
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{
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RaType |= VideoType.Signed;
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}
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if (!opCode.Extract(50))
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{
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// Immediate variant.
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Immediate = opCode.Extract(16, 20);
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RbType = opCode.Extract(49) ? VideoType.S16 : VideoType.U16;
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if (RbType == VideoType.S16)
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{
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Immediate = (Immediate << 12) >> 12;
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}
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}
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else if (opCode.Extract(49))
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{
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RbType |= VideoType.Signed;
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}
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if (RaType == VideoType.U16)
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{
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RaSelection &= 1;
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}
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else if (RaType == VideoType.U32)
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{
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RaSelection = 0;
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}
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if (RbType == VideoType.U16)
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{
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RbSelection &= 1;
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}
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else if (RbType == VideoType.U32)
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{
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RbSelection = 0;
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}
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SetCondCode = opCode.Extract(47);
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HasRb = opCode.Extract(50);
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PostOp = (VideoPostOp)opCode.Extract(51, 3);
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DstSigned = opCode.Extract(54);
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Saturate = opCode.Extract(55);
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}
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}
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14
Ryujinx.Graphics.Shader/Decoders/VideoPostOp.cs
Normal file
14
Ryujinx.Graphics.Shader/Decoders/VideoPostOp.cs
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@ -0,0 +1,14 @@
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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enum VideoPostOp
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{
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Mrg16h,
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Mrg16l,
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Mrg8b0,
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Mrg8b2,
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Acc,
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Min,
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Max,
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Pass
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}
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}
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15
Ryujinx.Graphics.Shader/Decoders/VideoType.cs
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15
Ryujinx.Graphics.Shader/Decoders/VideoType.cs
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@ -0,0 +1,15 @@
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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enum VideoType
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{
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U8 = 0,
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U16 = 1,
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U32 = 2,
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Signed = 1 << 2,
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S8 = Signed | U8,
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S16 = Signed | U16,
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S32 = Signed | U32
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}
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}
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@ -1,17 +1,136 @@
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using static Ryujinx.Graphics.Shader.Instructions.InstEmitHelper;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Instructions
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{
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static partial class InstEmit
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{
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public static void Vmad(EmitterContext context)
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{
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// TODO: Implement properly.
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context.Copy(GetDest(context), GetSrcC(context));
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}
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public static void Vmnmx(EmitterContext context)
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{
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OpCodeVideo op = (OpCodeVideo)context.CurrOp;
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context.Copy(GetDest(context), GetSrcC(context));
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bool max = op.RawOpCode.Extract(56);
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Operand srcA = Extend(context, GetSrcA(context), op.RaSelection, op.RaType);
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Operand srcC = GetSrcC(context);
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Operand srcB;
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if (op.HasRb)
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{
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srcB = Extend(context, Register(op.Rb), op.RbSelection, op.RbType);
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}
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else
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{
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srcB = Const(op.Immediate);
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}
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Operand res;
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bool resSigned;
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if ((op.RaType & VideoType.Signed) != (op.RbType & VideoType.Signed))
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{
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// Signedness is different, but for max, result will always fit a U32,
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// since one of the inputs can't be negative, and the result is the one
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// with highest value. For min, it will always fit on a S32, since
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// one of the input can't be greater than INT_MAX and we want the lowest value.
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resSigned = !max;
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res = max ? context.IMaximumU32(srcA, srcB) : context.IMinimumS32(srcA, srcB);
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if ((op.RaType & VideoType.Signed) != 0)
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{
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Operand isBGtIntMax = context.ICompareLess(srcB, Const(0));
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res = context.ConditionalSelect(isBGtIntMax, srcB, res);
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}
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else
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{
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Operand isAGtIntMax = context.ICompareLess(srcA, Const(0));
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res = context.ConditionalSelect(isAGtIntMax, srcA, res);
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}
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}
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else
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{
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// Ra and Rb have the same signedness, so doesn't matter which one we test.
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resSigned = (op.RaType & VideoType.Signed) != 0;
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if (max)
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{
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res = resSigned
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? context.IMaximumS32(srcA, srcB)
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: context.IMaximumU32(srcA, srcB);
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}
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else
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{
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res = resSigned
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? context.IMinimumS32(srcA, srcB)
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: context.IMinimumU32(srcA, srcB);
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}
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}
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if (op.Saturate)
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{
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if (op.DstSigned && !resSigned)
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{
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res = context.IMinimumU32(res, Const(int.MaxValue));
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}
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else if (!op.DstSigned && resSigned)
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{
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res = context.IMaximumS32(res, Const(0));
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}
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}
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switch (op.PostOp)
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{
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case VideoPostOp.Acc:
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res = context.IAdd(res, srcC);
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break;
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case VideoPostOp.Max:
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res = op.DstSigned ? context.IMaximumS32(res, srcC) : context.IMaximumU32(res, srcC);
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break;
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case VideoPostOp.Min:
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res = op.DstSigned ? context.IMinimumS32(res, srcC) : context.IMinimumU32(res, srcC);
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break;
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case VideoPostOp.Mrg16h:
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res = context.BitfieldInsert(srcC, res, Const(16), Const(16));
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break;
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case VideoPostOp.Mrg16l:
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res = context.BitfieldInsert(srcC, res, Const(0), Const(16));
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break;
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case VideoPostOp.Mrg8b0:
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res = context.BitfieldInsert(srcC, res, Const(0), Const(8));
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break;
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case VideoPostOp.Mrg8b2:
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res = context.BitfieldInsert(srcC, res, Const(16), Const(8));
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break;
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}
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context.Copy(GetDest(context), res);
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}
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private static Operand Extend(EmitterContext context, Operand src, int sel, VideoType type)
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{
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return type switch
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{
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VideoType.U8 => ZeroExtendTo32(context, context.ShiftRightU32(src, Const(sel * 8)), 8),
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VideoType.U16 => ZeroExtendTo32(context, context.ShiftRightU32(src, Const(sel * 16)), 16),
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VideoType.S8 => SignExtendTo32(context, context.ShiftRightU32(src, Const(sel * 8)), 8),
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VideoType.S16 => SignExtendTo32(context, context.ShiftRightU32(src, Const(sel * 16)), 16),
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_ => src
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};
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}
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}
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}
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