Ryujinx-uplift/ARMeilleure/CodeGen
Wunk 295fbd0542
ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663)
* ARMeilleure: Add AVX512{F,VL,DQ,BW} detection

Add `UseAvx512Ortho` and `UseAvx512OrthoFloat` optimization flags as
short-hands for `F+VL` and `F+VL+DQ`.

* ARMeilleure: Add initial support for EVEX instruction encoding

Does not implement rounding, or exception controls.

* ARMeilleure: Add `X86Vpternlogd`

Accelerates the vector-`Not` instruction.

* ARMeilleure: Add check for `OSXSAVE` for AVX{2,512}

* ARMeilleure: Add check for `XCR0` flags

Add XCR0 register checks for AVX and AVX512F, following the guidelines
from section 14.3 and 15.2 from the Intel Architecture Software
Developer's Manual.

* ARMeilleure: Increment InternalVersion

* ARMeilleure: Remove redundant `ReProtect` and `Dispose`, formatting

* ARMeilleure: Move XCR0 procedure to GetXcr0Eax

* ARMeilleure: Add `XCR0` to `FeatureInfo` structure

* ARMeilleure: Utilize `ReadOnlySpan` for Xcr0 assembly

Avoids an additional allocation

* ARMeilleure: Formatting fixes
2022-12-18 16:46:13 -03:00
..
Linking A few minor documentation fixes. (#3599) 2022-08-19 18:21:06 -03:00
Optimizations Fix tail merge from block with conditional jump to multiple returns (#3267) 2022-04-09 16:56:50 +02:00
RegisterAllocators Make structs readonly when applicable (#4002) 2022-12-05 14:47:39 +01:00
Unwinding PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
X86 ARMeilleure: Add initial support for AVX512(EVEX encoding) (#3663) 2022-12-18 16:46:13 -03:00
CompiledFunction.cs Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00