mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-11-24 18:20:12 +01:00
609 lines
19 KiB
C#
609 lines
19 KiB
C#
using ARMeilleure.Memory;
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using Ryujinx.Cpu.Tracking;
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using Ryujinx.Memory;
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using Ryujinx.Memory.Range;
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using Ryujinx.Memory.Tracking;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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using System.Threading;
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namespace Ryujinx.Cpu
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{
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/// <summary>
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/// Represents a CPU memory manager.
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/// </summary>
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public sealed class MemoryManager : MemoryManagerBase, IMemoryManager, IVirtualMemoryManagerTracked, IWritableBlock
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{
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public const int PageBits = 12;
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public const int PageSize = 1 << PageBits;
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public const int PageMask = PageSize - 1;
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private const int PteSize = 8;
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private const int PointerTagBit = 62;
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private readonly InvalidAccessHandler _invalidAccessHandler;
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/// <summary>
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/// Address space width in bits.
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/// </summary>
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public int AddressSpaceBits { get; }
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private readonly ulong _addressSpaceSize;
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private readonly MemoryBlock _pageTable;
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/// <summary>
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/// Page table base pointer.
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/// </summary>
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public IntPtr PageTablePointer => _pageTable.Pointer;
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public MemoryManagerType Type => MemoryManagerType.SoftwarePageTable;
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public MemoryTracking Tracking { get; }
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public event Action<ulong, ulong> UnmapEvent;
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/// <summary>
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/// Creates a new instance of the memory manager.
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/// </summary>
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/// <param name="addressSpaceSize">Size of the address space</param>
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/// <param name="invalidAccessHandler">Optional function to handle invalid memory accesses</param>
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public MemoryManager(ulong addressSpaceSize, InvalidAccessHandler invalidAccessHandler = null)
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{
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_invalidAccessHandler = invalidAccessHandler;
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ulong asSize = PageSize;
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int asBits = PageBits;
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while (asSize < addressSpaceSize)
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{
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asSize <<= 1;
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asBits++;
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}
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AddressSpaceBits = asBits;
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_addressSpaceSize = asSize;
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_pageTable = new MemoryBlock((asSize / PageSize) * PteSize);
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Tracking = new MemoryTracking(this, PageSize);
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}
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/// <inheritdoc/>
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public void Map(ulong va, nuint hostAddress, ulong size)
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{
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AssertValidAddressAndSize(va, size);
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ulong remainingSize = size;
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ulong oVa = va;
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while (remainingSize != 0)
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{
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_pageTable.Write((va / PageSize) * PteSize, hostAddress);
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va += PageSize;
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hostAddress += PageSize;
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remainingSize -= PageSize;
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}
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Tracking.Map(oVa, size);
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}
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/// <inheritdoc/>
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public void Unmap(ulong va, ulong size)
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{
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// If size is 0, there's nothing to unmap, just exit early.
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if (size == 0)
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{
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return;
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}
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AssertValidAddressAndSize(va, size);
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UnmapEvent?.Invoke(va, size);
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Tracking.Unmap(va, size);
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ulong remainingSize = size;
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while (remainingSize != 0)
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{
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_pageTable.Write((va / PageSize) * PteSize, (nuint)0);
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va += PageSize;
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remainingSize -= PageSize;
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}
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}
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/// <inheritdoc/>
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public T Read<T>(ulong va) where T : unmanaged
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{
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <inheritdoc/>
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public T ReadTracked<T>(ulong va) where T : unmanaged
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{
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), false);
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <inheritdoc/>
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public void Read(ulong va, Span<byte> data)
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{
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ReadImpl(va, data);
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}
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/// <inheritdoc/>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <inheritdoc/>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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SignalMemoryTracking(va, (ulong)data.Length, true);
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WriteImpl(va, data);
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}
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/// <inheritdoc/>
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public void WriteUntracked(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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WriteImpl(va, data);
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}
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/// <summary>
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/// Writes data to CPU mapped memory.
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/// </summary>
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/// <param name="va">Virtual address to write the data into</param>
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/// <param name="data">Data to be written</param>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private void WriteImpl(ulong va, ReadOnlySpan<byte> data)
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{
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try
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{
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AssertValidAddressAndSize(va, (ulong)data.Length);
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if (IsContiguousAndMapped(va, data.Length))
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{
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data.CopyTo(GetHostSpanContiguous(va, data.Length));
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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data.Slice(0, size).CopyTo(GetHostSpanContiguous(va, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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size = Math.Min(data.Length - offset, PageSize);
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data.Slice(offset, size).CopyTo(GetHostSpanContiguous(va + (ulong)offset, size));
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}
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}
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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}
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}
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/// <inheritdoc/>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, false);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return GetHostSpanContiguous(va, size);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data);
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return data;
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}
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}
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/// <inheritdoc/>
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public unsafe WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return new WritableRegion(null, va, Memory<byte>.Empty);
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}
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if (IsContiguousAndMapped(va, size))
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{
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if (tracked)
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{
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SignalMemoryTracking(va, (ulong)size, true);
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}
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return new WritableRegion(null, va, new NativeMemoryManager<byte>((byte*)GetHostAddress(va), size).Memory);
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}
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else
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{
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Memory<byte> memory = new byte[size];
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GetSpan(va, size).CopyTo(memory.Span);
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return new WritableRegion(this, va, memory, tracked);
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}
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}
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/// <inheritdoc/>
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public unsafe ref T GetRef<T>(ulong va) where T : unmanaged
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{
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if (!IsContiguous(va, Unsafe.SizeOf<T>()))
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{
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ThrowMemoryNotContiguous();
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}
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SignalMemoryTracking(va, (ulong)Unsafe.SizeOf<T>(), true);
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return ref *(T*)GetHostAddress(va);
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}
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/// <summary>
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/// Computes the number of pages in a virtual address range.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range</param>
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/// <param name="startVa">The virtual address of the beginning of the first page</param>
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/// <remarks>This function does not differentiate between allocated and unallocated pages.</remarks>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private int GetPagesCount(ulong va, uint size, out ulong startVa)
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{
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// WARNING: Always check if ulong does not overflow during the operations.
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startVa = va & ~(ulong)PageMask;
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ulong vaSpan = (va - startVa + size + PageMask) & ~(ulong)PageMask;
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return (int)(vaSpan / PageSize);
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}
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private void ThrowMemoryNotContiguous() => throw new MemoryNotContiguousException();
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguousAndMapped(ulong va, int size) => IsContiguous(va, size) && IsMapped(va);
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguous(ulong va, int size)
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{
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, (ulong)size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return false;
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}
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if (GetHostAddress(va) + PageSize != GetHostAddress(va + PageSize))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <inheritdoc/>
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public IEnumerable<HostMemoryRange> GetPhysicalRegions(ulong va, ulong size)
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{
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if (size == 0)
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{
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return Enumerable.Empty<HostMemoryRange>();
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}
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, size))
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{
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return null;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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var regions = new List<HostMemoryRange>();
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nuint regionStart = GetHostAddress(va);
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ulong regionSize = PageSize;
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return null;
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}
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nuint newHostAddress = GetHostAddress(va + PageSize);
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if (GetHostAddress(va) + PageSize != newHostAddress)
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{
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regions.Add(new HostMemoryRange(regionStart, regionSize));
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regionStart = newHostAddress;
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regionSize = 0;
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}
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va += PageSize;
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regionSize += PageSize;
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}
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regions.Add(new HostMemoryRange(regionStart, regionSize));
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return regions;
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}
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private void ReadImpl(ulong va, Span<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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try
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{
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AssertValidAddressAndSize(va, (ulong)data.Length);
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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GetHostSpanContiguous(va, size).CopyTo(data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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size = Math.Min(data.Length - offset, PageSize);
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GetHostSpanContiguous(va + (ulong)offset, size).CopyTo(data.Slice(offset, size));
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}
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}
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catch (InvalidMemoryRegionException)
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{
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if (_invalidAccessHandler == null || !_invalidAccessHandler(va))
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{
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throw;
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}
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}
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}
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/// <inheritdoc/>
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public bool IsRangeMapped(ulong va, ulong size)
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{
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if (size == 0UL)
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{
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return true;
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}
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if (!ValidateAddressAndSize(va, size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages; page++)
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{
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if (!IsMapped(va))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <inheritdoc/>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public bool IsMapped(ulong va)
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{
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if (!ValidateAddress(va))
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{
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return false;
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}
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return _pageTable.Read<nuint>((va / PageSize) * PteSize) != 0;
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}
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private bool ValidateAddress(ulong va)
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{
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return va < _addressSpaceSize;
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}
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/// <summary>
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/// Checks if the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>True if the combination of virtual address and size is part of the addressable space</returns>
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private bool ValidateAddressAndSize(ulong va, ulong size)
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{
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ulong endVa = va + size;
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return endVa >= va && endVa >= size && endVa <= _addressSpaceSize;
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}
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/// <summary>
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/// Ensures the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <exception cref="InvalidMemoryRegionException">Throw when the memory region specified outside the addressable space</exception>
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private void AssertValidAddressAndSize(ulong va, ulong size)
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{
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if (!ValidateAddressAndSize(va, size))
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{
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throw new InvalidMemoryRegionException($"va=0x{va:X16}, size=0x{size:X16}");
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}
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}
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/// <summary>
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/// Get a span representing the given virtual address and size range in host memory.
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/// This function assumes that the requested virtual memory region is contiguous.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>A span representing the given virtual range in host memory</returns>
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/// <exception cref="InvalidMemoryRegionException">Throw when the base virtual address is not mapped</exception>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private unsafe Span<byte> GetHostSpanContiguous(ulong va, int size)
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{
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return new Span<byte>((void*)GetHostAddress(va), size);
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}
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/// <summary>
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/// Get the host address for a given virtual address, using the page table.
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/// </summary>
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/// <param name="va">Virtual address</param>
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/// <returns>The corresponding host address for the given virtual address</returns>
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/// <exception cref="InvalidMemoryRegionException">Throw when the virtual address is not mapped</exception>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private nuint GetHostAddress(ulong va)
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{
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nuint pageBase = _pageTable.Read<nuint>((va / PageSize) * PteSize) & unchecked((nuint)0xffff_ffff_ffffUL);
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if (pageBase == 0)
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{
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ThrowInvalidMemoryRegionException($"Not mapped: va=0x{va:X16}");
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}
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return pageBase + (nuint)(va & PageMask);
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}
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/// <inheritdoc/>
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public void TrackingReprotect(ulong va, ulong size, MemoryPermission protection)
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{
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AssertValidAddressAndSize(va, size);
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// Protection is inverted on software pages, since the default value is 0.
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protection = (~protection) & MemoryPermission.ReadAndWrite;
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long tag = protection switch
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{
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MemoryPermission.None => 0L,
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MemoryPermission.Write => 2L << PointerTagBit,
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_ => 3L << PointerTagBit
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};
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int pages = GetPagesCount(va, (uint)size, out va);
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ulong pageStart = va >> PageBits;
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long invTagMask = ~(0xffffL << 48);
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for (int page = 0; page < pages; page++)
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{
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ref long pageRef = ref _pageTable.GetRef<long>(pageStart * PteSize);
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long pte;
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do
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{
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pte = Volatile.Read(ref pageRef);
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}
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while (pte != 0 && Interlocked.CompareExchange(ref pageRef, (pte & invTagMask) | tag, pte) != pte);
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pageStart++;
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}
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}
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/// <inheritdoc/>
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public CpuRegionHandle BeginTracking(ulong address, ulong size)
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{
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return new CpuRegionHandle(Tracking.BeginTracking(address, size));
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}
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/// <inheritdoc/>
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public CpuMultiRegionHandle BeginGranularTracking(ulong address, ulong size, IEnumerable<IRegionHandle> handles, ulong granularity)
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{
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return new CpuMultiRegionHandle(Tracking.BeginGranularTracking(address, size, handles, granularity));
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}
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/// <inheritdoc/>
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public CpuSmartMultiRegionHandle BeginSmartGranularTracking(ulong address, ulong size, ulong granularity)
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{
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return new CpuSmartMultiRegionHandle(Tracking.BeginSmartGranularTracking(address, size, granularity));
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}
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/// <inheritdoc/>
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public void SignalMemoryTracking(ulong va, ulong size, bool write)
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{
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AssertValidAddressAndSize(va, size);
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// We emulate guard pages for software memory access. This makes for an easy transition to
|
|
// tracking using host guard pages in future, but also supporting platforms where this is not possible.
|
|
|
|
// Write tag includes read protection, since we don't have any read actions that aren't performed before write too.
|
|
long tag = (write ? 3L : 1L) << PointerTagBit;
|
|
|
|
int pages = GetPagesCount(va, (uint)size, out _);
|
|
ulong pageStart = va >> PageBits;
|
|
|
|
for (int page = 0; page < pages; page++)
|
|
{
|
|
ref long pageRef = ref _pageTable.GetRef<long>(pageStart * PteSize);
|
|
|
|
long pte;
|
|
|
|
pte = Volatile.Read(ref pageRef);
|
|
|
|
if ((pte & tag) != 0)
|
|
{
|
|
Tracking.VirtualMemoryEvent(va, size, write);
|
|
break;
|
|
}
|
|
|
|
pageStart++;
|
|
}
|
|
}
|
|
|
|
/// <summary>
|
|
/// Disposes of resources used by the memory manager.
|
|
/// </summary>
|
|
protected override void Destroy() => _pageTable.Dispose();
|
|
|
|
private void ThrowInvalidMemoryRegionException(string message) => throw new InvalidMemoryRegionException(message);
|
|
}
|
|
}
|