mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-11-24 10:10:12 +01:00
36e8e074c9
* Fix and simplify TranslatorCache * Fix some assignment alignments, remove some unused usings * Changes to ILEmitter, separate it from ILEmitterCtx * Rename ILEmitter to ILMethodBuilder * Rename LdrLit and *_Fix opcodes * Revert TranslatorCache impl to the more performant one, fix a few issues with it * Allow EmitOpCode to be called even after everything has been emitted * Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point * Remove unneeded temp use * Add missing exit call on TestExclusive * Use better hash * Implement the == and != operators
30 lines
754 B
C#
30 lines
754 B
C#
using ChocolArm64.Instructions;
|
|
|
|
namespace ChocolArm64.Decoders
|
|
{
|
|
class OpCodeSimdCvt64 : OpCodeSimd64
|
|
{
|
|
public int FBits { get; private set; }
|
|
|
|
public OpCodeSimdCvt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
|
|
{
|
|
//TODO:
|
|
//Und of Fixed Point variants.
|
|
int scale = (opCode >> 10) & 0x3f;
|
|
int sf = (opCode >> 31) & 0x1;
|
|
|
|
/*if (Type != SF && !(Type == 2 && SF == 1))
|
|
{
|
|
Emitter = AInstEmit.Und;
|
|
|
|
return;
|
|
}*/
|
|
|
|
FBits = 64 - scale;
|
|
|
|
RegisterSize = sf != 0
|
|
? State.RegisterSize.Int64
|
|
: State.RegisterSize.Int32;
|
|
}
|
|
}
|
|
} |