mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-11-16 06:23:17 +01:00
c393cdf8e3
* Keep track mapped buffers with fixed offsets * Started rewriting the memory manager * Initial support for MapPhysicalMemory and UnmapPhysicalMemory, other tweaks * MapPhysicalMemory/UnmapPhysicalMemory support, other tweaks * Rebased * Optimize the map/unmap physical memory svcs * Integrate shared font support * Fix address space reserve alignment * Some fixes related to gpu memory mapping * Some cleanup * Only try uploading const buffers that are really used * Check if memory region is contiguous * Rebased * Add missing count increment on IsRegionModified * Check for reads/writes outside of the address space, optimize translation with a tail call
138 lines
4.2 KiB
C#
138 lines
4.2 KiB
C#
using ChocolArm64.Decoder;
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using ChocolArm64.Memory;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection.Emit;
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namespace ChocolArm64.Instruction
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{
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static class AInstEmitMemoryHelper
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{
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private enum Extension
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{
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Zx,
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Sx32,
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Sx64
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}
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public static void EmitReadZxCall(AILEmitterCtx Context, int Size)
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{
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EmitReadCall(Context, Extension.Zx, Size);
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}
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public static void EmitReadSx32Call(AILEmitterCtx Context, int Size)
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{
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EmitReadCall(Context, Extension.Sx32, Size);
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}
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public static void EmitReadSx64Call(AILEmitterCtx Context, int Size)
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{
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EmitReadCall(Context, Extension.Sx64, Size);
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}
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private static void EmitReadCall(AILEmitterCtx Context, Extension Ext, int Size)
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{
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bool IsSimd = GetIsSimd(Context);
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string Name = null;
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if (Size < 0 || Size > (IsSimd ? 4 : 3))
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{
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throw new ArgumentOutOfRangeException(nameof(Size));
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}
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if (IsSimd)
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{
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switch (Size)
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{
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case 0: Name = nameof(AMemory.ReadVector8); break;
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case 1: Name = nameof(AMemory.ReadVector16); break;
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case 2: Name = nameof(AMemory.ReadVector32); break;
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case 3: Name = nameof(AMemory.ReadVector64); break;
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case 4: Name = nameof(AMemory.ReadVector128); break;
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}
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}
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else
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{
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switch (Size)
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{
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case 0: Name = nameof(AMemory.ReadByte); break;
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case 1: Name = nameof(AMemory.ReadUInt16); break;
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case 2: Name = nameof(AMemory.ReadUInt32); break;
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case 3: Name = nameof(AMemory.ReadUInt64); break;
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}
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}
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Context.EmitCall(typeof(AMemory), Name);
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if (!IsSimd)
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{
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if (Ext == Extension.Sx32 ||
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Ext == Extension.Sx64)
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{
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switch (Size)
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{
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case 0: Context.Emit(OpCodes.Conv_I1); break;
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case 1: Context.Emit(OpCodes.Conv_I2); break;
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case 2: Context.Emit(OpCodes.Conv_I4); break;
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}
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}
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if (Size < 3)
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{
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Context.Emit(Ext == Extension.Sx64
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? OpCodes.Conv_I8
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: OpCodes.Conv_U8);
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}
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}
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}
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public static void EmitWriteCall(AILEmitterCtx Context, int Size)
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{
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bool IsSimd = GetIsSimd(Context);
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string Name = null;
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if (Size < 0 || Size > (IsSimd ? 4 : 3))
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{
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throw new ArgumentOutOfRangeException(nameof(Size));
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}
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if (Size < 3 && !IsSimd)
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{
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Context.Emit(OpCodes.Conv_I4);
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}
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if (IsSimd)
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{
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switch (Size)
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{
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case 0: Name = nameof(AMemory.WriteVector8); break;
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case 1: Name = nameof(AMemory.WriteVector16); break;
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case 2: Name = nameof(AMemory.WriteVector32); break;
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case 3: Name = nameof(AMemory.WriteVector64); break;
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case 4: Name = nameof(AMemory.WriteVector128); break;
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}
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}
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else
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{
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switch (Size)
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{
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case 0: Name = nameof(AMemory.WriteByte); break;
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case 1: Name = nameof(AMemory.WriteUInt16); break;
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case 2: Name = nameof(AMemory.WriteUInt32); break;
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case 3: Name = nameof(AMemory.WriteUInt64); break;
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}
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}
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Context.EmitCall(typeof(AMemory), Name);
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}
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private static bool GetIsSimd(AILEmitterCtx Context)
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{
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return Context.CurrOp is IAOpCodeSimd &&
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!(Context.CurrOp is AOpCodeSimdMemMs ||
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Context.CurrOp is AOpCodeSimdMemSs);
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}
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}
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} |