Ryujinx-uplift/ARMeilleure/Instructions
LDj3SNuD 814f75142e
Fpsr and Fpcr freed. (#3701)
* Implemented in IR the managed methods of the Saturating region ...

... of the SoftFallback class (the SatQ ones).

The need to natively manage the Fpcr and Fpsr system registers is still a fact.

Contributes to https://github.com/Ryujinx/Ryujinx/issues/2917 ; I will open another PR to implement in Intrinsics-branchless the methods of the Saturation region as well (the SatXXXToXXX ones).

All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq.

* Ptc.InternalVersion = 3665

* Addressed PR feedback.

* Implemented in IR the managed methods of the ShlReg region of the SoftFallback class.

It also includes the last two SatQ ones (following up on https://github.com/Ryujinx/Ryujinx/pull/3665).

All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq.

* Fpsr and Fpcr freed.

Handling/isolation of Fpsr and Fpcr via register for IR and via memory for Tests and Threads, with synchronization to context exchanges (explicit for SoftFloat); without having to call managed methods. Thanks to the inlining work of the previous two PRs and others in this.

Tests performed locally in both release and debug modes, in both lowcq and highcq, with FastFP to true and false (explicit FP tests included). Tested with the title Tony Hawk's PS.

Depends on shlreg.

* Update InstEmitSimdHelper.cs

* De-magic Masks.

Remove the Stride and Len flags; Fpsr.NZCV are A32 only, then moved to Fpscr: this leads to emitting less IR in reference to Get/Set Fpsr/Fpcr/Fpscr methods in reference to Mrs/Msr (A64) and Vmrs/Vmsr (A32) instructions.

* Addressed PR feedback.
2022-09-20 18:55:13 -03:00
..
CryptoHelper.cs Use ReadOnlySpan<byte> compiler optimization for static data (#3130) 2022-02-17 21:38:50 +01:00
InstEmitAlu32.cs Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693) 2022-09-13 19:51:40 -03:00
InstEmitAlu.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitAluHelper.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitBfm.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitCcmp.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitCsel.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitDiv.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitException32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitException.cs Decoder: Exit on trapping instructions, and resume execution at trapping instruction (#3153) 2022-03-04 23:16:58 +01:00
InstEmitFlow32.cs T32: Add Vfp instructions (#3690) 2022-09-10 23:03:14 -03:00
InstEmitFlow.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitFlowHelper.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitHash32.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHash.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHashHelper.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitHelper.cs T32: Implement B, B.cond, BL, BLX (#3155) 2022-03-04 23:05:08 +01:00
InstEmitMemory32.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMemory.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitMemoryEx32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitMemoryEx.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
InstEmitMemoryExHelper.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitMemoryHelper.cs Add ADD (zx imm12), NOP, MOV (rs), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions (#3683) 2022-09-09 22:09:11 -03:00
InstEmitMove.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitMul32.cs Implement Thumb (32-bit) memory (ordered), multiply, extension and bitfield instructions (#3687) 2022-09-10 22:51:00 -03:00
InstEmitMul.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitSimdArithmetic32.cs Implement VRSRA, VRSHRN, VQSHRUN, VQMOVN, VQMOVUN, VQADD, VQSUB, VRHADD, VPADDL, VSUBL, VQDMULH and VMLAL Arm32 NEON instructions (#3677) 2022-09-09 21:47:38 -03:00
InstEmitSimdArithmetic.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdCmp32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdCmp.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdCrypto32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCvt32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdCvt.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdHash32.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHash.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHashHelper.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHelper32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdHelper.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdLogical32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdLogical.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMemory32.cs Fix increment on Arm32 NEON VLDn/VSTn instructions with regs > 1 (#3695) 2022-09-13 08:24:09 +02:00
InstEmitSimdMemory.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMove32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMove.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdShift32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSimdShift.cs Implemented in IR the managed methods of the ShlReg region of the SoftFallback class. (#3700) 2022-09-19 14:49:10 -03:00
InstEmitSystem32.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstEmitSystem.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
InstName.cs A32/T32/A64: Implement Hint instructions (CSDB, SEV, SEVL, WFE, WFI, YIELD) (#3694) 2022-09-14 18:18:15 -03:00
NativeInterface.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
SoftFallback.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00
SoftFloat.cs Fpsr and Fpcr freed. (#3701) 2022-09-20 18:55:13 -03:00