Ryujinx-uplift/Ryujinx.Graphics/Shader/IntermediateRepresentation/Operand.cs
gdkchan 6b23a2c125 New shader translator implementation (#654)
* Start implementing a new shader translator

* Fix shift instructions and a typo

* Small refactoring on StructuredProgram, move RemovePhis method to a separate class

* Initial geometry shader support

* Implement TLD4

* Fix -- There's no negation on FMUL32I

* Add constant folding and algebraic simplification optimizations, nits

* Some leftovers from constant folding

* Avoid cast for constant assignments

* Add a branch elimination pass, and misc small fixes

* Remove redundant branches, add expression propagation and other improvements on the code

* Small leftovers -- add missing break and continue, remove unused properties, other improvements

* Add null check to handle empty block cases on block visitor

* Add HADD2 and HMUL2 half float shader instructions

* Optimize pack/unpack sequences, some fixes related to half float instructions

* Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen

* Fix copy paste mistake that caused RZ to be ignored on the AST instruction

* Add workaround for conditional exit, and fix half float instruction with constant buffer

* Add missing 0.0 source for TLDS.LZ variants

* Simplify the switch for TLDS.LZ

* Texture instructions related fixes

* Implement the HFMA instruction, and some misc. fixes

* Enable constant folding on UnpackHalf2x16 instructions

* Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods

* Remove the old shader translator

* Remove ShaderDeclInfo and other unused things

* Add dual vertex shader support

* Add ShaderConfig, used to pass shader type and maximum cbuffer size

* Move and rename some instruction enums

* Move texture instructions into a separate file

* Move operand GetExpression and locals management to OperandManager

* Optimize opcode decoding using a simple list and binary search

* Add missing condition for do-while on goto elimination

* Misc. fixes on texture instructions

* Simplify TLDS switch

* Address PR feedback, and a nit
2019-04-18 09:57:08 +10:00

79 lines
1.9 KiB
C#

using Ryujinx.Graphics.Shader.Decoders;
using System;
using System.Collections.Generic;
namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
{
class Operand
{
private const int CbufSlotBits = 5;
private const int CbufSlotLsb = 32 - CbufSlotBits;
private const int CbufSlotMask = (1 << CbufSlotBits) - 1;
public OperandType Type { get; }
public int Value { get; }
public INode AsgOp { get; set; }
public HashSet<INode> UseOps { get; }
private Operand()
{
UseOps = new HashSet<INode>();
}
public Operand(OperandType type) : this()
{
Type = type;
}
public Operand(OperandType type, int value) : this()
{
Type = type;
Value = value;
}
public Operand(Register reg) : this()
{
Type = OperandType.Register;
Value = PackRegInfo(reg.Index, reg.Type);
}
public Operand(int slot, int offset) : this()
{
Type = OperandType.ConstantBuffer;
Value = PackCbufInfo(slot, offset);
}
private static int PackCbufInfo(int slot, int offset)
{
return (slot << CbufSlotLsb) | offset;
}
private static int PackRegInfo(int index, RegisterType type)
{
return ((int)type << 24) | index;
}
public int GetCbufSlot()
{
return (Value >> CbufSlotLsb) & CbufSlotMask;
}
public int GetCbufOffset()
{
return Value & ~(CbufSlotMask << CbufSlotLsb);
}
public Register GetRegister()
{
return new Register(Value & 0xffffff, (RegisterType)(Value >> 24));
}
public float AsFloat()
{
return BitConverter.Int32BitsToSingle(Value);
}
}
}