mirror of
https://github.com/GreemDev/Ryujinx.git
synced 2024-12-15 03:21:15 +01:00
814f75142e
* Implemented in IR the managed methods of the Saturating region ... ... of the SoftFallback class (the SatQ ones). The need to natively manage the Fpcr and Fpsr system registers is still a fact. Contributes to https://github.com/Ryujinx/Ryujinx/issues/2917 ; I will open another PR to implement in Intrinsics-branchless the methods of the Saturation region as well (the SatXXXToXXX ones). All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq. * Ptc.InternalVersion = 3665 * Addressed PR feedback. * Implemented in IR the managed methods of the ShlReg region of the SoftFallback class. It also includes the last two SatQ ones (following up on https://github.com/Ryujinx/Ryujinx/pull/3665). All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq. * Fpsr and Fpcr freed. Handling/isolation of Fpsr and Fpcr via register for IR and via memory for Tests and Threads, with synchronization to context exchanges (explicit for SoftFloat); without having to call managed methods. Thanks to the inlining work of the previous two PRs and others in this. Tests performed locally in both release and debug modes, in both lowcq and highcq, with FastFP to true and false (explicit FP tests included). Tested with the title Tony Hawk's PS. Depends on shlreg. * Update InstEmitSimdHelper.cs * De-magic Masks. Remove the Stride and Len flags; Fpsr.NZCV are A32 only, then moved to Fpscr: this leads to emitting less IR in reference to Get/Set Fpsr/Fpcr/Fpscr methods in reference to Mrs/Msr (A64) and Vmrs/Vmsr (A32) instructions. * Addressed PR feedback.
225 lines
5.7 KiB
C#
225 lines
5.7 KiB
C#
using ARMeilleure.Memory;
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using ARMeilleure.State;
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using ARMeilleure.Translation;
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using System;
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namespace ARMeilleure.Instructions
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{
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static class NativeInterface
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{
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private class ThreadContext
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{
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public ExecutionContext Context { get; }
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public IMemoryManager Memory { get; }
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public Translator Translator { get; }
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public ThreadContext(ExecutionContext context, IMemoryManager memory, Translator translator)
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{
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Context = context;
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Memory = memory;
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Translator = translator;
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}
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}
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[ThreadStatic]
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private static ThreadContext Context;
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public static void RegisterThread(ExecutionContext context, IMemoryManager memory, Translator translator)
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{
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Context = new ThreadContext(context, memory, translator);
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}
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public static void UnregisterThread()
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{
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Context = null;
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}
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public static void Break(ulong address, int imm)
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{
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Statistics.PauseTimer();
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GetContext().OnBreak(address, imm);
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Statistics.ResumeTimer();
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}
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public static void SupervisorCall(ulong address, int imm)
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{
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Statistics.PauseTimer();
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GetContext().OnSupervisorCall(address, imm);
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Statistics.ResumeTimer();
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}
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public static void Undefined(ulong address, int opCode)
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{
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Statistics.PauseTimer();
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GetContext().OnUndefined(address, opCode);
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Statistics.ResumeTimer();
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}
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#region "System registers"
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public static ulong GetCtrEl0()
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{
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return (ulong)GetContext().CtrEl0;
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}
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public static ulong GetDczidEl0()
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{
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return (ulong)GetContext().DczidEl0;
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}
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public static ulong GetTpidrEl0()
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{
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return (ulong)GetContext().TpidrEl0;
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}
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public static uint GetTpidrEl032()
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{
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return (uint)GetContext().TpidrEl0;
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}
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public static ulong GetTpidrroEl0()
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{
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return (ulong)GetContext().TpidrroEl0;
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}
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public static uint GetTpidr32()
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{
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return (uint)GetContext().TpidrroEl0;
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}
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public static ulong GetCntfrqEl0()
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{
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return GetContext().CntfrqEl0;
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}
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public static ulong GetCntpctEl0()
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{
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return GetContext().CntpctEl0;
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}
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public static ulong GetCntvctEl0()
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{
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return GetContext().CntvctEl0;
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}
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public static void SetTpidrEl0(ulong value)
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{
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GetContext().TpidrEl0 = (long)value;
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}
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public static void SetTpidrEl032(uint value)
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{
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GetContext().TpidrEl0 = (long)value;
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}
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#endregion
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#region "Read"
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public static byte ReadByte(ulong address)
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{
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return GetMemoryManager().ReadTracked<byte>(address);
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}
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public static ushort ReadUInt16(ulong address)
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{
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return GetMemoryManager().ReadTracked<ushort>(address);
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}
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public static uint ReadUInt32(ulong address)
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{
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return GetMemoryManager().ReadTracked<uint>(address);
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}
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public static ulong ReadUInt64(ulong address)
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{
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return GetMemoryManager().ReadTracked<ulong>(address);
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}
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public static V128 ReadVector128(ulong address)
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{
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return GetMemoryManager().ReadTracked<V128>(address);
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}
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#endregion
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#region "Write"
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public static void WriteByte(ulong address, byte value)
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{
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GetMemoryManager().Write(address, value);
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}
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public static void WriteUInt16(ulong address, ushort value)
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{
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GetMemoryManager().Write(address, value);
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}
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public static void WriteUInt32(ulong address, uint value)
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{
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GetMemoryManager().Write(address, value);
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}
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public static void WriteUInt64(ulong address, ulong value)
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{
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GetMemoryManager().Write(address, value);
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}
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public static void WriteVector128(ulong address, V128 value)
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{
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GetMemoryManager().Write(address, value);
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}
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#endregion
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public static void EnqueueForRejit(ulong address)
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{
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Context.Translator.EnqueueForRejit(address, GetContext().ExecutionMode);
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}
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public static void SignalMemoryTracking(ulong address, ulong size, bool write)
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{
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GetMemoryManager().SignalMemoryTracking(address, size, write);
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}
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public static void ThrowInvalidMemoryAccess(ulong address)
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{
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throw new InvalidAccessException(address);
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}
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public static ulong GetFunctionAddress(ulong address)
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{
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TranslatedFunction function = Context.Translator.GetOrTranslate(address, GetContext().ExecutionMode);
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return (ulong)function.FuncPtr.ToInt64();
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}
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public static void InvalidateCacheLine(ulong address)
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{
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Context.Translator.InvalidateJitCacheRegion(address, InstEmit.DczSizeInBytes);
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}
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public static bool CheckSynchronization()
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{
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Statistics.PauseTimer();
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ExecutionContext context = GetContext();
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context.CheckInterrupt();
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Statistics.ResumeTimer();
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return context.Running;
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}
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public static ExecutionContext GetContext()
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{
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return Context.Context;
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}
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public static IMemoryManager GetMemoryManager()
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{
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return Context.Memory;
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}
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}
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} |