Cool_Tools/citra-mk7
1
0
Fork 0
mirror of https://github.com/PabloMK7/citra.git synced 2024-11-23 23:31:05 +01:00
Code Issues Packages Projects Releases Wiki Activity

video_core: Refactor GPU interface (#7272)

Browse Source 
* video_core: Refactor GPU interface

* citra_qt: Better debug widget lifetime
This commit is contained in:
GPUCode 2023-12-28 12:46:57 +02:00 committed by GitHub
parent 602f4f60d8
commit 2bb7f89c30
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
167 changed files with 4172 additions and 4866 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
CMakeModules/GenerateSCMRev.cmake
View File

@ -26,16 +26,14 @@ set(HASH_FILES
"${VIDEO_CORE}/shader/generator/spv_fs_shader_gen.h"
"${VIDEO_CORE}/shader/shader.cpp"
"${VIDEO_CORE}/shader/shader.h"
"${VIDEO_CORE}/pica.cpp"
"${VIDEO_CORE}/pica.h"
"${VIDEO_CORE}/regs_framebuffer.h"
"${VIDEO_CORE}/regs_lighting.h"
"${VIDEO_CORE}/regs_pipeline.h"
"${VIDEO_CORE}/regs_rasterizer.h"
"${VIDEO_CORE}/regs_shader.h"
"${VIDEO_CORE}/regs_texturing.h"
"${VIDEO_CORE}/regs.cpp"
"${VIDEO_CORE}/regs.h"
"${VIDEO_CORE}/pica/regs_framebuffer.h"
"${VIDEO_CORE}/pica/regs_lighting.h"
"${VIDEO_CORE}/pica/regs_pipeline.h"
"${VIDEO_CORE}/pica/regs_rasterizer.h"
"${VIDEO_CORE}/pica/regs_shader.h"
"${VIDEO_CORE}/pica/regs_texturing.h"
"${VIDEO_CORE}/pica/regs_internal.cpp"
"${VIDEO_CORE}/pica/regs_internal.h"
)
set(COMBINED "")
foreach (F IN LISTS HASH_FILES)

1
src/android/app/src/main/jni/emu_window/emu_window.cpp
View File

@ -15,7 +15,6 @@
#include "jni/input_manager.h"
#include "network/network.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
static bool IsPortraitMode() {
return JNI_FALSE != IDCache::GetEnvForThread()->CallStaticBooleanMethod(

4
src/android/app/src/main/jni/emu_window/emu_window.h
View File

@ -7,6 +7,10 @@
#include <vector>
#include "core/frontend/emu_window.h"
namespace Core {
class System;
}
class EmuWindow_Android : public Frontend::EmuWindow {
public:
EmuWindow_Android(ANativeWindow* surface);

16
src/android/app/src/main/jni/emu_window/emu_window_gl.cpp
View File

@ -12,10 +12,11 @@
#include "common/logging/log.h"
#include "common/settings.h"
#include "core/core.h"
#include "input_common/main.h"
#include "jni/emu_window/emu_window_gl.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
static constexpr std::array<EGLint, 15> egl_attribs{EGL_SURFACE_TYPE,
EGL_WINDOW_BIT,
@ -71,8 +72,8 @@ private:
EGLContext egl_context{};
};
EmuWindow_Android_OpenGL::EmuWindow_Android_OpenGL(ANativeWindow* surface)
: EmuWindow_Android{surface} {
EmuWindow_Android_OpenGL::EmuWindow_Android_OpenGL(Core::System& system_, ANativeWindow* surface)
: EmuWindow_Android{surface}, system{system_} {
if (egl_display = eglGetDisplay(EGL_DEFAULT_DISPLAY); egl_display == EGL_NO_DISPLAY) {
LOG_CRITICAL(Frontend, "eglGetDisplay() failed");
return;
@ -199,6 +200,9 @@ void EmuWindow_Android_OpenGL::StopPresenting() {
}
void EmuWindow_Android_OpenGL::TryPresenting() {
if (!system.IsPoweredOn()) {
return;
}
if (presenting_state == PresentingState::Initial) [[unlikely]] {
eglMakeCurrent(egl_display, egl_surface, egl_surface, egl_context);
glBindFramebuffer(GL_DRAW_FRAMEBUFFER, 0);
@ -208,8 +212,6 @@ void EmuWindow_Android_OpenGL::TryPresenting() {
return;
}
eglSwapInterval(egl_display, Settings::values.use_vsync_new ? 1 : 0);
if (VideoCore::g_renderer) {
VideoCore::g_renderer->TryPresent(0);
eglSwapBuffers(egl_display, egl_surface);
}
system.GPU().Renderer().TryPresent(0);
eglSwapBuffers(egl_display, egl_surface);
}

7
src/android/app/src/main/jni/emu_window/emu_window_gl.h
View File

@ -11,11 +11,15 @@
#include "jni/emu_window/emu_window.h"
namespace Core {
class System;
}
struct ANativeWindow;
class EmuWindow_Android_OpenGL : public EmuWindow_Android {
public:
EmuWindow_Android_OpenGL(ANativeWindow* surface);
EmuWindow_Android_OpenGL(Core::System& system, ANativeWindow* surface);
~EmuWindow_Android_OpenGL() override = default;
void TryPresenting() override;
@ -30,6 +34,7 @@ private:
void DestroyContext() override;
private:
Core::System& system;
EGLConfig egl_config;
EGLSurface egl_surface{};
EGLContext egl_context{};

1
src/android/app/src/main/jni/emu_window/emu_window_vk.cpp
View File

@ -7,7 +7,6 @@
#include "common/logging/log.h"
#include "common/settings.h"
#include "jni/emu_window/emu_window_vk.h"
#include "video_core/video_core.h"
class GraphicsContext_Android final : public Frontend::GraphicsContext {
public:

30
src/android/app/src/main/jni/native.cpp
View File

@ -51,8 +51,9 @@
#include "jni/id_cache.h"
#include "jni/input_manager.h"
#include "jni/ndk_motion.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
#if CITRA_ARCH(arm64)
#include <adrenotools/driver.h>
@ -126,7 +127,7 @@ static bool CheckMicPermission() {
static Core::System::ResultStatus RunCitra(const std::string& filepath) {
// Citra core only supports a single running instance
std::lock_guard<std::mutex> lock(running_mutex);
std::scoped_lock lock(running_mutex);
LOG_INFO(Frontend, "Citra starting...");
@ -137,10 +138,12 @@ static Core::System::ResultStatus RunCitra(const std::string& filepath) {
return Core::System::ResultStatus::ErrorLoader;
}
Core::System& system{Core::System::GetInstance()};
const auto graphics_api = Settings::values.graphics_api.GetValue();
switch (graphics_api) {
case Settings::GraphicsAPI::OpenGL:
window = std::make_unique<EmuWindow_Android_OpenGL>(s_surf);
window = std::make_unique<EmuWindow_Android_OpenGL>(system, s_surf);
break;
case Settings::GraphicsAPI::Vulkan:
window = std::make_unique<EmuWindow_Android_Vulkan>(s_surf, vulkan_library);
@ -150,8 +153,6 @@ static Core::System::ResultStatus RunCitra(const std::string& filepath) {
window = std::make_unique<EmuWindow_Android_Vulkan>(s_surf, vulkan_library);
}
Core::System& system{Core::System::GetInstance()};
// Forces a config reload on game boot, if the user changed settings in the UI
Config{};
// Replace with game-specific settings
@ -179,6 +180,7 @@ static Core::System::ResultStatus RunCitra(const std::string& filepath) {
// Register microphone permission check
system.RegisterMicPermissionCheck(&CheckMicPermission);
Pica::g_debug_context = Pica::DebugContext::Construct();
InputManager::Init();
window->MakeCurrent();
@ -196,7 +198,7 @@ static Core::System::ResultStatus RunCitra(const std::string& filepath) {
LoadDiskCacheProgress(VideoCore::LoadCallbackStage::Prepare, 0, 0);
std::unique_ptr<Frontend::GraphicsContext> cpu_context;
system.Renderer().Rasterizer()->LoadDiskResources(stop_run, &LoadDiskCacheProgress);
system.GPU().Renderer().Rasterizer()->LoadDiskResources(stop_run, &LoadDiskCacheProgress);
LoadDiskCacheProgress(VideoCore::LoadCallbackStage::Complete, 0, 0);
@ -275,8 +277,10 @@ void Java_org_citra_citra_1emu_NativeLibrary_surfaceChanged(JNIEnv* env,
if (window) {
window->OnSurfaceChanged(s_surf);
}
if (VideoCore::g_renderer) {
VideoCore::g_renderer->NotifySurfaceChanged();
auto& system = Core::System::GetInstance();
if (system.IsPoweredOn()) {
system.GPU().Renderer().NotifySurfaceChanged();
}
LOG_INFO(Frontend, "Surface changed");
@ -311,8 +315,9 @@ void Java_org_citra_citra_1emu_NativeLibrary_notifyOrientationChange([[maybe_unu
jint layout_option,
jint rotation) {
Settings::values.layout_option = static_cast<Settings::LayoutOption>(layout_option);
if (VideoCore::g_renderer) {
VideoCore::g_renderer->UpdateCurrentFramebufferLayout(!(rotation % 2));
auto& system = Core::System::GetInstance();
if (system.IsPoweredOn()) {
system.GPU().Renderer().UpdateCurrentFramebufferLayout(!(rotation % 2));
}
InputManager::screen_rotation = rotation;
Camera::NDK::g_rotation = rotation;
@ -322,8 +327,9 @@ void Java_org_citra_citra_1emu_NativeLibrary_swapScreens([[maybe_unused]] JNIEnv
[[maybe_unused]] jobject obj,
jboolean swap_screens, jint rotation) {
Settings::values.swap_screen = swap_screens;
if (VideoCore::g_renderer) {
VideoCore::g_renderer->UpdateCurrentFramebufferLayout(!(rotation % 2));
auto& system = Core::System::GetInstance();
if (system.IsPoweredOn()) {
system.GPU().Renderer().UpdateCurrentFramebufferLayout(!(rotation % 2));
}
InputManager::screen_rotation = rotation;
Camera::NDK::g_rotation = rotation;

8
src/citra/citra.cpp
View File

@ -36,6 +36,7 @@
#include "core/telemetry_session.h"
#include "input_common/main.h"
#include "network/network.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#ifdef __unix__
@ -438,9 +439,10 @@ int main(int argc, char** argv) {
movie.StartRecording(movie_record, movie_record_author);
}
if (!dump_video.empty() && DynamicLibrary::FFmpeg::LoadFFmpeg()) {
auto& renderer = system.GPU().Renderer();
const auto layout{
Layout::FrameLayoutFromResolutionScale(system.Renderer().GetResolutionScaleFactor())};
auto dumper = std::make_shared<VideoDumper::FFmpegBackend>();
Layout::FrameLayoutFromResolutionScale(renderer.GetResolutionScaleFactor())};
auto dumper = std::make_shared<VideoDumper::FFmpegBackend>(renderer);
if (dumper->StartDumping(dump_video, layout)) {
system.RegisterVideoDumper(dumper);
}
@ -458,7 +460,7 @@ int main(int argc, char** argv) {
});
std::atomic_bool stop_run;
system.Renderer().Rasterizer()->LoadDiskResources(
system.GPU().Renderer().Rasterizer()->LoadDiskResources(
stop_run, [](VideoCore::LoadCallbackStage stage, std::size_t value, std::size_t total) {
LOG_DEBUG(Frontend, "Loading stage {} progress {} {}", static_cast<u32>(stage), value,
total);

5
src/citra/emu_window/emu_window_sdl2_gl.cpp
View File

@ -11,8 +11,9 @@
#include "citra/emu_window/emu_window_sdl2_gl.h"
#include "common/scm_rev.h"
#include "common/settings.h"
#include "core/core.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
class SDLGLContext : public Frontend::GraphicsContext {
public:
@ -159,7 +160,7 @@ void EmuWindow_SDL2_GL::Present() {
SDL_GL_MakeCurrent(render_window, window_context);
SDL_GL_SetSwapInterval(1);
while (IsOpen()) {
VideoCore::g_renderer->TryPresent(100, is_secondary);
system.GPU().Renderer().TryPresent(100, is_secondary);
SDL_GL_SwapWindow(render_window);
}
SDL_GL_MakeCurrent(render_window, nullptr);

3
src/citra/emu_window/emu_window_sdl2_sw.cpp
View File

@ -13,6 +13,7 @@
#include "common/settings.h"
#include "core/core.h"
#include "core/frontend/emu_window.h"
#include "video_core/gpu.h"
#include "video_core/renderer_software/renderer_software.h"
class DummyContext : public Frontend::GraphicsContext {};
@ -94,7 +95,7 @@ void EmuWindow_SDL2_SW::Present() {
}
SDL_Surface* EmuWindow_SDL2_SW::LoadFramebuffer(VideoCore::ScreenId screen_id) {
const auto& renderer = static_cast<SwRenderer::RendererSoftware&>(system.Renderer());
const auto& renderer = static_cast<SwRenderer::RendererSoftware&>(system.GPU().Renderer());
const auto& info = renderer.Screen(screen_id);
const int width = static_cast<int>(info.width);
const int height = static_cast<int>(info.height);

15
src/citra_qt/bootmanager.cpp
View File

@ -22,9 +22,9 @@
#include "input_common/main.h"
#include "input_common/motion_emu.h"
#include "video_core/custom_textures/custom_tex_manager.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/renderer_software/renderer_software.h"
#include "video_core/video_core.h"
#ifdef HAS_OPENGL
#include <glad/glad.h>
@ -73,7 +73,7 @@ void EmuThread::run() {
emit LoadProgress(VideoCore::LoadCallbackStage::Prepare, 0, 0);
system.Renderer().Rasterizer()->LoadDiskResources(
system.GPU().Renderer().Rasterizer()->LoadDiskResources(
stop_run, [this](VideoCore::LoadCallbackStage stage, std::size_t value, std::size_t total) {
emit LoadProgress(stage, value, total);
});
@ -284,9 +284,7 @@ public:
}
context->MakeCurrent();
glBindFramebuffer(GL_DRAW_FRAMEBUFFER, 0);
if (VideoCore::g_renderer) {
VideoCore::g_renderer->TryPresent(100, is_secondary);
}
system.GPU().Renderer().TryPresent(100, is_secondary);
context->SwapBuffers();
glFinish();
}
@ -367,7 +365,7 @@ struct SoftwareRenderWidget : public RenderWidget {
}
QImage LoadFramebuffer(VideoCore::ScreenId screen_id) {
const auto& renderer = static_cast<SwRenderer::RendererSoftware&>(system.Renderer());
const auto& renderer = static_cast<SwRenderer::RendererSoftware&>(system.GPU().Renderer());
const auto& info = renderer.Screen(screen_id);
const int width = static_cast<int>(info.width);
const int height = static_cast<int>(info.height);
@ -678,13 +676,14 @@ void GRenderWindow::ReleaseRenderTarget() {
}
void GRenderWindow::CaptureScreenshot(u32 res_scale, const QString& screenshot_path) {
auto& renderer = system.GPU().Renderer();
if (res_scale == 0) {
res_scale = system.Renderer().GetResolutionScaleFactor();
res_scale = renderer.GetResolutionScaleFactor();
}
const auto layout{Layout::FrameLayoutFromResolutionScale(res_scale, is_secondary)};
screenshot_image = QImage(QSize(layout.width, layout.height), QImage::Format_RGB32);
system.Renderer().RequestScreenshot(
renderer.RequestScreenshot(
screenshot_image.bits(),
[this, screenshot_path](bool invert_y) {
const std::string std_screenshot_path = screenshot_path.toStdString();

1
src/citra_qt/configuration/configure_graphics.cpp
View File

@ -20,7 +20,6 @@ ConfigureGraphics::ConfigureGraphics(std::span<const QString> physical_devices,
ui->physical_device_combo->addItem(name);
}
ui->toggle_vsync_new->setEnabled(!is_powered_on);
ui->graphics_api_combo->setEnabled(!is_powered_on);
ui->physical_device_combo->setEnabled(!is_powered_on);
ui->toggle_async_shaders->setEnabled(!is_powered_on);

40
src/citra_qt/debugger/graphics/graphics.cpp
View File

@ -5,8 +5,8 @@
#include <QListView>
#include "citra_qt/debugger/graphics/graphics.h"
#include "citra_qt/util/util.h"
extern GraphicsDebugger g_debugger;
#include "core/core.h"
#include "video_core/gpu.h"
GPUCommandStreamItemModel::GPUCommandStreamItemModel(QObject* parent)
: QAbstractListModel(parent), command_count(0) {
@ -19,19 +19,19 @@ int GPUCommandStreamItemModel::rowCount([[maybe_unused]] const QModelIndex& pare
}
QVariant GPUCommandStreamItemModel::data(const QModelIndex& index, int role) const {
if (!index.isValid())
if (!index.isValid() || !GetDebugger())
return QVariant();
int command_index = index.row();
const Service::GSP::Command& command = GetDebugger()->ReadGXCommandHistory(command_index);
if (role == Qt::DisplayRole) {
std::map<Service::GSP::CommandId, const char*> command_names = {
{Service::GSP::CommandId::REQUEST_DMA, "REQUEST_DMA"},
{Service::GSP::CommandId::SUBMIT_GPU_CMDLIST, "SUBMIT_GPU_CMDLIST"},
{Service::GSP::CommandId::SET_MEMORY_FILL, "SET_MEMORY_FILL"},
{Service::GSP::CommandId::SET_DISPLAY_TRANSFER, "SET_DISPLAY_TRANSFER"},
{Service::GSP::CommandId::SET_TEXTURE_COPY, "SET_TEXTURE_COPY"},
{Service::GSP::CommandId::CACHE_FLUSH, "CACHE_FLUSH"},
{Service::GSP::CommandId::RequestDma, "REQUEST_DMA"},
{Service::GSP::CommandId::SubmitCmdList, "SUBMIT_GPU_CMDLIST"},
{Service::GSP::CommandId::MemoryFill, "SET_MEMORY_FILL"},
{Service::GSP::CommandId::DisplayTransfer, "SET_DISPLAY_TRANSFER"},
{Service::GSP::CommandId::TextureCopy, "SET_TEXTURE_COPY"},
{Service::GSP::CommandId::CacheFlush, "CACHE_FLUSH"},
};
const u32* command_data = reinterpret_cast<const u32*>(&command);
QString str = QStringLiteral("%1 %2 %3 %4 %5 %6 %7 %8 %9")
@ -63,8 +63,8 @@ void GPUCommandStreamItemModel::OnGXCommandFinishedInternal(int total_command_co
emit dataChanged(index(prev_command_count, 0), index(total_command_count - 1, 0));
}
GPUCommandStreamWidget::GPUCommandStreamWidget(QWidget* parent)
: QDockWidget(tr("Graphics Debugger"), parent), model(this) {
GPUCommandStreamWidget::GPUCommandStreamWidget(Core::System& system_, QWidget* parent)
: QDockWidget(tr("Graphics Debugger"), parent), system{system_}, model(this) {
setObjectName(QStringLiteral("GraphicsDebugger"));
auto* command_list = new QListView;
@ -74,12 +74,26 @@ GPUCommandStreamWidget::GPUCommandStreamWidget(QWidget* parent)
setWidget(command_list);
}
void GPUCommandStreamWidget::Register() {
auto& debugger = system.GPU().Debugger();
debugger.RegisterObserver(&model);
}
void GPUCommandStreamWidget::Unregister() {
auto& debugger = system.GPU().Debugger();
debugger.UnregisterObserver(&model);
}
void GPUCommandStreamWidget::showEvent(QShowEvent* event) {
g_debugger.RegisterObserver(&model);
if (system.IsPoweredOn()) {
Register();
}
QDockWidget::showEvent(event);
}
void GPUCommandStreamWidget::hideEvent(QHideEvent* event) {
g_debugger.UnregisterObserver(&model);
if (system.IsPoweredOn()) {
Unregister();
}
QDockWidget::hideEvent(event);
}

12
src/citra_qt/debugger/graphics/graphics.h
View File

@ -8,8 +8,12 @@
#include <QDockWidget>
#include "video_core/gpu_debugger.h"
namespace Core {
class System;
}
class GPUCommandStreamItemModel : public QAbstractListModel,
public GraphicsDebugger::DebuggerObserver {
public VideoCore::GraphicsDebugger::DebuggerObserver {
Q_OBJECT
public:
@ -35,12 +39,16 @@ class GPUCommandStreamWidget : public QDockWidget {
Q_OBJECT
public:
GPUCommandStreamWidget(QWidget* parent = nullptr);
GPUCommandStreamWidget(Core::System& system, QWidget* parent = nullptr);
void Register();
void Unregister();
protected:
void showEvent(QShowEvent* event) override;
void hideEvent(QHideEvent* event) override;
private:
Core::System& system;
GPUCommandStreamItemModel model;
};

3
src/citra_qt/debugger/graphics/graphics_breakpoint_observer.cpp
View File

@ -18,7 +18,8 @@ BreakPointObserverDock::BreakPointObserverDock(std::shared_ptr<Pica::DebugContex
&BreakPointObserverDock::OnBreakPointHit, Qt::BlockingQueuedConnection);
}
void BreakPointObserverDock::OnPicaBreakPointHit(Pica::DebugContext::Event event, void* data) {
void BreakPointObserverDock::OnPicaBreakPointHit(Pica::DebugContext::Event event,
const void* data) {
emit BreakPointHit(event, data);
}

6
src/citra_qt/debugger/graphics/graphics_breakpoint_observer.h
View File

@ -20,14 +20,14 @@ public:
BreakPointObserverDock(std::shared_ptr<Pica::DebugContext> debug_context, const QString& title,
QWidget* parent = nullptr);
void OnPicaBreakPointHit(Pica::DebugContext::Event event, void* data) override;
void OnPicaBreakPointHit(Pica::DebugContext::Event event, const void* data) override;
void OnPicaResume() override;
signals:
void Resumed();
void BreakPointHit(Pica::DebugContext::Event event, void* data);
void BreakPointHit(Pica::DebugContext::Event event, const void* data);
private:
virtual void OnBreakPointHit(Pica::DebugContext::Event event, void* data) = 0;
virtual void OnBreakPointHit(Pica::DebugContext::Event event, const void* data) = 0;
virtual void OnResumed() = 0;
};

4
src/citra_qt/debugger/graphics/graphics_breakpoints.cpp
View File

@ -191,12 +191,12 @@ GraphicsBreakPointsWidget::GraphicsBreakPointsWidget(
setWidget(main_widget);
}
void GraphicsBreakPointsWidget::OnPicaBreakPointHit(Event event, void* data) {
void GraphicsBreakPointsWidget::OnPicaBreakPointHit(Event event, const void* data) {
// Process in GUI thread
emit BreakPointHit(event, data);
}
void GraphicsBreakPointsWidget::OnBreakPointHit(Pica::DebugContext::Event event, void* data) {
void GraphicsBreakPointsWidget::OnBreakPointHit(Pica::DebugContext::Event event, const void* data) {
status_text->setText(tr("Emulation halted at breakpoint"));
resume_button->setEnabled(true);
}

6
src/citra_qt/debugger/graphics/graphics_breakpoints.h
View File

@ -23,16 +23,16 @@ public:
explicit GraphicsBreakPointsWidget(std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent = nullptr);
void OnPicaBreakPointHit(Pica::DebugContext::Event event, void* data) override;
void OnPicaBreakPointHit(Pica::DebugContext::Event event, const void* data) override;
void OnPicaResume() override;
signals:
void Resumed();
void BreakPointHit(Pica::DebugContext::Event event, void* data);
void BreakPointHit(Pica::DebugContext::Event event, const void* data);
void BreakPointsChanged(const QModelIndex& topLeft, const QModelIndex& bottomRight);
private:
void OnBreakPointHit(Pica::DebugContext::Event event, void* data);
void OnBreakPointHit(Pica::DebugContext::Event event, const void* data);
void OnItemDoubleClicked(const QModelIndex&);
void OnResumeRequested();
void OnResumed();

16
src/citra_qt/debugger/graphics/graphics_cmdlists.cpp
View File

@ -19,8 +19,8 @@
#include "core/core.h"
#include "core/memory.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/pica_state.h"
#include "video_core/regs.h"
#include "video_core/gpu.h"
#include "video_core/pica/pica_core.h"
#include "video_core/texture/texture_decode.h"
namespace {
@ -73,7 +73,7 @@ QVariant GPUCommandListModel::data(const QModelIndex& index, int role) const {
if (role == Qt::DisplayRole) {
switch (index.column()) {
case 0:
return QString::fromLatin1(Pica::Regs::GetRegisterName(write.cmd_id));
return QString::fromLatin1(Pica::RegsInternal::GetRegisterName(write.cmd_id));
case 1:
return QStringLiteral("%1").arg(write.cmd_id, 3, 16, QLatin1Char('0'));
case 2:
@ -119,8 +119,7 @@ void GPUCommandListModel::OnPicaTraceFinished(const Pica::DebugUtils::PicaTrace&
}
#define COMMAND_IN_RANGE(cmd_id, reg_name) \
(cmd_id >= PICA_REG_INDEX(reg_name) && \
cmd_id < PICA_REG_INDEX(reg_name) + sizeof(decltype(Pica::g_state.regs.reg_name)) / 4)
(cmd_id >= PICA_REG_INDEX(reg_name) && cmd_id <= PICA_REG_INDEX(reg_name))
void GPUCommandListWidget::OnCommandDoubleClicked(const QModelIndex& index) {
const unsigned int command_id =
@ -147,13 +146,13 @@ void GPUCommandListWidget::OnCommandDoubleClicked(const QModelIndex& index) {
void GPUCommandListWidget::SetCommandInfo(const QModelIndex& index) {
QWidget* new_info_widget = nullptr;
const unsigned int command_id =
const u32 command_id =
list_widget->model()->data(index, GPUCommandListModel::CommandIdRole).toUInt();
if (COMMAND_IN_RANGE(command_id, texturing.texture0) ||
COMMAND_IN_RANGE(command_id, texturing.texture1) ||
COMMAND_IN_RANGE(command_id, texturing.texture2)) {
unsigned texture_index;
u32 texture_index;
if (COMMAND_IN_RANGE(command_id, texturing.texture0)) {
texture_index = 0;
} else if (COMMAND_IN_RANGE(command_id, texturing.texture1)) {
@ -162,7 +161,8 @@ void GPUCommandListWidget::SetCommandInfo(const QModelIndex& index) {
texture_index = 2;
}
const auto texture = Pica::g_state.regs.texturing.GetTextures()[texture_index];
auto& pica = system.GPU().PicaCore();
const auto texture = pica.regs.internal.texturing.GetTextures()[texture_index];
const auto config = texture.config;
const auto format = texture.format;

30
src/citra_qt/debugger/graphics/graphics_surface.cpp
View File

@ -15,10 +15,10 @@
#include "citra_qt/debugger/graphics/graphics_surface.h"
#include "citra_qt/util/spinbox.h"
#include "common/color.h"
#include "core/core.h"
#include "core/memory.h"
#include "video_core/pica_state.h"
#include "video_core/regs_framebuffer.h"
#include "video_core/regs_texturing.h"
#include "video_core/gpu.h"
#include "video_core/pica/pica_core.h"
#include "video_core/texture/texture_decode.h"
#include "video_core/utils.h"
@ -49,10 +49,10 @@ void SurfacePicture::mouseMoveEvent(QMouseEvent* event) {
mousePressEvent(event);
}
GraphicsSurfaceWidget::GraphicsSurfaceWidget(Memory::MemorySystem& memory_,
GraphicsSurfaceWidget::GraphicsSurfaceWidget(Core::System& system_,
std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent)
: BreakPointObserverDock(debug_context, tr("Pica Surface Viewer"), parent), memory{memory_},
: BreakPointObserverDock(debug_context, tr("Pica Surface Viewer"), parent), system{system_},
surface_source(Source::ColorBuffer) {
setObjectName(QStringLiteral("PicaSurface"));
@ -214,7 +214,7 @@ GraphicsSurfaceWidget::GraphicsSurfaceWidget(Memory::MemorySystem& memory_,
}
}
void GraphicsSurfaceWidget::OnBreakPointHit(Pica::DebugContext::Event event, void* data) {
void GraphicsSurfaceWidget::OnBreakPointHit(Pica::DebugContext::Event event, const void* data) {
emit Update();
widget()->setEnabled(true);
}
@ -289,7 +289,7 @@ void GraphicsSurfaceWidget::Pick(int x, int y) {
return;
}
const u8* buffer = memory.GetPhysicalPointer(surface_address);
const u8* buffer = system.Memory().GetPhysicalPointer(surface_address);
if (!buffer) {
surface_info_label->setText(tr("(unable to access pixel data)"));
surface_info_label->setAlignment(Qt::AlignCenter);
@ -410,13 +410,13 @@ void GraphicsSurfaceWidget::Pick(int x, int y) {
void GraphicsSurfaceWidget::OnUpdate() {
QPixmap pixmap;
const auto& regs = system.GPU().PicaCore().regs.internal;
switch (surface_source) {
case Source::ColorBuffer: {
// TODO: Store a reference to the registers in the debug context instead of accessing them
// directly...
const auto& framebuffer = Pica::g_state.regs.framebuffer.framebuffer;
const auto& framebuffer = regs.framebuffer.framebuffer;
surface_address = framebuffer.GetColorBufferPhysicalAddress();
surface_width = framebuffer.GetWidth();
surface_height = framebuffer.GetHeight();
@ -451,8 +451,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
}
case Source::DepthBuffer: {
const auto& framebuffer = Pica::g_state.regs.framebuffer.framebuffer;
const auto& framebuffer = regs.framebuffer.framebuffer;
surface_address = framebuffer.GetDepthBufferPhysicalAddress();
surface_width = framebuffer.GetWidth();
surface_height = framebuffer.GetHeight();
@ -479,8 +478,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
}
case Source::StencilBuffer: {
const auto& framebuffer = Pica::g_state.regs.framebuffer.framebuffer;
const auto& framebuffer = regs.framebuffer.framebuffer;
surface_address = framebuffer.GetDepthBufferPhysicalAddress();
surface_width = framebuffer.GetWidth();
surface_height = framebuffer.GetHeight();
@ -513,7 +511,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
break;
}
const auto texture = Pica::g_state.regs.texturing.GetTextures()[texture_index];
const auto texture = regs.texturing.GetTextures()[texture_index];
auto info = Pica::Texture::TextureInfo::FromPicaRegister(texture.config, texture.format);
surface_address = info.physical_address;
@ -545,7 +543,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
// TODO: Implement a good way to visualize alpha components!
QImage decoded_image(surface_width, surface_height, QImage::Format_ARGB32);
const u8* buffer = memory.GetPhysicalPointer(surface_address);
const u8* buffer = system.Memory().GetPhysicalPointer(surface_address);
if (!buffer) {
surface_picture_label->hide();
@ -681,7 +679,7 @@ void GraphicsSurfaceWidget::SaveSurface() {
tr("Failed to save surface data to file '%1'").arg(filename));
}
} else if (selected_filter == bin_filter) {
const u8* const buffer = memory.GetPhysicalPointer(surface_address);
const u8* const buffer = system.Memory().GetPhysicalPointer(surface_address);
ASSERT_MSG(buffer, "Memory not accessible");
QFile file{filename};

10
src/citra_qt/debugger/graphics/graphics_surface.h
View File

@ -14,8 +14,8 @@ class CSpinBox;
class GraphicsSurfaceWidget;
namespace Memory {
class MemorySystem;
namespace Core {
class System;
}
class SurfacePicture : public QLabel {
@ -76,7 +76,7 @@ class GraphicsSurfaceWidget : public BreakPointObserverDock {
static unsigned int NibblesPerPixel(Format format);
public:
explicit GraphicsSurfaceWidget(Memory::MemorySystem& memory,
explicit GraphicsSurfaceWidget(Core::System& system,
std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent = nullptr);
void Pick(int x, int y);
@ -95,12 +95,12 @@ signals:
void Update();
private:
void OnBreakPointHit(Pica::DebugContext::Event event, void* data) override;
void OnBreakPointHit(Pica::DebugContext::Event event, const void* data) override;
void OnResumed() override;
void SaveSurface();
Memory::MemorySystem& memory;
Core::System& system;
QComboBox* surface_source_list;
CSpinBox* surface_address_control;
QSpinBox* surface_width_control;

68
src/citra_qt/debugger/graphics/graphics_tracing.cpp
View File

@ -14,14 +14,15 @@
#include <nihstro/float24.h>
#include "citra_qt/debugger/graphics/graphics_tracing.h"
#include "common/common_types.h"
#include "core/hw/gpu.h"
#include "core/hw/lcd.h"
#include "core/core.h"
#include "core/tracer/recorder.h"
#include "video_core/pica_state.h"
#include "video_core/gpu.h"
#include "video_core/pica/pica_core.h"
GraphicsTracingWidget::GraphicsTracingWidget(std::shared_ptr<Pica::DebugContext> debug_context,
GraphicsTracingWidget::GraphicsTracingWidget(Core::System& system_,
std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent)
: BreakPointObserverDock(debug_context, tr("CiTrace Recorder"), parent) {
: BreakPointObserverDock(debug_context, tr("CiTrace Recorder"), parent), system{system_} {
setObjectName(QStringLiteral("CiTracing"));
@ -61,45 +62,46 @@ void GraphicsTracingWidget::StartRecording() {
if (!context)
return;
auto shader_binary = Pica::g_state.vs.program_code;
auto swizzle_data = Pica::g_state.vs.swizzle_data;
auto& pica = system.GPU().PicaCore();
auto shader_binary = pica.vs_setup.program_code;
auto swizzle_data = pica.vs_setup.swizzle_data;
// Encode floating point numbers to 24-bit values
// TODO: Drop this explicit conversion once we store float24 values bit-correctly internally.
std::array<u32, 4 * 16> default_attributes;
for (unsigned i = 0; i < 16; ++i) {
for (unsigned comp = 0; comp < 3; ++comp) {
default_attributes[4 * i + comp] = nihstro::to_float24(
Pica::g_state.input_default_attributes.attr[i][comp].ToFloat32());
for (u32 i = 0; i < 16; ++i) {
for (u32 comp = 0; comp < 3; ++comp) {
default_attributes[4 * i + comp] =
nihstro::to_float24(pica.input_default_attributes[i][comp].ToFloat32());
}
}
std::array<u32, 4 * 96> vs_float_uniforms;
for (unsigned i = 0; i < 96; ++i)
for (unsigned comp = 0; comp < 3; ++comp)
for (u32 i = 0; i < 96; ++i) {
for (u32 comp = 0; comp < 3; ++comp) {
vs_float_uniforms[4 * i + comp] =
nihstro::to_float24(Pica::g_state.vs.uniforms.f[i][comp].ToFloat32());
nihstro::to_float24(pica.vs_setup.uniforms.f[i][comp].ToFloat32());
}
}
CiTrace::Recorder::InitialState state;
std::copy_n((u32*)&GPU::g_regs, sizeof(GPU::g_regs) / sizeof(u32),
std::back_inserter(state.gpu_registers));
std::copy_n((u32*)&LCD::g_regs, sizeof(LCD::g_regs) / sizeof(u32),
std::back_inserter(state.lcd_registers));
std::copy_n((u32*)&Pica::g_state.regs, sizeof(Pica::g_state.regs) / sizeof(u32),
std::back_inserter(state.pica_registers));
std::copy(default_attributes.begin(), default_attributes.end(),
std::back_inserter(state.default_attributes));
std::copy(shader_binary.begin(), shader_binary.end(),
std::back_inserter(state.vs_program_binary));
std::copy(swizzle_data.begin(), swizzle_data.end(), std::back_inserter(state.vs_swizzle_data));
std::copy(vs_float_uniforms.begin(), vs_float_uniforms.end(),
std::back_inserter(state.vs_float_uniforms));
// boost::copy(TODO: Not implemented, std::back_inserter(state.gs_program_binary));
// boost::copy(TODO: Not implemented, std::back_inserter(state.gs_swizzle_data));
// boost::copy(TODO: Not implemented, std::back_inserter(state.gs_float_uniforms));
auto recorder = new CiTrace::Recorder(state);
context->recorder = std::shared_ptr<CiTrace::Recorder>(recorder);
const auto copy = [&](std::vector<u32>& dest, auto& data) {
dest.resize(sizeof(data));
std::memcpy(dest.data(), std::addressof(data), sizeof(data));
};
copy(state.pica_registers, pica.regs);
copy(state.lcd_registers, pica.regs_lcd);
copy(state.default_attributes, default_attributes);
copy(state.vs_program_binary, shader_binary);
copy(state.vs_swizzle_data, swizzle_data);
copy(state.vs_float_uniforms, vs_float_uniforms);
// copy(TODO: Not implemented, std::back_inserter(state.gs_program_binary));
// copy(TODO: Not implemented, std::back_inserter(state.gs_swizzle_data));
// copy(TODO: Not implemented, std::back_inserter(state.gs_float_uniforms));
context->recorder = std::make_shared<CiTrace::Recorder>(state);
emit SetStartTracingButtonEnabled(false);
emit SetStopTracingButtonEnabled(true);
@ -139,7 +141,7 @@ void GraphicsTracingWidget::AbortRecording() {
emit SetStartTracingButtonEnabled(true);
}
void GraphicsTracingWidget::OnBreakPointHit(Pica::DebugContext::Event event, void* data) {
void GraphicsTracingWidget::OnBreakPointHit(Pica::DebugContext::Event event, const void* data) {
widget()->setEnabled(true);
}

12
src/citra_qt/debugger/graphics/graphics_tracing.h
View File

@ -6,13 +6,18 @@
#include "citra_qt/debugger/graphics/graphics_breakpoint_observer.h"
namespace Core {
class System;
}
class EmuThread;
class GraphicsTracingWidget : public BreakPointObserverDock {
Q_OBJECT
public:
explicit GraphicsTracingWidget(std::shared_ptr<Pica::DebugContext> debug_context,
explicit GraphicsTracingWidget(Core::System& system,
std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent = nullptr);
void OnEmulationStarting(EmuThread* emu_thread);
@ -23,11 +28,14 @@ private slots:
void StopRecording();
void AbortRecording();
void OnBreakPointHit(Pica::DebugContext::Event event, void* data) override;
void OnBreakPointHit(Pica::DebugContext::Event event, const void* data) override;
void OnResumed() override;
signals:
void SetStartTracingButtonEnabled(bool enable);
void SetStopTracingButtonEnabled(bool enable);
void SetAbortTracingButtonEnabled(bool enable);
private:
Core::System& system;
};

44
src/citra_qt/debugger/graphics/graphics_vertex_shader.cpp
View File

@ -16,9 +16,9 @@
#include <QTreeView>
#include "citra_qt/debugger/graphics/graphics_vertex_shader.h"
#include "citra_qt/util/util.h"
#include "video_core/pica_state.h"
#include "video_core/shader/debug_data.h"
#include "video_core/shader/shader.h"
#include "core/core.h"
#include "video_core/gpu.h"
#include "video_core/pica/pica_core.h"
#include "video_core/shader/shader_interpreter.h"
using nihstro::Instruction;
@ -352,16 +352,14 @@ void GraphicsVertexShaderWidget::DumpShader() {
return;
}
auto& setup = Pica::g_state.vs;
auto& config = Pica::g_state.regs.vs;
Pica::DebugUtils::DumpShader(filename.toStdString(), config, setup,
Pica::g_state.regs.rasterizer.vs_output_attributes);
auto& pica = system.GPU().PicaCore();
Pica::DebugUtils::DumpShader(filename.toStdString(), pica.regs.internal.vs, pica.vs_setup,
pica.regs.internal.rasterizer.vs_output_attributes);
}
GraphicsVertexShaderWidget::GraphicsVertexShaderWidget(
std::shared_ptr<Pica::DebugContext> debug_context, QWidget* parent)
: BreakPointObserverDock(debug_context, tr("Pica Vertex Shader"), parent) {
Core::System& system_, std::shared_ptr<Pica::DebugContext> debug_context, QWidget* parent)
: BreakPointObserverDock(debug_context, tr("Pica Vertex Shader"), parent), system{system_} {
setObjectName(QStringLiteral("PicaVertexShader"));
// Clear input vertex data so that it contains valid float values in case a debug shader
@ -472,7 +470,8 @@ GraphicsVertexShaderWidget::GraphicsVertexShaderWidget(
widget()->setEnabled(false);
}
void GraphicsVertexShaderWidget::OnBreakPointHit(Pica::DebugContext::Event event, void* data) {
void GraphicsVertexShaderWidget::OnBreakPointHit(Pica::DebugContext::Event event,
const void* data) {
if (event == Pica::DebugContext::Event::VertexShaderInvocation) {
Reload(true, data);
} else {
@ -482,7 +481,7 @@ void GraphicsVertexShaderWidget::OnBreakPointHit(Pica::DebugContext::Event event
widget()->setEnabled(true);
}
void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, void* vertex_data) {
void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, const void* vertex_data) {
model->beginResetModel();
if (replace_vertex_data) {
@ -491,7 +490,7 @@ void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, void* vertex_d
for (unsigned attr = 0; attr < 16; ++attr) {
for (unsigned comp = 0; comp < 4; ++comp) {
input_data[4 * attr + comp]->setText(
QStringLiteral("%1").arg(input_vertex.attr[attr][comp].ToFloat32()));
QStringLiteral("%1").arg(input_vertex[attr][comp].ToFloat32()));
}
}
breakpoint_warning->hide();
@ -508,28 +507,27 @@ void GraphicsVertexShaderWidget::Reload(bool replace_vertex_data, void* vertex_d
// Reload shader code
info.Clear();
auto& shader_setup = Pica::g_state.vs;
auto& shader_config = Pica::g_state.regs.vs;
for (auto instr : shader_setup.program_code)
auto& pica = system.GPU().PicaCore();
for (auto instr : pica.vs_setup.program_code)
info.code.push_back({instr});
int num_attributes = shader_config.max_input_attribute_index + 1;
int num_attributes = pica.regs.internal.vs.max_input_attribute_index + 1;
for (auto pattern : shader_setup.swizzle_data) {
for (auto pattern : pica.vs_setup.swizzle_data) {
const nihstro::SwizzleInfo swizzle_info = {.pattern = nihstro::SwizzlePattern{pattern}};
info.swizzle_info.push_back(swizzle_info);
}
u32 entry_point = Pica::g_state.regs.vs.main_offset;
u32 entry_point = pica.regs.internal.vs.main_offset;
info.labels.insert({entry_point, "main"});
// Generate debug information
Pica::Shader::InterpreterEngine shader_engine;
shader_engine.SetupBatch(shader_setup, entry_point);
debug_data = shader_engine.ProduceDebugInfo(shader_setup, input_vertex, shader_config);
shader_engine.SetupBatch(pica.vs_setup, entry_point);
debug_data = shader_engine.ProduceDebugInfo(pica.vs_setup, input_vertex, pica.regs.internal.vs);
// Reload widget state
for (int attr = 0; attr < num_attributes; ++attr) {
unsigned source_attr = shader_config.GetRegisterForAttribute(attr);
unsigned source_attr = pica.regs.internal.vs.GetRegisterForAttribute(attr);
input_data_mapping[attr]->setText(QStringLiteral("-> v%1").arg(source_attr));
input_data_container[attr]->setVisible(true);
}
@ -551,7 +549,7 @@ void GraphicsVertexShaderWidget::OnResumed() {
void GraphicsVertexShaderWidget::OnInputAttributeChanged(int index) {
const f32 value = input_data[index]->text().toFloat();
input_vertex.attr[index / 4][index % 4] = Pica::f24::FromFloat32(value);
input_vertex[index / 4][index % 4] = Pica::f24::FromFloat32(value);
// Re-execute shader with updated value
Reload();
}

16
src/citra_qt/debugger/graphics/graphics_vertex_shader.h
View File

@ -8,8 +8,12 @@
#include <QTreeView>
#include <nihstro/parser_shbin.h>
#include "citra_qt/debugger/graphics/graphics_breakpoint_observer.h"
#include "video_core/pica/output_vertex.h"
#include "video_core/shader/debug_data.h"
#include "video_core/shader/shader.h"
namespace Core {
class System;
}
class QLabel;
class QSpinBox;
@ -40,11 +44,12 @@ class GraphicsVertexShaderWidget : public BreakPointObserverDock {
using Event = Pica::DebugContext::Event;
public:
GraphicsVertexShaderWidget(std::shared_ptr<Pica::DebugContext> debug_context,
GraphicsVertexShaderWidget(Core::System& system,
std::shared_ptr<Pica::DebugContext> debug_context,
QWidget* parent = nullptr);
private slots:
void OnBreakPointHit(Pica::DebugContext::Event event, void* data) override;
void OnBreakPointHit(Pica::DebugContext::Event event, const void* data) override;
void OnResumed() override;
void OnInputAttributeChanged(int index);
@ -60,9 +65,10 @@ private slots:
* specify that no valid vertex data can be retrieved currently. Only used if
* replace_vertex_data is true.
*/
void Reload(bool replace_vertex_data = false, void* vertex_data = nullptr);
void Reload(bool replace_vertex_data = false, const void* vertex_data = nullptr);
private:
Core::System& system;
QLabel* instruction_description;
QTreeView* binary_list;
GraphicsVertexShaderModel* model;
@ -83,7 +89,7 @@ private:
nihstro::ShaderInfo info;
Pica::Shader::DebugData<true> debug_data;
Pica::Shader::AttributeBuffer input_vertex;
Pica::AttributeBuffer input_vertex;
friend class GraphicsVertexShaderModel;
};

28
src/citra_qt/main.cpp
View File

@ -74,7 +74,6 @@
#include "common/logging/backend.h"
#include "common/logging/log.h"
#include "common/memory_detect.h"
#include "common/microprofile.h"
#include "common/scm_rev.h"
#include "common/scope_exit.h"
#if CITRA_ARCH(x86_64)
@ -96,8 +95,8 @@
#include "input_common/main.h"
#include "network/network_settings.h"
#include "ui_main.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
#ifdef __APPLE__
#include "common/apple_authorization.h"
@ -458,7 +457,7 @@ void GMainWindow::InitializeDebugWidgets() {
connect(this, &GMainWindow::EmulationStopping, registersWidget,
&RegistersWidget::OnEmulationStopping);
graphicsWidget = new GPUCommandStreamWidget(this);
graphicsWidget = new GPUCommandStreamWidget(system, this);
addDockWidget(Qt::RightDockWidgetArea, graphicsWidget);
graphicsWidget->hide();
debug_menu->addAction(graphicsWidget->toggleViewAction());
@ -473,12 +472,13 @@ void GMainWindow::InitializeDebugWidgets() {
graphicsBreakpointsWidget->hide();
debug_menu->addAction(graphicsBreakpointsWidget->toggleViewAction());
graphicsVertexShaderWidget = new GraphicsVertexShaderWidget(Pica::g_debug_context, this);
graphicsVertexShaderWidget =
new GraphicsVertexShaderWidget(system, Pica::g_debug_context, this);
addDockWidget(Qt::RightDockWidgetArea, graphicsVertexShaderWidget);
graphicsVertexShaderWidget->hide();
debug_menu->addAction(graphicsVertexShaderWidget->toggleViewAction());
graphicsTracingWidget = new GraphicsTracingWidget(Pica::g_debug_context, this);
graphicsTracingWidget = new GraphicsTracingWidget(system, Pica::g_debug_context, this);
addDockWidget(Qt::RightDockWidgetArea, graphicsTracingWidget);
graphicsTracingWidget->hide();
debug_menu->addAction(graphicsTracingWidget->toggleViewAction());
@ -1237,6 +1237,11 @@ void GMainWindow::BootGame(const QString& filename) {
video_dumping_path.clear();
}
// Register debug widgets
if (graphicsWidget->isVisible()) {
graphicsWidget->Register();
}
// Create and start the emulation thread
emu_thread = std::make_unique<EmuThread>(system, *render_window);
emit EmulationStarting(emu_thread.get());
@ -1315,6 +1320,11 @@ void GMainWindow::ShutdownGame() {
// TODO(bunnei): This function is not thread safe, but it's being used as if it were
Pica::g_debug_context->ClearBreakpoints();
// Unregister debug widgets
if (graphicsWidget->isVisible()) {
graphicsWidget->Unregister();
}
// Frame advancing must be cancelled in order to release the emu thread from waiting
system.frame_limiter.SetFrameAdvancing(false);
@ -2214,7 +2224,7 @@ void GMainWindow::OnToggleFilterBar() {
void GMainWindow::OnCreateGraphicsSurfaceViewer() {
auto graphicsSurfaceViewerWidget =
new GraphicsSurfaceWidget(system.Memory(), Pica::g_debug_context, this);
new GraphicsSurfaceWidget(system, Pica::g_debug_context, this);
addDockWidget(Qt::RightDockWidgetArea, graphicsSurfaceViewerWidget);
// TODO: Maybe graphicsSurfaceViewerWidget->setFloating(true);
graphicsSurfaceViewerWidget->show();
@ -2434,10 +2444,10 @@ void GMainWindow::OnStartVideoDumping() {
}
void GMainWindow::StartVideoDumping(const QString& path) {
Layout::FramebufferLayout layout{
Layout::FrameLayoutFromResolutionScale(VideoCore::g_renderer->GetResolutionScaleFactor())};
auto& renderer = system.GPU().Renderer();
const auto layout{Layout::FrameLayoutFromResolutionScale(renderer.GetResolutionScaleFactor())};
auto dumper = std::make_shared<VideoDumper::FFmpegBackend>();
auto dumper = std::make_shared<VideoDumper::FFmpegBackend>(renderer);
if (dumper->StartDumping(path.toStdString(), layout)) {
system.RegisterVideoDumper(dumper);
} else {

18
src/common/CMakeLists.txt
View File

@ -37,16 +37,14 @@ add_custom_command(OUTPUT scm_rev.cpp
"${VIDEO_CORE}/shader/generator/spv_fs_shader_gen.h"
"${VIDEO_CORE}/shader/shader.cpp"
"${VIDEO_CORE}/shader/shader.h"
"${VIDEO_CORE}/pica.cpp"
"${VIDEO_CORE}/pica.h"
"${VIDEO_CORE}/regs_framebuffer.h"
"${VIDEO_CORE}/regs_lighting.h"
"${VIDEO_CORE}/regs_pipeline.h"
"${VIDEO_CORE}/regs_rasterizer.h"
"${VIDEO_CORE}/regs_shader.h"
"${VIDEO_CORE}/regs_texturing.h"
"${VIDEO_CORE}/regs.cpp"
"${VIDEO_CORE}/regs.h"
"${VIDEO_CORE}/pica/regs_framebuffer.h"
"${VIDEO_CORE}/pica/regs_lighting.h"
"${VIDEO_CORE}/pica/regs_pipeline.h"
"${VIDEO_CORE}/pica/regs_rasterizer.h"
"${VIDEO_CORE}/pica/regs_shader.h"
"${VIDEO_CORE}/pica/regs_texturing.h"
"${VIDEO_CORE}/pica/regs_internal.cpp"
"${VIDEO_CORE}/pica/regs_internal.h"
# and also check that the scm_rev files haven't changed
"${CMAKE_CURRENT_SOURCE_DIR}/scm_rev.cpp.in"
"${CMAKE_CURRENT_SOURCE_DIR}/scm_rev.h"

6
src/common/memory_ref.h
View File

@ -110,8 +110,10 @@ public:
return std::span{cptr, std::min(size, csize)};
}
std::span<const u8> GetReadBytes(std::size_t size) const {
return std::span{cptr, std::min(size, csize)};
template <typename T>
std::span<const T> GetReadBytes(std::size_t size) const {
const auto* cptr_t = reinterpret_cast<T*>(cptr);
return std::span{cptr_t, std::min(size, csize) / sizeof(T)};
}
std::size_t GetSize() const {

8
src/core/CMakeLists.txt
View File

@ -299,8 +299,10 @@ add_library(citra_core STATIC
hle/service/fs/fs_user.h
hle/service/gsp/gsp.cpp
hle/service/gsp/gsp.h
hle/service/gsp/gsp_command.h
hle/service/gsp/gsp_gpu.cpp
hle/service/gsp/gsp_gpu.h
hle/service/gsp/gsp_interrupt.h
hle/service/gsp/gsp_lcd.cpp
hle/service/gsp/gsp_lcd.h
hle/service/hid/hid.cpp
@ -433,12 +435,6 @@ add_library(citra_core STATIC
hw/aes/ccm.h
hw/aes/key.cpp
hw/aes/key.h
hw/gpu.cpp
hw/gpu.h
hw/hw.cpp
hw/hw.h
hw/lcd.cpp
hw/lcd.h
hw/rsa/rsa.cpp
hw/rsa/rsa.h
hw/y2r.cpp

1
src/core/cheats/cheats.cpp
View File

@ -11,7 +11,6 @@
#include "core/core.h"
#include "core/core_timing.h"
#include "core/hle/kernel/process.h"
#include "core/hw/gpu.h"
namespace Cheats {

56
src/core/core.cpp
View File

@ -35,14 +35,13 @@
#include "core/hle/service/cam/cam.h"
#include "core/hle/service/fs/archive.h"
#include "core/hle/service/gsp/gsp.h"
#include "core/hle/service/gsp/gsp_gpu.h"
#include "core/hle/service/ir/ir_rst.h"
#include "core/hle/service/mic/mic_u.h"
#include "core/hle/service/plgldr/plgldr.h"
#include "core/hle/service/service.h"
#include "core/hle/service/sm/sm.h"
#include "core/hw/gpu.h"
#include "core/hw/hw.h"
#include "core/hw/lcd.h"
#include "core/hw/aes/key.h"
#include "core/loader/loader.h"
#include "core/movie.h"
#ifdef ENABLE_SCRIPTING
@ -51,8 +50,8 @@
#include "core/telemetry_session.h"
#include "network/network.h"
#include "video_core/custom_textures/custom_tex_manager.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
namespace Core {
@ -235,7 +234,6 @@ System::ResultStatus System::RunLoop(bool tight_loop) {
GDBStub::SetCpuStepFlag(false);
}
HW::Update();
Reschedule();
return status;
@ -433,7 +431,7 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window,
service_manager = std::make_unique<Service::SM::ServiceManager>(*this);
archive_manager = std::make_unique<Service::FS::ArchiveManager>(*this);
HW::Init(*memory);
HW::AES::InitKeys();
Service::Init(*this);
GDBStub::DeferStart();
@ -443,7 +441,10 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window,
custom_tex_manager = std::make_unique<VideoCore::CustomTexManager>(*this);
VideoCore::Init(emu_window, secondary_window, *this);
auto gsp = service_manager->GetService<Service::GSP::GSP_GPU>("gsp::Gpu");
gpu = std::make_unique<VideoCore::GPU>(*this, emu_window, secondary_window);
gpu->SetInterruptHandler(
[gsp](Service::GSP::InterruptId interrupt_id) { gsp->SignalInterrupt(interrupt_id); });
LOG_DEBUG(Core, "Initialized OK");
@ -452,8 +453,8 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window,
return ResultStatus::Success;
}
VideoCore::RendererBase& System::Renderer() {
return *VideoCore::g_renderer;
VideoCore::GPU& System::GPU() {
return *gpu;
}
Service::SM::ServiceManager& System::ServiceManager() {
@ -555,8 +556,7 @@ void System::Shutdown(bool is_deserializing) {
// Shutdown emulation session
is_powered_on = false;
VideoCore::Shutdown();
HW::Shutdown();
gpu.reset();
if (!is_deserializing) {
GDBStub::Shutdown();
perf_stats.reset();
@ -626,18 +626,9 @@ void System::ApplySettings() {
GDBStub::SetServerPort(Settings::values.gdbstub_port.GetValue());
GDBStub::ToggleServer(Settings::values.use_gdbstub.GetValue());
VideoCore::g_shader_jit_enabled = Settings::values.use_shader_jit.GetValue();
VideoCore::g_hw_shader_enabled = Settings::values.use_hw_shader.GetValue();
VideoCore::g_hw_shader_accurate_mul = Settings::values.shaders_accurate_mul.GetValue();
#ifndef ANDROID
if (VideoCore::g_renderer) {
VideoCore::g_renderer->UpdateCurrentFramebufferLayout();
}
#endif
if (VideoCore::g_renderer) {
auto& settings = VideoCore::g_renderer->Settings();
if (gpu) {
gpu->Renderer().UpdateCurrentFramebufferLayout();
auto& settings = gpu->Renderer().Settings();
settings.bg_color_update_requested = true;
settings.shader_update_requested = true;
}
@ -699,17 +690,15 @@ void System::serialize(Archive& ar, const unsigned int file_version) {
*m_emu_window, m_secondary_window, *memory_mode.first, *n3ds_hw_caps.first, num_cores);
}
// flush on save, don't flush on load
bool should_flush = !Archive::is_loading::value;
Memory::RasterizerClearAll(should_flush);
// Flush on save, don't flush on load
const bool should_flush = !Archive::is_loading::value;
gpu->ClearAll(should_flush);
ar&* timing.get();
for (u32 i = 0; i < num_cores; i++) {
ar&* cpu_cores[i].get();
}
ar&* service_manager.get();
ar&* archive_manager.get();
ar& GPU::g_regs;
ar& LCD::g_regs;
// NOTE: DSP doesn't like being destroyed and recreated. So instead we do an inline
// serialization; this means that the DSP Settings need to match for loading to work.
@ -722,16 +711,21 @@ void System::serialize(Archive& ar, const unsigned int file_version) {
ar&* memory.get();
ar&* kernel.get();
VideoCore::serialize(ar, file_version);
ar&* gpu.get();
ar& movie;
// This needs to be set from somewhere - might as well be here!
if (Archive::is_loading::value) {
timing->UnlockEventQueue();
Service::GSP::SetGlobalModule(*this);
memory->SetDSP(*dsp_core);
cheat_engine->Connect();
VideoCore::g_renderer->Sync();
gpu->Sync();
// Re-register gpu callback, because gsp service changed after service_manager got
// serialized
auto gsp = service_manager->GetService<Service::GSP::GSP_GPU>("gsp::Gpu");
gpu->SetInterruptHandler(
[gsp](Service::GSP::InterruptId interrupt_id) { gsp->SignalInterrupt(interrupt_id); });
}
}

10
src/core/core.h
View File

@ -58,9 +58,13 @@ class Backend;
namespace VideoCore {
class CustomTexManager;
class RendererBase;
class GPU;
} // namespace VideoCore
namespace Pica {
class DebugContext;
}
namespace Loader {
class AppLoader;
}
@ -217,7 +221,7 @@ public:
return *dsp_core;
}
[[nodiscard]] VideoCore::RendererBase& Renderer();
[[nodiscard]] VideoCore::GPU& GPU();
/**
* Gets a reference to the service manager.
@ -384,6 +388,8 @@ private:
/// Telemetry session for this emulation session
std::unique_ptr<Core::TelemetrySession> telemetry_session;
std::unique_ptr<VideoCore::GPU> gpu;
/// Service manager
std::unique_ptr<Service::SM::ServiceManager> service_manager;

4
src/core/core_timing.h
View File

@ -37,6 +37,10 @@
constexpr u64 BASE_CLOCK_RATE_ARM11 = 268111856;
constexpr u64 MAX_VALUE_TO_MULTIPLY = std::numeric_limits<s64>::max() / BASE_CLOCK_RATE_ARM11;
/// Refresh rate defined by ratio of ARM11 frequency to ARM11 ticks per frame
/// (268,111,856) / (4,481,136) = 59.83122493939037Hz
constexpr double SCREEN_REFRESH_RATE = BASE_CLOCK_RATE_ARM11 / static_cast<double>(4481136ull);
constexpr s64 msToCycles(int ms) {
// since ms is int there is no way to overflow
return BASE_CLOCK_RATE_ARM11 * static_cast<s64>(ms) / 1000;

12
src/core/dumping/ffmpeg_backend.cpp
View File

@ -11,10 +11,10 @@
#include "common/scope_exit.h"
#include "common/settings.h"
#include "common/string_util.h"
#include "core/core_timing.h"
#include "core/dumping/ffmpeg_backend.h"
#include "core/hw/gpu.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
using namespace DynamicLibrary;
@ -381,7 +381,7 @@ bool FFmpegVideoStream::InitFilters() {
}
// Configure buffer source
static constexpr AVRational src_time_base{static_cast<int>(GPU::frame_ticks),
static constexpr AVRational src_time_base{static_cast<int>(VideoCore::FRAME_TICKS),
static_cast<int>(BASE_CLOCK_RATE_ARM11)};
const std::string in_args =
fmt::format("video_size={}x{}:pix_fmt={}:time_base={}/{}:pixel_aspect=1", layout.width,
@ -732,7 +732,7 @@ void FFmpegMuxer::WriteTrailer() {
FFmpeg::av_write_trailer(format_context.get());
}
FFmpegBackend::FFmpegBackend() = default;
FFmpegBackend::FFmpegBackend(VideoCore::RendererBase& renderer_) : renderer{renderer_} {}
FFmpegBackend::~FFmpegBackend() {
ASSERT_MSG(!IsDumping(), "Dumping must be stopped first");
@ -796,7 +796,7 @@ bool FFmpegBackend::StartDumping(const std::string& path, const Layout::Framebuf
}
});
VideoCore::g_renderer->PrepareVideoDumping();
renderer.PrepareVideoDumping();
is_dumping = true;
return true;
@ -829,7 +829,7 @@ void FFmpegBackend::AddAudioSample(const std::array<s16, 2>& sample) {
void FFmpegBackend::StopDumping() {
is_dumping = false;
VideoCore::g_renderer->CleanupVideoDumping();
renderer.CleanupVideoDumping();
// Flush the video processing queue
AddVideoFrame(VideoFrame());

7
src/core/dumping/ffmpeg_backend.h
View File

@ -18,6 +18,10 @@
#include "common/threadsafe_queue.h"
#include "core/dumping/backend.h"
namespace VideoCore {
class RendererBase;
}
namespace VideoDumper {
using VariableAudioFrame = std::vector<s16>;
@ -181,7 +185,7 @@ private:
*/
class FFmpegBackend : public Backend {
public:
FFmpegBackend();
FFmpegBackend(VideoCore::RendererBase& renderer);
~FFmpegBackend() override;
bool StartDumping(const std::string& path, const Layout::FramebufferLayout& layout) override;
void AddVideoFrame(VideoFrame frame) override;
@ -194,6 +198,7 @@ public:
private:
void EndDumping();
VideoCore::RendererBase& renderer;
std::atomic_bool is_dumping = false; ///< Whether the backend is currently dumping
FFmpegMuxer ffmpeg{};

22
src/core/hle/service/gsp/gsp.cpp
View File

@ -2,33 +2,17 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <vector>
#include "core/core.h"
#include "core/hle/kernel/event.h"
#include "core/hle/kernel/shared_memory.h"
#include "core/hle/service/gsp/gsp.h"
#include "core/hle/service/gsp/gsp_gpu.h"
#include "core/hle/service/gsp/gsp_lcd.h"
namespace Service::GSP {
static std::weak_ptr<GSP_GPU> gsp_gpu;
void SignalInterrupt(InterruptId interrupt_id) {
auto gpu = gsp_gpu.lock();
ASSERT(gpu != nullptr);
return gpu->SignalInterrupt(interrupt_id);
}
void InstallInterfaces(Core::System& system) {
auto& service_manager = system.ServiceManager();
auto gpu = std::make_shared<GSP_GPU>(system);
gpu->InstallAsService(service_manager);
gsp_gpu = gpu;
std::make_shared<GSP_GPU>(system)->InstallAsService(service_manager);
std::make_shared<GSP_LCD>()->InstallAsService(service_manager);
}
void SetGlobalModule(Core::System& system) {
gsp_gpu = system.ServiceManager().GetService<GSP_GPU>("gsp::Gpu");
}
} // namespace Service::GSP

13
src/core/hle/service/gsp/gsp.h
View File

@ -4,25 +4,12 @@
#pragma once
#include <cstddef>
#include <string>
#include "common/common_types.h"
#include "core/hle/result.h"
#include "core/hle/service/gsp/gsp_gpu.h"
#include "core/hle/service/gsp/gsp_lcd.h"
namespace Core {
class System;
}
namespace Service::GSP {
/**
* Signals that the specified interrupt type has occurred to userland code
* @param interrupt_id ID of interrupt that is being signalled
*/
void SignalInterrupt(InterruptId interrupt_id);
void InstallInterfaces(Core::System& system);
void SetGlobalModule(Core::System& system);
} // namespace Service::GSP

110
src/core/hle/service/gsp/gsp_command.h Normal file
View File

@ -0,0 +1,110 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/bit_field.h"
namespace Service::GSP {
/// GSP command ID
enum class CommandId : u32 {
RequestDma = 0x00,
SubmitCmdList = 0x01,
MemoryFill = 0x02,
DisplayTransfer = 0x03,
TextureCopy = 0x04,
CacheFlush = 0x05,
};
struct DmaCommand {
u32 source_address;
u32 dest_address;
u32 size;
};
struct SubmitCmdListCommand {
u32 address;
u32 size;
u32 flags;
u32 unused[3];
u32 do_flush;
};
struct MemoryFillCommand {
u32 start1;
u32 value1;
u32 end1;
u32 start2;
u32 value2;
u32 end2;
u16 control1;
u16 control2;
};
struct DisplayTransferCommand {
u32 in_buffer_address;
u32 out_buffer_address;
u32 in_buffer_size;
u32 out_buffer_size;
u32 flags;
};
struct TextureCopyCommand {
u32 in_buffer_address;
u32 out_buffer_address;
u32 size;
u32 in_width_gap;
u32 out_width_gap;
u32 flags;
};
struct CacheFlushCommand {
struct {
u32 address;
u32 size;
} regions[3];
};
/// GSP command
struct Command {
BitField<0, 8, CommandId> id;
union {
DmaCommand dma_request;
SubmitCmdListCommand submit_gpu_cmdlist;
MemoryFillCommand memory_fill;
DisplayTransferCommand display_transfer;
TextureCopyCommand texture_copy;
CacheFlushCommand cache_flush;
std::array<u8, 0x1C> raw_data;
};
};
static_assert(sizeof(Command) == 0x20, "Command struct has incorrect size");
/// GSP shared memory GX command buffer header
struct CommandBuffer {
union {
u32 hex;
// Current command index. This index is updated by GSP module after loading the command
// data, right before the command is processed. When this index is updated by GSP module,
// the total commands field is decreased by one as well.
BitField<0, 8, u32> index;
// Total commands to process, must not be value 0 when GSP module handles commands. This
// must be <=15 when writing a command to shared memory. This is incremented by the
// application when writing a command to shared memory, after increasing this value
// TriggerCmdReqQueue is only used if this field is value 1.
BitField<8, 8, u32> number_commands;
};
u32 unk[7];
Command commands[0xF];
};
static_assert(sizeof(CommandBuffer) == 0x200, "CommandBuffer struct has incorrect size");
} // namespace Service::GSP

436
src/core/hle/service/gsp/gsp_gpu.cpp
View File

@ -9,30 +9,21 @@
#include <boost/serialization/shared_ptr.hpp>
#include "common/archives.h"
#include "common/bit_field.h"
#include "common/microprofile.h"
#include "common/swap.h"
#include "core/core.h"
#include "core/file_sys/plugin_3gx.h"
#include "core/hle/ipc.h"
#include "core/hle/ipc_helpers.h"
#include "core/hle/kernel/shared_memory.h"
#include "core/hle/kernel/shared_page.h"
#include "core/hle/result.h"
#include "core/hle/service/gsp/gsp_gpu.h"
#include "core/hw/gpu.h"
#include "core/hw/hw.h"
#include "core/hw/lcd.h"
#include "core/memory.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/gpu.h"
#include "video_core/gpu_debugger.h"
#include "video_core/pica/regs_lcd.h"
SERIALIZE_EXPORT_IMPL(Service::GSP::SessionData)
SERIALIZE_EXPORT_IMPL(Service::GSP::GSP_GPU)
SERVICE_CONSTRUCT_IMPL(Service::GSP::GSP_GPU)
// Main graphics debugger object - TODO: Here is probably not the best place for this
GraphicsDebugger g_debugger;
namespace Service::GSP {
// Beginning address of HW regs
@ -59,60 +50,32 @@ constexpr ResultCode ERR_REGS_INVALID_SIZE(ErrorDescription::InvalidSize, ErrorM
ErrorSummary::InvalidArgument,
ErrorLevel::Usage); // 0xE0E02BEC
static PAddr VirtualToPhysicalAddress(VAddr addr) {
if (addr == 0) {
return 0;
}
// Note: the region end check is inclusive because the game can pass in an address that
// represents an open right boundary
if (addr >= Memory::VRAM_VADDR && addr <= Memory::VRAM_VADDR_END) {
return addr - Memory::VRAM_VADDR + Memory::VRAM_PADDR;
}
if (addr >= Memory::LINEAR_HEAP_VADDR && addr <= Memory::LINEAR_HEAP_VADDR_END) {
return addr - Memory::LINEAR_HEAP_VADDR + Memory::FCRAM_PADDR;
}
if (addr >= Memory::NEW_LINEAR_HEAP_VADDR && addr <= Memory::NEW_LINEAR_HEAP_VADDR_END) {
return addr - Memory::NEW_LINEAR_HEAP_VADDR + Memory::FCRAM_PADDR;
}
if (addr >= Memory::PLUGIN_3GX_FB_VADDR && addr <= Memory::PLUGIN_3GX_FB_VADDR_END) {
return addr - Memory::PLUGIN_3GX_FB_VADDR + Service::PLGLDR::PLG_LDR::GetPluginFBAddr();
}
LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x{:08X}", addr);
// To help with debugging, set bit on address so that it's obviously invalid.
// TODO: find the correct way to handle this error
return addr | 0x80000000;
}
u32 GSP_GPU::GetUnusedThreadId() const {
for (u32 id = 0; id < MaxGSPThreads; ++id) {
if (!used_thread_ids[id])
if (!used_thread_ids[id]) {
return id;
}
}
UNREACHABLE_MSG("All GSP threads are in use");
return 0;
}
/// Gets a pointer to a thread command buffer in GSP shared memory
static inline u8* GetCommandBuffer(std::shared_ptr<Kernel::SharedMemory> shared_memory,
u32 thread_id) {
return shared_memory->GetPointer(0x800 + (thread_id * sizeof(CommandBuffer)));
CommandBuffer* GSP_GPU::GetCommandBuffer(u32 thread_id) {
auto* ptr = shared_memory->GetPointer(0x800 + (thread_id * sizeof(CommandBuffer)));
return reinterpret_cast<CommandBuffer*>(ptr);
}
FrameBufferUpdate* GSP_GPU::GetFrameBufferInfo(u32 thread_id, u32 screen_index) {
DEBUG_ASSERT_MSG(screen_index < 2, "Invalid screen index");
// For each thread there are two FrameBufferUpdate fields
u32 offset = 0x200 + (2 * thread_id + screen_index) * sizeof(FrameBufferUpdate);
const u32 offset = 0x200 + (2 * thread_id + screen_index) * sizeof(FrameBufferUpdate);
u8* ptr = shared_memory->GetPointer(offset);
return reinterpret_cast<FrameBufferUpdate*>(ptr);
}
/// Gets a pointer to the interrupt relay queue for a given thread index
static inline InterruptRelayQueue* GetInterruptRelayQueue(
std::shared_ptr<Kernel::SharedMemory> shared_memory, u32 thread_id) {
InterruptRelayQueue* GSP_GPU::GetInterruptRelayQueue(u32 thread_id) {
u8* ptr = shared_memory->GetPointer(sizeof(InterruptRelayQueue) * thread_id);
return reinterpret_cast<InterruptRelayQueue*>(ptr);
}
@ -125,19 +88,6 @@ void GSP_GPU::ClientDisconnected(std::shared_ptr<Kernel::ServerSession> server_s
SessionRequestHandler::ClientDisconnected(server_session);
}
/**
* Writes a single GSP GPU hardware registers with a single u32 value
* (For internal use.)
*
* @param base_address The address of the register in question
* @param data Data to be written
*/
static void WriteSingleHWReg(u32 base_address, u32 data) {
DEBUG_ASSERT_MSG((base_address & 3) == 0 && base_address < 0x420000,
"Write address out of range or misaligned");
HW::Write<u32>(base_address + REGS_BEGIN, data);
}
/**
* Writes sequential GSP GPU hardware registers using an array of source data
*
@ -146,7 +96,8 @@ static void WriteSingleHWReg(u32 base_address, u32 data) {
* @param data A vector containing the source data
* @return RESULT_SUCCESS if the parameters are valid, error code otherwise
*/
static ResultCode WriteHWRegs(u32 base_address, u32 size_in_bytes, std::span<const u8> data) {
static ResultCode WriteHWRegs(u32 base_address, u32 size_in_bytes, std::span<const u8> data,
VideoCore::GPU& gpu) {
// This magic number is verified to be done by the gsp module
const u32 max_size_in_bytes = 0x80;
@ -155,28 +106,30 @@ static ResultCode WriteHWRegs(u32 base_address, u32 size_in_bytes, std::span<con
"Write address was out of range or misaligned! (address=0x{:08x}, size=0x{:08x})",
base_address, size_in_bytes);
return ERR_REGS_OUTOFRANGE_OR_MISALIGNED;
} else if (size_in_bytes <= max_size_in_bytes) {
if (size_in_bytes & 3) {
LOG_ERROR(Service_GSP, "Misaligned size 0x{:08x}", size_in_bytes);
return ERR_REGS_MISALIGNED;
} else {
std::size_t offset = 0;
while (size_in_bytes > 0) {
u32 value;
std::memcpy(&value, &data[offset], sizeof(u32));
WriteSingleHWReg(base_address, value);
}
size_in_bytes -= 4;
offset += 4;
base_address += 4;
}
return RESULT_SUCCESS;
}
} else {
if (size_in_bytes > max_size_in_bytes) {
LOG_ERROR(Service_GSP, "Out of range size 0x{:08x}", size_in_bytes);
return ERR_REGS_INVALID_SIZE;
}
if (size_in_bytes & 3) {
LOG_ERROR(Service_GSP, "Misaligned size 0x{:08x}", size_in_bytes);
return ERR_REGS_MISALIGNED;
}
std::size_t offset = 0;
while (size_in_bytes > 0) {
u32 value;
std::memcpy(&value, &data[offset], sizeof(u32));
gpu.WriteReg(REGS_BEGIN + base_address, value);
size_in_bytes -= 4;
offset += 4;
base_address += 4;
}
return RESULT_SUCCESS;
}
/**
@ -190,7 +143,7 @@ static ResultCode WriteHWRegs(u32 base_address, u32 size_in_bytes, std::span<con
* @return RESULT_SUCCESS if the parameters are valid, error code otherwise
*/
static ResultCode WriteHWRegsWithMask(u32 base_address, u32 size_in_bytes, std::span<const u8> data,
std::span<const u8> masks) {
std::span<const u8> masks, VideoCore::GPU& gpu) {
// This magic number is verified to be done by the gsp module
const u32 max_size_in_bytes = 0x80;
@ -199,60 +152,58 @@ static ResultCode WriteHWRegsWithMask(u32 base_address, u32 size_in_bytes, std::
"Write address was out of range or misaligned! (address=0x{:08x}, size=0x{:08x})",
base_address, size_in_bytes);
return ERR_REGS_OUTOFRANGE_OR_MISALIGNED;
} else if (size_in_bytes <= max_size_in_bytes) {
if (size_in_bytes & 3) {
LOG_ERROR(Service_GSP, "Misaligned size 0x{:08x}", size_in_bytes);
return ERR_REGS_MISALIGNED;
} else {
std::size_t offset = 0;
while (size_in_bytes > 0) {
const u32 reg_address = base_address + REGS_BEGIN;
}
u32 reg_value;
HW::Read<u32>(reg_value, reg_address);
u32 value, mask;
std::memcpy(&value, &data[offset], sizeof(u32));
std::memcpy(&mask, &masks[offset], sizeof(u32));
// Update the current value of the register only for set mask bits
reg_value = (reg_value & ~mask) | (value & mask);
WriteSingleHWReg(base_address, reg_value);
size_in_bytes -= 4;
offset += 4;
base_address += 4;
}
return RESULT_SUCCESS;
}
} else {
if (size_in_bytes > max_size_in_bytes) {
LOG_ERROR(Service_GSP, "Out of range size 0x{:08x}", size_in_bytes);
return ERR_REGS_INVALID_SIZE;
}
if (size_in_bytes & 3) {
LOG_ERROR(Service_GSP, "Misaligned size 0x{:08x}", size_in_bytes);
return ERR_REGS_MISALIGNED;
}
std::size_t offset = 0;
while (size_in_bytes > 0) {
const u32 reg_address = base_address + REGS_BEGIN;
u32 reg_value = gpu.ReadReg(reg_address);
u32 value, mask;
std::memcpy(&value, &data[offset], sizeof(u32));
std::memcpy(&mask, &masks[offset], sizeof(u32));
// Update the current value of the register only for set mask bits
reg_value = (reg_value & ~mask) | (value & mask);
gpu.WriteReg(reg_address, reg_value);
size_in_bytes -= 4;
offset += 4;
base_address += 4;
}
return RESULT_SUCCESS;
}
void GSP_GPU::WriteHWRegs(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp(ctx);
u32 reg_addr = rp.Pop<u32>();
u32 size = rp.Pop<u32>();
std::vector<u8> src_data = rp.PopStaticBuffer();
const u32 reg_addr = rp.Pop<u32>();
const u32 size = rp.Pop<u32>();
const auto src_data = rp.PopStaticBuffer();
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);
rb.Push(GSP::WriteHWRegs(reg_addr, size, src_data));
rb.Push(GSP::WriteHWRegs(reg_addr, size, src_data, system.GPU()));
}
void GSP_GPU::WriteHWRegsWithMask(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp(ctx);
u32 reg_addr = rp.Pop<u32>();
u32 size = rp.Pop<u32>();
std::vector<u8> src_data = rp.PopStaticBuffer();
std::vector<u8> mask_data = rp.PopStaticBuffer();
const u32 reg_addr = rp.Pop<u32>();
const u32 size = rp.Pop<u32>();
const auto src_data = rp.PopStaticBuffer();
const auto mask_data = rp.PopStaticBuffer();
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);
rb.Push(GSP::WriteHWRegsWithMask(reg_addr, size, src_data, mask_data));
rb.Push(GSP::WriteHWRegsWithMask(reg_addr, size, src_data, mask_data, system.GPU()));
}
void GSP_GPU::ReadHWRegs(Kernel::HLERequestContext& ctx) {
@ -270,7 +221,7 @@ void GSP_GPU::ReadHWRegs(Kernel::HLERequestContext& ctx) {
return;
}
// size should be word-aligned
// Size should be word-aligned
if ((size % 4) != 0) {
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);
rb.Push(ERR_REGS_MISALIGNED);
@ -279,8 +230,9 @@ void GSP_GPU::ReadHWRegs(Kernel::HLERequestContext& ctx) {
}
std::vector<u8> buffer(size);
for (u32 offset = 0; offset < size; ++offset) {
HW::Read<u8>(buffer[offset], REGS_BEGIN + reg_addr + offset);
for (u32 word = 0; word < size / sizeof(u32); ++word) {
const u32 data = system.GPU().ReadReg(REGS_BEGIN + reg_addr + word * sizeof(u32));
std::memcpy(buffer.data() + word * sizeof(u32), &data, sizeof(u32));
}
IPC::RequestBuilder rb = rp.MakeBuilder(1, 2);
@ -288,53 +240,15 @@ void GSP_GPU::ReadHWRegs(Kernel::HLERequestContext& ctx) {
rb.PushStaticBuffer(std::move(buffer), 0);
}
ResultCode SetBufferSwap(u32 screen_id, const FrameBufferInfo& info) {
u32 base_address = 0x400000;
PAddr phys_address_left = VirtualToPhysicalAddress(info.address_left);
PAddr phys_address_right = VirtualToPhysicalAddress(info.address_right);
if (info.active_fb == 0) {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(
screen_id, address_left1)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(
screen_id, address_right1)),
phys_address_right);
} else {
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(
screen_id, address_left2)),
phys_address_left);
WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(
screen_id, address_right2)),
phys_address_right);
}
WriteSingleHWReg(base_address +
4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(screen_id, stride)),
info.stride);
WriteSingleHWReg(base_address +
4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(screen_id, color_format)),
info.format);
WriteSingleHWReg(base_address +
4 * static_cast<u32>(GPU_FRAMEBUFFER_REG_INDEX(screen_id, active_fb)),
info.shown_fb);
if (Pica::g_debug_context)
Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::BufferSwapped, nullptr);
if (screen_id == 0) {
MicroProfileFlip();
Core::System::GetInstance().perf_stats->EndGameFrame();
}
return RESULT_SUCCESS;
}
void GSP_GPU::SetBufferSwap(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp(ctx);
u32 screen_id = rp.Pop<u32>();
auto fb_info = rp.PopRaw<FrameBufferInfo>();
system.GPU().SetBufferSwap(screen_id, fb_info);
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);
rb.Push(GSP::SetBufferSwap(screen_id, fb_info));
rb.Push(RESULT_SUCCESS);
}
void GSP_GPU::FlushDataCache(Kernel::HLERequestContext& ctx) {
@ -382,10 +296,9 @@ void GSP_GPU::RegisterInterruptRelayQueue(Kernel::HLERequestContext& ctx) {
u32 flags = rp.Pop<u32>();
auto interrupt_event = rp.PopObject<Kernel::Event>();
// TODO(mailwl): return right error code instead assert
ASSERT_MSG((interrupt_event != nullptr), "handle is not valid!");
ASSERT_MSG(interrupt_event, "handle is not valid!");
interrupt_event->SetName("GSP_GSP_GPU::interrupt_event");
interrupt_event->SetName("GSP_GPU::interrupt_event");
SessionData* session_data = GetSessionData(ctx.Session());
session_data->interrupt_event = std::move(interrupt_event);
@ -422,15 +335,17 @@ void GSP_GPU::UnregisterInterruptRelayQueue(Kernel::HLERequestContext& ctx) {
void GSP_GPU::SignalInterruptForThread(InterruptId interrupt_id, u32 thread_id) {
SessionData* session_data = FindRegisteredThreadData(thread_id);
if (session_data == nullptr)
if (!session_data) {
return;
}
auto interrupt_event = session_data->interrupt_event;
if (interrupt_event == nullptr) {
LOG_WARNING(Service_GSP, "cannot synchronize until GSP event has been created!");
return;
}
InterruptRelayQueue* interrupt_relay_queue = GetInterruptRelayQueue(shared_memory, thread_id);
auto* interrupt_relay_queue = GetInterruptRelayQueue(thread_id);
u8 next = interrupt_relay_queue->index;
next += interrupt_relay_queue->number_interrupts;
next = next % 0x34; // 0x34 is the number of interrupt slots
@ -441,29 +356,20 @@ void GSP_GPU::SignalInterruptForThread(InterruptId interrupt_id, u32 thread_id)
interrupt_relay_queue->error_code = 0x0; // No error
// Update framebuffer information if requested
// TODO(yuriks): Confirm where this code should be called. It is definitely updated without
// executing any GSP commands, only waiting on the event.
// TODO(Subv): The real GSP module triggers PDC0 after updating both the top and bottom
// screen, it is currently unknown what PDC1 does.
int screen_id = (interrupt_id == InterruptId::PDC0) ? 0
: (interrupt_id == InterruptId::PDC1) ? 1
: -1;
const s32 screen_id = (interrupt_id == InterruptId::PDC0) ? 0
: (interrupt_id == InterruptId::PDC1) ? 1
: -1;
if (screen_id != -1) {
FrameBufferUpdate* info = GetFrameBufferInfo(thread_id, screen_id);
auto* info = GetFrameBufferInfo(thread_id, screen_id);
if (info->is_dirty) {
GSP::SetBufferSwap(screen_id, info->framebuffer_info[info->index]);
system.GPU().SetBufferSwap(screen_id, info->framebuffer_info[info->index]);
info->is_dirty.Assign(false);
}
}
interrupt_event->Signal();
}
/**
* Signals that the specified interrupt type has occurred to userland code
* @param interrupt_id ID of interrupt that is being signalled
* @todo This should probably take a thread_id parameter and only signal this thread?
* @todo This probably does not belong in the GSP module, instead move to video_core
*/
void GSP_GPU::SignalInterrupt(InterruptId interrupt_id) {
if (nullptr == shared_memory) {
LOG_WARNING(Service_GSP, "cannot synchronize until GSP shared memory has been created!");
@ -488,154 +394,13 @@ void GSP_GPU::SignalInterrupt(InterruptId interrupt_id) {
SignalInterruptForThread(interrupt_id, active_thread_id);
}
MICROPROFILE_DEFINE(GPU_GSP_DMA, "GPU", "GSP DMA", MP_RGB(100, 0, 255));
/// Executes the next GSP command
static void ExecuteCommand(const Command& command, u32 thread_id) {
// Utility function to convert register ID to address
static auto WriteGPURegister = [](u32 id, u32 data) {
GPU::Write<u32>(0x1EF00000 + 4 * id, data);
};
switch (command.id) {
// GX request DMA - typically used for copying memory from GSP heap to VRAM
case CommandId::REQUEST_DMA: {
MICROPROFILE_SCOPE(GPU_GSP_DMA);
Memory::MemorySystem& memory = Core::System::GetInstance().Memory();
// TODO: Consider attempting rasterizer-accelerated surface blit if that usage is ever
// possible/likely
Memory::RasterizerFlushVirtualRegion(command.dma_request.source_address,
command.dma_request.size, Memory::FlushMode::Flush);
Memory::RasterizerFlushVirtualRegion(command.dma_request.dest_address,
command.dma_request.size,
Memory::FlushMode::Invalidate);
// TODO(Subv): These memory accesses should not go through the application's memory mapping.
// They should go through the GSP module's memory mapping.
memory.CopyBlock(*Core::System::GetInstance().Kernel().GetCurrentProcess(),
command.dma_request.dest_address, command.dma_request.source_address,
command.dma_request.size);
SignalInterrupt(InterruptId::DMA);
break;
}
// TODO: This will need some rework in the future. (why?)
case CommandId::SUBMIT_GPU_CMDLIST: {
auto& params = command.submit_gpu_cmdlist;
if (params.do_flush) {
// This flag flushes the command list (params.address, params.size) from the cache.
// Command lists are not processed by the hardware renderer, so we don't need to
// actually flush them in Citra.
}
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.address)),
VirtualToPhysicalAddress(params.address) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.size)),
params.size);
// TODO: Not sure if we are supposed to always write this .. seems to trigger processing
// though
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(command_processor_config.trigger)), 1);
// TODO(yuriks): Figure out the meaning of the `flags` field.
break;
}
// It's assumed that the two "blocks" behave equivalently.
// Presumably this is done simply to allow two memory fills to run in parallel.
case CommandId::SET_MEMORY_FILL: {
auto& params = command.memory_fill;
if (params.start1 != 0) {
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].address_start)),
VirtualToPhysicalAddress(params.start1) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].address_end)),
VirtualToPhysicalAddress(params.end1) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].value_32bit)),
params.value1);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[0].control)),
params.control1);
}
if (params.start2 != 0) {
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].address_start)),
VirtualToPhysicalAddress(params.start2) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].address_end)),
VirtualToPhysicalAddress(params.end2) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].value_32bit)),
params.value2);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(memory_fill_config[1].control)),
params.control2);
}
break;
}
case CommandId::SET_DISPLAY_TRANSFER: {
auto& params = command.display_transfer;
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_address)),
VirtualToPhysicalAddress(params.in_buffer_address) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_address)),
VirtualToPhysicalAddress(params.out_buffer_address) >> 3);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.input_size)),
params.in_buffer_size);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.output_size)),
params.out_buffer_size);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.flags)),
params.flags);
WriteGPURegister(static_cast<u32>(GPU_REG_INDEX(display_transfer_config.trigger)), 1);
break;
}
case CommandId::SET_TEXTURE_COPY: {
auto& params = command.texture_copy;
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.input_address),
VirtualToPhysicalAddress(params.in_buffer_address) >> 3);
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.output_address),
VirtualToPhysicalAddress(params.out_buffer_address) >> 3);
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.texture_copy.size),
params.size);
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.texture_copy.input_size),
params.in_width_gap);
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.texture_copy.output_size),
params.out_width_gap);
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.flags), params.flags);
// NOTE: Actual GSP ORs 1 with current register instead of overwriting. Doesn't seem to
// matter.
WriteGPURegister((u32)GPU_REG_INDEX(display_transfer_config.trigger), 1);
break;
}
case CommandId::CACHE_FLUSH: {
// NOTE: Rasterizer flushing handled elsewhere in CPU read/write and other GPU handlers
// Use command.cache_flush.regions to implement this handler
break;
}
default:
LOG_ERROR(Service_GSP, "unknown command 0x{:08X}", (int)command.id.Value());
}
if (Pica::g_debug_context)
Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::GSPCommandProcessed,
(void*)&command);
}
void GSP_GPU::SetLcdForceBlack(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp(ctx);
const bool enable_black = rp.Pop<bool>();
bool enable_black = rp.Pop<bool>();
LCD::Regs::ColorFill data = {0};
// Since data is already zeroed, there is no need to explicitly set
// the color to black (all zero).
Pica::ColorFill data{};
data.is_enabled.Assign(enable_black);
LCD::Write(HW::VADDR_LCD + 4 * LCD_REG_INDEX(color_fill_top), data.raw); // Top LCD
LCD::Write(HW::VADDR_LCD + 4 * LCD_REG_INDEX(color_fill_bottom), data.raw); // Bottom LCD
system.GPU().SetColorFill(data);
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);
rb.Push(RESULT_SUCCESS);
@ -644,20 +409,17 @@ void GSP_GPU::SetLcdForceBlack(Kernel::HLERequestContext& ctx) {
void GSP_GPU::TriggerCmdReqQueue(Kernel::HLERequestContext& ctx) {
IPC::RequestParser rp(ctx);
// Iterate through each thread's command queue...
for (unsigned thread_id = 0; thread_id < 0x4; ++thread_id) {
CommandBuffer* command_buffer = (CommandBuffer*)GetCommandBuffer(shared_memory, thread_id);
// Iterate through each command.
auto* command_buffer = GetCommandBuffer(active_thread_id);
auto& gpu = system.GPU();
for (u32 i = 0; i < command_buffer->number_commands; i++) {
gpu.Debugger().GXCommandProcessed(command_buffer->commands[i]);
// Iterate through each command...
for (unsigned i = 0; i < command_buffer->number_commands; ++i) {
g_debugger.GXCommandProcessed((u8*)&command_buffer->commands[i]);
// Decode and execute command
gpu.Execute(command_buffer->commands[i]);
// Decode and execute command
ExecuteCommand(command_buffer->commands[i], thread_id);
// Indicates that command has completed
command_buffer->number_commands.Assign(command_buffer->number_commands - 1);
}
// Indicates that command has completed
command_buffer->number_commands.Assign(command_buffer->number_commands - 1);
}
IPC::RequestBuilder rb = rp.MakeBuilder(1, 0);

146
src/core/hle/service/gsp/gsp_gpu.h
View File

@ -13,7 +13,8 @@
#include "common/common_types.h"
#include "core/hle/kernel/event.h"
#include "core/hle/kernel/hle_ipc.h"
#include "core/hle/result.h"
#include "core/hle/service/gsp/gsp_command.h"
#include "core/hle/service/gsp/gsp_interrupt.h"
#include "core/hle/service/service.h"
namespace Core {
@ -28,53 +29,6 @@ class SharedMemory;
namespace Service::GSP {
/// GSP interrupt ID
enum class InterruptId : u8 {
PSC0 = 0x00,
PSC1 = 0x01,
PDC0 = 0x02, // Seems called every vertical screen line
PDC1 = 0x03, // Seems called every frame
PPF = 0x04,
P3D = 0x05,
DMA = 0x06,
};
/// GSP command ID
enum class CommandId : u32 {
REQUEST_DMA = 0x00,
/// Submits a commandlist for execution by the GPU.
SUBMIT_GPU_CMDLIST = 0x01,
// Fills a given memory range with a particular value
SET_MEMORY_FILL = 0x02,
// Copies an image and optionally performs color-conversion or scaling.
// This is highly similar to the GameCube's EFB copy feature
SET_DISPLAY_TRANSFER = 0x03,
// Conceptionally similar to SET_DISPLAY_TRANSFER and presumable uses the same hardware path
SET_TEXTURE_COPY = 0x04,
/// Flushes up to 3 cache regions in a single command.
CACHE_FLUSH = 0x05,
};
/// GSP thread interrupt relay queue
struct InterruptRelayQueue {
// Index of last interrupt in the queue
u8 index;
// Number of interrupts remaining to be processed by the userland code
u8 number_interrupts;
// Error code - zero on success, otherwise an error has occurred
u8 error_code;
u8 padding1;
u32 missed_PDC0;
u32 missed_PDC1;
InterruptId slot[0x34]; ///< Interrupt ID slots
};
static_assert(sizeof(InterruptRelayQueue) == 0x40, "InterruptRelayQueue struct has incorrect size");
struct FrameBufferInfo {
u32 active_fb; // 0 = first, 1 = second
u32 address_left;
@ -96,95 +50,9 @@ struct FrameBufferUpdate {
u32 pad2;
};
static_assert(sizeof(FrameBufferUpdate) == 0x40, "Struct has incorrect size");
// TODO: Not sure if this padding is correct.
// Chances are the second block is stored at offset 0x24 rather than 0x20.
static_assert(offsetof(FrameBufferUpdate, framebuffer_info[1]) == 0x20,
"FrameBufferInfo element has incorrect alignment");
/// GSP command
struct Command {
BitField<0, 8, CommandId> id;
union {
struct {
u32 source_address;
u32 dest_address;
u32 size;
} dma_request;
struct {
u32 address;
u32 size;
u32 flags;
u32 unused[3];
u32 do_flush;
} submit_gpu_cmdlist;
struct {
u32 start1;
u32 value1;
u32 end1;
u32 start2;
u32 value2;
u32 end2;
u16 control1;
u16 control2;
} memory_fill;
struct {
u32 in_buffer_address;
u32 out_buffer_address;
u32 in_buffer_size;
u32 out_buffer_size;
u32 flags;
} display_transfer;
struct {
u32 in_buffer_address;
u32 out_buffer_address;
u32 size;
u32 in_width_gap;
u32 out_width_gap;
u32 flags;
} texture_copy;
struct {
struct {
u32 address;
u32 size;
} regions[3];
} cache_flush;
u8 raw_data[0x1C];
};
};
static_assert(sizeof(Command) == 0x20, "Command struct has incorrect size");
/// GSP shared memory GX command buffer header
struct CommandBuffer {
union {
u32 hex;
// Current command index. This index is updated by GSP module after loading the command
// data, right before the command is processed. When this index is updated by GSP module,
// the total commands field is decreased by one as well.
BitField<0, 8, u32> index;
// Total commands to process, must not be value 0 when GSP module handles commands. This
// must be <=15 when writing a command to shared memory. This is incremented by the
// application when writing a command to shared memory, after increasing this value
// TriggerCmdReqQueue is only used if this field is value 1.
BitField<8, 8, u32> number_commands;
};
u32 unk[7];
Command commands[0xF];
};
static_assert(sizeof(CommandBuffer) == 0x200, "CommandBuffer struct has incorrect size");
constexpr u32 FRAMEBUFFER_WIDTH = 240;
constexpr u32 FRAMEBUFFER_WIDTH_POW2 = 256;
constexpr u32 TOP_FRAMEBUFFER_HEIGHT = 400;
@ -242,6 +110,12 @@ public:
*/
FrameBufferUpdate* GetFrameBufferInfo(u32 thread_id, u32 screen_index);
/// Gets a pointer to a thread command buffer in GSP shared memory
CommandBuffer* GetCommandBuffer(u32 thread_id);
/// Gets a pointer to the interrupt relay queue for a given thread index
InterruptRelayQueue* GetInterruptRelayQueue(u32 thread_id);
/**
* Retreives the ID of the thread with GPU rights.
*/
@ -513,7 +387,7 @@ private:
static constexpr u32 MaxGSPThreads = 4;
/// Thread ids currently in use by the sessions connected to the GSPGPU service.
std::array<bool, MaxGSPThreads> used_thread_ids = {false, false, false, false};
std::array<bool, MaxGSPThreads> used_thread_ids{};
friend class SessionData;
@ -522,8 +396,6 @@ private:
friend class boost::serialization::access;
};
ResultCode SetBufferSwap(u32 screen_id, const FrameBufferInfo& info);
} // namespace Service::GSP
BOOST_CLASS_EXPORT_KEY(Service::GSP::SessionData)

42
src/core/hle/service/gsp/gsp_interrupt.h Normal file
View File

@ -0,0 +1,42 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <functional>
#include "common/common_types.h"
namespace Service::GSP {
/// GSP interrupt ID
enum class InterruptId : u8 {
PSC0 = 0x00,
PSC1 = 0x01,
PDC0 = 0x02,
PDC1 = 0x03,
PPF = 0x04,
P3D = 0x05,
DMA = 0x06,
};
/// GSP thread interrupt relay queue
struct InterruptRelayQueue {
// Index of last interrupt in the queue
u8 index;
// Number of interrupts remaining to be processed by the userland code
u8 number_interrupts;
// Error code - zero on success, otherwise an error has occurred
u8 error_code;
u8 padding1;
u32 missed_PDC0;
u32 missed_PDC1;
InterruptId slot[0x34]; ///< Interrupt ID slots
};
static_assert(sizeof(InterruptRelayQueue) == 0x40, "InterruptRelayQueue struct has incorrect size");
using InterruptHandler = std::function<void(InterruptId)>;
} // namespace Service::GSP

1
src/core/hle/service/hid/hid.cpp
View File

@ -22,7 +22,6 @@
#include "core/hle/service/hid/hid_user.h"
#include "core/hle/service/service.h"
#include "core/movie.h"
#include "video_core/video_core.h"
SERVICE_CONSTRUCT_IMPL(Service::HID::Module)
SERIALIZE_EXPORT_IMPL(Service::HID::Module)

572
src/core/hw/gpu.cpp
View File

@ -1,572 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <cstring>
#include <numeric>
#include <type_traits>
#include "common/alignment.h"
#include "common/color.h"
#include "common/common_types.h"
#include "common/logging/log.h"
#include "common/microprofile.h"
#include "common/vector_math.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/hle/service/gsp/gsp.h"
#include "core/hw/gpu.h"
#include "core/hw/hw.h"
#include "core/memory.h"
#include "core/tracer/recorder.h"
#include "video_core/command_processor.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/rasterizer_interface.h"
#include "video_core/renderer_base.h"
#include "video_core/utils.h"
#include "video_core/video_core.h"
namespace GPU {
Regs g_regs;
Memory::MemorySystem* g_memory;
/// Event id for CoreTiming
static Core::TimingEventType* vblank_event;
template <typename T>
inline void Read(T& var, const u32 raw_addr) {
u32 addr = raw_addr - HW::VADDR_GPU;
u32 index = addr / 4;
// Reads other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= Regs::NumIds() || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_GPU, "unknown Read{} @ {:#010X}", sizeof(var) * 8, addr);
return;
}
var = g_regs[addr / 4];
}
static Common::Vec4<u8> DecodePixel(Regs::PixelFormat input_format, const u8* src_pixel) {
switch (input_format) {
case Regs::PixelFormat::RGBA8:
return Common::Color::DecodeRGBA8(src_pixel);
case Regs::PixelFormat::RGB8:
return Common::Color::DecodeRGB8(src_pixel);
case Regs::PixelFormat::RGB565:
return Common::Color::DecodeRGB565(src_pixel);
case Regs::PixelFormat::RGB5A1:
return Common::Color::DecodeRGB5A1(src_pixel);
case Regs::PixelFormat::RGBA4:
return Common::Color::DecodeRGBA4(src_pixel);
default:
LOG_ERROR(HW_GPU, "Unknown source framebuffer format {:x}", input_format);
return {0, 0, 0, 0};
}
}
MICROPROFILE_DEFINE(GPU_DisplayTransfer, "GPU", "DisplayTransfer", MP_RGB(100, 100, 255));
MICROPROFILE_DEFINE(GPU_CmdlistProcessing, "GPU", "Cmdlist Processing", MP_RGB(100, 255, 100));
static void MemoryFill(const Regs::MemoryFillConfig& config) {
const PAddr start_addr = config.GetStartAddress();
const PAddr end_addr = config.GetEndAddress();
// TODO: do hwtest with these cases
if (!g_memory->IsValidPhysicalAddress(start_addr)) {
LOG_CRITICAL(HW_GPU, "invalid start address {:#010X}", start_addr);
return;
}
if (!g_memory->IsValidPhysicalAddress(end_addr)) {
LOG_CRITICAL(HW_GPU, "invalid end address {:#010X}", end_addr);
return;
}
if (end_addr <= start_addr) {
LOG_CRITICAL(HW_GPU, "invalid memory range from {:#010X} to {:#010X}", start_addr,
end_addr);
return;
}
u8* start = g_memory->GetPhysicalPointer(start_addr);
u8* end = g_memory->GetPhysicalPointer(end_addr);
if (VideoCore::g_renderer->Rasterizer()->AccelerateFill(config))
return;
Memory::RasterizerInvalidateRegion(config.GetStartAddress(),
config.GetEndAddress() - config.GetStartAddress());
if (config.fill_24bit) {
// fill with 24-bit values
for (u8* ptr = start; ptr < end; ptr += 3) {
ptr[0] = config.value_24bit_r;
ptr[1] = config.value_24bit_g;
ptr[2] = config.value_24bit_b;
}
} else if (config.fill_32bit) {
// fill with 32-bit values
if (end > start) {
u32 value = config.value_32bit;
std::size_t len = (end - start) / sizeof(u32);
for (std::size_t i = 0; i < len; ++i)
std::memcpy(&start[i * sizeof(u32)], &value, sizeof(u32));
}
} else {
// fill with 16-bit values
u16 value_16bit = config.value_16bit.Value();
for (u8* ptr = start; ptr < end; ptr += sizeof(u16))
std::memcpy(ptr, &value_16bit, sizeof(u16));
}
}
static void DisplayTransfer(const Regs::DisplayTransferConfig& config) {
const PAddr src_addr = config.GetPhysicalInputAddress();
PAddr dst_addr = config.GetPhysicalOutputAddress();
// TODO: do hwtest with these cases
if (!g_memory->IsValidPhysicalAddress(src_addr)) {
LOG_CRITICAL(HW_GPU, "invalid input address {:#010X}", src_addr);
return;
}
if (!g_memory->IsValidPhysicalAddress(dst_addr)) {
LOG_CRITICAL(HW_GPU, "invalid output address {:#010X}", dst_addr);
return;
}
if (config.input_width == 0) {
LOG_CRITICAL(HW_GPU, "zero input width");
return;
}
if (config.input_height == 0) {
LOG_CRITICAL(HW_GPU, "zero input height");
return;
}
if (config.output_width == 0) {
LOG_CRITICAL(HW_GPU, "zero output width");
return;
}
if (config.output_height == 0) {
LOG_CRITICAL(HW_GPU, "zero output height");
return;
}
if (VideoCore::g_renderer->Rasterizer()->AccelerateDisplayTransfer(config))
return;
// Using flip_vertically alongside crop_input_lines produces skewed output on hardware.
// We have to emulate this because some games rely on this behaviour to render correctly.
if (config.flip_vertically && config.crop_input_lines &&
config.input_width > config.output_width) {
dst_addr += (config.input_width - config.output_width) * (config.output_height - 1) *
GPU::Regs::BytesPerPixel(config.output_format);
}
u8* src_pointer = g_memory->GetPhysicalPointer(src_addr);
u8* dst_pointer = g_memory->GetPhysicalPointer(dst_addr);
if (config.scaling > config.ScaleXY) {
LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode {}",
config.scaling.Value());
UNIMPLEMENTED();
return;
}
if (config.input_linear && config.scaling != config.NoScale) {
LOG_CRITICAL(HW_GPU, "Scaling is only implemented on tiled input");
UNIMPLEMENTED();
return;
}
int horizontal_scale = config.scaling != config.NoScale ? 1 : 0;
int vertical_scale = config.scaling == config.ScaleXY ? 1 : 0;
u32 output_width = config.output_width >> horizontal_scale;
u32 output_height = config.output_height >> vertical_scale;
u32 input_size =
config.input_width * config.input_height * GPU::Regs::BytesPerPixel(config.input_format);
u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), input_size);
Memory::RasterizerInvalidateRegion(config.GetPhysicalOutputAddress(), output_size);
for (u32 y = 0; y < output_height; ++y) {
for (u32 x = 0; x < output_width; ++x) {
Common::Vec4<u8> src_color;
// Calculate the [x,y] position of the input image
// based on the current output position and the scale
u32 input_x = x << horizontal_scale;
u32 input_y = y << vertical_scale;
u32 output_y;
if (config.flip_vertically) {
// Flip the y value of the output data,
// we do this after calculating the [x,y] position of the input image
// to account for the scaling options.
output_y = output_height - y - 1;
} else {
output_y = y;
}
u32 dst_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.output_format);
u32 src_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.input_format);
u32 src_offset;
u32 dst_offset;
if (config.input_linear) {
if (!config.dont_swizzle) {
// Interpret the input as linear and the output as tiled
u32 coarse_y = output_y & ~7;
u32 stride = output_width * dst_bytes_per_pixel;
src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
dst_offset = VideoCore::GetMortonOffset(x, output_y, dst_bytes_per_pixel) +
coarse_y * stride;
} else {
// Both input and output are linear
src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
dst_offset = (x + output_y * output_width) * dst_bytes_per_pixel;
}
} else {
if (!config.dont_swizzle) {
// Interpret the input as tiled and the output as linear
u32 coarse_y = input_y & ~7;
u32 stride = config.input_width * src_bytes_per_pixel;
src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) +
coarse_y * stride;
dst_offset = (x + output_y * output_width) * dst_bytes_per_pixel;
} else {
// Both input and output are tiled
u32 out_coarse_y = output_y & ~7;
u32 out_stride = output_width * dst_bytes_per_pixel;
u32 in_coarse_y = input_y & ~7;
u32 in_stride = config.input_width * src_bytes_per_pixel;
src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) +
in_coarse_y * in_stride;
dst_offset = VideoCore::GetMortonOffset(x, output_y, dst_bytes_per_pixel) +
out_coarse_y * out_stride;
}
}
const u8* src_pixel = src_pointer + src_offset;
src_color = DecodePixel(config.input_format, src_pixel);
if (config.scaling == config.ScaleX) {
Common::Vec4<u8> pixel =
DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
src_color = ((src_color + pixel) / 2).Cast<u8>();
} else if (config.scaling == config.ScaleXY) {
Common::Vec4<u8> pixel1 =
DecodePixel(config.input_format, src_pixel + 1 * src_bytes_per_pixel);
Common::Vec4<u8> pixel2 =
DecodePixel(config.input_format, src_pixel + 2 * src_bytes_per_pixel);
Common::Vec4<u8> pixel3 =
DecodePixel(config.input_format, src_pixel + 3 * src_bytes_per_pixel);
src_color = (((src_color + pixel1) + (pixel2 + pixel3)) / 4).Cast<u8>();
}
u8* dst_pixel = dst_pointer + dst_offset;
switch (config.output_format) {
case Regs::PixelFormat::RGBA8:
Common::Color::EncodeRGBA8(src_color, dst_pixel);
break;
case Regs::PixelFormat::RGB8:
Common::Color::EncodeRGB8(src_color, dst_pixel);
break;
case Regs::PixelFormat::RGB565:
Common::Color::EncodeRGB565(src_color, dst_pixel);
break;
case Regs::PixelFormat::RGB5A1:
Common::Color::EncodeRGB5A1(src_color, dst_pixel);
break;
case Regs::PixelFormat::RGBA4:
Common::Color::EncodeRGBA4(src_color, dst_pixel);
break;
default:
LOG_ERROR(HW_GPU, "Unknown destination framebuffer format {:x}",
static_cast<u32>(config.output_format.Value()));
break;
}
}
}
}
static void TextureCopy(const Regs::DisplayTransferConfig& config) {
const PAddr src_addr = config.GetPhysicalInputAddress();
const PAddr dst_addr = config.GetPhysicalOutputAddress();
// TODO: do hwtest with invalid addresses
if (!g_memory->IsValidPhysicalAddress(src_addr)) {
LOG_CRITICAL(HW_GPU, "invalid input address {:#010X}", src_addr);
return;
}
if (!g_memory->IsValidPhysicalAddress(dst_addr)) {
LOG_CRITICAL(HW_GPU, "invalid output address {:#010X}", dst_addr);
return;
}
if (VideoCore::g_renderer->Rasterizer()->AccelerateTextureCopy(config))
return;
u8* src_pointer = g_memory->GetPhysicalPointer(src_addr);
u8* dst_pointer = g_memory->GetPhysicalPointer(dst_addr);
u32 remaining_size = Common::AlignDown(config.texture_copy.size, 16);
if (remaining_size == 0) {
LOG_CRITICAL(HW_GPU, "zero size. Real hardware freezes on this.");
return;
}
u32 input_gap = config.texture_copy.input_gap * 16;
u32 output_gap = config.texture_copy.output_gap * 16;
// Zero gap means contiguous input/output even if width = 0. To avoid infinite loop below, width
// is assigned with the total size if gap = 0.
u32 input_width = input_gap == 0 ? remaining_size : config.texture_copy.input_width * 16;
u32 output_width = output_gap == 0 ? remaining_size : config.texture_copy.output_width * 16;
if (input_width == 0) {
LOG_CRITICAL(HW_GPU, "zero input width. Real hardware freezes on this.");
return;
}
if (output_width == 0) {
LOG_CRITICAL(HW_GPU, "zero output width. Real hardware freezes on this.");
return;
}
std::size_t contiguous_input_size =
config.texture_copy.size / input_width * (input_width + input_gap);
Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(),
static_cast<u32>(contiguous_input_size));
std::size_t contiguous_output_size =
config.texture_copy.size / output_width * (output_width + output_gap);
// Only need to flush output if it has a gap
const auto FlushInvalidate_fn = (output_gap != 0) ? Memory::RasterizerFlushAndInvalidateRegion
: Memory::RasterizerInvalidateRegion;
FlushInvalidate_fn(config.GetPhysicalOutputAddress(), static_cast<u32>(contiguous_output_size));
u32 remaining_input = input_width;
u32 remaining_output = output_width;
while (remaining_size > 0) {
u32 copy_size = std::min({remaining_input, remaining_output, remaining_size});
std::memcpy(dst_pointer, src_pointer, copy_size);
src_pointer += copy_size;
dst_pointer += copy_size;
remaining_input -= copy_size;
remaining_output -= copy_size;
remaining_size -= copy_size;
if (remaining_input == 0) {
remaining_input = input_width;
src_pointer += input_gap;
}
if (remaining_output == 0) {
remaining_output = output_width;
dst_pointer += output_gap;
}
}
}
template <typename T>
inline void Write(u32 addr, const T data) {
addr -= HW::VADDR_GPU;
u32 index = addr / 4;
// Writes other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= Regs::NumIds() || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_GPU, "unknown Write{} {:#010X} @ {:#010X}", sizeof(data) * 8, (u32)data, addr);
return;
}
g_regs[index] = static_cast<u32>(data);
switch (index) {
// Memory fills are triggered once the fill value is written.
case GPU_REG_INDEX(memory_fill_config[0].trigger):
case GPU_REG_INDEX(memory_fill_config[1].trigger): {
const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
auto& config = g_regs.memory_fill_config[is_second_filler];
if (config.trigger) {
MemoryFill(config);
LOG_TRACE(HW_GPU, "MemoryFill from {:#010X} to {:#010X}", config.GetStartAddress(),
config.GetEndAddress());
// It seems that it won't signal interrupt if "address_start" is zero.
// TODO: hwtest this
if (config.GetStartAddress() != 0) {
if (!is_second_filler) {
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::PSC0);
} else {
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::PSC1);
}
}
// Reset "trigger" flag and set the "finish" flag
// NOTE: This was confirmed to happen on hardware even if "address_start" is zero.
config.trigger.Assign(0);
config.finished.Assign(1);
}
break;
}
case GPU_REG_INDEX(display_transfer_config.trigger): {
MICROPROFILE_SCOPE(GPU_DisplayTransfer);
const auto& config = g_regs.display_transfer_config;
if (config.trigger & 1) {
if (Pica::g_debug_context)
Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::IncomingDisplayTransfer,
nullptr);
if (config.is_texture_copy) {
TextureCopy(config);
LOG_TRACE(HW_GPU,
"TextureCopy: {:#X} bytes from {:#010X}({}+{})-> "
"{:#010X}({}+{}), flags {:#010X}",
config.texture_copy.size, config.GetPhysicalInputAddress(),
config.texture_copy.input_width * 16, config.texture_copy.input_gap * 16,
config.GetPhysicalOutputAddress(), config.texture_copy.output_width * 16,
config.texture_copy.output_gap * 16, config.flags);
} else {
DisplayTransfer(config);
LOG_TRACE(HW_GPU,
"DisplayTransfer: {:#010X}({}x{})-> "
"{:#010X}({}x{}), dst format {:x}, flags {:#010X}",
config.GetPhysicalInputAddress(), config.input_width.Value(),
config.input_height.Value(), config.GetPhysicalOutputAddress(),
config.output_width.Value(), config.output_height.Value(),
static_cast<u32>(config.output_format.Value()), config.flags);
}
g_regs.display_transfer_config.trigger = 0;
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::PPF);
}
break;
}
// Seems like writing to this register triggers processing
case GPU_REG_INDEX(command_processor_config.trigger): {
const auto& config = g_regs.command_processor_config;
if (config.trigger & 1) {
MICROPROFILE_SCOPE(GPU_CmdlistProcessing);
Pica::CommandProcessor::ProcessCommandList(config.GetPhysicalAddress(), config.size);
g_regs.command_processor_config.trigger = 0;
}
break;
}
default:
break;
}
// Notify tracer about the register write
// This is happening *after* handling the write to make sure we properly catch all memory reads.
if (Pica::g_debug_context && Pica::g_debug_context->recorder) {
// addr + GPU VBase - IO VBase + IO PBase
Pica::g_debug_context->recorder->RegisterWritten<T>(
addr + 0x1EF00000 - 0x1EC00000 + 0x10100000, data);
}
}
// Explicitly instantiate template functions because we aren't defining this in the header:
template void Read<u64>(u64& var, const u32 addr);
template void Read<u32>(u32& var, const u32 addr);
template void Read<u16>(u16& var, const u32 addr);
template void Read<u8>(u8& var, const u32 addr);
template void Write<u64>(u32 addr, const u64 data);
template void Write<u32>(u32 addr, const u32 data);
template void Write<u16>(u32 addr, const u16 data);
template void Write<u8>(u32 addr, const u8 data);
/// Update hardware
static void VBlankCallback(std::uintptr_t user_data, s64 cycles_late) {
VideoCore::g_renderer->SwapBuffers();
// Signal to GSP that GPU interrupt has occurred
// TODO(yuriks): hwtest to determine if PDC0 is for the Top screen and PDC1 for the Sub
// screen, or if both use the same interrupts and these two instead determine the
// beginning and end of the VBlank period. If needed, split the interrupt firing into
// two different intervals.
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::PDC0);
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::PDC1);
// Reschedule recurrent event
Core::System::GetInstance().CoreTiming().ScheduleEvent(frame_ticks - cycles_late, vblank_event);
}
/// Initialize hardware
void Init(Memory::MemorySystem& memory) {
g_memory = &memory;
std::memset(&g_regs, 0, sizeof(g_regs));
auto& framebuffer_top = g_regs.framebuffer_config[0];
auto& framebuffer_sub = g_regs.framebuffer_config[1];
// Setup default framebuffer addresses (located in VRAM)
// .. or at least these are the ones used by system applets.
// There's probably a smarter way to come up with addresses
// like this which does not require hardcoding.
framebuffer_top.address_left1 = 0x181E6000;
framebuffer_top.address_left2 = 0x1822C800;
framebuffer_top.address_right1 = 0x18273000;
framebuffer_top.address_right2 = 0x182B9800;
framebuffer_sub.address_left1 = 0x1848F000;
framebuffer_sub.address_left2 = 0x184C7800;
framebuffer_top.width.Assign(240);
framebuffer_top.height.Assign(400);
framebuffer_top.stride = 3 * 240;
framebuffer_top.color_format.Assign(Regs::PixelFormat::RGB8);
framebuffer_top.active_fb = 0;
framebuffer_sub.width.Assign(240);
framebuffer_sub.height.Assign(320);
framebuffer_sub.stride = 3 * 240;
framebuffer_sub.color_format.Assign(Regs::PixelFormat::RGB8);
framebuffer_sub.active_fb = 0;
Core::Timing& timing = Core::System::GetInstance().CoreTiming();
vblank_event = timing.RegisterEvent("GPU::VBlankCallback", VBlankCallback);
timing.ScheduleEvent(frame_ticks, vblank_event);
LOG_DEBUG(HW_GPU, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
LOG_DEBUG(HW_GPU, "shutdown OK");
}
} // namespace GPU

344
src/core/hw/gpu.h
View File

@ -1,344 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <cstddef>
#include <type_traits>
#include <boost/serialization/access.hpp>
#include <boost/serialization/binary_object.hpp>
#include "common/assert.h"
#include "common/bit_field.h"
#include "common/common_funcs.h"
#include "common/common_types.h"
#include "core/core_timing.h"
namespace Memory {
class MemorySystem;
}
namespace GPU {
// Measured on hardware to be 2240568 timer cycles or 4481136 ARM11 cycles
constexpr u64 frame_ticks = 4481136ull;
// Refresh rate defined by ratio of ARM11 frequency to ARM11 ticks per frame
// (268,111,856) / (4,481,136) = 59.83122493939037Hz
constexpr double SCREEN_REFRESH_RATE = BASE_CLOCK_RATE_ARM11 / static_cast<double>(frame_ticks);
// Returns index corresponding to the Regs member labeled by field_name
#define GPU_REG_INDEX(field_name) (offsetof(GPU::Regs, field_name) / sizeof(u32))
// Returns index corresponding to the Regs::FramebufferConfig labeled by field_name
// screen_id is a subscript for Regs::framebuffer_config
#define GPU_FRAMEBUFFER_REG_INDEX(screen_id, field_name) \
((offsetof(GPU::Regs, framebuffer_config) + \
sizeof(GPU::Regs::FramebufferConfig) * (screen_id) + \
offsetof(GPU::Regs::FramebufferConfig, field_name)) / \
sizeof(u32))
// MMIO region 0x1EFxxxxx
struct Regs {
// helper macro to make sure the defined structures are of the expected size.
#define ASSERT_MEMBER_SIZE(name, size_in_bytes) \
static_assert(sizeof(name) == size_in_bytes, \
"Structure size and register block length don't match")
// Components are laid out in reverse byte order, most significant bits first.
enum class PixelFormat : u32 {
RGBA8 = 0,
RGB8 = 1,
RGB565 = 2,
RGB5A1 = 3,
RGBA4 = 4,
};
/**
* Returns the number of bytes per pixel.
*/
static int BytesPerPixel(PixelFormat format) {
switch (format) {
case PixelFormat::RGBA8:
return 4;
case PixelFormat::RGB8:
return 3;
case PixelFormat::RGB565:
case PixelFormat::RGB5A1:
case PixelFormat::RGBA4:
return 2;
default:
UNREACHABLE();
}
return 0;
}
INSERT_PADDING_WORDS(0x4);
struct MemoryFillConfig {
u32 address_start;
u32 address_end;
union {
u32 value_32bit;
BitField<0, 16, u32> value_16bit;
// TODO: Verify component order
BitField<0, 8, u32> value_24bit_r;
BitField<8, 8, u32> value_24bit_g;
BitField<16, 8, u32> value_24bit_b;
};
union {
u32 control;
// Setting this field to 1 triggers the memory fill.
// This field also acts as a status flag, and gets reset to 0 upon completion.
BitField<0, 1, u32> trigger;
// Set to 1 upon completion.
BitField<1, 1, u32> finished;
// If both of these bits are unset, then it will fill the memory with a 16 bit value
// 1: fill with 24-bit wide values
BitField<8, 1, u32> fill_24bit;
// 1: fill with 32-bit wide values
BitField<9, 1, u32> fill_32bit;
};
inline u32 GetStartAddress() const {
return DecodeAddressRegister(address_start);
}
inline u32 GetEndAddress() const {
return DecodeAddressRegister(address_end);
}
inline std::string DebugName() const {
return fmt::format("from {:#X} to {:#X} with {}-bit value {:#X}", GetStartAddress(),
GetEndAddress(), fill_32bit ? "32" : (fill_24bit ? "24" : "16"),
value_32bit);
}
} memory_fill_config[2];
ASSERT_MEMBER_SIZE(memory_fill_config[0], 0x10);
INSERT_PADDING_WORDS(0x10b);
struct FramebufferConfig {
union {
u32 size;
BitField<0, 16, u32> width;
BitField<16, 16, u32> height;
};
INSERT_PADDING_WORDS(0x2);
u32 address_left1;
u32 address_left2;
union {
u32 format;
BitField<0, 3, PixelFormat> color_format;
};
INSERT_PADDING_WORDS(0x1);
union {
u32 active_fb;
// 0: Use parameters ending with "1"
// 1: Use parameters ending with "2"
BitField<0, 1, u32> second_fb_active;
};
INSERT_PADDING_WORDS(0x5);
// Distance between two pixel rows, in bytes
u32 stride;
u32 address_right1;
u32 address_right2;
INSERT_PADDING_WORDS(0x30);
} framebuffer_config[2];
ASSERT_MEMBER_SIZE(framebuffer_config[0], 0x100);
INSERT_PADDING_WORDS(0x169);
struct DisplayTransferConfig {
u32 input_address;
u32 output_address;
inline u32 GetPhysicalInputAddress() const {
return DecodeAddressRegister(input_address);
}
inline u32 GetPhysicalOutputAddress() const {
return DecodeAddressRegister(output_address);
}
inline std::string DebugName() const noexcept {
return fmt::format("from {:#x} to {:#x} with {} scaling and stride {}, width {}",
GetPhysicalInputAddress(), GetPhysicalOutputAddress(),
scaling == NoScale ? "no" : (scaling == ScaleX ? "X" : "XY"),
input_width.Value(), output_width.Value());
}
union {
u32 output_size;
BitField<0, 16, u32> output_width;
BitField<16, 16, u32> output_height;
};
union {
u32 input_size;
BitField<0, 16, u32> input_width;
BitField<16, 16, u32> input_height;
};
enum ScalingMode : u32 {
NoScale = 0, // Doesn't scale the image
ScaleX = 1, // Downscales the image in half in the X axis and applies a box filter
ScaleXY =
2, // Downscales the image in half in both the X and Y axes and applies a box filter
};
union {
u32 flags;
BitField<0, 1, u32> flip_vertically; // flips input data vertically
BitField<1, 1, u32> input_linear; // Converts from linear to tiled format
BitField<2, 1, u32> crop_input_lines;
BitField<3, 1, u32> is_texture_copy; // Copies the data without performing any
// processing and respecting texture copy fields
BitField<5, 1, u32> dont_swizzle;
BitField<8, 3, PixelFormat> input_format;
BitField<12, 3, PixelFormat> output_format;
/// Uses some kind of 32x32 block swizzling mode, instead of the usual 8x8 one.
BitField<16, 1, u32> block_32; // TODO(yuriks): unimplemented
BitField<24, 2, ScalingMode> scaling; // Determines the scaling mode of the transfer
};
INSERT_PADDING_WORDS(0x1);
// it seems that writing to this field triggers the display transfer
u32 trigger;
INSERT_PADDING_WORDS(0x1);
struct {
u32 size; // The lower 4 bits are ignored
union {
u32 input_size;
BitField<0, 16, u32> input_width;
BitField<16, 16, u32> input_gap;
};
union {
u32 output_size;
BitField<0, 16, u32> output_width;
BitField<16, 16, u32> output_gap;
};
} texture_copy;
} display_transfer_config;
ASSERT_MEMBER_SIZE(display_transfer_config, 0x2c);
INSERT_PADDING_WORDS(0x32D);
struct {
// command list size (in bytes)
u32 size;
INSERT_PADDING_WORDS(0x1);
// command list address
u32 address;
INSERT_PADDING_WORDS(0x1);
// it seems that writing to this field triggers command list processing
u32 trigger;
inline u32 GetPhysicalAddress() const {
return DecodeAddressRegister(address);
}
} command_processor_config;
ASSERT_MEMBER_SIZE(command_processor_config, 0x14);
INSERT_PADDING_WORDS(0x9c3);
static constexpr std::size_t NumIds() {
return sizeof(Regs) / sizeof(u32);
}
const u32& operator[](int index) const {
const u32* content = reinterpret_cast<const u32*>(this);
return content[index];
}
u32& operator[](int index) {
u32* content = reinterpret_cast<u32*>(this);
return content[index];
}
#undef ASSERT_MEMBER_SIZE
private:
/*
* Most physical addresses which GPU registers refer to are 8-byte aligned.
* This function should be used to get the address from a raw register value.
*/
static inline u32 DecodeAddressRegister(u32 register_value) {
return register_value * 8;
}
template <class Archive>
void serialize(Archive& ar, const unsigned int) {
ar& boost::serialization::make_binary_object(this, sizeof(Regs));
}
friend class boost::serialization::access;
};
static_assert(std::is_standard_layout<Regs>::value, "Structure does not use standard layout");
#define ASSERT_REG_POSITION(field_name, position) \
static_assert(offsetof(Regs, field_name) == position * 4, \
"Field " #field_name " has invalid position")
ASSERT_REG_POSITION(memory_fill_config[0], 0x00004);
ASSERT_REG_POSITION(memory_fill_config[1], 0x00008);
ASSERT_REG_POSITION(framebuffer_config[0], 0x00117);
ASSERT_REG_POSITION(framebuffer_config[1], 0x00157);
ASSERT_REG_POSITION(display_transfer_config, 0x00300);
ASSERT_REG_POSITION(command_processor_config, 0x00638);
#undef ASSERT_REG_POSITION
// The total number of registers is chosen arbitrarily, but let's make sure it's not some odd value
// anyway.
static_assert(sizeof(Regs) == 0x1000 * sizeof(u32), "Invalid total size of register set");
extern Regs g_regs;
template <typename T>
void Read(T& var, const u32 addr);
template <typename T>
void Write(u32 addr, const T data);
/// Initialize hardware
void Init(Memory::MemorySystem& memory);
/// Shutdown hardware
void Shutdown();
} // namespace GPU

102
src/core/hw/hw.cpp
View File

@ -1,102 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/common_types.h"
#include "common/logging/log.h"
#include "core/hw/aes/key.h"
#include "core/hw/gpu.h"
#include "core/hw/hw.h"
#include "core/hw/lcd.h"
namespace HW {
template <typename T>
inline void Read(T& var, const u32 addr) {
switch (addr & 0xFFFFF000) {
case VADDR_GPU:
case VADDR_GPU + 0x1000:
case VADDR_GPU + 0x2000:
case VADDR_GPU + 0x3000:
case VADDR_GPU + 0x4000:
case VADDR_GPU + 0x5000:
case VADDR_GPU + 0x6000:
case VADDR_GPU + 0x7000:
case VADDR_GPU + 0x8000:
case VADDR_GPU + 0x9000:
case VADDR_GPU + 0xA000:
case VADDR_GPU + 0xB000:
case VADDR_GPU + 0xC000:
case VADDR_GPU + 0xD000:
case VADDR_GPU + 0xE000:
case VADDR_GPU + 0xF000:
GPU::Read(var, addr);
break;
case VADDR_LCD:
LCD::Read(var, addr);
break;
default:
LOG_ERROR(HW_Memory, "unknown Read{} @ {:#010X}", sizeof(var) * 8, addr);
}
}
template <typename T>
inline void Write(u32 addr, const T data) {
switch (addr & 0xFFFFF000) {
case VADDR_GPU:
case VADDR_GPU + 0x1000:
case VADDR_GPU + 0x2000:
case VADDR_GPU + 0x3000:
case VADDR_GPU + 0x4000:
case VADDR_GPU + 0x5000:
case VADDR_GPU + 0x6000:
case VADDR_GPU + 0x7000:
case VADDR_GPU + 0x8000:
case VADDR_GPU + 0x9000:
case VADDR_GPU + 0xA000:
case VADDR_GPU + 0xB000:
case VADDR_GPU + 0xC000:
case VADDR_GPU + 0xD000:
case VADDR_GPU + 0xE000:
case VADDR_GPU + 0xF000:
GPU::Write(addr, data);
break;
case VADDR_LCD:
LCD::Write(addr, data);
break;
default:
LOG_ERROR(HW_Memory, "unknown Write{} {:#010X} @ {:#010X}", sizeof(data) * 8, (u32)data,
addr);
}
}
// Explicitly instantiate template functions because we aren't defining this in the header:
template void Read<u64>(u64& var, const u32 addr);
template void Read<u32>(u32& var, const u32 addr);
template void Read<u16>(u16& var, const u32 addr);
template void Read<u8>(u8& var, const u32 addr);
template void Write<u64>(u32 addr, const u64 data);
template void Write<u32>(u32 addr, const u32 data);
template void Write<u16>(u32 addr, const u16 data);
template void Write<u8>(u32 addr, const u8 data);
/// Update hardware
void Update() {}
/// Initialize hardware
void Init(Memory::MemorySystem& memory) {
AES::InitKeys();
GPU::Init(memory);
LCD::Init();
LOG_DEBUG(HW, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
GPU::Shutdown();
LCD::Shutdown();
LOG_DEBUG(HW, "shutdown OK");
}
} // namespace HW

54
src/core/hw/hw.h
View File

@ -1,54 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/common_types.h"
namespace Memory {
class MemorySystem;
}
namespace HW {
/// Beginnings of IO register regions, in the user VA space.
enum : u32 {
VADDR_HASH = 0x1EC01000,
VADDR_CSND = 0x1EC03000,
VADDR_DSP = 0x1EC40000,
VADDR_PDN = 0x1EC41000,
VADDR_CODEC = 0x1EC41000,
VADDR_SPI = 0x1EC42000,
VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
VADDR_I2C = 0x1EC44000,
VADDR_CODEC_2 = 0x1EC45000,
VADDR_HID = 0x1EC46000,
VADDR_GPIO = 0x1EC47000,
VADDR_I2C_2 = 0x1EC48000,
VADDR_SPI_3 = 0x1EC60000,
VADDR_I2C_3 = 0x1EC61000,
VADDR_MIC = 0x1EC62000,
VADDR_PXI = 0x1EC63000,
VADDR_LCD = 0x1ED02000,
VADDR_DSP_2 = 0x1ED03000,
VADDR_HASH_2 = 0x1EE01000,
VADDR_GPU = 0x1EF00000,
};
template <typename T>
void Read(T& var, const u32 addr);
template <typename T>
void Write(u32 addr, const T data);
/// Update hardware
void Update();
/// Initialize hardware
void Init(Memory::MemorySystem& memory);
/// Shutdown hardware
void Shutdown();
} // namespace HW

76
src/core/hw/lcd.cpp
View File

@ -1,76 +0,0 @@
// Copyright 2015 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <cstring>
#include "common/common_types.h"
#include "common/logging/log.h"
#include "core/hw/hw.h"
#include "core/hw/lcd.h"
#include "core/tracer/recorder.h"
#include "video_core/debug_utils/debug_utils.h"
namespace LCD {
Regs g_regs;
template <typename T>
inline void Read(T& var, const u32 raw_addr) {
u32 addr = raw_addr - HW::VADDR_LCD;
u32 index = addr / 4;
// Reads other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= 0x400 || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_LCD, "unknown Read{} @ {:#010X}", sizeof(var) * 8, addr);
return;
}
var = g_regs[index];
}
template <typename T>
inline void Write(u32 addr, const T data) {
addr -= HW::VADDR_LCD;
u32 index = addr / 4;
// Writes other than u32 are untested, so I'd rather have them abort than silently fail
if (index >= 0x400 || !std::is_same<T, u32>::value) {
LOG_ERROR(HW_LCD, "unknown Write{} {:#010X} @ {:#010X}", sizeof(data) * 8, (u32)data, addr);
return;
}
g_regs[index] = static_cast<u32>(data);
// Notify tracer about the register write
// This is happening *after* handling the write to make sure we properly catch all memory reads.
if (Pica::g_debug_context && Pica::g_debug_context->recorder) {
// addr + GPU VBase - IO VBase + IO PBase
Pica::g_debug_context->recorder->RegisterWritten<T>(
addr + HW::VADDR_LCD - 0x1EC00000 + 0x10100000, data);
}
}
// Explicitly instantiate template functions because we aren't defining this in the header:
template void Read<u64>(u64& var, const u32 addr);
template void Read<u32>(u32& var, const u32 addr);
template void Read<u16>(u16& var, const u32 addr);
template void Read<u8>(u8& var, const u32 addr);
template void Write<u64>(u32 addr, const u64 data);
template void Write<u32>(u32 addr, const u32 data);
template void Write<u16>(u32 addr, const u16 data);
template void Write<u8>(u32 addr, const u8 data);
/// Initialize hardware
void Init() {
std::memset(&g_regs, 0, sizeof(g_regs));
LOG_DEBUG(HW_LCD, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
LOG_DEBUG(HW_LCD, "shutdown OK");
}
} // namespace LCD

2
src/core/hw/y2r.cpp
View File

@ -9,7 +9,7 @@
#include "common/assert.h"
#include "common/color.h"
#include "common/common_types.h"
#include "common/microprofileui.h"
#include "common/microprofile.h"
#include "common/vector_math.h"
#include "core/core.h"
#include "core/hle/service/cam/y2r_u.h"

134
src/core/memory.cpp
View File

@ -19,10 +19,9 @@
#include "core/global.h"
#include "core/hle/kernel/process.h"
#include "core/hle/service/plgldr/plgldr.h"
#include "core/hw/hw.h"
#include "core/memory.h"
#include "video_core/gpu.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
SERIALIZE_EXPORT_IMPL(Memory::MemorySystem::BackingMemImpl<Memory::Region::FCRAM>)
SERIALIZE_EXPORT_IMPL(Memory::MemorySystem::BackingMemImpl<Memory::Region::VRAM>)
@ -346,13 +345,52 @@ std::shared_ptr<PageTable> MemorySystem::GetCurrentPageTable() const {
return impl->current_page_table;
}
void RasterizerFlushVirtualRegion(VAddr start, u32 size, FlushMode mode) {
const VAddr end = start + size;
auto CheckRegion = [&](VAddr region_start, VAddr region_end, PAddr paddr_region_start) {
if (start >= region_end || end <= region_start) {
// No overlap with region
return;
}
auto& renderer = Core::System::GetInstance().GPU().Renderer();
VAddr overlap_start = std::max(start, region_start);
VAddr overlap_end = std::min(end, region_end);
PAddr physical_start = paddr_region_start + (overlap_start - region_start);
u32 overlap_size = overlap_end - overlap_start;
auto* rasterizer = renderer.Rasterizer();
switch (mode) {
case FlushMode::Flush:
rasterizer->FlushRegion(physical_start, overlap_size);
break;
case FlushMode::Invalidate:
rasterizer->InvalidateRegion(physical_start, overlap_size);
break;
case FlushMode::FlushAndInvalidate:
rasterizer->FlushAndInvalidateRegion(physical_start, overlap_size);
break;
}
};
CheckRegion(LINEAR_HEAP_VADDR, LINEAR_HEAP_VADDR_END, FCRAM_PADDR);
CheckRegion(NEW_LINEAR_HEAP_VADDR, NEW_LINEAR_HEAP_VADDR_END, FCRAM_PADDR);
CheckRegion(VRAM_VADDR, VRAM_VADDR_END, VRAM_PADDR);
if (Service::PLGLDR::PLG_LDR::GetPluginFBAddr())
CheckRegion(PLUGIN_3GX_FB_VADDR, PLUGIN_3GX_FB_VADDR_END,
Service::PLGLDR::PLG_LDR::GetPluginFBAddr());
}
void MemorySystem::MapPages(PageTable& page_table, u32 base, u32 size, MemoryRef memory,
PageType type) {
LOG_DEBUG(HW_Memory, "Mapping {} onto {:08X}-{:08X}", (void*)memory.GetPtr(),
base * CITRA_PAGE_SIZE, (base + size) * CITRA_PAGE_SIZE);
RasterizerFlushVirtualRegion(base << CITRA_PAGE_BITS, size * CITRA_PAGE_SIZE,
FlushMode::FlushAndInvalidate);
if (impl->system.IsPoweredOn()) {
RasterizerFlushVirtualRegion(base << CITRA_PAGE_BITS, size * CITRA_PAGE_SIZE,
FlushMode::FlushAndInvalidate);
}
u32 end = base + size;
while (base != end) {
@ -421,9 +459,8 @@ T MemorySystem::Read(const VAddr vaddr) {
return value;
} else if ((paddr & 0xF0000000) == 0x10000000 &&
paddr >= Memory::IO_AREA_PADDR) { // Check MMIO region
T ret;
HW::Read<T>(ret, static_cast<VAddr>(paddr) - Memory::IO_AREA_PADDR + 0x1EC00000);
return ret;
return impl->system.GPU().ReadReg(static_cast<VAddr>(paddr) - Memory::IO_AREA_PADDR +
0x1EC00000);
}
}
@ -468,7 +505,10 @@ void MemorySystem::Write(const VAddr vaddr, const T data) {
return;
} else if ((paddr & 0xF0000000) == 0x10000000 &&
paddr >= Memory::IO_AREA_PADDR) { // Check MMIO region
HW::Write<T>(static_cast<VAddr>(paddr) - Memory::IO_AREA_PADDR + 0x1EC00000, data);
ASSERT(sizeof(data) == sizeof(u32));
impl->system.GPU().WriteReg(static_cast<VAddr>(paddr) - Memory::IO_AREA_PADDR +
0x1EC00000,
static_cast<u32>(data));
return;
}
}
@ -713,84 +753,6 @@ void MemorySystem::RasterizerMarkRegionCached(PAddr start, u32 size, bool cached
}
}
void RasterizerFlushRegion(PAddr start, u32 size) {
if (VideoCore::g_renderer == nullptr) {
return;
}
VideoCore::g_renderer->Rasterizer()->FlushRegion(start, size);
}
void RasterizerInvalidateRegion(PAddr start, u32 size) {
if (VideoCore::g_renderer == nullptr) {
return;
}
VideoCore::g_renderer->Rasterizer()->InvalidateRegion(start, size);
}
void RasterizerFlushAndInvalidateRegion(PAddr start, u32 size) {
// Since pages are unmapped on shutdown after video core is shutdown, the renderer may be
// null here
if (VideoCore::g_renderer == nullptr) {
return;
}
VideoCore::g_renderer->Rasterizer()->FlushAndInvalidateRegion(start, size);
}
void RasterizerClearAll(bool flush) {
// Since pages are unmapped on shutdown after video core is shutdown, the renderer may be
// null here
if (VideoCore::g_renderer == nullptr) {
return;
}
VideoCore::g_renderer->Rasterizer()->ClearAll(flush);
}
void RasterizerFlushVirtualRegion(VAddr start, u32 size, FlushMode mode) {
// Since pages are unmapped on shutdown after video core is shutdown, the renderer may be
// null here
if (VideoCore::g_renderer == nullptr) {
return;
}
VAddr end = start + size;
auto CheckRegion = [&](VAddr region_start, VAddr region_end, PAddr paddr_region_start) {
if (start >= region_end || end <= region_start) {
// No overlap with region
return;
}
VAddr overlap_start = std::max(start, region_start);
VAddr overlap_end = std::min(end, region_end);
PAddr physical_start = paddr_region_start + (overlap_start - region_start);
u32 overlap_size = overlap_end - overlap_start;
auto* rasterizer = VideoCore::g_renderer->Rasterizer();
switch (mode) {
case FlushMode::Flush:
rasterizer->FlushRegion(physical_start, overlap_size);
break;
case FlushMode::Invalidate:
rasterizer->InvalidateRegion(physical_start, overlap_size);
break;
case FlushMode::FlushAndInvalidate:
rasterizer->FlushAndInvalidateRegion(physical_start, overlap_size);
break;
}
};
CheckRegion(LINEAR_HEAP_VADDR, LINEAR_HEAP_VADDR_END, FCRAM_PADDR);
CheckRegion(NEW_LINEAR_HEAP_VADDR, NEW_LINEAR_HEAP_VADDR_END, FCRAM_PADDR);
CheckRegion(VRAM_VADDR, VRAM_VADDR_END, VRAM_PADDR);
if (Service::PLGLDR::PLG_LDR::GetPluginFBAddr())
CheckRegion(PLUGIN_3GX_FB_VADDR, PLUGIN_3GX_FB_VADDR_END,
Service::PLGLDR::PLG_LDR::GetPluginFBAddr());
}
u8 MemorySystem::Read8(const VAddr addr) {
return Read<u8>(addr);
}

25
src/core/memory.h
View File

@ -226,21 +226,6 @@ enum : VAddr {
PLUGIN_3GX_FB_VADDR_END = PLUGIN_3GX_FB_VADDR + PLUGIN_3GX_FB_SIZE
};
/**
* Flushes any externally cached rasterizer resources touching the given region.
*/
void RasterizerFlushRegion(PAddr start, u32 size);
/**
* Invalidates any externally cached rasterizer resources touching the given region.
*/
void RasterizerInvalidateRegion(PAddr start, u32 size);
/**
* Flushes and invalidates any externally cached rasterizer resources touching the given region.
*/
void RasterizerFlushAndInvalidateRegion(PAddr start, u32 size);
enum class FlushMode {
/// Write back modified surfaces to RAM
Flush,
@ -250,16 +235,6 @@ enum class FlushMode {
FlushAndInvalidate,
};
/**
* Flushes and invalidates all memory in the rasterizer cache and removes any leftover state
* If flush is true, the rasterizer should flush any cached resources to RAM before clearing
*/
void RasterizerClearAll(bool flush);
/**
* Flushes and invalidates any externally cached rasterizer resources touching the given virtual
* address region.
*/
void RasterizerFlushVirtualRegion(VAddr start, u32 size, FlushMode mode);
class MemorySystem {

5
src/core/movie.cpp
View File

@ -21,7 +21,6 @@
#include "core/hle/service/hid/hid.h"
#include "core/hle/service/ir/extra_hid.h"
#include "core/hle/service/ir/ir_rst.h"
#include "core/hw/gpu.h"
#include "core/loader/loader.h"
#include "core/movie.h"
@ -218,10 +217,10 @@ Movie::PlayMode Movie::GetPlayMode() const {
}
u64 Movie::GetCurrentInputIndex() const {
return static_cast<u64>(std::nearbyint(current_input / 234.0 * GPU::SCREEN_REFRESH_RATE));
return static_cast<u64>(std::nearbyint(current_input / 234.0 * SCREEN_REFRESH_RATE));
}
u64 Movie::GetTotalInputCount() const {
return static_cast<u64>(std::nearbyint(total_input / 234.0 * GPU::SCREEN_REFRESH_RATE));
return static_cast<u64>(std::nearbyint(total_input / 234.0 * SCREEN_REFRESH_RATE));
}
void Movie::CheckInputEnd() {

5
src/core/perf_stats.cpp
View File

@ -13,8 +13,9 @@
#include <fmt/format.h>
#include "common/file_util.h"
#include "common/settings.h"
#include "core/hw/gpu.h"
#include "core/core_timing.h"
#include "core/perf_stats.h"
#include "video_core/gpu.h"
using namespace std::chrono_literals;
using DoubleSecs = std::chrono::duration<double, std::chrono::seconds::period>;
@ -120,7 +121,7 @@ PerfStats::Results PerfStats::GetLastStats() {
double PerfStats::GetLastFrameTimeScale() const {
std::scoped_lock lock{object_mutex};
constexpr double FRAME_LENGTH = 1.0 / GPU::SCREEN_REFRESH_RATE;
constexpr double FRAME_LENGTH = 1.0 / SCREEN_REFRESH_RATE;
return duration_cast<DoubleSecs>(previous_frame_length).count() / FRAME_LENGTH;
}

11
src/core/tracer/citrace.h
View File

@ -75,16 +75,7 @@ struct CTMemoryLoad {
struct CTRegisterWrite {
u32 physical_address;
enum : u32 {
SIZE_8 = 0xD1,
SIZE_16 = 0xD2,
SIZE_32 = 0xD3,
SIZE_64 = 0xD4,
} size;
// TODO: Make it clearer which bits of this member are used for sizes other than 32 bits
u64 value;
u32 value;
};
struct CTStreamElement {

29
src/core/tracer/recorder.cpp
View File

@ -22,9 +22,8 @@ void Recorder::Finish(const std::string& filename) {
// Calculate file offsets
auto& initial = header.initial_state_offsets;
initial.gpu_registers_size = static_cast<u32>(initial_state.gpu_registers.size());
initial.lcd_registers_size = static_cast<u32>(initial_state.lcd_registers.size());
initial.pica_registers_size = static_cast<u32>(initial_state.pica_registers.size());
initial.lcd_registers_size = static_cast<u32>(initial_state.lcd_registers.size());
initial.default_attributes_size = static_cast<u32>(initial_state.default_attributes.size());
initial.vs_program_binary_size = static_cast<u32>(initial_state.vs_program_binary.size());
initial.vs_swizzle_data_size = static_cast<u32>(initial_state.vs_swizzle_data.size());
@ -81,22 +80,17 @@ void Recorder::Finish(const std::string& filename) {
throw "Failed to write header";
// Write initial state
written =
file.WriteArray(initial_state.gpu_registers.data(), initial_state.gpu_registers.size());
if (written != initial_state.gpu_registers.size() || file.Tell() != initial.lcd_registers)
throw "Failed to write GPU registers";
written =
file.WriteArray(initial_state.lcd_registers.data(), initial_state.lcd_registers.size());
if (written != initial_state.lcd_registers.size() || file.Tell() != initial.pica_registers)
throw "Failed to write LCD registers";
written = file.WriteArray(initial_state.pica_registers.data(),
initial_state.pica_registers.size());
if (written != initial_state.pica_registers.size() ||
file.Tell() != initial.default_attributes)
throw "Failed to write Pica registers";
written =
file.WriteArray(initial_state.lcd_registers.data(), initial_state.lcd_registers.size());
if (written != initial_state.lcd_registers.size() || file.Tell() != initial.pica_registers)
throw "Failed to write LCD registers";
written = file.WriteArray(initial_state.default_attributes.data(),
initial_state.default_attributes.size());
if (written != initial_state.default_attributes.size() ||
@ -187,21 +181,12 @@ void Recorder::MemoryAccessed(const u8* data, u32 size, u32 physical_address) {
stream.push_back(element);
}
template <typename T>
void Recorder::RegisterWritten(u32 physical_address, T value) {
void Recorder::RegisterWritten(u32 physical_address, u32 value) {
StreamElement element = {{RegisterWrite}};
element.data.register_write.size = (sizeof(T) == 1) ? CTRegisterWrite::SIZE_8
: (sizeof(T) == 2) ? CTRegisterWrite::SIZE_16
: (sizeof(T) == 4) ? CTRegisterWrite::SIZE_32
: CTRegisterWrite::SIZE_64;
element.data.register_write.physical_address = physical_address;
element.data.register_write.value = value;
stream.push_back(element);
}
template void Recorder::RegisterWritten(u32, u8);
template void Recorder::RegisterWritten(u32, u16);
template void Recorder::RegisterWritten(u32, u32);
template void Recorder::RegisterWritten(u32, u64);
} // namespace CiTrace

5
src/core/tracer/recorder.h
View File

@ -4,7 +4,6 @@
#pragma once
#include <span>
#include <string>
#include <unordered_map>
#include <vector>
@ -17,7 +16,6 @@ namespace CiTrace {
class Recorder {
public:
struct InitialState {
std::vector<u32> gpu_registers;
std::vector<u32> lcd_registers;
std::vector<u32> pica_registers;
std::vector<u32> default_attributes;
@ -52,8 +50,7 @@ public:
* Record a register write.
* @note Use this whenever a GPU-related MMIO register has been written to.
*/
template <typename T>
void RegisterWritten(u32 physical_address, T value);
void RegisterWritten(u32 physical_address, u32 value);
private:
// Initial state of recording start

57
src/tests/video_core/shader/shader_jit_compiler.cpp
View File

@ -13,6 +13,8 @@
#include <catch2/catch_test_macros.hpp>
#include <fmt/format.h>
#include <nihstro/inline_assembly.h>
#include "video_core/pica/shader_setup.h"
#include "video_core/pica/shader_unit.h"
#include "video_core/shader/shader_interpreter.h"
#if CITRA_ARCH(x86_64)
#include "video_core/shader/shader_jit_x64_compiler.h"
@ -54,11 +56,11 @@ struct StringMaker<Common::Vec4f> {
};
} // namespace Catch
static std::unique_ptr<Pica::Shader::ShaderSetup> CompileShaderSetup(
static std::unique_ptr<Pica::ShaderSetup> CompileShaderSetup(
std::initializer_list<nihstro::InlineAsm> code) {
const auto shbin = nihstro::InlineAsm::CompileToRawBinary(code);
auto shader = std::make_unique<Pica::Shader::ShaderSetup>();
auto shader = std::make_unique<Pica::ShaderSetup>();
std::transform(shbin.program.begin(), shbin.program.end(), shader->program_code.begin(),
[](const auto& x) { return x.hex; });
@ -75,18 +77,16 @@ public:
shader_jit.Compile(&shader_setup->program_code, &shader_setup->swizzle_data);
}
explicit ShaderTest(std::unique_ptr<Pica::Shader::ShaderSetup> input_shader_setup)
explicit ShaderTest(std::unique_ptr<Pica::ShaderSetup> input_shader_setup)
: shader_setup(std::move(input_shader_setup)) {
shader_jit.Compile(&shader_setup->program_code, &shader_setup->swizzle_data);
}
Common::Vec4f Run(std::span<const Common::Vec4f> inputs) {
Pica::Shader::UnitState shader_unit;
Pica::ShaderUnit shader_unit;
RunJit(shader_unit, inputs);
return {shader_unit.registers.output[0].x.ToFloat32(),
shader_unit.registers.output[0].y.ToFloat32(),
shader_unit.registers.output[0].z.ToFloat32(),
shader_unit.registers.output[0].w.ToFloat32()};
return {shader_unit.output[0].x.ToFloat32(), shader_unit.output[0].y.ToFloat32(),
shader_unit.output[0].z.ToFloat32(), shader_unit.output[0].w.ToFloat32()};
}
Common::Vec4f Run(std::initializer_list<float> inputs) {
@ -105,39 +105,36 @@ public:
return Run(std::vector<Common::Vec4f>{inputs});
}
void RunJit(Pica::Shader::UnitState& shader_unit, std::span<const Common::Vec4f> inputs) {
void RunJit(Pica::ShaderUnit& shader_unit, std::span<const Common::Vec4f> inputs) {
for (std::size_t i = 0; i < inputs.size(); ++i) {
const Common::Vec4f& input = inputs[i];
shader_unit.registers.input[i].x = Pica::f24::FromFloat32(input.x);
shader_unit.registers.input[i].y = Pica::f24::FromFloat32(input.y);
shader_unit.registers.input[i].z = Pica::f24::FromFloat32(input.z);
shader_unit.registers.input[i].w = Pica::f24::FromFloat32(input.w);
shader_unit.input[i].x = Pica::f24::FromFloat32(input.x);
shader_unit.input[i].y = Pica::f24::FromFloat32(input.y);
shader_unit.input[i].z = Pica::f24::FromFloat32(input.z);
shader_unit.input[i].w = Pica::f24::FromFloat32(input.w);
}
shader_unit.registers.temporary.fill(
Common::Vec4<Pica::f24>::AssignToAll(Pica::f24::Zero()));
shader_unit.temporary.fill(Common::Vec4<Pica::f24>::AssignToAll(Pica::f24::Zero()));
shader_jit.Run(*shader_setup, shader_unit, 0);
}
void RunJit(Pica::Shader::UnitState& shader_unit, float input) {
void RunJit(Pica::ShaderUnit& shader_unit, float input) {
const Common::Vec4f input_vec(input, 0, 0, 0);
RunJit(shader_unit, {&input_vec, 1});
}
void RunInterpreter(Pica::Shader::UnitState& shader_unit,
std::span<const Common::Vec4f> inputs) {
void RunInterpreter(Pica::ShaderUnit& shader_unit, std::span<const Common::Vec4f> inputs) {
for (std::size_t i = 0; i < inputs.size(); ++i) {
const Common::Vec4f& input = inputs[i];
shader_unit.registers.input[i].x = Pica::f24::FromFloat32(input.x);
shader_unit.registers.input[i].y = Pica::f24::FromFloat32(input.y);
shader_unit.registers.input[i].z = Pica::f24::FromFloat32(input.z);
shader_unit.registers.input[i].w = Pica::f24::FromFloat32(input.w);
shader_unit.input[i].x = Pica::f24::FromFloat32(input.x);
shader_unit.input[i].y = Pica::f24::FromFloat32(input.y);
shader_unit.input[i].z = Pica::f24::FromFloat32(input.z);
shader_unit.input[i].w = Pica::f24::FromFloat32(input.w);
}
shader_unit.registers.temporary.fill(
Common::Vec4<Pica::f24>::AssignToAll(Pica::f24::Zero()));
shader_unit.temporary.fill(Common::Vec4<Pica::f24>::AssignToAll(Pica::f24::Zero()));
shader_interpreter.Run(*shader_setup, shader_unit);
}
void RunInterpreter(Pica::Shader::UnitState& shader_unit, float input) {
void RunInterpreter(Pica::ShaderUnit& shader_unit, float input) {
const Common::Vec4f input_vec(input, 0, 0, 0);
RunInterpreter(shader_unit, {&input_vec, 1});
}
@ -145,7 +142,7 @@ public:
public:
JitShader shader_jit;
ShaderInterpreter shader_interpreter;
std::unique_ptr<Pica::Shader::ShaderSetup> shader_setup;
std::unique_ptr<Pica::ShaderSetup> shader_setup;
};
TEST_CASE("ADD", "[video_core][shader][shader_jit]") {
@ -642,11 +639,11 @@ TEST_CASE("Nested Loop", "[video_core][shader][shader_jit]") {
input) +
input;
Pica::Shader::UnitState shader_unit_jit;
Pica::ShaderUnit shader_unit_jit;
shader_test.RunJit(shader_unit_jit, input);
REQUIRE(shader_unit_jit.address_registers[2] == expected_aL);
REQUIRE(shader_unit_jit.registers.output[0].x.ToFloat32() == Catch::Approx(expected_out));
REQUIRE(shader_unit_jit.output[0].x.ToFloat32() == Catch::Approx(expected_out));
}
{
shader_test.shader_setup->uniforms.i[0] = {9, 0, 2, 0};
@ -659,11 +656,11 @@ TEST_CASE("Nested Loop", "[video_core][shader][shader_jit]") {
(shader_test.shader_setup->uniforms.i[1][0] + 1)) *
input) +
input;
Pica::Shader::UnitState shader_unit_jit;
Pica::ShaderUnit shader_unit_jit;
shader_test.RunJit(shader_unit_jit, input);
REQUIRE(shader_unit_jit.address_registers[2] == expected_aL);
REQUIRE(shader_unit_jit.registers.output[0].x.ToFloat32() == Catch::Approx(expected_out));
REQUIRE(shader_unit_jit.output[0].x.ToFloat32() == Catch::Approx(expected_out));
}
}

48
src/video_core/CMakeLists.txt
View File

@ -1,8 +1,6 @@
add_subdirectory(host_shaders)
add_library(video_core STATIC
command_processor.cpp
command_processor.h
custom_textures/custom_format.cpp
custom_textures/custom_format.h
custom_textures/custom_tex_manager.cpp
@ -11,29 +9,41 @@ add_library(video_core STATIC
custom_textures/material.h
debug_utils/debug_utils.cpp
debug_utils/debug_utils.h
geometry_pipeline.cpp
geometry_pipeline.h
gpu.cpp
gpu.h
gpu_debugger.h
pica.cpp
pica.h
pica_state.h
pica_types.h
precompiled_headers.h
primitive_assembly.cpp
primitive_assembly.h
rasterizer_accelerated.cpp
rasterizer_accelerated.h
rasterizer_interface.h
regs.cpp
regs.h
regs_framebuffer.h
regs_lighting.h
regs_pipeline.h
regs_rasterizer.h
regs_shader.h
regs_texturing.h
renderer_base.cpp
renderer_base.h
pica/geometry_pipeline.cpp
pica/geometry_pipeline.h
pica/pica_core.cpp
pica/pica_core.h
pica/output_vertex.cpp
pica/output_vertex.h
pica/primitive_assembly.cpp
pica/primitive_assembly.h
pica/regs_external.h
pica/regs_framebuffer.h
pica/regs_internal.cpp
pica/regs_internal.h
pica/regs_lcd.h
pica/regs_lighting.h
pica/regs_pipeline.h
pica/regs_rasterizer.h
pica/regs_shader.h
pica/regs_texturing.h
pica/shader_setup.cpp
pica/shader_setup.h
pica/shader_unit.cpp
pica/shader_unit.h
pica/packed_attribute.h
pica/vertex_loader.cpp
pica/vertex_loader.h
rasterizer_cache/framebuffer_base.h
rasterizer_cache/pixel_format.cpp
rasterizer_cache/pixel_format.h
@ -84,6 +94,8 @@ add_library(video_core STATIC
renderer_opengl/renderer_opengl.h
renderer_software/renderer_software.cpp
renderer_software/renderer_software.h
renderer_software/sw_blitter.cpp
renderer_software/sw_blitter.h
renderer_software/sw_clipper.cpp
renderer_software/sw_clipper.h
renderer_software/sw_framebuffer.cpp
@ -167,8 +179,6 @@ add_library(video_core STATIC
texture/texture_decode.cpp
texture/texture_decode.h
utils.h
vertex_loader.cpp
vertex_loader.h
video_core.cpp
video_core.h
)

677
src/video_core/command_processor.cpp
View File

@ -1,677 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <array>
#include <cstddef>
#include <cstring>
#include <memory>
#include <utility>
#include "common/assert.h"
#include "common/logging/log.h"
#include "common/microprofile.h"
#include "common/vector_math.h"
#include "core/hle/service/gsp/gsp.h"
#include "core/hw/gpu.h"
#include "core/memory.h"
#include "core/tracer/recorder.h"
#include "video_core/command_processor.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/pica_state.h"
#include "video_core/pica_types.h"
#include "video_core/primitive_assembly.h"
#include "video_core/rasterizer_interface.h"
#include "video_core/regs.h"
#include "video_core/regs_pipeline.h"
#include "video_core/regs_texturing.h"
#include "video_core/renderer_base.h"
#include "video_core/shader/shader.h"
#include "video_core/vertex_loader.h"
#include "video_core/video_core.h"
namespace Pica::CommandProcessor {
// Expand a 4-bit mask to 4-byte mask, e.g. 0b0101 -> 0x00FF00FF
constexpr std::array<u32, 16> expand_bits_to_bytes{
0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff,
0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff,
};
MICROPROFILE_DEFINE(GPU_Drawing, "GPU", "Drawing", MP_RGB(50, 50, 240));
static const char* GetShaderSetupTypeName(Shader::ShaderSetup& setup) {
if (&setup == &g_state.vs) {
return "vertex shader";
}
if (&setup == &g_state.gs) {
return "geometry shader";
}
return "unknown shader";
}
static void WriteUniformBoolReg(Shader::ShaderSetup& setup, u32 value) {
for (unsigned i = 0; i < setup.uniforms.b.size(); ++i)
setup.uniforms.b[i] = (value & (1 << i)) != 0;
}
static void WriteUniformIntReg(Shader::ShaderSetup& setup, unsigned index,
const Common::Vec4<u8>& values) {
ASSERT(index < setup.uniforms.i.size());
setup.uniforms.i[index] = values;
LOG_TRACE(HW_GPU, "Set {} integer uniform {} to {:02x} {:02x} {:02x} {:02x}",
GetShaderSetupTypeName(setup), index, values.x, values.y, values.z, values.w);
}
static void WriteUniformFloatReg(ShaderRegs& config, Shader::ShaderSetup& setup,
int& float_regs_counter, std::array<u32, 4>& uniform_write_buffer,
u32 value) {
auto& uniform_setup = config.uniform_setup;
// TODO: Does actual hardware indeed keep an intermediate buffer or does
// it directly write the values?
uniform_write_buffer[float_regs_counter++] = value;
// Uniforms are written in a packed format such that four float24 values are encoded in
// three 32-bit numbers. We write to internal memory once a full such vector is
// written.
if ((float_regs_counter >= 4 && uniform_setup.IsFloat32()) ||
(float_regs_counter >= 3 && !uniform_setup.IsFloat32())) {
float_regs_counter = 0;
if (uniform_setup.index >= setup.uniforms.f.size()) {
LOG_ERROR(HW_GPU, "Invalid {} float uniform index {}", GetShaderSetupTypeName(setup),
(int)uniform_setup.index);
} else {
auto& uniform = setup.uniforms.f[uniform_setup.index];
// NOTE: The destination component order indeed is "backwards"
if (uniform_setup.IsFloat32()) {
for (auto i : {0, 1, 2, 3}) {
float buffer_value;
std::memcpy(&buffer_value, &uniform_write_buffer[i], sizeof(float));
uniform[3 - i] = f24::FromFloat32(buffer_value);
}
} else {
// TODO: Untested
uniform.w = f24::FromRaw(uniform_write_buffer[0] >> 8);
uniform.z = f24::FromRaw(((uniform_write_buffer[0] & 0xFF) << 16) |
((uniform_write_buffer[1] >> 16) & 0xFFFF));
uniform.y = f24::FromRaw(((uniform_write_buffer[1] & 0xFFFF) << 8) |
((uniform_write_buffer[2] >> 24) & 0xFF));
uniform.x = f24::FromRaw(uniform_write_buffer[2] & 0xFFFFFF);
}
LOG_TRACE(HW_GPU, "Set {} float uniform {:x} to ({} {} {} {})",
GetShaderSetupTypeName(setup), (int)uniform_setup.index,
uniform.x.ToFloat32(), uniform.y.ToFloat32(), uniform.z.ToFloat32(),
uniform.w.ToFloat32());
// TODO: Verify that this actually modifies the register!
uniform_setup.index.Assign(uniform_setup.index + 1);
}
}
}
static void WritePicaReg(u32 id, u32 value, u32 mask) {
auto& regs = g_state.regs;
if (id >= Regs::NUM_REGS) {
LOG_ERROR(
HW_GPU,
"Commandlist tried to write to invalid register 0x{:03X} (value: {:08X}, mask: {:X})",
id, value, mask);
return;
}
// TODO: Figure out how register masking acts on e.g. vs.uniform_setup.set_value
u32 old_value = regs.reg_array[id];
const u32 write_mask = expand_bits_to_bytes[mask];
regs.reg_array[id] = (old_value & ~write_mask) | (value & write_mask);
// Double check for is_pica_tracing to avoid call overhead
if (DebugUtils::IsPicaTracing()) {
DebugUtils::OnPicaRegWrite({(u16)id, (u16)mask, regs.reg_array[id]});
}
if (g_debug_context)
g_debug_context->OnEvent(DebugContext::Event::PicaCommandLoaded,
reinterpret_cast<void*>(&id));
switch (id) {
// Trigger IRQ
case PICA_REG_INDEX(trigger_irq):
Service::GSP::SignalInterrupt(Service::GSP::InterruptId::P3D);
break;
case PICA_REG_INDEX(pipeline.triangle_topology):
g_state.primitive_assembler.Reconfigure(regs.pipeline.triangle_topology);
break;
case PICA_REG_INDEX(pipeline.restart_primitive):
g_state.primitive_assembler.Reset();
break;
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.index):
g_state.immediate.current_attribute = 0;
g_state.immediate.reset_geometry_pipeline = true;
g_state.default_attr_counter = 0;
break;
// Load default vertex input attributes
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[0]):
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[1]):
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[2]): {
// TODO: Does actual hardware indeed keep an intermediate buffer or does
// it directly write the values?
g_state.default_attr_write_buffer[g_state.default_attr_counter++] = value;
// Default attributes are written in a packed format such that four float24 values are
// encoded in
// three 32-bit numbers. We write to internal memory once a full such vector is
// written.
if (g_state.default_attr_counter >= 3) {
g_state.default_attr_counter = 0;
auto& setup = regs.pipeline.vs_default_attributes_setup;
if (setup.index >= 16) {
LOG_ERROR(HW_GPU, "Invalid VS default attribute index {}", (int)setup.index);
break;
}
Common::Vec4<f24> attribute;
// NOTE: The destination component order indeed is "backwards"
attribute.w = f24::FromRaw(g_state.default_attr_write_buffer[0] >> 8);
attribute.z = f24::FromRaw(((g_state.default_attr_write_buffer[0] & 0xFF) << 16) |
((g_state.default_attr_write_buffer[1] >> 16) & 0xFFFF));
attribute.y = f24::FromRaw(((g_state.default_attr_write_buffer[1] & 0xFFFF) << 8) |
((g_state.default_attr_write_buffer[2] >> 24) & 0xFF));
attribute.x = f24::FromRaw(g_state.default_attr_write_buffer[2] & 0xFFFFFF);
LOG_TRACE(HW_GPU, "Set default VS attribute {:x} to ({} {} {} {})", (int)setup.index,
attribute.x.ToFloat32(), attribute.y.ToFloat32(), attribute.z.ToFloat32(),
attribute.w.ToFloat32());
// TODO: Verify that this actually modifies the register!
if (setup.index < 15) {
g_state.input_default_attributes.attr[setup.index] = attribute;
setup.index++;
} else {
// Put each attribute into an immediate input buffer. When all specified immediate
// attributes are present, the Vertex Shader is invoked and everything is sent to
// the primitive assembler.
auto& immediate_input = g_state.immediate.input_vertex;
auto& immediate_attribute_id = g_state.immediate.current_attribute;
immediate_input.attr[immediate_attribute_id] = attribute;
if (immediate_attribute_id < regs.pipeline.max_input_attrib_index) {
immediate_attribute_id += 1;
} else {
MICROPROFILE_SCOPE(GPU_Drawing);
immediate_attribute_id = 0;
Shader::OutputVertex::ValidateSemantics(regs.rasterizer);
auto* shader_engine = Shader::GetEngine();
shader_engine->SetupBatch(g_state.vs, regs.vs.main_offset);
// Send to vertex shader
if (g_debug_context)
g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
static_cast<void*>(&immediate_input));
Shader::UnitState shader_unit;
Shader::AttributeBuffer output{};
shader_unit.LoadInput(regs.vs, immediate_input);
shader_engine->Run(g_state.vs, shader_unit);
shader_unit.WriteOutput(regs.vs, output);
// Send to geometry pipeline
if (g_state.immediate.reset_geometry_pipeline) {
g_state.geometry_pipeline.Reconfigure();
g_state.immediate.reset_geometry_pipeline = false;
}
ASSERT(!g_state.geometry_pipeline.NeedIndexInput());
g_state.geometry_pipeline.Setup(shader_engine);
g_state.geometry_pipeline.SubmitVertex(output);
// TODO: If drawing after every immediate mode triangle kills performance,
// change it to flush triangles whenever a drawing config register changes
// See: https://github.com/citra-emu/citra/pull/2866#issuecomment-327011550
VideoCore::g_renderer->Rasterizer()->DrawTriangles();
if (g_debug_context) {
g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch,
nullptr);
}
}
}
}
break;
}
case PICA_REG_INDEX(pipeline.gpu_mode):
// This register likely just enables vertex processing and doesn't need any special handling
break;
case PICA_REG_INDEX(pipeline.command_buffer.trigger[0]):
case PICA_REG_INDEX(pipeline.command_buffer.trigger[1]): {
unsigned index =
static_cast<unsigned>(id - PICA_REG_INDEX(pipeline.command_buffer.trigger[0]));
u32* head_ptr = (u32*)VideoCore::g_memory->GetPhysicalPointer(
regs.pipeline.command_buffer.GetPhysicalAddress(index));
g_state.cmd_list.head_ptr = g_state.cmd_list.current_ptr = head_ptr;
g_state.cmd_list.length = regs.pipeline.command_buffer.GetSize(index) / sizeof(u32);
break;
}
// It seems like these trigger vertex rendering
case PICA_REG_INDEX(pipeline.trigger_draw):
case PICA_REG_INDEX(pipeline.trigger_draw_indexed): {
MICROPROFILE_SCOPE(GPU_Drawing);
#if PICA_LOG_TEV
DebugUtils::DumpTevStageConfig(regs.GetTevStages());
#endif
if (g_debug_context)
g_debug_context->OnEvent(DebugContext::Event::IncomingPrimitiveBatch, nullptr);
PrimitiveAssembler<Shader::OutputVertex>& primitive_assembler = g_state.primitive_assembler;
bool accelerate_draw = VideoCore::g_hw_shader_enabled && primitive_assembler.IsEmpty();
if (regs.pipeline.use_gs == PipelineRegs::UseGS::No) {
auto topology = primitive_assembler.GetTopology();
if (topology == PipelineRegs::TriangleTopology::Shader ||
topology == PipelineRegs::TriangleTopology::List) {
accelerate_draw = accelerate_draw && (regs.pipeline.num_vertices % 3) == 0;
}
// TODO (wwylele): for Strip/Fan topology, if the primitive assember is not restarted
// after this draw call, the buffered vertex from this draw should "leak" to the next
// draw, in which case we should buffer the vertex into the software primitive assember,
// or disable accelerate draw completely. However, there is not game found yet that does
// this, so this is left unimplemented for now. Revisit this when an issue is found in
// games.
} else {
accelerate_draw = false;
}
bool is_indexed = (id == PICA_REG_INDEX(pipeline.trigger_draw_indexed));
if (accelerate_draw &&
VideoCore::g_renderer->Rasterizer()->AccelerateDrawBatch(is_indexed)) {
if (g_debug_context) {
g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
}
break;
}
// Processes information about internal vertex attributes to figure out how a vertex is
// loaded.
// Later, these can be compiled and cached.
const u32 base_address = regs.pipeline.vertex_attributes.GetPhysicalBaseAddress();
VertexLoader loader(regs.pipeline);
Shader::OutputVertex::ValidateSemantics(regs.rasterizer);
// Load vertices
const auto& index_info = regs.pipeline.index_array;
const u8* index_address_8 =
VideoCore::g_memory->GetPhysicalPointer(base_address + index_info.offset);
const u16* index_address_16 = reinterpret_cast<const u16*>(index_address_8);
bool index_u16 = index_info.format != 0;
if (g_debug_context && g_debug_context->recorder) {
for (int i = 0; i < 3; ++i) {
const auto texture = regs.texturing.GetTextures()[i];
if (!texture.enabled)
continue;
u8* texture_data =
VideoCore::g_memory->GetPhysicalPointer(texture.config.GetPhysicalAddress());
g_debug_context->recorder->MemoryAccessed(
texture_data,
Pica::TexturingRegs::NibblesPerPixel(texture.format) * texture.config.width /
2 * texture.config.height,
texture.config.GetPhysicalAddress());
}
}
DebugUtils::MemoryAccessTracker memory_accesses;
// Simple circular-replacement vertex cache
// The size has been tuned for optimal balance between hit-rate and the cost of lookup
const std::size_t VERTEX_CACHE_SIZE = 32;
std::array<bool, VERTEX_CACHE_SIZE> vertex_cache_valid{};
std::array<u16, VERTEX_CACHE_SIZE> vertex_cache_ids;
std::array<Shader::AttributeBuffer, VERTEX_CACHE_SIZE> vertex_cache;
Shader::AttributeBuffer vs_output;
unsigned int vertex_cache_pos = 0;
auto* shader_engine = Shader::GetEngine();
Shader::UnitState shader_unit;
shader_engine->SetupBatch(g_state.vs, regs.vs.main_offset);
g_state.geometry_pipeline.Reconfigure();
g_state.geometry_pipeline.Setup(shader_engine);
if (g_state.geometry_pipeline.NeedIndexInput())
ASSERT(is_indexed);
for (unsigned int index = 0; index < regs.pipeline.num_vertices; ++index) {
// Indexed rendering doesn't use the start offset
unsigned int vertex =
is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index])
: (index + regs.pipeline.vertex_offset);
bool vertex_cache_hit = false;
if (is_indexed) {
if (g_state.geometry_pipeline.NeedIndexInput()) {
g_state.geometry_pipeline.SubmitIndex(vertex);
continue;
}
if (g_debug_context && Pica::g_debug_context->recorder) {
int size = index_u16 ? 2 : 1;
memory_accesses.AddAccess(base_address + index_info.offset + size * index,
size);
}
for (unsigned int i = 0; i < VERTEX_CACHE_SIZE; ++i) {
if (vertex_cache_valid[i] && vertex == vertex_cache_ids[i]) {
vs_output = vertex_cache[i];
vertex_cache_hit = true;
break;
}
}
}
if (!vertex_cache_hit) {
// Initialize data for the current vertex
Shader::AttributeBuffer input;
loader.LoadVertex(base_address, index, vertex, input, memory_accesses);
// Send to vertex shader
if (g_debug_context)
g_debug_context->OnEvent(DebugContext::Event::VertexShaderInvocation,
(void*)&input);
shader_unit.LoadInput(regs.vs, input);
shader_engine->Run(g_state.vs, shader_unit);
shader_unit.WriteOutput(regs.vs, vs_output);
if (is_indexed) {
vertex_cache[vertex_cache_pos] = vs_output;
vertex_cache_valid[vertex_cache_pos] = true;
vertex_cache_ids[vertex_cache_pos] = vertex;
vertex_cache_pos = (vertex_cache_pos + 1) % VERTEX_CACHE_SIZE;
}
}
// Send to geometry pipeline
g_state.geometry_pipeline.SubmitVertex(vs_output);
}
for (auto& range : memory_accesses.ranges) {
g_debug_context->recorder->MemoryAccessed(
VideoCore::g_memory->GetPhysicalPointer(range.first), range.second, range.first);
}
VideoCore::g_renderer->Rasterizer()->DrawTriangles();
if (g_debug_context) {
g_debug_context->OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr);
}
break;
}
case PICA_REG_INDEX(gs.bool_uniforms):
WriteUniformBoolReg(g_state.gs, g_state.regs.gs.bool_uniforms.Value());
break;
case PICA_REG_INDEX(gs.int_uniforms[0]):
case PICA_REG_INDEX(gs.int_uniforms[1]):
case PICA_REG_INDEX(gs.int_uniforms[2]):
case PICA_REG_INDEX(gs.int_uniforms[3]): {
unsigned index = (id - PICA_REG_INDEX(gs.int_uniforms[0]));
auto values = regs.gs.int_uniforms[index];
WriteUniformIntReg(g_state.gs, index,
Common::Vec4<u8>(values.x, values.y, values.z, values.w));
break;
}
case PICA_REG_INDEX(gs.uniform_setup.set_value[0]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[1]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[2]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[3]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[4]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[5]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[6]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[7]): {
WriteUniformFloatReg(g_state.regs.gs, g_state.gs, g_state.gs_float_regs_counter,
g_state.gs_uniform_write_buffer, value);
break;
}
case PICA_REG_INDEX(gs.program.set_word[0]):
case PICA_REG_INDEX(gs.program.set_word[1]):
case PICA_REG_INDEX(gs.program.set_word[2]):
case PICA_REG_INDEX(gs.program.set_word[3]):
case PICA_REG_INDEX(gs.program.set_word[4]):
case PICA_REG_INDEX(gs.program.set_word[5]):
case PICA_REG_INDEX(gs.program.set_word[6]):
case PICA_REG_INDEX(gs.program.set_word[7]): {
u32& offset = g_state.regs.gs.program.offset;
if (offset >= 4096) {
LOG_ERROR(HW_GPU, "Invalid GS program offset {}", offset);
} else {
g_state.gs.program_code[offset] = value;
g_state.gs.MarkProgramCodeDirty();
offset++;
}
break;
}
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[0]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[1]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[2]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[3]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[4]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[5]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[6]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[7]): {
u32& offset = g_state.regs.gs.swizzle_patterns.offset;
if (offset >= g_state.gs.swizzle_data.size()) {
LOG_ERROR(HW_GPU, "Invalid GS swizzle pattern offset {}", offset);
} else {
g_state.gs.swizzle_data[offset] = value;
g_state.gs.MarkSwizzleDataDirty();
offset++;
}
break;
}
case PICA_REG_INDEX(vs.bool_uniforms):
// TODO (wwylele): does regs.pipeline.gs_unit_exclusive_configuration affect this?
WriteUniformBoolReg(g_state.vs, g_state.regs.vs.bool_uniforms.Value());
break;
case PICA_REG_INDEX(vs.int_uniforms[0]):
case PICA_REG_INDEX(vs.int_uniforms[1]):
case PICA_REG_INDEX(vs.int_uniforms[2]):
case PICA_REG_INDEX(vs.int_uniforms[3]): {
// TODO (wwylele): does regs.pipeline.gs_unit_exclusive_configuration affect this?
unsigned index = (id - PICA_REG_INDEX(vs.int_uniforms[0]));
auto values = regs.vs.int_uniforms[index];
WriteUniformIntReg(g_state.vs, index,
Common::Vec4<u8>(values.x, values.y, values.z, values.w));
break;
}
case PICA_REG_INDEX(vs.uniform_setup.set_value[0]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[1]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[2]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[3]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[4]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[5]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[6]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[7]): {
// TODO (wwylele): does regs.pipeline.gs_unit_exclusive_configuration affect this?
WriteUniformFloatReg(g_state.regs.vs, g_state.vs, g_state.vs_float_regs_counter,
g_state.vs_uniform_write_buffer, value);
break;
}
case PICA_REG_INDEX(vs.program.set_word[0]):
case PICA_REG_INDEX(vs.program.set_word[1]):
case PICA_REG_INDEX(vs.program.set_word[2]):
case PICA_REG_INDEX(vs.program.set_word[3]):
case PICA_REG_INDEX(vs.program.set_word[4]):
case PICA_REG_INDEX(vs.program.set_word[5]):
case PICA_REG_INDEX(vs.program.set_word[6]):
case PICA_REG_INDEX(vs.program.set_word[7]): {
u32& offset = g_state.regs.vs.program.offset;
if (offset >= 512) {
LOG_ERROR(HW_GPU, "Invalid VS program offset {}", offset);
} else {
g_state.vs.program_code[offset] = value;
g_state.vs.MarkProgramCodeDirty();
if (!g_state.regs.pipeline.gs_unit_exclusive_configuration) {
g_state.gs.program_code[offset] = value;
g_state.gs.MarkProgramCodeDirty();
}
offset++;
}
break;
}
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[0]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[1]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[2]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[3]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[4]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[5]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[6]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[7]): {
u32& offset = g_state.regs.vs.swizzle_patterns.offset;
if (offset >= g_state.vs.swizzle_data.size()) {
LOG_ERROR(HW_GPU, "Invalid VS swizzle pattern offset {}", offset);
} else {
g_state.vs.swizzle_data[offset] = value;
g_state.vs.MarkSwizzleDataDirty();
if (!g_state.regs.pipeline.gs_unit_exclusive_configuration) {
g_state.gs.swizzle_data[offset] = value;
g_state.gs.MarkSwizzleDataDirty();
}
offset++;
}
break;
}
case PICA_REG_INDEX(lighting.lut_data[0]):
case PICA_REG_INDEX(lighting.lut_data[1]):
case PICA_REG_INDEX(lighting.lut_data[2]):
case PICA_REG_INDEX(lighting.lut_data[3]):
case PICA_REG_INDEX(lighting.lut_data[4]):
case PICA_REG_INDEX(lighting.lut_data[5]):
case PICA_REG_INDEX(lighting.lut_data[6]):
case PICA_REG_INDEX(lighting.lut_data[7]): {
auto& lut_config = regs.lighting.lut_config;
ASSERT_MSG(lut_config.index < 256, "lut_config.index exceeded maximum value of 255!");
g_state.lighting.luts[lut_config.type][lut_config.index].raw = value;
lut_config.index.Assign(lut_config.index + 1);
break;
}
case PICA_REG_INDEX(texturing.fog_lut_data[0]):
case PICA_REG_INDEX(texturing.fog_lut_data[1]):
case PICA_REG_INDEX(texturing.fog_lut_data[2]):
case PICA_REG_INDEX(texturing.fog_lut_data[3]):
case PICA_REG_INDEX(texturing.fog_lut_data[4]):
case PICA_REG_INDEX(texturing.fog_lut_data[5]):
case PICA_REG_INDEX(texturing.fog_lut_data[6]):
case PICA_REG_INDEX(texturing.fog_lut_data[7]): {
g_state.fog.lut[regs.texturing.fog_lut_offset % 128].raw = value;
regs.texturing.fog_lut_offset.Assign(regs.texturing.fog_lut_offset + 1);
break;
}
case PICA_REG_INDEX(texturing.proctex_lut_data[0]):
case PICA_REG_INDEX(texturing.proctex_lut_data[1]):
case PICA_REG_INDEX(texturing.proctex_lut_data[2]):
case PICA_REG_INDEX(texturing.proctex_lut_data[3]):
case PICA_REG_INDEX(texturing.proctex_lut_data[4]):
case PICA_REG_INDEX(texturing.proctex_lut_data[5]):
case PICA_REG_INDEX(texturing.proctex_lut_data[6]):
case PICA_REG_INDEX(texturing.proctex_lut_data[7]): {
auto& index = regs.texturing.proctex_lut_config.index;
auto& pt = g_state.proctex;
switch (regs.texturing.proctex_lut_config.ref_table.Value()) {
case TexturingRegs::ProcTexLutTable::Noise:
pt.noise_table[index % pt.noise_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::ColorMap:
pt.color_map_table[index % pt.color_map_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::AlphaMap:
pt.alpha_map_table[index % pt.alpha_map_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::Color:
pt.color_table[index % pt.color_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::ColorDiff:
pt.color_diff_table[index % pt.color_diff_table.size()].raw = value;
break;
}
index.Assign(index + 1);
break;
}
default:
break;
}
VideoCore::g_renderer->Rasterizer()->NotifyPicaRegisterChanged(id);
if (g_debug_context)
g_debug_context->OnEvent(DebugContext::Event::PicaCommandProcessed,
reinterpret_cast<void*>(&id));
}
void ProcessCommandList(PAddr list, u32 size) {
u32* buffer = (u32*)VideoCore::g_memory->GetPhysicalPointer(list);
if (Pica::g_debug_context && Pica::g_debug_context->recorder) {
Pica::g_debug_context->recorder->MemoryAccessed((u8*)buffer, size, list);
}
g_state.cmd_list.addr = list;
g_state.cmd_list.head_ptr = g_state.cmd_list.current_ptr = buffer;
g_state.cmd_list.length = size / sizeof(u32);
while (g_state.cmd_list.current_ptr < g_state.cmd_list.head_ptr + g_state.cmd_list.length) {
// Align read pointer to 8 bytes
if ((g_state.cmd_list.head_ptr - g_state.cmd_list.current_ptr) % 2 != 0)
++g_state.cmd_list.current_ptr;
u32 value = *g_state.cmd_list.current_ptr++;
const CommandHeader header = {*g_state.cmd_list.current_ptr++};
WritePicaReg(header.cmd_id, value, header.parameter_mask);
for (unsigned i = 0; i < header.extra_data_length; ++i) {
u32 cmd = header.cmd_id + (header.group_commands ? i + 1 : 0);
WritePicaReg(cmd, *g_state.cmd_list.current_ptr++, header.parameter_mask);
}
}
}
} // namespace Pica::CommandProcessor

37
src/video_core/command_processor.h
View File

@ -1,37 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <type_traits>
#include "common/bit_field.h"
#include "common/common_types.h"
namespace Pica::CommandProcessor {
union CommandHeader {
u32 hex;
BitField<0, 16, u32> cmd_id;
// parameter_mask:
// Mask applied to the input value to make it possible to update
// parts of a register without overwriting its other fields.
// first bit: 0x000000FF
// second bit: 0x0000FF00
// third bit: 0x00FF0000
// fourth bit: 0xFF000000
BitField<16, 4, u32> parameter_mask;
BitField<20, 11, u32> extra_data_length;
BitField<31, 1, u32> group_commands;
};
static_assert(std::is_standard_layout<CommandHeader>::value == true,
"CommandHeader does not use standard layout");
static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
void ProcessCommandList(PAddr list, u32 size);
} // namespace Pica::CommandProcessor

182
src/video_core/debug_utils/debug_utils.cpp
View File

@ -2,38 +2,22 @@
// Licensed under GPLv2
// Refer to the license.txt file included.
#include <algorithm>
#include <condition_variable>
#include <cstdint>
#include <cstring>
#include <fstream>
#include <map>
#include <mutex>
#include <stdexcept>
#include <string>
#include <nihstro/bit_field.h>
#include <nihstro/float24.h>
#include <nihstro/shader_binary.h>
#include "common/assert.h"
#include "common/bit_field.h"
#include "common/color.h"
#include "common/common_types.h"
#include "common/logging/log.h"
#include "common/math_util.h"
#include "common/vector_math.h"
#include "core/core.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/pica_state.h"
#include "video_core/pica_types.h"
#include "video_core/rasterizer_interface.h"
#include "video_core/regs_rasterizer.h"
#include "video_core/regs_shader.h"
#include "video_core/regs_texturing.h"
#include "video_core/gpu.h"
#include "video_core/pica/regs_shader.h"
#include "video_core/pica/shader_setup.h"
#include "video_core/renderer_base.h"
#include "video_core/shader/shader.h"
#include "video_core/texture/texture_decode.h"
#include "video_core/utils.h"
#include "video_core/video_core.h"
using nihstro::DVLBHeader;
using nihstro::DVLEHeader;
@ -41,13 +25,13 @@ using nihstro::DVLPHeader;
namespace Pica {
void DebugContext::DoOnEvent(Event event, void* data) {
void DebugContext::DoOnEvent(Event event, const void* data) {
{
std::unique_lock lock{breakpoint_mutex};
// Commit the rasterizer's caches so framebuffers, render targets, etc. will show on debug
// widgets
VideoCore::g_renderer->Rasterizer()->FlushAll();
Core::System::GetInstance().GPU().Renderer().Rasterizer()->FlushAll();
// TODO: Should stop the CPU thread here once we multithread emulation.
@ -84,8 +68,7 @@ std::shared_ptr<DebugContext> g_debug_context; // TODO: Get rid of this global
namespace DebugUtils {
void DumpShader(const std::string& filename, const ShaderRegs& config,
const Shader::ShaderSetup& setup,
void DumpShader(const std::string& filename, const ShaderRegs& config, const ShaderSetup& setup,
const RasterizerRegs::VSOutputAttributes* output_attributes) {
struct StuffToWrite {
const u8* pointer;
@ -288,13 +271,13 @@ void StartPicaTracing() {
g_is_pica_tracing = true;
}
void OnPicaRegWrite(PicaTrace::Write write) {
void OnPicaRegWrite(u16 cmd_id, u16 mask, u32 value) {
std::lock_guard lock(pica_trace_mutex);
if (!g_is_pica_tracing)
return;
pica_trace->writes.push_back(write);
pica_trace->writes.push_back(PicaTrace::Write{cmd_id, mask, value});
}
std::unique_ptr<PicaTrace> FinishPicaTracing() {
@ -313,153 +296,6 @@ std::unique_ptr<PicaTrace> FinishPicaTracing() {
return ret;
}
static std::string ReplacePattern(const std::string& input, const std::string& pattern,
const std::string& replacement) {
std::size_t start = input.find(pattern);
if (start == std::string::npos)
return input;
std::string ret = input;
ret.replace(start, pattern.length(), replacement);
return ret;
}
static std::string GetTevStageConfigSourceString(
const TexturingRegs::TevStageConfig::Source& source) {
using Source = TexturingRegs::TevStageConfig::Source;
static const std::map<Source, std::string> source_map = {
{Source::PrimaryColor, "PrimaryColor"},
{Source::PrimaryFragmentColor, "PrimaryFragmentColor"},
{Source::SecondaryFragmentColor, "SecondaryFragmentColor"},
{Source::Texture0, "Texture0"},
{Source::Texture1, "Texture1"},
{Source::Texture2, "Texture2"},
{Source::Texture3, "Texture3"},
{Source::PreviousBuffer, "PreviousBuffer"},
{Source::Constant, "Constant"},
{Source::Previous, "Previous"},
};
const auto src_it = source_map.find(source);
if (src_it == source_map.end())
return "Unknown";
return src_it->second;
}
static std::string GetTevStageConfigColorSourceString(
const TexturingRegs::TevStageConfig::Source& source,
const TexturingRegs::TevStageConfig::ColorModifier modifier) {
using ColorModifier = TexturingRegs::TevStageConfig::ColorModifier;
static const std::map<ColorModifier, std::string> color_modifier_map = {
{ColorModifier::SourceColor, "%source.rgb"},
{ColorModifier::OneMinusSourceColor, "(1.0 - %source.rgb)"},
{ColorModifier::SourceAlpha, "%source.aaa"},
{ColorModifier::OneMinusSourceAlpha, "(1.0 - %source.aaa)"},
{ColorModifier::SourceRed, "%source.rrr"},
{ColorModifier::OneMinusSourceRed, "(1.0 - %source.rrr)"},
{ColorModifier::SourceGreen, "%source.ggg"},
{ColorModifier::OneMinusSourceGreen, "(1.0 - %source.ggg)"},
{ColorModifier::SourceBlue, "%source.bbb"},
{ColorModifier::OneMinusSourceBlue, "(1.0 - %source.bbb)"},
};
auto src_str = GetTevStageConfigSourceString(source);
auto modifier_it = color_modifier_map.find(modifier);
std::string modifier_str = "%source.????";
if (modifier_it != color_modifier_map.end())
modifier_str = modifier_it->second;
return ReplacePattern(modifier_str, "%source", src_str);
}
static std::string GetTevStageConfigAlphaSourceString(
const TexturingRegs::TevStageConfig::Source& source,
const TexturingRegs::TevStageConfig::AlphaModifier modifier) {
using AlphaModifier = TexturingRegs::TevStageConfig::AlphaModifier;
static const std::map<AlphaModifier, std::string> alpha_modifier_map = {
{AlphaModifier::SourceAlpha, "%source.a"},
{AlphaModifier::OneMinusSourceAlpha, "(1.0 - %source.a)"},
{AlphaModifier::SourceRed, "%source.r"},
{AlphaModifier::OneMinusSourceRed, "(1.0 - %source.r)"},
{AlphaModifier::SourceGreen, "%source.g"},
{AlphaModifier::OneMinusSourceGreen, "(1.0 - %source.g)"},
{AlphaModifier::SourceBlue, "%source.b"},
{AlphaModifier::OneMinusSourceBlue, "(1.0 - %source.b)"},
};
auto src_str = GetTevStageConfigSourceString(source);
auto modifier_it = alpha_modifier_map.find(modifier);
std::string modifier_str = "%source.????";
if (modifier_it != alpha_modifier_map.end())
modifier_str = modifier_it->second;
return ReplacePattern(modifier_str, "%source", src_str);
}
static std::string GetTevStageConfigOperationString(
const TexturingRegs::TevStageConfig::Operation& operation) {
using Operation = TexturingRegs::TevStageConfig::Operation;
static const std::map<Operation, std::string> combiner_map = {
{Operation::Replace, "%source1"},
{Operation::Modulate, "(%source1 * %source2)"},
{Operation::Add, "(%source1 + %source2)"},
{Operation::AddSigned, "(%source1 + %source2) - 0.5"},
{Operation::Lerp, "lerp(%source1, %source2, %source3)"},
{Operation::Subtract, "(%source1 - %source2)"},
{Operation::Dot3_RGB, "dot(%source1, %source2)"},
{Operation::MultiplyThenAdd, "((%source1 * %source2) + %source3)"},
{Operation::AddThenMultiply, "((%source1 + %source2) * %source3)"},
};
const auto op_it = combiner_map.find(operation);
if (op_it == combiner_map.end())
return "Unknown op (%source1, %source2, %source3)";
return op_it->second;
}
std::string GetTevStageConfigColorCombinerString(const TexturingRegs::TevStageConfig& tev_stage) {
auto op_str = GetTevStageConfigOperationString(tev_stage.color_op);
op_str = ReplacePattern(
op_str, "%source1",
GetTevStageConfigColorSourceString(tev_stage.color_source1, tev_stage.color_modifier1));
op_str = ReplacePattern(
op_str, "%source2",
GetTevStageConfigColorSourceString(tev_stage.color_source2, tev_stage.color_modifier2));
return ReplacePattern(
op_str, "%source3",
GetTevStageConfigColorSourceString(tev_stage.color_source3, tev_stage.color_modifier3));
}
std::string GetTevStageConfigAlphaCombinerString(const TexturingRegs::TevStageConfig& tev_stage) {
auto op_str = GetTevStageConfigOperationString(tev_stage.alpha_op);
op_str = ReplacePattern(
op_str, "%source1",
GetTevStageConfigAlphaSourceString(tev_stage.alpha_source1, tev_stage.alpha_modifier1));
op_str = ReplacePattern(
op_str, "%source2",
GetTevStageConfigAlphaSourceString(tev_stage.alpha_source2, tev_stage.alpha_modifier2));
return ReplacePattern(
op_str, "%source3",
GetTevStageConfigAlphaSourceString(tev_stage.alpha_source3, tev_stage.alpha_modifier3));
}
void DumpTevStageConfig(const std::array<TexturingRegs::TevStageConfig, 6>& stages) {
std::string stage_info = "Tev setup:\n";
for (std::size_t index = 0; index < stages.size(); ++index) {
const auto& tev_stage = stages[index];
stage_info += "Stage " + std::to_string(index) + ": " +
GetTevStageConfigColorCombinerString(tev_stage) + " " +
GetTevStageConfigAlphaCombinerString(tev_stage) + "\n";
}
LOG_TRACE(HW_GPU, "{}", stage_info);
}
} // namespace DebugUtils
} // namespace Pica

61
src/video_core/debug_utils/debug_utils.h
View File

@ -4,22 +4,16 @@
#pragma once
#include <algorithm>
#include <array>
#include <condition_variable>
#include <iterator>
#include <list>
#include <map>
#include <memory>
#include <mutex>
#include <string>
#include <utility>
#include <vector>
#include "common/common_types.h"
#include "common/vector_math.h"
#include "video_core/regs_rasterizer.h"
#include "video_core/regs_shader.h"
#include "video_core/regs_texturing.h"
#include "video_core/pica/regs_rasterizer.h"
namespace CiTrace {
class Recorder;
@ -27,9 +21,8 @@ class Recorder;
namespace Pica {
namespace Shader {
struct ShaderRegs;
struct ShaderSetup;
}
class DebugContext {
public:
@ -87,7 +80,7 @@ public:
* @param data Optional data pointer (if unused, this is a nullptr)
* @note This function will perform nothing unless it is overridden in the child class.
*/
virtual void OnPicaBreakPointHit(Event event, void* data) {}
virtual void OnPicaBreakPointHit(Event event, const void* data) {}
/**
* Action to perform when emulation is resumed from a breakpoint.
@ -126,7 +119,7 @@ public:
* @param data Optional data pointer (pass nullptr if unused). Needs to remain valid until
* Resume() is called.
*/
void OnEvent(Event event, void* data) {
void OnEvent(Event event, const void* data) {
// This check is left in the header to allow the compiler to inline it.
if (!breakpoints[(int)event].enabled)
return;
@ -134,7 +127,7 @@ public:
DoOnEvent(event, data);
}
void DoOnEvent(Event event, void* data);
void DoOnEvent(Event event, const void* data);
/**
* Resume from the current breakpoint.
@ -181,10 +174,7 @@ extern std::shared_ptr<DebugContext> g_debug_context; // TODO: Get rid of this g
namespace DebugUtils {
#define PICA_LOG_TEV 0
void DumpShader(const std::string& filename, const ShaderRegs& config,
const Shader::ShaderSetup& setup,
void DumpShader(const std::string& filename, const ShaderRegs& config, const ShaderSetup& setup,
const RasterizerRegs::VSOutputAttributes* output_attributes);
// Utility class to log Pica commands.
@ -203,46 +193,9 @@ void StartPicaTracing();
inline bool IsPicaTracing() {
return g_is_pica_tracing;
}
void OnPicaRegWrite(PicaTrace::Write write);
void OnPicaRegWrite(u16 cmd_id, u16 mask, u32 value);
std::unique_ptr<PicaTrace> FinishPicaTracing();
std::string GetTevStageConfigColorCombinerString(const TexturingRegs::TevStageConfig& tev_stage);
std::string GetTevStageConfigAlphaCombinerString(const TexturingRegs::TevStageConfig& tev_stage);
/// Dumps the Tev stage config to log at trace level
void DumpTevStageConfig(const std::array<TexturingRegs::TevStageConfig, 6>& stages);
/**
* Used in the vertex loader to merge access records. TODO: Investigate if actually useful.
*/
class MemoryAccessTracker {
/// Combine overlapping and close ranges
void SimplifyRanges() {
for (auto it = ranges.begin(); it != ranges.end(); ++it) {
// NOTE: We add 32 to the range end address to make sure "close" ranges are combined,
// too
auto it2 = std::next(it);
while (it2 != ranges.end() && it->first + it->second + 32 >= it2->first) {
it->second = std::max(it->second, it2->first + it2->second - it->first);
it2 = ranges.erase(it2);
}
}
}
public:
/// Record a particular memory access in the list
void AddAccess(u32 paddr, u32 size) {
// Create new range or extend existing one
ranges[paddr] = std::max(ranges[paddr], size);
// Simplify ranges...
SimplifyRanges();
}
/// Map of accessed ranges (mapping start address to range size)
std::map<u32, u32> ranges;
};
} // namespace DebugUtils
} // namespace Pica

419
src/video_core/gpu.cpp Normal file
View File

@ -0,0 +1,419 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/archives.h"
#include "common/microprofile.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/hle/service/gsp/gsp_gpu.h"
#include "core/hle/service/plgldr/plgldr.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/gpu.h"
#include "video_core/gpu_debugger.h"
#include "video_core/pica/pica_core.h"
#include "video_core/pica/regs_lcd.h"
#include "video_core/renderer_base.h"
#include "video_core/renderer_software/sw_blitter.h"
#include "video_core/video_core.h"
namespace VideoCore {
constexpr VAddr VADDR_LCD = 0x1ED02000;
constexpr VAddr VADDR_GPU = 0x1EF00000;
static PAddr VirtualToPhysicalAddress(VAddr addr) {
if (addr == 0) {
return 0;
}
if (addr >= Memory::VRAM_VADDR && addr <= Memory::VRAM_VADDR_END) {
return addr - Memory::VRAM_VADDR + Memory::VRAM_PADDR;
}
if (addr >= Memory::LINEAR_HEAP_VADDR && addr <= Memory::LINEAR_HEAP_VADDR_END) {
return addr - Memory::LINEAR_HEAP_VADDR + Memory::FCRAM_PADDR;
}
if (addr >= Memory::NEW_LINEAR_HEAP_VADDR && addr <= Memory::NEW_LINEAR_HEAP_VADDR_END) {
return addr - Memory::NEW_LINEAR_HEAP_VADDR + Memory::FCRAM_PADDR;
}
if (addr >= Memory::PLUGIN_3GX_FB_VADDR && addr <= Memory::PLUGIN_3GX_FB_VADDR_END) {
return addr - Memory::PLUGIN_3GX_FB_VADDR + Service::PLGLDR::PLG_LDR::GetPluginFBAddr();
}
LOG_ERROR(HW_Memory, "Unknown virtual address @ 0x{:08X}", addr);
return addr;
}
MICROPROFILE_DEFINE(GPU_DisplayTransfer, "GPU", "DisplayTransfer", MP_RGB(100, 100, 255));
MICROPROFILE_DEFINE(GPU_CmdlistProcessing, "GPU", "Cmdlist Processing", MP_RGB(100, 255, 100));
struct GPU::Impl {
Core::Timing& timing;
Core::System& system;
Memory::MemorySystem& memory;
Pica::DebugContext& debug_context;
Pica::PicaCore pica;
GraphicsDebugger gpu_debugger;
std::unique_ptr<RendererBase> renderer;
RasterizerInterface* rasterizer;
std::unique_ptr<SwRenderer::SwBlitter> sw_blitter;
Core::TimingEventType* vblank_event;
Service::GSP::InterruptHandler signal_interrupt;
explicit Impl(Core::System& system, Frontend::EmuWindow& emu_window,
Frontend::EmuWindow* secondary_window)
: timing{system.CoreTiming()}, system{system}, memory{system.Memory()},
debug_context{*Pica::g_debug_context}, pica{memory, debug_context},
renderer{VideoCore::CreateRenderer(emu_window, secondary_window, pica, system)},
rasterizer{renderer->Rasterizer()}, sw_blitter{std::make_unique<SwRenderer::SwBlitter>(
memory, rasterizer)} {}
~Impl() = default;
};
GPU::GPU(Core::System& system, Frontend::EmuWindow& emu_window,
Frontend::EmuWindow* secondary_window)
: impl{std::make_unique<Impl>(system, emu_window, secondary_window)} {
impl->vblank_event = impl->timing.RegisterEvent(
"GPU::VBlankCallback",
[this](uintptr_t user_data, s64 cycles_late) { VBlankCallback(user_data, cycles_late); });
impl->timing.ScheduleEvent(FRAME_TICKS, impl->vblank_event);
// Bind the rasterizer to the PICA GPU
impl->pica.BindRasterizer(impl->rasterizer);
}
GPU::~GPU() = default;
void GPU::SetInterruptHandler(Service::GSP::InterruptHandler handler) {
impl->signal_interrupt = handler;
impl->pica.SetInterruptHandler(handler);
}
void GPU::FlushRegion(PAddr addr, u32 size) {
impl->rasterizer->FlushRegion(addr, size);
}
void GPU::InvalidateRegion(PAddr addr, u32 size) {
impl->rasterizer->InvalidateRegion(addr, size);
}
void GPU::ClearAll(bool flush) {
impl->rasterizer->ClearAll(flush);
}
void GPU::Execute(const Service::GSP::Command& command) {
using Service::GSP::CommandId;
auto& regs = impl->pica.regs;
switch (command.id) {
case CommandId::RequestDma: {
Memory::RasterizerFlushVirtualRegion(command.dma_request.source_address,
command.dma_request.size, Memory::FlushMode::Flush);
Memory::RasterizerFlushVirtualRegion(command.dma_request.dest_address,
command.dma_request.size,
Memory::FlushMode::Invalidate);
// TODO(Subv): These memory accesses should not go through the application's memory mapping.
// They should go through the GSP module's memory mapping.
const auto process = impl->system.Kernel().GetCurrentProcess();
impl->memory.CopyBlock(*process, command.dma_request.dest_address,
command.dma_request.source_address, command.dma_request.size);
impl->signal_interrupt(Service::GSP::InterruptId::DMA);
break;
}
case CommandId::SubmitCmdList: {
auto& params = command.submit_gpu_cmdlist;
auto& cmdbuffer = regs.internal.pipeline.command_buffer;
// Write to the command buffer GPU registers
cmdbuffer.addr[0].Assign(VirtualToPhysicalAddress(params.address) >> 3);
cmdbuffer.size[0].Assign(params.size >> 3);
cmdbuffer.trigger[0] = 1;
// Trigger processing of the command list
SubmitCmdList(0);
break;
}
case CommandId::MemoryFill: {
auto& params = command.memory_fill;
auto& memfill = regs.memory_fill_config;
// Write to the memory fill GPU registers.
if (params.start1 != 0) {
memfill[0].address_start = VirtualToPhysicalAddress(params.start1) >> 3;
memfill[0].address_end = VirtualToPhysicalAddress(params.end1) >> 3;
memfill[0].value_32bit = params.value1;
memfill[0].control = params.control1;
MemoryFill(0);
}
if (params.start2 != 0) {
memfill[1].address_start = VirtualToPhysicalAddress(params.start2) >> 3;
memfill[1].address_end = VirtualToPhysicalAddress(params.end2) >> 3;
memfill[1].value_32bit = params.value2;
memfill[1].control = params.control2;
MemoryFill(1);
}
break;
}
case CommandId::DisplayTransfer: {
auto& params = command.display_transfer;
auto& display_transfer = regs.display_transfer_config;
// Write to the transfer engine GPU registers.
display_transfer.input_address = VirtualToPhysicalAddress(params.in_buffer_address) >> 3;
display_transfer.output_address = VirtualToPhysicalAddress(params.out_buffer_address) >> 3;
display_transfer.input_size = params.in_buffer_size;
display_transfer.output_size = params.out_buffer_size;
display_transfer.flags = params.flags;
display_transfer.trigger.Assign(1);
// Trigger the display transfer.
MemoryTransfer();
break;
}
case CommandId::TextureCopy: {
auto& params = command.texture_copy;
auto& texture_copy = regs.display_transfer_config;
// Write to the transfer engine GPU registers.
texture_copy.input_address = VirtualToPhysicalAddress(params.in_buffer_address) >> 3;
texture_copy.output_address = VirtualToPhysicalAddress(params.out_buffer_address) >> 3;
texture_copy.texture_copy.size = params.size;
texture_copy.texture_copy.input_size = params.in_width_gap;
texture_copy.texture_copy.output_size = params.out_width_gap;
texture_copy.flags = params.flags;
texture_copy.trigger.Assign(1);
// Trigger the texture copy.
MemoryTransfer();
break;
}
case CommandId::CacheFlush: {
// Rasterizer flushing handled elsewhere in CPU read/write and other GPU handlers
// Use command.cache_flush.regions to implement this handler
break;
}
default:
LOG_ERROR(HW_GPU, "Unknown command {:#08X}", command.id.Value());
}
// Notify debugger that a GSP command was processed.
impl->debug_context.OnEvent(Pica::DebugContext::Event::GSPCommandProcessed, &command);
}
void GPU::SetBufferSwap(u32 screen_id, const Service::GSP::FrameBufferInfo& info) {
const PAddr phys_address_left = VirtualToPhysicalAddress(info.address_left);
const PAddr phys_address_right = VirtualToPhysicalAddress(info.address_right);
// Update framebuffer properties.
auto& framebuffer = impl->pica.regs.framebuffer_config[screen_id];
if (info.active_fb == 0) {
framebuffer.address_left1 = phys_address_left;
framebuffer.address_right1 = phys_address_right;
} else {
framebuffer.address_left2 = phys_address_left;
framebuffer.address_right2 = phys_address_right;
}
framebuffer.stride = info.stride;
framebuffer.format = info.format;
framebuffer.active_fb = info.shown_fb;
// Notify debugger about the buffer swap.
impl->debug_context.OnEvent(Pica::DebugContext::Event::BufferSwapped, nullptr);
if (screen_id == 0) {
MicroProfileFlip();
impl->system.perf_stats->EndGameFrame();
}
}
void GPU::SetColorFill(const Pica::ColorFill& fill) {
impl->pica.regs_lcd.color_fill_top = fill;
impl->pica.regs_lcd.color_fill_bottom = fill;
}
u32 GPU::ReadReg(VAddr addr) {
switch (addr & 0xFFFFF000) {
case VADDR_LCD: {
const u32 offset = addr - VADDR_LCD;
const u32 index = offset / sizeof(u32);
ASSERT(addr % sizeof(u32) == 0);
ASSERT(index < Pica::RegsLcd::NumIds());
return impl->pica.regs_lcd[index];
}
case VADDR_GPU:
case VADDR_GPU + 0x1000: {
const u32 offset = addr - VADDR_GPU;
const u32 index = offset / sizeof(u32);
ASSERT(addr % sizeof(u32) == 0);
ASSERT(index < Pica::PicaCore::Regs::NUM_REGS);
return impl->pica.regs.reg_array[index];
}
default:
UNREACHABLE_MSG("Read from unknown GPU address {:#08X}", addr);
}
}
void GPU::WriteReg(VAddr addr, u32 data) {
switch (addr & 0xFFFFF000) {
case VADDR_LCD: {
const u32 offset = addr - VADDR_LCD;
const u32 index = offset / sizeof(u32);
ASSERT(addr % sizeof(u32) == 0);
ASSERT(index < Pica::RegsLcd::NumIds());
impl->pica.regs_lcd[index] = data;
break;
}
case VADDR_GPU:
case VADDR_GPU + 0x1000: {
const u32 offset = addr - VADDR_GPU;
const u32 index = offset / sizeof(u32);
ASSERT(addr % sizeof(u32) == 0);
ASSERT(index < Pica::PicaCore::Regs::NUM_REGS);
impl->pica.regs.reg_array[index] = data;
// Handle registers that trigger GPU actions
switch (index) {
case GPU_REG_INDEX(memory_fill_config[0].trigger):
MemoryFill(0);
break;
case GPU_REG_INDEX(memory_fill_config[1].trigger):
MemoryFill(1);
break;
case GPU_REG_INDEX(display_transfer_config.trigger):
MemoryTransfer();
break;
case GPU_REG_INDEX(internal.pipeline.command_buffer.trigger[0]):
SubmitCmdList(0);
break;
case GPU_REG_INDEX(internal.pipeline.command_buffer.trigger[1]):
SubmitCmdList(1);
break;
default:
break;
}
break;
}
default:
UNREACHABLE_MSG("Write to unknown GPU address {:#08X}", addr);
}
}
void GPU::Sync() {
impl->renderer->Sync();
}
VideoCore::RendererBase& GPU::Renderer() {
return *impl->renderer;
}
Pica::PicaCore& GPU::PicaCore() {
return impl->pica;
}
const Pica::PicaCore& GPU::PicaCore() const {
return impl->pica;
}
Pica::DebugContext& GPU::DebugContext() {
return *Pica::g_debug_context;
}
GraphicsDebugger& GPU::Debugger() {
return impl->gpu_debugger;
}
void GPU::SubmitCmdList(u32 index) {
// Check if a command list was triggered.
auto& config = impl->pica.regs.internal.pipeline.command_buffer;
if (!config.trigger[index]) {
return;
}
MICROPROFILE_SCOPE(GPU_CmdlistProcessing);
// Forward command list processing to the PICA core.
const PAddr addr = config.GetPhysicalAddress(index);
const u32 size = config.GetSize(index);
impl->pica.ProcessCmdList(addr, size);
config.trigger[index] = 0;
}
void GPU::MemoryFill(u32 index) {
// Check if a memory fill was triggered.
auto& config = impl->pica.regs.memory_fill_config[index];
if (!config.trigger) {
return;
}
// Perform memory fill.
if (!impl->rasterizer->AccelerateFill(config)) {
impl->sw_blitter->MemoryFill(config);
}
// It seems that it won't signal interrupt if "address_start" is zero.
// TODO: hwtest this
if (config.GetStartAddress() != 0) {
if (!index) {
impl->signal_interrupt(Service::GSP::InterruptId::PSC0);
} else {
impl->signal_interrupt(Service::GSP::InterruptId::PSC1);
}
}
// Reset "trigger" flag and set the "finish" flag
// This was confirmed to happen on hardware even if "address_start" is zero.
config.trigger.Assign(0);
config.finished.Assign(1);
}
void GPU::MemoryTransfer() {
// Check if a transfer was triggered.
auto& config = impl->pica.regs.display_transfer_config;
if (!config.trigger.Value()) {
return;
}
MICROPROFILE_SCOPE(GPU_DisplayTransfer);
// Notify debugger about the display transfer.
impl->debug_context.OnEvent(Pica::DebugContext::Event::IncomingDisplayTransfer, nullptr);
// Perform memory transfer
if (config.is_texture_copy) {
if (!impl->rasterizer->AccelerateTextureCopy(config)) {
impl->sw_blitter->TextureCopy(config);
}
} else {
if (!impl->rasterizer->AccelerateDisplayTransfer(config)) {
impl->sw_blitter->DisplayTransfer(config);
}
}
// Complete transfer.
config.trigger.Assign(0);
impl->signal_interrupt(Service::GSP::InterruptId::PPF);
}
void GPU::VBlankCallback(std::uintptr_t user_data, s64 cycles_late) {
// Present renderered frame.
impl->renderer->SwapBuffers();
// Signal to GSP that GPU interrupt has occurred
impl->signal_interrupt(Service::GSP::InterruptId::PDC0);
impl->signal_interrupt(Service::GSP::InterruptId::PDC1);
// Reschedule recurrent event
impl->timing.ScheduleEvent(FRAME_TICKS - cycles_late, impl->vblank_event);
}
template <class Archive>
void GPU::serialize(Archive& ar, const u32 file_version) {
ar & impl->pica;
}
SERIALIZE_IMPL(GPU)
} // namespace VideoCore

113
src/video_core/gpu.h Normal file
View File

@ -0,0 +1,113 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <functional>
#include <memory>
#include <boost/serialization/access.hpp>
#include "core/hle/service/gsp/gsp_interrupt.h"
namespace Service::GSP {
struct Command;
struct FrameBufferInfo;
} // namespace Service::GSP
namespace Core {
class System;
}
namespace Pica {
class DebugContext;
class PicaCore;
struct RegsLcd;
union ColorFill;
} // namespace Pica
namespace Frontend {
class EmuWindow;
}
namespace VideoCore {
/// Measured on hardware to be 2240568 timer cycles or 4481136 ARM11 cycles
constexpr u64 FRAME_TICKS = 4481136ull;
class GraphicsDebugger;
class RendererBase;
/**
* The GPU class is the high level interface to the video_core for core services.
*/
class GPU {
public:
explicit GPU(Core::System& system, Frontend::EmuWindow& emu_window,
Frontend::EmuWindow* secondary_window);
~GPU();
/// Sets the function to call for signalling GSP interrupts.
void SetInterruptHandler(Service::GSP::InterruptHandler handler);
/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
void FlushRegion(PAddr addr, u32 size);
/// Notify rasterizer that any caches of the specified region should be invalidated
void InvalidateRegion(PAddr addr, u32 size);
/// Flushes and invalidates all memory in the rasterizer cache and removes any leftover state.
void ClearAll(bool flush);
/// Executes the provided GSP command.
void Execute(const Service::GSP::Command& command);
/// Updates GPU display framebuffer configuration using the specified parameters.
void SetBufferSwap(u32 screen_id, const Service::GSP::FrameBufferInfo& info);
/// Sets the LCD color fill configuration for the top and bottom screens.
void SetColorFill(const Pica::ColorFill& fill);
/// Reads a word from the GPU virtual address.
u32 ReadReg(VAddr addr);
/// Writes the provided value to the GPU virtual address.
void WriteReg(VAddr addr, u32 data);
/// Synchronizes fixed function renderer state with PICA registers.
void Sync();
/// Returns a mutable reference to the renderer.
[[nodiscard]] VideoCore::RendererBase& Renderer();
/// Returns a mutable reference to the PICA GPU.
[[nodiscard]] Pica::PicaCore& PicaCore();
/// Returns an immutable reference to the PICA GPU.
[[nodiscard]] const Pica::PicaCore& PicaCore() const;
/// Returns a mutable reference to the pica debugging context.
[[nodiscard]] Pica::DebugContext& DebugContext();
/// Returns a mutable reference to the GSP command debugger.
[[nodiscard]] GraphicsDebugger& Debugger();
private:
void SubmitCmdList(u32 index);
void MemoryFill(u32 index);
void MemoryTransfer();
void VBlankCallback(uintptr_t user_data, s64 cycles_late);
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version);
private:
struct Impl;
std::unique_ptr<Impl> impl;
};
} // namespace VideoCore

30
src/video_core/gpu_debugger.h
View File

@ -7,18 +7,22 @@
#include <algorithm>
#include <functional>
#include <vector>
#include "core/hle/service/gsp/gsp.h"
#include "core/hle/service/gsp/gsp_command.h"
namespace VideoCore {
class GraphicsDebugger {
public:
// Base class for all objects which need to be notified about GPU events
class DebuggerObserver {
public:
DebuggerObserver() : observed(nullptr) {}
friend class GraphicsDebugger;
public:
DebuggerObserver() = default;
virtual ~DebuggerObserver() {
if (observed)
if (observed) {
observed->UnregisterObserver(this);
}
}
/**
@ -39,20 +43,15 @@ public:
}
private:
GraphicsDebugger* observed;
friend class GraphicsDebugger;
GraphicsDebugger* observed{};
};
void GXCommandProcessed(u8* command_data) {
if (observers.empty())
void GXCommandProcessed(Service::GSP::Command& command_data) {
if (observers.empty()) {
return;
}
gx_command_history.emplace_back();
Service::GSP::Command& cmd = gx_command_history.back();
std::memcpy(&cmd, command_data, sizeof(Service::GSP::Command));
gx_command_history.emplace_back(command_data);
ForEachObserver([this](DebuggerObserver* observer) {
observer->GXCommandProcessed(static_cast<int>(this->gx_command_history.size()));
});
@ -80,6 +79,7 @@ private:
}
std::vector<DebuggerObserver*> observers;
std::vector<Service::GSP::Command> gx_command_history;
};
} // namespace VideoCore

70
src/video_core/pica.cpp
View File

@ -1,70 +0,0 @@
// Copyright 2015 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <cstring>
#include <type_traits>
#include "core/global.h"
#include "video_core/geometry_pipeline.h"
#include "video_core/pica.h"
#include "video_core/pica_state.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
namespace Core {
template <>
Pica::State& Global() {
return Pica::g_state;
}
} // namespace Core
namespace Pica {
State g_state;
void Init() {
g_state.Reset();
}
void Shutdown() {
Shader::Shutdown();
}
template <typename T>
void Zero(T& o) {
static_assert(std::is_trivial_v<T>, "It's undefined behavior to memset a non-trivial type");
std::memset(&o, 0, sizeof(o));
}
State::State() : geometry_pipeline(*this) {
auto SubmitVertex = [this](const Shader::AttributeBuffer& vertex) {
using Pica::Shader::OutputVertex;
auto AddTriangle = [](const OutputVertex& v0, const OutputVertex& v1,
const OutputVertex& v2) {
VideoCore::g_renderer->Rasterizer()->AddTriangle(v0, v1, v2);
};
primitive_assembler.SubmitVertex(
Shader::OutputVertex::FromAttributeBuffer(regs.rasterizer, vertex), AddTriangle);
};
auto SetWinding = [this]() { primitive_assembler.SetWinding(); };
g_state.gs_unit.SetVertexHandler(SubmitVertex, SetWinding);
g_state.geometry_pipeline.SetVertexHandler(SubmitVertex);
}
void State::Reset() {
Zero(regs);
vs = {};
gs = {};
Zero(cmd_list);
immediate = {};
primitive_assembler.Reconfigure(PipelineRegs::TriangleTopology::List);
vs_float_regs_counter = 0;
vs_uniform_write_buffer.fill(0);
gs_float_regs_counter = 0;
gs_uniform_write_buffer.fill(0);
default_attr_counter = 0;
default_attr_write_buffer.fill(0);
}
} // namespace Pica

16
src/video_core/pica.h
View File

@ -1,16 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "video_core/regs_texturing.h"
namespace Pica {
/// Initialize Pica state
void Init();
/// Shutdown Pica state
void Shutdown();
} // namespace Pica

139
src/video_core/geometry_pipeline.cpp → src/video_core/pica/geometry_pipeline.cpp
View File

@ -6,11 +6,13 @@
#include <boost/serialization/export.hpp>
#include <boost/serialization/unique_ptr.hpp>
#include "common/archives.h"
#include "video_core/geometry_pipeline.h"
#include "video_core/pica_state.h"
#include "video_core/regs.h"
#include "video_core/renderer_base.h"
#include "video_core/video_core.h"
#include "core/core.h"
#include "video_core/gpu.h"
#include "video_core/pica/geometry_pipeline.h"
#include "video_core/pica/pica_core.h"
#include "video_core/pica/shader_setup.h"
#include "video_core/pica/shader_unit.h"
#include "video_core/shader/shader.h"
namespace Pica {
@ -33,7 +35,7 @@ public:
* @param input attributes of a vertex output from vertex shader
* @return if the buffer is full and the geometry shader should be invoked
*/
virtual bool SubmitVertex(const Shader::AttributeBuffer& input) = 0;
virtual bool SubmitVertex(const AttributeBuffer& input) = 0;
private:
template <class Archive>
@ -49,32 +51,33 @@ private:
// TODO: what happens when the input size is not divisible by the output size?
class GeometryPipeline_Point : public GeometryPipelineBackend {
public:
GeometryPipeline_Point(const Regs& regs, Shader::GSUnitState& unit) : regs(regs), unit(unit) {
GeometryPipeline_Point(const RegsInternal& regs, GeometryShaderUnit& unit)
: regs(regs), unit(unit) {
ASSERT(regs.pipeline.variable_primitive == 0);
ASSERT(regs.gs.input_to_uniform == 0);
vs_output_num = regs.pipeline.vs_outmap_total_minus_1_a + 1;
std::size_t gs_input_num = regs.gs.max_input_attribute_index + 1;
ASSERT(gs_input_num % vs_output_num == 0);
buffer_cur = attribute_buffer.attr;
buffer_end = attribute_buffer.attr + gs_input_num;
buffer_cur = attribute_buffer.data();
buffer_end = attribute_buffer.data() + gs_input_num;
}
bool IsEmpty() const override {
return buffer_cur == attribute_buffer.attr;
return buffer_cur == attribute_buffer.data();
}
bool NeedIndexInput() const override {
return false;
}
void SubmitIndex(unsigned int val) override {
void SubmitIndex(u32 val) override {
UNREACHABLE();
}
bool SubmitVertex(const Shader::AttributeBuffer& input) override {
buffer_cur = std::copy(input.attr, input.attr + vs_output_num, buffer_cur);
bool SubmitVertex(const AttributeBuffer& input) override {
buffer_cur = std::copy(input.data(), input.data() + vs_output_num, buffer_cur);
if (buffer_cur == buffer_end) {
buffer_cur = attribute_buffer.attr;
buffer_cur = attribute_buffer.data();
unit.LoadInput(regs.gs, attribute_buffer);
return true;
}
@ -82,14 +85,17 @@ public:
}
private:
const Regs& regs;
Shader::GSUnitState& unit;
Shader::AttributeBuffer attribute_buffer;
const RegsInternal& regs;
GeometryShaderUnit& unit;
AttributeBuffer attribute_buffer;
Common::Vec4<f24>* buffer_cur;
Common::Vec4<f24>* buffer_end;
unsigned int vs_output_num;
u32 vs_output_num;
GeometryPipeline_Point() : regs(g_state.regs), unit(g_state.gs_unit) {}
// TODO: REMOVE THIS
GeometryPipeline_Point()
: regs(Core::System::GetInstance().GPU().PicaCore().regs.internal),
unit(Core::System::GetInstance().GPU().PicaCore().gs_unit) {}
template <typename Class, class Archive>
static void serialize_common(Class* self, Archive& ar, const unsigned int version) {
@ -101,8 +107,8 @@ private:
template <class Archive>
void save(Archive& ar, const unsigned int version) const {
serialize_common(this, ar, version);
auto buffer_idx = static_cast<u32>(buffer_cur - attribute_buffer.attr);
auto buffer_size = static_cast<u32>(buffer_end - attribute_buffer.attr);
auto buffer_idx = static_cast<u32>(buffer_cur - attribute_buffer.data());
auto buffer_size = static_cast<u32>(buffer_end - attribute_buffer.data());
ar << buffer_idx;
ar << buffer_size;
}
@ -113,8 +119,8 @@ private:
u32 buffer_idx, buffer_size;
ar >> buffer_idx;
ar >> buffer_size;
buffer_cur = attribute_buffer.attr + buffer_idx;
buffer_end = attribute_buffer.attr + buffer_size;
buffer_cur = attribute_buffer.data() + buffer_idx;
buffer_end = attribute_buffer.data() + buffer_size;
}
BOOST_SERIALIZATION_SPLIT_MEMBER()
@ -127,7 +133,7 @@ private:
// value in the batch. This mode is usually used for subdivision.
class GeometryPipeline_VariablePrimitive : public GeometryPipelineBackend {
public:
GeometryPipeline_VariablePrimitive(const Regs& regs, Shader::ShaderSetup& setup)
GeometryPipeline_VariablePrimitive(const RegsInternal& regs, ShaderSetup& setup)
: regs(regs), setup(setup) {
ASSERT(regs.pipeline.variable_primitive == 1);
ASSERT(regs.gs.input_to_uniform == 1);
@ -142,7 +148,7 @@ public:
return need_index;
}
void SubmitIndex(unsigned int val) override {
void SubmitIndex(u32 val) override {
DEBUG_ASSERT(need_index);
// The number of vertex input is put to the uniform register
@ -157,15 +163,15 @@ public:
need_index = false;
}
bool SubmitVertex(const Shader::AttributeBuffer& input) override {
bool SubmitVertex(const AttributeBuffer& input) override {
DEBUG_ASSERT(!need_index);
if (main_vertex_num != 0) {
// For main vertices, receive all attributes
buffer_cur = std::copy(input.attr, input.attr + vs_output_num, buffer_cur);
buffer_cur = std::copy(input.data(), input.data() + vs_output_num, buffer_cur);
--main_vertex_num;
} else {
// For other vertices, only receive the first attribute (usually the position)
*(buffer_cur++) = input.attr[0];
*(buffer_cur++) = input[0];
}
--total_vertex_num;
@ -179,14 +185,17 @@ public:
private:
bool need_index = true;
const Regs& regs;
Shader::ShaderSetup& setup;
unsigned int main_vertex_num;
unsigned int total_vertex_num;
const RegsInternal& regs;
ShaderSetup& setup;
u32 main_vertex_num;
u32 total_vertex_num;
Common::Vec4<f24>* buffer_cur;
unsigned int vs_output_num;
u32 vs_output_num;
GeometryPipeline_VariablePrimitive() : regs(g_state.regs), setup(g_state.gs) {}
// TODO: REMOVE THIS
GeometryPipeline_VariablePrimitive()
: regs(Core::System::GetInstance().GPU().PicaCore().regs.internal),
setup(Core::System::GetInstance().GPU().PicaCore().gs_setup) {}
template <typename Class, class Archive>
static void serialize_common(Class* self, Archive& ar, const unsigned int version) {
@ -222,8 +231,7 @@ private:
// particle system.
class GeometryPipeline_FixedPrimitive : public GeometryPipelineBackend {
public:
GeometryPipeline_FixedPrimitive(const Regs& regs, Shader::ShaderSetup& setup)
: regs(regs), setup(setup) {
GeometryPipeline_FixedPrimitive(const RegsInternal& regs, ShaderSetup& setup) : setup(setup) {
ASSERT(regs.pipeline.variable_primitive == 0);
ASSERT(regs.gs.input_to_uniform == 1);
vs_output_num = regs.pipeline.vs_outmap_total_minus_1_a + 1;
@ -241,12 +249,12 @@ public:
return false;
}
void SubmitIndex(unsigned int val) override {
void SubmitIndex(u32 val) override {
UNREACHABLE();
}
bool SubmitVertex(const Shader::AttributeBuffer& input) override {
buffer_cur = std::copy(input.attr, input.attr + vs_output_num, buffer_cur);
bool SubmitVertex(const AttributeBuffer& input) override {
buffer_cur = std::copy(input.data(), input.data() + vs_output_num, buffer_cur);
if (buffer_cur == buffer_end) {
buffer_cur = buffer_begin;
return true;
@ -255,14 +263,15 @@ public:
}
private:
[[maybe_unused]] const Regs& regs;
Shader::ShaderSetup& setup;
ShaderSetup& setup;
Common::Vec4<f24>* buffer_begin;
Common::Vec4<f24>* buffer_cur;
Common::Vec4<f24>* buffer_end;
unsigned int vs_output_num;
u32 vs_output_num;
GeometryPipeline_FixedPrimitive() : regs(g_state.regs), setup(g_state.gs) {}
// TODO: REMOVE THIS
GeometryPipeline_FixedPrimitive()
: setup(Core::System::GetInstance().GPU().PicaCore().gs_setup) {}
template <typename Class, class Archive>
static void serialize_common(Class* self, Archive& ar, const unsigned int version) {
@ -298,52 +307,53 @@ private:
friend class boost::serialization::access;
};
GeometryPipeline::GeometryPipeline(State& state) : state(state) {}
GeometryPipeline::GeometryPipeline(RegsInternal& regs_, GeometryShaderUnit& gs_unit_,
ShaderSetup& gs_)
: regs(regs_), gs_unit(gs_unit_), gs(gs_) {}
GeometryPipeline::~GeometryPipeline() = default;
void GeometryPipeline::SetVertexHandler(Shader::VertexHandler vertex_handler) {
void GeometryPipeline::SetVertexHandler(VertexHandler vertex_handler) {
this->vertex_handler = std::move(vertex_handler);
}
void GeometryPipeline::Setup(Shader::ShaderEngine* shader_engine) {
if (!backend)
void GeometryPipeline::Setup(ShaderEngine* shader_engine) {
if (!backend) {
return;
}
this->shader_engine = shader_engine;
shader_engine->SetupBatch(state.gs, state.regs.gs.main_offset);
shader_engine->SetupBatch(gs, regs.gs.main_offset);
}
void GeometryPipeline::Reconfigure() {
ASSERT(!backend || backend->IsEmpty());
if (state.regs.pipeline.use_gs == PipelineRegs::UseGS::No) {
if (regs.pipeline.use_gs == PipelineRegs::UseGS::No) {
backend = nullptr;
return;
}
ASSERT(state.regs.pipeline.use_gs == PipelineRegs::UseGS::Yes);
// The following assumes that when geometry shader is in use, the shader unit 3 is configured as
// a geometry shader unit.
// TODO: what happens if this is not true?
ASSERT(state.regs.pipeline.gs_unit_exclusive_configuration == 1);
ASSERT(state.regs.gs.shader_mode == ShaderRegs::ShaderMode::GS);
ASSERT(regs.pipeline.gs_unit_exclusive_configuration == 1);
ASSERT(regs.gs.shader_mode == ShaderRegs::ShaderMode::GS);
ASSERT(regs.pipeline.use_gs == PipelineRegs::UseGS::Yes);
state.gs_unit.ConfigOutput(state.regs.gs);
gs_unit.ConfigOutput(regs.gs);
ASSERT(state.regs.pipeline.vs_outmap_total_minus_1_a ==
state.regs.pipeline.vs_outmap_total_minus_1_b);
ASSERT(regs.pipeline.vs_outmap_total_minus_1_a == regs.pipeline.vs_outmap_total_minus_1_b);
switch (state.regs.pipeline.gs_config.mode) {
switch (regs.pipeline.gs_config.mode) {
case PipelineRegs::GSMode::Point:
backend = std::make_unique<GeometryPipeline_Point>(state.regs, state.gs_unit);
backend = std::make_unique<GeometryPipeline_Point>(regs, gs_unit);
break;
case PipelineRegs::GSMode::VariablePrimitive:
backend = std::make_unique<GeometryPipeline_VariablePrimitive>(state.regs, state.gs);
backend = std::make_unique<GeometryPipeline_VariablePrimitive>(regs, gs);
break;
case PipelineRegs::GSMode::FixedPrimitive:
backend = std::make_unique<GeometryPipeline_FixedPrimitive>(state.regs, state.gs);
backend = std::make_unique<GeometryPipeline_FixedPrimitive>(regs, gs);
break;
default:
UNREACHABLE();
@ -351,8 +361,9 @@ void GeometryPipeline::Reconfigure() {
}
bool GeometryPipeline::NeedIndexInput() const {
if (!backend)
if (!backend) {
return false;
}
return backend->NeedIndexInput();
}
@ -360,19 +371,19 @@ void GeometryPipeline::SubmitIndex(unsigned int val) {
backend->SubmitIndex(val);
}
void GeometryPipeline::SubmitVertex(const Shader::AttributeBuffer& input) {
void GeometryPipeline::SubmitVertex(const AttributeBuffer& input) {
if (!backend) {
// No backend means the geometry shader is disabled, so we send the vertex shader output
// directly to the primitive assembler.
vertex_handler(input);
} else {
if (backend->SubmitVertex(input)) {
shader_engine->Run(state.gs, state.gs_unit);
shader_engine->Run(gs, gs_unit);
// The uniform b15 is set to true after every geometry shader invocation. This is useful
// for the shader to know if this is the first invocation in a batch, if the program set
// b15 to false first.
state.gs.uniforms.b[15] = true;
gs.uniforms.b[15] = true;
}
}
}

28
src/video_core/geometry_pipeline.h → src/video_core/pica/geometry_pipeline.h
View File

@ -6,11 +6,14 @@
#include <memory>
#include <boost/serialization/export.hpp>
#include "video_core/shader/shader.h"
#include "video_core/pica/shader_unit.h"
namespace Pica {
struct State;
struct RegsInternal;
struct GeometryShaderUnit;
struct ShaderSetup;
class ShaderEngine;
class GeometryPipelineBackend;
class GeometryPipeline_Point;
@ -20,17 +23,14 @@ class GeometryPipeline_FixedPrimitive;
/// A pipeline receiving from vertex shader and sending to geometry shader and primitive assembler
class GeometryPipeline {
public:
explicit GeometryPipeline(State& state);
explicit GeometryPipeline(RegsInternal& regs, GeometryShaderUnit& gs_unit, ShaderSetup& gs);
~GeometryPipeline();
/// Sets the handler for receiving vertex outputs from vertex shader
void SetVertexHandler(Shader::VertexHandler vertex_handler);
void SetVertexHandler(VertexHandler vertex_handler);
/**
* Setup the geometry shader unit if it is in use
* @param shader_engine the shader engine for the geometry shader to run
*/
void Setup(Shader::ShaderEngine* shader_engine);
/// Setup the geometry shader unit if it is in use
void Setup(ShaderEngine* shader_engine);
/// Reconfigures the pipeline according to current register settings
void Reconfigure();
@ -42,13 +42,15 @@ public:
void SubmitIndex(unsigned int val);
/// Submits vertex attributes output from vertex shader
void SubmitVertex(const Shader::AttributeBuffer& input);
void SubmitVertex(const AttributeBuffer& input);
private:
Shader::VertexHandler vertex_handler;
Shader::ShaderEngine* shader_engine;
VertexHandler vertex_handler;
ShaderEngine* shader_engine;
std::unique_ptr<GeometryPipelineBackend> backend;
State& state;
RegsInternal& regs;
GeometryShaderUnit& gs_unit;
ShaderSetup& gs;
template <class Archive>
void serialize(Archive& ar, const unsigned int version);

50
src/video_core/pica/output_vertex.cpp Normal file
View File

@ -0,0 +1,50 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "video_core/pica/output_vertex.h"
#include "video_core/pica/regs_rasterizer.h"
namespace Pica {
OutputVertex::OutputVertex(const RasterizerRegs& regs, const AttributeBuffer& output) {
// Attributes can be used without being set in GPUREG_SH_OUTMAP_Oi
// Hardware tests have shown that they are initialized to 1 in this case.
std::array<f24, 32> vertex_slots_overflow;
vertex_slots_overflow.fill(f24::One());
const u32 num_attributes = regs.vs_output_total & 7;
for (std::size_t attrib = 0; attrib < num_attributes; ++attrib) {
const auto output_register_map = regs.vs_output_attributes[attrib];
vertex_slots_overflow[output_register_map.map_x] = output[attrib][0];
vertex_slots_overflow[output_register_map.map_y] = output[attrib][1];
vertex_slots_overflow[output_register_map.map_z] = output[attrib][2];
vertex_slots_overflow[output_register_map.map_w] = output[attrib][3];
}
// Copy to result
std::memcpy(this, vertex_slots_overflow.data(), sizeof(OutputVertex));
// The hardware takes the absolute and saturates vertex colors, *before* doing interpolation
for (u32 i = 0; i < 4; ++i) {
const f32 c = std::fabs(color[i].ToFloat32());
color[i] = f24::FromFloat32(c < 1.0f ? c : 1.0f);
}
}
#define ASSERT_POS(var, pos) \
static_assert(offsetof(OutputVertex, var) == pos * sizeof(f24), "Semantic at wrong " \
"offset.")
ASSERT_POS(pos, RasterizerRegs::VSOutputAttributes::POSITION_X);
ASSERT_POS(quat, RasterizerRegs::VSOutputAttributes::QUATERNION_X);
ASSERT_POS(color, RasterizerRegs::VSOutputAttributes::COLOR_R);
ASSERT_POS(tc0, RasterizerRegs::VSOutputAttributes::TEXCOORD0_U);
ASSERT_POS(tc1, RasterizerRegs::VSOutputAttributes::TEXCOORD1_U);
ASSERT_POS(tc0_w, RasterizerRegs::VSOutputAttributes::TEXCOORD0_W);
ASSERT_POS(view, RasterizerRegs::VSOutputAttributes::VIEW_X);
ASSERT_POS(tc2, RasterizerRegs::VSOutputAttributes::TEXCOORD2_U);
#undef ASSERT_POS
} // namespace Pica

48
src/video_core/pica/output_vertex.h Normal file
View File

@ -0,0 +1,48 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/vector_math.h"
#include "video_core/pica_types.h"
namespace Pica {
struct RasterizerRegs;
using AttributeBuffer = std::array<Common::Vec4<f24>, 16>;
struct OutputVertex {
OutputVertex() = default;
explicit OutputVertex(const RasterizerRegs& regs, const AttributeBuffer& output);
Common::Vec4<f24> pos;
Common::Vec4<f24> quat;
Common::Vec4<f24> color;
Common::Vec2<f24> tc0;
Common::Vec2<f24> tc1;
f24 tc0_w;
INSERT_PADDING_WORDS(1);
Common::Vec3<f24> view;
INSERT_PADDING_WORDS(1);
Common::Vec2<f24> tc2;
private:
template <class Archive>
void serialize(Archive& ar, const u32) {
ar& pos;
ar& quat;
ar& color;
ar& tc0;
ar& tc1;
ar& tc0_w;
ar& view;
ar& tc2;
}
friend class boost::serialization::access;
};
static_assert(std::is_trivial_v<OutputVertex>, "Structure is not POD");
static_assert(sizeof(OutputVertex) == 24 * sizeof(f32), "OutputVertex has invalid size");
} // namespace Pica

74
src/video_core/pica/packed_attribute.h Normal file
View File

@ -0,0 +1,74 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <boost/serialization/binary_object.hpp>
#include "common/vector_math.h"
#include "video_core/pica_types.h"
namespace Pica {
/**
* Uniforms and fixed attributes are written in a packed format such that four float24 values are
* encoded in three 32-bit numbers. Uniforms can also encode four float32 values in four 32-bit
* numbers. We write to internal memory once a full vector is written.
*/
struct PackedAttribute {
std::array<u32, 4> buffer{};
u32 index{};
/// Places a word to the queue and returns true if the queue becomes full.
constexpr bool Push(u32 word, bool is_float32 = false) {
buffer[index++] = word;
return (index >= 4 && is_float32) || (index >= 3 && !is_float32);
}
/// Resets the queue discarding previous entries.
constexpr void Reset() {
index = 0;
}
/// Returns the queue contents with either float24 or float32 interpretation.
constexpr Common::Vec4<f24> Get(bool is_float32 = false) {
Reset();
if (is_float32) {
return AsFloat32();
} else {
return AsFloat24();
}
}
private:
/// Decodes the queue contents with float24 transfer mode.
constexpr Common::Vec4<f24> AsFloat24() const {
const u32 x = buffer[2] & 0xFFFFFF;
const u32 y = ((buffer[1] & 0xFFFF) << 8) | ((buffer[2] >> 24) & 0xFF);
const u32 z = ((buffer[0] & 0xFF) << 16) | ((buffer[1] >> 16) & 0xFFFF);
const u32 w = buffer[0] >> 8;
return Common::Vec4<f24>{f24::FromRaw(x), f24::FromRaw(y), f24::FromRaw(z),
f24::FromRaw(w)};
}
/// Decodes the queue contents with float32 transfer mode.
constexpr Common::Vec4<f24> AsFloat32() const {
Common::Vec4<f24> uniform;
for (u32 i = 0; i < 4; i++) {
const f32 buffer_value = std::bit_cast<f32>(buffer[i]);
uniform[3 - i] = f24::FromFloat32(buffer_value);
}
return uniform;
}
private:
template <class Archive>
void serialize(Archive& ar, const u32) {
ar& buffer;
ar& index;
}
friend class boost::serialization::access;
};
} // namespace Pica

592
src/video_core/pica/pica_core.cpp Normal file
View File

@ -0,0 +1,592 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/arch.h"
#include "common/archives.h"
#include "common/microprofile.h"
#include "common/scope_exit.h"
#include "common/settings.h"
#include "core/core.h"
#include "core/memory.h"
#include "video_core/debug_utils/debug_utils.h"
#include "video_core/pica/pica_core.h"
#include "video_core/pica/vertex_loader.h"
#include "video_core/rasterizer_interface.h"
#include "video_core/shader/shader.h"
namespace Pica {
MICROPROFILE_DEFINE(GPU_Drawing, "GPU", "Drawing", MP_RGB(50, 50, 240));
using namespace DebugUtils;
union CommandHeader {
u32 hex;
BitField<0, 16, u32> cmd_id;
BitField<16, 4, u32> parameter_mask;
BitField<20, 8, u32> extra_data_length;
BitField<31, 1, u32> group_commands;
};
static_assert(sizeof(CommandHeader) == sizeof(u32), "CommandHeader has incorrect size!");
PicaCore::PicaCore(Memory::MemorySystem& memory_, DebugContext& debug_context_)
: memory{memory_}, debug_context{debug_context_}, geometry_pipeline{regs.internal, gs_unit,
gs_setup},
shader_engine{CreateEngine(Settings::values.use_shader_jit.GetValue())} {
SetFramebufferDefaults();
const auto submit_vertex = [this](const AttributeBuffer& buffer) {
const auto add_triangle = [this](const OutputVertex& v0, const OutputVertex& v1,
const OutputVertex& v2) {
rasterizer->AddTriangle(v0, v1, v2);
};
const auto vertex = OutputVertex(regs.internal.rasterizer, buffer);
primitive_assembler.SubmitVertex(vertex, add_triangle);
};
gs_unit.SetVertexHandlers(submit_vertex, [this]() { primitive_assembler.SetWinding(); });
geometry_pipeline.SetVertexHandler(submit_vertex);
primitive_assembler.Reconfigure(PipelineRegs::TriangleTopology::List);
}
PicaCore::~PicaCore() = default;
void PicaCore::SetFramebufferDefaults() {
auto& framebuffer_top = regs.framebuffer_config[0];
auto& framebuffer_sub = regs.framebuffer_config[1];
// Set framebuffer defaults from nn::gx::Initialize
framebuffer_top.address_left1 = 0x181E6000;
framebuffer_top.address_left2 = 0x1822C800;
framebuffer_top.address_right1 = 0x18273000;
framebuffer_top.address_right2 = 0x182B9800;
framebuffer_sub.address_left1 = 0x1848F000;
framebuffer_sub.address_left2 = 0x184C7800;
framebuffer_top.width.Assign(240);
framebuffer_top.height.Assign(400);
framebuffer_top.stride = 3 * 240;
framebuffer_top.color_format.Assign(PixelFormat::RGB8);
framebuffer_top.active_fb = 0;
framebuffer_sub.width.Assign(240);
framebuffer_sub.height.Assign(320);
framebuffer_sub.stride = 3 * 240;
framebuffer_sub.color_format.Assign(PixelFormat::RGB8);
framebuffer_sub.active_fb = 0;
}
void PicaCore::BindRasterizer(VideoCore::RasterizerInterface* rasterizer) {
this->rasterizer = rasterizer;
}
void PicaCore::SetInterruptHandler(Service::GSP::InterruptHandler& signal_interrupt) {
this->signal_interrupt = signal_interrupt;
}
void PicaCore::ProcessCmdList(PAddr list, u32 size) {
// Initialize command list tracking.
const u8* head = memory.GetPhysicalPointer(list);
cmd_list.Reset(list, head, size);
while (cmd_list.current_index < cmd_list.length) {
// Align read pointer to 8 bytes
if (cmd_list.current_index % 2 != 0) {
cmd_list.current_index++;
}
// Read the header and the value to write.
const u32 value = cmd_list.head[cmd_list.current_index++];
const CommandHeader header{cmd_list.head[cmd_list.current_index++]};
// Write to the requested PICA register.
WriteInternalReg(header.cmd_id, value, header.parameter_mask);
// Write any extra paramters as well.
for (u32 i = 0; i < header.extra_data_length; ++i) {
const u32 cmd = header.cmd_id + (header.group_commands ? i + 1 : 0);
const u32 extra_value = cmd_list.head[cmd_list.current_index++];
WriteInternalReg(cmd, extra_value, header.parameter_mask);
}
}
}
void PicaCore::WriteInternalReg(u32 id, u32 value, u32 mask) {
if (id >= RegsInternal::NUM_REGS) {
LOG_ERROR(
HW_GPU,
"Commandlist tried to write to invalid register 0x{:03X} (value: {:08X}, mask: {:X})",
id, value, mask);
return;
}
// Expand a 4-bit mask to 4-byte mask, e.g. 0b0101 -> 0x00FF00FF
constexpr std::array<u32, 16> ExpandBitsToBytes = {
0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, 0x00ff0000, 0x00ff00ff,
0x00ffff00, 0x00ffffff, 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff,
0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff,
};
// TODO: Figure out how register masking acts on e.g. vs.uniform_setup.set_value
const u32 old_value = regs.internal.reg_array[id];
const u32 write_mask = ExpandBitsToBytes[mask];
regs.internal.reg_array[id] = (old_value & ~write_mask) | (value & write_mask);
// Track register write.
DebugUtils::OnPicaRegWrite(id, mask, regs.internal.reg_array[id]);
// Track events.
debug_context.OnEvent(DebugContext::Event::PicaCommandLoaded, &id);
SCOPE_EXIT({ debug_context.OnEvent(DebugContext::Event::PicaCommandProcessed, &id); });
switch (id) {
// Trigger IRQ
case PICA_REG_INDEX(trigger_irq):
signal_interrupt(Service::GSP::InterruptId::P3D);
break;
case PICA_REG_INDEX(pipeline.triangle_topology):
primitive_assembler.Reconfigure(regs.internal.pipeline.triangle_topology);
break;
case PICA_REG_INDEX(pipeline.restart_primitive):
primitive_assembler.Reset();
break;
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.index):
immediate.Reset();
break;
// Load default vertex input attributes
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[0]):
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[1]):
case PICA_REG_INDEX(pipeline.vs_default_attributes_setup.set_value[2]):
SubmitImmediate(value);
break;
case PICA_REG_INDEX(pipeline.gpu_mode):
// This register likely just enables vertex processing and doesn't need any special handling
break;
case PICA_REG_INDEX(pipeline.command_buffer.trigger[0]):
case PICA_REG_INDEX(pipeline.command_buffer.trigger[1]): {
const u32 index = static_cast<u32>(id - PICA_REG_INDEX(pipeline.command_buffer.trigger[0]));
const PAddr addr = regs.internal.pipeline.command_buffer.GetPhysicalAddress(index);
const u32 size = regs.internal.pipeline.command_buffer.GetSize(index);
const u8* head = memory.GetPhysicalPointer(addr);
cmd_list.Reset(addr, head, size);
break;
}
// It seems like these trigger vertex rendering
case PICA_REG_INDEX(pipeline.trigger_draw):
case PICA_REG_INDEX(pipeline.trigger_draw_indexed): {
const bool is_indexed = (id == PICA_REG_INDEX(pipeline.trigger_draw_indexed));
DrawArrays(is_indexed);
break;
}
case PICA_REG_INDEX(gs.bool_uniforms):
gs_setup.WriteUniformBoolReg(regs.internal.gs.bool_uniforms.Value());
break;
case PICA_REG_INDEX(gs.int_uniforms[0]):
case PICA_REG_INDEX(gs.int_uniforms[1]):
case PICA_REG_INDEX(gs.int_uniforms[2]):
case PICA_REG_INDEX(gs.int_uniforms[3]): {
const u32 index = (id - PICA_REG_INDEX(gs.int_uniforms[0]));
gs_setup.WriteUniformIntReg(index, regs.internal.gs.GetIntUniform(index));
break;
}
case PICA_REG_INDEX(gs.uniform_setup.set_value[0]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[1]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[2]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[3]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[4]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[5]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[6]):
case PICA_REG_INDEX(gs.uniform_setup.set_value[7]): {
gs_setup.WriteUniformFloatReg(regs.internal.gs, value);
break;
}
case PICA_REG_INDEX(gs.program.set_word[0]):
case PICA_REG_INDEX(gs.program.set_word[1]):
case PICA_REG_INDEX(gs.program.set_word[2]):
case PICA_REG_INDEX(gs.program.set_word[3]):
case PICA_REG_INDEX(gs.program.set_word[4]):
case PICA_REG_INDEX(gs.program.set_word[5]):
case PICA_REG_INDEX(gs.program.set_word[6]):
case PICA_REG_INDEX(gs.program.set_word[7]): {
u32& offset = regs.internal.gs.program.offset;
if (offset >= 4096) {
LOG_ERROR(HW_GPU, "Invalid GS program offset {}", offset);
} else {
gs_setup.program_code[offset] = value;
gs_setup.MarkProgramCodeDirty();
offset++;
}
break;
}
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[0]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[1]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[2]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[3]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[4]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[5]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[6]):
case PICA_REG_INDEX(gs.swizzle_patterns.set_word[7]): {
u32& offset = regs.internal.gs.swizzle_patterns.offset;
if (offset >= gs_setup.swizzle_data.size()) {
LOG_ERROR(HW_GPU, "Invalid GS swizzle pattern offset {}", offset);
} else {
gs_setup.swizzle_data[offset] = value;
gs_setup.MarkSwizzleDataDirty();
offset++;
}
break;
}
case PICA_REG_INDEX(vs.bool_uniforms):
vs_setup.WriteUniformBoolReg(regs.internal.vs.bool_uniforms.Value());
break;
case PICA_REG_INDEX(vs.int_uniforms[0]):
case PICA_REG_INDEX(vs.int_uniforms[1]):
case PICA_REG_INDEX(vs.int_uniforms[2]):
case PICA_REG_INDEX(vs.int_uniforms[3]): {
const u32 index = (id - PICA_REG_INDEX(vs.int_uniforms[0]));
vs_setup.WriteUniformIntReg(index, regs.internal.vs.GetIntUniform(index));
break;
}
case PICA_REG_INDEX(vs.uniform_setup.set_value[0]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[1]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[2]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[3]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[4]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[5]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[6]):
case PICA_REG_INDEX(vs.uniform_setup.set_value[7]): {
vs_setup.WriteUniformFloatReg(regs.internal.vs, value);
break;
}
case PICA_REG_INDEX(vs.program.set_word[0]):
case PICA_REG_INDEX(vs.program.set_word[1]):
case PICA_REG_INDEX(vs.program.set_word[2]):
case PICA_REG_INDEX(vs.program.set_word[3]):
case PICA_REG_INDEX(vs.program.set_word[4]):
case PICA_REG_INDEX(vs.program.set_word[5]):
case PICA_REG_INDEX(vs.program.set_word[6]):
case PICA_REG_INDEX(vs.program.set_word[7]): {
u32& offset = regs.internal.vs.program.offset;
if (offset >= 512) {
LOG_ERROR(HW_GPU, "Invalid VS program offset {}", offset);
} else {
vs_setup.program_code[offset] = value;
vs_setup.MarkProgramCodeDirty();
if (!regs.internal.pipeline.gs_unit_exclusive_configuration) {
gs_setup.program_code[offset] = value;
gs_setup.MarkProgramCodeDirty();
}
offset++;
}
break;
}
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[0]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[1]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[2]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[3]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[4]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[5]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[6]):
case PICA_REG_INDEX(vs.swizzle_patterns.set_word[7]): {
u32& offset = regs.internal.vs.swizzle_patterns.offset;
if (offset >= vs_setup.swizzle_data.size()) {
LOG_ERROR(HW_GPU, "Invalid VS swizzle pattern offset {}", offset);
} else {
vs_setup.swizzle_data[offset] = value;
vs_setup.MarkSwizzleDataDirty();
if (!regs.internal.pipeline.gs_unit_exclusive_configuration) {
gs_setup.swizzle_data[offset] = value;
gs_setup.MarkSwizzleDataDirty();
}
offset++;
}
break;
}
case PICA_REG_INDEX(lighting.lut_data[0]):
case PICA_REG_INDEX(lighting.lut_data[1]):
case PICA_REG_INDEX(lighting.lut_data[2]):
case PICA_REG_INDEX(lighting.lut_data[3]):
case PICA_REG_INDEX(lighting.lut_data[4]):
case PICA_REG_INDEX(lighting.lut_data[5]):
case PICA_REG_INDEX(lighting.lut_data[6]):
case PICA_REG_INDEX(lighting.lut_data[7]): {
auto& lut_config = regs.internal.lighting.lut_config;
ASSERT_MSG(lut_config.index < 256, "lut_config.index exceeded maximum value of 255!");
lighting.luts[lut_config.type][lut_config.index].raw = value;
lut_config.index.Assign(lut_config.index + 1);
break;
}
case PICA_REG_INDEX(texturing.fog_lut_data[0]):
case PICA_REG_INDEX(texturing.fog_lut_data[1]):
case PICA_REG_INDEX(texturing.fog_lut_data[2]):
case PICA_REG_INDEX(texturing.fog_lut_data[3]):
case PICA_REG_INDEX(texturing.fog_lut_data[4]):
case PICA_REG_INDEX(texturing.fog_lut_data[5]):
case PICA_REG_INDEX(texturing.fog_lut_data[6]):
case PICA_REG_INDEX(texturing.fog_lut_data[7]): {
fog.lut[regs.internal.texturing.fog_lut_offset % 128].raw = value;
regs.internal.texturing.fog_lut_offset.Assign(regs.internal.texturing.fog_lut_offset + 1);
break;
}
case PICA_REG_INDEX(texturing.proctex_lut_data[0]):
case PICA_REG_INDEX(texturing.proctex_lut_data[1]):
case PICA_REG_INDEX(texturing.proctex_lut_data[2]):
case PICA_REG_INDEX(texturing.proctex_lut_data[3]):
case PICA_REG_INDEX(texturing.proctex_lut_data[4]):
case PICA_REG_INDEX(texturing.proctex_lut_data[5]):
case PICA_REG_INDEX(texturing.proctex_lut_data[6]):
case PICA_REG_INDEX(texturing.proctex_lut_data[7]): {
auto& index = regs.internal.texturing.proctex_lut_config.index;
switch (regs.internal.texturing.proctex_lut_config.ref_table.Value()) {
case TexturingRegs::ProcTexLutTable::Noise:
proctex.noise_table[index % proctex.noise_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::ColorMap:
proctex.color_map_table[index % proctex.color_map_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::AlphaMap:
proctex.alpha_map_table[index % proctex.alpha_map_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::Color:
proctex.color_table[index % proctex.color_table.size()].raw = value;
break;
case TexturingRegs::ProcTexLutTable::ColorDiff:
proctex.color_diff_table[index % proctex.color_diff_table.size()].raw = value;
break;
}
index.Assign(index + 1);
break;
}
default:
break;
}
// Notify the rasterizer an internal register was updated.
rasterizer->NotifyPicaRegisterChanged(id);
}
void PicaCore::SubmitImmediate(u32 value) {
// Push to word to the queue. This returns true when a full attribute is formed.
if (!immediate.queue.Push(value)) {
return;
}
constexpr size_t IMMEDIATE_MODE_INDEX = 0xF;
auto& setup = regs.internal.pipeline.vs_default_attributes_setup;
if (setup.index > IMMEDIATE_MODE_INDEX) {
LOG_ERROR(HW_GPU, "Invalid VS default attribute index {}", setup.index);
return;
}
// Retrieve the attribute and place it in the default attribute buffer.
const auto attribute = immediate.queue.Get();
if (setup.index < IMMEDIATE_MODE_INDEX) {
input_default_attributes[setup.index] = attribute;
setup.index++;
return;
}
// When index is 0xF the attribute is used for immediate mode drawing.
immediate.input_vertex[immediate.current_attribute] = attribute;
if (immediate.current_attribute < regs.internal.pipeline.max_input_attrib_index) {
immediate.current_attribute++;
return;
}
// We formed a vertex, flush.
DrawImmediate();
}
void PicaCore::DrawImmediate() {
// Compile the vertex shader.
shader_engine->SetupBatch(vs_setup, regs.internal.vs.main_offset);
// Track vertex in the debug recorder.
debug_context.OnEvent(DebugContext::Event::VertexShaderInvocation,
std::addressof(immediate.input_vertex));
SCOPE_EXIT({ debug_context.OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr); });
ShaderUnit shader_unit;
AttributeBuffer output{};
// Invoke the vertex shader for the vertex.
shader_unit.LoadInput(regs.internal.vs, immediate.input_vertex);
shader_engine->Run(vs_setup, shader_unit);
shader_unit.WriteOutput(regs.internal.vs, output);
// Reconfigure geometry pipeline if needed.
if (immediate.reset_geometry_pipeline) {
geometry_pipeline.Reconfigure();
immediate.reset_geometry_pipeline = false;
}
// Send to geometry pipeline.
ASSERT(!geometry_pipeline.NeedIndexInput());
geometry_pipeline.Setup(shader_engine.get());
geometry_pipeline.SubmitVertex(output);
// Flush the immediate triangle.
rasterizer->DrawTriangles();
immediate.current_attribute = 0;
}
void PicaCore::DrawArrays(bool is_indexed) {
MICROPROFILE_SCOPE(GPU_Drawing);
// Track vertex in the debug recorder.
debug_context.OnEvent(DebugContext::Event::IncomingPrimitiveBatch, nullptr);
SCOPE_EXIT({ debug_context.OnEvent(DebugContext::Event::FinishedPrimitiveBatch, nullptr); });
const bool accelerate_draw = [this] {
// Geometry shaders cannot be accelerated due to register preservation.
if (regs.internal.pipeline.use_gs == PipelineRegs::UseGS::Yes) {
return false;
}
// TODO (wwylele): for Strip/Fan topology, if the primitive assember is not restarted
// after this draw call, the buffered vertex from this draw should "leak" to the next
// draw, in which case we should buffer the vertex into the software primitive assember,
// or disable accelerate draw completely. However, there is not game found yet that does
// this, so this is left unimplemented for now. Revisit this when an issue is found in
// games.
bool accelerate_draw = Settings::values.use_hw_shader && primitive_assembler.IsEmpty();
const auto topology = primitive_assembler.GetTopology();
if (topology == PipelineRegs::TriangleTopology::Shader ||
topology == PipelineRegs::TriangleTopology::List) {
accelerate_draw = accelerate_draw && (regs.internal.pipeline.num_vertices % 3) == 0;
}
return accelerate_draw;
}();
// Attempt to use hardware vertex shaders if possible.
if (accelerate_draw && rasterizer->AccelerateDrawBatch(is_indexed)) {
return;
}
// We cannot accelerate the draw, so load and execute the vertex shader for each vertex.
LoadVertices(is_indexed);
// Draw emitted triangles.
rasterizer->DrawTriangles();
}
void PicaCore::LoadVertices(bool is_indexed) {
// Read and validate vertex information from the loaders
const auto& pipeline = regs.internal.pipeline;
const PAddr base_address = pipeline.vertex_attributes.GetPhysicalBaseAddress();
const auto loader = VertexLoader(memory, pipeline);
regs.internal.rasterizer.ValidateSemantics();
// Locate index buffer.
const auto& index_info = pipeline.index_array;
const u8* index_address_8 = memory.GetPhysicalPointer(base_address + index_info.offset);
const u16* index_address_16 = reinterpret_cast<const u16*>(index_address_8);
const bool index_u16 = index_info.format != 0;
// Simple circular-replacement vertex cache
const std::size_t VERTEX_CACHE_SIZE = 64;
std::array<bool, VERTEX_CACHE_SIZE> vertex_cache_valid{};
std::array<u16, VERTEX_CACHE_SIZE> vertex_cache_ids;
std::array<AttributeBuffer, VERTEX_CACHE_SIZE> vertex_cache;
u32 vertex_cache_pos = 0;
// Compile the vertex shader for this batch.
ShaderUnit shader_unit;
AttributeBuffer vs_output;
shader_engine->SetupBatch(vs_setup, regs.internal.vs.main_offset);
// Setup geometry pipeline in case we are using a geometry shader.
geometry_pipeline.Reconfigure();
geometry_pipeline.Setup(shader_engine.get());
ASSERT(!geometry_pipeline.NeedIndexInput() || is_indexed);
for (u32 index = 0; index < pipeline.num_vertices; ++index) {
// Indexed rendering doesn't use the start offset
const u32 vertex = is_indexed
? (index_u16 ? index_address_16[index] : index_address_8[index])
: (index + pipeline.vertex_offset);
bool vertex_cache_hit = false;
if (is_indexed) {
if (geometry_pipeline.NeedIndexInput()) {
geometry_pipeline.SubmitIndex(vertex);
continue;
}
for (u32 i = 0; i < VERTEX_CACHE_SIZE; ++i) {
if (vertex_cache_valid[i] && vertex == vertex_cache_ids[i]) {
vs_output = vertex_cache[i];
vertex_cache_hit = true;
break;
}
}
}
if (!vertex_cache_hit) {
// Initialize data for the current vertex
AttributeBuffer input;
loader.LoadVertex(base_address, index, vertex, input, input_default_attributes);
// Record vertex processing to the debugger.
debug_context.OnEvent(DebugContext::Event::VertexShaderInvocation,
std::addressof(input));
// Invoke the vertex shader for this vertex.
shader_unit.LoadInput(regs.internal.vs, input);
shader_engine->Run(vs_setup, shader_unit);
shader_unit.WriteOutput(regs.internal.vs, vs_output);
// Cache the vertex when doing indexed rendering.
if (is_indexed) {
vertex_cache[vertex_cache_pos] = vs_output;
vertex_cache_valid[vertex_cache_pos] = true;
vertex_cache_ids[vertex_cache_pos] = vertex;
vertex_cache_pos = (vertex_cache_pos + 1) % VERTEX_CACHE_SIZE;
}
}
// Send to geometry pipeline
geometry_pipeline.SubmitVertex(vs_output);
}
}
template <class Archive>
void PicaCore::CommandList::serialize(Archive& ar, const u32 file_version) {
ar& addr;
ar& length;
ar& current_index;
if (Archive::is_loading::value) {
const u8* ptr = Core::System::GetInstance().Memory().GetPhysicalPointer(addr);
head = reinterpret_cast<const u32*>(ptr);
}
}
SERIALIZE_IMPL(PicaCore::CommandList)
} // namespace Pica

287
src/video_core/pica/pica_core.h Normal file
View File

@ -0,0 +1,287 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "core/hle/service/gsp/gsp_interrupt.h"
#include "video_core/pica/geometry_pipeline.h"
#include "video_core/pica/packed_attribute.h"
#include "video_core/pica/primitive_assembly.h"
#include "video_core/pica/regs_external.h"
#include "video_core/pica/regs_internal.h"
#include "video_core/pica/regs_lcd.h"
#include "video_core/pica/shader_setup.h"
#include "video_core/pica/shader_unit.h"
namespace Memory {
class MemorySystem;
}
namespace VideoCore {
class RasterizerInterface;
}
namespace Pica {
class DebugContext;
class ShaderEngine;
class PicaCore {
public:
explicit PicaCore(Memory::MemorySystem& memory, DebugContext& debug_context_);
~PicaCore();
void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
void SetInterruptHandler(Service::GSP::InterruptHandler& signal_interrupt);
void ProcessCmdList(PAddr list, u32 size);
private:
void SetFramebufferDefaults();
void WriteInternalReg(u32 id, u32 value, u32 mask);
void SubmitImmediate(u32 data);
void DrawImmediate();
void DrawArrays(bool is_indexed);
void LoadVertices(bool is_indexed);
public:
union Regs {
static constexpr size_t NUM_REGS = 0x732;
struct {
u32 hardware_id;
INSERT_PADDING_WORDS(0x3);
MemoryFillConfig memory_fill_config[2];
u32 vram_bank_control;
u32 gpu_busy;
INSERT_PADDING_WORDS(0x22);
u32 backlight_control;
INSERT_PADDING_WORDS(0xCF);
FramebufferConfig framebuffer_config[2];
INSERT_PADDING_WORDS(0x180);
DisplayTransferConfig display_transfer_config;
INSERT_PADDING_WORDS(0xF5);
RegsInternal internal;
};
std::array<u32, NUM_REGS> reg_array;
};
static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32));
struct CommandList {
PAddr addr;
const u32* head;
u32 current_index;
u32 length;
void Reset(PAddr addr, const u8* head, u32 size) {
this->addr = addr;
this->head = reinterpret_cast<const u32*>(head);
this->length = size / sizeof(u32);
current_index = 0;
}
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version);
};
struct ImmediateModeState {
AttributeBuffer input_vertex{};
u32 current_attribute{};
bool reset_geometry_pipeline{true};
PackedAttribute queue;
void Reset() {
current_attribute = 0;
reset_geometry_pipeline = true;
queue.Reset();
}
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& input_vertex;
ar& current_attribute;
ar& reset_geometry_pipeline;
ar& queue;
}
};
struct ProcTex {
union ValueEntry {
u32 raw;
// LUT value, encoded as 12-bit fixed point, with 12 fraction bits
BitField<0, 12, u32> value; // 0.0.12 fixed point
// Difference between two entry values. Used for efficient interpolation.
// 0.0.12 fixed point with two's complement. The range is [-0.5, 0.5).
// Note: the type of this is different from the one of lighting LUT
BitField<12, 12, s32> difference;
f32 ToFloat() const {
return static_cast<f32>(value) / 4095.f;
}
f32 DiffToFloat() const {
return static_cast<f32>(difference) / 4095.f;
}
};
union ColorEntry {
u32 raw;
BitField<0, 8, u32> r;
BitField<8, 8, u32> g;
BitField<16, 8, u32> b;
BitField<24, 8, u32> a;
Common::Vec4<u8> ToVector() const {
return {static_cast<u8>(r), static_cast<u8>(g), static_cast<u8>(b),
static_cast<u8>(a)};
}
};
union ColorDifferenceEntry {
u32 raw;
BitField<0, 8, s32> r; // half of the difference between two ColorEntry
BitField<8, 8, s32> g;
BitField<16, 8, s32> b;
BitField<24, 8, s32> a;
Common::Vec4<s32> ToVector() const {
return Common::Vec4<s32>{r, g, b, a} * 2;
}
};
std::array<ValueEntry, 128> noise_table;
std::array<ValueEntry, 128> color_map_table;
std::array<ValueEntry, 128> alpha_map_table;
std::array<ColorEntry, 256> color_table;
std::array<ColorDifferenceEntry, 256> color_diff_table;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& boost::serialization::make_binary_object(this, sizeof(ProcTex));
}
};
struct Lighting {
union LutEntry {
// Used for raw access
u32 raw;
// LUT value, encoded as 12-bit fixed point, with 12 fraction bits
BitField<0, 12, u32> value; // 0.0.12 fixed point
// Used for efficient interpolation.
BitField<12, 11, u32> difference; // 0.0.11 fixed point
BitField<23, 1, u32> neg_difference;
f32 ToFloat() const {
return static_cast<f32>(value) / 4095.f;
}
f32 DiffToFloat() const {
const f32 diff = static_cast<f32>(difference) / 2047.f;
return neg_difference ? -diff : diff;
}
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& raw;
}
};
std::array<std::array<LutEntry, 256>, 24> luts;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& boost::serialization::make_binary_object(this, sizeof(Lighting));
}
};
struct Fog {
union LutEntry {
// Used for raw access
u32 raw;
BitField<0, 13, s32> difference; // 1.1.11 fixed point
BitField<13, 11, u32> value; // 0.0.11 fixed point
f32 ToFloat() const {
return static_cast<f32>(value) / 2047.0f;
}
f32 DiffToFloat() const {
return static_cast<f32>(difference) / 2047.0f;
}
};
std::array<LutEntry, 128> lut;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& boost::serialization::make_binary_object(this, sizeof(Fog));
}
};
RegsLcd regs_lcd{};
Regs regs{};
// TODO: Move these to a separate shader scheduler class
GeometryShaderUnit gs_unit;
ShaderSetup vs_setup;
ShaderSetup gs_setup;
ProcTex proctex{};
Lighting lighting{};
Fog fog{};
AttributeBuffer input_default_attributes{};
ImmediateModeState immediate{};
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& regs_lcd;
ar& regs.reg_array;
ar& gs_unit;
ar& vs_setup;
ar& gs_setup;
ar& proctex;
ar& lighting;
ar& fog;
ar& input_default_attributes;
ar& immediate;
ar& geometry_pipeline;
ar& primitive_assembler;
ar& cmd_list;
}
private:
Memory::MemorySystem& memory;
VideoCore::RasterizerInterface* rasterizer;
DebugContext& debug_context;
Service::GSP::InterruptHandler signal_interrupt;
GeometryPipeline geometry_pipeline;
PrimitiveAssembler primitive_assembler;
CommandList cmd_list;
std::unique_ptr<ShaderEngine> shader_engine;
};
#define GPU_REG_INDEX(field_name) (offsetof(Pica::PicaCore::Regs, field_name) / sizeof(u32))
} // namespace Pica

53
src/video_core/pica/primitive_assembly.cpp Normal file
View File

@ -0,0 +1,53 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/logging/log.h"
#include "video_core/pica/primitive_assembly.h"
namespace Pica {
PrimitiveAssembler::PrimitiveAssembler(PipelineRegs::TriangleTopology topology)
: topology(topology) {}
void PrimitiveAssembler::SubmitVertex(const OutputVertex& vtx,
const TriangleHandler& triangle_handler) {
switch (topology) {
case PipelineRegs::TriangleTopology::List:
case PipelineRegs::TriangleTopology::Shader:
if (buffer_index < 2) {
buffer[buffer_index++] = vtx;
} else {
buffer_index = 0;
if (topology == PipelineRegs::TriangleTopology::Shader && winding) {
triangle_handler(buffer[1], buffer[0], vtx);
winding = false;
} else {
triangle_handler(buffer[0], buffer[1], vtx);
}
}
break;
case PipelineRegs::TriangleTopology::Strip:
case PipelineRegs::TriangleTopology::Fan:
if (strip_ready) {
triangle_handler(buffer[0], buffer[1], vtx);
}
buffer[buffer_index] = vtx;
strip_ready |= (buffer_index == 1);
if (topology == PipelineRegs::TriangleTopology::Strip) {
buffer_index = !buffer_index;
} else if (topology == PipelineRegs::TriangleTopology::Fan) {
buffer_index = 1;
}
break;
default:
LOG_ERROR(HW_GPU, "Unknown triangle topology {:x}:", (int)topology);
break;
}
}
} // namespace Pica

40
src/video_core/primitive_assembly.h → src/video_core/pica/primitive_assembly.h
View File

@ -8,61 +8,73 @@
#include <functional>
#include <boost/serialization/access.hpp>
#include <boost/serialization/array.hpp>
#include "video_core/regs_pipeline.h"
#include "video_core/pica/output_vertex.h"
#include "video_core/pica/regs_pipeline.h"
namespace Pica {
/*
/**
* Utility class to build triangles from a series of vertices,
* according to a given triangle topology.
*/
template <typename VertexType>
struct PrimitiveAssembler {
using TriangleHandler =
std::function<void(const VertexType& v0, const VertexType& v1, const VertexType& v2)>;
std::function<void(const OutputVertex&, const OutputVertex&, const OutputVertex&)>;
explicit PrimitiveAssembler(
PipelineRegs::TriangleTopology topology = PipelineRegs::TriangleTopology::List);
/*
/**
* Queues a vertex, builds primitives from the vertex queue according to the given
* triangle topology, and calls triangle_handler for each generated primitive.
* NOTE: We could specify the triangle handler in the constructor, but this way we can
* keep event and handler code next to each other.
*/
void SubmitVertex(const VertexType& vtx, const TriangleHandler& triangle_handler);
void SubmitVertex(const OutputVertex& vtx, const TriangleHandler& triangle_handler);
/**
* Invert the vertex order of the next triangle. Called by geometry shader emitter.
* This only takes effect for TriangleTopology::Shader.
*/
void SetWinding();
void SetWinding() noexcept {
winding = true;
}
/**
* Resets the internal state of the PrimitiveAssembler.
*/
void Reset();
void Reset() {
buffer_index = 0;
strip_ready = false;
winding = false;
}
/**
* Reconfigures the PrimitiveAssembler to use a different triangle topology.
*/
void Reconfigure(PipelineRegs::TriangleTopology topology);
void Reconfigure(PipelineRegs::TriangleTopology topology) {
Reset();
this->topology = topology;
}
/**
* Returns whether the PrimitiveAssembler has an empty internal buffer.
*/
bool IsEmpty() const;
bool IsEmpty() const {
return buffer_index == 0 && !strip_ready;
}
/**
* Returns the current topology.
*/
PipelineRegs::TriangleTopology GetTopology() const;
PipelineRegs::TriangleTopology GetTopology() const {
return topology;
}
private:
PipelineRegs::TriangleTopology topology;
int buffer_index = 0;
std::array<VertexType, 2> buffer;
std::array<OutputVertex, 2> buffer;
bool strip_ready = false;
bool winding = false;
@ -70,7 +82,7 @@ private:
void serialize(Archive& ar, const unsigned int version) {
ar& topology;
ar& buffer_index;
ar& boost::serialization::make_array(buffer.data(), buffer.size());
ar& buffer;
ar& strip_ready;
ar& winding;
}

217
src/video_core/pica/regs_external.h Normal file
View File

@ -0,0 +1,217 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/bit_field.h"
namespace Pica {
/**
* Most physical addresses which GPU registers refer to are 8-byte aligned.
* This function should be used to get the address from a raw register value.
*/
constexpr u32 DecodeAddressRegister(u32 register_value) {
return register_value * 8;
}
/// Components are laid out in reverse byte order, most significant bits first.
enum class PixelFormat : u32 {
RGBA8 = 0,
RGB8 = 1,
RGB565 = 2,
RGB5A1 = 3,
RGBA4 = 4,
};
constexpr u32 BytesPerPixel(Pica::PixelFormat format) {
switch (format) {
case Pica::PixelFormat::RGBA8:
return 4;
case Pica::PixelFormat::RGB8:
return 3;
case Pica::PixelFormat::RGB565:
case Pica::PixelFormat::RGB5A1:
case Pica::PixelFormat::RGBA4:
return 2;
default:
UNREACHABLE();
}
return 0;
}
struct MemoryFillConfig {
u32 address_start;
u32 address_end;
union {
u32 value_32bit;
BitField<0, 16, u32> value_16bit;
// TODO: Verify component order
BitField<0, 8, u32> value_24bit_r;
BitField<8, 8, u32> value_24bit_g;
BitField<16, 8, u32> value_24bit_b;
};
union {
u32 control;
// Setting this field to 1 triggers the memory fill.
// This field also acts as a status flag, and gets reset to 0 upon completion.
BitField<0, 1, u32> trigger;
// Set to 1 upon completion.
BitField<1, 1, u32> finished;
// If both of these bits are unset, then it will fill the memory with a 16 bit value
// 1: fill with 24-bit wide values
BitField<8, 1, u32> fill_24bit;
// 1: fill with 32-bit wide values
BitField<9, 1, u32> fill_32bit;
};
inline u32 GetStartAddress() const {
return DecodeAddressRegister(address_start);
}
inline u32 GetEndAddress() const {
return DecodeAddressRegister(address_end);
}
inline std::string DebugName() const {
return fmt::format("from {:#X} to {:#X} with {}-bit value {:#X}", GetStartAddress(),
GetEndAddress(), fill_32bit ? "32" : (fill_24bit ? "24" : "16"),
value_32bit);
}
};
static_assert(sizeof(MemoryFillConfig) == 0x10);
struct FramebufferConfig {
INSERT_PADDING_WORDS(0x17);
union {
u32 size;
BitField<0, 16, u32> width;
BitField<16, 16, u32> height;
};
INSERT_PADDING_WORDS(0x2);
u32 address_left1;
u32 address_left2;
union {
u32 format;
BitField<0, 3, PixelFormat> color_format;
};
INSERT_PADDING_WORDS(0x1);
union {
u32 active_fb;
// 0: Use parameters ending with "1"
// 1: Use parameters ending with "2"
BitField<0, 1, u32> second_fb_active;
};
INSERT_PADDING_WORDS(0x5);
// Distance between two pixel rows, in bytes
u32 stride;
u32 address_right1;
u32 address_right2;
INSERT_PADDING_WORDS(0x19);
};
static_assert(sizeof(FramebufferConfig) == 0x100);
struct DisplayTransferConfig {
u32 input_address;
u32 output_address;
inline u32 GetPhysicalInputAddress() const {
return DecodeAddressRegister(input_address);
}
inline u32 GetPhysicalOutputAddress() const {
return DecodeAddressRegister(output_address);
}
inline std::string DebugName() const noexcept {
return fmt::format("from {:#x} to {:#x} with {} scaling and stride {}, width {}",
GetPhysicalInputAddress(), GetPhysicalOutputAddress(),
scaling == NoScale ? "no" : (scaling == ScaleX ? "X" : "XY"),
input_width.Value(), output_width.Value());
}
union {
u32 output_size;
BitField<0, 16, u32> output_width;
BitField<16, 16, u32> output_height;
};
union {
u32 input_size;
BitField<0, 16, u32> input_width;
BitField<16, 16, u32> input_height;
};
enum ScalingMode : u32 {
NoScale = 0, // Doesn't scale the image
ScaleX = 1, // Downscales the image in half in the X axis and applies a box filter
ScaleXY =
2, // Downscales the image in half in both the X and Y axes and applies a box filter
};
union {
u32 flags;
BitField<0, 1, u32> flip_vertically; // flips input data vertically
BitField<1, 1, u32> input_linear; // Converts from linear to tiled format
BitField<2, 1, u32> crop_input_lines;
BitField<3, 1, u32> is_texture_copy; // Copies the data without performing any
// processing and respecting texture copy fields
BitField<5, 1, u32> dont_swizzle;
BitField<8, 3, PixelFormat> input_format;
BitField<12, 3, PixelFormat> output_format;
/// Uses some kind of 32x32 block swizzling mode, instead of the usual 8x8 one.
BitField<16, 1, u32> block_32; // TODO(yuriks): unimplemented
BitField<24, 2, ScalingMode> scaling; // Determines the scaling mode of the transfer
};
INSERT_PADDING_WORDS(0x1);
// it seems that writing to this field triggers the display transfer
BitField<0, 1, u32> trigger;
INSERT_PADDING_WORDS(0x1);
struct {
u32 size; // The lower 4 bits are ignored
union {
u32 input_size;
BitField<0, 16, u32> input_width;
BitField<16, 16, u32> input_gap;
};
union {
u32 output_size;
BitField<0, 16, u32> output_width;
BitField<16, 16, u32> output_gap;
};
} texture_copy;
};
static_assert(sizeof(DisplayTransferConfig) == 0x2c);
} // namespace Pica

0
src/video_core/regs_framebuffer.h → src/video_core/pica/regs_framebuffer.h
View File

20
src/video_core/regs.cpp → src/video_core/pica/regs_internal.cpp
View File

@ -7,11 +7,11 @@
#include <utility>
#include "common/common_types.h"
#include "video_core/regs.h"
#include "video_core/pica/regs_internal.h"
namespace Pica {
static const std::pair<u16, const char*> register_names[] = {
static constexpr std::pair<u16, const char*> register_names[] = {
{0x010, "GPUREG_FINALIZE"},
{0x040, "GPUREG_FACECULLING_CONFIG"},
@ -474,15 +474,15 @@ static const std::pair<u16, const char*> register_names[] = {
{0x2DD, "GPUREG_VSH_OPDESCS_DATA7"},
};
const char* Regs::GetRegisterName(u16 index) {
auto found = std::lower_bound(std::begin(register_names), std::end(register_names), index,
[](auto p, auto i) { return p.first < i; });
if (found->first == index) {
return found->second;
} else {
// Return empty string if no match is found
return "";
const char* RegsInternal::GetRegisterName(u16 index) {
const auto it = std::lower_bound(std::begin(register_names), std::end(register_names), index,
[](auto p, auto i) { return p.first < i; });
if (it->first == index) {
return it->second;
}
// Return empty string if no match is found
return "";
}
} // namespace Pica

23
src/video_core/regs.h → src/video_core/pica/regs_internal.h
View File

@ -3,18 +3,19 @@
// Refer to the license.txt file included.
#pragma once
#include "video_core/regs_framebuffer.h"
#include "video_core/regs_lighting.h"
#include "video_core/regs_pipeline.h"
#include "video_core/regs_rasterizer.h"
#include "video_core/regs_shader.h"
#include "video_core/regs_texturing.h"
#include "video_core/pica/regs_framebuffer.h"
#include "video_core/pica/regs_lighting.h"
#include "video_core/pica/regs_pipeline.h"
#include "video_core/pica/regs_rasterizer.h"
#include "video_core/pica/regs_shader.h"
#include "video_core/pica/regs_texturing.h"
namespace Pica {
#define PICA_REG_INDEX(field_name) (offsetof(Pica::Regs, field_name) / sizeof(u32))
#define PICA_REG_INDEX(field_name) (offsetof(Pica::RegsInternal, field_name) / sizeof(u32))
struct Regs {
struct RegsInternal {
static constexpr std::size_t NUM_REGS = 0x300;
union {
@ -38,10 +39,11 @@ struct Regs {
static const char* GetRegisterName(u16 index);
};
static_assert(sizeof(Regs) == Regs::NUM_REGS * sizeof(u32), "Regs struct has wrong size");
static_assert(sizeof(RegsInternal) == RegsInternal::NUM_REGS * sizeof(u32),
"Regs struct has wrong size");
#define ASSERT_REG_POSITION(field_name, position) \
static_assert(offsetof(Regs, field_name) == position * 4, \
static_assert(offsetof(RegsInternal, field_name) == position * 4, \
"Field " #field_name " has invalid position")
ASSERT_REG_POSITION(trigger_irq, 0x10);
@ -110,4 +112,5 @@ ASSERT_REG_POSITION(gs, 0x280);
ASSERT_REG_POSITION(vs, 0x2b0);
#undef ASSERT_REG_POSITION
} // namespace Pica

53
src/core/hw/lcd.h → src/video_core/pica/regs_lcd.h
View File

@ -1,45 +1,46 @@
// Copyright 2015 Citra Emulator Project
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <cstddef>
#include <type_traits>
#include <boost/serialization/access.hpp>
#include "common/bit_field.h"
#include "common/common_funcs.h"
#include "common/common_types.h"
#include "common/vector_math.h"
#define LCD_REG_INDEX(field_name) (offsetof(LCD::Regs, field_name) / sizeof(u32))
#define LCD_REG_INDEX(field_name) (offsetof(Pica::RegsLcd, field_name) / sizeof(u32))
namespace LCD {
namespace Pica {
struct Regs {
union ColorFill {
u32 raw;
union ColorFill {
u32 raw;
BitField<0, 8, u32> color_r;
BitField<8, 8, u32> color_g;
BitField<16, 8, u32> color_b;
BitField<24, 1, u32> is_enabled;
BitField<0, 8, u32> color_r;
BitField<8, 8, u32> color_g;
BitField<16, 8, u32> color_b;
BitField<24, 1, u32> is_enabled;
};
Common::Vec3<u8> AsVector() const noexcept {
return Common::MakeVec<u8>(color_r, color_g, color_b);
}
};
struct RegsLcd {
INSERT_PADDING_WORDS(0x81);
ColorFill color_fill_top;
INSERT_PADDING_WORDS(0xE);
u32 backlight_top;
INSERT_PADDING_WORDS(0x1F0);
ColorFill color_fill_bottom;
INSERT_PADDING_WORDS(0xE);
u32 backlight_bottom;
INSERT_PADDING_WORDS(0x16F);
static constexpr std::size_t NumIds() {
return sizeof(Regs) / sizeof(u32);
return sizeof(RegsLcd) / sizeof(u32);
}
const u32& operator[](int index) const {
@ -62,28 +63,16 @@ private:
}
friend class boost::serialization::access;
};
static_assert(std::is_standard_layout<Regs>::value, "Structure does not use standard layout");
static_assert(std::is_standard_layout_v<RegsLcd>, "Structure does not use standard layout");
#define ASSERT_REG_POSITION(field_name, position) \
static_assert(offsetof(Regs, field_name) == position * 4, \
static_assert(offsetof(RegsLcd, field_name) == position * 4, \
"Field " #field_name " has invalid position")
ASSERT_REG_POSITION(color_fill_top, 0x81);
ASSERT_REG_POSITION(backlight_top, 0x90);
ASSERT_REG_POSITION(color_fill_bottom, 0x281);
ASSERT_REG_POSITION(backlight_bottom, 0x290);
extern Regs g_regs;
#undef ASSERT_REG_POSITION
template <typename T>
void Read(T& var, const u32 addr);
template <typename T>
void Write(u32 addr, const T data);
/// Initialize hardware
void Init();
/// Shutdown hardware
void Shutdown();
} // namespace LCD
} // namespace Pica

12
src/video_core/regs_lighting.h → src/video_core/pica/regs_lighting.h
View File

@ -26,16 +26,16 @@ struct LightingRegs {
DistanceAttenuation = 16,
};
static constexpr unsigned NumLightingSampler = 24;
static constexpr u32 NumLightingSampler = 24;
static LightingSampler SpotlightAttenuationSampler(unsigned index) {
static LightingSampler SpotlightAttenuationSampler(u32 index) {
return static_cast<LightingSampler>(
static_cast<unsigned>(LightingSampler::SpotlightAttenuation) + index);
static_cast<u32>(LightingSampler::SpotlightAttenuation) + index);
}
static LightingSampler DistanceAttenuationSampler(unsigned index) {
return static_cast<LightingSampler>(
static_cast<unsigned>(LightingSampler::DistanceAttenuation) + index);
static LightingSampler DistanceAttenuationSampler(u32 index) {
return static_cast<LightingSampler>(static_cast<u32>(LightingSampler::DistanceAttenuation) +
index);
}
/**

20
src/video_core/regs_pipeline.h → src/video_core/pica/regs_pipeline.h
View File

@ -20,6 +20,20 @@ struct PipelineRegs {
FLOAT = 3,
};
static u32 GetFormatBytes(VertexAttributeFormat format) {
switch (format) {
case VertexAttributeFormat::FLOAT:
return 4;
case VertexAttributeFormat::SHORT:
return 2;
case VertexAttributeFormat::BYTE:
case VertexAttributeFormat::UBYTE:
return 1;
default:
UNREACHABLE();
}
}
struct {
BitField<1, 28, u32> base_address;
@ -194,14 +208,14 @@ struct PipelineRegs {
BitField<0, 28, u32> addr[2]; ///< Physical address / 8 of each channel's command buffer
u32 trigger[2]; ///< Triggers execution of the channel's command buffer when written to
unsigned GetSize(unsigned index) const {
u32 GetSize(u32 index) const {
ASSERT(index < 2);
return 8 * size[index];
}
PAddr GetPhysicalAddress(unsigned index) const {
PAddr GetPhysicalAddress(u32 index) const {
ASSERT(index < 2);
return (PAddr)(8 * addr[index]);
return 8 * addr[index];
}
} command_buffer;

11
src/video_core/regs_rasterizer.h → src/video_core/pica/regs_rasterizer.h
View File

@ -104,6 +104,17 @@ struct RasterizerRegs {
u32 raw;
} vs_output_attributes[7];
void ValidateSemantics() {
for (std::size_t attrib = 0; attrib < vs_output_total; ++attrib) {
const u32 output_register_map = vs_output_attributes[attrib].raw;
for (std::size_t comp = 0; comp < 4; ++comp) {
const u32 semantic = (output_register_map >> (8 * comp)) & 0x1F;
ASSERT_MSG(semantic < 24 || semantic == VSOutputAttributes::INVALID,
"Invalid/unknown semantic id: {}", semantic);
}
}
}
INSERT_PADDING_WORDS(0xe);
enum class ScissorMode : u32 {

17
src/video_core/regs_shader.h → src/video_core/pica/regs_shader.h
View File

@ -4,11 +4,10 @@
#pragma once
#include <array>
#include "common/bit_field.h"
#include "common/common_funcs.h"
#include "common/common_types.h"
#include "common/vector_math.h"
namespace Pica {
@ -22,6 +21,11 @@ struct ShaderRegs {
BitField<24, 8, u32> w;
} int_uniforms[4];
Common::Vec4<u8> GetIntUniform(u32 index) const {
const auto& values = int_uniforms[index];
return Common::MakeVec<u8>(values.x, values.y, values.z, values.w);
}
INSERT_PADDING_WORDS(0x4);
enum ShaderMode {
@ -55,13 +59,13 @@ struct ShaderRegs {
INSERT_PADDING_WORDS(0x2);
struct {
enum Format : u32 {
FLOAT24 = 0,
FLOAT32 = 1,
enum class Format : u32 {
Float24 = 0,
Float32 = 1,
};
bool IsFloat32() const {
return format == FLOAT32;
return format == Format::Float32;
}
union {
@ -70,7 +74,6 @@ struct ShaderRegs {
// indices
// TODO: Maybe the uppermost index is for the geometry shader? Investigate!
BitField<0, 7, u32> index;
BitField<31, 1, Format> format;
};

0
src/video_core/regs_texturing.h → src/video_core/pica/regs_texturing.h
View File

61
src/video_core/pica/shader_setup.cpp Normal file
View File

@ -0,0 +1,61 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/bit_set.h"
#include "common/hash.h"
#include "video_core/pica/regs_shader.h"
#include "video_core/pica/shader_setup.h"
namespace Pica {
ShaderSetup::ShaderSetup() = default;
ShaderSetup::~ShaderSetup() = default;
void ShaderSetup::WriteUniformBoolReg(u32 value) {
const auto bits = BitSet32(value);
for (u32 i = 0; i < uniforms.b.size(); ++i) {
uniforms.b[i] = bits[i];
}
}
void ShaderSetup::WriteUniformIntReg(u32 index, const Common::Vec4<u8> values) {
ASSERT(index < uniforms.i.size());
uniforms.i[index] = values;
}
void ShaderSetup::WriteUniformFloatReg(ShaderRegs& config, u32 value) {
auto& uniform_setup = config.uniform_setup;
const bool is_float32 = uniform_setup.IsFloat32();
if (!uniform_queue.Push(value, is_float32)) {
return;
}
const auto uniform = uniform_queue.Get(is_float32);
if (uniform_setup.index >= uniforms.f.size()) {
LOG_ERROR(HW_GPU, "Invalid float uniform index {}", uniform_setup.index.Value());
return;
}
uniforms.f[uniform_setup.index] = uniform;
uniform_setup.index.Assign(uniform_setup.index + 1);
}
u64 ShaderSetup::GetProgramCodeHash() {
if (program_code_hash_dirty) {
program_code_hash = Common::ComputeHash64(&program_code, sizeof(program_code));
program_code_hash_dirty = false;
}
return program_code_hash;
}
u64 ShaderSetup::GetSwizzleDataHash() {
if (swizzle_data_hash_dirty) {
swizzle_data_hash = Common::ComputeHash64(&swizzle_data, sizeof(swizzle_data));
swizzle_data_hash_dirty = false;
}
return swizzle_data_hash;
}
} // namespace Pica

103
src/video_core/pica/shader_setup.h Normal file
View File

@ -0,0 +1,103 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "common/vector_math.h"
#include "video_core/pica/packed_attribute.h"
#include "video_core/pica_types.h"
namespace Pica {
constexpr u32 MAX_PROGRAM_CODE_LENGTH = 4096;
constexpr u32 MAX_SWIZZLE_DATA_LENGTH = 4096;
using ProgramCode = std::array<u32, MAX_PROGRAM_CODE_LENGTH>;
using SwizzleData = std::array<u32, MAX_SWIZZLE_DATA_LENGTH>;
struct Uniforms {
alignas(16) std::array<Common::Vec4<f24>, 96> f;
std::array<bool, 16> b;
std::array<Common::Vec4<u8>, 4> i;
static size_t GetFloatUniformOffset(u32 index) {
return offsetof(Uniforms, f) + index * sizeof(Common::Vec4<f24>);
}
static size_t GetBoolUniformOffset(u32 index) {
return offsetof(Uniforms, b) + index * sizeof(bool);
}
static size_t GetIntUniformOffset(u32 index) {
return offsetof(Uniforms, i) + index * sizeof(Common::Vec4<u8>);
}
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& f;
ar& b;
ar& i;
}
};
struct ShaderRegs;
/**
* This structure contains the state information common for all shader units such as uniforms.
* The geometry shaders has a unique configuration so when enabled it has its own setup.
*/
struct ShaderSetup {
public:
explicit ShaderSetup();
~ShaderSetup();
void WriteUniformBoolReg(u32 value);
void WriteUniformIntReg(u32 index, const Common::Vec4<u8> values);
void WriteUniformFloatReg(ShaderRegs& config, u32 value);
u64 GetProgramCodeHash();
u64 GetSwizzleDataHash();
void MarkProgramCodeDirty() {
program_code_hash_dirty = true;
}
void MarkSwizzleDataDirty() {
swizzle_data_hash_dirty = true;
}
public:
Uniforms uniforms;
PackedAttribute uniform_queue;
ProgramCode program_code;
SwizzleData swizzle_data;
u32 entry_point;
const void* cached_shader{};
private:
bool program_code_hash_dirty{true};
bool swizzle_data_hash_dirty{true};
u64 program_code_hash{0xDEADC0DE};
u64 swizzle_data_hash{0xDEADC0DE};
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& uniforms;
ar& uniform_queue;
ar& program_code;
ar& swizzle_data;
ar& program_code_hash_dirty;
ar& swizzle_data_hash_dirty;
ar& program_code_hash;
ar& swizzle_data_hash;
}
};
} // namespace Pica

63
src/video_core/pica/shader_unit.cpp Normal file
View File

@ -0,0 +1,63 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/bit_set.h"
#include "video_core/pica/regs_shader.h"
#include "video_core/pica/shader_unit.h"
namespace Pica {
ShaderUnit::ShaderUnit(GeometryEmitter* emitter) : emitter_ptr{emitter} {}
ShaderUnit::~ShaderUnit() = default;
void ShaderUnit::LoadInput(const ShaderRegs& config, const AttributeBuffer& buffer) {
const u32 max_attribute = config.max_input_attribute_index;
for (u32 attr = 0; attr <= max_attribute; ++attr) {
const u32 reg = config.GetRegisterForAttribute(attr);
input[reg] = buffer[attr];
}
}
void ShaderUnit::WriteOutput(const ShaderRegs& config, AttributeBuffer& buffer) {
u32 output_index{};
for (u32 reg : Common::BitSet<u32>(config.output_mask)) {
buffer[output_index++] = output[reg];
}
}
void GeometryEmitter::Emit(std::span<Common::Vec4<f24>, 16> output_regs) {
ASSERT(vertex_id < 3);
u32 output_index{};
for (u32 reg : Common::BitSet<u32>(output_mask)) {
buffer[vertex_id][output_index++] = output_regs[reg];
}
if (prim_emit) {
if (winding) {
handlers->winding_setter();
}
for (std::size_t i = 0; i < buffer.size(); ++i) {
handlers->vertex_handler(buffer[i]);
}
}
}
GeometryShaderUnit::GeometryShaderUnit() : ShaderUnit{&emitter} {}
GeometryShaderUnit::~GeometryShaderUnit() = default;
void GeometryShaderUnit::SetVertexHandlers(VertexHandler vertex_handler,
WindingSetter winding_setter) {
emitter.handlers = new Handlers;
emitter.handlers->vertex_handler = vertex_handler;
emitter.handlers->winding_setter = winding_setter;
}
void GeometryShaderUnit::ConfigOutput(const ShaderRegs& config) {
emitter.output_mask = config.output_mask;
}
} // namespace Pica

120
src/video_core/pica/shader_unit.h Normal file
View File

@ -0,0 +1,120 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <functional>
#include <span>
#include <boost/serialization/base_object.hpp>
#include "video_core/pica/output_vertex.h"
namespace Pica {
/// Handler type for receiving vertex outputs from vertex shader or geometry shader
using VertexHandler = std::function<void(const AttributeBuffer&)>;
/// Handler type for signaling to invert the vertex order of the next triangle
using WindingSetter = std::function<void()>;
struct ShaderRegs;
struct GeometryEmitter;
/**
* This structure contains the state information that needs to be unique for a shader unit. The 3DS
* has four shader units that process shaders in parallel.
*/
struct ShaderUnit {
explicit ShaderUnit(GeometryEmitter* emitter = nullptr);
~ShaderUnit();
void LoadInput(const ShaderRegs& config, const AttributeBuffer& input);
void WriteOutput(const ShaderRegs& config, AttributeBuffer& output);
static constexpr size_t InputOffset(s32 register_index) {
return offsetof(ShaderUnit, input) + register_index * sizeof(Common::Vec4<f24>);
}
static constexpr size_t OutputOffset(s32 register_index) {
return offsetof(ShaderUnit, output) + register_index * sizeof(Common::Vec4<f24>);
}
static constexpr size_t TemporaryOffset(s32 register_index) {
return offsetof(ShaderUnit, temporary) + register_index * sizeof(Common::Vec4<f24>);
}
public:
s32 address_registers[3];
bool conditional_code[2];
alignas(16) std::array<Common::Vec4<f24>, 16> input;
alignas(16) std::array<Common::Vec4<f24>, 16> temporary;
alignas(16) std::array<Common::Vec4<f24>, 16> output;
GeometryEmitter* emitter_ptr;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& input;
ar& temporary;
ar& output;
ar& conditional_code;
ar& address_registers;
}
};
struct Handlers {
VertexHandler vertex_handler;
WindingSetter winding_setter;
};
/// This structure contains state information for primitive emitting in geometry shader.
struct GeometryEmitter {
void Emit(std::span<Common::Vec4<f24>, 16> output_regs);
public:
std::array<AttributeBuffer, 3> buffer;
u8 vertex_id;
bool prim_emit;
bool winding;
u32 output_mask;
Handlers* handlers;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& buffer;
ar& vertex_id;
ar& prim_emit;
ar& winding;
ar& output_mask;
}
};
/**
* This is an extended shader unit state that represents the special unit that can run both vertex
* shader and geometry shader. It contains an additional primitive emitter and utilities for
* geometry shader.
*/
struct GeometryShaderUnit : public ShaderUnit {
GeometryShaderUnit();
~GeometryShaderUnit();
void SetVertexHandlers(VertexHandler vertex_handler, WindingSetter winding_setter);
void ConfigOutput(const ShaderRegs& config);
GeometryEmitter emitter;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const u32 file_version) {
ar& boost::serialization::base_object<ShaderUnit>(*this);
ar& emitter;
}
};
} // namespace Pica

109
src/video_core/pica/vertex_loader.cpp Normal file
View File

@ -0,0 +1,109 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/alignment.h"
#include "common/logging/log.h"
#include "video_core/pica/vertex_loader.h"
namespace Pica {
VertexLoader::VertexLoader(Memory::MemorySystem& memory_, const PipelineRegs& regs)
: memory{memory_} {
const auto& attribute_config = regs.vertex_attributes;
num_total_attributes = attribute_config.GetNumTotalAttributes();
vertex_attribute_sources.fill(0xdeadbeef);
for (u32 i = 0; i < 16; i++) {
vertex_attribute_is_default[i] = attribute_config.IsDefaultAttribute(i);
}
// Setup attribute data from loaders
for (u32 loader = 0; loader < 12; ++loader) {
const auto& loader_config = attribute_config.attribute_loaders[loader];
u32 offset = 0;
// TODO: What happens if a loader overwrites a previous one's data?
for (u32 component = 0; component < loader_config.component_count; ++component) {
if (component >= 12) {
LOG_ERROR(HW_GPU,
"Overflow in the vertex attribute loader {} trying to load component {}",
loader, component);
continue;
}
u32 attribute_index = loader_config.GetComponent(component);
if (attribute_index < 12) {
offset = Common::AlignUp(offset,
attribute_config.GetElementSizeInBytes(attribute_index));
vertex_attribute_sources[attribute_index] = loader_config.data_offset + offset;
vertex_attribute_strides[attribute_index] =
static_cast<u32>(loader_config.byte_count);
vertex_attribute_formats[attribute_index] =
attribute_config.GetFormat(attribute_index);
vertex_attribute_elements[attribute_index] =
attribute_config.GetNumElements(attribute_index);
offset += attribute_config.GetStride(attribute_index);
} else if (attribute_index < 16) {
// Attribute ids 12, 13, 14 and 15 signify 4, 8, 12 and 16-byte paddings,
// respectively
offset = Common::AlignUp(offset, 4);
offset += (attribute_index - 11) * 4;
} else {
UNREACHABLE(); // This is truly unreachable due to the number of bits for each
// component
}
}
}
}
VertexLoader::~VertexLoader() = default;
void VertexLoader::LoadVertex(PAddr base_address, u32 index, u32 vertex, AttributeBuffer& input,
AttributeBuffer& input_default_attributes) const {
for (s32 i = 0; i < num_total_attributes; ++i) {
// Load the default attribute if we're configured to do so
if (vertex_attribute_is_default[i]) {
input[i] = input_default_attributes[i];
continue;
}
// TODO(yuriks): In this case, no data gets loaded and the vertex
// remains with the last value it had. This isn't currently maintained
// as global state, however, and so won't work in Citra yet.
if (vertex_attribute_elements[i] == 0) {
LOG_ERROR(HW_GPU, "Vertex retension unimplemented");
continue;
}
// Load per-vertex data from the loader arrays
const PAddr source_addr =
base_address + vertex_attribute_sources[i] + vertex_attribute_strides[i] * vertex;
switch (vertex_attribute_formats[i]) {
case PipelineRegs::VertexAttributeFormat::BYTE:
LoadAttribute<s8>(source_addr, i, input);
break;
case PipelineRegs::VertexAttributeFormat::UBYTE:
LoadAttribute<u8>(source_addr, i, input);
break;
case PipelineRegs::VertexAttributeFormat::SHORT:
LoadAttribute<s16>(source_addr, i, input);
break;
case PipelineRegs::VertexAttributeFormat::FLOAT:
LoadAttribute<f32>(source_addr, i, input);
break;
}
// Default attribute values set if array elements have < 4 components. This
// is *not* carried over from the default attribute settings even if they're
// enabled for this attribute.
for (u32 comp = vertex_attribute_elements[i]; comp < 4; comp++) {
input[i][comp] = comp == 3 ? f24::One() : f24::Zero();
}
}
}
} // namespace Pica

47
src/video_core/pica/vertex_loader.h Normal file
View File

@ -0,0 +1,47 @@
// Copyright 2023 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include "core/memory.h"
#include "video_core/pica/output_vertex.h"
#include "video_core/pica/regs_pipeline.h"
namespace Memory {
class MemorySystem;
}
namespace Pica {
class VertexLoader {
public:
explicit VertexLoader(Memory::MemorySystem& memory_, const PipelineRegs& regs);
~VertexLoader();
void LoadVertex(PAddr base_address, u32 index, u32 vertex, AttributeBuffer& input,
AttributeBuffer& input_default_attributes) const;
template <typename T>
void LoadAttribute(PAddr source_addr, u32 attrib, AttributeBuffer& out) const {
const T* data = reinterpret_cast<const T*>(memory.GetPhysicalPointer(source_addr));
for (u32 comp = 0; comp < vertex_attribute_elements[attrib]; ++comp) {
out[attrib][comp] = f24::FromFloat32(data[comp]);
}
}
int GetNumTotalAttributes() const {
return num_total_attributes;
}
private:
Memory::MemorySystem& memory;
std::array<u32, 16> vertex_attribute_sources;
std::array<u32, 16> vertex_attribute_strides{};
std::array<PipelineRegs::VertexAttributeFormat, 16> vertex_attribute_formats;
std::array<u32, 16> vertex_attribute_elements{};
std::array<bool, 16> vertex_attribute_is_default;
int num_total_attributes = 0;
};
} // namespace Pica

255
src/video_core/pica_state.h
View File

@ -1,255 +0,0 @@
// Copyright 2016 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#pragma once
#include <array>
#include <boost/serialization/array.hpp>
#include <boost/serialization/split_member.hpp>
#include "common/bit_field.h"
#include "common/common_types.h"
#include "common/vector_math.h"
#include "core/memory.h"
#include "video_core/geometry_pipeline.h"
#include "video_core/primitive_assembly.h"
#include "video_core/regs.h"
#include "video_core/shader/shader.h"
#include "video_core/video_core.h"
// Boost::serialization doesn't like union types for some reason,
// so we need to mark arrays of union values with a special serialization method
template <typename Value, size_t Size>
struct UnionArray : public std::array<Value, Size> {
private:
template <class Archive>
void serialize(Archive& ar, const unsigned int) {
static_assert(sizeof(Value) == sizeof(u32));
ar&* static_cast<u32(*)[Size]>(static_cast<void*>(this->data()));
}
friend class boost::serialization::access;
};
namespace Pica {
/// Struct used to describe current Pica state
struct State {
State();
void Reset();
/// Pica registers
Regs regs;
Shader::ShaderSetup vs;
Shader::ShaderSetup gs;
Shader::AttributeBuffer input_default_attributes;
struct ProcTex {
union ValueEntry {
u32 raw;
// LUT value, encoded as 12-bit fixed point, with 12 fraction bits
BitField<0, 12, u32> value; // 0.0.12 fixed point
// Difference between two entry values. Used for efficient interpolation.
// 0.0.12 fixed point with two's complement. The range is [-0.5, 0.5).
// Note: the type of this is different from the one of lighting LUT
BitField<12, 12, s32> difference;
float ToFloat() const {
return static_cast<float>(value) / 4095.f;
}
float DiffToFloat() const {
return static_cast<float>(difference) / 4095.f;
}
};
union ColorEntry {
u32 raw;
BitField<0, 8, u32> r;
BitField<8, 8, u32> g;
BitField<16, 8, u32> b;
BitField<24, 8, u32> a;
Common::Vec4<u8> ToVector() const {
return {static_cast<u8>(r), static_cast<u8>(g), static_cast<u8>(b),
static_cast<u8>(a)};
}
};
union ColorDifferenceEntry {
u32 raw;
BitField<0, 8, s32> r; // half of the difference between two ColorEntry
BitField<8, 8, s32> g;
BitField<16, 8, s32> b;
BitField<24, 8, s32> a;
Common::Vec4<s32> ToVector() const {
return Common::Vec4<s32>{r, g, b, a} * 2;
}
};
UnionArray<ValueEntry, 128> noise_table;
UnionArray<ValueEntry, 128> color_map_table;
UnionArray<ValueEntry, 128> alpha_map_table;
UnionArray<ColorEntry, 256> color_table;
UnionArray<ColorDifferenceEntry, 256> color_diff_table;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const unsigned int file_version) {
ar& noise_table;
ar& color_map_table;
ar& alpha_map_table;
ar& color_table;
ar& color_diff_table;
}
} proctex;
struct Lighting {
union LutEntry {
// Used for raw access
u32 raw;
// LUT value, encoded as 12-bit fixed point, with 12 fraction bits
BitField<0, 12, u32> value; // 0.0.12 fixed point
// Used for efficient interpolation.
BitField<12, 11, u32> difference; // 0.0.11 fixed point
BitField<23, 1, u32> neg_difference;
float ToFloat() const {
return static_cast<float>(value) / 4095.f;
}
float DiffToFloat() const {
float diff = static_cast<float>(difference) / 2047.f;
return neg_difference ? -diff : diff;
}
template <class Archive>
void serialize(Archive& ar, const unsigned int file_version) {
ar& raw;
}
};
std::array<UnionArray<LutEntry, 256>, 24> luts;
} lighting;
struct {
union LutEntry {
// Used for raw access
u32 raw;
BitField<0, 13, s32> difference; // 1.1.11 fixed point
BitField<13, 11, u32> value; // 0.0.11 fixed point
float ToFloat() const {
return static_cast<float>(value) / 2047.0f;
}
float DiffToFloat() const {
return static_cast<float>(difference) / 2047.0f;
}
};
UnionArray<LutEntry, 128> lut;
} fog;
/// Current Pica command list
struct {
PAddr addr; // This exists only for serialization
const u32* head_ptr;
const u32* current_ptr;
u32 length;
} cmd_list;
/// Struct used to describe immediate mode rendering state
struct ImmediateModeState {
// Used to buffer partial vertices for immediate-mode rendering.
Shader::AttributeBuffer input_vertex;
// Index of the next attribute to be loaded into `input_vertex`.
u32 current_attribute = 0;
// Indicates the immediate mode just started and the geometry pipeline needs to reconfigure
bool reset_geometry_pipeline = true;
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const unsigned int file_version) {
ar& input_vertex;
ar& current_attribute;
ar& reset_geometry_pipeline;
}
} immediate;
// the geometry shader needs to be kept in the global state because some shaders relie on
// preserved register value across shader invocation.
// TODO: also bring the three vertex shader units here and implement the shader scheduler.
Shader::GSUnitState gs_unit;
GeometryPipeline geometry_pipeline;
// This is constructed with a dummy triangle topology
PrimitiveAssembler<Shader::OutputVertex> primitive_assembler;
int vs_float_regs_counter = 0;
std::array<u32, 4> vs_uniform_write_buffer{};
int gs_float_regs_counter = 0;
std::array<u32, 4> gs_uniform_write_buffer{};
int default_attr_counter = 0;
std::array<u32, 3> default_attr_write_buffer{};
private:
friend class boost::serialization::access;
template <class Archive>
void serialize(Archive& ar, const unsigned int file_version) {
ar& regs.reg_array;
ar& vs;
ar& gs;
ar& input_default_attributes;
ar& proctex;
ar& lighting.luts;
ar& fog.lut;
ar& cmd_list.addr;
ar& cmd_list.length;
ar& immediate;
ar& gs_unit;
ar& geometry_pipeline;
ar& primitive_assembler;
ar& vs_float_regs_counter;
ar& boost::serialization::make_array(vs_uniform_write_buffer.data(),
vs_uniform_write_buffer.size());
ar& gs_float_regs_counter;
ar& boost::serialization::make_array(gs_uniform_write_buffer.data(),
gs_uniform_write_buffer.size());
ar& default_attr_counter;
ar& boost::serialization::make_array(default_attr_write_buffer.data(),
default_attr_write_buffer.size());
boost::serialization::split_member(ar, *this, file_version);
}
template <class Archive>
void save(Archive& ar, const unsigned int file_version) const {
ar << static_cast<u32>(cmd_list.current_ptr - cmd_list.head_ptr);
}
template <class Archive>
void load(Archive& ar, const unsigned int file_version) {
u32 offset{};
ar >> offset;
cmd_list.head_ptr =
reinterpret_cast<u32*>(VideoCore::g_memory->GetPhysicalPointer(cmd_list.addr));
cmd_list.current_ptr = cmd_list.head_ptr + offset;
}
};
extern State g_state; ///< Current Pica state
} // namespace Pica

87
src/video_core/primitive_assembly.cpp
View File

@ -1,87 +0,0 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "common/logging/log.h"
#include "video_core/primitive_assembly.h"
#include "video_core/regs_pipeline.h"
#include "video_core/shader/shader.h"
namespace Pica {
template <typename VertexType>
PrimitiveAssembler<VertexType>::PrimitiveAssembler(PipelineRegs::TriangleTopology topology)
: topology(topology) {}
template <typename VertexType>
void PrimitiveAssembler<VertexType>::SubmitVertex(const VertexType& vtx,
const TriangleHandler& triangle_handler) {
switch (topology) {
case PipelineRegs::TriangleTopology::List:
case PipelineRegs::TriangleTopology::Shader:
if (buffer_index < 2) {
buffer[buffer_index++] = vtx;
} else {
buffer_index = 0;
if (topology == PipelineRegs::TriangleTopology::Shader && winding) {
triangle_handler(buffer[1], buffer[0], vtx);
winding = false;
} else {
triangle_handler(buffer[0], buffer[1], vtx);
}
}
break;
case PipelineRegs::TriangleTopology::Strip:
case PipelineRegs::TriangleTopology::Fan:
if (strip_ready)
triangle_handler(buffer[0], buffer[1], vtx);
buffer[buffer_index] = vtx;
strip_ready |= (buffer_index == 1);
if (topology == PipelineRegs::TriangleTopology::Strip)
buffer_index = !buffer_index;
else if (topology == PipelineRegs::TriangleTopology::Fan)
buffer_index = 1;
break;
default:
LOG_ERROR(HW_GPU, "Unknown triangle topology {:x}:", (int)topology);
break;
}
}
template <typename VertexType>
void PrimitiveAssembler<VertexType>::SetWinding() {
winding = true;
}
template <typename VertexType>
void PrimitiveAssembler<VertexType>::Reset() {
buffer_index = 0;
strip_ready = false;
winding = false;
}
template <typename VertexType>
void PrimitiveAssembler<VertexType>::Reconfigure(PipelineRegs::TriangleTopology topology) {
Reset();
this->topology = topology;
}
template <typename VertexType>
bool PrimitiveAssembler<VertexType>::IsEmpty() const {
return buffer_index == 0 && strip_ready == false;
}
template <typename VertexType>
PipelineRegs::TriangleTopology PrimitiveAssembler<VertexType>::GetTopology() const {
return topology;
}
// explicitly instantiate use cases
template struct PrimitiveAssembler<Shader::OutputVertex>;
} // namespace Pica

18
src/video_core/rasterizer_accelerated.cpp
View File

@ -2,10 +2,9 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <limits>
#include "common/alignment.h"
#include "core/memory.h"
#include "video_core/pica_state.h"
#include "video_core/pica/pica_core.h"
#include "video_core/rasterizer_accelerated.h"
namespace VideoCore {
@ -22,7 +21,7 @@ static Common::Vec3f LightColor(const Pica::LightingRegs::LightColor& color) {
return Common::Vec3u{color.r, color.g, color.b} / 255.0f;
}
RasterizerAccelerated::HardwareVertex::HardwareVertex(const Pica::Shader::OutputVertex& v,
RasterizerAccelerated::HardwareVertex::HardwareVertex(const Pica::OutputVertex& v,
bool flip_quaternion) {
position[0] = v.pos.x.ToFloat32();
position[1] = v.pos.y.ToFloat32();
@ -52,8 +51,8 @@ RasterizerAccelerated::HardwareVertex::HardwareVertex(const Pica::Shader::Output
}
}
RasterizerAccelerated::RasterizerAccelerated(Memory::MemorySystem& memory_)
: memory{memory_}, regs{Pica::g_state.regs} {
RasterizerAccelerated::RasterizerAccelerated(Memory::MemorySystem& memory_, Pica::PicaCore& pica_)
: memory{memory_}, pica{pica_}, regs{pica.regs.internal} {
fs_uniform_block_data.lighting_lut_dirty.fill(true);
}
@ -82,9 +81,8 @@ static bool AreQuaternionsOpposite(Common::Vec4<f24> qa, Common::Vec4<f24> qb) {
return (Common::Dot(a, b) < 0.f);
}
void RasterizerAccelerated::AddTriangle(const Pica::Shader::OutputVertex& v0,
const Pica::Shader::OutputVertex& v1,
const Pica::Shader::OutputVertex& v2) {
void RasterizerAccelerated::AddTriangle(const Pica::OutputVertex& v0, const Pica::OutputVertex& v1,
const Pica::OutputVertex& v2) {
vertex_batch.emplace_back(v0, false);
vertex_batch.emplace_back(v1, AreQuaternionsOpposite(v0.quat, v1.quat));
vertex_batch.emplace_back(v2, AreQuaternionsOpposite(v0.quat, v2.quat));
@ -146,7 +144,7 @@ void RasterizerAccelerated::SyncEntireState() {
}
SyncGlobalAmbient();
for (unsigned light_index = 0; light_index < 8; light_index++) {
for (u32 light_index = 0; light_index < 8; light_index++) {
SyncLightSpecular0(light_index);
SyncLightSpecular1(light_index);
SyncLightDiffuse(light_index);
@ -162,7 +160,7 @@ void RasterizerAccelerated::SyncEntireState() {
SyncShadowBias();
SyncShadowTextureBias();
for (unsigned tex_index = 0; tex_index < 3; tex_index++) {
for (u32 tex_index = 0; tex_index < 3; tex_index++) {
SyncTextureLodBias(tex_index);
}
}

20
src/video_core/rasterizer_accelerated.h
View File

@ -6,7 +6,6 @@
#include "common/vector_math.h"
#include "video_core/rasterizer_interface.h"
#include "video_core/regs_texturing.h"
#include "video_core/shader/generator/pica_fs_config.h"
#include "video_core/shader/generator/shader_uniforms.h"
@ -15,19 +14,21 @@ class MemorySystem;
}
namespace Pica {
struct Regs;
class PicaCore;
}
namespace VideoCore {
class RasterizerAccelerated : public RasterizerInterface {
public:
RasterizerAccelerated(Memory::MemorySystem& memory);
explicit RasterizerAccelerated(Memory::MemorySystem& memory, Pica::PicaCore& pica);
virtual ~RasterizerAccelerated() = default;
void AddTriangle(const Pica::Shader::OutputVertex& v0, const Pica::Shader::OutputVertex& v1,
const Pica::Shader::OutputVertex& v2) override;
void AddTriangle(const Pica::OutputVertex& v0, const Pica::OutputVertex& v1,
const Pica::OutputVertex& v2) override;
void NotifyPicaRegisterChanged(u32 id) override;
void SyncEntireState() override;
protected:
@ -128,7 +129,7 @@ protected:
/// Structure that the hardware rendered vertices are composed of
struct HardwareVertex {
HardwareVertex() = default;
HardwareVertex(const Pica::Shader::OutputVertex& v, bool flip_quaternion);
HardwareVertex(const Pica::OutputVertex& v, bool flip_quaternion);
Common::Vec4f position;
Common::Vec4f color;
@ -151,7 +152,8 @@ protected:
protected:
Memory::MemorySystem& memory;
Pica::Regs& regs;
Pica::PicaCore& pica;
Pica::RegsInternal& regs;
std::vector<HardwareVertex> vertex_batch;
Pica::Shader::UserConfig user_config{};
@ -159,8 +161,8 @@ protected:
VSUniformBlockData vs_uniform_block_data{};
FSUniformBlockData fs_uniform_block_data{};
std::array<std::array<Common::Vec2f, 256>, Pica::LightingRegs::NumLightingSampler>
lighting_lut_data{};
using LightLUT = std::array<Common::Vec2f, 256>;
std::array<LightLUT, Pica::LightingRegs::NumLightingSampler> lighting_lut_data{};
std::array<Common::Vec2f, 128> fog_lut_data{};
std::array<Common::Vec2f, 128> proctex_noise_lut_data{};
std::array<Common::Vec2f, 128> proctex_color_map_data{};

2
src/video_core/rasterizer_cache/framebuffer_base.h
View File

@ -6,9 +6,9 @@
#include "common/hash.h"
#include "common/math_util.h"
#include "video_core/pica/regs_rasterizer.h"
#include "video_core/rasterizer_cache/slot_id.h"
#include "video_core/rasterizer_cache/surface_params.h"
#include "video_core/regs_rasterizer.h"
namespace VideoCore {

13
src/video_core/rasterizer_cache/pixel_format.cpp
View File

@ -2,6 +2,7 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include "video_core/pica/regs_external.h"
#include "video_core/rasterizer_cache/pixel_format.h"
namespace VideoCore {
@ -134,17 +135,17 @@ PixelFormat PixelFormatFromDepthFormat(Pica::FramebufferRegs::DepthFormat format
}
}
PixelFormat PixelFormatFromGPUPixelFormat(GPU::Regs::PixelFormat format) {
PixelFormat PixelFormatFromGPUPixelFormat(Pica::PixelFormat format) {
switch (format) {
case GPU::Regs::PixelFormat::RGBA8:
case Pica::PixelFormat::RGBA8:
return PixelFormat::RGBA8;
case GPU::Regs::PixelFormat::RGB8:
case Pica::PixelFormat::RGB8:
return PixelFormat::RGB8;
case GPU::Regs::PixelFormat::RGB565:
case Pica::PixelFormat::RGB565:
return PixelFormat::RGB565;
case GPU::Regs::PixelFormat::RGB5A1:
case Pica::PixelFormat::RGB5A1:
return PixelFormat::RGB5A1;
case GPU::Regs::PixelFormat::RGBA4:
case Pica::PixelFormat::RGBA4:
return PixelFormat::RGBA4;
default:
return PixelFormat::Invalid;

11
src/video_core/rasterizer_cache/pixel_format.h
View File

@ -6,9 +6,12 @@
#include <limits>
#include <string_view>
#include "core/hw/gpu.h"
#include "video_core/regs_framebuffer.h"
#include "video_core/regs_texturing.h"
#include "video_core/pica/regs_framebuffer.h"
#include "video_core/pica/regs_texturing.h"
namespace Pica {
enum class PixelFormat : u32;
}
namespace VideoCore {
@ -109,6 +112,6 @@ PixelFormat PixelFormatFromColorFormat(Pica::FramebufferRegs::ColorFormat format
PixelFormat PixelFormatFromDepthFormat(Pica::FramebufferRegs::DepthFormat format);
PixelFormat PixelFormatFromGPUPixelFormat(GPU::Regs::PixelFormat format);
PixelFormat PixelFormatFromGPUPixelFormat(Pica::PixelFormat format);
} // namespace VideoCore

16
src/video_core/rasterizer_cache/rasterizer_cache.h
View File

@ -14,9 +14,10 @@
#include "common/settings.h"
#include "core/memory.h"
#include "video_core/custom_textures/custom_tex_manager.h"
#include "video_core/pica/regs_external.h"
#include "video_core/pica/regs_internal.h"
#include "video_core/rasterizer_cache/rasterizer_cache_base.h"
#include "video_core/rasterizer_cache/surface_base.h"
#include "video_core/regs.h"
#include "video_core/renderer_base.h"
#include "video_core/texture/texture_decode.h"
@ -34,7 +35,7 @@ constexpr auto RangeFromInterval(const auto& map, const auto& interval) {
template <class T>
RasterizerCache<T>::RasterizerCache(Memory::MemorySystem& memory_,
CustomTexManager& custom_tex_manager_, Runtime& runtime_,
Pica::Regs& regs_, RendererBase& renderer_)
Pica::RegsInternal& regs_, RendererBase& renderer_)
: memory{memory_}, custom_tex_manager{custom_tex_manager_}, runtime{runtime_}, regs{regs_},
renderer{renderer_}, resolution_scale_factor{renderer.GetResolutionScaleFactor()},
filter{Settings::values.texture_filter.GetValue()},
@ -151,7 +152,7 @@ void RasterizerCache<T>::RemoveTextureCubeFace(SurfaceId surface_id) {
}
template <class T>
bool RasterizerCache<T>::AccelerateTextureCopy(const GPU::Regs::DisplayTransferConfig& config) {
bool RasterizerCache<T>::AccelerateTextureCopy(const Pica::DisplayTransferConfig& config) {
const DebugScope scope{runtime, Common::Vec4f{0.f, 0.f, 1.f, 1.f},
"RasterizerCache::AccelerateTextureCopy ({})", config.DebugName()};
@ -249,7 +250,7 @@ bool RasterizerCache<T>::AccelerateTextureCopy(const GPU::Regs::DisplayTransferC
}
template <class T>
bool RasterizerCache<T>::AccelerateDisplayTransfer(const GPU::Regs::DisplayTransferConfig& config) {
bool RasterizerCache<T>::AccelerateDisplayTransfer(const Pica::DisplayTransferConfig& config) {
const DebugScope scope{runtime, Common::Vec4f{0.f, 0.f, 1.f, 1.f},
"RasterizerCache::AccelerateDisplayTransfer ({})", config.DebugName()};
@ -274,10 +275,9 @@ bool RasterizerCache<T>::AccelerateDisplayTransfer(const GPU::Regs::DisplayTrans
// Using flip_vertically alongside crop_input_lines produces skewed output on hardware.
// We have to emulate this because some games rely on this behaviour to render correctly.
if (config.flip_vertically && config.crop_input_lines &&
config.input_width > config.output_width) {
if (config.flip_vertically && config.crop_input_lines) {
dst_params.addr += (config.input_width - config.output_width) * (config.output_height - 1) *
GPU::Regs::BytesPerPixel(config.output_format);
Pica::BytesPerPixel(config.output_format);
}
auto [src_surface_id, src_rect] = GetSurfaceSubRect(src_params, ScaleMatch::Ignore, true);
@ -320,7 +320,7 @@ bool RasterizerCache<T>::AccelerateDisplayTransfer(const GPU::Regs::DisplayTrans
}
template <class T>
bool RasterizerCache<T>::AccelerateFill(const GPU::Regs::MemoryFillConfig& config) {
bool RasterizerCache<T>::AccelerateFill(const Pica::MemoryFillConfig& config) {
const DebugScope scope{runtime, Common::Vec4f{1.f, 0.f, 1.f, 1.f},
"RasterizerCache::AccelerateFill ({})", config.DebugName()};

17
src/video_core/rasterizer_cache/rasterizer_cache_base.h
View File

@ -12,6 +12,7 @@
#include <vector>
#include <boost/icl/interval_map.hpp>
#include <tsl/robin_map.h>
#include "video_core/rasterizer_cache/framebuffer_base.h"
#include "video_core/rasterizer_cache/sampler_params.h"
#include "video_core/rasterizer_cache/surface_params.h"
@ -22,8 +23,10 @@ class MemorySystem;
}
namespace Pica {
struct Regs;
}
struct RegsInternal;
struct DisplayTransferConfig;
struct MemoryFillConfig;
} // namespace Pica
namespace Pica::Texture {
struct TextureInfo;
@ -74,20 +77,20 @@ class RasterizerCache {
public:
explicit RasterizerCache(Memory::MemorySystem& memory, CustomTexManager& custom_tex_manager,
Runtime& runtime, Pica::Regs& regs, RendererBase& renderer);
Runtime& runtime, Pica::RegsInternal& regs, RendererBase& renderer);
~RasterizerCache();
/// Notify the cache that a new frame has been queued
void TickFrame();
/// Perform hardware accelerated texture copy according to the provided configuration
bool AccelerateTextureCopy(const GPU::Regs::DisplayTransferConfig& config);
bool AccelerateTextureCopy(const Pica::DisplayTransferConfig& config);
/// Perform hardware accelerated display transfer according to the provided configuration
bool AccelerateDisplayTransfer(const GPU::Regs::DisplayTransferConfig& config);
bool AccelerateDisplayTransfer(const Pica::DisplayTransferConfig& config);
/// Perform hardware accelerated memory fill according to the provided configuration
bool AccelerateFill(const GPU::Regs::MemoryFillConfig& config);
bool AccelerateFill(const Pica::MemoryFillConfig& config);
/// Returns a reference to the surface object assigned to surface_id
Surface& GetSurface(SurfaceId surface_id);
@ -212,7 +215,7 @@ private:
Memory::MemorySystem& memory;
CustomTexManager& custom_tex_manager;
Runtime& runtime;
Pica::Regs& regs;
Pica::RegsInternal& regs;
RendererBase& renderer;
std::unordered_map<TextureCubeConfig, TextureCube> texture_cube_cache;
tsl::robin_pg_map<u64, std::vector<SurfaceId>, Common::IdentityHash<u64>> page_table;

Some files were not shown because too many files have changed in this diff Show More