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https://github.com/PabloMK7/citra.git
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VFP: Log as trace to get rid of spamming.
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@ -67,7 +67,7 @@ static struct vfp_single vfp_single_default_qnan = {
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static void vfp_single_dump(const char *str, struct vfp_single *s)
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{
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LOG_DEBUG(Core_ARM11, "%s: sign=%d exponent=%d significand=%08x",
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LOG_TRACE(Core_ARM11, "%s: sign=%d exponent=%d significand=%08x",
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str, s->sign != 0, s->exponent, s->significand);
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}
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@ -158,7 +158,7 @@ u32 vfp_single_normaliseround(ARMul_State* state, int sd, struct vfp_single *vs,
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} else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0))
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incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1;
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LOG_DEBUG(Core_ARM11, "rounding increment = 0x%08x", incr);
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LOG_TRACE(Core_ARM11, "rounding increment = 0x%08x", incr);
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/*
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* Is our rounding going to overflow?
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@ -213,7 +213,7 @@ pack:
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vfp_single_dump("pack: final", vs);
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{
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s32 d = vfp_single_pack(vs);
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LOG_DEBUG(Core_ARM11, "%s: d(s%d)=%08x exceptions=%08x", func,
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LOG_TRACE(Core_ARM11, "%s: d(s%d)=%08x exceptions=%08x", func,
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sd, d, exceptions);
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vfp_put_float(state, d, sd);
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}
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@ -304,7 +304,7 @@ u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand)
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u32 z, a;
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if ((significand & 0xc0000000) != 0x40000000) {
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LOG_DEBUG(Core_ARM11, "invalid significand");
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LOG_TRACE(Core_ARM11, "invalid significand");
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}
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a = significand << 1;
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@ -394,7 +394,7 @@ sqrt_invalid:
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term = (u64)vsd.significand * vsd.significand;
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rem = ((u64)vsm.significand << 32) - term;
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LOG_DEBUG(Core_ARM11, "term=%016" PRIx64 "rem=%016" PRIx64, term, rem);
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LOG_TRACE(Core_ARM11, "term=%016" PRIx64 "rem=%016" PRIx64, term, rem);
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while (rem < 0) {
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vsd.significand -= 1;
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@ -626,7 +626,7 @@ static u32 vfp_single_ftoui(ARMul_State* state, int sd, int unused, s32 m, u32 f
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}
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}
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LOG_DEBUG(Core_ARM11, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
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LOG_TRACE(Core_ARM11, "ftoui: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
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vfp_put_float(state, d, sd);
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@ -705,7 +705,7 @@ static u32 vfp_single_ftosi(ARMul_State* state, int sd, int unused, s32 m, u32 f
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}
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}
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LOG_DEBUG(Core_ARM11, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
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LOG_TRACE(Core_ARM11, "ftosi: d(s%d)=%08x exceptions=%08x", sd, d, exceptions);
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vfp_put_float(state, (s32)d, sd);
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@ -873,7 +873,7 @@ vfp_single_multiply(struct vfp_single *vsd, struct vfp_single *vsn, struct vfp_s
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struct vfp_single *t = vsn;
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vsn = vsm;
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vsm = t;
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LOG_DEBUG(Core_ARM11, "swapping M <-> N");
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LOG_TRACE(Core_ARM11, "swapping M <-> N");
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}
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vsd->sign = vsn->sign ^ vsm->sign;
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@ -926,7 +926,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
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s32 v;
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v = vfp_get_float(state, sn);
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, v);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, v);
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vfp_single_unpack(&vsn, v, &fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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vfp_single_normalise_denormal(&vsn);
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@ -941,7 +941,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
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vsp.sign = vfp_sign_negate(vsp.sign);
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v = vfp_get_float(state, sd);
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, v);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sd, v);
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vfp_single_unpack(&vsn, v, &fpscr);
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if (vsn.exponent == 0 && vsn.significand != 0)
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vfp_single_normalise_denormal(&vsn);
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@ -963,7 +963,7 @@ vfp_single_multiply_accumulate(ARMul_State* state, int sd, int sn, s32 m, u32 fp
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*/
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static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd);
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, 0, "fmac");
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}
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@ -973,7 +973,7 @@ static u32 vfp_single_fmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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// TODO: this one has its arguments inverted, investigate.
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sd, sn);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sd, sn);
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac");
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}
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@ -982,7 +982,7 @@ static u32 vfp_single_fnmac(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
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*/
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static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd);
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc");
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}
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@ -991,7 +991,7 @@ static u32 vfp_single_fmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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*/
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static u32 vfp_single_fnmsc(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd);
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return vfp_single_multiply_accumulate(state, sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc");
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}
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@ -1004,7 +1004,7 @@ static u32 vfp_single_fmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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u32 exceptions;
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s32 n = vfp_get_float(state, sn);
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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@ -1027,7 +1027,7 @@ static u32 vfp_single_fnmul(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr
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u32 exceptions;
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s32 n = vfp_get_float(state, sn);
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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if (vsn.exponent == 0 && vsn.significand)
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@ -1051,7 +1051,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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u32 exceptions;
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s32 n = vfp_get_float(state, sn);
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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/*
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* Unpack and normalise denormals.
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@ -1074,7 +1074,7 @@ static u32 vfp_single_fadd(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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*/
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static u32 vfp_single_fsub(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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{
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, sd);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, sd);
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/*
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* Subtraction is addition with one sign inverted.
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*/
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@ -1094,7 +1094,7 @@ static u32 vfp_single_fdiv(ARMul_State* state, int sd, int sn, s32 m, u32 fpscr)
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s32 n = vfp_get_float(state, sn);
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int tm, tn;
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LOG_DEBUG(Core_ARM11, "s%u = %08x", sn, n);
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LOG_TRACE(Core_ARM11, "s%u = %08x", sn, n);
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vfp_single_unpack(&vsn, n, &fpscr);
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vfp_single_unpack(&vsm, m, &fpscr);
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@ -1241,7 +1241,7 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
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else
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veclen = fpscr & FPSCR_LENGTH_MASK;
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LOG_DEBUG(Core_ARM11, "vecstride=%u veclen=%u", vecstride,
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LOG_TRACE(Core_ARM11, "vecstride=%u veclen=%u", vecstride,
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(veclen >> FPSCR_LENGTH_BIT) + 1);
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if (!fop->fn) {
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@ -1257,16 +1257,16 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
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type = (fop->flags & OP_DD) ? 'd' : 's';
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if (op == FOP_EXT)
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LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = op[%u] (s%u=%08x)",
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LOG_TRACE(Core_ARM11, "itr%d (%c%u) = op[%u] (s%u=%08x)",
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
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sm, m);
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else
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LOG_DEBUG(Core_ARM11, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)",
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LOG_TRACE(Core_ARM11, "itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)",
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vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
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FOP_TO_IDX(op), sm, m);
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except = fop->fn(state, dest, sn, m, fpscr);
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LOG_DEBUG(Core_ARM11, "itr%d: exceptions=%08x",
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LOG_TRACE(Core_ARM11, "itr%d: exceptions=%08x",
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vecitr >> FPSCR_LENGTH_BIT, except);
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exceptions |= except;
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