Cool_Tools/citra-mk7
1
0
Fork 0
mirror of https://github.com/PabloMK7/citra.git synced 2024-11-17 20:37:18 +01:00
Code Issues Packages Projects Releases Wiki Activity

Try to add support for VFP registers

Browse Source
This commit is contained in:
polaris- 2015-10-21 07:14:43 -04:00
parent 9f66580d7e
commit 53aa55fcaa
1 changed files with 21 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
src/core/gdbstub/gdbstub.cpp
View File

@ -56,6 +56,7 @@ const u32 MSG_WAITALL = 8;
const u32 R0_REGISTER = 0;
const u32 R15_REGISTER = 15;
const u32 CSPR_REGISTER = 25;
const u32 FPSCR_REGISTER = 58;
namespace GDBStub {
@ -468,6 +469,10 @@ static void ReadRegister() {
IntToHex(reply, Core::g_app_core->GetReg(id));
} else if (id == CSPR_REGISTER) {
IntToHex(reply, Core::g_app_core->GetCPSR());
} else if (id > CSPR_REGISTER && id < FPSCR_REGISTER) {
IntToHex(reply, Core::g_app_core->GetVFPReg(id - CSPR_REGISTER - 1)); // VFP registers should start at 26, so one after CSPR_REGISTER
} else if (id == FPSCR_REGISTER) {
IntToHex(reply, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR)); // Get FPSCR
} else {
return SendReply("E01");
}
@ -481,15 +486,19 @@ static void ReadRegisters() {
memset(buffer, 0, sizeof(buffer));
u8* bufptr = buffer;
for (int i = 0; i <= CSPR_REGISTER; i++) {
for (int i = 0; i <= FPSCR_REGISTER; i++) {
if (i <= R15_REGISTER) {
IntToHex(bufptr + i * 8, Core::g_app_core->GetReg(i));
} else if (i == CSPR_REGISTER) {
IntToHex(bufptr + i * 8, Core::g_app_core->GetCPSR());
} else {
} else if (i < CSPR_REGISTER) {
IntToHex(bufptr + i * 8, 0);
IntToHex(bufptr + (i + 1) * 8, 0);
i++; // These registers seem to be all 64bit instead of 32bit, so skip two instead of one
} else if (i > CSPR_REGISTER && i < FPSCR_REGISTER) {
IntToHex(bufptr + i * 8, Core::g_app_core->GetVFPReg(i - CSPR_REGISTER - 1));
} else if (i == FPSCR_REGISTER) {
IntToHex(bufptr + i * 8, Core::g_app_core->GetVFPSystemReg(VFP_FPSCR));
}
}
@ -511,6 +520,10 @@ static void WriteRegister() {
Core::g_app_core->SetReg(id, HexToInt(buffer_ptr));
} else if (id == CSPR_REGISTER) {
Core::g_app_core->SetCPSR(HexToInt(buffer_ptr));
} else if (id > CSPR_REGISTER && id < FPSCR_REGISTER) {
Core::g_app_core->SetVFPReg(id - CSPR_REGISTER - 1, HexToInt(buffer_ptr));
} else if (id == FPSCR_REGISTER) {
Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, HexToInt(buffer_ptr));
} else {
return SendReply("E01");
}
@ -525,13 +538,17 @@ static void WriteRegisters() {
if (command_buffer[0] != 'G')
return SendReply("E01");
for (int i = 0; i <= CSPR_REGISTER; i++) {
for (int i = 0; i <= FPSCR_REGISTER; i++) {
if (i <= R15_REGISTER) {
Core::g_app_core->SetReg(i, HexToInt(buffer_ptr + i * 8));
} else if (i == CSPR_REGISTER) {
Core::g_app_core->SetCPSR(HexToInt(buffer_ptr + i * 8));
} else {
} else if (i < CSPR_REGISTER) {
i++; // These registers seem to be all 64bit instead of 32bit, so skip two instead of one
} else if (i > CSPR_REGISTER && i < FPSCR_REGISTER) {
Core::g_app_core->SetVFPReg(i - CSPR_REGISTER - 1, HexToInt(buffer_ptr + i * 8));
} else if (i == FPSCR_REGISTER) {
Core::g_app_core->SetVFPSystemReg(VFP_FPSCR, HexToInt(buffer_ptr + i * 8));
}
}