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https://github.com/PabloMK7/citra.git
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166 lines
5.6 KiB
C++
166 lines
5.6 KiB
C++
// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "common/common.h"
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#include "core/mem_map.h"
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#include "core/hw/hw.h"
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#include "hle/hle.h"
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namespace Memory {
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/// Convert a physical address to virtual address
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u32 _AddressPhysicalToVirtual(const u32 addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is obviously quite hacky... But we're not doing
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// any MMU emulation yet or anything
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if (((addr & 0xF0000000) == MEM_FCRAM_PADDR) && (addr < (MEM_FCRAM_PADDR_END))) {
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return (addr & MEM_FCRAM_MASK) | MEM_FCRAM_VADDR;
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}
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return addr;
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}
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template <typename T>
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inline void _Read(T &var, const u32 addr) {
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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const u32 vaddr = _AddressPhysicalToVirtual(addr);
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// Memory allocated for HLE use that can be addressed from the emulated application
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// The primary use of this is sharing a commandbuffer between the HLE OS (syscore) and the LLE
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// core running the user application (appcore)
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if (vaddr >= HLE::CMD_BUFFER_ADDR && vaddr < HLE::CMD_BUFFER_ADDR_END) {
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HLE::Read<T>(var, vaddr);
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// Hardware I/O register reads
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// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
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} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
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HW::Read<T>(var, vaddr);
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// FCRAM
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} else if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
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var = *((const T*)&g_fcram[vaddr & MEM_FCRAM_MASK]);
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/*else if ((vaddr & 0x3F800000) == 0x04000000) {
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var = *((const T*)&m_pVRAM[vaddr & VRAM_MASK]);*/
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} else {
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_assert_msg_(MEMMAP, false, "unknown Read%d @ 0x%08X", sizeof(var) * 8, vaddr);
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}
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}
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template <typename T>
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inline void _Write(u32 addr, const T data) {
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u32 vaddr = _AddressPhysicalToVirtual(addr);
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// Memory allocated for HLE use that can be addressed from the emulated application
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// The primary use of this is sharing a commandbuffer between the HLE OS (syscore) and the LLE
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// core running the user application (appcore)
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if (vaddr >= HLE::CMD_BUFFER_ADDR && vaddr < HLE::CMD_BUFFER_ADDR_END) {
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HLE::Write<T>(vaddr, data);
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// Hardware I/O register writes
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// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
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} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
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HW::Write<T>(vaddr, data);
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// ExeFS:/.code is loaded here:
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} else if ((vaddr & 0xFFF00000) == 0x00100000) {
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// TODO(ShizZy): This is dumb... handle correctly. From 3DBrew:
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// http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions
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// The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when
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// the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only
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// applies when this flag is clear. Executables are usually loaded to 0x14000000 when the
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// exheader "special memory" flag is set, however this address can be arbitrary.
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*(T*)&g_fcram[vaddr & MEM_FCRAM_MASK] = data;
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// FCRAM
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} else if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
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*(T*)&g_fcram[vaddr & MEM_FCRAM_MASK] = data;
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} else if ((vaddr & 0xFF000000) == 0x14000000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
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} else if ((vaddr & 0xFFF00000) == 0x1EC00000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
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} else if ((vaddr & 0xFF000000) == 0x1F000000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
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} else if ((vaddr & 0xFFF00000) == 0x1FF00000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
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} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
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} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
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_assert_msg_(MEMMAP, false, "umimplemented write to shared page");
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// Error out...
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} else {
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_assert_msg_(MEMMAP, false, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8,
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data, vaddr);
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}
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}
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u8 *GetPointer(const u32 addr) {
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const u32 vaddr = _AddressPhysicalToVirtual(addr);
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// FCRAM
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if ((vaddr > MEM_FCRAM_VADDR) && (vaddr < MEM_FCRAM_VADDR_END)) {
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return g_fcram + (vaddr & MEM_FCRAM_MASK);
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} else {
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ERROR_LOG(MEMMAP, "Unknown GetPointer @ 0x%08x", vaddr);
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return 0;
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}
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}
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u8 Read8(const u32 addr) {
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u8 _var = 0;
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_Read<u8>(_var, addr);
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return (u8)_var;
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}
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u16 Read16(const u32 addr) {
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u16_le _var = 0;
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_Read<u16_le>(_var, addr);
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return (u16)_var;
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}
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u32 Read32(const u32 addr) {
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u32_le _var = 0;
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_Read<u32_le>(_var, addr);
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return _var;
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}
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u64 Read64(const u32 addr) {
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u64_le _var = 0;
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_Read<u64_le>(_var, addr);
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return _var;
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}
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u32 Read8_ZX(const u32 addr) {
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return (u32)Read8(addr);
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}
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u32 Read16_ZX(const u32 addr) {
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return (u32)Read16(addr);
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}
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void Write8(const u32 addr, const u8 data) {
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_Write<u8>(addr, data);
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}
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void Write16(const u32 addr, const u16 data) {
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_Write<u16_le>(addr, data);
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}
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void Write32(const u32 addr, const u32 data) {
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_Write<u32_le>(addr, data);
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}
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void Write64(const u32 addr, const u64 data) {
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_Write<u64_le>(addr, data);
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}
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} // namespace
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