mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-12-01 03:07:17 +01:00
Sse optimized the Scalar & Vector fp-to-fp conversion instructions (MNPZ & IX); added the related Tests (AMNPZ & IX). Small refactoring of existing instructions. (#676)
* Nit. * Update InstEmitSimdCvt.cs * Update VectorHelper.cs * Update InstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Superseded.
This commit is contained in:
LDj3SNuD
jduncanator
parent
0d69d8e6c1
commit
16de171c44
@ -1382,13 +1382,10 @@ namespace ChocolArm64.Instructions
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public static void Frinta_S(ILEmitterCtx context)
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public static void Frinta_S(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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EmitScalarUnaryOpF(context, () =>
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{
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EmitVectorExtractF(context, op.Rn, 0, op.Size);
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EmitRoundMathCall(context, MidpointRounding.AwayFromZero);
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EmitRoundMathCall(context, MidpointRounding.AwayFromZero);
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});
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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}
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public static void Frinta_V(ILEmitterCtx context)
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public static void Frinta_V(ILEmitterCtx context)
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@ -1403,6 +1400,26 @@ namespace ChocolArm64.Instructions
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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if (Optimizations.UseSse41)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
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context.EmitLdvec(op.Rn);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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if (op.Size == 0)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41ScalarRoundF));
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}
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else /* if (op.Size == 1) */
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41ScalarRound));
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}
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context.EmitStvec(op.Rd);
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}
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else
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{
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EmitScalarUnaryOpF(context, () =>
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EmitScalarUnaryOpF(context, () =>
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{
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{
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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@ -1411,16 +1428,13 @@ namespace ChocolArm64.Instructions
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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}
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}
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else if (op.Size == 1)
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else /* if (op.Size == 1) */
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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}
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}
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else
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{
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throw new InvalidOperationException();
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}
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});
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});
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}
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}
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}
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public static void Frinti_V(ILEmitterCtx context)
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public static void Frinti_V(ILEmitterCtx context)
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{
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{
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@ -1428,6 +1442,30 @@ namespace ChocolArm64.Instructions
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int sizeF = op.Size & 1;
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int sizeF = op.Size & 1;
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if (Optimizations.UseSse41)
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{
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context.EmitLdvec(op.Rn);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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if (sizeF == 0)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorRoundF));
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}
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else /* if (sizeF == 1) */
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorRound));
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}
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context.EmitStvec(op.Rd);
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if (sizeF == 0 && op.RegisterSize == RegisterSize.Simd64)
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{
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EmitVectorZeroUpper(context, op.Rd);
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}
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}
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else
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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@ -1436,72 +1474,128 @@ namespace ChocolArm64.Instructions
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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}
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}
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else if (sizeF == 1)
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else /* if (sizeF == 1) */
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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}
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}
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else
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{
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throw new InvalidOperationException();
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}
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});
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});
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}
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}
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}
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public static void Frintm_S(ILEmitterCtx context)
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public static void Frintm_S(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsMinusInfinity, scalar: true);
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}
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else
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{
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{
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EmitScalarUnaryOpF(context, () =>
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EmitScalarUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Floor));
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EmitUnaryMathCall(context, nameof(Math.Floor));
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});
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});
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}
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}
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}
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public static void Frintm_V(ILEmitterCtx context)
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public static void Frintm_V(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsMinusInfinity, scalar: false);
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}
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else
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{
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Floor));
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EmitUnaryMathCall(context, nameof(Math.Floor));
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});
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});
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}
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}
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}
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public static void Frintn_S(ILEmitterCtx context)
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public static void Frintn_S(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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if (Optimizations.UseSse41)
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{
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EmitVectorExtractF(context, op.Rn, 0, op.Size);
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EmitSse41Frint(context, RoundMode.ToNearest, scalar: true);
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}
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else
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{
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EmitScalarUnaryOpF(context, () =>
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{
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EmitRoundMathCall(context, MidpointRounding.ToEven);
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EmitRoundMathCall(context, MidpointRounding.ToEven);
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});
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EmitScalarSetF(context, op.Rd, op.Size);
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}
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}
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}
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public static void Frintn_V(ILEmitterCtx context)
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public static void Frintn_V(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.ToNearest, scalar: false);
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}
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else
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{
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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EmitRoundMathCall(context, MidpointRounding.ToEven);
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EmitRoundMathCall(context, MidpointRounding.ToEven);
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});
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});
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}
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}
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}
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public static void Frintp_S(ILEmitterCtx context)
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public static void Frintp_S(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsPlusInfinity, scalar: true);
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}
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else
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{
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{
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EmitScalarUnaryOpF(context, () =>
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EmitScalarUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Ceiling));
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EmitUnaryMathCall(context, nameof(Math.Ceiling));
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});
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});
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}
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}
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}
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public static void Frintp_V(ILEmitterCtx context)
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public static void Frintp_V(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsPlusInfinity, scalar: false);
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}
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else
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{
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Ceiling));
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EmitUnaryMathCall(context, nameof(Math.Ceiling));
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});
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});
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}
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}
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}
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public static void Frintx_S(ILEmitterCtx context)
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public static void Frintx_S(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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if (Optimizations.UseSse41)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
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context.EmitLdvec(op.Rn);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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if (op.Size == 0)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41ScalarRoundF));
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}
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else /* if (op.Size == 1) */
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41ScalarRound));
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}
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context.EmitStvec(op.Rd);
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}
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else
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{
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EmitScalarUnaryOpF(context, () =>
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EmitScalarUnaryOpF(context, () =>
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{
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{
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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@ -1510,55 +1604,89 @@ namespace ChocolArm64.Instructions
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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}
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}
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else if (op.Size == 1)
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else /* if (op.Size == 1) */
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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}
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}
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else
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{
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throw new InvalidOperationException();
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}
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});
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});
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}
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}
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}
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public static void Frintx_V(ILEmitterCtx context)
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public static void Frintx_V(ILEmitterCtx context)
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{
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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int sizeF = op.Size & 1;
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if (Optimizations.UseSse41)
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{
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context.EmitLdvec(op.Rn);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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if (sizeF == 0)
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorRoundF));
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}
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else /* if (sizeF == 1) */
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Sse41VectorRound));
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}
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context.EmitStvec(op.Rd);
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if (sizeF == 0 && op.RegisterSize == RegisterSize.Simd64)
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{
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EmitVectorZeroUpper(context, op.Rd);
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}
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}
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else
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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if (op.Size == 0)
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if (sizeF == 0)
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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VectorHelper.EmitCall(context, nameof(VectorHelper.RoundF));
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}
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}
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else if (op.Size == 1)
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else /* if (sizeF == 1) */
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{
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{
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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VectorHelper.EmitCall(context, nameof(VectorHelper.Round));
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}
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}
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else
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{
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throw new InvalidOperationException();
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}
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});
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});
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}
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}
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}
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public static void Frintz_S(ILEmitterCtx context)
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public static void Frintz_S(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsZero, scalar: true);
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}
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else
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{
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{
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EmitScalarUnaryOpF(context, () =>
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EmitScalarUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Truncate));
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EmitUnaryMathCall(context, nameof(Math.Truncate));
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});
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});
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}
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}
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}
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public static void Frintz_V(ILEmitterCtx context)
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public static void Frintz_V(ILEmitterCtx context)
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{
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if (Optimizations.UseSse41)
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{
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EmitSse41Frint(context, RoundMode.TowardsZero, scalar: false);
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}
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else
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{
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{
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EmitVectorUnaryOpF(context, () =>
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EmitVectorUnaryOpF(context, () =>
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{
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{
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EmitUnaryMathCall(context, nameof(Math.Truncate));
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EmitUnaryMathCall(context, nameof(Math.Truncate));
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});
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});
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}
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}
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}
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public static void Frsqrte_S(ILEmitterCtx context)
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public static void Frsqrte_S(ILEmitterCtx context)
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{
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{
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@ -3542,6 +3670,44 @@ namespace ChocolArm64.Instructions
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}
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}
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}
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}
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private static void EmitSse41Frint(ILEmitterCtx context, RoundMode roundMode, bool scalar)
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{
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OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp;
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if (scalar)
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{
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Type[] typesRnd = op.Size == 0
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? new Type[] { typeof(Vector128<float>), typeof(Vector128<float>) }
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: new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
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VectorHelper.EmitCall(context, nameof(VectorHelper.VectorSingleZero));
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse41).GetMethod(GetScalarSse41NameRnd(roundMode), typesRnd));
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context.EmitStvec(op.Rd);
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}
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else
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{
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int sizeF = op.Size & 1;
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Type[] typesRnd = sizeF == 0
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? new Type[] { typeof(Vector128<float>) }
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: new Type[] { typeof(Vector128<double>) };
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context.EmitLdvec(op.Rn);
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context.EmitCall(typeof(Sse41).GetMethod(GetVectorSse41NameRnd(roundMode), typesRnd));
|
||||||
|
|
||||||
|
context.EmitStvec(op.Rd);
|
||||||
|
|
||||||
|
if (sizeF == 0 && op.RegisterSize == RegisterSize.Simd64)
|
||||||
|
{
|
||||||
|
EmitVectorZeroUpper(context, op.Rd);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
private static void EmitSse41Mul_AddSub(ILEmitterCtx context, string nameAddSub = null)
|
private static void EmitSse41Mul_AddSub(ILEmitterCtx context, string nameAddSub = null)
|
||||||
{
|
{
|
||||||
OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
|
OpCodeSimdReg64 op = (OpCodeSimdReg64)context.CurrOp;
|
||||||
|
|||||||
@ -898,7 +898,7 @@ namespace ChocolArm64.Instructions
|
|||||||
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetVectorSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
context.EmitStvectmp();
|
context.EmitStvectmp();
|
||||||
context.EmitLdvectmp();
|
context.EmitLdvectmp();
|
||||||
@ -954,7 +954,7 @@ namespace ChocolArm64.Instructions
|
|||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetVectorSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
context.EmitStvectmp();
|
context.EmitStvectmp();
|
||||||
|
|
||||||
@ -1032,7 +1032,7 @@ namespace ChocolArm64.Instructions
|
|||||||
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
context.EmitCall(typeof(Sse).GetMethod(nameof(Sse.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetVectorSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
context.Emit(OpCodes.Dup);
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
@ -1120,7 +1120,7 @@ namespace ChocolArm64.Instructions
|
|||||||
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
context.EmitCall(typeof(Sse2).GetMethod(nameof(Sse2.Multiply), types));
|
||||||
}
|
}
|
||||||
|
|
||||||
context.EmitCall(typeof(Sse41).GetMethod(GetSse41NameRnd(roundMode), typesRndCvt));
|
context.EmitCall(typeof(Sse41).GetMethod(GetVectorSse41NameRnd(roundMode), typesRndCvt));
|
||||||
|
|
||||||
context.Emit(OpCodes.Dup);
|
context.Emit(OpCodes.Dup);
|
||||||
|
|
||||||
@ -1305,23 +1305,39 @@ namespace ChocolArm64.Instructions
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
private static string GetSse41NameRnd(RoundMode roundMode)
|
private static string GetScalarSse41NameRnd(RoundMode roundMode)
|
||||||
|
{
|
||||||
|
switch (roundMode)
|
||||||
|
{
|
||||||
|
case RoundMode.ToNearest:
|
||||||
|
return nameof(Sse41.RoundToNearestIntegerScalar); // even
|
||||||
|
|
||||||
|
case RoundMode.TowardsPlusInfinity:
|
||||||
|
return nameof(Sse41.RoundToPositiveInfinityScalar);
|
||||||
|
|
||||||
|
case RoundMode.TowardsMinusInfinity:
|
||||||
|
return nameof(Sse41.RoundToNegativeInfinityScalar);
|
||||||
|
|
||||||
|
default: /* case RoundMode.TowardsZero: */
|
||||||
|
return nameof(Sse41.RoundToZeroScalar);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
private static string GetVectorSse41NameRnd(RoundMode roundMode)
|
||||||
{
|
{
|
||||||
switch (roundMode)
|
switch (roundMode)
|
||||||
{
|
{
|
||||||
case RoundMode.ToNearest:
|
case RoundMode.ToNearest:
|
||||||
return nameof(Sse41.RoundToNearestInteger); // even
|
return nameof(Sse41.RoundToNearestInteger); // even
|
||||||
|
|
||||||
case RoundMode.TowardsMinusInfinity:
|
|
||||||
return nameof(Sse41.RoundToNegativeInfinity);
|
|
||||||
|
|
||||||
case RoundMode.TowardsPlusInfinity:
|
case RoundMode.TowardsPlusInfinity:
|
||||||
return nameof(Sse41.RoundToPositiveInfinity);
|
return nameof(Sse41.RoundToPositiveInfinity);
|
||||||
|
|
||||||
case RoundMode.TowardsZero:
|
case RoundMode.TowardsMinusInfinity:
|
||||||
return nameof(Sse41.RoundToZero);
|
return nameof(Sse41.RoundToNegativeInfinity);
|
||||||
|
|
||||||
default: throw new ArgumentException(nameof(roundMode));
|
default: /* case RoundMode.TowardsZero: */
|
||||||
|
return nameof(Sse41.RoundToZero);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -237,7 +237,9 @@ namespace ChocolArm64.Instructions
|
|||||||
{
|
{
|
||||||
IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
|
IOpCodeSimd64 op = (IOpCodeSimd64)context.CurrOp;
|
||||||
|
|
||||||
Type type = (op.Size & 1) == 0
|
int sizeF = op.Size & 1;
|
||||||
|
|
||||||
|
Type type = sizeF == 0
|
||||||
? typeof(SoftFloat32)
|
? typeof(SoftFloat32)
|
||||||
: typeof(SoftFloat64);
|
: typeof(SoftFloat64);
|
||||||
|
|
||||||
|
|||||||
@ -93,30 +93,162 @@ namespace ChocolArm64.Instructions
|
|||||||
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
|
value <= ulong.MinValue ? ulong.MinValue : (ulong)value;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
public static double Round(double value, CpuThreadState state)
|
public static double Round(double value, CpuThreadState state)
|
||||||
{
|
{
|
||||||
switch (state.FPRoundingMode())
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
{
|
{
|
||||||
case RoundMode.ToNearest: return Math.Round (value);
|
return Math.Round(value); // even
|
||||||
case RoundMode.TowardsPlusInfinity: return Math.Ceiling (value);
|
}
|
||||||
case RoundMode.TowardsMinusInfinity: return Math.Floor (value);
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
case RoundMode.TowardsZero: return Math.Truncate(value);
|
{
|
||||||
}
|
return Math.Ceiling(value);
|
||||||
|
}
|
||||||
throw new InvalidOperationException();
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return Math.Floor(value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return Math.Truncate(value);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
public static float RoundF(float value, CpuThreadState state)
|
public static float RoundF(float value, CpuThreadState state)
|
||||||
{
|
{
|
||||||
switch (state.FPRoundingMode())
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
{
|
{
|
||||||
case RoundMode.ToNearest: return MathF.Round (value);
|
return MathF.Round(value); // even
|
||||||
case RoundMode.TowardsPlusInfinity: return MathF.Ceiling (value);
|
}
|
||||||
case RoundMode.TowardsMinusInfinity: return MathF.Floor (value);
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
case RoundMode.TowardsZero: return MathF.Truncate(value);
|
{
|
||||||
|
return MathF.Ceiling(value);
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return MathF.Floor(value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return MathF.Truncate(value);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
throw new InvalidOperationException();
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
|
public static Vector128<double> Sse41ScalarRound(Vector128<double> upper, Vector128<double> value, CpuThreadState state)
|
||||||
|
{
|
||||||
|
if (!Sse41.IsSupported)
|
||||||
|
{
|
||||||
|
throw new PlatformNotSupportedException();
|
||||||
|
}
|
||||||
|
|
||||||
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNearestIntegerScalar(upper, value); // even
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToPositiveInfinityScalar(upper, value);
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNegativeInfinityScalar(upper, value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return Sse41.RoundToZeroScalar(upper, value);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
|
public static Vector128<float> Sse41ScalarRoundF(Vector128<float> upper, Vector128<float> value, CpuThreadState state)
|
||||||
|
{
|
||||||
|
if (!Sse41.IsSupported)
|
||||||
|
{
|
||||||
|
throw new PlatformNotSupportedException();
|
||||||
|
}
|
||||||
|
|
||||||
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNearestIntegerScalar(upper, value); // even
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToPositiveInfinityScalar(upper, value);
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNegativeInfinityScalar(upper, value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return Sse41.RoundToZeroScalar(upper, value);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
|
public static Vector128<double> Sse41VectorRound(Vector128<double> value, CpuThreadState state)
|
||||||
|
{
|
||||||
|
if (!Sse41.IsSupported)
|
||||||
|
{
|
||||||
|
throw new PlatformNotSupportedException();
|
||||||
|
}
|
||||||
|
|
||||||
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNearestInteger(value); // even
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToPositiveInfinity(value);
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNegativeInfinity(value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return Sse41.RoundToZero(value);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||||
|
public static Vector128<float> Sse41VectorRoundF(Vector128<float> value, CpuThreadState state)
|
||||||
|
{
|
||||||
|
if (!Sse41.IsSupported)
|
||||||
|
{
|
||||||
|
throw new PlatformNotSupportedException();
|
||||||
|
}
|
||||||
|
|
||||||
|
RoundMode roundMode = state.FPRoundingMode();
|
||||||
|
|
||||||
|
if (roundMode == RoundMode.ToNearest)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNearestInteger(value); // even
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsPlusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToPositiveInfinity(value);
|
||||||
|
}
|
||||||
|
else if (roundMode == RoundMode.TowardsMinusInfinity)
|
||||||
|
{
|
||||||
|
return Sse41.RoundToNegativeInfinity(value);
|
||||||
|
}
|
||||||
|
else /* if (roundMode == RoundMode.TowardsZero) */
|
||||||
|
{
|
||||||
|
return Sse41.RoundToZero(value);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
public static Vector128<float> Tbl1_V64(
|
public static Vector128<float> Tbl1_V64(
|
||||||
|
|||||||
@ -697,6 +697,90 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_AMNPZ_S_S_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x1E264020u, // FRINTA S0, S1
|
||||||
|
0x1E254020u, // FRINTM S0, S1
|
||||||
|
0x1E244020u, // FRINTN S0, S1
|
||||||
|
0x1E24C020u, // FRINTP S0, S1
|
||||||
|
0x1E25C020u // FRINTZ S0, S1
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_AMNPZ_S_D_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x1E664020u, // FRINTA D0, D1
|
||||||
|
0x1E654020u, // FRINTM D0, D1
|
||||||
|
0x1E644020u, // FRINTN D0, D1
|
||||||
|
0x1E64C020u, // FRINTP D0, D1
|
||||||
|
0x1E65C020u // FRINTZ D0, D1
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_AMNPZ_V_2S_4S_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x2E218800u, // FRINTA V0.2S, V0.2S
|
||||||
|
0x0E219800u, // FRINTM V0.2S, V0.2S
|
||||||
|
0x0E218800u, // FRINTN V0.2S, V0.2S
|
||||||
|
0x0EA18800u, // FRINTP V0.2S, V0.2S
|
||||||
|
0x0EA19800u // FRINTZ V0.2S, V0.2S
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_AMNPZ_V_2D_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x6E618800u, // FRINTA V0.2D, V0.2D
|
||||||
|
0x4E619800u, // FRINTM V0.2D, V0.2D
|
||||||
|
0x4E618800u, // FRINTN V0.2D, V0.2D
|
||||||
|
0x4EE18800u, // FRINTP V0.2D, V0.2D
|
||||||
|
0x4EE19800u // FRINTZ V0.2D, V0.2D
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_IX_S_S_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x1E27C020u, // FRINTI S0, S1
|
||||||
|
0x1E274020u // FRINTX S0, S1
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_IX_S_D_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x1E67C020u, // FRINTI D0, D1
|
||||||
|
0x1E674020u // FRINTX D0, D1
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_IX_V_2S_4S_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x2EA19800u, // FRINTI V0.2S, V0.2S
|
||||||
|
0x2E219800u // FRINTX V0.2S, V0.2S
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
private static uint[] _F_Rint_IX_V_2D_()
|
||||||
|
{
|
||||||
|
return new uint[]
|
||||||
|
{
|
||||||
|
0x6EE19800u, // FRINTI V0.2D, V0.2D
|
||||||
|
0x6E619800u // FRINTX V0.2D, V0.2D
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
private static uint[] _SU_Cvt_F_S_S_()
|
private static uint[] _SU_Cvt_F_S_S_()
|
||||||
{
|
{
|
||||||
return new uint[]
|
return new uint[]
|
||||||
@ -1750,6 +1834,142 @@ namespace Ryujinx.Tests.Cpu
|
|||||||
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Dzc | Fpsr.Ofc | Fpsr.Ufc | Fpsr.Ixc | Fpsr.Idc);
|
CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Dzc | Fpsr.Ofc | Fpsr.Ufc | Fpsr.Ixc | Fpsr.Idc);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_AMNPZ_S_S([ValueSource("_F_Rint_AMNPZ_S_S_")] uint opcodes,
|
||||||
|
[ValueSource("_1S_F_")] ulong a)
|
||||||
|
{
|
||||||
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0(a);
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_AMNPZ_S_D([ValueSource("_F_Rint_AMNPZ_S_D_")] uint opcodes,
|
||||||
|
[ValueSource("_1D_F_")] ulong a)
|
||||||
|
{
|
||||||
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
|
Vector128<float> v0 = MakeVectorE1(z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0(a);
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_AMNPZ_V_2S_4S([ValueSource("_F_Rint_AMNPZ_V_2S_4S_")] uint opcodes,
|
||||||
|
[Values(0u)] uint rd,
|
||||||
|
[Values(1u, 0u)] uint rn,
|
||||||
|
[ValueSource("_2S_F_")] ulong z,
|
||||||
|
[ValueSource("_2S_F_")] ulong a,
|
||||||
|
[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
|
||||||
|
{
|
||||||
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
opcodes |= ((q & 1) << 30);
|
||||||
|
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0E1(a, a * q);
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_AMNPZ_V_2D([ValueSource("_F_Rint_AMNPZ_V_2D_")] uint opcodes,
|
||||||
|
[Values(0u)] uint rd,
|
||||||
|
[Values(1u, 0u)] uint rn,
|
||||||
|
[ValueSource("_1D_F_")] ulong z,
|
||||||
|
[ValueSource("_1D_F_")] ulong a)
|
||||||
|
{
|
||||||
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0E1(a, a);
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_IX_S_S([ValueSource("_F_Rint_IX_S_S_")] uint opcodes,
|
||||||
|
[ValueSource("_1S_F_")] ulong a,
|
||||||
|
[Values] RMode rMode)
|
||||||
|
{
|
||||||
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0(a);
|
||||||
|
|
||||||
|
int fpcr = (int)rMode << (int)Fpcr.RMode;
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_IX_S_D([ValueSource("_F_Rint_IX_S_D_")] uint opcodes,
|
||||||
|
[ValueSource("_1D_F_")] ulong a,
|
||||||
|
[Values] RMode rMode)
|
||||||
|
{
|
||||||
|
ulong z = TestContext.CurrentContext.Random.NextULong();
|
||||||
|
Vector128<float> v0 = MakeVectorE1(z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0(a);
|
||||||
|
|
||||||
|
int fpcr = (int)rMode << (int)Fpcr.RMode;
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_IX_V_2S_4S([ValueSource("_F_Rint_IX_V_2S_4S_")] uint opcodes,
|
||||||
|
[Values(0u)] uint rd,
|
||||||
|
[Values(1u, 0u)] uint rn,
|
||||||
|
[ValueSource("_2S_F_")] ulong z,
|
||||||
|
[ValueSource("_2S_F_")] ulong a,
|
||||||
|
[Values(0b0u, 0b1u)] uint q, // <2S, 4S>
|
||||||
|
[Values] RMode rMode)
|
||||||
|
{
|
||||||
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
opcodes |= ((q & 1) << 30);
|
||||||
|
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0E1(a, a * q);
|
||||||
|
|
||||||
|
int fpcr = (int)rMode << (int)Fpcr.RMode;
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
|
[Test, Pairwise] [Explicit]
|
||||||
|
public void F_Rint_IX_V_2D([ValueSource("_F_Rint_IX_V_2D_")] uint opcodes,
|
||||||
|
[Values(0u)] uint rd,
|
||||||
|
[Values(1u, 0u)] uint rn,
|
||||||
|
[ValueSource("_1D_F_")] ulong z,
|
||||||
|
[ValueSource("_1D_F_")] ulong a,
|
||||||
|
[Values] RMode rMode)
|
||||||
|
{
|
||||||
|
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
|
||||||
|
|
||||||
|
Vector128<float> v0 = MakeVectorE0E1(z, z);
|
||||||
|
Vector128<float> v1 = MakeVectorE0E1(a, a);
|
||||||
|
|
||||||
|
int fpcr = (int)rMode << (int)Fpcr.RMode;
|
||||||
|
|
||||||
|
SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr);
|
||||||
|
|
||||||
|
CompareAgainstUnicorn();
|
||||||
|
}
|
||||||
|
|
||||||
[Test, Pairwise, Description("NEG <V><d>, <V><n>")]
|
[Test, Pairwise, Description("NEG <V><d>, <V><n>")]
|
||||||
public void Neg_S_D([Values(0u)] uint rd,
|
public void Neg_S_D([Values(0u)] uint rd,
|
||||||
[Values(1u, 0u)] uint rn,
|
[Values(1u, 0u)] uint rn,
|
||||||
|
|||||||
@ -1,585 +0,0 @@
|
|||||||
using ChocolArm64.State;
|
|
||||||
|
|
||||||
using NUnit.Framework;
|
|
||||||
|
|
||||||
using System.Runtime.Intrinsics;
|
|
||||||
|
|
||||||
namespace Ryujinx.Tests.Cpu
|
|
||||||
{
|
|
||||||
public class CpuTestSimdArithmetic : CpuTest
|
|
||||||
{
|
|
||||||
[TestCase(0x3FE66666u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x3F99999Au, false, 0x3F800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, false, 0x40400000u)]
|
|
||||||
[TestCase(0x40733333u, false, 0x40800000u)]
|
|
||||||
[TestCase(0x3FC00000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x40200000u, false, 0x40400000u)]
|
|
||||||
[TestCase(0x00000000u, false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frinta_S(uint a, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E264020; // FRINTA S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x6E618820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] // FRINTA V0.2D, V1.2D
|
|
||||||
[TestCase(0x6E618820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6E618820u, 0x3FF8000000000000ul, 0x3FF8000000000000ul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6E218820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F80000040000000ul, 0x3F80000040000000ul)] // FRINTA V0.4S, V1.4S
|
|
||||||
[TestCase(0x6E218820u, 0x3FC000003FC00000ul, 0x3FC000003FC00000ul, false, 0x4000000040000000ul, 0x4000000040000000ul)]
|
|
||||||
[TestCase(0x2E218820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F80000040000000ul, 0x0000000000000000ul)] // FRINTA V0.2S, V1.2S
|
|
||||||
[TestCase(0x2E218820u, 0x3FC000003FC00000ul, 0x3FC000003FC00000ul, false, 0x4000000040000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E218820u, 0x0000000080000000ul, 0x0000000000000000ul, false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E218820u, 0x7F800000FF800000ul, 0x0000000000000000ul, false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E218820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E218820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frinta_V(uint opcode, ulong a, ulong b, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x3FE66666u, 'N', false, 0x40000000u)]
|
|
||||||
[TestCase(0x3F99999Au, 'N', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, 'P', false, 0x40800000u)]
|
|
||||||
[TestCase(0x40733333u, 'P', false, 0x40800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, 'M', false, 0x40400000u)]
|
|
||||||
[TestCase(0x40733333u, 'M', false, 0x40400000u)]
|
|
||||||
[TestCase(0x3F99999Au, 'Z', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x3FE66666u, 'Z', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x00000000u, 'N', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'P', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'M', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'Z', false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, 'N', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'P', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'M', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'Z', false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, 'N', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'P', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'M', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'Z', false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'N', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'P', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'M', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'Z', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, 'N', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'P', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'M', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'Z', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'N', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'P', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'M', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'Z', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'N', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'P', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'M', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'Z', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'N', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'P', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'M', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'Z', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frinti_S(uint a, char roundMode, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E27C020; // FRINTI S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
switch (roundMode)
|
|
||||||
{
|
|
||||||
case 'N': fpcrTemp = 0x0; break;
|
|
||||||
case 'P': fpcrTemp = 0x400000; break;
|
|
||||||
case 'M': fpcrTemp = 0x800000; break;
|
|
||||||
case 'Z': fpcrTemp = 0xC00000; break;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp |= 1 << 25;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x6EE19820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'N', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] // FRINTI V0.2D, V1.2D
|
|
||||||
[TestCase(0x6EE19820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'N', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6EE19820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'N', false, 0x3F80000040000000ul, 0x3F80000040000000ul)] // FRINTI V0.4S, V1.4S
|
|
||||||
[TestCase(0x6EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'P', false, 0x4000000040000000ul, 0x4000000040000000ul)]
|
|
||||||
[TestCase(0x6EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'M', false, 0x3F8000003F800000ul, 0x3F8000003F800000ul)]
|
|
||||||
[TestCase(0x6EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'Z', false, 0x3F8000003F800000ul, 0x3F8000003F800000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'N', false, 0x3F80000040000000ul, 0x0000000000000000ul)] // FRINTI V0.2S, V1.2S
|
|
||||||
[TestCase(0x2EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'P', false, 0x4000000040000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'M', false, 0x3F8000003F800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'Z', false, 0x3F8000003F800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x0000000080000000ul, 0x0000000000000000ul, 'N', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x0000000080000000ul, 0x0000000000000000ul, 'P', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x0000000080000000ul, 0x0000000000000000ul, 'M', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x0000000080000000ul, 0x0000000000000000ul, 'Z', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'N', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'P', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'M', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'Z', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'N', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'P', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'M', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'Z', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'N', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'P', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'M', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'Z', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frinti_V(uint opcode, ulong a, ulong b, char roundMode, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
switch (roundMode)
|
|
||||||
{
|
|
||||||
case 'N': fpcrTemp = 0x0; break;
|
|
||||||
case 'P': fpcrTemp = 0x400000; break;
|
|
||||||
case 'M': fpcrTemp = 0x800000; break;
|
|
||||||
case 'Z': fpcrTemp = 0xC00000; break;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp |= 1 << 25;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x3FE66666u, false, 0x3F800000u)]
|
|
||||||
[TestCase(0x3F99999Au, false, 0x3F800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, false, 0x40400000u)]
|
|
||||||
[TestCase(0x40733333u, false, 0x40400000u)]
|
|
||||||
[TestCase(0x3FC00000u, false, 0x3F800000u)]
|
|
||||||
[TestCase(0x40200000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x00000000u, false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frintm_S(uint a, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E254020; // FRINTM S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x4E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] // FRINTM V0.2D, V1.2D
|
|
||||||
[TestCase(0x4E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x4E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F8000003F800000ul, 0x3F8000003F800000ul)] // FRINTM V0.4S, V1.4S
|
|
||||||
[TestCase(0x0E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F8000003F800000ul, 0x0000000000000000ul)] // FRINTM V0.2S, V1.2S
|
|
||||||
[TestCase(0x0E219820u, 0x0000000080000000ul, 0x0000000000000000ul, false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0E219820u, 0x7F800000FF800000ul, 0x0000000000000000ul, false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x0E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frintm_V(uint opcode, ulong a, ulong b, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x3FE66666u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x3F99999Au, false, 0x3F800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, false, 0x40400000u)]
|
|
||||||
[TestCase(0x40733333u, false, 0x40800000u)]
|
|
||||||
[TestCase(0x3FC00000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x40200000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x00000000u, false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frintn_S(uint a, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E244020; // FRINTN S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x4E618820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] // FRINTN V0.2D, V1.2D
|
|
||||||
[TestCase(0x4E618820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x4E618820u, 0x3FF8000000000000ul, 0x3FF8000000000000ul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x4E218820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F80000040000000ul, 0x3F80000040000000ul)] // FRINTN V0.4S, V1.4S
|
|
||||||
[TestCase(0x4E218820u, 0x3FC000003FC00000ul, 0x3FC000003FC00000ul, false, 0x4000000040000000ul, 0x4000000040000000ul)]
|
|
||||||
[TestCase(0x0E218820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x3F80000040000000ul, 0x0000000000000000ul)] // FRINTN V0.2S, V1.2S
|
|
||||||
[TestCase(0x0E218820u, 0x3FC000003FC00000ul, 0x3FC000003FC00000ul, false, 0x4000000040000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0E218820u, 0x0000000080000000ul, 0x0000000000000000ul, false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0E218820u, 0x7F800000FF800000ul, 0x0000000000000000ul, false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0E218820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x0E218820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frintn_V(uint opcode, ulong a, ulong b, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x3FE66666u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x3F99999Au, false, 0x40000000u)]
|
|
||||||
[TestCase(0x404CCCCDu, false, 0x40800000u)]
|
|
||||||
[TestCase(0x40733333u, false, 0x40800000u)]
|
|
||||||
[TestCase(0x3FC00000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0x40200000u, false, 0x40400000u)]
|
|
||||||
[TestCase(0x00000000u, false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frintp_S(uint a, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E24C020; // FRINTP S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x4EE18820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, false, 0x4000000000000000ul, 0x4000000000000000ul)] // FRINTP V0.2D, v1.2D
|
|
||||||
[TestCase(0x4EE18820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x4EA18820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x4000000040000000ul, 0x4000000040000000ul)] // FRINTP V0.4S, v1.4S
|
|
||||||
[TestCase(0x0EA18820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, false, 0x4000000040000000ul, 0x0000000000000000ul)] // FRINTP V0.2S, v1.2S
|
|
||||||
[TestCase(0x0EA18820u, 0x0000000080000000ul, 0x0000000000000000ul, false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0EA18820u, 0x7F800000FF800000ul, 0x0000000000000000ul, false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x0EA18820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x0EA18820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frintp_V(uint opcode, ulong a, ulong b, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x3FE66666u, 'N', false, 0x40000000u)]
|
|
||||||
[TestCase(0x3F99999Au, 'N', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, 'P', false, 0x40800000u)]
|
|
||||||
[TestCase(0x40733333u, 'P', false, 0x40800000u)]
|
|
||||||
[TestCase(0x404CCCCDu, 'M', false, 0x40400000u)]
|
|
||||||
[TestCase(0x40733333u, 'M', false, 0x40400000u)]
|
|
||||||
[TestCase(0x3F99999Au, 'Z', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x3FE66666u, 'Z', false, 0x3F800000u)]
|
|
||||||
[TestCase(0x00000000u, 'N', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'P', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'M', false, 0x00000000u)]
|
|
||||||
[TestCase(0x00000000u, 'Z', false, 0x00000000u)]
|
|
||||||
[TestCase(0x80000000u, 'N', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'P', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'M', false, 0x80000000u)]
|
|
||||||
[TestCase(0x80000000u, 'Z', false, 0x80000000u)]
|
|
||||||
[TestCase(0x7F800000u, 'N', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'P', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'M', false, 0x7F800000u)]
|
|
||||||
[TestCase(0x7F800000u, 'Z', false, 0x7F800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'N', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'P', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'M', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800000u, 'Z', false, 0xFF800000u)]
|
|
||||||
[TestCase(0xFF800001u, 'N', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'P', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'M', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'Z', false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'N', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'P', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'M', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, 'Z', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'N', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'P', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'M', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'Z', false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'N', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'P', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'M', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, 'Z', true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frintx_S(uint a, char roundMode, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E274020; // FRINTX S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
switch (roundMode)
|
|
||||||
{
|
|
||||||
case 'N': fpcrTemp = 0x0; break;
|
|
||||||
case 'P': fpcrTemp = 0x400000; break;
|
|
||||||
case 'M': fpcrTemp = 0x800000; break;
|
|
||||||
case 'Z': fpcrTemp = 0xC00000; break;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp |= 1 << 25;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'N', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)] // FRINTX V0.2D, V1.2D
|
|
||||||
[TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'N', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'P', false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'M', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FF3333333333333ul, 0x3FF3333333333333ul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6E619820u, 0x3FFCCCCCCCCCCCCDul, 0x3FFCCCCCCCCCCCCDul, 'Z', false, 0x3FF0000000000000ul, 0x3FF0000000000000ul)]
|
|
||||||
[TestCase(0x6E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'N', false, 0x3F80000040000000ul, 0x3F80000040000000ul)] // FRINTX V0.4S, V1.4S
|
|
||||||
[TestCase(0x6E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'P', false, 0x4000000040000000ul, 0x4000000040000000ul)]
|
|
||||||
[TestCase(0x6E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'M', false, 0x3F8000003F800000ul, 0x3F8000003F800000ul)]
|
|
||||||
[TestCase(0x6E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'Z', false, 0x3F8000003F800000ul, 0x3F8000003F800000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'N', false, 0x3F80000040000000ul, 0x0000000000000000ul)] // FRINTX V0.2S, V1.2S
|
|
||||||
[TestCase(0x2E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'P', false, 0x4000000040000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'M', false, 0x3F8000003F800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x3F99999A3FE66666ul, 0x3F99999A3FE66666ul, 'Z', false, 0x3F8000003F800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x0000000080000000ul, 0x0000000000000000ul, 'N', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x0000000080000000ul, 0x0000000000000000ul, 'P', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x0000000080000000ul, 0x0000000000000000ul, 'M', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x0000000080000000ul, 0x0000000000000000ul, 'Z', false, 0x0000000080000000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'N', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'P', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'M', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0x7F800000FF800000ul, 0x0000000000000000ul, 'Z', false, 0x7F800000FF800000ul, 0x0000000000000000ul)]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'N', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'P', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'M', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'Z', false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'N', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'P', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'M', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x2E219820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, 'Z', true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frintx_V(uint opcode, ulong a, ulong b, char roundMode, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
switch (roundMode)
|
|
||||||
{
|
|
||||||
case 'N': fpcrTemp = 0x0; break;
|
|
||||||
case 'P': fpcrTemp = 0x400000; break;
|
|
||||||
case 'M': fpcrTemp = 0x800000; break;
|
|
||||||
case 'Z': fpcrTemp = 0xC00000; break;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp |= 1 << 25;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0xBFF33333u, false, 0xBF800000u)]
|
|
||||||
[TestCase(0x40200000u, false, 0x40000000u)]
|
|
||||||
[TestCase(0xFF800001u, false, 0xFFC00001u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0xFF800001u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, false, 0x7FC00002u, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x7FC00002u, true, 0x7FC00000u, Ignore = "NaN test.")]
|
|
||||||
public void Frintz_S(uint a, bool defaultNaN, uint result)
|
|
||||||
{
|
|
||||||
uint opcode = 0x1E25C020; // FRINTZ S0, S1
|
|
||||||
|
|
||||||
Vector128<float> v1 = MakeVectorE0(a);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result));
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
|
|
||||||
[TestCase(0x4EE19820u, 0xBFF999999999999Aul, 0xBFF999999999999Aul, false, 0xBFF0000000000000ul, 0xBFF0000000000000ul)] // FRINTZ V0.2D, V1.2D
|
|
||||||
[TestCase(0x4EE19820u, 0x4004000000000000ul, 0x4004000000000000ul, false, 0x4000000000000000ul, 0x4000000000000000ul)]
|
|
||||||
[TestCase(0x0EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, false, 0xFFC000017FC00002ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
[TestCase(0x0EA19820u, 0xFF8000017FC00002ul, 0x0000000000000000ul, true, 0x7FC000007FC00000ul, 0x0000000000000000ul, Ignore = "NaN test.")]
|
|
||||||
public void Frintz_V(uint opcode, ulong a, ulong b, bool defaultNaN, ulong result0, ulong result1)
|
|
||||||
{
|
|
||||||
Vector128<float> v1 = MakeVectorE0E1(a, b);
|
|
||||||
|
|
||||||
int fpcrTemp = 0x0;
|
|
||||||
|
|
||||||
if (defaultNaN)
|
|
||||||
{
|
|
||||||
fpcrTemp = 0x2000000;
|
|
||||||
}
|
|
||||||
|
|
||||||
CpuThreadState threadState = SingleOpcode(opcode, v1: v1, fpcr: fpcrTemp);
|
|
||||||
|
|
||||||
Assert.Multiple(() =>
|
|
||||||
{
|
|
||||||
Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(result0));
|
|
||||||
Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(result1));
|
|
||||||
});
|
|
||||||
|
|
||||||
CompareAgainstUnicorn();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
Loading…
Reference in New Issue
Block a user