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https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-11-25 00:40:13 +01:00
Do not read or write macros to main memory, use a separate memory instead (as this apparently what the real thing does)
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b747b23607
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@ -56,7 +56,7 @@ namespace Ryujinx.HLE.Gpu
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private int PipeOp;
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private long Pc;
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private int Pc;
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public MacroInterpreter(NvGpuFifo PFifo, INvGpuEngine Engine)
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{
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@ -68,7 +68,7 @@ namespace Ryujinx.HLE.Gpu
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Gprs = new int[8];
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}
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public void Execute(NvGpuVmm Vmm, long Position, int Param)
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public void Execute(NvGpuVmm Vmm, int[] Mme, int Position, int Param)
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{
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Reset();
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@ -76,13 +76,13 @@ namespace Ryujinx.HLE.Gpu
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Pc = Position;
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FetchOpCode(Vmm);
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FetchOpCode(Mme);
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while (Step(Vmm));
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while (Step(Vmm, Mme));
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//Due to the delay slot, we still need to execute
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//one more instruction before we actually exit.
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Step(Vmm);
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Step(Vmm, Mme);
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}
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private void Reset()
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@ -98,11 +98,11 @@ namespace Ryujinx.HLE.Gpu
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Carry = false;
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}
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private bool Step(NvGpuVmm Vmm)
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private bool Step(NvGpuVmm Vmm, int[] Mme)
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{
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long BaseAddr = Pc - 4;
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int BaseAddr = Pc - 1;
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FetchOpCode(Vmm);
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FetchOpCode(Mme);
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if ((OpCode & 7) < 7)
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{
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@ -205,13 +205,13 @@ namespace Ryujinx.HLE.Gpu
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if (Taken)
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{
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Pc = BaseAddr + (GetImm() << 2);
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Pc = BaseAddr + GetImm();
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bool NoDelays = (OpCode & 0x20) != 0;
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if (NoDelays)
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{
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FetchOpCode(Vmm);
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FetchOpCode(Mme);
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}
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return true;
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@ -223,13 +223,11 @@ namespace Ryujinx.HLE.Gpu
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return !Exit;
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}
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private void FetchOpCode(NvGpuVmm Vmm)
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private void FetchOpCode(int[] Mme)
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{
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OpCode = PipeOp;
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PipeOp = Vmm.ReadInt32(Pc);
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Pc += 4;
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PipeOp = Mme[Pc++];
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}
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private int GetAluResult()
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@ -1,4 +1,3 @@
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using Ryujinx.Graphics.Gal;
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using System.Collections.Generic;
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namespace Ryujinx.HLE.Gpu
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@ -7,6 +7,10 @@ namespace Ryujinx.HLE.Gpu
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private const int MacrosCount = 0x80;
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private const int MacroIndexMask = MacrosCount - 1;
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//Note: The size of the macro memory is unknown, we just make
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//a guess here and use 256kb as the size. Increase if needed.
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private const int MmeWords = 256 * 256;
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private NvGpu Gpu;
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private ConcurrentQueue<(NvGpuVmm, NvGpuPBEntry)> BufferQueue;
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@ -15,11 +19,11 @@ namespace Ryujinx.HLE.Gpu
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private struct CachedMacro
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{
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public long Position { get; private set; }
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public int Position { get; private set; }
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private MacroInterpreter Interpreter;
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public CachedMacro(NvGpuFifo PFifo, INvGpuEngine Engine, long Position)
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public CachedMacro(NvGpuFifo PFifo, INvGpuEngine Engine, int Position)
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{
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this.Position = Position;
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@ -31,17 +35,19 @@ namespace Ryujinx.HLE.Gpu
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Interpreter?.Fifo.Enqueue(Param);
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}
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public void Execute(NvGpuVmm Vmm, int Param)
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public void Execute(NvGpuVmm Vmm, int[] Mme, int Param)
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{
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Interpreter?.Execute(Vmm, Position, Param);
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Interpreter?.Execute(Vmm, Mme, Position, Param);
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}
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}
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private long CurrMacroPosition;
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private int CurrMacroPosition;
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private int CurrMacroBindIndex;
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private CachedMacro[] Macros;
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private int[] Mme;
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public NvGpuFifo(NvGpu Gpu)
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{
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this.Gpu = Gpu;
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@ -51,6 +57,8 @@ namespace Ryujinx.HLE.Gpu
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SubChannels = new NvGpuEngine[8];
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Macros = new CachedMacro[MacrosCount];
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Mme = new int[MmeWords];
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}
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public void PushBuffer(NvGpuVmm Vmm, NvGpuPBEntry[] Buffer)
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@ -95,22 +103,16 @@ namespace Ryujinx.HLE.Gpu
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case NvGpuFifoMeth.SetMacroUploadAddress:
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{
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CurrMacroPosition = (long)((ulong)PBEntry.Arguments[0] << 2);
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CurrMacroPosition = PBEntry.Arguments[0];
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break;
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}
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case NvGpuFifoMeth.SendMacroCodeData:
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{
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long Position = CurrMacroPosition;
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foreach (int Arg in PBEntry.Arguments)
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{
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Vmm.WriteInt32(Position, Arg);
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CurrMacroPosition += 4;
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Position += 4;
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Mme[CurrMacroPosition++] = Arg;
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}
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break;
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}
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@ -124,7 +126,7 @@ namespace Ryujinx.HLE.Gpu
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case NvGpuFifoMeth.BindMacro:
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{
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long Position = (long)((ulong)PBEntry.Arguments[0] << 2);
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int Position = PBEntry.Arguments[0];
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Macros[CurrMacroBindIndex] = new CachedMacro(this, Gpu.Engine3d, Position);
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@ -167,7 +169,7 @@ namespace Ryujinx.HLE.Gpu
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}
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else
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{
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Macros[MacroIndex].Execute(Vmm, PBEntry.Arguments[0]);
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Macros[MacroIndex].Execute(Vmm, Mme, PBEntry.Arguments[0]);
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}
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}
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}
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