mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-11-28 01:50:50 +01:00
Add CRC32 instruction and SLI (vector)
This commit is contained in:
parent
19564e570b
commit
553ba659c4
@ -42,6 +42,14 @@ namespace ChocolArm64
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Set("x1111010010xxxxxxxxx00xxxxxxxxxx", AInstEmit.Ccmp, typeof(AOpCodeCcmpReg));
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Set("x1111010010xxxxxxxxx00xxxxxxxxxx", AInstEmit.Ccmp, typeof(AOpCodeCcmpReg));
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Set("11010101000000110011xxxx01011111", AInstEmit.Clrex, typeof(AOpCodeSystem));
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Set("11010101000000110011xxxx01011111", AInstEmit.Clrex, typeof(AOpCodeSystem));
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Set("x101101011000000000100xxxxxxxxxx", AInstEmit.Clz, typeof(AOpCodeAlu));
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Set("x101101011000000000100xxxxxxxxxx", AInstEmit.Clz, typeof(AOpCodeAlu));
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Set("x0011010110xxxxx010000xxxxxxxxxx", AInstEmit.Crc32b, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010001xxxxxxxxxx", AInstEmit.Crc32h, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010010xxxxxxxxxx", AInstEmit.Crc32w, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010011xxxxxxxxxx", AInstEmit.Crc32x, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010100xxxxxxxxxx", AInstEmit.Crc32cb, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010101xxxxxxxxxx", AInstEmit.Crc32ch, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010110xxxxxxxxxx", AInstEmit.Crc32cw, typeof(AOpCodeAluRs));
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Set("x0011010110xxxxx010111xxxxxxxxxx", AInstEmit.Crc32cx, typeof(AOpCodeAluRs));
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Set("x0011010100xxxxxxxxx00xxxxxxxxxx", AInstEmit.Csel, typeof(AOpCodeCsel));
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Set("x0011010100xxxxxxxxx00xxxxxxxxxx", AInstEmit.Csel, typeof(AOpCodeCsel));
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Set("x0011010100xxxxxxxxx01xxxxxxxxxx", AInstEmit.Csinc, typeof(AOpCodeCsel));
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Set("x0011010100xxxxxxxxx01xxxxxxxxxx", AInstEmit.Csinc, typeof(AOpCodeCsel));
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Set("x1011010100xxxxxxxxx00xxxxxxxxxx", AInstEmit.Csinv, typeof(AOpCodeCsel));
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Set("x1011010100xxxxxxxxx00xxxxxxxxxx", AInstEmit.Csinv, typeof(AOpCodeCsel));
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@ -243,6 +251,7 @@ namespace ChocolArm64
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Set("0x0011110>>>>xxx010101xxxxxxxxxx", AInstEmit.Shl_V, typeof(AOpCodeSimdShImm));
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Set("0x0011110>>>>xxx010101xxxxxxxxxx", AInstEmit.Shl_V, typeof(AOpCodeSimdShImm));
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Set("0x101110<<100001001110xxxxxxxxxx", AInstEmit.Shll_V, typeof(AOpCodeSimd));
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Set("0x101110<<100001001110xxxxxxxxxx", AInstEmit.Shll_V, typeof(AOpCodeSimd));
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Set("0x00111100>>>xxx100001xxxxxxxxxx", AInstEmit.Shrn_V, typeof(AOpCodeSimdShImm));
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Set("0x00111100>>>xxx100001xxxxxxxxxx", AInstEmit.Shrn_V, typeof(AOpCodeSimdShImm));
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Set("0x1011110>>>>xxx010101xxxxxxxxxx", AInstEmit.Sli_V, typeof(AOpCodeSimdShImm));
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Set("0x001110<<1xxxxx011001xxxxxxxxxx", AInstEmit.Smax_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx011001xxxxxxxxxx", AInstEmit.Smax_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx011011xxxxxxxxxx", AInstEmit.Smin_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx011011xxxxxxxxxx", AInstEmit.Smin_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx100000xxxxxxxxxx", AInstEmit.Smlal_V, typeof(AOpCodeSimdReg));
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Set("0x001110<<1xxxxx100000xxxxxxxxxx", AInstEmit.Smlal_V, typeof(AOpCodeSimdReg));
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74
ChocolArm64/Instruction/AInstEmitHash.cs
Normal file
74
ChocolArm64/Instruction/AInstEmitHash.cs
Normal file
@ -0,0 +1,74 @@
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using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System.Reflection.Emit;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Crc32b(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32b));
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}
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public static void Crc32h(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32h));
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}
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public static void Crc32w(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32w));
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}
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public static void Crc32x(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32x));
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}
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public static void Crc32cb(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32cb));
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}
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public static void Crc32ch(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32ch));
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}
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public static void Crc32cw(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32cw));
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}
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public static void Crc32cx(AILEmitterCtx Context)
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{
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EmitCrc32(Context, nameof(ASoftFallback.Crc32cx));
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}
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private static void EmitCrc32(AILEmitterCtx Context, string Name)
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{
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AOpCodeAluRs Op = (AOpCodeAluRs)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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if (Op.RegisterSize != ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U4);
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}
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Context.EmitLdintzr(Op.Rm);
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ASoftFallback.EmitCall(Context, Name);
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if (Op.RegisterSize != ARegisterSize.Int32)
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{
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Context.Emit(OpCodes.Conv_U8);
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}
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Context.EmitStintzr(Op.Rd);
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}
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}
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}
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@ -29,7 +29,7 @@ namespace ChocolArm64.Instruction
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int Shift = Op.Imm - (8 << Op.Size);
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int Shift = Op.Imm - (8 << Op.Size);
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EmitVectorBinaryShImmBinaryZx(Context, () => Context.Emit(OpCodes.Shl), Shift);
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EmitVectorShImmBinaryZx(Context, () => Context.Emit(OpCodes.Shl), Shift);
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}
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}
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public static void Shll_V(AILEmitterCtx Context)
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public static void Shll_V(AILEmitterCtx Context)
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@ -50,6 +50,40 @@ namespace ChocolArm64.Instruction
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EmitVectorShImmNarrowBinaryZx(Context, () => Context.Emit(OpCodes.Shr_Un), Shift);
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EmitVectorShImmNarrowBinaryZx(Context, () => Context.Emit(OpCodes.Shr_Un), Shift);
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}
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}
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public static void Sli_V(AILEmitterCtx Context)
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{
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AOpCodeSimdShImm Op = (AOpCodeSimdShImm)Context.CurrOp;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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int Shift = Op.Imm - (8 << Op.Size);
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ulong Mask = ulong.MaxValue >> (64 - Shift);
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for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
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Context.EmitLdc_I4(Shift);
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Context.Emit(OpCodes.Shl);
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EmitVectorExtractZx(Context, Op.Rd, Index, Op.Size);
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Context.EmitLdc_I8((long)Mask);
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Context.Emit(OpCodes.And);
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Context.Emit(OpCodes.Or);
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EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Sshl_V(AILEmitterCtx Context)
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public static void Sshl_V(AILEmitterCtx Context)
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{
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{
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EmitVectorShl(Context, Signed: true);
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EmitVectorShl(Context, Signed: true);
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@ -83,7 +117,7 @@ namespace ChocolArm64.Instruction
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int Shift = (8 << (Op.Size + 1)) - Op.Imm;
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int Shift = (8 << (Op.Size + 1)) - Op.Imm;
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EmitVectorBinaryShImmBinarySx(Context, () => Context.Emit(OpCodes.Shr), Shift);
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EmitVectorShImmBinarySx(Context, () => Context.Emit(OpCodes.Shr), Shift);
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}
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}
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public static void Ssra_V(AILEmitterCtx Context)
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public static void Ssra_V(AILEmitterCtx Context)
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@ -98,7 +132,7 @@ namespace ChocolArm64.Instruction
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Context.Emit(OpCodes.Add);
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Context.Emit(OpCodes.Add);
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};
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};
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EmitVectorTernaryShImmBinarySx(Context, Emit, Shift);
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EmitVectorShImmTernarySx(Context, Emit, Shift);
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}
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}
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public static void Ushl_V(AILEmitterCtx Context)
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public static void Ushl_V(AILEmitterCtx Context)
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@ -217,22 +251,22 @@ namespace ChocolArm64.Instruction
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}
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}
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}
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}
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private static void EmitVectorBinaryShImmBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
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private static void EmitVectorShImmBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
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{
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{
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EmitVectorShImmBinaryOp(Context, Emit, Imm, false, true);
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EmitVectorShImmOp(Context, Emit, Imm, false, true);
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}
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}
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private static void EmitVectorTernaryShImmBinarySx(AILEmitterCtx Context, Action Emit, int Imm)
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private static void EmitVectorShImmTernarySx(AILEmitterCtx Context, Action Emit, int Imm)
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{
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{
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EmitVectorShImmBinaryOp(Context, Emit, Imm, true, true);
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EmitVectorShImmOp(Context, Emit, Imm, true, true);
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}
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}
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private static void EmitVectorBinaryShImmBinaryZx(AILEmitterCtx Context, Action Emit, int Imm)
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private static void EmitVectorShImmBinaryZx(AILEmitterCtx Context, Action Emit, int Imm)
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{
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{
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EmitVectorShImmBinaryOp(Context, Emit, Imm, false, false);
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EmitVectorShImmOp(Context, Emit, Imm, false, false);
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}
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}
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private static void EmitVectorShImmBinaryOp(AILEmitterCtx Context, Action Emit, int Imm, bool Ternary, bool Signed)
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private static void EmitVectorShImmOp(AILEmitterCtx Context, Action Emit, int Imm, bool Ternary, bool Signed)
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{
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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@ -38,6 +38,84 @@ namespace ChocolArm64.Instruction
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return (ulong)Size;
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return (ulong)Size;
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}
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}
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private const uint Crc32RevPoly = 0xedb88320;
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private const uint Crc32cRevPoly = 0x82f63b78;
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public static uint Crc32b(uint Crc, byte Val) => Crc32 (Crc, Crc32RevPoly, Val);
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public static uint Crc32h(uint Crc, byte Val) => Crc32h(Crc, Crc32RevPoly, Val);
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public static uint Crc32w(uint Crc, byte Val) => Crc32w(Crc, Crc32RevPoly, Val);
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public static uint Crc32x(uint Crc, byte Val) => Crc32x(Crc, Crc32RevPoly, Val);
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public static uint Crc32cb(uint Crc, byte Val) => Crc32 (Crc, Crc32cRevPoly, Val);
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public static uint Crc32ch(uint Crc, byte Val) => Crc32h(Crc, Crc32cRevPoly, Val);
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public static uint Crc32cw(uint Crc, byte Val) => Crc32w(Crc, Crc32cRevPoly, Val);
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public static uint Crc32cx(uint Crc, byte Val) => Crc32x(Crc, Crc32cRevPoly, Val);
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private static uint Crc32h(uint Crc, uint Poly, ushort Val)
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{
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Crc = Crc32(Crc, Poly, (byte)(Val >> 0));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 8));
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return Crc;
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}
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private static uint Crc32w(uint Crc, uint Poly, uint Val)
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{
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Crc = Crc32(Crc, Poly, (byte)(Val >> 0));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 8));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 16));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 24));
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return Crc;
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}
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private static uint Crc32x(uint Crc, uint Poly, ulong Val)
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{
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Crc = Crc32(Crc, Poly, (byte)(Val >> 0));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 8));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 16));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 24));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 32));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 40));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 48));
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Crc = Crc32(Crc, Poly, (byte)(Val >> 56));
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return Crc;
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}
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private static uint Crc32(uint Crc, uint Poly, byte Val)
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{
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Crc ^= Val;
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for (int Bit = 7; Bit >= 0; Bit--)
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{
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uint Mask = (uint)(-(int)(Crc & 1));
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Crc = (Crc >> 1) ^ (Poly & Mask);
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}
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return Crc;
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}
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public static uint ReverseBits8(uint Value)
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{
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Value = ((Value & 0xaa) >> 1) | ((Value & 0x55) << 1);
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Value = ((Value & 0xcc) >> 2) | ((Value & 0x33) << 2);
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Value = ((Value & 0xf0) >> 4) | ((Value & 0x0f) << 4);
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return Value;
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}
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public static uint ReverseBits16(uint Value)
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{
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Value = ((Value & 0xaaaa) >> 1) | ((Value & 0x5555) << 1);
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Value = ((Value & 0xcccc) >> 2) | ((Value & 0x3333) << 2);
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Value = ((Value & 0xf0f0) >> 4) | ((Value & 0x0f0f) << 4);
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Value = ((Value & 0xff00) >> 8) | ((Value & 0x00ff) << 8);
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return Value;
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}
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public static uint ReverseBits32(uint Value)
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public static uint ReverseBits32(uint Value)
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{
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{
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Value = ((Value & 0xaaaaaaaa) >> 1) | ((Value & 0x55555555) << 1);
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Value = ((Value & 0xaaaaaaaa) >> 1) | ((Value & 0x55555555) << 1);
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