ryujinx/ChocolArm64
2018-04-04 16:36:07 -03:00
..
Decoder Enable all ld/st (single structure) instructions 2018-03-30 18:06:02 -03:00
Events Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store 2018-02-25 22:14:58 -03:00
Exceptions Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
Instruction Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
Memory Improvements to audout (#58) 2018-03-15 21:06:24 -03:00
State Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
Translation Fix 32-bits extended register instructions with 64-bits extensions 2018-03-30 23:32:06 -03:00
ABitUtils.cs Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00
AOpCodeTable.cs Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
AOptimizations.cs Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks 2018-03-10 20:39:16 -03:00
AThread.cs Allow more than one process, free resources on process dispose, implement SvcExitThread 2018-03-12 01:14:12 -03:00
ATranslatedSub.cs Improve CPU initial translation speeds (#50) 2018-03-04 14:09:59 -03:00
ATranslatedSubType.cs Improve CPU initial translation speeds (#50) 2018-03-04 14:09:59 -03:00
ATranslator.cs Allow more than one process, free resources on process dispose, implement SvcExitThread 2018-03-12 01:14:12 -03:00
ChocolArm64.csproj Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00