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https://github.com/ryujinx-mirror/ryujinx.git
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a694420d11
* Implement speculative translation on the cpu, and change the way how branches to unknown or untranslated addresses works * Port t0opt changes and other cleanups * Change namespace from translation related classes to ChocolArm64.Translation, other minor tweaks * Fix typo * Translate higher quality code for indirect jumps aswell, and on some cases that were missed when lower quality (tier 0) code was available * Remove debug print * Remove direct argument passing optimization, and enable tail calls for BR instructions * Call delegates directly with Callvirt rather than calling Execute, do not emit calls for tier 0 code * Remove unused property * Rename argument on ArmSubroutine delegate
102 lines
2.6 KiB
C#
102 lines
2.6 KiB
C#
using ChocolArm64.State;
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using System;
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using System.Collections.Generic;
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using System.Reflection.Emit;
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using System.Runtime.Intrinsics;
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namespace ChocolArm64.Translation
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{
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class ILMethodBuilder
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{
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public LocalAlloc LocalAlloc { get; private set; }
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public ILGenerator Generator { get; private set; }
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private Dictionary<Register, int> _locals;
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private ILBlock[] _ilBlocks;
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private string _subName;
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private int _localsCount;
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public ILMethodBuilder(ILBlock[] ilBlocks, string subName)
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{
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_ilBlocks = ilBlocks;
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_subName = subName;
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}
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public TranslatedSub GetSubroutine(TranslationTier tier)
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{
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LocalAlloc = new LocalAlloc(_ilBlocks, _ilBlocks[0]);
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DynamicMethod method = new DynamicMethod(_subName, typeof(long), TranslatedSub.FixedArgTypes);
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Generator = method.GetILGenerator();
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TranslatedSub subroutine = new TranslatedSub(method, tier);
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_locals = new Dictionary<Register, int>();
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_localsCount = 0;
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new ILOpCodeLoadState(_ilBlocks[0]).Emit(this);
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foreach (ILBlock ilBlock in _ilBlocks)
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{
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ilBlock.Emit(this);
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}
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subroutine.PrepareMethod();
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return subroutine;
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}
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public int GetLocalIndex(Register reg)
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{
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if (!_locals.TryGetValue(reg, out int index))
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{
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Generator.DeclareLocal(GetFieldType(reg.Type));
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index = _localsCount++;
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_locals.Add(reg, index);
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}
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return index;
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}
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private static Type GetFieldType(RegisterType regType)
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{
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switch (regType)
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{
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case RegisterType.Flag: return typeof(bool);
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case RegisterType.Int: return typeof(ulong);
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case RegisterType.Vector: return typeof(Vector128<float>);
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}
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throw new ArgumentException(nameof(regType));
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}
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public static Register GetRegFromBit(int bit, RegisterType baseType)
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{
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if (bit < 32)
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{
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return new Register(bit, baseType);
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}
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else if (baseType == RegisterType.Int)
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{
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return new Register(bit & 0x1f, RegisterType.Flag);
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}
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else
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{
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throw new ArgumentOutOfRangeException(nameof(bit));
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}
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}
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public static bool IsRegIndex(int index)
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{
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return (uint)index < 32;
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}
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}
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} |