LDj3SNuD e36e97c64d

CPU: This PR fixes Fpscr, among other things. (#1433) ...

* CPU: This PR fixes Fpscr, among other things.

* Add Fpscr.Qc = 1 if sat. for Vqrshrn & Vqrshrun.

* Fix Vcmp & Vcmpe opcode table.

* Revert "Fix Vcmp & Vcmpe opcode table."

This reverts commit c117d9410d693185ff5f8ee8e457ffbfb2027dd5.

* Address PR feedbacks.

2020-08-08 17:18:51 +02:00

..

Aarch32Mode.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

ExecutionContext.cs

Implement CNTVCT_EL0 (#1268)

2020-05-23 12:15:59 +02:00

ExecutionMode.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

FPCR.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

FPException.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

FPRoundingMode.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

FPSR.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

FPState.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

FPType.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstExceptionEventArgs.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

InstUndefinedEventArgs.cs

Add a new JIT compiler for CPU code (#693)

2019-08-08 21:56:22 +03:00

NativeContext.cs

Implement inline memory load/store exclusive and ordered (#1413)

2020-07-30 11:29:28 -03:00

PState.cs

CPU: This PR fixes Fpscr, among other things. (#1433)

2020-08-08 17:18:51 +02:00

RegisterAlias.cs

Add most of the A32 instruction set to ARMeilleure (#897)

2020-02-24 08:20:40 +11:00

RegisterConsts.cs

Add most of the A32 instruction set to ARMeilleure (#897)

2020-02-24 08:20:40 +11:00

V128.cs

Improve V128 (#1097)

2020-04-17 08:19:20 +10:00