166 lines
3.0 KiB
ArmAsm
Executable File
166 lines
3.0 KiB
ArmAsm
Executable File
#include "arm_arch.h"
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.text
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#if defined(__thumb2__) && !defined(__APPLE__)
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.syntax unified
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.thumb
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#else
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.code 32
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#undef __thumb2__
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#endif
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.align 5
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.globl OPENSSL_atomic_add
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.type OPENSSL_atomic_add,%function
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OPENSSL_atomic_add:
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#if __ARM_ARCH__>=6
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.Ladd: ldrex r2,[r0]
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add r3,r2,r1
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strex r2,r3,[r0]
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cmp r2,#0
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bne .Ladd
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mov r0,r3
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bx lr
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#else
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stmdb sp!,{r4,r5,r6,lr}
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ldr r2,.Lspinlock
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adr r3,.Lspinlock
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mov r4,r0
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mov r5,r1
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add r6,r3,r2 @ &spinlock
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b .+8
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.Lspin: bl sched_yield
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mov r0,#-1
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swp r0,r0,[r6]
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cmp r0,#0
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bne .Lspin
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ldr r2,[r4]
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add r2,r2,r5
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str r2,[r4]
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str r0,[r6] @ release spinlock
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ldmia sp!,{r4,r5,r6,lr}
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tst lr,#1
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moveq pc,lr
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.word 0xe12fff1e @ bx lr
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#endif
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.size OPENSSL_atomic_add,.-OPENSSL_atomic_add
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#if __ARM_ARCH__>=7
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.arch armv7-a
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.fpu neon
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.align 5
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.globl _armv7_neon_probe
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.type _armv7_neon_probe,%function
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_armv7_neon_probe:
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vorr q0,q0,q0
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bx lr
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.size _armv7_neon_probe,.-_armv7_neon_probe
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.globl _armv8_aes_probe
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.type _armv8_aes_probe,%function
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_armv8_aes_probe:
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#if defined(__thumb2__) && !defined(__APPLE__)
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.byte 0xb0,0xff,0x00,0x03 @ aese.8 q0,q0
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#else
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.byte 0x00,0x03,0xb0,0xf3 @ aese.8 q0,q0
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#endif
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bx lr
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.size _armv8_aes_probe,.-_armv8_aes_probe
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.globl _armv8_sha1_probe
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.type _armv8_sha1_probe,%function
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_armv8_sha1_probe:
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#if defined(__thumb2__) && !defined(__APPLE__)
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.byte 0x00,0xef,0x40,0x0c @ sha1c.32 q0,q0,q0
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#else
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.byte 0x40,0x0c,0x00,0xf2 @ sha1c.32 q0,q0,q0
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#endif
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bx lr
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.size _armv8_sha1_probe,.-_armv8_sha1_probe
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.globl _armv8_sha256_probe
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.type _armv8_sha256_probe,%function
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_armv8_sha256_probe:
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#if defined(__thumb2__) && !defined(__APPLE__)
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.byte 0x00,0xff,0x40,0x0c @ sha256h.32 q0,q0,q0
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#else
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.byte 0x40,0x0c,0x00,0xf3 @ sha256h.32 q0,q0,q0
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#endif
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bx lr
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.size _armv8_sha256_probe,.-_armv8_sha256_probe
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.globl _armv8_pmull_probe
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.type _armv8_pmull_probe,%function
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_armv8_pmull_probe:
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#if defined(__thumb2__) && !defined(__APPLE__)
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.byte 0xa0,0xef,0x00,0x0e @ vmull.p64 q0,d0,d0
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#else
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.byte 0x00,0x0e,0xa0,0xf2 @ vmull.p64 q0,d0,d0
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#endif
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bx lr
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.size _armv8_pmull_probe,.-_armv8_pmull_probe
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#endif
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.globl OPENSSL_wipe_cpu
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.type OPENSSL_wipe_cpu,%function
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OPENSSL_wipe_cpu:
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#if __ARM_ARCH__>=7
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ldr r0,.LOPENSSL_armcap
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adr r1,.LOPENSSL_armcap
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ldr r0,[r1,r0]
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#ifdef __APPLE__
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ldr r0,[r0]
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#endif
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#endif
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eor r2,r2,r2
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eor r3,r3,r3
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eor ip,ip,ip
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#if __ARM_ARCH__>=7
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tst r0,#1
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beq .Lwipe_done
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veor q0, q0, q0
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veor q1, q1, q1
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veor q2, q2, q2
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veor q3, q3, q3
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veor q8, q8, q8
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veor q9, q9, q9
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veor q10, q10, q10
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veor q11, q11, q11
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veor q12, q12, q12
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veor q13, q13, q13
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veor q14, q14, q14
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veor q15, q15, q15
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.Lwipe_done:
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#endif
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mov r0,sp
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#if __ARM_ARCH__>=5
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bx lr
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#else
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tst lr,#1
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moveq pc,lr
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.word 0xe12fff1e @ bx lr
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#endif
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.size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
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.align 5
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#if __ARM_ARCH__>=7
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.LOPENSSL_armcap:
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.word OPENSSL_armcap_P-.
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#endif
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#if __ARM_ARCH__>=6
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.align 5
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#else
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.Lspinlock:
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.word atomic_add_spinlock-.Lspinlock
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.align 5
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.data
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.align 2
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atomic_add_spinlock:
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.word 0
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#endif
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.comm OPENSSL_armcap_P,4,4
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.hidden OPENSSL_armcap_P
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