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shader: Implement TLD4 and TLD4_B

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This commit is contained in:
FernandoS27 2021-03-24 23:41:55 +01:00 committed by ameerj
parent 32c5483beb
commit c7c518e280
13 changed files with 315 additions and 11 deletions
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1
src/shader_recompiler/CMakeLists.txt
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@ -124,6 +124,7 @@ add_library(shader_recompiler STATIC
frontend/maxwell/translate/impl/select_source_with_predicate.cpp
frontend/maxwell/translate/impl/texture_fetch.cpp
frontend/maxwell/translate/impl/texture_fetch_swizzled.cpp
frontend/maxwell/translate/impl/texture_gather.cpp
frontend/maxwell/translate/impl/vote.cpp
frontend/maxwell/translate/impl/warp_shuffle.cpp
frontend/maxwell/translate/translate.cpp

8
src/shader_recompiler/backend/spirv/emit_spirv.h
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@ -340,10 +340,14 @@ Id EmitBindlessImageSampleImplicitLod(EmitContext&);
Id EmitBindlessImageSampleExplicitLod(EmitContext&);
Id EmitBindlessImageSampleDrefImplicitLod(EmitContext&);
Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&);
Id EmitBindlessImageGather(EmitContext&);
Id EmitBindlessImageGatherDref(EmitContext&);
Id EmitBoundImageSampleImplicitLod(EmitContext&);
Id EmitBoundImageSampleExplicitLod(EmitContext&);
Id EmitBoundImageSampleDrefImplicitLod(EmitContext&);
Id EmitBoundImageSampleDrefExplicitLod(EmitContext&);
Id EmitBoundImageGather(EmitContext&);
Id EmitBoundImageGatherDref(EmitContext&);
Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
Id bias_lc, Id offset);
Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
@ -352,6 +356,10 @@ Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
Id coords, Id dref, Id bias_lc, Id offset);
Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index,
Id coords, Id dref, Id lod_lc, Id offset);
Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
Id offset2);
Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
Id offset, Id offset2, Id dref);
Id EmitVoteAll(EmitContext& ctx, Id pred);
Id EmitVoteAny(EmitContext& ctx, Id pred);
Id EmitVoteEqual(EmitContext& ctx, Id pred);

40
src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
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@ -30,6 +30,12 @@ public:
}
}
explicit ImageOperands([[maybe_unused]] EmitContext& ctx, Id offset) {
if (Sirit::ValidId(offset)) {
Add(spv::ImageOperandsMask::Offset, offset);
}
}
void Add(spv::ImageOperandsMask new_mask, Id value) {
mask = static_cast<spv::ImageOperandsMask>(static_cast<unsigned>(mask) |
static_cast<unsigned>(new_mask));
@ -98,6 +104,14 @@ Id EmitBindlessImageSampleDrefExplicitLod(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitBindlessImageGather(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitBindlessImageGatherDref(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitBoundImageSampleImplicitLod(EmitContext&) {
throw LogicError("Unreachable instruction");
}
@ -114,6 +128,14 @@ Id EmitBoundImageSampleDrefExplicitLod(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitBoundImageGather(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitBoundImageGatherDref(EmitContext&) {
throw LogicError("Unreachable instruction");
}
Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
Id bias_lc, Id offset) {
const auto info{inst->Flags<IR::TextureInstInfo>()};
@ -152,4 +174,22 @@ Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, const IR::Va
Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
}
Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords, Id offset,
[[maybe_unused]] Id offset2) {
const auto info{inst->Flags<IR::TextureInstInfo>()};
const ImageOperands operands(ctx, offset);
return Emit(&EmitContext::OpImageSparseGather, &EmitContext::OpImageGather, ctx, inst,
ctx.F32[4], Texture(ctx, index), coords,
ctx.Constant(ctx.U32[1], info.gather_component.Value()), operands.Mask(),
operands.Span());
}
Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
Id offset, [[maybe_unused]] Id offset2, Id dref) {
const auto info{inst->Flags<IR::TextureInstInfo>()};
const ImageOperands operands(ctx, offset);
return Emit(&EmitContext::OpImageSparseDrefGather, &EmitContext::OpImageDrefGather, ctx, inst,
ctx.F32[4], Texture(ctx, index), coords, dref, operands.Mask(), operands.Span());
}
} // namespace Shader::Backend::SPIRV

13
src/shader_recompiler/frontend/ir/ir_emitter.cpp
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@ -1474,6 +1474,19 @@ F32 IREmitter::ImageSampleDrefExplicitLod(const Value& handle, const Value& coor
return Inst<F32>(op, Flags{info}, handle, coords, dref, lod_lc, offset);
}
Value IREmitter::ImageGather(const Value& handle, const Value& coords, const Value& offset,
const Value& offset2, TextureInstInfo info) {
const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGather : Opcode::BindlessImageGather};
return Inst(op, Flags{info}, handle, coords, offset, offset2);
}
Value IREmitter::ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
const Value& offset2, const F32& dref, TextureInstInfo info) {
const Opcode op{handle.IsImmediate() ? Opcode::BoundImageGatherDref
: Opcode::BindlessImageGatherDref};
return Inst(op, Flags{info}, handle, coords, offset, offset2, dref);
}
U1 IREmitter::VoteAll(const U1& value) {
return Inst<U1>(Opcode::VoteAll, value);
}

6
src/shader_recompiler/frontend/ir/ir_emitter.h
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@ -240,6 +240,12 @@ public:
const Value& offset, const F32& lod_clamp,
TextureInstInfo info);
[[nodiscard]] Value ImageGather(const Value& handle, const Value& coords, const Value& offset,
const Value& offset2, TextureInstInfo info);
[[nodiscard]] Value ImageGatherDref(const Value& handle, const Value& coords, const Value& offset,
const Value& offset2, const F32& dref, TextureInstInfo info);
[[nodiscard]] U1 VoteAll(const U1& value);
[[nodiscard]] U1 VoteAny(const U1& value);
[[nodiscard]] U1 VoteEqual(const U1& value);

1
src/shader_recompiler/frontend/ir/modifiers.h
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@ -38,6 +38,7 @@ union TextureInstInfo {
BitField<8, 1, u32> has_bias;
BitField<9, 1, u32> has_lod_clamp;
BitField<10, 1, u32> relaxed_precision;
BitField<11, 2, u32> gather_component;
};
static_assert(sizeof(TextureInstInfo) <= sizeof(u32));

6
src/shader_recompiler/frontend/ir/opcodes.inc
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@ -353,16 +353,22 @@ OPCODE(BindlessImageSampleImplicitLod, F32x4, U32,
OPCODE(BindlessImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(BindlessImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(BindlessImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(BindlessImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(BindlessImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
OPCODE(BoundImageSampleImplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(BoundImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(BoundImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(BoundImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(BoundImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(BoundImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
OPCODE(ImageSampleImplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(ImageSampleExplicitLod, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(ImageSampleDrefImplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(ImageSampleDrefExplicitLod, F32, U32, Opaque, F32, Opaque, Opaque, )
OPCODE(ImageGather, F32x4, U32, Opaque, Opaque, Opaque, )
OPCODE(ImageGatherDref, F32x4, U32, Opaque, Opaque, Opaque, F32, )
// Warp operations
OPCODE(VoteAll, U1, U1, )

4
src/shader_recompiler/frontend/maxwell/maxwell.inc
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@ -254,8 +254,8 @@ INST(TEX_b, "TEX (b)", "1101 1110 10-- ----")
INST(TEXS, "TEXS", "1101 -00- ---- ----")
INST(TLD, "TLD", "1101 1100 --11 1---")
INST(TLD_b, "TLD (b)", "1101 1101 --11 1---")
INST(TLD4, "TLD4", "1100 10-- --11 1---")
INST(TLD4_b, "TLD4 (b)", "1101 1110 1111 1---")
INST(TLD4, "TLD4", "1100 10-- ---- ----")
INST(TLD4_b, "TLD4 (b)", "1101 1110 11-- ----")
INST(TLD4S, "TLD4S", "1101 1111 -0-- ----")
INST(TLDS, "TLDS", "1101 -01- ---- ----")
INST(TMML, "TMML", "1101 1111 0101 1---")

8
src/shader_recompiler/frontend/maxwell/translate/impl/not_implemented.cpp
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@ -349,14 +349,6 @@ void TranslatorVisitor::TLD_b(u64) {
ThrowNotImplemented(Opcode::TLD_b);
}
void TranslatorVisitor::TLD4(u64) {
ThrowNotImplemented(Opcode::TLD4);
}
void TranslatorVisitor::TLD4_b(u64) {
ThrowNotImplemented(Opcode::TLD4_b);
}
void TranslatorVisitor::TLD4S(u64) {
ThrowNotImplemented(Opcode::TLD4S);
}

209
src/shader_recompiler/frontend/maxwell/translate/impl/texture_gather.cpp Normal file
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@ -0,0 +1,209 @@
// Copyright 2021 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <optional>
#include "common/bit_field.h"
#include "common/common_types.h"
#include "shader_recompiler/frontend/ir/modifiers.h"
#include "shader_recompiler/frontend/maxwell/translate/impl/impl.h"
namespace Shader::Maxwell {
namespace {
enum class TextureType : u64 {
_1D,
ARRAY_1D,
_2D,
ARRAY_2D,
_3D,
ARRAY_3D,
CUBE,
ARRAY_CUBE,
};
enum class OffsetType : u64 {
None = 0,
AOFFI,
PTP,
Invalid,
};
enum class ComponentType : u64 {
R = 0,
G = 1,
B = 2,
A = 3,
};
Shader::TextureType GetType(TextureType type, bool dc) {
switch (type) {
case TextureType::_1D:
return dc ? Shader::TextureType::Shadow1D : Shader::TextureType::Color1D;
case TextureType::ARRAY_1D:
return dc ? Shader::TextureType::ShadowArray1D : Shader::TextureType::ColorArray1D;
case TextureType::_2D:
return dc ? Shader::TextureType::Shadow2D : Shader::TextureType::Color2D;
case TextureType::ARRAY_2D:
return dc ? Shader::TextureType::ShadowArray2D : Shader::TextureType::ColorArray2D;
case TextureType::_3D:
return dc ? Shader::TextureType::Shadow3D : Shader::TextureType::Color3D;
case TextureType::ARRAY_3D:
throw NotImplementedException("3D array texture type");
case TextureType::CUBE:
return dc ? Shader::TextureType::ShadowCube : Shader::TextureType::ColorCube;
case TextureType::ARRAY_CUBE:
return dc ? Shader::TextureType::ShadowArrayCube : Shader::TextureType::ColorArrayCube;
}
throw NotImplementedException("Invalid texture type {}", type);
}
IR::Value MakeCoords(TranslatorVisitor& v, IR::Reg reg, TextureType type) {
const auto read_array{[&]() -> IR::F32 { return v.ir.ConvertUToF(32, 16, v.X(reg)); }};
switch (type) {
case TextureType::_1D:
return v.F(reg);
case TextureType::ARRAY_1D:
return v.ir.CompositeConstruct(read_array(), v.F(reg + 1));
case TextureType::_2D:
return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1));
case TextureType::ARRAY_2D:
return v.ir.CompositeConstruct(read_array(), v.F(reg + 1), v.F(reg + 2));
case TextureType::_3D:
return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1), v.F(reg + 2));
case TextureType::ARRAY_3D:
throw NotImplementedException("3D array texture type");
case TextureType::CUBE:
return v.ir.CompositeConstruct(v.F(reg), v.F(reg + 1), v.F(reg + 2));
case TextureType::ARRAY_CUBE:
return v.ir.CompositeConstruct(read_array(), v.F(reg + 1), v.F(reg + 2), v.F(reg + 3));
}
throw NotImplementedException("Invalid texture type {}", type);
}
IR::Value MakeOffset(TranslatorVisitor& v, IR::Reg& reg, TextureType type) {
const IR::U32 value{v.X(reg++)};
switch (type) {
case TextureType::_1D:
case TextureType::ARRAY_1D:
return v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true);
case TextureType::_2D:
case TextureType::ARRAY_2D:
return v.ir.CompositeConstruct(
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true));
case TextureType::_3D:
case TextureType::ARRAY_3D:
return v.ir.CompositeConstruct(
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true));
case TextureType::CUBE:
case TextureType::ARRAY_CUBE:
throw NotImplementedException("Illegal offset on CUBE sample");
}
throw NotImplementedException("Invalid texture type {}", type);
}
std::pair<IR::Value, IR::Value> MakeOffsetPTP(TranslatorVisitor& v, IR::Reg& reg) {
const IR::U32 value1{v.X(reg++)};
const IR::U32 value2{v.X(reg++)};
const auto getVector = ([&v](const IR::U32& value) {
return v.ir.CompositeConstruct(
v.ir.BitFieldExtract(value, v.ir.Imm32(0), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(8), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(16), v.ir.Imm32(6), true),
v.ir.BitFieldExtract(value, v.ir.Imm32(24), v.ir.Imm32(6), true));
});
return {getVector(value1), getVector(value2)};
}
void Impl(TranslatorVisitor& v, u64 insn, ComponentType component_type, OffsetType offset_type,
bool is_bindless) {
union {
u64 raw;
BitField<35, 1, u64> ndv;
BitField<49, 1, u64> nodep;
BitField<50, 1, u64> dc;
BitField<51, 3, IR::Pred> sparse_pred;
BitField<0, 8, IR::Reg> dest_reg;
BitField<8, 8, IR::Reg> coord_reg;
BitField<20, 8, IR::Reg> meta_reg;
BitField<28, 3, TextureType> type;
BitField<31, 4, u64> mask;
BitField<36, 13, u64> cbuf_offset;
} const tld4{insn};
const IR::Value coords{MakeCoords(v, tld4.coord_reg, tld4.type)};
IR::Reg meta_reg{tld4.meta_reg};
IR::Value handle;
IR::Value offset;
IR::Value offset2;
IR::F32 dref;
if (!is_bindless) {
handle = v.ir.Imm32(static_cast<u32>(tld4.cbuf_offset.Value() * 4));
} else {
handle = v.X(meta_reg++);
}
switch (offset_type) {
case OffsetType::None:
break;
case OffsetType::AOFFI: {
offset = MakeOffset(v, meta_reg, tld4.type);
break;
}
case OffsetType::PTP: {
std::tie(offset, offset2) = MakeOffsetPTP(v, meta_reg);
break;
}
default:
throw NotImplementedException("Invalid offset type {}", offset_type);
}
if (tld4.dc != 0) {
dref = v.F(meta_reg++);
}
IR::TextureInstInfo info{};
info.type.Assign(GetType(tld4.type, tld4.dc != 0));
info.gather_component.Assign(static_cast<u32>(component_type));
const IR::Value sample{[&]() -> IR::Value {
if (tld4.dc == 0) {
return v.ir.ImageGather(handle, coords, offset, offset2, info);
}
return v.ir.ImageGatherDref(handle, coords, offset, offset2, dref, info);
}()};
IR::Reg dest_reg{tld4.dest_reg};
for (size_t element = 0; element < 4; ++element) {
if (((tld4.mask >> element) & 1) == 0) {
continue;
}
v.F(dest_reg, IR::F32{v.ir.CompositeExtract(sample, element)});
++dest_reg;
}
if (tld4.sparse_pred != IR::Pred::PT) {
v.ir.SetPred(tld4.sparse_pred, v.ir.LogicalNot(v.ir.GetSparseFromOp(sample)));
}
}
} // Anonymous namespace
void TranslatorVisitor::TLD4(u64 insn) {
union {
u64 raw;
BitField<56, 2, ComponentType> component;
BitField<54, 2, OffsetType> offset;
} const tld4{insn};
Impl(*this, insn, tld4.component, tld4.offset, false);
}
void TranslatorVisitor::TLD4_b(u64 insn) {
union {
u64 raw;
BitField<38, 2, ComponentType> component;
BitField<36, 2, OffsetType> offset;
} const tld4{insn};
Impl(*this, insn, tld4.component, tld4.offset, true);
}
} // namespace Shader::Maxwell

8
src/shader_recompiler/ir_opt/collect_shader_info_pass.cpp
View File

@ -352,14 +352,20 @@ void VisitUsages(Info& info, IR::Inst& inst) {
case IR::Opcode::BindlessImageSampleExplicitLod:
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
case IR::Opcode::BindlessImageGather:
case IR::Opcode::BindlessImageGatherDref:
case IR::Opcode::BoundImageSampleImplicitLod:
case IR::Opcode::BoundImageSampleExplicitLod:
case IR::Opcode::BoundImageSampleDrefImplicitLod:
case IR::Opcode::BoundImageSampleDrefExplicitLod:
case IR::Opcode::BoundImageGather:
case IR::Opcode::BoundImageGatherDref:
case IR::Opcode::ImageSampleImplicitLod:
case IR::Opcode::ImageSampleExplicitLod:
case IR::Opcode::ImageSampleDrefImplicitLod:
case IR::Opcode::ImageSampleDrefExplicitLod: {
case IR::Opcode::ImageSampleDrefExplicitLod:
case IR::Opcode::ImageGather:
case IR::Opcode::ImageGatherDref: {
const TextureType type{inst.Flags<IR::TextureInstInfo>().type};
info.uses_sampled_1d |= type == TextureType::Color1D || type == TextureType::ColorArray1D ||
type == TextureType::Shadow1D || type == TextureType::ShadowArray1D;

12
src/shader_recompiler/ir_opt/constant_propagation_pass.cpp
View File

@ -403,6 +403,18 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
return (base >> shift) & ((1U << count) - 1);
});
return;
case IR::Opcode::BitFieldSExtract:
FoldWhenAllImmediates(inst, [](s32 base, u32 shift, u32 count) {
const size_t back_shift = static_cast<size_t>(shift) + static_cast<size_t>(count);
if (back_shift > Common::BitSize<s32>()) {
throw LogicError("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldSExtract,
base, shift, count);
}
const size_t left_shift = Common::BitSize<s32>() - back_shift;
return static_cast<u32>(static_cast<s32>(base << left_shift) >>
static_cast<size_t>(Common::BitSize<s32>() - count));
});
return;
case IR::Opcode::BranchConditional:
return FoldBranchConditional(inst);
default:

10
src/shader_recompiler/ir_opt/texture_pass.cpp
View File

@ -45,6 +45,12 @@ IR::Opcode IndexedInstruction(const IR::Inst& inst) {
case IR::Opcode::BoundImageSampleDrefExplicitLod:
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
return IR::Opcode::ImageSampleDrefExplicitLod;
case IR::Opcode::BindlessImageGather:
case IR::Opcode::BoundImageGather:
return IR::Opcode::ImageGather;
case IR::Opcode::BindlessImageGatherDref:
case IR::Opcode::BoundImageGatherDref:
return IR::Opcode::ImageGatherDref;
default:
return IR::Opcode::Void;
}
@ -56,11 +62,15 @@ bool IsBindless(const IR::Inst& inst) {
case IR::Opcode::BindlessImageSampleExplicitLod:
case IR::Opcode::BindlessImageSampleDrefImplicitLod:
case IR::Opcode::BindlessImageSampleDrefExplicitLod:
case IR::Opcode::BindlessImageGather:
case IR::Opcode::BindlessImageGatherDref:
return true;
case IR::Opcode::BoundImageSampleImplicitLod:
case IR::Opcode::BoundImageSampleExplicitLod:
case IR::Opcode::BoundImageSampleDrefImplicitLod:
case IR::Opcode::BoundImageSampleDrefExplicitLod:
case IR::Opcode::BoundImageGather:
case IR::Opcode::BoundImageGatherDref:
return false;
default:
throw InvalidArgument("Invalid opcode {}", inst.Opcode());