shader: Deduplicate HADD2 code
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@ -107,54 +107,52 @@ void HADD2(TranslatorVisitor& v, u64 insn, Merge merge, bool ftz, bool sat, bool
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}
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v.X(hadd2.dest_reg, MergeResult(v.ir, hadd2.dest_reg, lhs, rhs, merge));
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}
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void HADD2(TranslatorVisitor& v, u64 insn, bool sat, bool abs_b, bool neg_b, Swizzle swizzle_b,
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const IR::U32& src_b) {
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union {
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u64 raw;
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BitField<49, 2, Merge> merge;
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BitField<39, 1, u64> ftz;
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BitField<43, 1, u64> neg_a;
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BitField<44, 1, u64> abs_a;
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BitField<47, 2, Swizzle> swizzle_a;
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} const hadd2{insn};
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HADD2(v, insn, hadd2.merge, hadd2.ftz != 0, sat, hadd2.abs_a != 0, hadd2.neg_a != 0,
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hadd2.swizzle_a, abs_b, neg_b, swizzle_b, src_b);
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}
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} // Anonymous namespace
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void TranslatorVisitor::HADD2_reg(u64 insn) {
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union {
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u64 raw;
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BitField<49, 2, Merge> merge;
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BitField<39, 1, u64> ftz;
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BitField<32, 1, u64> sat;
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BitField<43, 1, u64> neg_a;
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BitField<44, 1, u64> abs_a;
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BitField<47, 2, Swizzle> swizzle_a;
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BitField<31, 1, u64> neg_b;
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BitField<30, 1, u64> abs_b;
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BitField<28, 2, Swizzle> swizzle_b;
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} const hadd2{insn};
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HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0,
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hadd2.neg_a != 0, hadd2.swizzle_a, hadd2.abs_b != 0, hadd2.neg_b != 0, hadd2.swizzle_b,
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HADD2(*this, insn, hadd2.sat != 0, hadd2.abs_b != 0, hadd2.neg_b != 0, hadd2.swizzle_b,
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GetReg20(insn));
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}
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void TranslatorVisitor::HADD2_cbuf(u64 insn) {
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union {
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u64 raw;
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BitField<49, 2, Merge> merge;
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BitField<39, 1, u64> ftz;
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BitField<52, 1, u64> sat;
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BitField<43, 1, u64> neg_a;
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BitField<44, 1, u64> abs_a;
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BitField<47, 2, Swizzle> swizzle_a;
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BitField<56, 1, u64> neg_b;
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BitField<54, 1, u64> abs_b;
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} const hadd2{insn};
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HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0,
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hadd2.neg_a != 0, hadd2.swizzle_a, hadd2.abs_b != 0, hadd2.neg_b != 0, Swizzle::F32,
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HADD2(*this, insn, hadd2.sat != 0, hadd2.abs_b != 0, hadd2.neg_b != 0, Swizzle::F32,
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GetCbuf(insn));
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}
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void TranslatorVisitor::HADD2_imm(u64 insn) {
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union {
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u64 raw;
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BitField<49, 2, Merge> merge;
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BitField<39, 1, u64> ftz;
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BitField<52, 1, u64> sat;
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BitField<43, 1, u64> neg_a;
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BitField<44, 1, u64> abs_a;
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BitField<47, 2, Swizzle> swizzle_a;
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BitField<56, 1, u64> neg_high;
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BitField<30, 9, u64> high;
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BitField<29, 1, u64> neg_low;
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@ -163,8 +161,7 @@ void TranslatorVisitor::HADD2_imm(u64 insn) {
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const u32 imm{static_cast<u32>(hadd2.low << 6) | ((hadd2.neg_low != 0 ? 1 : 0) << 15) |
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static_cast<u32>(hadd2.high << 22) | ((hadd2.neg_high != 0 ? 1 : 0) << 31)};
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HADD2(*this, insn, hadd2.merge, hadd2.ftz != 0, hadd2.sat != 0, hadd2.abs_a != 0,
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hadd2.neg_a != 0, hadd2.swizzle_a, false, false, Swizzle::H1_H0, ir.Imm32(imm));
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HADD2(*this, insn, hadd2.sat != 0, false, false, Swizzle::H1_H0, ir.Imm32(imm));
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}
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void TranslatorVisitor::HADD2_32I(u64 insn) {
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