Refactors and name corrections.
This commit is contained in:
parent
b3118ee316
commit
e64c41efe8
@ -9,7 +9,7 @@
|
|||||||
|
|
||||||
namespace Tegra::Engines::Upload {
|
namespace Tegra::Engines::Upload {
|
||||||
|
|
||||||
State::State(MemoryManager& memory_manager, Data& regs)
|
State::State(MemoryManager& memory_manager, Registers& regs)
|
||||||
: memory_manager(memory_manager), regs(regs) {}
|
: memory_manager(memory_manager), regs(regs) {}
|
||||||
|
|
||||||
void State::ProcessExec(const bool is_linear) {
|
void State::ProcessExec(const bool is_linear) {
|
||||||
@ -23,24 +23,25 @@ void State::ProcessData(const u32 data, const bool is_last_call) {
|
|||||||
const u32 sub_copy_size = std::min(4U, copy_size - write_offset);
|
const u32 sub_copy_size = std::min(4U, copy_size - write_offset);
|
||||||
std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size);
|
std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size);
|
||||||
write_offset += sub_copy_size;
|
write_offset += sub_copy_size;
|
||||||
if (is_last_call) {
|
if (!is_last_call) {
|
||||||
const GPUVAddr address{regs.dest.Address()};
|
return;
|
||||||
if (is_linear) {
|
}
|
||||||
memory_manager.WriteBlock(address, inner_buffer.data(), copy_size);
|
const GPUVAddr address{regs.dest.Address()};
|
||||||
} else {
|
if (is_linear) {
|
||||||
UNIMPLEMENTED_IF(regs.dest.z != 0);
|
memory_manager.WriteBlock(address, inner_buffer.data(), copy_size);
|
||||||
UNIMPLEMENTED_IF(regs.dest.depth != 1);
|
} else {
|
||||||
UNIMPLEMENTED_IF(regs.dest.BlockWidth() != 1);
|
UNIMPLEMENTED_IF(regs.dest.z != 0);
|
||||||
UNIMPLEMENTED_IF(regs.dest.BlockDepth() != 1);
|
UNIMPLEMENTED_IF(regs.dest.depth != 1);
|
||||||
const std::size_t dst_size = Tegra::Texture::CalculateSize(
|
UNIMPLEMENTED_IF(regs.dest.BlockWidth() != 1);
|
||||||
true, 1, regs.dest.width, regs.dest.height, 1, regs.dest.BlockHeight(), 1);
|
UNIMPLEMENTED_IF(regs.dest.BlockDepth() != 1);
|
||||||
std::vector<u8> tmp_buffer(dst_size);
|
const std::size_t dst_size = Tegra::Texture::CalculateSize(
|
||||||
memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size);
|
true, 1, regs.dest.width, regs.dest.height, 1, regs.dest.BlockHeight(), 1);
|
||||||
Tegra::Texture::SwizzleKepler(regs.dest.width, regs.dest.height, regs.dest.x,
|
tmp_buffer.resize(dst_size);
|
||||||
regs.dest.y, regs.dest.BlockHeight(), copy_size,
|
memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size);
|
||||||
inner_buffer.data(), tmp_buffer.data());
|
Tegra::Texture::SwizzleKepler(regs.dest.width, regs.dest.height, regs.dest.x, regs.dest.y,
|
||||||
memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size);
|
regs.dest.BlockHeight(), copy_size, inner_buffer.data(),
|
||||||
}
|
tmp_buffer.data());
|
||||||
|
memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -16,7 +16,7 @@ class MemoryManager;
|
|||||||
|
|
||||||
namespace Tegra::Engines::Upload {
|
namespace Tegra::Engines::Upload {
|
||||||
|
|
||||||
struct Data {
|
struct Registers {
|
||||||
u32 line_length_in;
|
u32 line_length_in;
|
||||||
u32 line_count;
|
u32 line_count;
|
||||||
|
|
||||||
@ -56,7 +56,7 @@ struct Data {
|
|||||||
|
|
||||||
class State {
|
class State {
|
||||||
public:
|
public:
|
||||||
State(MemoryManager& memory_manager, Data& regs);
|
State(MemoryManager& memory_manager, Registers& regs);
|
||||||
~State() = default;
|
~State() = default;
|
||||||
|
|
||||||
void ProcessExec(const bool is_linear);
|
void ProcessExec(const bool is_linear);
|
||||||
@ -66,8 +66,9 @@ private:
|
|||||||
u32 write_offset = 0;
|
u32 write_offset = 0;
|
||||||
u32 copy_size = 0;
|
u32 copy_size = 0;
|
||||||
std::vector<u8> inner_buffer;
|
std::vector<u8> inner_buffer;
|
||||||
bool is_linear;
|
std::vector<u8> tmp_buffer;
|
||||||
Data& regs;
|
bool is_linear = false;
|
||||||
|
Registers& regs;
|
||||||
MemoryManager& memory_manager;
|
MemoryManager& memory_manager;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -51,7 +51,7 @@ public:
|
|||||||
struct {
|
struct {
|
||||||
INSERT_PADDING_WORDS(0x60);
|
INSERT_PADDING_WORDS(0x60);
|
||||||
|
|
||||||
Upload::Data upload;
|
Upload::Registers upload;
|
||||||
|
|
||||||
struct {
|
struct {
|
||||||
union {
|
union {
|
||||||
@ -131,7 +131,6 @@ public:
|
|||||||
BitField<30, 1, u32> linked_tsc;
|
BitField<30, 1, u32> linked_tsc;
|
||||||
|
|
||||||
BitField<0, 31, u32> grid_dim_x;
|
BitField<0, 31, u32> grid_dim_x;
|
||||||
|
|
||||||
union {
|
union {
|
||||||
BitField<0, 16, u32> grid_dim_y;
|
BitField<0, 16, u32> grid_dim_y;
|
||||||
BitField<16, 16, u32> grid_dim_z;
|
BitField<16, 16, u32> grid_dim_z;
|
||||||
@ -142,7 +141,6 @@ public:
|
|||||||
BitField<0, 16, u32> shared_alloc;
|
BitField<0, 16, u32> shared_alloc;
|
||||||
|
|
||||||
BitField<0, 31, u32> block_dim_x;
|
BitField<0, 31, u32> block_dim_x;
|
||||||
|
|
||||||
union {
|
union {
|
||||||
BitField<0, 16, u32> block_dim_y;
|
BitField<0, 16, u32> block_dim_y;
|
||||||
BitField<16, 16, u32> block_dim_z;
|
BitField<16, 16, u32> block_dim_z;
|
||||||
|
@ -47,7 +47,7 @@ public:
|
|||||||
struct {
|
struct {
|
||||||
INSERT_PADDING_WORDS(0x60);
|
INSERT_PADDING_WORDS(0x60);
|
||||||
|
|
||||||
Upload::Data upload;
|
Upload::Registers upload;
|
||||||
|
|
||||||
struct {
|
struct {
|
||||||
union {
|
union {
|
||||||
|
@ -588,7 +588,7 @@ public:
|
|||||||
|
|
||||||
INSERT_PADDING_WORDS(0x17);
|
INSERT_PADDING_WORDS(0x17);
|
||||||
|
|
||||||
Upload::Data upload;
|
Upload::Registers upload;
|
||||||
struct {
|
struct {
|
||||||
union {
|
union {
|
||||||
BitField<0, 1, u32> linear;
|
BitField<0, 1, u32> linear;
|
||||||
|
@ -70,13 +70,13 @@ public:
|
|||||||
static_assert(sizeof(Parameters) == 24, "Parameters has wrong size");
|
static_assert(sizeof(Parameters) == 24, "Parameters has wrong size");
|
||||||
|
|
||||||
enum class ComponentMode : u32 {
|
enum class ComponentMode : u32 {
|
||||||
SRC0 = 0,
|
Src0 = 0,
|
||||||
SRC1 = 1,
|
Src1 = 1,
|
||||||
SRC2 = 2,
|
Src2 = 2,
|
||||||
SRC3 = 3,
|
Src3 = 3,
|
||||||
CONST0 = 4,
|
Const0 = 4,
|
||||||
CONST1 = 5,
|
Const1 = 5,
|
||||||
ZERO = 6,
|
Zero = 6,
|
||||||
};
|
};
|
||||||
|
|
||||||
enum class CopyMode : u32 {
|
enum class CopyMode : u32 {
|
||||||
|
Loading…
Reference in New Issue
Block a user