forked from Popn_Tools/popnhax
311 lines
9.3 KiB
C
311 lines
9.3 KiB
C
#include "ia32_modrm.h"
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#include "ia32_reg.h"
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#include "x86_imm.h"
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/* NOTE: when decoding ModR/M and SIB, we have to add 1 to all register
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* values obtained from decoding the ModR/M or SIB byte, since they
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* are encoded with eAX = 0 and the tables in ia32_reg.c use eAX = 1.
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* ADDENDUM: this is only the case when the register value is used
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* directly as an index into the register table, not when it is added to
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* a genregs offset. */
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/* -------------------------------- ModR/M, SIB */
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/* ModR/M flags */
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#define MODRM_RM_SIB 0x04 /* R/M == 100 */
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#define MODRM_RM_NOREG 0x05 /* R/B == 101 */
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/* if (MODRM.MOD_NODISP && MODRM.RM_NOREG) then just disp32 */
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#define MODRM_MOD_NODISP 0x00 /* mod == 00 */
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#define MODRM_MOD_DISP8 0x01 /* mod == 01 */
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#define MODRM_MOD_DISP32 0x02 /* mod == 10 */
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#define MODRM_MOD_NOEA 0x03 /* mod == 11 */
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/* 16-bit modrm flags */
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#define MOD16_MOD_NODISP 0
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#define MOD16_MOD_DISP8 1
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#define MOD16_MOD_DISP16 2
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#define MOD16_MOD_REG 3
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#define MOD16_RM_BXSI 0
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#define MOD16_RM_BXDI 1
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#define MOD16_RM_BPSI 2
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#define MOD16_RM_BPDI 3
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#define MOD16_RM_SI 4
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#define MOD16_RM_DI 5
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#define MOD16_RM_BP 6
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#define MOD16_RM_BX 7
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/* SIB flags */
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#define SIB_INDEX_NONE 0x04
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#define SIB_BASE_EBP 0x05
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#define SIB_SCALE_NOBASE 0x00
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/* Convenience struct for modR/M bitfield */
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struct modRM_byte {
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unsigned int mod : 2;
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unsigned int reg : 3;
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unsigned int rm : 3;
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};
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/* Convenience struct for SIB bitfield */
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struct SIB_byte {
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unsigned int scale : 2;
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unsigned int index : 3;
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unsigned int base : 3;
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};
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#if 0
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int modrm_rm[] = {0,1,2,3,MODRM_RM_SIB,MODRM_MOD_DISP32,6,7};
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int modrm_reg[] = {0, 1, 2, 3, 4, 5, 6, 7};
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int modrm_mod[] = {0, MODRM_MOD_DISP8, MODRM_MOD_DISP32, MODRM_MOD_NOEA};
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int sib_scl[] = {0, 2, 4, 8};
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int sib_idx[] = {0, 1, 2, 3, SIB_INDEX_NONE, 5, 6, 7 };
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int sib_bas[] = {0, 1, 2, 3, 4, SIB_SCALE_NOBASE, 6, 7 };
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#endif
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/* this is needed to replace x86_imm_signsized() which does not sign-extend
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* to dest */
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static unsigned int imm32_signsized( unsigned char *buf, size_t buf_len,
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int32_t *dest, unsigned int size ) {
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if ( size > buf_len ) {
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return 0;
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}
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switch (size) {
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case 1:
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*dest = *((signed char *) buf);
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break;
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case 2:
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*dest = *((signed short *) buf);
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break;
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case 4:
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default:
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*dest = *((signed int *) buf);
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break;
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}
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return size;
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}
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static void byte_decode(unsigned char b, struct modRM_byte *modrm) {
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/* generic bitfield-packing routine */
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modrm->mod = b >> 6; /* top 2 bits */
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modrm->reg = (b & 56) >> 3; /* middle 3 bits */
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modrm->rm = b & 7; /* bottom 3 bits */
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}
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static size_t sib_decode( unsigned char *buf, size_t buf_len, x86_ea_t *ea,
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unsigned int mod ) {
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/* set Address Expression fields (scale, index, base, disp)
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* according to the contents of the SIB byte.
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* b points to the SIB byte in the instruction-stream buffer; the
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* byte after b[0] is therefore the byte after the SIB
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* returns number of bytes 'used', including the SIB byte */
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size_t size = 1; /* start at 1 for SIB byte */
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struct SIB_byte sib;
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if ( buf_len < 1 ) {
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return 0;
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}
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byte_decode( *buf, (struct modRM_byte *)(void*)&sib ); /* get bit-fields */
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if ( sib.base == SIB_BASE_EBP && ! mod ) { /* if base == 101 (ebp) */
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/* IF BASE == EBP, deal with exception */
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/* IF (ModR/M did not create a Disp */
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/* ... create a 32-bit Displacement */
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imm32_signsized( &buf[1], buf_len, &ea->disp, sizeof(int32_t));
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ea->disp_size = sizeof(int32_t);
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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size += 4; /* add sizeof disp to count */
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} else {
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/* ELSE BASE refers to a General Register */
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ia32_handle_register( &ea->base, sib.base + 1 );
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}
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/* set scale to 1, 2, 4, 8 */
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ea->scale = 1 << sib.scale;
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if (sib.index != SIB_INDEX_NONE) {
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/* IF INDEX is not 'ESP' (100) */
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ia32_handle_register( &ea->index, sib.index + 1 );
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}
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return (size); /* return number of bytes processed */
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}
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static size_t modrm_decode16( unsigned char *buf, unsigned int buf_len,
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x86_op_t *op, struct modRM_byte *modrm ) {
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/* 16-bit mode: hackish, but not as hackish as 32-bit mode ;) */
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size_t size = 1; /* # of bytes decoded [1 for modR/M byte] */
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x86_ea_t * ea = &op->data.expression;
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switch( modrm->rm ) {
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case MOD16_RM_BXSI:
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
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ia32_handle_register(&ea->index, REG_WORD_OFFSET + 6);
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break;
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case MOD16_RM_BXDI:
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
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ia32_handle_register(&ea->index, REG_WORD_OFFSET + 7);
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case MOD16_RM_BPSI:
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op->flags |= op_ss_seg;
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 5);
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ia32_handle_register(&ea->index, REG_WORD_OFFSET + 6);
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break;
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case MOD16_RM_BPDI:
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op->flags |= op_ss_seg;
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 5);
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ia32_handle_register(&ea->index, REG_WORD_OFFSET + 7);
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break;
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case MOD16_RM_SI:
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 6);
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break;
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case MOD16_RM_DI:
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 7);
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break;
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case MOD16_RM_BP:
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if ( modrm->mod != MOD16_MOD_NODISP ) {
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op->flags |= op_ss_seg;
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ia32_handle_register(&ea->base,
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REG_WORD_OFFSET + 5);
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}
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break;
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case MOD16_RM_BX:
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ia32_handle_register(&ea->base, REG_WORD_OFFSET + 3);
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break;
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}
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/* move to byte after ModR/M */
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++buf;
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--buf_len;
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if ( modrm->mod == MOD16_MOD_DISP8 ) {
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imm32_signsized( buf, buf_len, &ea->disp, sizeof(char) );
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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ea->disp_size = sizeof(char);
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size += sizeof(char);
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} else if ( modrm->mod == MOD16_MOD_DISP16 ) {
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imm32_signsized( buf, buf_len, &ea->disp, sizeof(short) );
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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ea->disp_size = sizeof(short);
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size += sizeof(short);
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}
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return size;
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}
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/* TODO : Mark index modes
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Use addressing mode flags to imply arrays (index), structure (disp),
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two-dimensional arrays [disp + index], classes [ea reg], and so on.
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*/
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size_t ia32_modrm_decode( unsigned char *buf, unsigned int buf_len,
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x86_op_t *op, x86_insn_t *insn, size_t gen_regs ) {
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/* create address expression and/or fill operand based on value of
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* ModR/M byte. Calls sib_decode as appropriate.
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* flags specifies whether Reg or mod+R/M fields are being decoded
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* returns the number of bytes in the instruction, including modR/M */
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struct modRM_byte modrm;
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size_t size = 1; /* # of bytes decoded [1 for modR/M byte] */
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x86_ea_t * ea;
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byte_decode(*buf, &modrm); /* get bitfields */
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/* first, handle the case where the mod field is a register only */
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if ( modrm.mod == MODRM_MOD_NOEA ) {
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op->type = op_register;
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ia32_handle_register(&op->data.reg, modrm.rm + gen_regs);
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/* increase insn size by 1 for modrm byte */
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return 1;
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}
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/* then deal with cases where there is an effective address */
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ea = &op->data.expression;
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op->type = op_expression;
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op->flags |= op_pointer;
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if ( insn->addr_size == 2 ) {
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/* gah! 16 bit mode! */
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return modrm_decode16( buf, buf_len, op, &modrm);
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}
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/* move to byte after ModR/M */
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++buf;
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--buf_len;
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if (modrm.mod == MODRM_MOD_NODISP) { /* if mod == 00 */
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/* IF MOD == No displacement, just Indirect Register */
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if (modrm.rm == MODRM_RM_NOREG) { /* if r/m == 101 */
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/* IF RM == No Register, just Displacement */
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/* This is an Intel Moronic Exception TM */
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imm32_signsized( buf, buf_len, &ea->disp,
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sizeof(int32_t) );
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ea->disp_size = sizeof(int32_t);
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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size += 4; /* add sizeof disp to count */
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} else if (modrm.rm == MODRM_RM_SIB) { /* if r/m == 100 */
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/* ELSE IF an SIB byte is present */
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/* TODO: check for 0 retval */
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size += sib_decode( buf, buf_len, ea, modrm.mod);
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/* move to byte after SIB for displacement */
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++buf;
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--buf_len;
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} else { /* modR/M specifies base register */
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/* ELSE RM encodes a general register */
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ia32_handle_register( &ea->base, modrm.rm + 1 );
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}
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} else { /* mod is 01 or 10 */
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if (modrm.rm == MODRM_RM_SIB) { /* rm == 100 */
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/* IF base is an AddrExpr specified by an SIB byte */
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/* TODO: check for 0 retval */
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size += sib_decode( buf, buf_len, ea, modrm.mod);
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/* move to byte after SIB for displacement */
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++buf;
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--buf_len;
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} else {
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/* ELSE base is a general register */
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ia32_handle_register( &ea->base, modrm.rm + 1 );
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}
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/* ELSE mod + r/m specify a disp##[base] or disp##(SIB) */
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if (modrm.mod == MODRM_MOD_DISP8) { /* mod == 01 */
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/* If this is an 8-bit displacement */
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imm32_signsized( buf, buf_len, &ea->disp,
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sizeof(char));
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ea->disp_size = sizeof(char);
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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size += 1; /* add sizeof disp to count */
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} else {
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/* Displacement is dependent on address size */
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imm32_signsized( buf, buf_len, &ea->disp,
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insn->addr_size);
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ea->disp_size = insn->addr_size;
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ea->disp_sign = (ea->disp < 0) ? 1 : 0;
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size += 4;
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}
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}
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return size; /* number of bytes found in instruction */
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}
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void ia32_reg_decode( unsigned char byte, x86_op_t *op, size_t gen_regs ) {
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struct modRM_byte modrm;
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byte_decode( byte, &modrm ); /* get bitfields */
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/* set operand to register ID */
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op->type = op_register;
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ia32_handle_register(&op->data.reg, modrm.reg + gen_regs);
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return;
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}
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