2022-12-11 04:01:52 +01:00
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#include <windows.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#include "hook/iobuf.h"
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#include "hook/iohook.h"
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#include "carolhook/carol-dll.h"
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#include "carolhook/controlbd.h"
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#include "hooklib/uart.h"
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#include "util/dprintf.h"
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#include "util/dump.h"
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static HRESULT controlbd_handle_irp(struct irp *irp);
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static HRESULT controlbd_handle_irp_locked(struct irp *irp);
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2023-04-28 10:25:47 +02:00
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static HRESULT controlbd_frame_decode(struct controlbd_req_any *dest, struct iobuf *src);
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static HRESULT controlbd_set_header(struct controlbd_resp_hdr *resp, uint8_t cmd, uint8_t len);
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static uint8_t calc_checksum(void *data, size_t len);
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static HRESULT controlbd_req_dispatch(const struct controlbd_req_any *req);
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static HRESULT controlbd_req_ack_any(uint8_t cmd);
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static HRESULT controlbd_req_reset(void);
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static HRESULT controlbd_req_get_board_info(void);
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static HRESULT controlbd_req_firmware_checksum(void);
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static HRESULT controlbd_req_polling(const struct controlbd_req_any *req);
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2022-12-11 04:01:52 +01:00
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2023-04-28 10:25:47 +02:00
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const uint8_t CONTROLBD_SYNC_BYTE = 0xE0;
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2022-12-11 04:01:52 +01:00
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static CRITICAL_SECTION controlbd_lock;
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static struct uart controlbd_uart;
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static uint8_t controlbd_written_bytes[520];
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static uint8_t controlbd_readable_bytes[520];
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HRESULT controlbd_hook_init(const struct controlbd_config *cfg)
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{
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if (!cfg->enable) {
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return S_OK;
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}
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InitializeCriticalSection(&controlbd_lock);
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2023-04-11 06:20:51 +02:00
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uart_init(&controlbd_uart, 12);
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2022-12-11 04:01:52 +01:00
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controlbd_uart.written.bytes = controlbd_written_bytes;
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controlbd_uart.written.nbytes = sizeof(controlbd_written_bytes);
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controlbd_uart.readable.bytes = controlbd_readable_bytes;
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controlbd_uart.readable.nbytes = sizeof(controlbd_readable_bytes);
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dprintf("Control Board: Init\n");
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return iohook_push_handler(controlbd_handle_irp);
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}
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static HRESULT controlbd_handle_irp(struct irp *irp)
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{
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HRESULT hr;
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assert(irp != NULL);
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if (!uart_match_irp(&controlbd_uart, irp)) {
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return iohook_invoke_next(irp);
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}
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EnterCriticalSection(&controlbd_lock);
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hr = controlbd_handle_irp_locked(irp);
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LeaveCriticalSection(&controlbd_lock);
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return hr;
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}
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2023-04-28 10:25:47 +02:00
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static HRESULT controlbd_frame_decode(struct controlbd_req_any *req, struct iobuf *src)
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{
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uint8_t data_len = 0;
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uint8_t checksum_pos = src->pos - 1;
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uint8_t calculated_checksum = 0;
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uint8_t checksum = 0;
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2024-06-20 02:22:01 +02:00
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2023-04-28 10:25:47 +02:00
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if (src->pos < 6) {
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dprintf("Control Board: Decode Error, request too short (pos is 0x%08X)\n", (int)src->pos);
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return SEC_E_BUFFER_TOO_SMALL;
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}
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req->hdr.sync = src->bytes[0];
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req->hdr.dest = src->bytes[1];
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req->hdr.src = src->bytes[2];
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req->hdr.len = src->bytes[3];
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req->hdr.cmd = src->bytes[4];
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data_len = req->hdr.len;
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src->pos -= 5;
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for (int i = 0; i < data_len; i++) {
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if (src->pos == 0) {
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break;
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}
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req->bytes[i] = src->bytes[i + 5];
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src->pos --;
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}
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checksum = src->bytes[checksum_pos];
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calculated_checksum = calc_checksum(req, checksum_pos);
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if (checksum != calculated_checksum) {
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dprintf("Control Board: Decode Error, checksum failure (expected 0x%02X, got 0x%02X)\n", calculated_checksum, checksum);
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return HRESULT_FROM_WIN32(ERROR_CRC);
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}
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return S_OK;
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}
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2022-12-11 04:01:52 +01:00
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static HRESULT controlbd_handle_irp_locked(struct irp *irp)
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{
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HRESULT hr;
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2023-04-28 10:25:47 +02:00
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struct controlbd_req_any req;
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2022-12-11 04:01:52 +01:00
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assert(carol_dll.controlbd_init != NULL);
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if (irp->op == IRP_OP_OPEN) {
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2023-04-11 06:22:41 +02:00
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dprintf("Control Board: Starting backend DLL\n");
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2022-12-11 04:01:52 +01:00
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hr = carol_dll.controlbd_init();
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if (FAILED(hr)) {
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2023-04-11 06:22:41 +02:00
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dprintf("Control Board: Backend DLL error: 0X%X\n", (int) hr);
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2022-12-11 04:01:52 +01:00
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return hr;
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}
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}
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hr = uart_handle_irp(&controlbd_uart, irp);
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if (FAILED(hr) || irp->op != IRP_OP_WRITE) {
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return hr;
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}
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for (;;) {
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2023-04-28 10:25:47 +02:00
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if (controlbd_uart.written.bytes[0] == 0xE0) {
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2024-06-20 02:22:01 +02:00
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#if defined(LOG_CAROL_CONTROL_BD)
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2023-04-28 10:25:47 +02:00
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dprintf("Control Board: TX Buffer:\n");
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dump_iobuf(&controlbd_uart.written);
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2022-12-11 04:01:52 +01:00
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#endif
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2023-04-28 10:25:47 +02:00
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hr = controlbd_frame_decode(&req, &controlbd_uart.written);
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if (FAILED(hr)) {
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dprintf("Control Board: Deframe error: %x\n", (int) hr);
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return hr;
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}
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2024-06-20 02:22:01 +02:00
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hr = controlbd_req_dispatch(&req);
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2023-04-28 10:25:47 +02:00
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if (FAILED(hr)) {
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dprintf("Control Board: Dispatch Error: 0X%X\n", (int) hr);
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return hr;
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}
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2024-06-20 02:22:01 +02:00
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#if defined(LOG_CAROL_CONTROL_BD)
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2023-04-28 10:25:47 +02:00
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dprintf("Control Board: RX Buffer:\n");
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dump_iobuf(&controlbd_uart.readable);
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#endif
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controlbd_uart.written.pos = 0;
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2022-12-11 04:01:52 +01:00
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return hr;
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}
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2023-04-28 10:25:47 +02:00
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// The board has a LPC111x bootloader that gets ran over every boot
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// this is to account for that.
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char cmd[255];
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strcpy_s(cmd, 255, (char *)controlbd_uart.written.bytes);
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cmd[controlbd_uart.written.pos] = '\0';
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2022-12-11 04:01:52 +01:00
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2023-04-28 10:25:47 +02:00
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if (!strcmp(cmd, "?")) {
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dprintf("Control Board: Bootloader Hello\n");
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}
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else if (!strcmp(cmd, "Synchronized\r\n")) {
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iobuf_write(&controlbd_uart.readable, "Synchronized\r\nNG\r\n", 19);
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// Set this to OK instead of NG to do an update
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}
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else if (!strcmp(cmd, "12000\r\n")) {
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iobuf_write(&controlbd_uart.readable, "12000\r\nOK\r\n", 12);
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}
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else {
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// Everything other then the two commands above just want 0\r\n
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// appended to the request as the response. Given that it only checks sometimes,
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// it's safe to just run over the readable buffer every response.
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controlbd_uart.readable.pos = 0;
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cmd[controlbd_uart.written.pos] = '0';
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cmd[controlbd_uart.written.pos + 1] = '\r';
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cmd[controlbd_uart.written.pos + 2] = '\n';
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cmd[controlbd_uart.written.pos + 3] = '\0';
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// dprintf("Control Board: Return %s\n", cmd);
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iobuf_write(&controlbd_uart.readable, cmd, controlbd_uart.written.pos + 3);
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2022-12-11 04:01:52 +01:00
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}
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2023-04-11 06:20:51 +02:00
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controlbd_uart.written.pos = 0;
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2022-12-11 04:01:52 +01:00
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return hr;
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}
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2023-04-28 10:25:47 +02:00
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}
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static HRESULT controlbd_req_dispatch(const struct controlbd_req_any *req)
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{
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switch (req->hdr.cmd) {
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case CONTROLBD_CMD_RESET:
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return controlbd_req_reset();
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case CONTROLBD_CMD_BDINFO:
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return controlbd_req_get_board_info();
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case CONTROLBD_CMD_FIRM_SUM:
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return controlbd_req_firmware_checksum();
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2024-06-20 02:22:01 +02:00
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case CONTROLBD_CMD_TIMEOUT:
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2023-04-28 10:25:47 +02:00
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dprintf("Control Board: Acknowledge Timeout\n");
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return controlbd_req_ack_any(req->hdr.cmd);
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case CONTROLBD_CMD_PORT_SETTING:
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dprintf("Control Board: Acknowledge Port Setting\n");
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return controlbd_req_ack_any(req->hdr.cmd);
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case CONTROLBD_CMD_INITIALIZE:
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dprintf("Control Board: Acknowledge Initialize\n");
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return controlbd_req_ack_any(req->hdr.cmd);
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case CONTROLBD_CMD_POLLING:
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return controlbd_req_polling(req);
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default:
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dprintf("Unhandled command 0x%02x\n", req->hdr.cmd);
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return controlbd_req_ack_any(req->hdr.cmd);
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}
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}
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static HRESULT controlbd_set_header(struct controlbd_resp_hdr *resp, uint8_t cmd, uint8_t len)
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{
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resp->sync = CONTROLBD_SYNC_BYTE;
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resp->dest = 0x01;
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resp->src = 0x02;
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resp->len = len;
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resp->report = 0x01;
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resp->cmd = cmd;
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return S_OK;
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}
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static uint8_t calc_checksum(void *data, size_t len)
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{
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uint8_t *stuff;
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stuff = data;
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uint8_t checksum = 0;
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uint16_t tmp = 0;
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for (int i = 1; i < len; i++) {
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tmp = checksum + stuff[i];
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checksum = tmp & 0xFF;
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}
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return checksum;
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}
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static HRESULT controlbd_req_reset(void)
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{
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struct controlbd_resp_reset resp;
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dprintf("Control Board: Reset\n");
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controlbd_set_header(&resp.hdr, CONTROLBD_CMD_RESET, 2);
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resp.checksum = 0;
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// No data, just ack
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resp.checksum = calc_checksum(&resp, sizeof(resp));
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return iobuf_write(&controlbd_uart.readable, &resp, sizeof(resp));
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}
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static HRESULT controlbd_req_get_board_info(void)
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{
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struct controlbd_resp_bdinfo resp;
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memset(&resp, 0, sizeof(resp));
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dprintf("Control Board: Get Board Info\n");
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controlbd_set_header(&resp.hdr, CONTROLBD_CMD_BDINFO, 21);
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resp.rev = 0x90;
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resp.bfr_size = 0x0001;
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resp.ack = 1;
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2024-06-20 02:22:01 +02:00
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2023-04-28 10:25:47 +02:00
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strcpy_s(resp.bd_no, sizeof(resp.bd_no), "15312 ");
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strcpy_s(resp.chip_no, sizeof(resp.chip_no), "6699 ");
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resp.chip_no[5] = 0xFF;
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resp.bd_no[8] = 0x0A;
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resp.checksum = calc_checksum(&resp, sizeof(resp));
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return iobuf_write(&controlbd_uart.readable, &resp, sizeof(resp));
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}
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static HRESULT controlbd_req_firmware_checksum(void)
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{
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struct controlbd_resp_fw_checksum resp;
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memset(&resp, 0, sizeof(resp));
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dprintf("Control Board: Get Firmware Checksum\n");
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controlbd_set_header(&resp.hdr, CONTROLBD_CMD_FIRM_SUM, 5);
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resp.ack = 1;
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resp.fw_checksum = 0x1b36; // This could change with an update... oh well
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resp.checksum = calc_checksum(&resp, sizeof(resp));
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return iobuf_write(&controlbd_uart.readable, &resp, sizeof(resp));
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}
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static HRESULT controlbd_req_polling(const struct controlbd_req_any *req)
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{
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struct controlbd_req_polling req_struct;
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memset(&req_struct, 0, sizeof(req_struct));
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memcpy_s(&req_struct, sizeof(req_struct), req, sizeof(req_struct));
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struct controlbd_resp_polling resp;
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memset(&resp, 0, sizeof(resp));
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controlbd_set_header(&resp.hdr, CONTROLBD_CMD_POLLING, 16);
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// TODO: Figure out output (pen vibration, etc)
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resp.ack = 1;
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resp.unk7 = 3;
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resp.unk8 = 1;
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resp.unk9 = 1;
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2024-06-20 02:22:01 +02:00
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2023-04-28 10:25:47 +02:00
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resp.btns_pressed = 0; // bit 1 is pen button, bit 2 is dodge
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resp.coord_x = 0x0;
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resp.coord_y = 0x0;
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resp.checksum = calc_checksum(&resp, sizeof(resp));
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return iobuf_write(&controlbd_uart.readable, &resp, sizeof(resp));
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}
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static HRESULT controlbd_req_ack_any(uint8_t cmd)
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{
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struct controlbd_resp_any_ack resp;
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memset(&resp, 0, sizeof(resp));
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controlbd_set_header(&resp.hdr, cmd, 3);
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resp.ack = 1;
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resp.checksum = calc_checksum(&resp, sizeof(resp));
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return iobuf_write(&controlbd_uart.readable, &resp, sizeof(resp));
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}
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