Cool_Tools/NeoGeoAES-3.5
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PCB continuation

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This commit is contained in:
PeepoUK 2022-12-15 19:16:24 +00:00
parent 63de60a42b
commit e89c3ab042
4 changed files with 6560 additions and 3952 deletions
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10439
NeoGeoAES3_5.kicad_pcb
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File diff suppressed because it is too large Load Diff

2
NeoGeoAES3_5.kicad_prl
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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 0,
"active_layer": 31,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],

9
fp-info-cache
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@ -1,4 +1,4 @@
20747078521625643
20748749653117513
1_NeoGeoLibrary
43256
@ -119,6 +119,13 @@ NEO-G0
64
64
1_NeoGeoLibrary
RN2
8-pin Resistor SIP pack
R
0
8
8
1_NeoGeoLibrary
Resistor1-5mm

62
libs/1_NeoGeoLibrary.pretty/RN2.kicad_mod Normal file
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@ -0,0 +1,62 @@
(footprint "RN2" (version 20221018) (generator pcbnew)
(layer "F.Cu")
(descr "8-pin Resistor SIP pack")
(tags "R")
(property "Sheetfile" "sheets/controller.kicad_sch")
(property "Sheetname" "CONTROLLER")
(property "Sim.Device" "SPICE")
(property "Sim.Params" "type=\"\" model=\"22\" lib=\"\"")
(property "Sim.Pins" "1=1 2=2")
(property "ki_description" "4 resistor network, parallel topology, SIP package, split")
(property "ki_keywords" "R network parallel topology isolated")
(attr through_hole)
(fp_text reference "RN2" (at 10.16 -2.4) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 4c95f4bf-8e5e-4c53-ba49-e1fb81fd52ac)
)
(fp_text value "22Ω" (at 10.16 2.4) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 2b2ff79b-fb6b-412d-89ca-b7e22046dd43)
)
(fp_text user "${REFERENCE}" (at 8.89 0) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 817f7e5e-9df6-4dd6-a524-39d36794e1d3)
)
(fp_line (start -1.44 -1.4) (end -1.44 1.4)
(stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 4b9cfbbc-9e97-4677-95e0-1e015b9fc9ff))
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(fp_line (start 19.22 -1.4) (end -1.44 -1.4)
(stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 9b7320e0-7a8c-4ecf-9e03-682438366518))
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(stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp 3de8d100-8184-4c20-a11c-2f14a744851c))
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(stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 015a9b56-760d-41fb-8e9e-73bca8167a25))
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(stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 7ed5b22f-92ac-493e-b533-887d6fa0d156))
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(stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp c3d13dae-f876-4290-8dac-c710263bdf20))
(fp_line (start 19.5 1.65) (end 19.5 -1.65)
(stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 3a9fbfeb-d8d4-4cda-9cf8-9f534b948db5))
(fp_line (start -1.29 -1.25) (end -1.29 1.25)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 2aed80af-5ffb-49d7-8af3-9779c00fdae0))
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(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 297654c7-564a-4fcc-9d29-03a196c44493))
(fp_line (start 19.07 1.25) (end 19.07 -1.25)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp f888a9f7-378c-4370-826f-e3c97c3c08d4))
(pad "1" thru_hole circle (at 0 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp 6ea809d1-dd7c-471b-8c9a-b3f613a14c39))
(pad "2" thru_hole circle (at 2.54 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp aadfaf98-8922-4288-b644-6653e6778d15))
(pad "3" thru_hole circle (at 5.08 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp abf59379-d0ce-4f70-b46a-985c003ee2a9))
(pad "4" thru_hole circle (at 7.62 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp ec9ca7cf-2f08-4c50-b559-fbe96cfa00db))
(pad "5" thru_hole circle (at 10.16 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp 3c9e29f1-6929-408f-8769-8f4ddd385fd5))
(pad "6" thru_hole circle (at 12.7 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp a4001215-5778-4dfb-863c-8c266cea858f))
(pad "7" thru_hole circle (at 15.24 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp 21022bad-81e0-4bc1-a681-9ffd7ea2cc3e))
(pad "8" thru_hole circle (at 17.78 0) (size 1.4 1.4) (drill 0.8) (layers *.Cu *.Mask) (tstamp 8b374d62-9996-4774-8a79-c446abaf1601))
(model "${KICAD6_3DMODEL_DIR}/Resistor_THT.3dshapes/R_Array_SIP8.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)